Commit | Line | Data |
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037ad48b JS |
1 | /* |
2 | * mxser.c -- MOXA Smartio/Industio family multiport serial driver. | |
3 | * | |
3306ce3d | 4 | * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com.tw). |
f8cce2e5 | 5 | * Copyright (C) 2006-2007 Jiri Slaby <jirislaby@gmail.com> |
037ad48b | 6 | * |
c88cb8f9 JS |
7 | * This code is loosely based on the 1.8 moxa driver which is based on |
8 | * Linux serial driver, written by Linus Torvalds, Theodore T'so and | |
9 | * others. | |
037ad48b JS |
10 | * |
11 | * This program is free software; you can redistribute it and/or modify | |
12 | * it under the terms of the GNU General Public License as published by | |
13 | * the Free Software Foundation; either version 2 of the License, or | |
14 | * (at your option) any later version. | |
15 | * | |
037ad48b JS |
16 | * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox |
17 | * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com. | |
18 | * - Fixed x86_64 cleanness | |
19 | * - Fixed sleep with spinlock held in mxser_send_break | |
20 | */ | |
21 | ||
037ad48b JS |
22 | #include <linux/module.h> |
23 | #include <linux/autoconf.h> | |
24 | #include <linux/errno.h> | |
25 | #include <linux/signal.h> | |
26 | #include <linux/sched.h> | |
27 | #include <linux/timer.h> | |
28 | #include <linux/interrupt.h> | |
29 | #include <linux/tty.h> | |
30 | #include <linux/tty_flip.h> | |
31 | #include <linux/serial.h> | |
32 | #include <linux/serial_reg.h> | |
33 | #include <linux/major.h> | |
34 | #include <linux/string.h> | |
35 | #include <linux/fcntl.h> | |
36 | #include <linux/ptrace.h> | |
37 | #include <linux/gfp.h> | |
38 | #include <linux/ioport.h> | |
39 | #include <linux/mm.h> | |
037ad48b JS |
40 | #include <linux/delay.h> |
41 | #include <linux/pci.h> | |
1977f032 | 42 | #include <linux/bitops.h> |
037ad48b JS |
43 | |
44 | #include <asm/system.h> | |
45 | #include <asm/io.h> | |
46 | #include <asm/irq.h> | |
037ad48b JS |
47 | #include <asm/uaccess.h> |
48 | ||
771f2d1a | 49 | #include "mxser_new.h" |
037ad48b | 50 | |
f8cce2e5 | 51 | #define MXSER_VERSION "2.0.2" /* 1.10 */ |
037ad48b JS |
52 | #define MXSERMAJOR 174 |
53 | #define MXSERCUMAJOR 175 | |
54 | ||
037ad48b | 55 | #define MXSER_BOARDS 4 /* Max. boards */ |
037ad48b | 56 | #define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */ |
a8b74de9 | 57 | #define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD) |
18b95576 | 58 | #define MXSER_ISR_PASS_LIMIT 100 |
037ad48b JS |
59 | |
60 | #define MXSER_ERR_IOADDR -1 | |
61 | #define MXSER_ERR_IRQ -2 | |
62 | #define MXSER_ERR_IRQ_CONFLIT -3 | |
63 | #define MXSER_ERR_VECTOR -4 | |
64 | ||
ed79ba12 JS |
65 | /*CheckIsMoxaMust return value*/ |
66 | #define MOXA_OTHER_UART 0x00 | |
67 | #define MOXA_MUST_MU150_HWID 0x01 | |
68 | #define MOXA_MUST_MU860_HWID 0x02 | |
69 | ||
037ad48b JS |
70 | #define WAKEUP_CHARS 256 |
71 | ||
72 | #define UART_MCR_AFE 0x20 | |
73 | #define UART_LSR_SPECIAL 0x1E | |
74 | ||
f8cce2e5 JS |
75 | #define PCI_DEVICE_ID_CB108 0x1080 |
76 | #define PCI_DEVICE_ID_CB114 0x1142 | |
77 | #define PCI_DEVICE_ID_CB134I 0x1341 | |
78 | #define PCI_DEVICE_ID_CP138U 0x1380 | |
79 | #define PCI_DEVICE_ID_POS104UL 0x1044 | |
80 | ||
037ad48b | 81 | |
037ad48b JS |
82 | #define C168_ASIC_ID 1 |
83 | #define C104_ASIC_ID 2 | |
84 | #define C102_ASIC_ID 0xB | |
85 | #define CI132_ASIC_ID 4 | |
86 | #define CI134_ASIC_ID 3 | |
87 | #define CI104J_ASIC_ID 5 | |
88 | ||
cd7ed64e JS |
89 | #define MXSER_HIGHBAUD 1 |
90 | #define MXSER_HAS2 2 | |
037ad48b JS |
91 | |
92 | /* This is only for PCI */ | |
cd7ed64e | 93 | static const struct { |
037ad48b JS |
94 | int type; |
95 | int tx_fifo; | |
96 | int rx_fifo; | |
97 | int xmit_fifo_size; | |
98 | int rx_high_water; | |
99 | int rx_trigger; | |
100 | int rx_low_water; | |
101 | long max_baud; | |
cd7ed64e | 102 | } Gpci_uart_info[] = { |
037ad48b JS |
103 | {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L}, |
104 | {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L}, | |
105 | {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L} | |
106 | }; | |
cd7ed64e JS |
107 | #define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info) |
108 | ||
109 | struct mxser_cardinfo { | |
110 | unsigned int nports; | |
111 | char *name; | |
112 | unsigned int flags; | |
113 | }; | |
114 | ||
115 | static const struct mxser_cardinfo mxser_cards[] = { | |
009ae1db JS |
116 | /* 0*/ { 8, "C168 series", }, |
117 | { 4, "C104 series", }, | |
118 | { 4, "CI-104J series", }, | |
119 | { 8, "C168H/PCI series", }, | |
120 | { 4, "C104H/PCI series", }, | |
f8cce2e5 | 121 | /* 5*/ { 4, "C102 series", MXSER_HAS2 }, /* C102-ISA */ |
009ae1db JS |
122 | { 4, "CI-132 series", MXSER_HAS2 }, |
123 | { 4, "CI-134 series", }, | |
124 | { 2, "CP-132 series", }, | |
125 | { 4, "CP-114 series", }, | |
126 | /*10*/ { 4, "CT-114 series", }, | |
127 | { 2, "CP-102 series", MXSER_HIGHBAUD }, | |
128 | { 4, "CP-104U series", }, | |
129 | { 8, "CP-168U series", }, | |
130 | { 2, "CP-132U series", }, | |
131 | /*15*/ { 4, "CP-134U series", }, | |
132 | { 4, "CP-104JU series", }, | |
cd7ed64e | 133 | { 8, "Moxa UC7000 Serial", }, /* RC7000 */ |
009ae1db JS |
134 | { 8, "CP-118U series", }, |
135 | { 2, "CP-102UL series", }, | |
136 | /*20*/ { 2, "CP-102U series", }, | |
137 | { 8, "CP-118EL series", }, | |
138 | { 8, "CP-168EL series", }, | |
f8cce2e5 JS |
139 | { 4, "CP-104EL series", }, |
140 | { 8, "CB-108 series", }, | |
141 | /*25*/ { 4, "CB-114 series", }, | |
142 | { 4, "CB-134I series", }, | |
143 | { 8, "CP-138U series", }, | |
144 | { 4, "POS-104UL series", } | |
cd7ed64e | 145 | }; |
037ad48b | 146 | |
cd7ed64e JS |
147 | /* driver_data correspond to the lines in the structure above |
148 | see also ISA probe function before you change something */ | |
037ad48b | 149 | static struct pci_device_id mxser_pcibrds[] = { |
931ecbbe JS |
150 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 }, |
151 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 }, | |
152 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 }, | |
153 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 }, | |
154 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 }, | |
155 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 }, | |
156 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 }, | |
157 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 }, | |
158 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 }, | |
159 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 }, | |
160 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 }, | |
161 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 }, | |
162 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 }, | |
163 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 }, | |
164 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 }, | |
165 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 }, | |
166 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 }, | |
167 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 }, | |
f8cce2e5 JS |
168 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 }, |
169 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 }, | |
170 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 }, | |
171 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 }, | |
172 | { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 }, | |
3306ce3d | 173 | { } |
037ad48b | 174 | }; |
037ad48b JS |
175 | MODULE_DEVICE_TABLE(pci, mxser_pcibrds); |
176 | ||
f64c84a1 JS |
177 | static int mxvar_baud_table[] = { |
178 | 0, 50, 75, 110, 134, 150, 200, 300, 600, 1200, 1800, 2400, | |
179 | 4800, 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600 | |
180 | }; | |
181 | static unsigned int mxvar_baud_table1[] = { | |
182 | 0, B50, B75, B110, B134, B150, B200, B300, B600, B1200, B1800, B2400, | |
183 | B4800, B9600, B19200, B38400, B57600, B115200, B230400, B460800, B921600 | |
184 | }; | |
185 | #define BAUD_TABLE_NO ARRAY_SIZE(mxvar_baud_table) | |
186 | ||
187 | #define B_SPEC B2000000 | |
188 | ||
037ad48b JS |
189 | static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 }; |
190 | static int ttymajor = MXSERMAJOR; | |
191 | static int calloutmajor = MXSERCUMAJOR; | |
037ad48b JS |
192 | |
193 | /* Variables for insmod */ | |
194 | ||
195 | MODULE_AUTHOR("Casper Yang"); | |
196 | MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver"); | |
197 | module_param_array(ioaddr, int, NULL, 0); | |
198 | module_param(ttymajor, int, 0); | |
037ad48b JS |
199 | MODULE_LICENSE("GPL"); |
200 | ||
201 | struct mxser_log { | |
202 | int tick; | |
203 | unsigned long rxcnt[MXSER_PORTS]; | |
204 | unsigned long txcnt[MXSER_PORTS]; | |
205 | }; | |
206 | ||
207 | ||
208 | struct mxser_mon { | |
209 | unsigned long rxcnt; | |
210 | unsigned long txcnt; | |
211 | unsigned long up_rxcnt; | |
212 | unsigned long up_txcnt; | |
213 | int modem_status; | |
214 | unsigned char hold_reason; | |
215 | }; | |
216 | ||
217 | struct mxser_mon_ext { | |
218 | unsigned long rx_cnt[32]; | |
219 | unsigned long tx_cnt[32]; | |
220 | unsigned long up_rxcnt[32]; | |
221 | unsigned long up_txcnt[32]; | |
222 | int modem_status[32]; | |
223 | ||
224 | long baudrate[32]; | |
225 | int databits[32]; | |
226 | int stopbits[32]; | |
227 | int parity[32]; | |
228 | int flowctrl[32]; | |
229 | int fifo[32]; | |
230 | int iftype[32]; | |
231 | }; | |
232 | ||
55b307da JS |
233 | struct mxser_board; |
234 | ||
235 | struct mxser_port { | |
236 | struct mxser_board *board; | |
237 | struct tty_struct *tty; | |
238 | ||
239 | unsigned long ioaddr; | |
240 | unsigned long opmode_ioaddr; | |
241 | int max_baud; | |
037ad48b | 242 | |
037ad48b JS |
243 | int rx_high_water; |
244 | int rx_trigger; /* Rx fifo trigger level */ | |
245 | int rx_low_water; | |
246 | int baud_base; /* max. speed */ | |
55b307da | 247 | long realbaud; |
037ad48b | 248 | int type; /* UART type */ |
55b307da | 249 | int flags; /* defined in tty.h */ |
f64c84a1 | 250 | int speed; |
55b307da | 251 | |
037ad48b | 252 | int x_char; /* xon/xoff character */ |
037ad48b JS |
253 | int IER; /* Interrupt Enable Register */ |
254 | int MCR; /* Modem control register */ | |
55b307da JS |
255 | |
256 | unsigned char stop_rx; | |
257 | unsigned char ldisc_stop_rx; | |
258 | ||
259 | int custom_divisor; | |
260 | int close_delay; | |
261 | unsigned short closing_wait; | |
262 | unsigned char err_shadow; | |
037ad48b | 263 | unsigned long event; |
55b307da | 264 | |
037ad48b JS |
265 | int count; /* # of fd on device */ |
266 | int blocked_open; /* # of blocked opens */ | |
55b307da JS |
267 | struct async_icount icount; /* kernel counters for 4 input interrupts */ |
268 | int timeout; | |
269 | ||
270 | int read_status_mask; | |
271 | int ignore_status_mask; | |
272 | int xmit_fifo_size; | |
037ad48b JS |
273 | unsigned char *xmit_buf; |
274 | int xmit_head; | |
275 | int xmit_tail; | |
276 | int xmit_cnt; | |
55b307da | 277 | |
606d099c | 278 | struct ktermios normal_termios; |
55b307da JS |
279 | |
280 | struct mxser_mon mon_data; | |
281 | ||
282 | spinlock_t slock; | |
037ad48b | 283 | wait_queue_head_t open_wait; |
037ad48b | 284 | wait_queue_head_t delta_msr_wait; |
55b307da JS |
285 | }; |
286 | ||
287 | struct mxser_board { | |
2094e757 | 288 | unsigned int idx; |
55b307da | 289 | int irq; |
cd7ed64e | 290 | const struct mxser_cardinfo *info; |
55b307da JS |
291 | unsigned long vector; |
292 | unsigned long vector_mask; | |
293 | ||
294 | int chip_flag; | |
295 | int uart_type; | |
296 | ||
297 | struct mxser_port ports[MXSER_PORTS_PER_BOARD]; | |
037ad48b JS |
298 | }; |
299 | ||
300 | struct mxser_mstatus { | |
301 | tcflag_t cflag; | |
302 | int cts; | |
303 | int dsr; | |
304 | int ri; | |
305 | int dcd; | |
306 | }; | |
307 | ||
308 | static struct mxser_mstatus GMStatus[MXSER_PORTS]; | |
309 | ||
310 | static int mxserBoardCAP[MXSER_BOARDS] = { | |
311 | 0, 0, 0, 0 | |
312 | /* 0x180, 0x280, 0x200, 0x320 */ | |
313 | }; | |
314 | ||
55b307da | 315 | static struct mxser_board mxser_boards[MXSER_BOARDS]; |
037ad48b | 316 | static struct tty_driver *mxvar_sdriver; |
037ad48b JS |
317 | static struct mxser_log mxvar_log; |
318 | static int mxvar_diagflag; | |
319 | static unsigned char mxser_msr[MXSER_PORTS + 1]; | |
320 | static struct mxser_mon_ext mon_data_ext; | |
321 | static int mxser_set_baud_method[MXSER_PORTS + 1]; | |
037ad48b | 322 | |
fb0c9295 | 323 | #ifdef CONFIG_PCI |
c76b0930 | 324 | static int __devinit CheckIsMoxaMust(int io) |
037ad48b JS |
325 | { |
326 | u8 oldmcr, hwid; | |
327 | int i; | |
328 | ||
329 | outb(0, io + UART_LCR); | |
330 | DISABLE_MOXA_MUST_ENCHANCE_MODE(io); | |
331 | oldmcr = inb(io + UART_MCR); | |
332 | outb(0, io + UART_MCR); | |
333 | SET_MOXA_MUST_XON1_VALUE(io, 0x11); | |
334 | if ((hwid = inb(io + UART_MCR)) != 0) { | |
335 | outb(oldmcr, io + UART_MCR); | |
336 | return MOXA_OTHER_UART; | |
337 | } | |
338 | ||
339 | GET_MOXA_MUST_HARDWARE_ID(io, &hwid); | |
cd7ed64e JS |
340 | for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */ |
341 | if (hwid == Gpci_uart_info[i].type) | |
037ad48b JS |
342 | return (int)hwid; |
343 | } | |
344 | return MOXA_OTHER_UART; | |
345 | } | |
fb0c9295 | 346 | #endif |
037ad48b | 347 | |
55b307da | 348 | static void process_txrx_fifo(struct mxser_port *info) |
037ad48b JS |
349 | { |
350 | int i; | |
351 | ||
352 | if ((info->type == PORT_16450) || (info->type == PORT_8250)) { | |
353 | info->rx_trigger = 1; | |
354 | info->rx_high_water = 1; | |
355 | info->rx_low_water = 1; | |
356 | info->xmit_fifo_size = 1; | |
55b307da JS |
357 | } else |
358 | for (i = 0; i < UART_INFO_NUM; i++) | |
359 | if (info->board->chip_flag == Gpci_uart_info[i].type) { | |
037ad48b JS |
360 | info->rx_trigger = Gpci_uart_info[i].rx_trigger; |
361 | info->rx_low_water = Gpci_uart_info[i].rx_low_water; | |
362 | info->rx_high_water = Gpci_uart_info[i].rx_high_water; | |
363 | info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size; | |
364 | break; | |
365 | } | |
037ad48b JS |
366 | } |
367 | ||
a8dea4ec JS |
368 | static unsigned char mxser_get_msr(int baseaddr, int mode, int port) |
369 | { | |
370 | unsigned char status = 0; | |
037ad48b | 371 | |
a8dea4ec | 372 | status = inb(baseaddr + UART_MSR); |
037ad48b | 373 | |
a8dea4ec JS |
374 | mxser_msr[port] &= 0x0F; |
375 | mxser_msr[port] |= status; | |
376 | status = mxser_msr[port]; | |
377 | if (mode) | |
378 | mxser_msr[port] = 0; | |
037ad48b | 379 | |
a8dea4ec JS |
380 | return status; |
381 | } | |
55b307da | 382 | |
a8dea4ec JS |
383 | static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, |
384 | struct mxser_port *port) | |
385 | { | |
386 | DECLARE_WAITQUEUE(wait, current); | |
387 | int retval; | |
388 | int do_clocal = 0; | |
389 | unsigned long flags; | |
390 | ||
391 | /* | |
392 | * If non-blocking mode is set, or the port is not enabled, | |
393 | * then make the check up front and then exit. | |
394 | */ | |
214efebb JS |
395 | if ((filp->f_flags & O_NONBLOCK) || |
396 | test_bit(TTY_IO_ERROR, &tty->flags)) { | |
a8dea4ec JS |
397 | port->flags |= ASYNC_NORMAL_ACTIVE; |
398 | return 0; | |
037ad48b | 399 | } |
a8dea4ec JS |
400 | |
401 | if (tty->termios->c_cflag & CLOCAL) | |
402 | do_clocal = 1; | |
403 | ||
037ad48b | 404 | /* |
a8dea4ec JS |
405 | * Block waiting for the carrier detect and the line to become |
406 | * free (i.e., not in use by the callout). While we are in | |
407 | * this loop, port->count is dropped by one, so that | |
408 | * mxser_close() knows when to free things. We restore it upon | |
409 | * exit, either normal or abnormal. | |
037ad48b | 410 | */ |
a8dea4ec JS |
411 | retval = 0; |
412 | add_wait_queue(&port->open_wait, &wait); | |
037ad48b | 413 | |
a8dea4ec JS |
414 | spin_lock_irqsave(&port->slock, flags); |
415 | if (!tty_hung_up_p(filp)) | |
416 | port->count--; | |
417 | spin_unlock_irqrestore(&port->slock, flags); | |
418 | port->blocked_open++; | |
419 | while (1) { | |
420 | spin_lock_irqsave(&port->slock, flags); | |
421 | outb(inb(port->ioaddr + UART_MCR) | | |
422 | UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR); | |
423 | spin_unlock_irqrestore(&port->slock, flags); | |
424 | set_current_state(TASK_INTERRUPTIBLE); | |
425 | if (tty_hung_up_p(filp) || !(port->flags & ASYNC_INITIALIZED)) { | |
426 | if (port->flags & ASYNC_HUP_NOTIFY) | |
427 | retval = -EAGAIN; | |
428 | else | |
429 | retval = -ERESTARTSYS; | |
430 | break; | |
431 | } | |
432 | if (!(port->flags & ASYNC_CLOSING) && | |
433 | (do_clocal || | |
434 | (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD))) | |
435 | break; | |
436 | if (signal_pending(current)) { | |
437 | retval = -ERESTARTSYS; | |
438 | break; | |
439 | } | |
440 | schedule(); | |
037ad48b | 441 | } |
a8dea4ec JS |
442 | set_current_state(TASK_RUNNING); |
443 | remove_wait_queue(&port->open_wait, &wait); | |
444 | if (!tty_hung_up_p(filp)) | |
445 | port->count++; | |
446 | port->blocked_open--; | |
447 | if (retval) | |
448 | return retval; | |
449 | port->flags |= ASYNC_NORMAL_ACTIVE; | |
037ad48b JS |
450 | return 0; |
451 | } | |
452 | ||
a8dea4ec | 453 | static int mxser_set_baud(struct mxser_port *info, long newspd) |
037ad48b | 454 | { |
f64c84a1 | 455 | unsigned int i; |
a8dea4ec JS |
456 | int quot = 0; |
457 | unsigned char cval; | |
458 | int ret = 0; | |
037ad48b | 459 | |
a8dea4ec JS |
460 | if (!info->tty || !info->tty->termios) |
461 | return ret; | |
037ad48b | 462 | |
a8dea4ec JS |
463 | if (!(info->ioaddr)) |
464 | return ret; | |
037ad48b | 465 | |
a8dea4ec JS |
466 | if (newspd > info->max_baud) |
467 | return 0; | |
037ad48b | 468 | |
a8dea4ec | 469 | info->realbaud = newspd; |
f64c84a1 JS |
470 | for (i = 0; i < BAUD_TABLE_NO; i++) |
471 | if (newspd == mxvar_baud_table[i]) | |
472 | break; | |
473 | if (i == BAUD_TABLE_NO) { | |
474 | quot = info->baud_base / info->speed; | |
475 | if (info->speed <= 0 || info->speed > info->max_baud) | |
476 | quot = 0; | |
a8dea4ec | 477 | } else { |
f64c84a1 JS |
478 | if (newspd == 134) { |
479 | quot = (2 * info->baud_base / 269); | |
480 | } else if (newspd) { | |
481 | quot = info->baud_base / newspd; | |
482 | if (quot == 0) | |
483 | quot = 1; | |
484 | } else { | |
485 | quot = 0; | |
486 | } | |
037ad48b JS |
487 | } |
488 | ||
a8dea4ec JS |
489 | info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base); |
490 | info->timeout += HZ / 50; /* Add .02 seconds of slop */ | |
037ad48b | 491 | |
a8dea4ec | 492 | if (quot) { |
a8dea4ec JS |
493 | info->MCR |= UART_MCR_DTR; |
494 | outb(info->MCR, info->ioaddr + UART_MCR); | |
a8dea4ec | 495 | } else { |
a8dea4ec JS |
496 | info->MCR &= ~UART_MCR_DTR; |
497 | outb(info->MCR, info->ioaddr + UART_MCR); | |
a8dea4ec | 498 | return ret; |
037ad48b | 499 | } |
037ad48b | 500 | |
a8dea4ec | 501 | cval = inb(info->ioaddr + UART_LCR); |
037ad48b | 502 | |
a8dea4ec | 503 | outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */ |
037ad48b | 504 | |
a8dea4ec JS |
505 | outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */ |
506 | outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */ | |
507 | outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */ | |
037ad48b | 508 | |
f64c84a1 JS |
509 | if (i == BAUD_TABLE_NO) { |
510 | quot = info->baud_base % info->speed; | |
511 | quot *= 8; | |
512 | if ((quot % info->speed) > (info->speed / 2)) { | |
513 | quot /= info->speed; | |
514 | quot++; | |
515 | } else { | |
516 | quot /= info->speed; | |
517 | } | |
518 | SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, quot); | |
519 | } else | |
520 | SET_MOXA_MUST_ENUM_VALUE(info->ioaddr, 0); | |
037ad48b | 521 | |
a8dea4ec JS |
522 | return ret; |
523 | } | |
037ad48b | 524 | |
a8dea4ec JS |
525 | /* |
526 | * This routine is called to set the UART divisor registers to match | |
527 | * the specified baud rate for a serial port. | |
528 | */ | |
529 | static int mxser_change_speed(struct mxser_port *info, | |
606d099c | 530 | struct ktermios *old_termios) |
a8dea4ec JS |
531 | { |
532 | unsigned cflag, cval, fcr; | |
533 | int ret = 0; | |
534 | unsigned char status; | |
535 | long baud; | |
037ad48b | 536 | |
a8dea4ec JS |
537 | if (!info->tty || !info->tty->termios) |
538 | return ret; | |
539 | cflag = info->tty->termios->c_cflag; | |
540 | if (!(info->ioaddr)) | |
541 | return ret; | |
037ad48b | 542 | |
a8dea4ec | 543 | if (mxser_set_baud_method[info->tty->index] == 0) { |
f64c84a1 JS |
544 | if ((cflag & CBAUD) == B_SPEC) |
545 | baud = info->speed; | |
546 | else | |
547 | baud = tty_get_baud_rate(info->tty); | |
a8dea4ec JS |
548 | mxser_set_baud(info, baud); |
549 | } | |
037ad48b | 550 | |
a8dea4ec JS |
551 | /* byte size and parity */ |
552 | switch (cflag & CSIZE) { | |
553 | case CS5: | |
554 | cval = 0x00; | |
555 | break; | |
556 | case CS6: | |
557 | cval = 0x01; | |
558 | break; | |
559 | case CS7: | |
560 | cval = 0x02; | |
561 | break; | |
562 | case CS8: | |
563 | cval = 0x03; | |
564 | break; | |
565 | default: | |
566 | cval = 0x00; | |
567 | break; /* too keep GCC shut... */ | |
568 | } | |
569 | if (cflag & CSTOPB) | |
570 | cval |= 0x04; | |
571 | if (cflag & PARENB) | |
572 | cval |= UART_LCR_PARITY; | |
573 | if (!(cflag & PARODD)) | |
574 | cval |= UART_LCR_EPAR; | |
575 | if (cflag & CMSPAR) | |
576 | cval |= UART_LCR_SPAR; | |
037ad48b | 577 | |
a8dea4ec JS |
578 | if ((info->type == PORT_8250) || (info->type == PORT_16450)) { |
579 | if (info->board->chip_flag) { | |
580 | fcr = UART_FCR_ENABLE_FIFO; | |
581 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
582 | SET_MOXA_MUST_FIFO_VALUE(info); | |
583 | } else | |
584 | fcr = 0; | |
585 | } else { | |
586 | fcr = UART_FCR_ENABLE_FIFO; | |
a8dea4ec JS |
587 | if (info->board->chip_flag) { |
588 | fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE; | |
589 | SET_MOXA_MUST_FIFO_VALUE(info); | |
590 | } else { | |
a8dea4ec JS |
591 | switch (info->rx_trigger) { |
592 | case 1: | |
593 | fcr |= UART_FCR_TRIGGER_1; | |
594 | break; | |
595 | case 4: | |
596 | fcr |= UART_FCR_TRIGGER_4; | |
597 | break; | |
598 | case 8: | |
599 | fcr |= UART_FCR_TRIGGER_8; | |
600 | break; | |
601 | default: | |
602 | fcr |= UART_FCR_TRIGGER_14; | |
603 | break; | |
604 | } | |
037ad48b | 605 | } |
037ad48b JS |
606 | } |
607 | ||
a8dea4ec JS |
608 | /* CTS flow control flag and modem status interrupts */ |
609 | info->IER &= ~UART_IER_MSI; | |
610 | info->MCR &= ~UART_MCR_AFE; | |
611 | if (cflag & CRTSCTS) { | |
612 | info->flags |= ASYNC_CTS_FLOW; | |
613 | info->IER |= UART_IER_MSI; | |
614 | if ((info->type == PORT_16550A) || (info->board->chip_flag)) { | |
615 | info->MCR |= UART_MCR_AFE; | |
a8dea4ec | 616 | } else { |
a8dea4ec | 617 | status = inb(info->ioaddr + UART_MSR); |
a8dea4ec JS |
618 | if (info->tty->hw_stopped) { |
619 | if (status & UART_MSR_CTS) { | |
620 | info->tty->hw_stopped = 0; | |
621 | if (info->type != PORT_16550A && | |
622 | !info->board->chip_flag) { | |
623 | outb(info->IER & ~UART_IER_THRI, | |
624 | info->ioaddr + | |
625 | UART_IER); | |
626 | info->IER |= UART_IER_THRI; | |
627 | outb(info->IER, info->ioaddr + | |
628 | UART_IER); | |
629 | } | |
47c85c0d JS |
630 | tty_wakeup(info->tty); |
631 | } | |
a8dea4ec JS |
632 | } else { |
633 | if (!(status & UART_MSR_CTS)) { | |
634 | info->tty->hw_stopped = 1; | |
635 | if ((info->type != PORT_16550A) && | |
636 | (!info->board->chip_flag)) { | |
637 | info->IER &= ~UART_IER_THRI; | |
638 | outb(info->IER, info->ioaddr + | |
639 | UART_IER); | |
640 | } | |
641 | } | |
642 | } | |
643 | } | |
644 | } else { | |
645 | info->flags &= ~ASYNC_CTS_FLOW; | |
646 | } | |
647 | outb(info->MCR, info->ioaddr + UART_MCR); | |
648 | if (cflag & CLOCAL) { | |
649 | info->flags &= ~ASYNC_CHECK_CD; | |
650 | } else { | |
651 | info->flags |= ASYNC_CHECK_CD; | |
652 | info->IER |= UART_IER_MSI; | |
653 | } | |
654 | outb(info->IER, info->ioaddr + UART_IER); | |
037ad48b | 655 | |
a8dea4ec JS |
656 | /* |
657 | * Set up parity check flag | |
658 | */ | |
659 | info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR; | |
660 | if (I_INPCK(info->tty)) | |
661 | info->read_status_mask |= UART_LSR_FE | UART_LSR_PE; | |
662 | if (I_BRKINT(info->tty) || I_PARMRK(info->tty)) | |
663 | info->read_status_mask |= UART_LSR_BI; | |
037ad48b | 664 | |
a8dea4ec | 665 | info->ignore_status_mask = 0; |
037ad48b | 666 | |
a8dea4ec JS |
667 | if (I_IGNBRK(info->tty)) { |
668 | info->ignore_status_mask |= UART_LSR_BI; | |
669 | info->read_status_mask |= UART_LSR_BI; | |
670 | /* | |
671 | * If we're ignore parity and break indicators, ignore | |
672 | * overruns too. (For real raw support). | |
673 | */ | |
674 | if (I_IGNPAR(info->tty)) { | |
675 | info->ignore_status_mask |= | |
676 | UART_LSR_OE | | |
677 | UART_LSR_PE | | |
678 | UART_LSR_FE; | |
679 | info->read_status_mask |= | |
680 | UART_LSR_OE | | |
681 | UART_LSR_PE | | |
682 | UART_LSR_FE; | |
037ad48b | 683 | } |
037ad48b | 684 | } |
a8dea4ec | 685 | if (info->board->chip_flag) { |
a8dea4ec JS |
686 | SET_MOXA_MUST_XON1_VALUE(info->ioaddr, START_CHAR(info->tty)); |
687 | SET_MOXA_MUST_XOFF1_VALUE(info->ioaddr, STOP_CHAR(info->tty)); | |
688 | if (I_IXON(info->tty)) { | |
689 | ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
690 | } else { | |
691 | DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
037ad48b | 692 | } |
a8dea4ec JS |
693 | if (I_IXOFF(info->tty)) { |
694 | ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
695 | } else { | |
696 | DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
037ad48b JS |
697 | } |
698 | } | |
037ad48b | 699 | |
037ad48b | 700 | |
a8dea4ec JS |
701 | outb(fcr, info->ioaddr + UART_FCR); /* set fcr */ |
702 | outb(cval, info->ioaddr + UART_LCR); | |
037ad48b | 703 | |
a8dea4ec | 704 | return ret; |
037ad48b JS |
705 | } |
706 | ||
a8dea4ec | 707 | static void mxser_check_modem_status(struct mxser_port *port, int status) |
037ad48b | 708 | { |
a8dea4ec JS |
709 | /* update input line counters */ |
710 | if (status & UART_MSR_TERI) | |
711 | port->icount.rng++; | |
712 | if (status & UART_MSR_DDSR) | |
713 | port->icount.dsr++; | |
714 | if (status & UART_MSR_DDCD) | |
715 | port->icount.dcd++; | |
716 | if (status & UART_MSR_DCTS) | |
717 | port->icount.cts++; | |
718 | port->mon_data.modem_status = status; | |
719 | wake_up_interruptible(&port->delta_msr_wait); | |
037ad48b | 720 | |
a8dea4ec JS |
721 | if ((port->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) { |
722 | if (status & UART_MSR_DCD) | |
723 | wake_up_interruptible(&port->open_wait); | |
a8dea4ec | 724 | } |
037ad48b | 725 | |
a8dea4ec JS |
726 | if (port->flags & ASYNC_CTS_FLOW) { |
727 | if (port->tty->hw_stopped) { | |
728 | if (status & UART_MSR_CTS) { | |
729 | port->tty->hw_stopped = 0; | |
730 | ||
731 | if ((port->type != PORT_16550A) && | |
732 | (!port->board->chip_flag)) { | |
733 | outb(port->IER & ~UART_IER_THRI, | |
734 | port->ioaddr + UART_IER); | |
735 | port->IER |= UART_IER_THRI; | |
736 | outb(port->IER, port->ioaddr + | |
737 | UART_IER); | |
738 | } | |
47c85c0d | 739 | tty_wakeup(port->tty); |
a8dea4ec JS |
740 | } |
741 | } else { | |
742 | if (!(status & UART_MSR_CTS)) { | |
743 | port->tty->hw_stopped = 1; | |
744 | if (port->type != PORT_16550A && | |
745 | !port->board->chip_flag) { | |
746 | port->IER &= ~UART_IER_THRI; | |
747 | outb(port->IER, port->ioaddr + | |
748 | UART_IER); | |
749 | } | |
750 | } | |
751 | } | |
752 | } | |
037ad48b JS |
753 | } |
754 | ||
a8dea4ec | 755 | static int mxser_startup(struct mxser_port *info) |
037ad48b | 756 | { |
a8dea4ec JS |
757 | unsigned long page; |
758 | unsigned long flags; | |
037ad48b | 759 | |
a8dea4ec JS |
760 | page = __get_free_page(GFP_KERNEL); |
761 | if (!page) | |
762 | return -ENOMEM; | |
037ad48b | 763 | |
a8dea4ec | 764 | spin_lock_irqsave(&info->slock, flags); |
037ad48b | 765 | |
a8dea4ec JS |
766 | if (info->flags & ASYNC_INITIALIZED) { |
767 | free_page(page); | |
768 | spin_unlock_irqrestore(&info->slock, flags); | |
769 | return 0; | |
770 | } | |
037ad48b | 771 | |
a8dea4ec JS |
772 | if (!info->ioaddr || !info->type) { |
773 | if (info->tty) | |
774 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
775 | free_page(page); | |
776 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 777 | return 0; |
a8dea4ec JS |
778 | } |
779 | if (info->xmit_buf) | |
780 | free_page(page); | |
781 | else | |
782 | info->xmit_buf = (unsigned char *) page; | |
037ad48b | 783 | |
037ad48b | 784 | /* |
a8dea4ec JS |
785 | * Clear the FIFO buffers and disable them |
786 | * (they will be reenabled in mxser_change_speed()) | |
037ad48b | 787 | */ |
a8dea4ec JS |
788 | if (info->board->chip_flag) |
789 | outb((UART_FCR_CLEAR_RCVR | | |
790 | UART_FCR_CLEAR_XMIT | | |
791 | MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR); | |
792 | else | |
793 | outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), | |
794 | info->ioaddr + UART_FCR); | |
795 | ||
796 | /* | |
797 | * At this point there's no way the LSR could still be 0xFF; | |
798 | * if it is, then bail out, because there's likely no UART | |
799 | * here. | |
800 | */ | |
801 | if (inb(info->ioaddr + UART_LSR) == 0xff) { | |
802 | spin_unlock_irqrestore(&info->slock, flags); | |
803 | if (capable(CAP_SYS_ADMIN)) { | |
804 | if (info->tty) | |
805 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
806 | return 0; | |
807 | } else | |
808 | return -ENODEV; | |
809 | } | |
810 | ||
811 | /* | |
812 | * Clear the interrupt registers. | |
813 | */ | |
814 | (void) inb(info->ioaddr + UART_LSR); | |
815 | (void) inb(info->ioaddr + UART_RX); | |
816 | (void) inb(info->ioaddr + UART_IIR); | |
817 | (void) inb(info->ioaddr + UART_MSR); | |
818 | ||
819 | /* | |
820 | * Now, initialize the UART | |
821 | */ | |
822 | outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */ | |
823 | info->MCR = UART_MCR_DTR | UART_MCR_RTS; | |
824 | outb(info->MCR, info->ioaddr + UART_MCR); | |
825 | ||
826 | /* | |
827 | * Finally, enable interrupts | |
828 | */ | |
829 | info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI; | |
a8dea4ec | 830 | |
a8dea4ec JS |
831 | if (info->board->chip_flag) |
832 | info->IER |= MOXA_MUST_IER_EGDAI; | |
a8dea4ec JS |
833 | outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */ |
834 | ||
835 | /* | |
836 | * And clear the interrupt registers again for luck. | |
837 | */ | |
838 | (void) inb(info->ioaddr + UART_LSR); | |
839 | (void) inb(info->ioaddr + UART_RX); | |
840 | (void) inb(info->ioaddr + UART_IIR); | |
841 | (void) inb(info->ioaddr + UART_MSR); | |
842 | ||
843 | if (info->tty) | |
844 | clear_bit(TTY_IO_ERROR, &info->tty->flags); | |
845 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
846 | ||
847 | /* | |
848 | * and set the speed of the serial port | |
849 | */ | |
a8dea4ec | 850 | mxser_change_speed(info, NULL); |
5ff7205d | 851 | info->flags |= ASYNC_INITIALIZED; |
f64c84a1 | 852 | spin_unlock_irqrestore(&info->slock, flags); |
a8dea4ec | 853 | |
a8dea4ec JS |
854 | return 0; |
855 | } | |
856 | ||
857 | /* | |
858 | * This routine will shutdown a serial port; interrupts maybe disabled, and | |
859 | * DTR is dropped if the hangup on close termio flag is on. | |
860 | */ | |
861 | static void mxser_shutdown(struct mxser_port *info) | |
862 | { | |
863 | unsigned long flags; | |
864 | ||
865 | if (!(info->flags & ASYNC_INITIALIZED)) | |
866 | return; | |
867 | ||
868 | spin_lock_irqsave(&info->slock, flags); | |
869 | ||
870 | /* | |
871 | * clear delta_msr_wait queue to avoid mem leaks: we may free the irq | |
872 | * here so the queue might never be waken up | |
873 | */ | |
874 | wake_up_interruptible(&info->delta_msr_wait); | |
875 | ||
876 | /* | |
877 | * Free the IRQ, if necessary | |
878 | */ | |
879 | if (info->xmit_buf) { | |
880 | free_page((unsigned long) info->xmit_buf); | |
881 | info->xmit_buf = NULL; | |
882 | } | |
883 | ||
884 | info->IER = 0; | |
885 | outb(0x00, info->ioaddr + UART_IER); | |
886 | ||
887 | if (!info->tty || (info->tty->termios->c_cflag & HUPCL)) | |
888 | info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS); | |
889 | outb(info->MCR, info->ioaddr + UART_MCR); | |
890 | ||
891 | /* clear Rx/Tx FIFO's */ | |
a8dea4ec JS |
892 | if (info->board->chip_flag) |
893 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT | | |
894 | MOXA_MUST_FCR_GDA_MODE_ENABLE, | |
895 | info->ioaddr + UART_FCR); | |
896 | else | |
a8dea4ec JS |
897 | outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT, |
898 | info->ioaddr + UART_FCR); | |
899 | ||
900 | /* read data port to reset things */ | |
901 | (void) inb(info->ioaddr + UART_RX); | |
902 | ||
903 | if (info->tty) | |
904 | set_bit(TTY_IO_ERROR, &info->tty->flags); | |
905 | ||
906 | info->flags &= ~ASYNC_INITIALIZED; | |
907 | ||
a8dea4ec JS |
908 | if (info->board->chip_flag) |
909 | SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
a8dea4ec JS |
910 | |
911 | spin_unlock_irqrestore(&info->slock, flags); | |
912 | } | |
913 | ||
914 | /* | |
915 | * This routine is called whenever a serial port is opened. It | |
916 | * enables interrupts for a serial port, linking in its async structure into | |
917 | * the IRQ chain. It also performs the serial-specific | |
918 | * initialization for the tty structure. | |
919 | */ | |
920 | static int mxser_open(struct tty_struct *tty, struct file *filp) | |
921 | { | |
922 | struct mxser_port *info; | |
5ff7205d | 923 | unsigned long flags; |
a8dea4ec JS |
924 | int retval, line; |
925 | ||
a8dea4ec JS |
926 | line = tty->index; |
927 | if (line == MXSER_PORTS) | |
928 | return 0; | |
929 | if (line < 0 || line > MXSER_PORTS) | |
930 | return -ENODEV; | |
931 | info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD]; | |
932 | if (!info->ioaddr) | |
933 | return -ENODEV; | |
934 | ||
935 | tty->driver_data = info; | |
936 | info->tty = tty; | |
937 | /* | |
938 | * Start up serial port | |
939 | */ | |
5ff7205d | 940 | spin_lock_irqsave(&info->slock, flags); |
a8dea4ec | 941 | info->count++; |
5ff7205d | 942 | spin_unlock_irqrestore(&info->slock, flags); |
a8dea4ec JS |
943 | retval = mxser_startup(info); |
944 | if (retval) | |
945 | return retval; | |
946 | ||
947 | retval = mxser_block_til_ready(tty, filp, info); | |
948 | if (retval) | |
949 | return retval; | |
950 | ||
e079f495 | 951 | /* unmark here for very high baud rate (ex. 921600 bps) used */ |
037ad48b JS |
952 | tty->low_latency = 1; |
953 | return 0; | |
954 | } | |
955 | ||
956 | /* | |
957 | * This routine is called when the serial port gets closed. First, we | |
958 | * wait for the last remaining data to be sent. Then, we unlink its | |
959 | * async structure from the interrupt chain if necessary, and we free | |
960 | * that IRQ if nothing is left in the chain. | |
961 | */ | |
962 | static void mxser_close(struct tty_struct *tty, struct file *filp) | |
963 | { | |
55b307da | 964 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
965 | |
966 | unsigned long timeout; | |
967 | unsigned long flags; | |
037ad48b JS |
968 | |
969 | if (tty->index == MXSER_PORTS) | |
970 | return; | |
971 | if (!info) | |
972 | return; | |
973 | ||
974 | spin_lock_irqsave(&info->slock, flags); | |
975 | ||
976 | if (tty_hung_up_p(filp)) { | |
977 | spin_unlock_irqrestore(&info->slock, flags); | |
978 | return; | |
979 | } | |
980 | if ((tty->count == 1) && (info->count != 1)) { | |
981 | /* | |
982 | * Uh, oh. tty->count is 1, which means that the tty | |
983 | * structure will be freed. Info->count should always | |
984 | * be one in these conditions. If it's greater than | |
985 | * one, we've got real problems, since it means the | |
986 | * serial port won't be shutdown. | |
987 | */ | |
988 | printk(KERN_ERR "mxser_close: bad serial port count; " | |
989 | "tty->count is 1, info->count is %d\n", info->count); | |
990 | info->count = 1; | |
991 | } | |
992 | if (--info->count < 0) { | |
993 | printk(KERN_ERR "mxser_close: bad serial port count for " | |
55b307da | 994 | "ttys%d: %d\n", tty->index, info->count); |
037ad48b JS |
995 | info->count = 0; |
996 | } | |
997 | if (info->count) { | |
998 | spin_unlock_irqrestore(&info->slock, flags); | |
999 | return; | |
1000 | } | |
1001 | info->flags |= ASYNC_CLOSING; | |
1002 | spin_unlock_irqrestore(&info->slock, flags); | |
1003 | /* | |
1004 | * Save the termios structure, since this port may have | |
1005 | * separate termios for callout and dialin. | |
1006 | */ | |
1007 | if (info->flags & ASYNC_NORMAL_ACTIVE) | |
1008 | info->normal_termios = *tty->termios; | |
1009 | /* | |
1010 | * Now we wait for the transmit buffer to clear; and we notify | |
1011 | * the line discipline to only process XON/XOFF characters. | |
1012 | */ | |
1013 | tty->closing = 1; | |
1014 | if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE) | |
1015 | tty_wait_until_sent(tty, info->closing_wait); | |
1016 | /* | |
1017 | * At this point we stop accepting input. To do this, we | |
1018 | * disable the receive line status interrupts, and tell the | |
1019 | * interrupt driver to stop checking the data ready bit in the | |
1020 | * line status register. | |
1021 | */ | |
1022 | info->IER &= ~UART_IER_RLSI; | |
55b307da | 1023 | if (info->board->chip_flag) |
037ad48b | 1024 | info->IER &= ~MOXA_MUST_RECV_ISR; |
e079f495 | 1025 | |
037ad48b | 1026 | if (info->flags & ASYNC_INITIALIZED) { |
55b307da | 1027 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1028 | /* |
1029 | * Before we drop DTR, make sure the UART transmitter | |
1030 | * has completely drained; this is especially | |
1031 | * important if there is a transmit FIFO! | |
1032 | */ | |
1033 | timeout = jiffies + HZ; | |
55b307da | 1034 | while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) { |
037ad48b JS |
1035 | schedule_timeout_interruptible(5); |
1036 | if (time_after(jiffies, timeout)) | |
1037 | break; | |
1038 | } | |
1039 | } | |
1040 | mxser_shutdown(info); | |
1041 | ||
1042 | if (tty->driver->flush_buffer) | |
1043 | tty->driver->flush_buffer(tty); | |
1044 | ||
7e8bcf9a | 1045 | tty_ldisc_flush(tty); |
037ad48b JS |
1046 | |
1047 | tty->closing = 0; | |
1048 | info->event = 0; | |
1049 | info->tty = NULL; | |
1050 | if (info->blocked_open) { | |
1051 | if (info->close_delay) | |
1052 | schedule_timeout_interruptible(info->close_delay); | |
1053 | wake_up_interruptible(&info->open_wait); | |
1054 | } | |
1055 | ||
1056 | info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING); | |
037ad48b JS |
1057 | } |
1058 | ||
1059 | static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count) | |
1060 | { | |
1061 | int c, total = 0; | |
55b307da | 1062 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1063 | unsigned long flags; |
1064 | ||
1065 | if (!info->xmit_buf) | |
1066 | return 0; | |
1067 | ||
1068 | while (1) { | |
1069 | c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1, | |
1070 | SERIAL_XMIT_SIZE - info->xmit_head)); | |
1071 | if (c <= 0) | |
1072 | break; | |
1073 | ||
1074 | memcpy(info->xmit_buf + info->xmit_head, buf, c); | |
1075 | spin_lock_irqsave(&info->slock, flags); | |
1076 | info->xmit_head = (info->xmit_head + c) & | |
1077 | (SERIAL_XMIT_SIZE - 1); | |
1078 | info->xmit_cnt += c; | |
1079 | spin_unlock_irqrestore(&info->slock, flags); | |
1080 | ||
1081 | buf += c; | |
1082 | count -= c; | |
1083 | total += c; | |
1084 | } | |
1085 | ||
e079f495 | 1086 | if (info->xmit_cnt && !tty->stopped) { |
037ad48b JS |
1087 | if (!tty->hw_stopped || |
1088 | (info->type == PORT_16550A) || | |
55b307da | 1089 | (info->board->chip_flag)) { |
037ad48b | 1090 | spin_lock_irqsave(&info->slock, flags); |
55b307da JS |
1091 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + |
1092 | UART_IER); | |
037ad48b | 1093 | info->IER |= UART_IER_THRI; |
55b307da | 1094 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1095 | spin_unlock_irqrestore(&info->slock, flags); |
1096 | } | |
1097 | } | |
1098 | return total; | |
1099 | } | |
1100 | ||
1101 | static void mxser_put_char(struct tty_struct *tty, unsigned char ch) | |
1102 | { | |
55b307da | 1103 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1104 | unsigned long flags; |
1105 | ||
1106 | if (!info->xmit_buf) | |
1107 | return; | |
1108 | ||
1109 | if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1) | |
1110 | return; | |
1111 | ||
1112 | spin_lock_irqsave(&info->slock, flags); | |
1113 | info->xmit_buf[info->xmit_head++] = ch; | |
1114 | info->xmit_head &= SERIAL_XMIT_SIZE - 1; | |
1115 | info->xmit_cnt++; | |
1116 | spin_unlock_irqrestore(&info->slock, flags); | |
e079f495 | 1117 | if (!tty->stopped) { |
037ad48b JS |
1118 | if (!tty->hw_stopped || |
1119 | (info->type == PORT_16550A) || | |
55b307da | 1120 | info->board->chip_flag) { |
037ad48b | 1121 | spin_lock_irqsave(&info->slock, flags); |
55b307da | 1122 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
037ad48b | 1123 | info->IER |= UART_IER_THRI; |
55b307da | 1124 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1125 | spin_unlock_irqrestore(&info->slock, flags); |
1126 | } | |
1127 | } | |
1128 | } | |
1129 | ||
1130 | ||
1131 | static void mxser_flush_chars(struct tty_struct *tty) | |
1132 | { | |
55b307da | 1133 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1134 | unsigned long flags; |
1135 | ||
1136 | if (info->xmit_cnt <= 0 || | |
1137 | tty->stopped || | |
1138 | !info->xmit_buf || | |
1139 | (tty->hw_stopped && | |
1140 | (info->type != PORT_16550A) && | |
55b307da | 1141 | (!info->board->chip_flag) |
037ad48b JS |
1142 | )) |
1143 | return; | |
1144 | ||
1145 | spin_lock_irqsave(&info->slock, flags); | |
1146 | ||
55b307da | 1147 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
037ad48b | 1148 | info->IER |= UART_IER_THRI; |
55b307da | 1149 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1150 | |
1151 | spin_unlock_irqrestore(&info->slock, flags); | |
1152 | } | |
1153 | ||
1154 | static int mxser_write_room(struct tty_struct *tty) | |
1155 | { | |
55b307da | 1156 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1157 | int ret; |
1158 | ||
1159 | ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1; | |
1160 | if (ret < 0) | |
1161 | ret = 0; | |
1162 | return ret; | |
1163 | } | |
1164 | ||
1165 | static int mxser_chars_in_buffer(struct tty_struct *tty) | |
1166 | { | |
55b307da | 1167 | struct mxser_port *info = tty->driver_data; |
925e9c1c | 1168 | return info->xmit_cnt; |
037ad48b JS |
1169 | } |
1170 | ||
1171 | static void mxser_flush_buffer(struct tty_struct *tty) | |
1172 | { | |
55b307da | 1173 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1174 | char fcr; |
1175 | unsigned long flags; | |
1176 | ||
1177 | ||
1178 | spin_lock_irqsave(&info->slock, flags); | |
1179 | info->xmit_cnt = info->xmit_head = info->xmit_tail = 0; | |
1180 | ||
55b307da | 1181 | fcr = inb(info->ioaddr + UART_FCR); |
037ad48b | 1182 | outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT), |
55b307da JS |
1183 | info->ioaddr + UART_FCR); |
1184 | outb(fcr, info->ioaddr + UART_FCR); | |
037ad48b JS |
1185 | |
1186 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 1187 | |
7e8bcf9a | 1188 | tty_wakeup(tty); |
037ad48b JS |
1189 | } |
1190 | ||
a8dea4ec JS |
1191 | /* |
1192 | * ------------------------------------------------------------ | |
1193 | * friends of mxser_ioctl() | |
1194 | * ------------------------------------------------------------ | |
1195 | */ | |
1196 | static int mxser_get_serial_info(struct mxser_port *info, | |
1197 | struct serial_struct __user *retinfo) | |
037ad48b | 1198 | { |
a8dea4ec | 1199 | struct serial_struct tmp; |
037ad48b | 1200 | |
a8dea4ec JS |
1201 | if (!retinfo) |
1202 | return -EFAULT; | |
1203 | memset(&tmp, 0, sizeof(tmp)); | |
1204 | tmp.type = info->type; | |
1205 | tmp.line = info->tty->index; | |
1206 | tmp.port = info->ioaddr; | |
1207 | tmp.irq = info->board->irq; | |
1208 | tmp.flags = info->flags; | |
1209 | tmp.baud_base = info->baud_base; | |
1210 | tmp.close_delay = info->close_delay; | |
1211 | tmp.closing_wait = info->closing_wait; | |
1212 | tmp.custom_divisor = info->custom_divisor; | |
1213 | tmp.hub6 = 0; | |
1214 | if (copy_to_user(retinfo, &tmp, sizeof(*retinfo))) | |
1215 | return -EFAULT; | |
1216 | return 0; | |
1217 | } | |
037ad48b | 1218 | |
a8dea4ec JS |
1219 | static int mxser_set_serial_info(struct mxser_port *info, |
1220 | struct serial_struct __user *new_info) | |
1221 | { | |
1222 | struct serial_struct new_serial; | |
f64c84a1 | 1223 | unsigned long sl_flags; |
a8dea4ec JS |
1224 | unsigned int flags; |
1225 | int retval = 0; | |
037ad48b | 1226 | |
a8dea4ec JS |
1227 | if (!new_info || !info->ioaddr) |
1228 | return -EFAULT; | |
1229 | if (copy_from_user(&new_serial, new_info, sizeof(new_serial))) | |
1230 | return -EFAULT; | |
037ad48b | 1231 | |
a8dea4ec JS |
1232 | if ((new_serial.irq != info->board->irq) || |
1233 | (new_serial.port != info->ioaddr) || | |
1234 | (new_serial.custom_divisor != info->custom_divisor) || | |
1235 | (new_serial.baud_base != info->baud_base)) | |
1236 | return -EPERM; | |
037ad48b | 1237 | |
a8dea4ec JS |
1238 | flags = info->flags & ASYNC_SPD_MASK; |
1239 | ||
1240 | if (!capable(CAP_SYS_ADMIN)) { | |
1241 | if ((new_serial.baud_base != info->baud_base) || | |
1242 | (new_serial.close_delay != info->close_delay) || | |
1243 | ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK))) | |
1244 | return -EPERM; | |
1245 | info->flags = ((info->flags & ~ASYNC_USR_MASK) | | |
1246 | (new_serial.flags & ASYNC_USR_MASK)); | |
1247 | } else { | |
037ad48b | 1248 | /* |
a8dea4ec JS |
1249 | * OK, past this point, all the error checking has been done. |
1250 | * At this point, we start making changes..... | |
037ad48b | 1251 | */ |
a8dea4ec JS |
1252 | info->flags = ((info->flags & ~ASYNC_FLAGS) | |
1253 | (new_serial.flags & ASYNC_FLAGS)); | |
1254 | info->close_delay = new_serial.close_delay * HZ / 100; | |
1255 | info->closing_wait = new_serial.closing_wait * HZ / 100; | |
1256 | info->tty->low_latency = | |
1257 | (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; | |
e079f495 | 1258 | info->tty->low_latency = 0; |
a8dea4ec | 1259 | } |
037ad48b | 1260 | |
a8dea4ec | 1261 | info->type = new_serial.type; |
037ad48b | 1262 | |
a8dea4ec JS |
1263 | process_txrx_fifo(info); |
1264 | ||
1265 | if (info->flags & ASYNC_INITIALIZED) { | |
f64c84a1 JS |
1266 | if (flags != (info->flags & ASYNC_SPD_MASK)) { |
1267 | spin_lock_irqsave(&info->slock, sl_flags); | |
a8dea4ec | 1268 | mxser_change_speed(info, NULL); |
f64c84a1 JS |
1269 | spin_unlock_irqrestore(&info->slock, sl_flags); |
1270 | } | |
a8dea4ec JS |
1271 | } else |
1272 | retval = mxser_startup(info); | |
1273 | ||
1274 | return retval; | |
1275 | } | |
037ad48b | 1276 | |
a8dea4ec JS |
1277 | /* |
1278 | * mxser_get_lsr_info - get line status register info | |
1279 | * | |
1280 | * Purpose: Let user call ioctl() to get info when the UART physically | |
1281 | * is emptied. On bus types like RS485, the transmitter must | |
1282 | * release the bus after transmitting. This must be done when | |
1283 | * the transmit shift register is empty, not be done when the | |
1284 | * transmit holding register is empty. This functionality | |
1285 | * allows an RS485 driver to be written in user space. | |
1286 | */ | |
1287 | static int mxser_get_lsr_info(struct mxser_port *info, | |
1288 | unsigned int __user *value) | |
1289 | { | |
1290 | unsigned char status; | |
1291 | unsigned int result; | |
1292 | unsigned long flags; | |
037ad48b | 1293 | |
a8dea4ec JS |
1294 | spin_lock_irqsave(&info->slock, flags); |
1295 | status = inb(info->ioaddr + UART_LSR); | |
1296 | spin_unlock_irqrestore(&info->slock, flags); | |
1297 | result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0); | |
1298 | return put_user(result, value); | |
1299 | } | |
037ad48b | 1300 | |
a8dea4ec JS |
1301 | /* |
1302 | * This routine sends a break character out the serial port. | |
1303 | */ | |
1304 | static void mxser_send_break(struct mxser_port *info, int duration) | |
1305 | { | |
1306 | unsigned long flags; | |
037ad48b | 1307 | |
a8dea4ec JS |
1308 | if (!info->ioaddr) |
1309 | return; | |
1310 | set_current_state(TASK_INTERRUPTIBLE); | |
1311 | spin_lock_irqsave(&info->slock, flags); | |
1312 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
1313 | info->ioaddr + UART_LCR); | |
1314 | spin_unlock_irqrestore(&info->slock, flags); | |
1315 | schedule_timeout(duration); | |
1316 | spin_lock_irqsave(&info->slock, flags); | |
1317 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
1318 | info->ioaddr + UART_LCR); | |
1319 | spin_unlock_irqrestore(&info->slock, flags); | |
1320 | } | |
037ad48b | 1321 | |
a8dea4ec JS |
1322 | static int mxser_tiocmget(struct tty_struct *tty, struct file *file) |
1323 | { | |
1324 | struct mxser_port *info = tty->driver_data; | |
1325 | unsigned char control, status; | |
1326 | unsigned long flags; | |
037ad48b | 1327 | |
037ad48b | 1328 | |
a8dea4ec JS |
1329 | if (tty->index == MXSER_PORTS) |
1330 | return -ENOIOCTLCMD; | |
214efebb | 1331 | if (test_bit(TTY_IO_ERROR, &tty->flags)) |
a8dea4ec | 1332 | return -EIO; |
037ad48b | 1333 | |
a8dea4ec | 1334 | control = info->MCR; |
037ad48b | 1335 | |
a8dea4ec JS |
1336 | spin_lock_irqsave(&info->slock, flags); |
1337 | status = inb(info->ioaddr + UART_MSR); | |
1338 | if (status & UART_MSR_ANY_DELTA) | |
1339 | mxser_check_modem_status(info, status); | |
1340 | spin_unlock_irqrestore(&info->slock, flags); | |
1341 | return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) | | |
1342 | ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) | | |
1343 | ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) | | |
1344 | ((status & UART_MSR_RI) ? TIOCM_RNG : 0) | | |
1345 | ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) | | |
1346 | ((status & UART_MSR_CTS) ? TIOCM_CTS : 0); | |
1347 | } | |
037ad48b | 1348 | |
a8dea4ec JS |
1349 | static int mxser_tiocmset(struct tty_struct *tty, struct file *file, |
1350 | unsigned int set, unsigned int clear) | |
1351 | { | |
1352 | struct mxser_port *info = tty->driver_data; | |
1353 | unsigned long flags; | |
037ad48b | 1354 | |
037ad48b | 1355 | |
a8dea4ec JS |
1356 | if (tty->index == MXSER_PORTS) |
1357 | return -ENOIOCTLCMD; | |
214efebb | 1358 | if (test_bit(TTY_IO_ERROR, &tty->flags)) |
a8dea4ec | 1359 | return -EIO; |
037ad48b | 1360 | |
a8dea4ec | 1361 | spin_lock_irqsave(&info->slock, flags); |
037ad48b | 1362 | |
a8dea4ec JS |
1363 | if (set & TIOCM_RTS) |
1364 | info->MCR |= UART_MCR_RTS; | |
1365 | if (set & TIOCM_DTR) | |
1366 | info->MCR |= UART_MCR_DTR; | |
037ad48b | 1367 | |
a8dea4ec JS |
1368 | if (clear & TIOCM_RTS) |
1369 | info->MCR &= ~UART_MCR_RTS; | |
1370 | if (clear & TIOCM_DTR) | |
1371 | info->MCR &= ~UART_MCR_DTR; | |
037ad48b | 1372 | |
a8dea4ec JS |
1373 | outb(info->MCR, info->ioaddr + UART_MCR); |
1374 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b JS |
1375 | return 0; |
1376 | } | |
1377 | ||
c76b0930 | 1378 | static int __init mxser_program_mode(int port) |
037ad48b | 1379 | { |
a8dea4ec | 1380 | int id, i, j, n; |
037ad48b | 1381 | |
a8dea4ec JS |
1382 | outb(0, port); |
1383 | outb(0, port); | |
1384 | outb(0, port); | |
1385 | (void)inb(port); | |
1386 | (void)inb(port); | |
1387 | outb(0, port); | |
1388 | (void)inb(port); | |
037ad48b | 1389 | |
a8dea4ec JS |
1390 | id = inb(port + 1) & 0x1F; |
1391 | if ((id != C168_ASIC_ID) && | |
1392 | (id != C104_ASIC_ID) && | |
1393 | (id != C102_ASIC_ID) && | |
1394 | (id != CI132_ASIC_ID) && | |
1395 | (id != CI134_ASIC_ID) && | |
1396 | (id != CI104J_ASIC_ID)) | |
1397 | return -1; | |
1398 | for (i = 0, j = 0; i < 4; i++) { | |
1399 | n = inb(port + 2); | |
1400 | if (n == 'M') { | |
1401 | j = 1; | |
1402 | } else if ((j == 1) && (n == 1)) { | |
1403 | j = 2; | |
1404 | break; | |
1405 | } else | |
1406 | j = 0; | |
1407 | } | |
1408 | if (j != 2) | |
1409 | id = -2; | |
1410 | return id; | |
1411 | } | |
1412 | ||
c76b0930 | 1413 | static void __init mxser_normal_mode(int port) |
a8dea4ec JS |
1414 | { |
1415 | int i, n; | |
1416 | ||
1417 | outb(0xA5, port + 1); | |
1418 | outb(0x80, port + 3); | |
1419 | outb(12, port + 0); /* 9600 bps */ | |
1420 | outb(0, port + 1); | |
1421 | outb(0x03, port + 3); /* 8 data bits */ | |
1422 | outb(0x13, port + 4); /* loop back mode */ | |
1423 | for (i = 0; i < 16; i++) { | |
1424 | n = inb(port + 5); | |
1425 | if ((n & 0x61) == 0x60) | |
1426 | break; | |
1427 | if ((n & 1) == 1) | |
1428 | (void)inb(port); | |
1429 | } | |
1430 | outb(0x00, port + 4); | |
1431 | } | |
1432 | ||
1433 | #define CHIP_SK 0x01 /* Serial Data Clock in Eprom */ | |
1434 | #define CHIP_DO 0x02 /* Serial Data Output in Eprom */ | |
1435 | #define CHIP_CS 0x04 /* Serial Chip Select in Eprom */ | |
1436 | #define CHIP_DI 0x08 /* Serial Data Input in Eprom */ | |
1437 | #define EN_CCMD 0x000 /* Chip's command register */ | |
1438 | #define EN0_RSARLO 0x008 /* Remote start address reg 0 */ | |
1439 | #define EN0_RSARHI 0x009 /* Remote start address reg 1 */ | |
1440 | #define EN0_RCNTLO 0x00A /* Remote byte count reg WR */ | |
1441 | #define EN0_RCNTHI 0x00B /* Remote byte count reg WR */ | |
1442 | #define EN0_DCFG 0x00E /* Data configuration reg WR */ | |
1443 | #define EN0_PORT 0x010 /* Rcv missed frame error counter RD */ | |
1444 | #define ENC_PAGE0 0x000 /* Select page 0 of chip registers */ | |
1445 | #define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */ | |
c76b0930 | 1446 | static int __init mxser_read_register(int port, unsigned short *regs) |
a8dea4ec JS |
1447 | { |
1448 | int i, k, value, id; | |
1449 | unsigned int j; | |
1450 | ||
1451 | id = mxser_program_mode(port); | |
1452 | if (id < 0) | |
1453 | return id; | |
1454 | for (i = 0; i < 14; i++) { | |
1455 | k = (i & 0x3F) | 0x180; | |
1456 | for (j = 0x100; j > 0; j >>= 1) { | |
1457 | outb(CHIP_CS, port); | |
1458 | if (k & j) { | |
1459 | outb(CHIP_CS | CHIP_DO, port); | |
1460 | outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */ | |
1461 | } else { | |
1462 | outb(CHIP_CS, port); | |
1463 | outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */ | |
1464 | } | |
1465 | } | |
1466 | (void)inb(port); | |
1467 | value = 0; | |
1468 | for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) { | |
1469 | outb(CHIP_CS, port); | |
1470 | outb(CHIP_CS | CHIP_SK, port); | |
1471 | if (inb(port) & CHIP_DI) | |
1472 | value |= j; | |
1473 | } | |
1474 | regs[i] = value; | |
1475 | outb(0, port); | |
1476 | } | |
1477 | mxser_normal_mode(port); | |
1478 | return id; | |
1479 | } | |
1480 | ||
a8dea4ec JS |
1481 | static int mxser_ioctl_special(unsigned int cmd, void __user *argp) |
1482 | { | |
1483 | struct mxser_port *port; | |
1484 | int result, status; | |
1485 | unsigned int i, j; | |
1486 | ||
1487 | switch (cmd) { | |
1488 | case MOXA_GET_CONF: | |
1489 | /* if (copy_to_user(argp, mxsercfg, | |
1490 | sizeof(struct mxser_hwconf) * 4)) | |
1491 | return -EFAULT; | |
1492 | return 0;*/ | |
1493 | return -ENXIO; | |
1494 | case MOXA_GET_MAJOR: | |
1495 | if (copy_to_user(argp, &ttymajor, sizeof(int))) | |
1496 | return -EFAULT; | |
1497 | return 0; | |
1498 | ||
1499 | case MOXA_GET_CUMAJOR: | |
1500 | if (copy_to_user(argp, &calloutmajor, sizeof(int))) | |
037ad48b JS |
1501 | return -EFAULT; |
1502 | return 0; | |
1503 | ||
1504 | case MOXA_CHKPORTENABLE: | |
1505 | result = 0; | |
55b307da JS |
1506 | |
1507 | for (i = 0; i < MXSER_BOARDS; i++) | |
1508 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) | |
1509 | if (mxser_boards[i].ports[j].ioaddr) | |
1510 | result |= (1 << i); | |
1511 | ||
037ad48b JS |
1512 | return put_user(result, (unsigned long __user *)argp); |
1513 | case MOXA_GETDATACOUNT: | |
1514 | if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log))) | |
1515 | return -EFAULT; | |
1516 | return 0; | |
1517 | case MOXA_GETMSTATUS: | |
55b307da JS |
1518 | for (i = 0; i < MXSER_BOARDS; i++) |
1519 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1520 | port = &mxser_boards[i].ports[j]; | |
1521 | ||
1522 | GMStatus[i].ri = 0; | |
1523 | if (!port->ioaddr) { | |
1524 | GMStatus[i].dcd = 0; | |
1525 | GMStatus[i].dsr = 0; | |
1526 | GMStatus[i].cts = 0; | |
1527 | continue; | |
1528 | } | |
037ad48b | 1529 | |
55b307da JS |
1530 | if (!port->tty || !port->tty->termios) |
1531 | GMStatus[i].cflag = | |
1532 | port->normal_termios.c_cflag; | |
1533 | else | |
1534 | GMStatus[i].cflag = | |
1535 | port->tty->termios->c_cflag; | |
037ad48b | 1536 | |
55b307da JS |
1537 | status = inb(port->ioaddr + UART_MSR); |
1538 | if (status & 0x80 /*UART_MSR_DCD */ ) | |
1539 | GMStatus[i].dcd = 1; | |
1540 | else | |
1541 | GMStatus[i].dcd = 0; | |
037ad48b | 1542 | |
55b307da JS |
1543 | if (status & 0x20 /*UART_MSR_DSR */ ) |
1544 | GMStatus[i].dsr = 1; | |
1545 | else | |
1546 | GMStatus[i].dsr = 0; | |
037ad48b JS |
1547 | |
1548 | ||
55b307da JS |
1549 | if (status & 0x10 /*UART_MSR_CTS */ ) |
1550 | GMStatus[i].cts = 1; | |
1551 | else | |
1552 | GMStatus[i].cts = 0; | |
1553 | } | |
037ad48b JS |
1554 | if (copy_to_user(argp, GMStatus, |
1555 | sizeof(struct mxser_mstatus) * MXSER_PORTS)) | |
1556 | return -EFAULT; | |
1557 | return 0; | |
1558 | case MOXA_ASPP_MON_EXT: { | |
2b770b4b | 1559 | int p, shiftbit; |
55b307da JS |
1560 | unsigned long opmode; |
1561 | unsigned cflag, iflag; | |
037ad48b | 1562 | |
55b307da JS |
1563 | for (i = 0; i < MXSER_BOARDS; i++) |
1564 | for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) { | |
1565 | port = &mxser_boards[i].ports[j]; | |
1566 | if (!port->ioaddr) | |
037ad48b JS |
1567 | continue; |
1568 | ||
55b307da | 1569 | status = mxser_get_msr(port->ioaddr, 0, i); |
55b307da | 1570 | |
037ad48b | 1571 | if (status & UART_MSR_TERI) |
55b307da | 1572 | port->icount.rng++; |
037ad48b | 1573 | if (status & UART_MSR_DDSR) |
55b307da | 1574 | port->icount.dsr++; |
037ad48b | 1575 | if (status & UART_MSR_DDCD) |
55b307da | 1576 | port->icount.dcd++; |
037ad48b | 1577 | if (status & UART_MSR_DCTS) |
55b307da JS |
1578 | port->icount.cts++; |
1579 | ||
1580 | port->mon_data.modem_status = status; | |
1581 | mon_data_ext.rx_cnt[i] = port->mon_data.rxcnt; | |
1582 | mon_data_ext.tx_cnt[i] = port->mon_data.txcnt; | |
1583 | mon_data_ext.up_rxcnt[i] = | |
1584 | port->mon_data.up_rxcnt; | |
1585 | mon_data_ext.up_txcnt[i] = | |
1586 | port->mon_data.up_txcnt; | |
1587 | mon_data_ext.modem_status[i] = | |
1588 | port->mon_data.modem_status; | |
1589 | mon_data_ext.baudrate[i] = port->realbaud; | |
1590 | ||
1591 | if (!port->tty || !port->tty->termios) { | |
1592 | cflag = port->normal_termios.c_cflag; | |
1593 | iflag = port->normal_termios.c_iflag; | |
037ad48b | 1594 | } else { |
55b307da JS |
1595 | cflag = port->tty->termios->c_cflag; |
1596 | iflag = port->tty->termios->c_iflag; | |
037ad48b JS |
1597 | } |
1598 | ||
1599 | mon_data_ext.databits[i] = cflag & CSIZE; | |
1600 | ||
1601 | mon_data_ext.stopbits[i] = cflag & CSTOPB; | |
1602 | ||
55b307da JS |
1603 | mon_data_ext.parity[i] = |
1604 | cflag & (PARENB | PARODD | CMSPAR); | |
037ad48b JS |
1605 | |
1606 | mon_data_ext.flowctrl[i] = 0x00; | |
1607 | ||
1608 | if (cflag & CRTSCTS) | |
1609 | mon_data_ext.flowctrl[i] |= 0x03; | |
1610 | ||
1611 | if (iflag & (IXON | IXOFF)) | |
1612 | mon_data_ext.flowctrl[i] |= 0x0C; | |
1613 | ||
55b307da | 1614 | if (port->type == PORT_16550A) |
037ad48b JS |
1615 | mon_data_ext.fifo[i] = 1; |
1616 | else | |
1617 | mon_data_ext.fifo[i] = 0; | |
1618 | ||
1619 | p = i % 4; | |
1620 | shiftbit = p * 2; | |
55b307da | 1621 | opmode = inb(port->opmode_ioaddr) >> shiftbit; |
037ad48b JS |
1622 | opmode &= OP_MODE_MASK; |
1623 | ||
1624 | mon_data_ext.iftype[i] = opmode; | |
1625 | ||
1626 | } | |
55b307da JS |
1627 | if (copy_to_user(argp, &mon_data_ext, |
1628 | sizeof(mon_data_ext))) | |
037ad48b JS |
1629 | return -EFAULT; |
1630 | ||
1631 | return 0; | |
1632 | ||
55b307da | 1633 | } default: |
037ad48b JS |
1634 | return -ENOIOCTLCMD; |
1635 | } | |
1636 | return 0; | |
1637 | } | |
1638 | ||
a8dea4ec JS |
1639 | static int mxser_ioctl(struct tty_struct *tty, struct file *file, |
1640 | unsigned int cmd, unsigned long arg) | |
037ad48b | 1641 | { |
55b307da | 1642 | struct mxser_port *info = tty->driver_data; |
a8dea4ec JS |
1643 | struct async_icount cprev, cnow; /* kernel counter temps */ |
1644 | struct serial_icounter_struct __user *p_cuser; | |
1645 | unsigned long templ; | |
1646 | unsigned long flags; | |
f64c84a1 | 1647 | unsigned int i; |
a8dea4ec JS |
1648 | void __user *argp = (void __user *)arg; |
1649 | int retval; | |
037ad48b | 1650 | |
a8dea4ec JS |
1651 | if (tty->index == MXSER_PORTS) |
1652 | return mxser_ioctl_special(cmd, argp); | |
1653 | ||
a8dea4ec JS |
1654 | if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) { |
1655 | int p; | |
1656 | unsigned long opmode; | |
1657 | static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f }; | |
1658 | int shiftbit; | |
1659 | unsigned char val, mask; | |
1660 | ||
1661 | p = tty->index % 4; | |
1662 | if (cmd == MOXA_SET_OP_MODE) { | |
1663 | if (get_user(opmode, (int __user *) argp)) | |
1664 | return -EFAULT; | |
1665 | if (opmode != RS232_MODE && | |
1666 | opmode != RS485_2WIRE_MODE && | |
1667 | opmode != RS422_MODE && | |
1668 | opmode != RS485_4WIRE_MODE) | |
1669 | return -EFAULT; | |
1670 | mask = ModeMask[p]; | |
1671 | shiftbit = p * 2; | |
1672 | val = inb(info->opmode_ioaddr); | |
1673 | val &= mask; | |
1674 | val |= (opmode << shiftbit); | |
1675 | outb(val, info->opmode_ioaddr); | |
1676 | } else { | |
1677 | shiftbit = p * 2; | |
1678 | opmode = inb(info->opmode_ioaddr) >> shiftbit; | |
1679 | opmode &= OP_MODE_MASK; | |
1680 | if (copy_to_user(argp, &opmode, sizeof(int))) | |
1681 | return -EFAULT; | |
3306ce3d | 1682 | } |
a8dea4ec | 1683 | return 0; |
037ad48b JS |
1684 | } |
1685 | ||
f64c84a1 JS |
1686 | if (cmd == MOXA_SET_SPECIAL_BAUD_RATE) { |
1687 | int speed; | |
1688 | ||
1689 | if (get_user(speed, (int __user *)argp)) | |
1690 | return -EFAULT; | |
1691 | if (speed <= 0 || speed > info->max_baud) | |
1692 | return -EFAULT; | |
1693 | if (!info->tty || !info->tty->termios || !info->ioaddr) | |
1694 | return 0; | |
1695 | info->tty->termios->c_cflag &= ~(CBAUD | CBAUDEX); | |
1696 | for (i = 0; i < BAUD_TABLE_NO; i++) | |
1697 | if (speed == mxvar_baud_table[i]) | |
1698 | break; | |
1699 | if (i == BAUD_TABLE_NO) { | |
1700 | info->tty->termios->c_cflag |= B_SPEC; | |
1701 | } else if (speed != 0) | |
1702 | info->tty->termios->c_cflag |= mxvar_baud_table1[i]; | |
1703 | ||
1704 | info->speed = speed; | |
1705 | spin_lock_irqsave(&info->slock, flags); | |
a136e99f | 1706 | mxser_change_speed(info, NULL); |
f64c84a1 JS |
1707 | spin_unlock_irqrestore(&info->slock, flags); |
1708 | ||
1709 | return 0; | |
1710 | } else if (cmd == MOXA_GET_SPECIAL_BAUD_RATE) { | |
1711 | if (copy_to_user(argp, &info->speed, sizeof(int))) | |
1712 | return -EFAULT; | |
1713 | return 0; | |
1714 | } | |
1715 | ||
214efebb JS |
1716 | if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT && |
1717 | test_bit(TTY_IO_ERROR, &tty->flags)) | |
1718 | return -EIO; | |
1719 | ||
a8dea4ec JS |
1720 | switch (cmd) { |
1721 | case TCSBRK: /* SVID version: non-zero arg --> no break */ | |
1722 | retval = tty_check_change(tty); | |
1723 | if (retval) | |
1724 | return retval; | |
1725 | tty_wait_until_sent(tty, 0); | |
1726 | if (!arg) | |
1727 | mxser_send_break(info, HZ / 4); /* 1/4 second */ | |
1728 | return 0; | |
1729 | case TCSBRKP: /* support for POSIX tcsendbreak() */ | |
1730 | retval = tty_check_change(tty); | |
1731 | if (retval) | |
1732 | return retval; | |
1733 | tty_wait_until_sent(tty, 0); | |
1734 | mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4); | |
1735 | return 0; | |
1736 | case TIOCGSOFTCAR: | |
1737 | return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp); | |
1738 | case TIOCSSOFTCAR: | |
1739 | if (get_user(templ, (unsigned long __user *) argp)) | |
1740 | return -EFAULT; | |
1741 | arg = templ; | |
1742 | tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0)); | |
1743 | return 0; | |
1744 | case TIOCGSERIAL: | |
1745 | return mxser_get_serial_info(info, argp); | |
1746 | case TIOCSSERIAL: | |
1747 | return mxser_set_serial_info(info, argp); | |
1748 | case TIOCSERGETLSR: /* Get line status register */ | |
1749 | return mxser_get_lsr_info(info, argp); | |
1750 | /* | |
1751 | * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change | |
1752 | * - mask passed in arg for lines of interest | |
1753 | * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking) | |
1754 | * Caller should use TIOCGICOUNT to see which one it was | |
1755 | */ | |
b446a4a5 | 1756 | case TIOCMIWAIT: |
a8dea4ec | 1757 | spin_lock_irqsave(&info->slock, flags); |
b446a4a5 | 1758 | cnow = info->icount; /* note the counters on entry */ |
a8dea4ec | 1759 | spin_unlock_irqrestore(&info->slock, flags); |
037ad48b | 1760 | |
b446a4a5 JS |
1761 | wait_event_interruptible(info->delta_msr_wait, ({ |
1762 | cprev = cnow; | |
a8dea4ec JS |
1763 | spin_lock_irqsave(&info->slock, flags); |
1764 | cnow = info->icount; /* atomic copy */ | |
1765 | spin_unlock_irqrestore(&info->slock, flags); | |
037ad48b | 1766 | |
b446a4a5 JS |
1767 | ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) || |
1768 | ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) || | |
1769 | ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) || | |
1770 | ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts)); | |
1771 | })); | |
a8dea4ec | 1772 | break; |
a8dea4ec JS |
1773 | /* |
1774 | * Get counter of input serial line interrupts (DCD,RI,DSR,CTS) | |
1775 | * Return: write counters to the user passed counter struct | |
1776 | * NB: both 1->0 and 0->1 transitions are counted except for | |
1777 | * RI where only 0->1 is counted. | |
1778 | */ | |
1779 | case TIOCGICOUNT: | |
1780 | spin_lock_irqsave(&info->slock, flags); | |
1781 | cnow = info->icount; | |
1782 | spin_unlock_irqrestore(&info->slock, flags); | |
1783 | p_cuser = argp; | |
a8dea4ec JS |
1784 | if (put_user(cnow.frame, &p_cuser->frame)) |
1785 | return -EFAULT; | |
1786 | if (put_user(cnow.brk, &p_cuser->brk)) | |
1787 | return -EFAULT; | |
1788 | if (put_user(cnow.overrun, &p_cuser->overrun)) | |
1789 | return -EFAULT; | |
1790 | if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun)) | |
1791 | return -EFAULT; | |
1792 | if (put_user(cnow.parity, &p_cuser->parity)) | |
1793 | return -EFAULT; | |
1794 | if (put_user(cnow.rx, &p_cuser->rx)) | |
1795 | return -EFAULT; | |
1796 | if (put_user(cnow.tx, &p_cuser->tx)) | |
1797 | return -EFAULT; | |
1798 | put_user(cnow.cts, &p_cuser->cts); | |
1799 | put_user(cnow.dsr, &p_cuser->dsr); | |
1800 | put_user(cnow.rng, &p_cuser->rng); | |
1801 | put_user(cnow.dcd, &p_cuser->dcd); | |
1802 | return 0; | |
1803 | case MOXA_HighSpeedOn: | |
1804 | return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp); | |
1805 | case MOXA_SDS_RSTICOUNTER: | |
1806 | info->mon_data.rxcnt = 0; | |
1807 | info->mon_data.txcnt = 0; | |
1808 | return 0; | |
a8dea4ec JS |
1809 | case MOXA_ASPP_SETBAUD:{ |
1810 | long baud; | |
1811 | if (get_user(baud, (long __user *)argp)) | |
1812 | return -EFAULT; | |
f64c84a1 | 1813 | spin_lock_irqsave(&info->slock, flags); |
a8dea4ec | 1814 | mxser_set_baud(info, baud); |
f64c84a1 | 1815 | spin_unlock_irqrestore(&info->slock, flags); |
a8dea4ec JS |
1816 | return 0; |
1817 | } | |
1818 | case MOXA_ASPP_GETBAUD: | |
1819 | if (copy_to_user(argp, &info->realbaud, sizeof(long))) | |
1820 | return -EFAULT; | |
037ad48b | 1821 | |
a8dea4ec | 1822 | return 0; |
037ad48b | 1823 | |
a8dea4ec JS |
1824 | case MOXA_ASPP_OQUEUE:{ |
1825 | int len, lsr; | |
037ad48b | 1826 | |
a8dea4ec JS |
1827 | len = mxser_chars_in_buffer(tty); |
1828 | ||
1829 | lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT; | |
1830 | ||
1831 | len += (lsr ? 0 : 1); | |
1832 | ||
1833 | if (copy_to_user(argp, &len, sizeof(int))) | |
1834 | return -EFAULT; | |
1835 | ||
1836 | return 0; | |
037ad48b | 1837 | } |
a8dea4ec JS |
1838 | case MOXA_ASPP_MON: { |
1839 | int mcr, status; | |
037ad48b | 1840 | |
a8dea4ec JS |
1841 | status = mxser_get_msr(info->ioaddr, 1, tty->index); |
1842 | mxser_check_modem_status(info, status); | |
1843 | ||
1844 | mcr = inb(info->ioaddr + UART_MCR); | |
1845 | if (mcr & MOXA_MUST_MCR_XON_FLAG) | |
1846 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD; | |
1847 | else | |
1848 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD; | |
1849 | ||
1850 | if (mcr & MOXA_MUST_MCR_TX_XON) | |
1851 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT; | |
1852 | else | |
1853 | info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT; | |
1854 | ||
1855 | if (info->tty->hw_stopped) | |
1856 | info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD; | |
1857 | else | |
1858 | info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD; | |
1859 | ||
1860 | if (copy_to_user(argp, &info->mon_data, | |
1861 | sizeof(struct mxser_mon))) | |
1862 | return -EFAULT; | |
1863 | ||
1864 | return 0; | |
1865 | } | |
1866 | case MOXA_ASPP_LSTATUS: { | |
1867 | if (copy_to_user(argp, &info->err_shadow, | |
1868 | sizeof(unsigned char))) | |
1869 | return -EFAULT; | |
1870 | ||
1871 | info->err_shadow = 0; | |
1872 | return 0; | |
1873 | } | |
1874 | case MOXA_SET_BAUD_METHOD: { | |
1875 | int method; | |
1876 | ||
1877 | if (get_user(method, (int __user *)argp)) | |
1878 | return -EFAULT; | |
1879 | mxser_set_baud_method[tty->index] = method; | |
1880 | if (copy_to_user(argp, &method, sizeof(int))) | |
1881 | return -EFAULT; | |
1882 | ||
1883 | return 0; | |
1884 | } | |
1885 | default: | |
1886 | return -ENOIOCTLCMD; | |
1887 | } | |
1888 | return 0; | |
1889 | } | |
1890 | ||
1891 | static void mxser_stoprx(struct tty_struct *tty) | |
1892 | { | |
1893 | struct mxser_port *info = tty->driver_data; | |
037ad48b | 1894 | |
a8dea4ec JS |
1895 | info->ldisc_stop_rx = 1; |
1896 | if (I_IXOFF(tty)) { | |
55b307da | 1897 | if (info->board->chip_flag) { |
a8dea4ec JS |
1898 | info->IER &= ~MOXA_MUST_RECV_ISR; |
1899 | outb(info->IER, info->ioaddr + UART_IER); | |
925e9c1c | 1900 | } else { |
a8dea4ec JS |
1901 | info->x_char = STOP_CHAR(tty); |
1902 | outb(0, info->ioaddr + UART_IER); | |
1903 | info->IER |= UART_IER_THRI; | |
1904 | outb(info->IER, info->ioaddr + UART_IER); | |
037ad48b | 1905 | } |
a8dea4ec | 1906 | } |
037ad48b | 1907 | |
a8dea4ec JS |
1908 | if (info->tty->termios->c_cflag & CRTSCTS) { |
1909 | info->MCR &= ~UART_MCR_RTS; | |
1910 | outb(info->MCR, info->ioaddr + UART_MCR); | |
1911 | } | |
1912 | } | |
1913 | ||
1914 | /* | |
1915 | * This routine is called by the upper-layer tty layer to signal that | |
1916 | * incoming characters should be throttled. | |
1917 | */ | |
1918 | static void mxser_throttle(struct tty_struct *tty) | |
1919 | { | |
1920 | mxser_stoprx(tty); | |
1921 | } | |
1922 | ||
1923 | static void mxser_unthrottle(struct tty_struct *tty) | |
1924 | { | |
1925 | struct mxser_port *info = tty->driver_data; | |
1926 | ||
1927 | /* startrx */ | |
1928 | info->ldisc_stop_rx = 0; | |
1929 | if (I_IXOFF(tty)) { | |
1930 | if (info->x_char) | |
1931 | info->x_char = 0; | |
1932 | else { | |
a8dea4ec JS |
1933 | if (info->board->chip_flag) { |
1934 | info->IER |= MOXA_MUST_RECV_ISR; | |
1935 | outb(info->IER, info->ioaddr + UART_IER); | |
925e9c1c | 1936 | } else { |
a8dea4ec JS |
1937 | info->x_char = START_CHAR(tty); |
1938 | outb(0, info->ioaddr + UART_IER); | |
1939 | info->IER |= UART_IER_THRI; | |
1940 | outb(info->IER, info->ioaddr + UART_IER); | |
1941 | } | |
1942 | } | |
1943 | } | |
1944 | ||
1945 | if (info->tty->termios->c_cflag & CRTSCTS) { | |
1946 | info->MCR |= UART_MCR_RTS; | |
1947 | outb(info->MCR, info->ioaddr + UART_MCR); | |
037ad48b JS |
1948 | } |
1949 | } | |
1950 | ||
1951 | /* | |
1952 | * mxser_stop() and mxser_start() | |
1953 | * | |
1954 | * This routines are called before setting or resetting tty->stopped. | |
1955 | * They enable or disable transmitter interrupts, as necessary. | |
1956 | */ | |
1957 | static void mxser_stop(struct tty_struct *tty) | |
1958 | { | |
55b307da | 1959 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1960 | unsigned long flags; |
1961 | ||
1962 | spin_lock_irqsave(&info->slock, flags); | |
1963 | if (info->IER & UART_IER_THRI) { | |
1964 | info->IER &= ~UART_IER_THRI; | |
55b307da | 1965 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1966 | } |
1967 | spin_unlock_irqrestore(&info->slock, flags); | |
1968 | } | |
1969 | ||
1970 | static void mxser_start(struct tty_struct *tty) | |
1971 | { | |
55b307da | 1972 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
1973 | unsigned long flags; |
1974 | ||
1975 | spin_lock_irqsave(&info->slock, flags); | |
e079f495 | 1976 | if (info->xmit_cnt && info->xmit_buf) { |
55b307da | 1977 | outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER); |
037ad48b | 1978 | info->IER |= UART_IER_THRI; |
55b307da | 1979 | outb(info->IER, info->ioaddr + UART_IER); |
037ad48b JS |
1980 | } |
1981 | spin_unlock_irqrestore(&info->slock, flags); | |
1982 | } | |
1983 | ||
606d099c | 1984 | static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios) |
a8dea4ec JS |
1985 | { |
1986 | struct mxser_port *info = tty->driver_data; | |
1987 | unsigned long flags; | |
1988 | ||
7e7d136e AC |
1989 | spin_lock_irqsave(&info->slock, flags); |
1990 | mxser_change_speed(info, old_termios); | |
1991 | spin_unlock_irqrestore(&info->slock, flags); | |
a8dea4ec | 1992 | |
7e7d136e AC |
1993 | if ((old_termios->c_cflag & CRTSCTS) && |
1994 | !(tty->termios->c_cflag & CRTSCTS)) { | |
1995 | tty->hw_stopped = 0; | |
1996 | mxser_start(tty); | |
a8dea4ec JS |
1997 | } |
1998 | ||
e079f495 | 1999 | /* Handle sw stopped */ |
a8dea4ec JS |
2000 | if ((old_termios->c_iflag & IXON) && |
2001 | !(tty->termios->c_iflag & IXON)) { | |
2002 | tty->stopped = 0; | |
2003 | ||
a8dea4ec JS |
2004 | if (info->board->chip_flag) { |
2005 | spin_lock_irqsave(&info->slock, flags); | |
2006 | DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->ioaddr); | |
2007 | spin_unlock_irqrestore(&info->slock, flags); | |
2008 | } | |
a8dea4ec JS |
2009 | |
2010 | mxser_start(tty); | |
2011 | } | |
2012 | } | |
2013 | ||
037ad48b JS |
2014 | /* |
2015 | * mxser_wait_until_sent() --- wait until the transmitter is empty | |
2016 | */ | |
2017 | static void mxser_wait_until_sent(struct tty_struct *tty, int timeout) | |
2018 | { | |
55b307da | 2019 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
2020 | unsigned long orig_jiffies, char_time; |
2021 | int lsr; | |
2022 | ||
2023 | if (info->type == PORT_UNKNOWN) | |
2024 | return; | |
2025 | ||
2026 | if (info->xmit_fifo_size == 0) | |
2027 | return; /* Just in case.... */ | |
2028 | ||
2029 | orig_jiffies = jiffies; | |
2030 | /* | |
2031 | * Set the check interval to be 1/5 of the estimated time to | |
2032 | * send a single character, and make it at least 1. The check | |
2033 | * interval should also be less than the timeout. | |
2034 | * | |
2035 | * Note: we have to use pretty tight timings here to satisfy | |
2036 | * the NIST-PCTS. | |
2037 | */ | |
2038 | char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size; | |
2039 | char_time = char_time / 5; | |
2040 | if (char_time == 0) | |
2041 | char_time = 1; | |
2042 | if (timeout && timeout < char_time) | |
2043 | char_time = timeout; | |
2044 | /* | |
2045 | * If the transmitter hasn't cleared in twice the approximate | |
2046 | * amount of time to send the entire FIFO, it probably won't | |
2047 | * ever clear. This assumes the UART isn't doing flow | |
2048 | * control, which is currently the case. Hence, if it ever | |
2049 | * takes longer than info->timeout, this is probably due to a | |
2050 | * UART bug of some kind. So, we clamp the timeout parameter at | |
2051 | * 2*info->timeout. | |
2052 | */ | |
2053 | if (!timeout || timeout > 2 * info->timeout) | |
2054 | timeout = 2 * info->timeout; | |
2055 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
2056 | printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...", | |
2057 | timeout, char_time); | |
2058 | printk("jiff=%lu...", jiffies); | |
2059 | #endif | |
55b307da | 2060 | while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) { |
037ad48b JS |
2061 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT |
2062 | printk("lsr = %d (jiff=%lu)...", lsr, jiffies); | |
2063 | #endif | |
2064 | schedule_timeout_interruptible(char_time); | |
2065 | if (signal_pending(current)) | |
2066 | break; | |
2067 | if (timeout && time_after(jiffies, orig_jiffies + timeout)) | |
2068 | break; | |
2069 | } | |
2070 | set_current_state(TASK_RUNNING); | |
2071 | ||
2072 | #ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT | |
2073 | printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies); | |
a8dea4ec JS |
2074 | #endif |
2075 | } | |
037ad48b | 2076 | |
a8dea4ec JS |
2077 | /* |
2078 | * This routine is called by tty_hangup() when a hangup is signaled. | |
2079 | */ | |
02d3fca0 | 2080 | static void mxser_hangup(struct tty_struct *tty) |
a8dea4ec JS |
2081 | { |
2082 | struct mxser_port *info = tty->driver_data; | |
037ad48b | 2083 | |
a8dea4ec JS |
2084 | mxser_flush_buffer(tty); |
2085 | mxser_shutdown(info); | |
2086 | info->event = 0; | |
2087 | info->count = 0; | |
2088 | info->flags &= ~ASYNC_NORMAL_ACTIVE; | |
2089 | info->tty = NULL; | |
2090 | wake_up_interruptible(&info->open_wait); | |
037ad48b JS |
2091 | } |
2092 | ||
a8dea4ec JS |
2093 | /* |
2094 | * mxser_rs_break() --- routine which turns the break handling on or off | |
2095 | */ | |
2096 | static void mxser_rs_break(struct tty_struct *tty, int break_state) | |
037ad48b | 2097 | { |
a8dea4ec | 2098 | struct mxser_port *info = tty->driver_data; |
037ad48b JS |
2099 | unsigned long flags; |
2100 | ||
a8dea4ec JS |
2101 | spin_lock_irqsave(&info->slock, flags); |
2102 | if (break_state == -1) | |
2103 | outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC, | |
2104 | info->ioaddr + UART_LCR); | |
2105 | else | |
2106 | outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC, | |
2107 | info->ioaddr + UART_LCR); | |
2108 | spin_unlock_irqrestore(&info->slock, flags); | |
2109 | } | |
037ad48b | 2110 | |
a8dea4ec JS |
2111 | static void mxser_receive_chars(struct mxser_port *port, int *status) |
2112 | { | |
2113 | struct tty_struct *tty = port->tty; | |
2114 | unsigned char ch, gdl; | |
2115 | int ignored = 0; | |
2116 | int cnt = 0; | |
2117 | int recv_room; | |
2118 | int max = 256; | |
a8dea4ec JS |
2119 | |
2120 | recv_room = tty->receive_room; | |
e079f495 | 2121 | if ((recv_room == 0) && (!port->ldisc_stop_rx)) |
a8dea4ec | 2122 | mxser_stoprx(tty); |
037ad48b | 2123 | |
a8dea4ec | 2124 | if (port->board->chip_flag != MOXA_OTHER_UART) { |
037ad48b | 2125 | |
a8dea4ec JS |
2126 | if (*status & UART_LSR_SPECIAL) |
2127 | goto intr_old; | |
a8dea4ec JS |
2128 | if (port->board->chip_flag == MOXA_MUST_MU860_HWID && |
2129 | (*status & MOXA_MUST_LSR_RERR)) | |
2130 | goto intr_old; | |
a8dea4ec JS |
2131 | if (*status & MOXA_MUST_LSR_RERR) |
2132 | goto intr_old; | |
2133 | ||
2134 | gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER); | |
2135 | ||
a8dea4ec JS |
2136 | if (port->board->chip_flag == MOXA_MUST_MU150_HWID) |
2137 | gdl &= MOXA_MUST_GDL_MASK; | |
2138 | if (gdl >= recv_room) { | |
e079f495 | 2139 | if (!port->ldisc_stop_rx) |
a8dea4ec | 2140 | mxser_stoprx(tty); |
a8dea4ec JS |
2141 | } |
2142 | while (gdl--) { | |
2143 | ch = inb(port->ioaddr + UART_RX); | |
2144 | tty_insert_flip_char(tty, ch, 0); | |
2145 | cnt++; | |
2146 | } | |
2147 | goto end_intr; | |
037ad48b | 2148 | } |
e079f495 | 2149 | intr_old: |
037ad48b | 2150 | |
a8dea4ec JS |
2151 | do { |
2152 | if (max-- < 0) | |
2153 | break; | |
037ad48b | 2154 | |
a8dea4ec | 2155 | ch = inb(port->ioaddr + UART_RX); |
e079f495 | 2156 | if (port->board->chip_flag && (*status & UART_LSR_OE)) |
a8dea4ec JS |
2157 | outb(0x23, port->ioaddr + UART_FCR); |
2158 | *status &= port->read_status_mask; | |
a8dea4ec JS |
2159 | if (*status & port->ignore_status_mask) { |
2160 | if (++ignored > 100) | |
2161 | break; | |
2162 | } else { | |
2163 | char flag = 0; | |
2164 | if (*status & UART_LSR_SPECIAL) { | |
2165 | if (*status & UART_LSR_BI) { | |
2166 | flag = TTY_BREAK; | |
a8dea4ec | 2167 | port->icount.brk++; |
037ad48b | 2168 | |
a8dea4ec JS |
2169 | if (port->flags & ASYNC_SAK) |
2170 | do_SAK(tty); | |
2171 | } else if (*status & UART_LSR_PE) { | |
2172 | flag = TTY_PARITY; | |
a8dea4ec JS |
2173 | port->icount.parity++; |
2174 | } else if (*status & UART_LSR_FE) { | |
2175 | flag = TTY_FRAME; | |
a8dea4ec JS |
2176 | port->icount.frame++; |
2177 | } else if (*status & UART_LSR_OE) { | |
2178 | flag = TTY_OVERRUN; | |
a8dea4ec | 2179 | port->icount.overrun++; |
f64c84a1 JS |
2180 | } else |
2181 | flag = TTY_BREAK; | |
925e9c1c | 2182 | } |
a8dea4ec JS |
2183 | tty_insert_flip_char(tty, ch, flag); |
2184 | cnt++; | |
2185 | if (cnt >= recv_room) { | |
e079f495 | 2186 | if (!port->ldisc_stop_rx) |
a8dea4ec | 2187 | mxser_stoprx(tty); |
a8dea4ec JS |
2188 | break; |
2189 | } | |
037ad48b | 2190 | |
a8dea4ec | 2191 | } |
037ad48b | 2192 | |
a8dea4ec JS |
2193 | if (port->board->chip_flag) |
2194 | break; | |
037ad48b | 2195 | |
a8dea4ec | 2196 | *status = inb(port->ioaddr + UART_LSR); |
a8dea4ec | 2197 | } while (*status & UART_LSR_DR); |
037ad48b | 2198 | |
e079f495 | 2199 | end_intr: |
a8dea4ec JS |
2200 | mxvar_log.rxcnt[port->tty->index] += cnt; |
2201 | port->mon_data.rxcnt += cnt; | |
2202 | port->mon_data.up_rxcnt += cnt; | |
a8dea4ec | 2203 | |
67d2bc58 JYK |
2204 | /* |
2205 | * We are called from an interrupt context with &port->slock | |
2206 | * being held. Drop it temporarily in order to prevent | |
2207 | * recursive locking. | |
2208 | */ | |
2209 | spin_unlock(&port->slock); | |
a8dea4ec | 2210 | tty_flip_buffer_push(tty); |
67d2bc58 | 2211 | spin_lock(&port->slock); |
037ad48b JS |
2212 | } |
2213 | ||
a8dea4ec | 2214 | static void mxser_transmit_chars(struct mxser_port *port) |
037ad48b | 2215 | { |
a8dea4ec | 2216 | int count, cnt; |
037ad48b | 2217 | |
a8dea4ec JS |
2218 | if (port->x_char) { |
2219 | outb(port->x_char, port->ioaddr + UART_TX); | |
2220 | port->x_char = 0; | |
2221 | mxvar_log.txcnt[port->tty->index]++; | |
2222 | port->mon_data.txcnt++; | |
2223 | port->mon_data.up_txcnt++; | |
a8dea4ec | 2224 | port->icount.tx++; |
f574874b | 2225 | return; |
037ad48b JS |
2226 | } |
2227 | ||
a8dea4ec | 2228 | if (port->xmit_buf == 0) |
f574874b | 2229 | return; |
037ad48b | 2230 | |
925e9c1c JS |
2231 | if ((port->xmit_cnt <= 0) || port->tty->stopped || |
2232 | (port->tty->hw_stopped && | |
a8dea4ec JS |
2233 | (port->type != PORT_16550A) && |
2234 | (!port->board->chip_flag))) { | |
2235 | port->IER &= ~UART_IER_THRI; | |
2236 | outb(port->IER, port->ioaddr + UART_IER); | |
f574874b | 2237 | return; |
a8dea4ec | 2238 | } |
037ad48b | 2239 | |
a8dea4ec JS |
2240 | cnt = port->xmit_cnt; |
2241 | count = port->xmit_fifo_size; | |
2242 | do { | |
2243 | outb(port->xmit_buf[port->xmit_tail++], | |
2244 | port->ioaddr + UART_TX); | |
2245 | port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1); | |
2246 | if (--port->xmit_cnt <= 0) | |
2247 | break; | |
2248 | } while (--count > 0); | |
2249 | mxvar_log.txcnt[port->tty->index] += (cnt - port->xmit_cnt); | |
55b307da | 2250 | |
a8dea4ec JS |
2251 | port->mon_data.txcnt += (cnt - port->xmit_cnt); |
2252 | port->mon_data.up_txcnt += (cnt - port->xmit_cnt); | |
a8dea4ec | 2253 | port->icount.tx += (cnt - port->xmit_cnt); |
037ad48b | 2254 | |
47c85c0d JS |
2255 | if (port->xmit_cnt < WAKEUP_CHARS) |
2256 | tty_wakeup(port->tty); | |
2257 | ||
a8dea4ec JS |
2258 | if (port->xmit_cnt <= 0) { |
2259 | port->IER &= ~UART_IER_THRI; | |
2260 | outb(port->IER, port->ioaddr + UART_IER); | |
2261 | } | |
037ad48b JS |
2262 | } |
2263 | ||
2264 | /* | |
a8dea4ec | 2265 | * This is the serial driver's generic interrupt routine |
037ad48b | 2266 | */ |
b1d1c8dd | 2267 | static irqreturn_t mxser_interrupt(int irq, void *dev_id) |
037ad48b | 2268 | { |
a8dea4ec JS |
2269 | int status, iir, i; |
2270 | struct mxser_board *brd = NULL; | |
2271 | struct mxser_port *port; | |
2272 | int max, irqbits, bits, msr; | |
18b95576 | 2273 | unsigned int int_cnt, pass_counter = 0; |
a8dea4ec | 2274 | int handled = IRQ_NONE; |
037ad48b | 2275 | |
a8dea4ec JS |
2276 | for (i = 0; i < MXSER_BOARDS; i++) |
2277 | if (dev_id == &mxser_boards[i]) { | |
2278 | brd = dev_id; | |
2279 | break; | |
2280 | } | |
037ad48b | 2281 | |
a8dea4ec JS |
2282 | if (i == MXSER_BOARDS) |
2283 | goto irq_stop; | |
2284 | if (brd == NULL) | |
2285 | goto irq_stop; | |
cd7ed64e | 2286 | max = brd->info->nports; |
18b95576 | 2287 | while (pass_counter++ < MXSER_ISR_PASS_LIMIT) { |
a8dea4ec JS |
2288 | irqbits = inb(brd->vector) & brd->vector_mask; |
2289 | if (irqbits == brd->vector_mask) | |
2290 | break; | |
037ad48b | 2291 | |
a8dea4ec JS |
2292 | handled = IRQ_HANDLED; |
2293 | for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) { | |
2294 | if (irqbits == brd->vector_mask) | |
2295 | break; | |
2296 | if (bits & irqbits) | |
2297 | continue; | |
2298 | port = &brd->ports[i]; | |
037ad48b | 2299 | |
a8dea4ec | 2300 | int_cnt = 0; |
f574874b | 2301 | spin_lock(&port->slock); |
a8dea4ec | 2302 | do { |
a8dea4ec JS |
2303 | iir = inb(port->ioaddr + UART_IIR); |
2304 | if (iir & UART_IIR_NO_INT) | |
2305 | break; | |
2306 | iir &= MOXA_MUST_IIR_MASK; | |
f574874b JS |
2307 | if (!port->tty || |
2308 | (port->flags & ASYNC_CLOSING) || | |
2309 | !(port->flags & | |
2310 | ASYNC_INITIALIZED)) { | |
a8dea4ec JS |
2311 | status = inb(port->ioaddr + UART_LSR); |
2312 | outb(0x27, port->ioaddr + UART_FCR); | |
2313 | inb(port->ioaddr + UART_MSR); | |
2314 | break; | |
2315 | } | |
037ad48b | 2316 | |
a8dea4ec JS |
2317 | status = inb(port->ioaddr + UART_LSR); |
2318 | ||
2319 | if (status & UART_LSR_PE) | |
2320 | port->err_shadow |= NPPI_NOTIFY_PARITY; | |
2321 | if (status & UART_LSR_FE) | |
2322 | port->err_shadow |= NPPI_NOTIFY_FRAMING; | |
2323 | if (status & UART_LSR_OE) | |
2324 | port->err_shadow |= | |
2325 | NPPI_NOTIFY_HW_OVERRUN; | |
2326 | if (status & UART_LSR_BI) | |
2327 | port->err_shadow |= NPPI_NOTIFY_BREAK; | |
2328 | ||
2329 | if (port->board->chip_flag) { | |
a8dea4ec JS |
2330 | if (iir == MOXA_MUST_IIR_GDA || |
2331 | iir == MOXA_MUST_IIR_RDA || | |
2332 | iir == MOXA_MUST_IIR_RTO || | |
2333 | iir == MOXA_MUST_IIR_LSR) | |
2334 | mxser_receive_chars(port, | |
2335 | &status); | |
2336 | ||
2337 | } else { | |
a8dea4ec JS |
2338 | status &= port->read_status_mask; |
2339 | if (status & UART_LSR_DR) | |
2340 | mxser_receive_chars(port, | |
2341 | &status); | |
2342 | } | |
2343 | msr = inb(port->ioaddr + UART_MSR); | |
2344 | if (msr & UART_MSR_ANY_DELTA) | |
2345 | mxser_check_modem_status(port, msr); | |
2346 | ||
a8dea4ec JS |
2347 | if (port->board->chip_flag) { |
2348 | if (iir == 0x02 && (status & | |
2349 | UART_LSR_THRE)) | |
2350 | mxser_transmit_chars(port); | |
2351 | } else { | |
a8dea4ec JS |
2352 | if (status & UART_LSR_THRE) |
2353 | mxser_transmit_chars(port); | |
2354 | } | |
2355 | } while (int_cnt++ < MXSER_ISR_PASS_LIMIT); | |
f574874b | 2356 | spin_unlock(&port->slock); |
a8dea4ec | 2357 | } |
a8dea4ec JS |
2358 | } |
2359 | ||
e079f495 | 2360 | irq_stop: |
a8dea4ec | 2361 | return handled; |
037ad48b JS |
2362 | } |
2363 | ||
a8dea4ec JS |
2364 | static const struct tty_operations mxser_ops = { |
2365 | .open = mxser_open, | |
2366 | .close = mxser_close, | |
2367 | .write = mxser_write, | |
2368 | .put_char = mxser_put_char, | |
2369 | .flush_chars = mxser_flush_chars, | |
2370 | .write_room = mxser_write_room, | |
2371 | .chars_in_buffer = mxser_chars_in_buffer, | |
2372 | .flush_buffer = mxser_flush_buffer, | |
2373 | .ioctl = mxser_ioctl, | |
2374 | .throttle = mxser_throttle, | |
2375 | .unthrottle = mxser_unthrottle, | |
2376 | .set_termios = mxser_set_termios, | |
2377 | .stop = mxser_stop, | |
2378 | .start = mxser_start, | |
2379 | .hangup = mxser_hangup, | |
2380 | .break_ctl = mxser_rs_break, | |
2381 | .wait_until_sent = mxser_wait_until_sent, | |
2382 | .tiocmget = mxser_tiocmget, | |
2383 | .tiocmset = mxser_tiocmset, | |
2384 | }; | |
2385 | ||
2386 | /* | |
2387 | * The MOXA Smartio/Industio serial driver boot-time initialization code! | |
2388 | */ | |
2389 | ||
2094e757 JS |
2390 | static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev, |
2391 | unsigned int irq) | |
171d3a86 | 2392 | { |
171d3a86 JS |
2393 | if (irq) |
2394 | free_irq(brd->irq, brd); | |
2395 | if (pdev != NULL) { /* PCI */ | |
fb0c9295 | 2396 | #ifdef CONFIG_PCI |
171d3a86 JS |
2397 | pci_release_region(pdev, 2); |
2398 | pci_release_region(pdev, 3); | |
fb0c9295 | 2399 | #endif |
171d3a86 | 2400 | } else { |
cd7ed64e | 2401 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
171d3a86 JS |
2402 | release_region(brd->vector, 1); |
2403 | } | |
2404 | } | |
2405 | ||
2094e757 JS |
2406 | static int __devinit mxser_initbrd(struct mxser_board *brd, |
2407 | struct pci_dev *pdev) | |
037ad48b | 2408 | { |
a8dea4ec JS |
2409 | struct mxser_port *info; |
2410 | unsigned int i; | |
2411 | int retval; | |
2412 | ||
2413 | printk(KERN_INFO "max. baud rate = %d bps.\n", brd->ports[0].max_baud); | |
2414 | ||
cd7ed64e | 2415 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2416 | info = &brd->ports[i]; |
2417 | info->board = brd; | |
2418 | info->stop_rx = 0; | |
2419 | info->ldisc_stop_rx = 0; | |
037ad48b | 2420 | |
a8dea4ec JS |
2421 | /* Enhance mode enabled here */ |
2422 | if (brd->chip_flag != MOXA_OTHER_UART) | |
2423 | ENABLE_MOXA_MUST_ENCHANCE_MODE(info->ioaddr); | |
037ad48b | 2424 | |
a8dea4ec JS |
2425 | info->flags = ASYNC_SHARE_IRQ; |
2426 | info->type = brd->uart_type; | |
037ad48b | 2427 | |
a8dea4ec | 2428 | process_txrx_fifo(info); |
037ad48b | 2429 | |
a8dea4ec JS |
2430 | info->custom_divisor = info->baud_base * 16; |
2431 | info->close_delay = 5 * HZ / 10; | |
2432 | info->closing_wait = 30 * HZ; | |
a8dea4ec JS |
2433 | info->normal_termios = mxvar_sdriver->init_termios; |
2434 | init_waitqueue_head(&info->open_wait); | |
a8dea4ec | 2435 | init_waitqueue_head(&info->delta_msr_wait); |
f64c84a1 | 2436 | info->speed = 9600; |
a8dea4ec JS |
2437 | memset(&info->mon_data, 0, sizeof(struct mxser_mon)); |
2438 | info->err_shadow = 0; | |
2439 | spin_lock_init(&info->slock); | |
037ad48b | 2440 | |
a8dea4ec JS |
2441 | /* before set INT ISR, disable all int */ |
2442 | outb(inb(info->ioaddr + UART_IER) & 0xf0, | |
2443 | info->ioaddr + UART_IER); | |
2444 | } | |
037ad48b | 2445 | |
c493edd1 JS |
2446 | retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser", |
2447 | brd); | |
a8dea4ec JS |
2448 | if (retval) { |
2449 | printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may " | |
2450 | "conflict with another device.\n", | |
cd7ed64e | 2451 | brd->info->name, brd->irq); |
171d3a86 | 2452 | /* We hold resources, we need to release them. */ |
2094e757 | 2453 | mxser_release_res(brd, pdev, 0); |
a8dea4ec | 2454 | } |
45257fa9 | 2455 | return retval; |
037ad48b JS |
2456 | } |
2457 | ||
943f2959 | 2458 | static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd) |
037ad48b JS |
2459 | { |
2460 | int id, i, bits; | |
2461 | unsigned short regs[16], irq; | |
2462 | unsigned char scratch, scratch2; | |
2463 | ||
55b307da | 2464 | brd->chip_flag = MOXA_OTHER_UART; |
037ad48b JS |
2465 | |
2466 | id = mxser_read_register(cap, regs); | |
cd7ed64e JS |
2467 | switch (id) { |
2468 | case C168_ASIC_ID: | |
2469 | brd->info = &mxser_cards[0]; | |
2470 | break; | |
2471 | case C104_ASIC_ID: | |
2472 | brd->info = &mxser_cards[1]; | |
2473 | break; | |
2474 | case CI104J_ASIC_ID: | |
2475 | brd->info = &mxser_cards[2]; | |
2476 | break; | |
2477 | case C102_ASIC_ID: | |
2478 | brd->info = &mxser_cards[5]; | |
2479 | break; | |
2480 | case CI132_ASIC_ID: | |
2481 | brd->info = &mxser_cards[6]; | |
2482 | break; | |
2483 | case CI134_ASIC_ID: | |
2484 | brd->info = &mxser_cards[7]; | |
2485 | break; | |
2486 | default: | |
037ad48b | 2487 | return 0; |
cd7ed64e | 2488 | } |
037ad48b JS |
2489 | |
2490 | irq = 0; | |
cd7ed64e JS |
2491 | /* some ISA cards have 2 ports, but we want to see them as 4-port (why?) |
2492 | Flag-hack checks if configuration should be read as 2-port here. */ | |
2493 | if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) { | |
037ad48b JS |
2494 | irq = regs[9] & 0xF000; |
2495 | irq = irq | (irq >> 4); | |
2496 | if (irq != (regs[9] & 0xFF00)) | |
2497 | return MXSER_ERR_IRQ_CONFLIT; | |
cd7ed64e | 2498 | } else if (brd->info->nports == 4) { |
037ad48b JS |
2499 | irq = regs[9] & 0xF000; |
2500 | irq = irq | (irq >> 4); | |
2501 | irq = irq | (irq >> 8); | |
2502 | if (irq != regs[9]) | |
2503 | return MXSER_ERR_IRQ_CONFLIT; | |
cd7ed64e | 2504 | } else if (brd->info->nports == 8) { |
037ad48b JS |
2505 | irq = regs[9] & 0xF000; |
2506 | irq = irq | (irq >> 4); | |
2507 | irq = irq | (irq >> 8); | |
2508 | if ((irq != regs[9]) || (irq != regs[10])) | |
2509 | return MXSER_ERR_IRQ_CONFLIT; | |
2510 | } | |
2511 | ||
a8dea4ec JS |
2512 | if (!irq) |
2513 | return MXSER_ERR_IRQ; | |
2514 | brd->irq = ((int)(irq & 0xF000) >> 12); | |
2515 | for (i = 0; i < 8; i++) | |
2516 | brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8; | |
2517 | if ((regs[12] & 0x80) == 0) | |
2518 | return MXSER_ERR_VECTOR; | |
2519 | brd->vector = (int)regs[11]; /* interrupt vector */ | |
2520 | if (id == 1) | |
2521 | brd->vector_mask = 0x00FF; | |
2522 | else | |
2523 | brd->vector_mask = 0x000F; | |
2524 | for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) { | |
2525 | if (regs[12] & bits) { | |
2526 | brd->ports[i].baud_base = 921600; | |
e079f495 | 2527 | brd->ports[i].max_baud = 921600; |
a8dea4ec JS |
2528 | } else { |
2529 | brd->ports[i].baud_base = 115200; | |
e079f495 | 2530 | brd->ports[i].max_baud = 115200; |
a8dea4ec JS |
2531 | } |
2532 | } | |
2533 | scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB); | |
2534 | outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR); | |
2535 | outb(0, cap + UART_EFR); /* EFR is the same as FCR */ | |
2536 | outb(scratch2, cap + UART_LCR); | |
2537 | outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR); | |
2538 | scratch = inb(cap + UART_IIR); | |
2539 | ||
2540 | if (scratch & 0xC0) | |
2541 | brd->uart_type = PORT_16550A; | |
2542 | else | |
2543 | brd->uart_type = PORT_16450; | |
cd7ed64e JS |
2544 | if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports, |
2545 | "mxser(IO)")) | |
a8dea4ec JS |
2546 | return MXSER_ERR_IOADDR; |
2547 | if (!request_region(brd->vector, 1, "mxser(vector)")) { | |
cd7ed64e | 2548 | release_region(brd->ports[0].ioaddr, 8 * brd->info->nports); |
a8dea4ec JS |
2549 | return MXSER_ERR_VECTOR; |
2550 | } | |
cd7ed64e | 2551 | return brd->info->nports; |
a8dea4ec JS |
2552 | } |
2553 | ||
2094e757 JS |
2554 | static int __devinit mxser_probe(struct pci_dev *pdev, |
2555 | const struct pci_device_id *ent) | |
a8dea4ec | 2556 | { |
fb0c9295 | 2557 | #ifdef CONFIG_PCI |
2094e757 | 2558 | struct mxser_board *brd; |
a8dea4ec JS |
2559 | unsigned int i, j; |
2560 | unsigned long ioaddress; | |
2094e757 JS |
2561 | int retval = -EINVAL; |
2562 | ||
2563 | for (i = 0; i < MXSER_BOARDS; i++) | |
2564 | if (mxser_boards[i].info == NULL) | |
2565 | break; | |
2566 | ||
2567 | if (i >= MXSER_BOARDS) { | |
2568 | printk(KERN_ERR "Too many Smartio/Industio family boards found " | |
2569 | "(maximum %d), board not configured\n", MXSER_BOARDS); | |
2570 | goto err; | |
2571 | } | |
2572 | ||
2573 | brd = &mxser_boards[i]; | |
2574 | brd->idx = i * MXSER_PORTS_PER_BOARD; | |
2575 | printk(KERN_INFO "Found MOXA %s board (BusNo=%d, DevNo=%d)\n", | |
2576 | mxser_cards[ent->driver_data].name, | |
2577 | pdev->bus->number, PCI_SLOT(pdev->devfn)); | |
2578 | ||
2579 | retval = pci_enable_device(pdev); | |
2580 | if (retval) { | |
2581 | printk(KERN_ERR "Moxa SmartI/O PCI enable fail !\n"); | |
2582 | goto err; | |
2583 | } | |
a8dea4ec JS |
2584 | |
2585 | /* io address */ | |
a8dea4ec JS |
2586 | ioaddress = pci_resource_start(pdev, 2); |
2587 | retval = pci_request_region(pdev, 2, "mxser(IO)"); | |
2588 | if (retval) | |
2589 | goto err; | |
2590 | ||
2094e757 | 2591 | brd->info = &mxser_cards[ent->driver_data]; |
cd7ed64e | 2592 | for (i = 0; i < brd->info->nports; i++) |
a8dea4ec JS |
2593 | brd->ports[i].ioaddr = ioaddress + 8 * i; |
2594 | ||
2595 | /* vector */ | |
2596 | ioaddress = pci_resource_start(pdev, 3); | |
2597 | retval = pci_request_region(pdev, 3, "mxser(vector)"); | |
2598 | if (retval) | |
2599 | goto err_relio; | |
2600 | brd->vector = ioaddress; | |
2601 | ||
2602 | /* irq */ | |
2603 | brd->irq = pdev->irq; | |
2604 | ||
2605 | brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr); | |
2606 | brd->uart_type = PORT_16550A; | |
2607 | brd->vector_mask = 0; | |
2608 | ||
cd7ed64e | 2609 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2610 | for (j = 0; j < UART_INFO_NUM; j++) { |
2611 | if (Gpci_uart_info[j].type == brd->chip_flag) { | |
2612 | brd->ports[i].max_baud = | |
2613 | Gpci_uart_info[j].max_baud; | |
2614 | ||
2615 | /* exception....CP-102 */ | |
cd7ed64e | 2616 | if (brd->info->flags & MXSER_HIGHBAUD) |
a8dea4ec JS |
2617 | brd->ports[i].max_baud = 921600; |
2618 | break; | |
2619 | } | |
2620 | } | |
2621 | } | |
2622 | ||
2623 | if (brd->chip_flag == MOXA_MUST_MU860_HWID) { | |
cd7ed64e | 2624 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2625 | if (i < 4) |
2626 | brd->ports[i].opmode_ioaddr = ioaddress + 4; | |
2627 | else | |
2628 | brd->ports[i].opmode_ioaddr = ioaddress + 0x0c; | |
2629 | } | |
2630 | outb(0, ioaddress + 4); /* default set to RS232 mode */ | |
2631 | outb(0, ioaddress + 0x0c); /* default set to RS232 mode */ | |
2632 | } | |
2633 | ||
cd7ed64e | 2634 | for (i = 0; i < brd->info->nports; i++) { |
a8dea4ec JS |
2635 | brd->vector_mask |= (1 << i); |
2636 | brd->ports[i].baud_base = 921600; | |
2637 | } | |
2094e757 JS |
2638 | |
2639 | /* mxser_initbrd will hook ISR. */ | |
45257fa9 JS |
2640 | retval = mxser_initbrd(brd, pdev); |
2641 | if (retval) | |
2642 | goto err_null; | |
2094e757 JS |
2643 | |
2644 | for (i = 0; i < brd->info->nports; i++) | |
2645 | tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev); | |
2646 | ||
2647 | pci_set_drvdata(pdev, brd); | |
2648 | ||
a8dea4ec JS |
2649 | return 0; |
2650 | err_relio: | |
2651 | pci_release_region(pdev, 2); | |
45257fa9 | 2652 | err_null: |
2094e757 | 2653 | brd->info = NULL; |
a8dea4ec JS |
2654 | err: |
2655 | return retval; | |
fb0c9295 JS |
2656 | #else |
2657 | return -ENODEV; | |
2658 | #endif | |
a8dea4ec JS |
2659 | } |
2660 | ||
2094e757 JS |
2661 | static void __devexit mxser_remove(struct pci_dev *pdev) |
2662 | { | |
2663 | struct mxser_board *brd = pci_get_drvdata(pdev); | |
2664 | unsigned int i; | |
2665 | ||
2666 | for (i = 0; i < brd->info->nports; i++) | |
2667 | tty_unregister_device(mxvar_sdriver, brd->idx + i); | |
2668 | ||
2669 | mxser_release_res(brd, pdev, 1); | |
45257fa9 | 2670 | brd->info = NULL; |
2094e757 JS |
2671 | } |
2672 | ||
2673 | static struct pci_driver mxser_driver = { | |
2674 | .name = "mxser", | |
2675 | .id_table = mxser_pcibrds, | |
2676 | .probe = mxser_probe, | |
2677 | .remove = __devexit_p(mxser_remove) | |
2678 | }; | |
2679 | ||
a8dea4ec JS |
2680 | static int __init mxser_module_init(void) |
2681 | { | |
a8dea4ec | 2682 | struct mxser_board *brd; |
eae4436a JS |
2683 | unsigned long cap; |
2684 | unsigned int i, m, isaloop; | |
2094e757 | 2685 | int retval, b; |
a8dea4ec JS |
2686 | |
2687 | pr_debug("Loading module mxser ...\n"); | |
2688 | ||
2689 | mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1); | |
2690 | if (!mxvar_sdriver) | |
2691 | return -ENOMEM; | |
a8dea4ec | 2692 | |
a8dea4ec JS |
2693 | printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n", |
2694 | MXSER_VERSION); | |
2695 | ||
2696 | /* Initialize the tty_driver structure */ | |
31f87cf4 | 2697 | mxvar_sdriver->owner = THIS_MODULE; |
a8dea4ec | 2698 | mxvar_sdriver->magic = TTY_DRIVER_MAGIC; |
e930790d | 2699 | mxvar_sdriver->name = "ttyMI"; |
a8dea4ec JS |
2700 | mxvar_sdriver->major = ttymajor; |
2701 | mxvar_sdriver->minor_start = 0; | |
2702 | mxvar_sdriver->num = MXSER_PORTS + 1; | |
2703 | mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL; | |
2704 | mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL; | |
2705 | mxvar_sdriver->init_termios = tty_std_termios; | |
2706 | mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL; | |
938ef180 | 2707 | mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV; |
a8dea4ec | 2708 | tty_set_operations(mxvar_sdriver, &mxser_ops); |
a8dea4ec | 2709 | |
938ef180 JS |
2710 | retval = tty_register_driver(mxvar_sdriver); |
2711 | if (retval) { | |
2712 | printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family " | |
2713 | "tty driver !\n"); | |
2714 | goto err_put; | |
2715 | } | |
2716 | ||
a8dea4ec JS |
2717 | mxvar_diagflag = 0; |
2718 | ||
2719 | m = 0; | |
2720 | /* Start finding ISA boards here */ | |
eae4436a JS |
2721 | for (isaloop = 0; isaloop < 2; isaloop++) |
2722 | for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) { | |
2723 | if (!isaloop) | |
2724 | cap = mxserBoardCAP[b]; /* predefined */ | |
2725 | else | |
2726 | cap = ioaddr[b]; /* module param */ | |
a8dea4ec | 2727 | |
eae4436a JS |
2728 | if (!cap) |
2729 | continue; | |
a8dea4ec | 2730 | |
eae4436a JS |
2731 | brd = &mxser_boards[m]; |
2732 | retval = mxser_get_ISA_conf(cap, brd); | |
2733 | ||
2734 | if (retval != 0) | |
2735 | printk(KERN_INFO "Found MOXA %s board " | |
2736 | "(CAP=0x%x)\n", | |
cd7ed64e | 2737 | brd->info->name, ioaddr[b]); |
eae4436a JS |
2738 | |
2739 | if (retval <= 0) { | |
2740 | if (retval == MXSER_ERR_IRQ) | |
2741 | printk(KERN_ERR "Invalid interrupt " | |
2742 | "number, board not " | |
2743 | "configured\n"); | |
2744 | else if (retval == MXSER_ERR_IRQ_CONFLIT) | |
2745 | printk(KERN_ERR "Invalid interrupt " | |
2746 | "number, board not " | |
2747 | "configured\n"); | |
2748 | else if (retval == MXSER_ERR_VECTOR) | |
2749 | printk(KERN_ERR "Invalid interrupt " | |
2750 | "vector, board not " | |
2751 | "configured\n"); | |
2752 | else if (retval == MXSER_ERR_IOADDR) | |
2753 | printk(KERN_ERR "Invalid I/O address, " | |
2754 | "board not configured\n"); | |
a8dea4ec | 2755 | |
2094e757 | 2756 | brd->info = NULL; |
eae4436a JS |
2757 | continue; |
2758 | } | |
a8dea4ec | 2759 | |
eae4436a | 2760 | /* mxser_initbrd will hook ISR. */ |
2094e757 JS |
2761 | if (mxser_initbrd(brd, NULL) < 0) { |
2762 | brd->info = NULL; | |
a8dea4ec JS |
2763 | continue; |
2764 | } | |
2094e757 JS |
2765 | |
2766 | brd->idx = m * MXSER_PORTS_PER_BOARD; | |
cd7ed64e | 2767 | for (i = 0; i < brd->info->nports; i++) |
2094e757 JS |
2768 | tty_register_device(mxvar_sdriver, brd->idx + i, |
2769 | NULL); | |
938ef180 | 2770 | |
a8dea4ec | 2771 | m++; |
a8dea4ec | 2772 | } |
037ad48b | 2773 | |
2094e757 JS |
2774 | retval = pci_register_driver(&mxser_driver); |
2775 | if (retval) { | |
2776 | printk(KERN_ERR "Can't register pci driver\n"); | |
2777 | if (!m) { | |
2778 | retval = -ENODEV; | |
2779 | goto err_unr; | |
2780 | } /* else: we have some ISA cards under control */ | |
037ad48b | 2781 | } |
a8dea4ec JS |
2782 | |
2783 | pr_debug("Done.\n"); | |
2784 | ||
938ef180 JS |
2785 | return 0; |
2786 | err_unr: | |
2787 | tty_unregister_driver(mxvar_sdriver); | |
2788 | err_put: | |
2789 | put_tty_driver(mxvar_sdriver); | |
a8dea4ec | 2790 | return retval; |
037ad48b JS |
2791 | } |
2792 | ||
a8dea4ec | 2793 | static void __exit mxser_module_exit(void) |
037ad48b | 2794 | { |
2094e757 | 2795 | unsigned int i, j; |
037ad48b | 2796 | |
a8dea4ec | 2797 | pr_debug("Unloading module mxser ...\n"); |
037ad48b | 2798 | |
2094e757 JS |
2799 | pci_unregister_driver(&mxser_driver); |
2800 | ||
2801 | for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */ | |
2802 | if (mxser_boards[i].info != NULL) | |
2803 | for (j = 0; j < mxser_boards[i].info->nports; j++) | |
2804 | tty_unregister_device(mxvar_sdriver, | |
2805 | mxser_boards[i].idx + j); | |
ead568c9 JS |
2806 | tty_unregister_driver(mxvar_sdriver); |
2807 | put_tty_driver(mxvar_sdriver); | |
037ad48b | 2808 | |
171d3a86 | 2809 | for (i = 0; i < MXSER_BOARDS; i++) |
cd7ed64e | 2810 | if (mxser_boards[i].info != NULL) |
2094e757 | 2811 | mxser_release_res(&mxser_boards[i], NULL, 1); |
037ad48b | 2812 | |
a8dea4ec | 2813 | pr_debug("Done.\n"); |
037ad48b JS |
2814 | } |
2815 | ||
2816 | module_init(mxser_module_init); | |
2817 | module_exit(mxser_module_exit); |