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mxser/mxser_new: first pass over termios reporting for the mxser cards
[linux-block.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/errno.h>
41#include <linux/signal.h>
42#include <linux/sched.h>
43#include <linux/timer.h>
44#include <linux/interrupt.h>
45#include <linux/tty.h>
46#include <linux/tty_flip.h>
47#include <linux/serial.h>
48#include <linux/serial_reg.h>
49#include <linux/major.h>
50#include <linux/string.h>
51#include <linux/fcntl.h>
52#include <linux/ptrace.h>
53#include <linux/gfp.h>
54#include <linux/ioport.h>
55#include <linux/mm.h>
1da177e4
LT		 56#include <linux/delay.h>
57#include <linux/pci.h>
1977f032 58#include <linux/bitops.h>
1da177e4
LT		 59
60#include <asm/system.h>
61#include <asm/io.h>
62#include <asm/irq.h>
1da177e4
LT		 63#include <asm/uaccess.h>
64
65#include "mxser.h"
66
67#define MXSER_VERSION "1.8"
68#define MXSERMAJOR 174
69#define MXSERCUMAJOR 175
70
8ea2c2ec
JJ		 71#define MXSER_EVENT_TXLOW 1
72#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 73
74#define MXSER_BOARDS 4 /* Max. boards */
75#define MXSER_PORTS 32 /* Max. ports */
76#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
77#define MXSER_ISR_PASS_LIMIT 256
78
79#define MXSER_ERR_IOADDR -1
80#define MXSER_ERR_IRQ -2
81#define MXSER_ERR_IRQ_CONFLIT -3
82#define MXSER_ERR_VECTOR -4
83
1da177e4
LT		 84#define WAKEUP_CHARS 256
85
86#define UART_MCR_AFE 0x20
87#define UART_LSR_SPECIAL 0x1E
88
1da177e4 89
0f2ed4c6 90#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 91
92#define C168_ASIC_ID 1
93#define C104_ASIC_ID 2
94#define C102_ASIC_ID 0xB
95#define CI132_ASIC_ID 4
96#define CI134_ASIC_ID 3
97#define CI104J_ASIC_ID 5
98
99enum {
100 MXSER_BOARD_C168_ISA = 1,
101 MXSER_BOARD_C104_ISA,
102 MXSER_BOARD_CI104J,
103 MXSER_BOARD_C168_PCI,
104 MXSER_BOARD_C104_PCI,
105 MXSER_BOARD_C102_ISA,
106 MXSER_BOARD_CI132,
107 MXSER_BOARD_CI134,
108 MXSER_BOARD_CP132,
109 MXSER_BOARD_CP114,
110 MXSER_BOARD_CT114,
111 MXSER_BOARD_CP102,
112 MXSER_BOARD_CP104U,
113 MXSER_BOARD_CP168U,
114 MXSER_BOARD_CP132U,
115 MXSER_BOARD_CP134U,
116 MXSER_BOARD_CP104JU,
117 MXSER_BOARD_RC7000,
118 MXSER_BOARD_CP118U,
119 MXSER_BOARD_CP102UL,
120 MXSER_BOARD_CP102U,
121};
122
123static char *mxser_brdname[] = {
124 "C168 series",
125 "C104 series",
126 "CI-104J series",
127 "C168H/PCI series",
128 "C104H/PCI series",
129 "C102 series",
130 "CI-132 series",
131 "CI-134 series",
132 "CP-132 series",
133 "CP-114 series",
134 "CT-114 series",
135 "CP-102 series",
136 "CP-104U series",
137 "CP-168U series",
138 "CP-132U series",
139 "CP-134U series",
140 "CP-104JU series",
141 "Moxa UC7000 Serial",
142 "CP-118U series",
143 "CP-102UL series",
144 "CP-102U series",
145};
146
147static int mxser_numports[] = {
8ea2c2ec
JJ		 148 8, /* C168-ISA */
149 4, /* C104-ISA */
150 4, /* CI104J */
151 8, /* C168-PCI */
152 4, /* C104-PCI */
153 2, /* C102-ISA */
154 2, /* CI132 */
155 4, /* CI134 */
156 2, /* CP132 */
157 4, /* CP114 */
158 4, /* CT114 */
159 2, /* CP102 */
160 4, /* CP104U */
161 8, /* CP168U */
162 2, /* CP132U */
163 4, /* CP134U */
164 4, /* CP104JU */
165 8, /* RC7000 */
166 8, /* CP118U */
167 2, /* CP102UL */
168 2, /* CP102U */
1da177e4
LT		 169};
170
171#define UART_TYPE_NUM 2
172
173static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
174 MOXA_MUST_MU150_HWID,
175 MOXA_MUST_MU860_HWID
176};
177
8ea2c2ec 178/* This is only for PCI */
1da177e4
LT		 179#define UART_INFO_NUM 3
180struct mxpciuart_info {
181 int type;
182 int tx_fifo;
183 int rx_fifo;
184 int xmit_fifo_size;
185 int rx_high_water;
186 int rx_trigger;
187 int rx_low_water;
188 long max_baud;
189};
190
191static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
192 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
193 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
194 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
195};
196
197
198#ifdef CONFIG_PCI
199
200static struct pci_device_id mxser_pcibrds[] = {
201 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
202 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
203 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
204 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
205 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
206 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
207 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
216 {0}
217};
218
219MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
220
221
222#endif
223
224typedef struct _moxa_pci_info {
225 unsigned short busNum;
226 unsigned short devNum;
8ea2c2ec 227 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 228} moxa_pci_info;
229
230static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
231static int ttymajor = MXSERMAJOR;
232static int calloutmajor = MXSERCUMAJOR;
233static int verbose = 0;
234
235/* Variables for insmod */
236
237MODULE_AUTHOR("Casper Yang");
238MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 239module_param_array(ioaddr, int, NULL, 0);
240module_param(ttymajor, int, 0);
241module_param(calloutmajor, int, 0);
242module_param(verbose, bool, 0);
1da177e4
LT		 243MODULE_LICENSE("GPL");
244
245struct mxser_log {
246 int tick;
247 unsigned long rxcnt[MXSER_PORTS];
248 unsigned long txcnt[MXSER_PORTS];
249};
250
251
252struct mxser_mon {
253 unsigned long rxcnt;
254 unsigned long txcnt;
255 unsigned long up_rxcnt;
256 unsigned long up_txcnt;
257 int modem_status;
258 unsigned char hold_reason;
259};
260
261struct mxser_mon_ext {
262 unsigned long rx_cnt[32];
263 unsigned long tx_cnt[32];
264 unsigned long up_rxcnt[32];
265 unsigned long up_txcnt[32];
266 int modem_status[32];
267
268 long baudrate[32];
269 int databits[32];
270 int stopbits[32];
271 int parity[32];
272 int flowctrl[32];
273 int fifo[32];
274 int iftype[32];
275};
8ea2c2ec 276
1da177e4
LT		 277struct mxser_hwconf {
278 int board_type;
279 int ports;
280 int irq;
281 int vector;
282 int vector_mask;
283 int uart_type;
284 int ioaddr[MXSER_PORTS_PER_BOARD];
285 int baud_base[MXSER_PORTS_PER_BOARD];
286 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 287 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
288 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
289 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 290};
291
292struct mxser_struct {
293 int port;
294 int base; /* port base address */
295 int irq; /* port using irq no. */
296 int vector; /* port irq vector */
297 int vectormask; /* port vector mask */
298 int rx_high_water;
299 int rx_trigger; /* Rx fifo trigger level */
300 int rx_low_water;
301 int baud_base; /* max. speed */
302 int flags; /* defined in tty.h */
303 int type; /* UART type */
304 struct tty_struct *tty;
305 int read_status_mask;
306 int ignore_status_mask;
307 int xmit_fifo_size;
308 int custom_divisor;
309 int x_char; /* xon/xoff character */
310 int close_delay;
311 unsigned short closing_wait;
312 int IER; /* Interrupt Enable Register */
313 int MCR; /* Modem control register */
314 unsigned long event;
315 int count; /* # of fd on device */
316 int blocked_open; /* # of blocked opens */
1da177e4
LT		 317 unsigned char *xmit_buf;
318 int xmit_head;
319 int xmit_tail;
320 int xmit_cnt;
321 struct work_struct tqueue;
606d099c
AC		 322 struct ktermios normal_termios;
323 struct ktermios callout_termios;
1da177e4
LT		 324 wait_queue_head_t open_wait;
325 wait_queue_head_t close_wait;
326 wait_queue_head_t delta_msr_wait;
327 struct async_icount icount; /* kernel counters for the 4 input interrupts */
328 int timeout;
8ea2c2ec
JJ		 329 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
330 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
331 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 332 unsigned char stop_rx;
333 unsigned char ldisc_stop_rx;
334 long realbaud;
335 struct mxser_mon mon_data;
336 unsigned char err_shadow;
337 spinlock_t slock;
338};
339
1da177e4
LT		 340struct mxser_mstatus {
341 tcflag_t cflag;
342 int cts;
343 int dsr;
344 int ri;
345 int dcd;
346};
347
348static struct mxser_mstatus GMStatus[MXSER_PORTS];
349
350static int mxserBoardCAP[MXSER_BOARDS] = {
351 0, 0, 0, 0
8ea2c2ec 352 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 353};
354
355static struct tty_driver *mxvar_sdriver;
356static struct mxser_struct mxvar_table[MXSER_PORTS];
357static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
606d099c
AC		 358static struct ktermios *mxvar_termios[MXSER_PORTS + 1];
359static struct ktermios *mxvar_termios_locked[MXSER_PORTS + 1];
1da177e4
LT		 360static struct mxser_log mxvar_log;
361static int mxvar_diagflag;
362static unsigned char mxser_msr[MXSER_PORTS + 1];
363static struct mxser_mon_ext mon_data_ext;
364static int mxser_set_baud_method[MXSER_PORTS + 1];
365static spinlock_t gm_lock;
366
367/*
368 * This is used to figure out the divisor speeds and the timeouts
369 */
370
371static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
372
373/*
374 * static functions:
375 */
376
377static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
378static int mxser_init(void);
379
8ea2c2ec 380/* static void mxser_poll(unsigned long); */
1da177e4 381static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
c4028958 382static void mxser_do_softint(struct work_struct *);
1da177e4
LT		 383static int mxser_open(struct tty_struct *, struct file *);
384static void mxser_close(struct tty_struct *, struct file *);
385static int mxser_write(struct tty_struct *, const unsigned char *, int);
386static int mxser_write_room(struct tty_struct *);
387static void mxser_flush_buffer(struct tty_struct *);
388static int mxser_chars_in_buffer(struct tty_struct *);
389static void mxser_flush_chars(struct tty_struct *);
390static void mxser_put_char(struct tty_struct *, unsigned char);
391static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
392static int mxser_ioctl_special(unsigned int, void __user *);
393static void mxser_throttle(struct tty_struct *);
394static void mxser_unthrottle(struct tty_struct *);
606d099c 395static void mxser_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT		 396static void mxser_stop(struct tty_struct *);
397static void mxser_start(struct tty_struct *);
398static void mxser_hangup(struct tty_struct *);
399static void mxser_rs_break(struct tty_struct *, int);
7d12e780 400static irqreturn_t mxser_interrupt(int, void *);
1da177e4
LT		 401static void mxser_receive_chars(struct mxser_struct *, int *);
402static void mxser_transmit_chars(struct mxser_struct *);
403static void mxser_check_modem_status(struct mxser_struct *, int);
404static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
405static int mxser_startup(struct mxser_struct *);
406static void mxser_shutdown(struct mxser_struct *);
606d099c 407static int mxser_change_speed(struct mxser_struct *, struct ktermios *old_termios);
1da177e4
LT		 408static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
409static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
410static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
411static void mxser_send_break(struct mxser_struct *, int);
412static int mxser_tiocmget(struct tty_struct *, struct file *);
413static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
414static int mxser_set_baud(struct mxser_struct *info, long newspd);
415static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
416
417static void mxser_startrx(struct tty_struct *tty);
418static void mxser_stoprx(struct tty_struct *tty);
419
b8cc5549 420#ifdef CONFIG_PCI
1da177e4
LT		 421static int CheckIsMoxaMust(int io)
422{
423 u8 oldmcr, hwid;
424 int i;
425
426 outb(0, io + UART_LCR);
427 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
428 oldmcr = inb(io + UART_MCR);
429 outb(0, io + UART_MCR);
430 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
431 if ((hwid = inb(io + UART_MCR)) != 0) {
432 outb(oldmcr, io + UART_MCR);
8ea2c2ec 433 return MOXA_OTHER_UART;
1da177e4
LT		 434 }
435
436 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
437 for (i = 0; i < UART_TYPE_NUM; i++) {
438 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 439 return (int)hwid;
1da177e4
LT		 440 }
441 return MOXA_OTHER_UART;
442}
b8cc5549 443#endif
1da177e4 444
8ea2c2ec 445/* above is modified by Victor Yu. 08-15-2002 */
1da177e4 446
b68e31d0 447static const struct tty_operations mxser_ops = {
1da177e4
LT		 448 .open = mxser_open,
449 .close = mxser_close,
450 .write = mxser_write,
451 .put_char = mxser_put_char,
452 .flush_chars = mxser_flush_chars,
453 .write_room = mxser_write_room,
454 .chars_in_buffer = mxser_chars_in_buffer,
455 .flush_buffer = mxser_flush_buffer,
456 .ioctl = mxser_ioctl,
457 .throttle = mxser_throttle,
458 .unthrottle = mxser_unthrottle,
459 .set_termios = mxser_set_termios,
460 .stop = mxser_stop,
461 .start = mxser_start,
462 .hangup = mxser_hangup,
57432345
KS		 463 .break_ctl = mxser_rs_break,
464 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 465 .tiocmget = mxser_tiocmget,
466 .tiocmset = mxser_tiocmset,
467};
468
469/*
470 * The MOXA Smartio/Industio serial driver boot-time initialization code!
471 */
472
473static int __init mxser_module_init(void)
474{
475 int ret;
476
477 if (verbose)
478 printk(KERN_DEBUG "Loading module mxser ...\n");
479 ret = mxser_init();
480 if (verbose)
481 printk(KERN_DEBUG "Done.\n");
482 return ret;
483}
484
485static void __exit mxser_module_exit(void)
486{
64698b69 487 int i, err;
1da177e4
LT		 488
489 if (verbose)
490 printk(KERN_DEBUG "Unloading module mxser ...\n");
491
64698b69
KS		 492 err = tty_unregister_driver(mxvar_sdriver);
493 if (!err)
494 put_tty_driver(mxvar_sdriver);
495 else
1da177e4
LT		 496 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
497
498 for (i = 0; i < MXSER_BOARDS; i++) {
499 struct pci_dev *pdev;
500
501 if (mxsercfg[i].board_type == -1)
502 continue;
503 else {
504 pdev = mxsercfg[i].pciInfo.pdev;
505 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 506 if (pdev != NULL) { /* PCI */
1da177e4
LT		 507 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
508 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
1187ece3 509 pci_dev_put(pdev);
1da177e4
LT		 510 } else {
511 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
512 release_region(mxsercfg[i].vector, 1);
513 }
514 }
515 }
516 if (verbose)
517 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 518}
519
520static void process_txrx_fifo(struct mxser_struct *info)
521{
522 int i;
523
524 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
525 info->rx_trigger = 1;
526 info->rx_high_water = 1;
527 info->rx_low_water = 1;
528 info->xmit_fifo_size = 1;
529 } else {
530 for (i = 0; i < UART_INFO_NUM; i++) {
531 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
532 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
533 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
534 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
535 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
536 break;
537 }
538 }
539 }
540}
541
542static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
543{
544 struct mxser_struct *info;
545 int retval;
546 int i, n;
547
548 n = board * MXSER_PORTS_PER_BOARD;
549 info = &mxvar_table[n];
550 /*if (verbose) */ {
ae25f8ec 551 printk(KERN_DEBUG " ttyMI%d - ttyMI%d ",
8ea2c2ec
JJ		 552 n, n + hwconf->ports - 1);
553 printk(" max. baud rate = %d bps.\n",
554 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 555 }
556
557 for (i = 0; i < hwconf->ports; i++, n++, info++) {
558 info->port = n;
559 info->base = hwconf->ioaddr[i];
560 info->irq = hwconf->irq;
561 info->vector = hwconf->vector;
562 info->vectormask = hwconf->vector_mask;
8ea2c2ec 563 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 564 info->stop_rx = 0;
565 info->ldisc_stop_rx = 0;
566
567 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 568 /* Enhance mode enabled here */
1da177e4
LT		 569 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
570 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
571 }
572
573 info->flags = ASYNC_SHARE_IRQ;
574 info->type = hwconf->uart_type;
575 info->baud_base = hwconf->baud_base[i];
576
577 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
578
579 process_txrx_fifo(info);
580
581
582 info->custom_divisor = hwconf->baud_base[i] * 16;
583 info->close_delay = 5 * HZ / 10;
584 info->closing_wait = 30 * HZ;
c4028958 585 INIT_WORK(&info->tqueue, mxser_do_softint);
1da177e4
LT		 586 info->normal_termios = mxvar_sdriver->init_termios;
587 init_waitqueue_head(&info->open_wait);
588 init_waitqueue_head(&info->close_wait);
589 init_waitqueue_head(&info->delta_msr_wait);
590 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
591 info->err_shadow = 0;
592 spin_lock_init(&info->slock);
593 }
594 /*
595 * Allocate the IRQ if necessary
596 */
597
598
599 /* before set INT ISR, disable all int */
600 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 601 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
602 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 603 }
604
605 n = board * MXSER_PORTS_PER_BOARD;
606 info = &mxvar_table[n];
607
8ea2c2ec
JJ		 608 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
609 "mxser", info);
1da177e4 610 if (retval) {
8ea2c2ec
JJ		 611 printk(KERN_ERR "Board %d: %s",
612 board, mxser_brdname[hwconf->board_type - 1]);
613 printk(" Request irq failed, IRQ (%d) may conflict with"
614 " another device.\n", info->irq);
1da177e4
LT		 615 return retval;
616 }
617 return 0;
618}
619
1da177e4
LT		 620static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
621{
622 mxsercfg[board] = *hwconf;
623}
624
625#ifdef CONFIG_PCI
626static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
627{
628 int i, j;
8ea2c2ec 629 /* unsigned int val; */
1da177e4
LT		 630 unsigned int ioaddress;
631 struct pci_dev *pdev = hwconf->pciInfo.pdev;
632
8ea2c2ec 633 /* io address */
1da177e4
LT		 634 hwconf->board_type = board_type;
635 hwconf->ports = mxser_numports[board_type - 1];
636 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 637 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
638 "mxser(IO)");
1da177e4 639
8ea2c2ec 640 for (i = 0; i < hwconf->ports; i++)
1da177e4 641 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 642
8ea2c2ec 643 /* vector */
1da177e4 644 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 645 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
646 "mxser(vector)");
1da177e4
LT		 647 hwconf->vector = ioaddress;
648
8ea2c2ec 649 /* irq */
1da177e4
LT		 650 hwconf->irq = hwconf->pciInfo.pdev->irq;
651
652 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
653 hwconf->uart_type = PORT_16550A;
654 hwconf->vector_mask = 0;
655
656
657 for (i = 0; i < hwconf->ports; i++) {
658 for (j = 0; j < UART_INFO_NUM; j++) {
659 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
660 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
661
8ea2c2ec 662 /* exception....CP-102 */
1da177e4
LT		 663 if (board_type == MXSER_BOARD_CP102)
664 hwconf->MaxCanSetBaudRate[i] = 921600;
665 break;
666 }
667 }
668 }
669
670 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
671 for (i = 0; i < hwconf->ports; i++) {
672 if (i < 4)
673 hwconf->opmode_ioaddr[i] = ioaddress + 4;
674 else
675 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
676 }
8ea2c2ec
JJ		 677 outb(0, ioaddress + 4); /* default set to RS232 mode */
678 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 679 }
680
681 for (i = 0; i < hwconf->ports; i++) {
682 hwconf->vector_mask |= (1 << i);
683 hwconf->baud_base[i] = 921600;
684 }
8ea2c2ec 685 return 0;
1da177e4
LT		 686}
687#endif
688
689static int mxser_init(void)
690{
691 int i, m, retval, b, n;
1da177e4
LT		 692 struct pci_dev *pdev = NULL;
693 int index;
694 unsigned char busnum, devnum;
695 struct mxser_hwconf hwconf;
696
697 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
698 if (!mxvar_sdriver)
699 return -ENOMEM;
700 spin_lock_init(&gm_lock);
701
702 for (i = 0; i < MXSER_BOARDS; i++) {
703 mxsercfg[i].board_type = -1;
704 }
705
8ea2c2ec
JJ		 706 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
707 MXSER_VERSION);
1da177e4
LT		 708
709 /* Initialize the tty_driver structure */
710 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
31f87cf4 711 mxvar_sdriver->owner = THIS_MODULE;
1da177e4 712 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
ae25f8ec 713 mxvar_sdriver->name = "ttyMI";
1da177e4
LT		 714 mxvar_sdriver->major = ttymajor;
715 mxvar_sdriver->minor_start = 0;
716 mxvar_sdriver->num = MXSER_PORTS + 1;
717 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
718 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
719 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 720 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
606d099c
AC		 721 mxvar_sdriver->init_termios.c_ispeed = 9600;
722 mxvar_sdriver->init_termios.c_ospeed = 9600;
1da177e4
LT		 723 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
724 tty_set_operations(mxvar_sdriver, &mxser_ops);
725 mxvar_sdriver->ttys = mxvar_tty;
726 mxvar_sdriver->termios = mxvar_termios;
727 mxvar_sdriver->termios_locked = mxvar_termios_locked;
728
1da177e4
LT		 729 mxvar_diagflag = 0;
730 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
731 memset(&mxvar_log, 0, sizeof(struct mxser_log));
732
733 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
734 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
735 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
736 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
737
738 m = 0;
739 /* Start finding ISA boards here */
740 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
741 int cap;
8ea2c2ec 742
1da177e4
LT		 743 if (!(cap = mxserBoardCAP[b]))
744 continue;
745
746 retval = mxser_get_ISA_conf(cap, &hwconf);
747
748 if (retval != 0)
8ea2c2ec
JJ		 749 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
750 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 751
752 if (retval <= 0) {
753 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 754 printk(KERN_ERR "Invalid interrupt number, "
755 "board not configured\n");
1da177e4 756 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 757 printk(KERN_ERR "Invalid interrupt number, "
758 "board not configured\n");
1da177e4 759 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 760 printk(KERN_ERR "Invalid interrupt vector, "
761 "board not configured\n");
1da177e4 762 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 763 printk(KERN_ERR "Invalid I/O address, "
764 "board not configured\n");
1da177e4
LT		 765
766 continue;
767 }
768
769 hwconf.pciInfo.busNum = 0;
770 hwconf.pciInfo.devNum = 0;
771 hwconf.pciInfo.pdev = NULL;
772
773 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 774 /*
775 * init mxsercfg first,
776 * or mxsercfg data is not correct on ISR.
777 */
778 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 779 if (mxser_initbrd(m, &hwconf) < 0)
780 continue;
781
1da177e4
LT		 782 m++;
783 }
784
785 /* Start finding ISA boards from module arg */
786 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
787 int cap;
8ea2c2ec 788
1da177e4
LT		 789 if (!(cap = ioaddr[b]))
790 continue;
791
792 retval = mxser_get_ISA_conf(cap, &hwconf);
793
794 if (retval != 0)
8ea2c2ec
JJ		 795 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
796 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 797
798 if (retval <= 0) {
799 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 800 printk(KERN_ERR "Invalid interrupt number, "
801 "board not configured\n");
1da177e4 802 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 803 printk(KERN_ERR "Invalid interrupt number, "
804 "board not configured\n");
1da177e4 805 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 806 printk(KERN_ERR "Invalid interrupt vector, "
807 "board not configured\n");
1da177e4 808 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 809 printk(KERN_ERR "Invalid I/O address, "
810 "board not configured\n");
1da177e4
LT		 811
812 continue;
813 }
814
815 hwconf.pciInfo.busNum = 0;
816 hwconf.pciInfo.devNum = 0;
817 hwconf.pciInfo.pdev = NULL;
818
819 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 820 /*
821 * init mxsercfg first,
822 * or mxsercfg data is not correct on ISR.
823 */
824 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 825 if (mxser_initbrd(m, &hwconf) < 0)
826 continue;
827
828 m++;
829 }
830
831 /* start finding PCI board here */
832#ifdef CONFIG_PCI
fe971071 833 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 834 index = 0;
835 b = 0;
836 while (b < n) {
1187ece3 837 pdev = pci_get_device(mxser_pcibrds[b].vendor,
8ea2c2ec 838 mxser_pcibrds[b].device, pdev);
1187ece3 839 if (pdev == NULL) {
1da177e4
LT		 840 b++;
841 continue;
842 }
843 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
844 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
845 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 846 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
847 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
848 busnum, devnum >> 3);
1da177e4 849 index++;
8ea2c2ec
JJ		 850 if (m >= MXSER_BOARDS)
851 printk(KERN_ERR
852 "Too many Smartio/Industio family boards find "
853 "(maximum %d), board not configured\n",
854 MXSER_BOARDS);
855 else {
1da177e4 856 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 857 printk(KERN_ERR "Moxa SmartI/O PCI enable "
858 "fail !\n");
1da177e4
LT		 859 continue;
860 }
8ea2c2ec
JJ		 861 retval = mxser_get_PCI_conf(busnum, devnum,
862 (int)mxser_pcibrds[b].driver_data,
863 &hwconf);
1da177e4
LT		 864 if (retval < 0) {
865 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 866 printk(KERN_ERR
867 "Invalid interrupt number, "
868 "board not configured\n");
1da177e4 869 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 870 printk(KERN_ERR
871 "Invalid interrupt number, "
872 "board not configured\n");
1da177e4 873 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 874 printk(KERN_ERR
875 "Invalid interrupt vector, "
876 "board not configured\n");
1da177e4 877 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 878 printk(KERN_ERR
879 "Invalid I/O address, "
880 "board not configured\n");
1da177e4
LT		 881 continue;
882 }
883 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 884 /* init mxsercfg first,
885 * or mxsercfg data is not correct on ISR.
886 */
887 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 888 if (mxser_initbrd(m, &hwconf) < 0)
889 continue;
890 m++;
1187ece3
AC		 891 /* Keep an extra reference if we succeeded. It will
892 be returned at unload time */
893 pci_dev_get(pdev);
1da177e4
LT		 894 }
895 }
896#endif
897
64698b69
KS		 898 retval = tty_register_driver(mxvar_sdriver);
899 if (retval) {
8ea2c2ec
JJ		 900 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
901 " driver !\n");
64698b69 902 put_tty_driver(mxvar_sdriver);
1da177e4 903
1da177e4
LT		 904 for (i = 0; i < MXSER_BOARDS; i++) {
905 if (mxsercfg[i].board_type == -1)
906 continue;
907 else {
908 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 909 /* todo: release io, vector */
1da177e4
LT		 910 }
911 }
64698b69 912 return retval;
1da177e4
LT		 913 }
914
64698b69 915 return 0;
1da177e4
LT		 916}
917
c4028958 918static void mxser_do_softint(struct work_struct *work)
1da177e4 919{
c4028958
DH		 920 struct mxser_struct *info =
921 container_of(work, struct mxser_struct, tqueue);
1da177e4
LT		 922 struct tty_struct *tty;
923
924 tty = info->tty;
925
926 if (tty) {
927 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
928 tty_wakeup(tty);
929 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
930 tty_hangup(tty);
931 }
932}
933
934static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
935{
936 unsigned char status = 0;
937
938 status = inb(baseaddr + UART_MSR);
939
940 mxser_msr[port] &= 0x0F;
941 mxser_msr[port] |= status;
942 status = mxser_msr[port];
943 if (mode)
944 mxser_msr[port] = 0;
945
946 return status;
947}
948
949/*
950 * This routine is called whenever a serial port is opened. It
951 * enables interrupts for a serial port, linking in its async structure into
952 * the IRQ chain. It also performs the serial-specific
953 * initialization for the tty structure.
954 */
955static int mxser_open(struct tty_struct *tty, struct file *filp)
956{
957 struct mxser_struct *info;
958 int retval, line;
959
6f08b72c
KS		 960 /* initialize driver_data in case something fails */
961 tty->driver_data = NULL;
962
1da177e4
LT		 963 line = tty->index;
964 if (line == MXSER_PORTS)
965 return 0;
966 if (line < 0 || line > MXSER_PORTS)
967 return -ENODEV;
968 info = mxvar_table + line;
969 if (!info->base)
8ea2c2ec 970 return -ENODEV;
1da177e4
LT		 971
972 tty->driver_data = info;
973 info->tty = tty;
974 /*
975 * Start up serial port
976 */
977 retval = mxser_startup(info);
978 if (retval)
8ea2c2ec 979 return retval;
1da177e4
LT		 980
981 retval = mxser_block_til_ready(tty, filp, info);
982 if (retval)
8ea2c2ec 983 return retval;
1da177e4
LT		 984
985 info->count++;
986
987 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
988 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
989 *tty->termios = info->normal_termios;
990 else
991 *tty->termios = info->callout_termios;
992 mxser_change_speed(info, NULL);
993 }
994
8ea2c2ec
JJ		 995 /*
996 status = mxser_get_msr(info->base, 0, info->port);
997 mxser_check_modem_status(info, status);
998 */
1da177e4 999
8cddd707 1000 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1001 tty->low_latency = 1;
1002 return 0;
1003}
1004
1005/*
1006 * This routine is called when the serial port gets closed. First, we
1007 * wait for the last remaining data to be sent. Then, we unlink its
1008 * async structure from the interrupt chain if necessary, and we free
1009 * that IRQ if nothing is left in the chain.
1010 */
1011static void mxser_close(struct tty_struct *tty, struct file *filp)
1012{
56e139f6 1013 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1014
1015 unsigned long timeout;
1016 unsigned long flags;
1017 struct tty_ldisc *ld;
1018
1019 if (tty->index == MXSER_PORTS)
1020 return;
1021 if (!info)
6f08b72c 1022 return;
1da177e4
LT		 1023
1024 spin_lock_irqsave(&info->slock, flags);
1025
1026 if (tty_hung_up_p(filp)) {
1027 spin_unlock_irqrestore(&info->slock, flags);
1028 return;
1029 }
1030 if ((tty->count == 1) && (info->count != 1)) {
1031 /*
1032 * Uh, oh. tty->count is 1, which means that the tty
1033 * structure will be freed. Info->count should always
1034 * be one in these conditions. If it's greater than
1035 * one, we've got real problems, since it means the
1036 * serial port won't be shutdown.
1037 */
8ea2c2ec
JJ		 1038 printk(KERN_ERR "mxser_close: bad serial port count; "
1039 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1040 info->count = 1;
1041 }
1042 if (--info->count < 0) {
8ea2c2ec
JJ		 1043 printk(KERN_ERR "mxser_close: bad serial port count for "
1044 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1045 info->count = 0;
1046 }
1047 if (info->count) {
1048 spin_unlock_irqrestore(&info->slock, flags);
1049 return;
1050 }
1051 info->flags |= ASYNC_CLOSING;
1052 spin_unlock_irqrestore(&info->slock, flags);
1053 /*
1054 * Save the termios structure, since this port may have
1055 * separate termios for callout and dialin.
1056 */
1057 if (info->flags & ASYNC_NORMAL_ACTIVE)
1058 info->normal_termios = *tty->termios;
1059 /*
1060 * Now we wait for the transmit buffer to clear; and we notify
1061 * the line discipline to only process XON/XOFF characters.
1062 */
1063 tty->closing = 1;
1064 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1065 tty_wait_until_sent(tty, info->closing_wait);
1066 /*
1067 * At this point we stop accepting input. To do this, we
1068 * disable the receive line status interrupts, and tell the
1069 * interrupt driver to stop checking the data ready bit in the
1070 * line status register.
1071 */
1072 info->IER &= ~UART_IER_RLSI;
1073 if (info->IsMoxaMustChipFlag)
1074 info->IER &= ~MOXA_MUST_RECV_ISR;
1075/* by William
1076 info->read_status_mask &= ~UART_LSR_DR;
1077*/
1078 if (info->flags & ASYNC_INITIALIZED) {
1079 outb(info->IER, info->base + UART_IER);
1080 /*
1081 * Before we drop DTR, make sure the UART transmitter
1082 * has completely drained; this is especially
1083 * important if there is a transmit FIFO!
1084 */
1085 timeout = jiffies + HZ;
1086 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1087 schedule_timeout_interruptible(5);
1da177e4
LT		 1088 if (time_after(jiffies, timeout))
1089 break;
1090 }
1091 }
1092 mxser_shutdown(info);
1093
1094 if (tty->driver->flush_buffer)
1095 tty->driver->flush_buffer(tty);
1096
1097 ld = tty_ldisc_ref(tty);
1098 if (ld) {
8ea2c2ec 1099 if (ld->flush_buffer)
1da177e4
LT		 1100 ld->flush_buffer(tty);
1101 tty_ldisc_deref(ld);
1102 }
1103
1104 tty->closing = 0;
1105 info->event = 0;
1106 info->tty = NULL;
1107 if (info->blocked_open) {
da4cd8df
NA		 1108 if (info->close_delay)
1109 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1110 wake_up_interruptible(&info->open_wait);
1111 }
1112
1113 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1114 wake_up_interruptible(&info->close_wait);
1115
1116}
1117
1118static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1119{
1120 int c, total = 0;
56e139f6 1121 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1122 unsigned long flags;
1123
8a7f7c93 1124 if (!info->xmit_buf)
8ea2c2ec 1125 return 0;
1da177e4
LT		 1126
1127 while (1) {
8ea2c2ec
JJ		 1128 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1129 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1130 if (c <= 0)
1131 break;
1132
1133 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1134 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1135 info->xmit_head = (info->xmit_head + c) &
1136 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1137 info->xmit_cnt += c;
1138 spin_unlock_irqrestore(&info->slock, flags);
1139
1140 buf += c;
1141 count -= c;
1142 total += c;
1da177e4
LT		 1143 }
1144
1145 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1146 if (!tty->hw_stopped ||
1147 (info->type == PORT_16550A) ||
1148 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1149 spin_lock_irqsave(&info->slock, flags);
1150 info->IER |= UART_IER_THRI;
1151 outb(info->IER, info->base + UART_IER);
1152 spin_unlock_irqrestore(&info->slock, flags);
1153 }
1154 }
1155 return total;
1156}
1157
1158static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1159{
56e139f6 1160 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1161 unsigned long flags;
1162
8a7f7c93 1163 if (!info->xmit_buf)
1da177e4
LT		 1164 return;
1165
1166 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1167 return;
1168
1169 spin_lock_irqsave(&info->slock, flags);
1170 info->xmit_buf[info->xmit_head++] = ch;
1171 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1172 info->xmit_cnt++;
1173 spin_unlock_irqrestore(&info->slock, flags);
1174 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1175 if (!tty->hw_stopped ||
1176 (info->type == PORT_16550A) ||
1177 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1178 spin_lock_irqsave(&info->slock, flags);
1179 info->IER |= UART_IER_THRI;
1180 outb(info->IER, info->base + UART_IER);
1181 spin_unlock_irqrestore(&info->slock, flags);
1182 }
1183 }
1184}
1185
1186
1187static void mxser_flush_chars(struct tty_struct *tty)
1188{
56e139f6 1189 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1190 unsigned long flags;
1191
8ea2c2ec
JJ		 1192 if (info->xmit_cnt <= 0 ||
1193 tty->stopped ||
1194 !info->xmit_buf ||
1195 (tty->hw_stopped &&
1196 (info->type != PORT_16550A) &&
1197 (!info->IsMoxaMustChipFlag)
1198 ))
1da177e4
LT		 1199 return;
1200
1201 spin_lock_irqsave(&info->slock, flags);
1202
1203 info->IER |= UART_IER_THRI;
1204 outb(info->IER, info->base + UART_IER);
1205
1206 spin_unlock_irqrestore(&info->slock, flags);
1207}
1208
1209static int mxser_write_room(struct tty_struct *tty)
1210{
56e139f6 1211 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1212 int ret;
1213
1214 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1215 if (ret < 0)
1216 ret = 0;
8ea2c2ec 1217 return ret;
1da177e4
LT		 1218}
1219
1220static int mxser_chars_in_buffer(struct tty_struct *tty)
1221{
56e139f6 1222 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1223 return info->xmit_cnt;
1224}
1225
1226static void mxser_flush_buffer(struct tty_struct *tty)
1227{
56e139f6 1228 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1229 char fcr;
1230 unsigned long flags;
1231
1232
1233 spin_lock_irqsave(&info->slock, flags);
1234 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1235
1236 /* below added by shinhay */
1237 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1238 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1239 info->base + UART_FCR);
1da177e4
LT		 1240 outb(fcr, info->base + UART_FCR);
1241
1242 spin_unlock_irqrestore(&info->slock, flags);
1243 /* above added by shinhay */
1244
b963a844 1245 tty_wakeup(tty);
1da177e4
LT		 1246}
1247
1248static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1249{
56e139f6 1250 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1251 int retval;
1252 struct async_icount cprev, cnow; /* kernel counter temps */
1253 struct serial_icounter_struct __user *p_cuser;
1254 unsigned long templ;
1255 unsigned long flags;
1256 void __user *argp = (void __user *)arg;
1257
1258 if (tty->index == MXSER_PORTS)
8ea2c2ec 1259 return mxser_ioctl_special(cmd, argp);
1da177e4 1260
8ea2c2ec 1261 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1262 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1263 int opmode, p;
1264 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1265 int shiftbit;
1266 unsigned char val, mask;
1267
1268 p = info->port % 4;
1269 if (cmd == MOXA_SET_OP_MODE) {
1270 if (get_user(opmode, (int __user *) argp))
1271 return -EFAULT;
8ea2c2ec
JJ		 1272 if (opmode != RS232_MODE &&
1273 opmode != RS485_2WIRE_MODE &&
1274 opmode != RS422_MODE &&
1275 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1276 return -EFAULT;
1277 mask = ModeMask[p];
1278 shiftbit = p * 2;
1279 val = inb(info->opmode_ioaddr);
1280 val &= mask;
1281 val |= (opmode << shiftbit);
1282 outb(val, info->opmode_ioaddr);
1283 } else {
1284 shiftbit = p * 2;
1285 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1286 opmode &= OP_MODE_MASK;
1287 if (copy_to_user(argp, &opmode, sizeof(int)))
1288 return -EFAULT;
1289 }
1290 return 0;
1291 }
8ea2c2ec 1292 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1293
1294 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1295 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1296 return -EIO;
1da177e4
LT		 1297 }
1298 switch (cmd) {
1299 case TCSBRK: /* SVID version: non-zero arg --> no break */
1300 retval = tty_check_change(tty);
1301 if (retval)
8ea2c2ec 1302 return retval;
1da177e4
LT		 1303 tty_wait_until_sent(tty, 0);
1304 if (!arg)
1305 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1306 return 0;
1da177e4
LT		 1307 case TCSBRKP: /* support for POSIX tcsendbreak() */
1308 retval = tty_check_change(tty);
1309 if (retval)
8ea2c2ec 1310 return retval;
1da177e4
LT		 1311 tty_wait_until_sent(tty, 0);
1312 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1313 return 0;
1da177e4 1314 case TIOCGSOFTCAR:
8ea2c2ec 1315 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1316 case TIOCSSOFTCAR:
1317 if (get_user(templ, (unsigned long __user *) argp))
1318 return -EFAULT;
1319 arg = templ;
1320 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1321 return 0;
1da177e4
LT		 1322 case TIOCGSERIAL:
1323 return mxser_get_serial_info(info, argp);
1324 case TIOCSSERIAL:
1325 return mxser_set_serial_info(info, argp);
1326 case TIOCSERGETLSR: /* Get line status register */
1327 return mxser_get_lsr_info(info, argp);
1328 /*
1329 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1330 * - mask passed in arg for lines of interest
1331 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1332 * Caller should use TIOCGICOUNT to see which one it was
1333 */
fc83815c
JS		 1334 case TIOCMIWAIT:
1335 spin_lock_irqsave(&info->slock, flags);
1336 cnow = info->icount; /* note the counters on entry */
1337 spin_unlock_irqrestore(&info->slock, flags);
1338
1339 wait_event_interruptible(info->delta_msr_wait, ({
1340 cprev = cnow;
1da177e4 1341 spin_lock_irqsave(&info->slock, flags);
fc83815c 1342 cnow = info->icount; /* atomic copy */
1da177e4
LT		 1343 spin_unlock_irqrestore(&info->slock, flags);
1344
fc83815c
JS		 1345 ((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
1346 ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
1347 ((arg & TIOCM_CD) && (cnow.dcd != cprev.dcd)) ||
1348 ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts));
1349 }));
1350 break;
1da177e4
LT		 1351 /*
1352 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1353 * Return: write counters to the user passed counter struct
1354 * NB: both 1->0 and 0->1 transitions are counted except for
1355 * RI where only 0->1 is counted.
1356 */
1357 case TIOCGICOUNT:
1358 spin_lock_irqsave(&info->slock, flags);
1359 cnow = info->icount;
1360 spin_unlock_irqrestore(&info->slock, flags);
1361 p_cuser = argp;
1362 /* modified by casper 1/11/2000 */
1363 if (put_user(cnow.frame, &p_cuser->frame))
1364 return -EFAULT;
1365 if (put_user(cnow.brk, &p_cuser->brk))
1366 return -EFAULT;
1367 if (put_user(cnow.overrun, &p_cuser->overrun))
1368 return -EFAULT;
1369 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1370 return -EFAULT;
1371 if (put_user(cnow.parity, &p_cuser->parity))
1372 return -EFAULT;
1373 if (put_user(cnow.rx, &p_cuser->rx))
1374 return -EFAULT;
1375 if (put_user(cnow.tx, &p_cuser->tx))
1376 return -EFAULT;
1377 put_user(cnow.cts, &p_cuser->cts);
1378 put_user(cnow.dsr, &p_cuser->dsr);
1379 put_user(cnow.rng, &p_cuser->rng);
1380 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1381 return 0;
1382 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1383 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1384 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1385 info->mon_data.rxcnt = 0;
1386 info->mon_data.txcnt = 0;
1387 return 0;
1388 }
8ea2c2ec 1389/* (above) added by James. */
1da177e4
LT		 1390 case MOXA_ASPP_SETBAUD:{
1391 long baud;
8ea2c2ec 1392 if (get_user(baud, (long __user *)argp))
1da177e4 1393 return -EFAULT;
f29e37c0
AC		 1394 if (mxser_set_baud(info, baud) == -1)
1395 return -1;
1da177e4
LT		 1396 return 0;
1397 }
1398 case MOXA_ASPP_GETBAUD:
1399 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1400 return -EFAULT;
1401
1402 return 0;
1403
1404 case MOXA_ASPP_OQUEUE:{
1405 int len, lsr;
1406
1407 len = mxser_chars_in_buffer(tty);
1408
1409 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1410
1411 len += (lsr ? 0 : 1);
1412
1413 if (copy_to_user(argp, &len, sizeof(int)))
1414 return -EFAULT;
1415
1416 return 0;
1417 }
8ea2c2ec 1418 case MOXA_ASPP_MON: {
1da177e4 1419 int mcr, status;
8ea2c2ec
JJ		 1420
1421 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1422
1423 status = mxser_get_msr(info->base, 1, info->port, info);
1424 mxser_check_modem_status(info, status);
1425
1426 mcr = inb(info->base + UART_MCR);
1427 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1428 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1429 else
1430 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1431
1432 if (mcr & MOXA_MUST_MCR_TX_XON)
1433 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1434 else
1435 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1436
1437 if (info->tty->hw_stopped)
1438 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1439 else
1440 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1441
8ea2c2ec
JJ		 1442 if (copy_to_user(argp, &info->mon_data,
1443 sizeof(struct mxser_mon)))
1da177e4
LT		 1444 return -EFAULT;
1445
1446 return 0;
1da177e4
LT		 1447 }
1448
8ea2c2ec
JJ		 1449 case MOXA_ASPP_LSTATUS: {
1450 if (copy_to_user(argp, &info->err_shadow,
1451 sizeof(unsigned char)))
1da177e4
LT		 1452 return -EFAULT;
1453
1454 info->err_shadow = 0;
1455 return 0;
1da177e4 1456 }
8ea2c2ec 1457 case MOXA_SET_BAUD_METHOD: {
1da177e4 1458 int method;
8ea2c2ec
JJ		 1459
1460 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1461 return -EFAULT;
1462 mxser_set_baud_method[info->port] = method;
1463 if (copy_to_user(argp, &method, sizeof(int)))
1464 return -EFAULT;
1465
1466 return 0;
1467 }
1468 default:
1469 return -ENOIOCTLCMD;
1470 }
1471 return 0;
1472}
1473
1474#ifndef CMSPAR
1475#define CMSPAR 010000000000
1476#endif
1477
1478static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1479{
1480 int i, result, status;
1481
1482 switch (cmd) {
1483 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1484 if (copy_to_user(argp, mxsercfg,
1485 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1486 return -EFAULT;
1487 return 0;
1488 case MOXA_GET_MAJOR:
1489 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1490 return -EFAULT;
1491 return 0;
1492
1493 case MOXA_GET_CUMAJOR:
1494 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1495 return -EFAULT;
1496 return 0;
1497
1498 case MOXA_CHKPORTENABLE:
1499 result = 0;
1500 for (i = 0; i < MXSER_PORTS; i++) {
1501 if (mxvar_table[i].base)
1502 result |= (1 << i);
1503 }
8ea2c2ec 1504 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1505 case MOXA_GETDATACOUNT:
1506 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1507 return -EFAULT;
8ea2c2ec 1508 return 0;
1da177e4
LT		 1509 case MOXA_GETMSTATUS:
1510 for (i = 0; i < MXSER_PORTS; i++) {
1511 GMStatus[i].ri = 0;
1512 if (!mxvar_table[i].base) {
1513 GMStatus[i].dcd = 0;
1514 GMStatus[i].dsr = 0;
1515 GMStatus[i].cts = 0;
1516 continue;
1517 }
1518
1519 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1520 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1521 else
1522 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1523
1524 status = inb(mxvar_table[i].base + UART_MSR);
1525 if (status & 0x80 /*UART_MSR_DCD */ )
1526 GMStatus[i].dcd = 1;
1527 else
1528 GMStatus[i].dcd = 0;
1529
1530 if (status & 0x20 /*UART_MSR_DSR */ )
1531 GMStatus[i].dsr = 1;
1532 else
1533 GMStatus[i].dsr = 0;
1534
1535
1536 if (status & 0x10 /*UART_MSR_CTS */ )
1537 GMStatus[i].cts = 1;
1538 else
1539 GMStatus[i].cts = 0;
1540 }
8ea2c2ec
JJ		 1541 if (copy_to_user(argp, GMStatus,
1542 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1543 return -EFAULT;
1544 return 0;
8ea2c2ec 1545 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1546 int status;
1547 int opmode, p;
1548 int shiftbit;
1549 unsigned cflag, iflag;
1550
1551 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1552 if (!mxvar_table[i].base)
1553 continue;
1554
8ea2c2ec
JJ		 1555 status = mxser_get_msr(mxvar_table[i].base, 0,
1556 i, &(mxvar_table[i]));
1557 /*
1558 mxser_check_modem_status(&mxvar_table[i],
1559 status);
1560 */
1da177e4
LT		 1561 if (status & UART_MSR_TERI)
1562 mxvar_table[i].icount.rng++;
1563 if (status & UART_MSR_DDSR)
1564 mxvar_table[i].icount.dsr++;
1565 if (status & UART_MSR_DDCD)
1566 mxvar_table[i].icount.dcd++;
1567 if (status & UART_MSR_DCTS)
1568 mxvar_table[i].icount.cts++;
1569
1570 mxvar_table[i].mon_data.modem_status = status;
1571 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1572 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1573 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1574 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1575 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1576 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1577
1578 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1579 cflag = mxvar_table[i].normal_termios.c_cflag;
1580 iflag = mxvar_table[i].normal_termios.c_iflag;
1581 } else {
1582 cflag = mxvar_table[i].tty->termios->c_cflag;
1583 iflag = mxvar_table[i].tty->termios->c_iflag;
1584 }
1585
1586 mon_data_ext.databits[i] = cflag & CSIZE;
1587
1588 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1589
1590 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1591
1592 mon_data_ext.flowctrl[i] = 0x00;
1593
1594 if (cflag & CRTSCTS)
1595 mon_data_ext.flowctrl[i] |= 0x03;
1596
1597 if (iflag & (IXON | IXOFF))
1598 mon_data_ext.flowctrl[i] |= 0x0C;
1599
1600 if (mxvar_table[i].type == PORT_16550A)
1601 mon_data_ext.fifo[i] = 1;
1602 else
1603 mon_data_ext.fifo[i] = 0;
1604
1605 p = i % 4;
1606 shiftbit = p * 2;
1607 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1608 opmode &= OP_MODE_MASK;
1609
1610 mon_data_ext.iftype[i] = opmode;
1611
1612 }
1613 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1614 return -EFAULT;
1615
1616 return 0;
1617
1618 }
1619 default:
1620 return -ENOIOCTLCMD;
1621 }
1622 return 0;
1623}
1624
1da177e4
LT		 1625static void mxser_stoprx(struct tty_struct *tty)
1626{
56e139f6 1627 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1628 /* unsigned long flags; */
1da177e4
LT		 1629
1630 info->ldisc_stop_rx = 1;
1631 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1632 /* MX_LOCK(&info->slock); */
1633 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1634 if (info->IsMoxaMustChipFlag) {
1635 info->IER &= ~MOXA_MUST_RECV_ISR;
1636 outb(info->IER, info->base + UART_IER);
1637 } else {
8ea2c2ec 1638 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1639 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1640 /* mask by Victor Yu. 09-02-2002 */
1641 /* outb(info->IER, 0); */
1da177e4
LT		 1642 outb(0, info->base + UART_IER);
1643 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1644 /* force Tx interrupt */
1645 outb(info->IER, info->base + UART_IER);
1646 } /* add by Victor Yu. 09-02-2002 */
1647 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1648 }
1649
1650 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1651 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1652 info->MCR &= ~UART_MCR_RTS;
1653 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1654 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1655 }
1656}
1657
1658static void mxser_startrx(struct tty_struct *tty)
1659{
56e139f6 1660 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1661 /* unsigned long flags; */
1da177e4
LT		 1662
1663 info->ldisc_stop_rx = 0;
1664 if (I_IXOFF(tty)) {
1665 if (info->x_char)
1666 info->x_char = 0;
1667 else {
8ea2c2ec 1668 /* MX_LOCK(&info->slock); */
1da177e4 1669
8ea2c2ec 1670 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1671 if (info->IsMoxaMustChipFlag) {
1672 info->IER |= MOXA_MUST_RECV_ISR;
1673 outb(info->IER, info->base + UART_IER);
1674 } else {
8ea2c2ec 1675 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1676
1677 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1678 /* mask by Victor Yu. 09-02-2002 */
1679 /* outb(info->IER, 0); */
1680 /* add by Victor Yu. 09-02-2002 */
1681 outb(0, info->base + UART_IER);
1682 /* force Tx interrupt */
1683 info->IER |= UART_IER_THRI;
1da177e4 1684 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1685 } /* add by Victor Yu. 09-02-2002 */
1686 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1687 }
1688 }
1689
1690 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1691 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1692 info->MCR |= UART_MCR_RTS;
1693 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1694 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1695 }
1696}
1697
1698/*
1699 * This routine is called by the upper-layer tty layer to signal that
1700 * incoming characters should be throttled.
1701 */
1702static void mxser_throttle(struct tty_struct *tty)
1703{
8ea2c2ec
JJ		 1704 /* struct mxser_struct *info = tty->driver_data; */
1705 /* unsigned long flags; */
1706
1707 /* MX_LOCK(&info->slock); */
1da177e4 1708 mxser_stoprx(tty);
8ea2c2ec 1709 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1710}
1711
1712static void mxser_unthrottle(struct tty_struct *tty)
1713{
8ea2c2ec
JJ		 1714 /* struct mxser_struct *info = tty->driver_data; */
1715 /* unsigned long flags; */
1716
1717 /* MX_LOCK(&info->slock); */
1da177e4 1718 mxser_startrx(tty);
8ea2c2ec 1719 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1720}
1721
606d099c 1722static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1723{
56e139f6 1724 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1725 unsigned long flags;
1726
7e7d136e 1727 mxser_change_speed(info, old_termios);
1da177e4 1728
7e7d136e
AC		 1729 if ((old_termios->c_cflag & CRTSCTS) &&
1730 !(tty->termios->c_cflag & CRTSCTS)) {
1731 tty->hw_stopped = 0;
1732 mxser_start(tty);
1da177e4
LT		 1733 }
1734
1735/* Handle sw stopped */
8ea2c2ec
JJ		 1736 if ((old_termios->c_iflag & IXON) &&
1737 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1738 tty->stopped = 0;
1739
8ea2c2ec 1740 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1741 if (info->IsMoxaMustChipFlag) {
1742 spin_lock_irqsave(&info->slock, flags);
1743 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1744 spin_unlock_irqrestore(&info->slock, flags);
1745 }
8ea2c2ec 1746 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1747
1748 mxser_start(tty);
1749 }
1750}
1751
1752/*
1753 * mxser_stop() and mxser_start()
1754 *
1755 * This routines are called before setting or resetting tty->stopped.
1756 * They enable or disable transmitter interrupts, as necessary.
1757 */
1758static void mxser_stop(struct tty_struct *tty)
1759{
56e139f6 1760 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1761 unsigned long flags;
1762
1763 spin_lock_irqsave(&info->slock, flags);
1764 if (info->IER & UART_IER_THRI) {
1765 info->IER &= ~UART_IER_THRI;
1766 outb(info->IER, info->base + UART_IER);
1767 }
1768 spin_unlock_irqrestore(&info->slock, flags);
1769}
1770
1771static void mxser_start(struct tty_struct *tty)
1772{
56e139f6 1773 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1774 unsigned long flags;
1775
1776 spin_lock_irqsave(&info->slock, flags);
1777 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1778 info->IER |= UART_IER_THRI;
1779 outb(info->IER, info->base + UART_IER);
1780 }
1781 spin_unlock_irqrestore(&info->slock, flags);
1782}
1783
1784/*
1785 * mxser_wait_until_sent() --- wait until the transmitter is empty
1786 */
1787static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1788{
56e139f6 1789 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1790 unsigned long orig_jiffies, char_time;
1791 int lsr;
1792
1793 if (info->type == PORT_UNKNOWN)
1794 return;
1795
1796 if (info->xmit_fifo_size == 0)
1797 return; /* Just in case.... */
1798
1799 orig_jiffies = jiffies;
1800 /*
1801 * Set the check interval to be 1/5 of the estimated time to
1802 * send a single character, and make it at least 1. The check
1803 * interval should also be less than the timeout.
1804 *
1805 * Note: we have to use pretty tight timings here to satisfy
1806 * the NIST-PCTS.
1807 */
1808 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1809 char_time = char_time / 5;
1810 if (char_time == 0)
1811 char_time = 1;
1812 if (timeout && timeout < char_time)
1813 char_time = timeout;
1814 /*
1815 * If the transmitter hasn't cleared in twice the approximate
1816 * amount of time to send the entire FIFO, it probably won't
1817 * ever clear. This assumes the UART isn't doing flow
1818 * control, which is currently the case. Hence, if it ever
1819 * takes longer than info->timeout, this is probably due to a
1820 * UART bug of some kind. So, we clamp the timeout parameter at
1821 * 2*info->timeout.
1822 */
1823 if (!timeout || timeout > 2 * info->timeout)
1824 timeout = 2 * info->timeout;
1825#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1826 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1827 timeout, char_time);
1da177e4
LT		 1828 printk("jiff=%lu...", jiffies);
1829#endif
1830 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1831#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1832 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1833#endif
da4cd8df 1834 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1835 if (signal_pending(current))
1836 break;
1837 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1838 break;
1839 }
1840 set_current_state(TASK_RUNNING);
1841
1842#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1843 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1844#endif
1845}
1846
1847
1848/*
1849 * This routine is called by tty_hangup() when a hangup is signaled.
1850 */
1851void mxser_hangup(struct tty_struct *tty)
1852{
56e139f6 1853 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1854
1855 mxser_flush_buffer(tty);
1856 mxser_shutdown(info);
1857 info->event = 0;
1858 info->count = 0;
1859 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1860 info->tty = NULL;
1861 wake_up_interruptible(&info->open_wait);
1862}
1863
1864
8ea2c2ec 1865/* added by James 03-12-2004. */
1da177e4
LT		 1866/*
1867 * mxser_rs_break() --- routine which turns the break handling on or off
1868 */
1869static void mxser_rs_break(struct tty_struct *tty, int break_state)
1870{
56e139f6 1871 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1872 unsigned long flags;
1873
1874 spin_lock_irqsave(&info->slock, flags);
1875 if (break_state == -1)
8ea2c2ec
JJ		 1876 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1877 info->base + UART_LCR);
1da177e4 1878 else
8ea2c2ec
JJ		 1879 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1880 info->base + UART_LCR);
1da177e4
LT		 1881 spin_unlock_irqrestore(&info->slock, flags);
1882}
1883
8ea2c2ec 1884/* (above) added by James. */
1da177e4
LT		 1885
1886
1887/*
1888 * This is the serial driver's generic interrupt routine
1889 */
7d12e780 1890static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4
LT		 1891{
1892 int status, iir, i;
1893 struct mxser_struct *info;
1894 struct mxser_struct *port;
1895 int max, irqbits, bits, msr;
1896 int pass_counter = 0;
1897 int handled = IRQ_NONE;
1898
1899 port = NULL;
8ea2c2ec 1900 /* spin_lock(&gm_lock); */
1da177e4
LT		 1901
1902 for (i = 0; i < MXSER_BOARDS; i++) {
1903 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1904 port = dev_id;
1905 break;
1906 }
1907 }
1908
8ea2c2ec 1909 if (i == MXSER_BOARDS)
1da177e4 1910 goto irq_stop;
8ea2c2ec 1911 if (port == 0)
1da177e4 1912 goto irq_stop;
1da177e4
LT		 1913 max = mxser_numports[mxsercfg[i].board_type - 1];
1914 while (1) {
1915 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1916 if (irqbits == port->vectormask)
1da177e4 1917 break;
1da177e4
LT		 1918
1919 handled = IRQ_HANDLED;
1920 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1921 if (irqbits == port->vectormask)
1da177e4 1922 break;
1da177e4
LT		 1923 if (bits & irqbits)
1924 continue;
1925 info = port + i;
1926
8ea2c2ec 1927 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1928 iir = inb(info->base + UART_IIR);
1929 if (iir & UART_IIR_NO_INT)
1930 continue;
1931 iir &= MOXA_MUST_IIR_MASK;
1932 if (!info->tty) {
1933 status = inb(info->base + UART_LSR);
1934 outb(0x27, info->base + UART_FCR);
1935 inb(info->base + UART_MSR);
1936 continue;
1937 }
1da177e4
LT		 1938
1939 /* mask by Victor Yu. 09-13-2002
1940 if ( !info->tty ||
1941 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1942 continue;
1943 */
1944 /* mask by Victor Yu. 09-02-2002
1945 status = inb(info->base + UART_LSR) & info->read_status_mask;
1946 */
1947
8ea2c2ec 1948 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1949 status = inb(info->base + UART_LSR);
1950
8ea2c2ec 1951 if (status & UART_LSR_PE)
1da177e4 1952 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1953 if (status & UART_LSR_FE)
1da177e4 1954 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1955 if (status & UART_LSR_OE)
1da177e4 1956 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 1957 if (status & UART_LSR_BI)
1958 info->err_shadow |= NPPI_NOTIFY_BREAK;
1959
1960 if (info->IsMoxaMustChipFlag) {
1961 /*
1962 if ( (status & 0x02) && !(status & 0x01) ) {
1963 outb(info->base+UART_FCR, 0x23);
1964 continue;
1965 }
1966 */
8ea2c2ec
JJ		 1967 if (iir == MOXA_MUST_IIR_GDA ||
1968 iir == MOXA_MUST_IIR_RDA ||
1969 iir == MOXA_MUST_IIR_RTO ||
1970 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 1971 mxser_receive_chars(info, &status);
1972
1973 } else {
8ea2c2ec 1974 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1975
1976 status &= info->read_status_mask;
1977 if (status & UART_LSR_DR)
1978 mxser_receive_chars(info, &status);
1979 }
1980 msr = inb(info->base + UART_MSR);
1981 if (msr & UART_MSR_ANY_DELTA) {
1982 mxser_check_modem_status(info, msr);
1983 }
8ea2c2ec 1984 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1985 if (info->IsMoxaMustChipFlag) {
1986 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
1987 mxser_transmit_chars(info);
1988 }
1989 } else {
8ea2c2ec 1990 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1991
1992 if (status & UART_LSR_THRE) {
1993/* 8-2-99 by William
1994 if ( info->x_char || (info->xmit_cnt > 0) )
1995*/
1996 mxser_transmit_chars(info);
1997 }
1998 }
1999 }
2000 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2001 break; /* Prevent infinite loops */
2002 }
2003 }
2004
2005 irq_stop:
8ea2c2ec 2006 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2007 return handled;
2008}
2009
2010static void mxser_receive_chars(struct mxser_struct *info, int *status)
2011{
2012 struct tty_struct *tty = info->tty;
2013 unsigned char ch, gdl;
2014 int ignored = 0;
2015 int cnt = 0;
1da177e4
LT		 2016 int recv_room;
2017 int max = 256;
2018 unsigned long flags;
2019
2020 spin_lock_irqsave(&info->slock, flags);
2021
33f0f88f 2022 recv_room = tty->receive_room;
1da177e4 2023 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2024 /* mxser_throttle(tty); */
1da177e4 2025 mxser_stoprx(tty);
8ea2c2ec 2026 /* return; */
1da177e4
LT		 2027 }
2028
8ea2c2ec 2029 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2030 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2031
2032 if (*status & UART_LSR_SPECIAL) {
2033 goto intr_old;
2034 }
8ea2c2ec
JJ		 2035 /* following add by Victor Yu. 02-11-2004 */
2036 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2037 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2038 goto intr_old;
8ea2c2ec 2039 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2040 if (*status & MOXA_MUST_LSR_RERR)
2041 goto intr_old;
2042
2043 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2044
8ea2c2ec
JJ		 2045 /* add by Victor Yu. 02-11-2004 */
2046 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2047 gdl &= MOXA_MUST_GDL_MASK;
2048 if (gdl >= recv_room) {
2049 if (!info->ldisc_stop_rx) {
8ea2c2ec 2050 /* mxser_throttle(tty); */
1da177e4
LT		 2051 mxser_stoprx(tty);
2052 }
8ea2c2ec 2053 /* return; */
1da177e4
LT		 2054 }
2055 while (gdl--) {
2056 ch = inb(info->base + UART_RX);
3399ba5b 2057 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2058 cnt++;
2059 /*
8ea2c2ec 2060 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2061 mxser_stoprx(tty);
8ea2c2ec 2062 info->stop_rx = 1;
1da177e4
LT		 2063 break;
2064 } */
2065 }
2066 goto end_intr;
2067 }
8ea2c2ec
JJ		 2068 intr_old:
2069 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2070
2071 do {
2072 if (max-- < 0)
2073 break;
2074 /*
8ea2c2ec 2075 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2076 mxser_stoprx(tty);
2077 info->stop_rx=1;
2078 break;
2079 }
2080 */
2081
2082 ch = inb(info->base + UART_RX);
8ea2c2ec 2083 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2084 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2085 outb(0x23, info->base + UART_FCR);
2086 *status &= info->read_status_mask;
8ea2c2ec 2087 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2088 if (*status & info->ignore_status_mask) {
2089 if (++ignored > 100)
2090 break;
2091 } else {
3399ba5b 2092 char flag = 0;
1da177e4
LT		 2093 if (*status & UART_LSR_SPECIAL) {
2094 if (*status & UART_LSR_BI) {
3399ba5b 2095 flag = TTY_BREAK;
1da177e4
LT		 2096/* added by casper 1/11/2000 */
2097 info->icount.brk++;
1da177e4
LT		 2098/* */
2099 if (info->flags & ASYNC_SAK)
2100 do_SAK(tty);
2101 } else if (*status & UART_LSR_PE) {
3399ba5b 2102 flag = TTY_PARITY;
1da177e4
LT		 2103/* added by casper 1/11/2000 */
2104 info->icount.parity++;
2105/* */
2106 } else if (*status & UART_LSR_FE) {
3399ba5b 2107 flag = TTY_FRAME;
1da177e4
LT		 2108/* added by casper 1/11/2000 */
2109 info->icount.frame++;
2110/* */
2111 } else if (*status & UART_LSR_OE) {
3399ba5b 2112 flag = TTY_OVERRUN;
1da177e4
LT		 2113/* added by casper 1/11/2000 */
2114 info->icount.overrun++;
2115/* */
3399ba5b
DV		 2116 }
2117 }
2118 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2119 cnt++;
2120 if (cnt >= recv_room) {
2121 if (!info->ldisc_stop_rx) {
8ea2c2ec 2122 /* mxser_throttle(tty); */
1da177e4
LT		 2123 mxser_stoprx(tty);
2124 }
2125 break;
2126 }
2127
2128 }
2129
8ea2c2ec 2130 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2131 if (info->IsMoxaMustChipFlag)
2132 break;
8ea2c2ec 2133 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2134
2135 /* mask by Victor Yu. 09-02-2002
2136 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2137 */
8ea2c2ec 2138 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2139 *status = inb(info->base + UART_LSR);
8ea2c2ec 2140 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2141 } while (*status & UART_LSR_DR);
2142
8ea2c2ec 2143end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2144 mxvar_log.rxcnt[info->port] += cnt;
2145 info->mon_data.rxcnt += cnt;
2146 info->mon_data.up_rxcnt += cnt;
2147 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2148
1da177e4
LT		 2149 tty_flip_buffer_push(tty);
2150}
2151
2152static void mxser_transmit_chars(struct mxser_struct *info)
2153{
2154 int count, cnt;
2155 unsigned long flags;
2156
2157 spin_lock_irqsave(&info->slock, flags);
2158
2159 if (info->x_char) {
2160 outb(info->x_char, info->base + UART_TX);
2161 info->x_char = 0;
2162 mxvar_log.txcnt[info->port]++;
2163 info->mon_data.txcnt++;
2164 info->mon_data.up_txcnt++;
2165
2166/* added by casper 1/11/2000 */
2167 info->icount.tx++;
2168/* */
2169 spin_unlock_irqrestore(&info->slock, flags);
2170 return;
2171 }
2172
2173 if (info->xmit_buf == 0) {
2174 spin_unlock_irqrestore(&info->slock, flags);
2175 return;
2176 }
2177
8ea2c2ec
JJ		 2178 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2179 (info->tty->hw_stopped &&
2180 (info->type != PORT_16550A) &&
2181 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2182 info->IER &= ~UART_IER_THRI;
2183 outb(info->IER, info->base + UART_IER);
2184 spin_unlock_irqrestore(&info->slock, flags);
2185 return;
2186 }
2187
2188 cnt = info->xmit_cnt;
2189 count = info->xmit_fifo_size;
2190 do {
8ea2c2ec
JJ		 2191 outb(info->xmit_buf[info->xmit_tail++],
2192 info->base + UART_TX);
1da177e4
LT		 2193 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2194 if (--info->xmit_cnt <= 0)
2195 break;
2196 } while (--count > 0);
2197 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2198
8ea2c2ec 2199/* added by James 03-12-2004. */
1da177e4
LT		 2200 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2201 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2202/* (above) added by James. */
1da177e4
LT		 2203
2204/* added by casper 1/11/2000 */
2205 info->icount.tx += (cnt - info->xmit_cnt);
2206/* */
2207
2208 if (info->xmit_cnt < WAKEUP_CHARS) {
2209 set_bit(MXSER_EVENT_TXLOW, &info->event);
2210 schedule_work(&info->tqueue);
2211 }
2212 if (info->xmit_cnt <= 0) {
2213 info->IER &= ~UART_IER_THRI;
2214 outb(info->IER, info->base + UART_IER);
2215 }
2216 spin_unlock_irqrestore(&info->slock, flags);
2217}
2218
2219static void mxser_check_modem_status(struct mxser_struct *info, int status)
2220{
2221 /* update input line counters */
2222 if (status & UART_MSR_TERI)
2223 info->icount.rng++;
2224 if (status & UART_MSR_DDSR)
2225 info->icount.dsr++;
2226 if (status & UART_MSR_DDCD)
2227 info->icount.dcd++;
2228 if (status & UART_MSR_DCTS)
2229 info->icount.cts++;
2230 info->mon_data.modem_status = status;
2231 wake_up_interruptible(&info->delta_msr_wait);
2232
1da177e4
LT		 2233 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2234 if (status & UART_MSR_DCD)
2235 wake_up_interruptible(&info->open_wait);
2236 schedule_work(&info->tqueue);
2237 }
2238
2239 if (info->flags & ASYNC_CTS_FLOW) {
2240 if (info->tty->hw_stopped) {
2241 if (status & UART_MSR_CTS) {
2242 info->tty->hw_stopped = 0;
2243
8ea2c2ec
JJ		 2244 if ((info->type != PORT_16550A) &&
2245 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2246 info->IER |= UART_IER_THRI;
2247 outb(info->IER, info->base + UART_IER);
2248 }
2249 set_bit(MXSER_EVENT_TXLOW, &info->event);
2250 schedule_work(&info->tqueue); }
2251 } else {
2252 if (!(status & UART_MSR_CTS)) {
2253 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2254 if ((info->type != PORT_16550A) &&
2255 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2256 info->IER &= ~UART_IER_THRI;
2257 outb(info->IER, info->base + UART_IER);
2258 }
2259 }
2260 }
2261 }
2262}
2263
2264static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2265{
2266 DECLARE_WAITQUEUE(wait, current);
2267 int retval;
2268 int do_clocal = 0;
2269 unsigned long flags;
2270
2271 /*
2272 * If non-blocking mode is set, or the port is not enabled,
2273 * then make the check up front and then exit.
2274 */
2275 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2276 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2277 return 0;
1da177e4
LT		 2278 }
2279
2280 if (tty->termios->c_cflag & CLOCAL)
2281 do_clocal = 1;
2282
2283 /*
2284 * Block waiting for the carrier detect and the line to become
2285 * free (i.e., not in use by the callout). While we are in
2286 * this loop, info->count is dropped by one, so that
2287 * mxser_close() knows when to free things. We restore it upon
2288 * exit, either normal or abnormal.
2289 */
2290 retval = 0;
2291 add_wait_queue(&info->open_wait, &wait);
2292
2293 spin_lock_irqsave(&info->slock, flags);
2294 if (!tty_hung_up_p(filp))
2295 info->count--;
2296 spin_unlock_irqrestore(&info->slock, flags);
2297 info->blocked_open++;
2298 while (1) {
2299 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2300 outb(inb(info->base + UART_MCR) |
2301 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2302 spin_unlock_irqrestore(&info->slock, flags);
2303 set_current_state(TASK_INTERRUPTIBLE);
2304 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2305 if (info->flags & ASYNC_HUP_NOTIFY)
2306 retval = -EAGAIN;
2307 else
2308 retval = -ERESTARTSYS;
2309 break;
2310 }
8ea2c2ec
JJ		 2311 if (!(info->flags & ASYNC_CLOSING) &&
2312 (do_clocal ||
2313 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2314 break;
2315 if (signal_pending(current)) {
2316 retval = -ERESTARTSYS;
2317 break;
2318 }
2319 schedule();
2320 }
2321 set_current_state(TASK_RUNNING);
2322 remove_wait_queue(&info->open_wait, &wait);
2323 if (!tty_hung_up_p(filp))
2324 info->count++;
2325 info->blocked_open--;
2326 if (retval)
8ea2c2ec 2327 return retval;
1da177e4 2328 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2329 return 0;
1da177e4
LT		 2330}
2331
2332static int mxser_startup(struct mxser_struct *info)
2333{
1da177e4
LT		 2334 unsigned long page;
2335 unsigned long flags;
2336
2337 page = __get_free_page(GFP_KERNEL);
2338 if (!page)
8ea2c2ec 2339 return -ENOMEM;
1da177e4
LT		 2340
2341 spin_lock_irqsave(&info->slock, flags);
2342
2343 if (info->flags & ASYNC_INITIALIZED) {
2344 free_page(page);
2345 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2346 return 0;
1da177e4
LT		 2347 }
2348
2349 if (!info->base || !info->type) {
2350 if (info->tty)
2351 set_bit(TTY_IO_ERROR, &info->tty->flags);
2352 free_page(page);
2353 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2354 return 0;
1da177e4
LT		 2355 }
2356 if (info->xmit_buf)
2357 free_page(page);
2358 else
2359 info->xmit_buf = (unsigned char *) page;
2360
2361 /*
2362 * Clear the FIFO buffers and disable them
2363 * (they will be reenabled in mxser_change_speed())
2364 */
2365 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2366 outb((UART_FCR_CLEAR_RCVR |
2367 UART_FCR_CLEAR_XMIT |
2368 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2369 else
8ea2c2ec
JJ		 2370 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2371 info->base + UART_FCR);
1da177e4
LT		 2372
2373 /*
2374 * At this point there's no way the LSR could still be 0xFF;
2375 * if it is, then bail out, because there's likely no UART
2376 * here.
2377 */
2378 if (inb(info->base + UART_LSR) == 0xff) {
2379 spin_unlock_irqrestore(&info->slock, flags);
2380 if (capable(CAP_SYS_ADMIN)) {
2381 if (info->tty)
2382 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2383 return 0;
1da177e4 2384 } else
8ea2c2ec 2385 return -ENODEV;
1da177e4
LT		 2386 }
2387
2388 /*
2389 * Clear the interrupt registers.
2390 */
2391 (void) inb(info->base + UART_LSR);
2392 (void) inb(info->base + UART_RX);
2393 (void) inb(info->base + UART_IIR);
2394 (void) inb(info->base + UART_MSR);
2395
2396 /*
2397 * Now, initialize the UART
2398 */
2399 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2400 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2401 outb(info->MCR, info->base + UART_MCR);
2402
2403 /*
2404 * Finally, enable interrupts
2405 */
2406 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2407 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2408
8ea2c2ec 2409 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2410 if (info->IsMoxaMustChipFlag)
2411 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2412 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2413 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2414
2415 /*
2416 * And clear the interrupt registers again for luck.
2417 */
2418 (void) inb(info->base + UART_LSR);
2419 (void) inb(info->base + UART_RX);
2420 (void) inb(info->base + UART_IIR);
2421 (void) inb(info->base + UART_MSR);
2422
2423 if (info->tty)
2424 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2425 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2426
2427 /*
2428 * and set the speed of the serial port
2429 */
2430 spin_unlock_irqrestore(&info->slock, flags);
2431 mxser_change_speed(info, NULL);
2432
2433 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2434 return 0;
1da177e4
LT		 2435}
2436
2437/*
2438 * This routine will shutdown a serial port; interrupts maybe disabled, and
2439 * DTR is dropped if the hangup on close termio flag is on.
2440 */
2441static void mxser_shutdown(struct mxser_struct *info)
2442{
2443 unsigned long flags;
2444
2445 if (!(info->flags & ASYNC_INITIALIZED))
2446 return;
2447
2448 spin_lock_irqsave(&info->slock, flags);
2449
2450 /*
2451 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2452 * here so the queue might never be waken up
2453 */
2454 wake_up_interruptible(&info->delta_msr_wait);
2455
2456 /*
2457 * Free the IRQ, if necessary
2458 */
2459 if (info->xmit_buf) {
2460 free_page((unsigned long) info->xmit_buf);
2461 info->xmit_buf = NULL;
2462 }
2463
2464 info->IER = 0;
2465 outb(0x00, info->base + UART_IER);
2466
2467 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2468 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2469 outb(info->MCR, info->base + UART_MCR);
2470
2471 /* clear Rx/Tx FIFO's */
8ea2c2ec 2472 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2473 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2474 outb((UART_FCR_CLEAR_RCVR |
2475 UART_FCR_CLEAR_XMIT |
2476 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2477 else
8ea2c2ec
JJ		 2478 /* above add by Victor Yu. 08-30-2002 */
2479 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2480 info->base + UART_FCR);
1da177e4
LT		 2481
2482 /* read data port to reset things */
2483 (void) inb(info->base + UART_RX);
2484
2485 if (info->tty)
2486 set_bit(TTY_IO_ERROR, &info->tty->flags);
2487
2488 info->flags &= ~ASYNC_INITIALIZED;
2489
8ea2c2ec
JJ		 2490 /* following add by Victor Yu. 09-23-2002 */
2491 if (info->IsMoxaMustChipFlag)
1da177e4 2492 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2493 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2494
2495 spin_unlock_irqrestore(&info->slock, flags);
2496}
2497
2498/*
2499 * This routine is called to set the UART divisor registers to match
2500 * the specified baud rate for a serial port.
2501 */
606d099c 2502static int mxser_change_speed(struct mxser_struct *info, struct ktermios *old_termios)
1da177e4
LT		 2503{
2504 unsigned cflag, cval, fcr;
2505 int ret = 0;
2506 unsigned char status;
2507 long baud;
2508 unsigned long flags;
2509
1da177e4
LT		 2510 if (!info->tty || !info->tty->termios)
2511 return ret;
2512 cflag = info->tty->termios->c_cflag;
2513 if (!(info->base))
2514 return ret;
2515
1da177e4
LT		 2516#ifndef B921600
2517#define B921600 (B460800 +1)
2518#endif
2519 if (mxser_set_baud_method[info->port] == 0) {
c7bce309 2520 baud = tty_get_baud_rate(info->tty);
f29e37c0
AC		 2521 if (mxser_set_baud(info, baud) == -1) {
2522 /* Use previous rate on a failure */
2523 if (old_termios) {
2524 baud = tty_termios_baud_rate(old_termios);
2525 tty_encode_baud_rate(info->tty, baud, baud);
2526 }
2527 }
1da177e4
LT		 2528 }
2529
2530 /* byte size and parity */
2531 switch (cflag & CSIZE) {
2532 case CS5:
2533 cval = 0x00;
2534 break;
2535 case CS6:
2536 cval = 0x01;
2537 break;
2538 case CS7:
2539 cval = 0x02;
2540 break;
2541 case CS8:
2542 cval = 0x03;
2543 break;
2544 default:
2545 cval = 0x00;
2546 break; /* too keep GCC shut... */
2547 }
2548 if (cflag & CSTOPB)
2549 cval |= 0x04;
2550 if (cflag & PARENB)
2551 cval |= UART_LCR_PARITY;
8ea2c2ec 2552 if (!(cflag & PARODD))
1da177e4 2553 cval |= UART_LCR_EPAR;
1da177e4
LT		 2554 if (cflag & CMSPAR)
2555 cval |= UART_LCR_SPAR;
2556
2557 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2558 if (info->IsMoxaMustChipFlag) {
2559 fcr = UART_FCR_ENABLE_FIFO;
2560 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2561 SET_MOXA_MUST_FIFO_VALUE(info);
2562 } else
2563 fcr = 0;
2564 } else {
2565 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2566 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2567 if (info->IsMoxaMustChipFlag) {
2568 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2569 SET_MOXA_MUST_FIFO_VALUE(info);
2570 } else {
8ea2c2ec 2571 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2572 switch (info->rx_trigger) {
2573 case 1:
2574 fcr |= UART_FCR_TRIGGER_1;
2575 break;
2576 case 4:
2577 fcr |= UART_FCR_TRIGGER_4;
2578 break;
2579 case 8:
2580 fcr |= UART_FCR_TRIGGER_8;
2581 break;
2582 default:
2583 fcr |= UART_FCR_TRIGGER_14;
2584 break;
2585 }
2586 }
2587 }
2588
2589 /* CTS flow control flag and modem status interrupts */
2590 info->IER &= ~UART_IER_MSI;
2591 info->MCR &= ~UART_MCR_AFE;
2592 if (cflag & CRTSCTS) {
2593 info->flags |= ASYNC_CTS_FLOW;
2594 info->IER |= UART_IER_MSI;
2595 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2596 info->MCR |= UART_MCR_AFE;
1da177e4 2597 } else {
1da177e4 2598 status = inb(info->base + UART_MSR);
1da177e4
LT		 2599 if (info->tty->hw_stopped) {
2600 if (status & UART_MSR_CTS) {
2601 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2602 if ((info->type != PORT_16550A) &&
2603 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2604 info->IER |= UART_IER_THRI;
2605 outb(info->IER, info->base + UART_IER);
2606 }
2607 set_bit(MXSER_EVENT_TXLOW, &info->event);
2608 schedule_work(&info->tqueue); }
2609 } else {
2610 if (!(status & UART_MSR_CTS)) {
2611 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2612 if ((info->type != PORT_16550A) &&
2613 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2614 info->IER &= ~UART_IER_THRI;
2615 outb(info->IER, info->base + UART_IER);
2616 }
2617 }
2618 }
2619 }
2620 } else {
2621 info->flags &= ~ASYNC_CTS_FLOW;
2622 }
2623 outb(info->MCR, info->base + UART_MCR);
2624 if (cflag & CLOCAL) {
2625 info->flags &= ~ASYNC_CHECK_CD;
2626 } else {
2627 info->flags |= ASYNC_CHECK_CD;
2628 info->IER |= UART_IER_MSI;
2629 }
2630 outb(info->IER, info->base + UART_IER);
2631
2632 /*
2633 * Set up parity check flag
2634 */
2635 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2636 if (I_INPCK(info->tty))
2637 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2638 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2639 info->read_status_mask |= UART_LSR_BI;
2640
2641 info->ignore_status_mask = 0;
2642
2643 if (I_IGNBRK(info->tty)) {
2644 info->ignore_status_mask |= UART_LSR_BI;
2645 info->read_status_mask |= UART_LSR_BI;
2646 /*
2647 * If we're ignore parity and break indicators, ignore
2648 * overruns too. (For real raw support).
2649 */
2650 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2651 info->ignore_status_mask |=
2652 UART_LSR_OE |
2653 UART_LSR_PE |
2654 UART_LSR_FE;
2655 info->read_status_mask |=
2656 UART_LSR_OE |
2657 UART_LSR_PE |
2658 UART_LSR_FE;
1da177e4
LT		 2659 }
2660 }
8ea2c2ec 2661 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2662 if (info->IsMoxaMustChipFlag) {
2663 spin_lock_irqsave(&info->slock, flags);
2664 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2665 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2666 if (I_IXON(info->tty)) {
2667 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2668 } else {
2669 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2670 }
2671 if (I_IXOFF(info->tty)) {
2672 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2673 } else {
2674 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2675 }
2676 /*
2677 if ( I_IXANY(info->tty) ) {
2678 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2679 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2680 } else {
2681 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2682 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2683 }
2684 */
2685 spin_unlock_irqrestore(&info->slock, flags);
2686 }
8ea2c2ec 2687 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2688
2689
2690 outb(fcr, info->base + UART_FCR); /* set fcr */
2691 outb(cval, info->base + UART_LCR);
2692
2693 return ret;
2694}
2695
2696
2697static int mxser_set_baud(struct mxser_struct *info, long newspd)
2698{
2699 int quot = 0;
2700 unsigned char cval;
1da177e4 2701 unsigned long flags;
f29e37c0 2702 unsigned int baud;
1da177e4
LT		 2703
2704 if (!info->tty || !info->tty->termios)
f29e37c0 2705 return -1;
1da177e4
LT		 2706
2707 if (!(info->base))
f29e37c0 2708 return -1;
1da177e4
LT		 2709
2710 if (newspd > info->MaxCanSetBaudRate)
f29e37c0 2711 return -1;
1da177e4
LT		 2712
2713 info->realbaud = newspd;
2714 if (newspd == 134) {
2715 quot = (2 * info->baud_base / 269);
f29e37c0 2716 tty_encode_baud_rate(info->tty, 134, 134);
1da177e4
LT		 2717 } else if (newspd) {
2718 quot = info->baud_base / newspd;
1da177e4
LT		 2719 if (quot == 0)
2720 quot = 1;
f29e37c0
AC		 2721 baud = info->baud_base / quot;
2722 tty_encode_baud_rate(info->tty, baud, baud);
1da177e4
LT		 2723 } else {
2724 quot = 0;
f29e37c0 2725 tty_encode_baud_rate(info->tty, 0, 0);
1da177e4
LT		 2726 }
2727
2728 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2729 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2730
2731 if (quot) {
2732 spin_lock_irqsave(&info->slock, flags);
2733 info->MCR |= UART_MCR_DTR;
2734 outb(info->MCR, info->base + UART_MCR);
2735 spin_unlock_irqrestore(&info->slock, flags);
2736 } else {
2737 spin_lock_irqsave(&info->slock, flags);
2738 info->MCR &= ~UART_MCR_DTR;
2739 outb(info->MCR, info->base + UART_MCR);
2740 spin_unlock_irqrestore(&info->slock, flags);
f29e37c0 2741 return 0;
1da177e4
LT		 2742 }
2743
2744 cval = inb(info->base + UART_LCR);
2745
2746 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2747
2748 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2749 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2750 outb(cval, info->base + UART_LCR); /* reset DLAB */
2751
2752
f29e37c0 2753 return 0;
1da177e4
LT		 2754}
2755
1da177e4
LT		 2756/*
2757 * ------------------------------------------------------------
2758 * friends of mxser_ioctl()
2759 * ------------------------------------------------------------
2760 */
2761static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2762{
2763 struct serial_struct tmp;
2764
2765 if (!retinfo)
8ea2c2ec 2766 return -EFAULT;
1da177e4
LT		 2767 memset(&tmp, 0, sizeof(tmp));
2768 tmp.type = info->type;
2769 tmp.line = info->port;
2770 tmp.port = info->base;
2771 tmp.irq = info->irq;
2772 tmp.flags = info->flags;
2773 tmp.baud_base = info->baud_base;
2774 tmp.close_delay = info->close_delay;
2775 tmp.closing_wait = info->closing_wait;
2776 tmp.custom_divisor = info->custom_divisor;
2777 tmp.hub6 = 0;
2778 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2779 return -EFAULT;
8ea2c2ec 2780 return 0;
1da177e4
LT		 2781}
2782
2783static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2784{
2785 struct serial_struct new_serial;
2786 unsigned int flags;
2787 int retval = 0;
2788
2789 if (!new_info || !info->base)
8ea2c2ec 2790 return -EFAULT;
1da177e4
LT		 2791 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2792 return -EFAULT;
2793
8ea2c2ec
JJ		 2794 if ((new_serial.irq != info->irq) ||
2795 (new_serial.port != info->base) ||
2796 (new_serial.custom_divisor != info->custom_divisor) ||
2797 (new_serial.baud_base != info->baud_base))
2798 return -EPERM;
1da177e4
LT		 2799
2800 flags = info->flags & ASYNC_SPD_MASK;
2801
2802 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2803 if ((new_serial.baud_base != info->baud_base) ||
2804 (new_serial.close_delay != info->close_delay) ||
2805 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2806 return -EPERM;
2807 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2808 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2809 } else {
2810 /*
2811 * OK, past this point, all the error checking has been done.
2812 * At this point, we start making changes.....
2813 */
8ea2c2ec
JJ		 2814 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2815 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2816 info->close_delay = new_serial.close_delay * HZ / 100;
2817 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2818 info->tty->low_latency =
2819 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2820 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2821 }
2822
2823 /* added by casper, 3/17/2000, for mouse */
2824 info->type = new_serial.type;
2825
2826 process_txrx_fifo(info);
2827
1da177e4
LT		 2828 if (info->flags & ASYNC_INITIALIZED) {
2829 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2830 mxser_change_speed(info, NULL);
2831 }
2832 } else {
2833 retval = mxser_startup(info);
2834 }
8ea2c2ec 2835 return retval;
1da177e4
LT		 2836}
2837
2838/*
2839 * mxser_get_lsr_info - get line status register info
2840 *
2841 * Purpose: Let user call ioctl() to get info when the UART physically
2842 * is emptied. On bus types like RS485, the transmitter must
2843 * release the bus after transmitting. This must be done when
2844 * the transmit shift register is empty, not be done when the
2845 * transmit holding register is empty. This functionality
2846 * allows an RS485 driver to be written in user space.
2847 */
2848static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2849{
2850 unsigned char status;
2851 unsigned int result;
2852 unsigned long flags;
2853
2854 spin_lock_irqsave(&info->slock, flags);
2855 status = inb(info->base + UART_LSR);
2856 spin_unlock_irqrestore(&info->slock, flags);
2857 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2858 return put_user(result, value);
2859}
2860
2861/*
2862 * This routine sends a break character out the serial port.
2863 */
2864static void mxser_send_break(struct mxser_struct *info, int duration)
2865{
2866 unsigned long flags;
2867
2868 if (!info->base)
2869 return;
2870 set_current_state(TASK_INTERRUPTIBLE);
2871 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2872 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2873 info->base + UART_LCR);
1da177e4
LT		 2874 spin_unlock_irqrestore(&info->slock, flags);
2875 schedule_timeout(duration);
2876 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2877 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2878 info->base + UART_LCR);
1da177e4
LT		 2879 spin_unlock_irqrestore(&info->slock, flags);
2880}
2881
2882static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2883{
56e139f6 2884 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2885 unsigned char control, status;
2886 unsigned long flags;
2887
2888
2889 if (tty->index == MXSER_PORTS)
8ea2c2ec 2890 return -ENOIOCTLCMD;
1da177e4 2891 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2892 return -EIO;
1da177e4
LT		 2893
2894 control = info->MCR;
2895
2896 spin_lock_irqsave(&info->slock, flags);
2897 status = inb(info->base + UART_MSR);
2898 if (status & UART_MSR_ANY_DELTA)
2899 mxser_check_modem_status(info, status);
2900 spin_unlock_irqrestore(&info->slock, flags);
2901 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 2902 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
2903 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
2904 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
2905 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
2906 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 2907}
2908
2909static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
2910{
56e139f6 2911 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2912 unsigned long flags;
2913
2914
2915 if (tty->index == MXSER_PORTS)
2916 return -ENOIOCTLCMD;
2917 if (tty->flags & (1 << TTY_IO_ERROR))
2918 return -EIO;
2919
2920 spin_lock_irqsave(&info->slock, flags);
2921
2922 if (set & TIOCM_RTS)
2923 info->MCR |= UART_MCR_RTS;
2924 if (set & TIOCM_DTR)
2925 info->MCR |= UART_MCR_DTR;
2926
2927 if (clear & TIOCM_RTS)
2928 info->MCR &= ~UART_MCR_RTS;
2929 if (clear & TIOCM_DTR)
2930 info->MCR &= ~UART_MCR_DTR;
2931
2932 outb(info->MCR, info->base + UART_MCR);
2933 spin_unlock_irqrestore(&info->slock, flags);
2934 return 0;
2935}
2936
2937
2938static int mxser_read_register(int, unsigned short *);
2939static int mxser_program_mode(int);
2940static void mxser_normal_mode(int);
2941
2942static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
2943{
2944 int id, i, bits;
2945 unsigned short regs[16], irq;
2946 unsigned char scratch, scratch2;
2947
2948 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
2949
2950 id = mxser_read_register(cap, regs);
2951 if (id == C168_ASIC_ID) {
2952 hwconf->board_type = MXSER_BOARD_C168_ISA;
2953 hwconf->ports = 8;
2954 } else if (id == C104_ASIC_ID) {
2955 hwconf->board_type = MXSER_BOARD_C104_ISA;
2956 hwconf->ports = 4;
2957 } else if (id == C102_ASIC_ID) {
2958 hwconf->board_type = MXSER_BOARD_C102_ISA;
2959 hwconf->ports = 2;
2960 } else if (id == CI132_ASIC_ID) {
2961 hwconf->board_type = MXSER_BOARD_CI132;
2962 hwconf->ports = 2;
2963 } else if (id == CI134_ASIC_ID) {
2964 hwconf->board_type = MXSER_BOARD_CI134;
2965 hwconf->ports = 4;
2966 } else if (id == CI104J_ASIC_ID) {
2967 hwconf->board_type = MXSER_BOARD_CI104J;
2968 hwconf->ports = 4;
2969 } else
8ea2c2ec 2970 return 0;
1da177e4
LT		 2971
2972 irq = 0;
2973 if (hwconf->ports == 2) {
2974 irq = regs[9] & 0xF000;
2975 irq = irq | (irq >> 4);
2976 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 2977 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2978 } else if (hwconf->ports == 4) {
2979 irq = regs[9] & 0xF000;
2980 irq = irq | (irq >> 4);
2981 irq = irq | (irq >> 8);
2982 if (irq != regs[9])
8ea2c2ec 2983 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2984 } else if (hwconf->ports == 8) {
2985 irq = regs[9] & 0xF000;
2986 irq = irq | (irq >> 4);
2987 irq = irq | (irq >> 8);
2988 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 2989 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 2990 }
2991
8ea2c2ec
JJ		 2992 if (!irq)
2993 return MXSER_ERR_IRQ;
2994 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 2995 for (i = 0; i < 8; i++)
2996 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 2997 if ((regs[12] & 0x80) == 0)
2998 return MXSER_ERR_VECTOR;
2999 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3000 if (id == 1)
3001 hwconf->vector_mask = 0x00FF;
3002 else
3003 hwconf->vector_mask = 0x000F;
3004 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3005 if (regs[12] & bits) {
3006 hwconf->baud_base[i] = 921600;
8ea2c2ec 3007 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3008 } else {
3009 hwconf->baud_base[i] = 115200;
8ea2c2ec 3010 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3011 }
3012 }
3013 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3014 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3015 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3016 outb(scratch2, cap + UART_LCR);
3017 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3018 scratch = inb(cap + UART_IIR);
3019
3020 if (scratch & 0xC0)
3021 hwconf->uart_type = PORT_16550A;
3022 else
3023 hwconf->uart_type = PORT_16450;
3024 if (id == 1)
3025 hwconf->ports = 8;
3026 else
3027 hwconf->ports = 4;
3028 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3029 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3030 return hwconf->ports;
1da177e4
LT		 3031}
3032
3033#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3034#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3035#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3036#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3037#define EN_CCMD 0x000 /* Chip's command register */
3038#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3039#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3040#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3041#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3042#define EN0_DCFG 0x00E /* Data configuration reg WR */
3043#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3044#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3045#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3046static int mxser_read_register(int port, unsigned short *regs)
3047{
3048 int i, k, value, id;
3049 unsigned int j;
3050
3051 id = mxser_program_mode(port);
3052 if (id < 0)
8ea2c2ec 3053 return id;
1da177e4
LT		 3054 for (i = 0; i < 14; i++) {
3055 k = (i & 0x3F) | 0x180;
3056 for (j = 0x100; j > 0; j >>= 1) {
3057 outb(CHIP_CS, port);
3058 if (k & j) {
3059 outb(CHIP_CS | CHIP_DO, port);
3060 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3061 } else {
3062 outb(CHIP_CS, port);
3063 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3064 }
3065 }
8ea2c2ec 3066 (void)inb(port);
1da177e4
LT		 3067 value = 0;
3068 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3069 outb(CHIP_CS, port);
3070 outb(CHIP_CS | CHIP_SK, port);
3071 if (inb(port) & CHIP_DI)
3072 value |= j;
3073 }
3074 regs[i] = value;
3075 outb(0, port);
3076 }
3077 mxser_normal_mode(port);
8ea2c2ec 3078 return id;
1da177e4
LT		 3079}
3080
3081static int mxser_program_mode(int port)
3082{
3083 int id, i, j, n;
8ea2c2ec 3084 /* unsigned long flags; */
1da177e4
LT		 3085
3086 spin_lock(&gm_lock);
3087 outb(0, port);
3088 outb(0, port);
3089 outb(0, port);
8ea2c2ec
JJ		 3090 (void)inb(port);
3091 (void)inb(port);
1da177e4 3092 outb(0, port);
8ea2c2ec
JJ		 3093 (void)inb(port);
3094 /* restore_flags(flags); */
1da177e4
LT		 3095 spin_unlock(&gm_lock);
3096
3097 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3098 if ((id != C168_ASIC_ID) &&
3099 (id != C104_ASIC_ID) &&
3100 (id != C102_ASIC_ID) &&
3101 (id != CI132_ASIC_ID) &&
3102 (id != CI134_ASIC_ID) &&
3103 (id != CI104J_ASIC_ID))
3104 return -1;
1da177e4
LT		 3105 for (i = 0, j = 0; i < 4; i++) {
3106 n = inb(port + 2);
3107 if (n == 'M') {
3108 j = 1;
3109 } else if ((j == 1) && (n == 1)) {
3110 j = 2;
3111 break;
3112 } else
3113 j = 0;
3114 }
3115 if (j != 2)
3116 id = -2;
8ea2c2ec 3117 return id;
1da177e4
LT		 3118}
3119
3120static void mxser_normal_mode(int port)
3121{
3122 int i, n;
3123
3124 outb(0xA5, port + 1);
3125 outb(0x80, port + 3);
3126 outb(12, port + 0); /* 9600 bps */
3127 outb(0, port + 1);
3128 outb(0x03, port + 3); /* 8 data bits */
3129 outb(0x13, port + 4); /* loop back mode */
3130 for (i = 0; i < 16; i++) {
3131 n = inb(port + 5);
3132 if ((n & 0x61) == 0x60)
3133 break;
3134 if ((n & 1) == 1)
8ea2c2ec 3135 (void)inb(port);
1da177e4
LT		 3136 }
3137 outb(0x00, port + 4);
3138}
3139
3140module_init(mxser_module_init);
3141module_exit(mxser_module_exit);
Linux 6.x block layer and io_uring tree(s)