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tty: rename the remaining oddly named n_tty functions
[linux-2.6-block.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
80ff8a80
JS		 4 * Copyright (C) 1999-2006 Moxa Technologies (support@moxa.com).
5 * Copyright (C) 2006-2008 Jiri Slaby <jirislaby@gmail.com>
1da177e4 6 *
1c45607a
JS		 7 * This code is loosely based on the 1.8 moxa driver which is based on
8 * Linux serial driver, written by Linus Torvalds, Theodore T'so and
9 * others.
1da177e4
LT		 10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 14 * (at your option) any later version.
1da177e4 15 *
1da177e4
LT		 16 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
17 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
18 * - Fixed x86_64 cleanness
1da177e4
LT		 19 */
20
1da177e4 21#include <linux/module.h>
1da177e4
LT		 22#include <linux/errno.h>
23#include <linux/signal.h>
24#include <linux/sched.h>
25#include <linux/timer.h>
26#include <linux/interrupt.h>
27#include <linux/tty.h>
28#include <linux/tty_flip.h>
29#include <linux/serial.h>
30#include <linux/serial_reg.h>
31#include <linux/major.h>
32#include <linux/string.h>
33#include <linux/fcntl.h>
34#include <linux/ptrace.h>
35#include <linux/gfp.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
1da177e4
LT		 38#include <linux/delay.h>
39#include <linux/pci.h>
1977f032 40#include <linux/bitops.h>
1da177e4
LT		 41
42#include <asm/system.h>
43#include <asm/io.h>
44#include <asm/irq.h>
1da177e4
LT		 45#include <asm/uaccess.h>
46
47#include "mxser.h"
48
e129deff 49#define MXSER_VERSION "2.0.4" /* 1.12 */
1da177e4 50#define MXSERMAJOR 174
1da177e4 51
1da177e4 52#define MXSER_BOARDS 4 /* Max. boards */
1da177e4 53#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
1c45607a
JS		 54#define MXSER_PORTS (MXSER_BOARDS * MXSER_PORTS_PER_BOARD)
55#define MXSER_ISR_PASS_LIMIT 100
1da177e4 56
1c45607a
JS		 57/*CheckIsMoxaMust return value*/
58#define MOXA_OTHER_UART 0x00
59#define MOXA_MUST_MU150_HWID 0x01
60#define MOXA_MUST_MU860_HWID 0x02
61
1da177e4
LT		 62#define WAKEUP_CHARS 256
63
64#define UART_MCR_AFE 0x20
65#define UART_LSR_SPECIAL 0x1E
66
e129deff 67#define PCI_DEVICE_ID_POS104UL 0x1044
1c45607a 68#define PCI_DEVICE_ID_CB108 0x1080
e129deff 69#define PCI_DEVICE_ID_CP102UF 0x1023
1c45607a 70#define PCI_DEVICE_ID_CB114 0x1142
80ff8a80 71#define PCI_DEVICE_ID_CP114UL 0x1143
1c45607a
JS		 72#define PCI_DEVICE_ID_CB134I 0x1341
73#define PCI_DEVICE_ID_CP138U 0x1380
1da177e4 74
1da177e4
LT		 75
76#define C168_ASIC_ID 1
77#define C104_ASIC_ID 2
78#define C102_ASIC_ID 0xB
79#define CI132_ASIC_ID 4
80#define CI134_ASIC_ID 3
81#define CI104J_ASIC_ID 5
82
1c45607a
JS		 83#define MXSER_HIGHBAUD 1
84#define MXSER_HAS2 2
1da177e4 85
8ea2c2ec 86/* This is only for PCI */
1c45607a 87static const struct {
1da177e4
LT		 88 int type;
89 int tx_fifo;
90 int rx_fifo;
91 int xmit_fifo_size;
92 int rx_high_water;
93 int rx_trigger;
94 int rx_low_water;
95 long max_baud;
1c45607a 96} Gpci_uart_info[] = {
1da177e4
LT		 97 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
98 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
99 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
100};
1c45607a 101#define UART_INFO_NUM ARRAY_SIZE(Gpci_uart_info)
1da177e4 102
1c45607a
JS		 103struct mxser_cardinfo {
104 char *name;
105 unsigned int nports;
106 unsigned int flags;
107};
1da177e4 108
1c45607a
JS		 109static const struct mxser_cardinfo mxser_cards[] = {
110/* 0*/ { "C168 series", 8, },
111 { "C104 series", 4, },
112 { "CI-104J series", 4, },
113 { "C168H/PCI series", 8, },
114 { "C104H/PCI series", 4, },
115/* 5*/ { "C102 series", 4, MXSER_HAS2 }, /* C102-ISA */
116 { "CI-132 series", 4, MXSER_HAS2 },
117 { "CI-134 series", 4, },
118 { "CP-132 series", 2, },
119 { "CP-114 series", 4, },
120/*10*/ { "CT-114 series", 4, },
121 { "CP-102 series", 2, MXSER_HIGHBAUD },
122 { "CP-104U series", 4, },
123 { "CP-168U series", 8, },
124 { "CP-132U series", 2, },
125/*15*/ { "CP-134U series", 4, },
126 { "CP-104JU series", 4, },
127 { "Moxa UC7000 Serial", 8, }, /* RC7000 */
128 { "CP-118U series", 8, },
129 { "CP-102UL series", 2, },
130/*20*/ { "CP-102U series", 2, },
131 { "CP-118EL series", 8, },
132 { "CP-168EL series", 8, },
133 { "CP-104EL series", 4, },
134 { "CB-108 series", 8, },
135/*25*/ { "CB-114 series", 4, },
136 { "CB-134I series", 4, },
137 { "CP-138U series", 8, },
80ff8a80 138 { "POS-104UL series", 4, },
e129deff
JS		 139 { "CP-114UL series", 4, },
140/*30*/ { "CP-102UF series", 2, }
1c45607a 141};
1da177e4 142
1c45607a
JS		 143/* driver_data correspond to the lines in the structure above
144 see also ISA probe function before you change something */
1da177e4 145static struct pci_device_id mxser_pcibrds[] = {
1c45607a
JS		 146 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C168), .driver_data = 3 },
147 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_C104), .driver_data = 4 },
148 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132), .driver_data = 8 },
149 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP114), .driver_data = 9 },
150 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CT114), .driver_data = 10 },
151 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102), .driver_data = 11 },
152 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104U), .driver_data = 12 },
153 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168U), .driver_data = 13 },
154 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP132U), .driver_data = 14 },
155 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP134U), .driver_data = 15 },
156 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104JU),.driver_data = 16 },
157 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_RC7000), .driver_data = 17 },
158 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118U), .driver_data = 18 },
159 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102UL),.driver_data = 19 },
160 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP102U), .driver_data = 20 },
161 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP118EL),.driver_data = 21 },
162 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP168EL),.driver_data = 22 },
163 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_MOXA_CP104EL),.driver_data = 23 },
164 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB108), .driver_data = 24 },
165 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB114), .driver_data = 25 },
166 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CB134I), .driver_data = 26 },
167 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP138U), .driver_data = 27 },
168 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_POS104UL), .driver_data = 28 },
80ff8a80 169 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP114UL), .driver_data = 29 },
e129deff 170 { PCI_VDEVICE(MOXA, PCI_DEVICE_ID_CP102UF), .driver_data = 30 },
1c45607a 171 { }
1da177e4 172};
1da177e4
LT		 173MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
174
1df00924 175static unsigned long ioaddr[MXSER_BOARDS];
1da177e4 176static int ttymajor = MXSERMAJOR;
1da177e4
LT		 177
178/* Variables for insmod */
179
180MODULE_AUTHOR("Casper Yang");
181MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
1df00924
JS		 182module_param_array(ioaddr, ulong, NULL, 0);
183MODULE_PARM_DESC(ioaddr, "ISA io addresses to look for a moxa board");
8d3b33f6 184module_param(ttymajor, int, 0);
1da177e4
LT		 185MODULE_LICENSE("GPL");
186
187struct mxser_log {
188 int tick;
189 unsigned long rxcnt[MXSER_PORTS];
190 unsigned long txcnt[MXSER_PORTS];
191};
192
1da177e4
LT		 193struct mxser_mon {
194 unsigned long rxcnt;
195 unsigned long txcnt;
196 unsigned long up_rxcnt;
197 unsigned long up_txcnt;
198 int modem_status;
199 unsigned char hold_reason;
200};
201
202struct mxser_mon_ext {
203 unsigned long rx_cnt[32];
204 unsigned long tx_cnt[32];
205 unsigned long up_rxcnt[32];
206 unsigned long up_txcnt[32];
207 int modem_status[32];
208
209 long baudrate[32];
210 int databits[32];
211 int stopbits[32];
212 int parity[32];
213 int flowctrl[32];
214 int fifo[32];
215 int iftype[32];
216};
8ea2c2ec 217
1c45607a
JS		 218struct mxser_board;
219
220struct mxser_port {
0ad9e7d1 221 struct tty_port port;
1c45607a 222 struct mxser_board *board;
1c45607a
JS		 223
224 unsigned long ioaddr;
225 unsigned long opmode_ioaddr;
226 int max_baud;
1da177e4 227
1da177e4
LT		 228 int rx_high_water;
229 int rx_trigger; /* Rx fifo trigger level */
230 int rx_low_water;
231 int baud_base; /* max. speed */
1da177e4 232 int type; /* UART type */
1c45607a 233
1da177e4 234 int x_char; /* xon/xoff character */
1da177e4
LT		 235 int IER; /* Interrupt Enable Register */
236 int MCR; /* Modem control register */
1c45607a
JS		 237
238 unsigned char stop_rx;
239 unsigned char ldisc_stop_rx;
240
241 int custom_divisor;
1c45607a 242 unsigned char err_shadow;
1c45607a 243
1c45607a
JS		 244 struct async_icount icount; /* kernel counters for 4 input interrupts */
245 int timeout;
246
247 int read_status_mask;
248 int ignore_status_mask;
249 int xmit_fifo_size;
1da177e4
LT		 250 int xmit_head;
251 int xmit_tail;
252 int xmit_cnt;
1c45607a 253
606d099c 254 struct ktermios normal_termios;
1c45607a 255
1da177e4 256 struct mxser_mon mon_data;
1c45607a 257
1da177e4 258 spinlock_t slock;
1c45607a
JS		 259 wait_queue_head_t delta_msr_wait;
260};
261
262struct mxser_board {
263 unsigned int idx;
264 int irq;
265 const struct mxser_cardinfo *info;
266 unsigned long vector;
267 unsigned long vector_mask;
268
269 int chip_flag;
270 int uart_type;
271
272 struct mxser_port ports[MXSER_PORTS_PER_BOARD];
1da177e4
LT		 273};
274
1da177e4
LT		 275struct mxser_mstatus {
276 tcflag_t cflag;
277 int cts;
278 int dsr;
279 int ri;
280 int dcd;
281};
282
1c45607a 283static struct mxser_board mxser_boards[MXSER_BOARDS];
1da177e4 284static struct tty_driver *mxvar_sdriver;
1da177e4 285static struct mxser_log mxvar_log;
1da177e4 286static int mxser_set_baud_method[MXSER_PORTS + 1];
1da177e4 287
148ff86b
CH		 288static void mxser_enable_must_enchance_mode(unsigned long baseio)
289{
290 u8 oldlcr;
291 u8 efr;
292
293 oldlcr = inb(baseio + UART_LCR);
294 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
295
296 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
297 efr |= MOXA_MUST_EFR_EFRB_ENABLE;
298
299 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
300 outb(oldlcr, baseio + UART_LCR);
301}
302
303static void mxser_disable_must_enchance_mode(unsigned long baseio)
304{
305 u8 oldlcr;
306 u8 efr;
307
308 oldlcr = inb(baseio + UART_LCR);
309 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
310
311 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
312 efr &= ~MOXA_MUST_EFR_EFRB_ENABLE;
313
314 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
315 outb(oldlcr, baseio + UART_LCR);
316}
317
318static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
319{
320 u8 oldlcr;
321 u8 efr;
322
323 oldlcr = inb(baseio + UART_LCR);
324 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
325
326 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
327 efr &= ~MOXA_MUST_EFR_BANK_MASK;
328 efr |= MOXA_MUST_EFR_BANK0;
329
330 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
331 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
332 outb(oldlcr, baseio + UART_LCR);
333}
334
335static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
336{
337 u8 oldlcr;
338 u8 efr;
339
340 oldlcr = inb(baseio + UART_LCR);
341 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
342
343 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
344 efr &= ~MOXA_MUST_EFR_BANK_MASK;
345 efr |= MOXA_MUST_EFR_BANK0;
346
347 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
348 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
349 outb(oldlcr, baseio + UART_LCR);
350}
351
352static void mxser_set_must_fifo_value(struct mxser_port *info)
353{
354 u8 oldlcr;
355 u8 efr;
356
357 oldlcr = inb(info->ioaddr + UART_LCR);
358 outb(MOXA_MUST_ENTER_ENCHANCE, info->ioaddr + UART_LCR);
359
360 efr = inb(info->ioaddr + MOXA_MUST_EFR_REGISTER);
361 efr &= ~MOXA_MUST_EFR_BANK_MASK;
362 efr |= MOXA_MUST_EFR_BANK1;
363
364 outb(efr, info->ioaddr + MOXA_MUST_EFR_REGISTER);
365 outb((u8)info->rx_high_water, info->ioaddr + MOXA_MUST_RBRTH_REGISTER);
366 outb((u8)info->rx_trigger, info->ioaddr + MOXA_MUST_RBRTI_REGISTER);
367 outb((u8)info->rx_low_water, info->ioaddr + MOXA_MUST_RBRTL_REGISTER);
368 outb(oldlcr, info->ioaddr + UART_LCR);
369}
370
371static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
372{
373 u8 oldlcr;
374 u8 efr;
375
376 oldlcr = inb(baseio + UART_LCR);
377 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
378
379 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
380 efr &= ~MOXA_MUST_EFR_BANK_MASK;
381 efr |= MOXA_MUST_EFR_BANK2;
382
383 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
384 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
385 outb(oldlcr, baseio + UART_LCR);
386}
387
388static void mxser_get_must_hardware_id(unsigned long baseio, u8 *pId)
389{
390 u8 oldlcr;
391 u8 efr;
392
393 oldlcr = inb(baseio + UART_LCR);
394 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
395
396 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
397 efr &= ~MOXA_MUST_EFR_BANK_MASK;
398 efr |= MOXA_MUST_EFR_BANK2;
399
400 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
401 *pId = inb(baseio + MOXA_MUST_HWID_REGISTER);
402 outb(oldlcr, baseio + UART_LCR);
403}
404
405static void SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(unsigned long baseio)
406{
407 u8 oldlcr;
408 u8 efr;
409
410 oldlcr = inb(baseio + UART_LCR);
411 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
412
413 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
414 efr &= ~MOXA_MUST_EFR_SF_MASK;
415
416 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
417 outb(oldlcr, baseio + UART_LCR);
418}
419
420static void mxser_enable_must_tx_software_flow_control(unsigned long baseio)
421{
422 u8 oldlcr;
423 u8 efr;
424
425 oldlcr = inb(baseio + UART_LCR);
426 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
427
428 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
429 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
430 efr |= MOXA_MUST_EFR_SF_TX1;
431
432 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
433 outb(oldlcr, baseio + UART_LCR);
434}
435
436static void mxser_disable_must_tx_software_flow_control(unsigned long baseio)
437{
438 u8 oldlcr;
439 u8 efr;
440
441 oldlcr = inb(baseio + UART_LCR);
442 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
443
444 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
445 efr &= ~MOXA_MUST_EFR_SF_TX_MASK;
446
447 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
448 outb(oldlcr, baseio + UART_LCR);
449}
450
451static void mxser_enable_must_rx_software_flow_control(unsigned long baseio)
452{
453 u8 oldlcr;
454 u8 efr;
455
456 oldlcr = inb(baseio + UART_LCR);
457 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
458
459 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
460 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
461 efr |= MOXA_MUST_EFR_SF_RX1;
462
463 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
464 outb(oldlcr, baseio + UART_LCR);
465}
466
467static void mxser_disable_must_rx_software_flow_control(unsigned long baseio)
468{
469 u8 oldlcr;
470 u8 efr;
471
472 oldlcr = inb(baseio + UART_LCR);
473 outb(MOXA_MUST_ENTER_ENCHANCE, baseio + UART_LCR);
474
475 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
476 efr &= ~MOXA_MUST_EFR_SF_RX_MASK;
477
478 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
479 outb(oldlcr, baseio + UART_LCR);
480}
481
b8cc5549 482#ifdef CONFIG_PCI
1c45607a 483static int __devinit CheckIsMoxaMust(unsigned long io)
1da177e4
LT		 484{
485 u8 oldmcr, hwid;
486 int i;
487
488 outb(0, io + UART_LCR);
148ff86b 489 mxser_disable_must_enchance_mode(io);
1da177e4
LT		 490 oldmcr = inb(io + UART_MCR);
491 outb(0, io + UART_MCR);
148ff86b 492 mxser_set_must_xon1_value(io, 0x11);
1da177e4
LT		 493 if ((hwid = inb(io + UART_MCR)) != 0) {
494 outb(oldmcr, io + UART_MCR);
8ea2c2ec 495 return MOXA_OTHER_UART;
1da177e4
LT		 496 }
497
148ff86b 498 mxser_get_must_hardware_id(io, &hwid);
1c45607a
JS		 499 for (i = 1; i < UART_INFO_NUM; i++) { /* 0 = OTHER_UART */
500 if (hwid == Gpci_uart_info[i].type)
8ea2c2ec 501 return (int)hwid;
1da177e4
LT		 502 }
503 return MOXA_OTHER_UART;
504}
b8cc5549 505#endif
1da177e4 506
1c45607a 507static void process_txrx_fifo(struct mxser_port *info)
1da177e4
LT		 508{
509 int i;
510
511 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
512 info->rx_trigger = 1;
513 info->rx_high_water = 1;
514 info->rx_low_water = 1;
515 info->xmit_fifo_size = 1;
1c45607a
JS		 516 } else
517 for (i = 0; i < UART_INFO_NUM; i++)
518 if (info->board->chip_flag == Gpci_uart_info[i].type) {
1da177e4
LT		 519 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
520 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
521 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
522 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
523 break;
524 }
1da177e4
LT		 525}
526
1c45607a 527static unsigned char mxser_get_msr(int baseaddr, int mode, int port)
1da177e4 528{
72800df9 529 static unsigned char mxser_msr[MXSER_PORTS + 1];
1c45607a 530 unsigned char status = 0;
1da177e4 531
1c45607a 532 status = inb(baseaddr + UART_MSR);
1da177e4 533
1c45607a
JS		 534 mxser_msr[port] &= 0x0F;
535 mxser_msr[port] |= status;
536 status = mxser_msr[port];
537 if (mode)
538 mxser_msr[port] = 0;
1da177e4 539
1c45607a
JS		 540 return status;
541}
1da177e4 542
1c45607a
JS		 543static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp,
544 struct mxser_port *port)
545{
546 DECLARE_WAITQUEUE(wait, current);
547 int retval;
548 int do_clocal = 0;
549 unsigned long flags;
1da177e4 550
1c45607a
JS		 551 /*
552 * If non-blocking mode is set, or the port is not enabled,
553 * then make the check up front and then exit.
554 */
555 if ((filp->f_flags & O_NONBLOCK) ||
556 test_bit(TTY_IO_ERROR, &tty->flags)) {
0ad9e7d1 557 port->port.flags |= ASYNC_NORMAL_ACTIVE;
1c45607a
JS		 558 return 0;
559 }
1da177e4 560
1c45607a
JS		 561 if (tty->termios->c_cflag & CLOCAL)
562 do_clocal = 1;
1da177e4 563
1da177e4 564 /*
1c45607a
JS		 565 * Block waiting for the carrier detect and the line to become
566 * free (i.e., not in use by the callout). While we are in
0ad9e7d1 567 * this loop, port->port.count is dropped by one, so that
1c45607a
JS		 568 * mxser_close() knows when to free things. We restore it upon
569 * exit, either normal or abnormal.
1da177e4 570 */
1c45607a 571 retval = 0;
0ad9e7d1 572 add_wait_queue(&port->port.open_wait, &wait);
1da177e4 573
1c45607a
JS		 574 spin_lock_irqsave(&port->slock, flags);
575 if (!tty_hung_up_p(filp))
0ad9e7d1 576 port->port.count--;
1c45607a 577 spin_unlock_irqrestore(&port->slock, flags);
0ad9e7d1 578 port->port.blocked_open++;
1c45607a
JS		 579 while (1) {
580 spin_lock_irqsave(&port->slock, flags);
581 outb(inb(port->ioaddr + UART_MCR) |
582 UART_MCR_DTR | UART_MCR_RTS, port->ioaddr + UART_MCR);
583 spin_unlock_irqrestore(&port->slock, flags);
584 set_current_state(TASK_INTERRUPTIBLE);
0ad9e7d1
AC		 585 if (tty_hung_up_p(filp) || !(port->port.flags & ASYNC_INITIALIZED)) {
586 if (port->port.flags & ASYNC_HUP_NOTIFY)
1c45607a
JS		 587 retval = -EAGAIN;
588 else
589 retval = -ERESTARTSYS;
590 break;
591 }
0ad9e7d1 592 if (!(port->port.flags & ASYNC_CLOSING) &&
1c45607a
JS		 593 (do_clocal ||
594 (inb(port->ioaddr + UART_MSR) & UART_MSR_DCD)))
595 break;
596 if (signal_pending(current)) {
597 retval = -ERESTARTSYS;
598 break;
599 }
600 schedule();
1da177e4 601 }
1c45607a 602 set_current_state(TASK_RUNNING);
0ad9e7d1 603 remove_wait_queue(&port->port.open_wait, &wait);
1c45607a 604 if (!tty_hung_up_p(filp))
0ad9e7d1
AC		 605 port->port.count++;
606 port->port.blocked_open--;
1c45607a 607 if (retval)
1da177e4 608 return retval;
0ad9e7d1 609 port->port.flags |= ASYNC_NORMAL_ACTIVE;
1da177e4
LT		 610 return 0;
611}
612
216ba023 613static int mxser_set_baud(struct tty_struct *tty, long newspd)
1da177e4 614{
216ba023 615 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 616 int quot = 0, baud;
617 unsigned char cval;
1da177e4 618
216ba023 619 if (!info->ioaddr)
1c45607a 620 return -1;
1da177e4 621
1c45607a
JS		 622 if (newspd > info->max_baud)
623 return -1;
1da177e4 624
1c45607a
JS		 625 if (newspd == 134) {
626 quot = 2 * info->baud_base / 269;
216ba023 627 tty_encode_baud_rate(tty, 134, 134);
1c45607a
JS		 628 } else if (newspd) {
629 quot = info->baud_base / newspd;
630 if (quot == 0)
631 quot = 1;
632 baud = info->baud_base/quot;
216ba023 633 tty_encode_baud_rate(tty, baud, baud);
1c45607a
JS		 634 } else {
635 quot = 0;
636 }
1da177e4 637
1c45607a
JS		 638 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
639 info->timeout += HZ / 50; /* Add .02 seconds of slop */
1da177e4 640
1c45607a
JS		 641 if (quot) {
642 info->MCR |= UART_MCR_DTR;
643 outb(info->MCR, info->ioaddr + UART_MCR);
644 } else {
645 info->MCR &= ~UART_MCR_DTR;
646 outb(info->MCR, info->ioaddr + UART_MCR);
647 return 0;
648 }
1da177e4 649
1c45607a 650 cval = inb(info->ioaddr + UART_LCR);
1da177e4 651
1c45607a 652 outb(cval | UART_LCR_DLAB, info->ioaddr + UART_LCR); /* set DLAB */
1da177e4 653
1c45607a
JS		 654 outb(quot & 0xff, info->ioaddr + UART_DLL); /* LS of divisor */
655 outb(quot >> 8, info->ioaddr + UART_DLM); /* MS of divisor */
656 outb(cval, info->ioaddr + UART_LCR); /* reset DLAB */
1da177e4 657
1c45607a 658#ifdef BOTHER
216ba023 659 if (C_BAUD(tty) == BOTHER) {
1c45607a
JS		 660 quot = info->baud_base % newspd;
661 quot *= 8;
662 if (quot % newspd > newspd / 2) {
663 quot /= newspd;
664 quot++;
665 } else
666 quot /= newspd;
667
148ff86b 668 mxser_set_must_enum_value(info->ioaddr, quot);
1c45607a
JS		 669 } else
670#endif
148ff86b 671 mxser_set_must_enum_value(info->ioaddr, 0);
1da177e4 672
8ea2c2ec 673 return 0;
1da177e4 674}
1da177e4 675
1c45607a
JS		 676/*
677 * This routine is called to set the UART divisor registers to match
678 * the specified baud rate for a serial port.
679 */
216ba023
AC		 680static int mxser_change_speed(struct tty_struct *tty,
681 struct ktermios *old_termios)
1da177e4 682{
216ba023 683 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 684 unsigned cflag, cval, fcr;
685 int ret = 0;
686 unsigned char status;
1da177e4 687
216ba023
AC		 688 cflag = tty->termios->c_cflag;
689 if (!info->ioaddr)
1c45607a 690 return ret;
1da177e4 691
216ba023
AC		 692 if (mxser_set_baud_method[tty->index] == 0)
693 mxser_set_baud(tty, tty_get_baud_rate(tty));
1da177e4 694
1c45607a
JS		 695 /* byte size and parity */
696 switch (cflag & CSIZE) {
697 case CS5:
698 cval = 0x00;
699 break;
700 case CS6:
701 cval = 0x01;
702 break;
703 case CS7:
704 cval = 0x02;
705 break;
706 case CS8:
707 cval = 0x03;
708 break;
709 default:
710 cval = 0x00;
711 break; /* too keep GCC shut... */
712 }
713 if (cflag & CSTOPB)
714 cval |= 0x04;
715 if (cflag & PARENB)
716 cval |= UART_LCR_PARITY;
717 if (!(cflag & PARODD))
718 cval |= UART_LCR_EPAR;
719 if (cflag & CMSPAR)
720 cval |= UART_LCR_SPAR;
1da177e4 721
1c45607a
JS		 722 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
723 if (info->board->chip_flag) {
724 fcr = UART_FCR_ENABLE_FIFO;
725 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 726 mxser_set_must_fifo_value(info);
1c45607a
JS		 727 } else
728 fcr = 0;
729 } else {
730 fcr = UART_FCR_ENABLE_FIFO;
731 if (info->board->chip_flag) {
732 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
148ff86b 733 mxser_set_must_fifo_value(info);
1c45607a
JS		 734 } else {
735 switch (info->rx_trigger) {
736 case 1:
737 fcr |= UART_FCR_TRIGGER_1;
738 break;
739 case 4:
740 fcr |= UART_FCR_TRIGGER_4;
741 break;
742 case 8:
743 fcr |= UART_FCR_TRIGGER_8;
744 break;
745 default:
746 fcr |= UART_FCR_TRIGGER_14;
747 break;
748 }
1da177e4 749 }
1da177e4
LT		 750 }
751
1c45607a
JS		 752 /* CTS flow control flag and modem status interrupts */
753 info->IER &= ~UART_IER_MSI;
754 info->MCR &= ~UART_MCR_AFE;
755 if (cflag & CRTSCTS) {
0ad9e7d1 756 info->port.flags |= ASYNC_CTS_FLOW;
1c45607a
JS		 757 info->IER |= UART_IER_MSI;
758 if ((info->type == PORT_16550A) || (info->board->chip_flag)) {
759 info->MCR |= UART_MCR_AFE;
760 } else {
761 status = inb(info->ioaddr + UART_MSR);
216ba023 762 if (tty->hw_stopped) {
1c45607a 763 if (status & UART_MSR_CTS) {
216ba023 764 tty->hw_stopped = 0;
1c45607a
JS		 765 if (info->type != PORT_16550A &&
766 !info->board->chip_flag) {
767 outb(info->IER & ~UART_IER_THRI,
768 info->ioaddr +
769 UART_IER);
770 info->IER |= UART_IER_THRI;
771 outb(info->IER, info->ioaddr +
772 UART_IER);
773 }
216ba023 774 tty_wakeup(tty);
1c45607a
JS		 775 }
776 } else {
777 if (!(status & UART_MSR_CTS)) {
216ba023 778 tty->hw_stopped = 1;
1c45607a
JS		 779 if ((info->type != PORT_16550A) &&
780 (!info->board->chip_flag)) {
781 info->IER &= ~UART_IER_THRI;
782 outb(info->IER, info->ioaddr +
783 UART_IER);
784 }
785 }
786 }
1da177e4 787 }
1c45607a 788 } else {
0ad9e7d1 789 info->port.flags &= ~ASYNC_CTS_FLOW;
1c45607a
JS		 790 }
791 outb(info->MCR, info->ioaddr + UART_MCR);
792 if (cflag & CLOCAL) {
0ad9e7d1 793 info->port.flags &= ~ASYNC_CHECK_CD;
1c45607a 794 } else {
0ad9e7d1 795 info->port.flags |= ASYNC_CHECK_CD;
1c45607a
JS		 796 info->IER |= UART_IER_MSI;
797 }
798 outb(info->IER, info->ioaddr + UART_IER);
799
800 /*
801 * Set up parity check flag
802 */
803 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
216ba023 804 if (I_INPCK(tty))
1c45607a 805 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
216ba023 806 if (I_BRKINT(tty) || I_PARMRK(tty))
1c45607a 807 info->read_status_mask |= UART_LSR_BI;
1da177e4 808
1c45607a 809 info->ignore_status_mask = 0;
1da177e4 810
216ba023 811 if (I_IGNBRK(tty)) {
1c45607a
JS		 812 info->ignore_status_mask |= UART_LSR_BI;
813 info->read_status_mask |= UART_LSR_BI;
8ea2c2ec 814 /*
1c45607a
JS		 815 * If we're ignore parity and break indicators, ignore
816 * overruns too. (For real raw support).
8ea2c2ec 817 */
216ba023 818 if (I_IGNPAR(tty)) {
1c45607a
JS		 819 info->ignore_status_mask |=
820 UART_LSR_OE |
821 UART_LSR_PE |
822 UART_LSR_FE;
823 info->read_status_mask |=
824 UART_LSR_OE |
825 UART_LSR_PE |
826 UART_LSR_FE;
827 }
1da177e4 828 }
1c45607a 829 if (info->board->chip_flag) {
216ba023
AC		 830 mxser_set_must_xon1_value(info->ioaddr, START_CHAR(tty));
831 mxser_set_must_xoff1_value(info->ioaddr, STOP_CHAR(tty));
832 if (I_IXON(tty)) {
148ff86b
CH		 833 mxser_enable_must_rx_software_flow_control(
834 info->ioaddr);
1c45607a 835 } else {
148ff86b
CH		 836 mxser_disable_must_rx_software_flow_control(
837 info->ioaddr);
1da177e4 838 }
216ba023 839 if (I_IXOFF(tty)) {
148ff86b
CH		 840 mxser_enable_must_tx_software_flow_control(
841 info->ioaddr);
1c45607a 842 } else {
148ff86b
CH		 843 mxser_disable_must_tx_software_flow_control(
844 info->ioaddr);
1da177e4
LT		 845 }
846 }
1da177e4 847
1da177e4 848
1c45607a
JS		 849 outb(fcr, info->ioaddr + UART_FCR); /* set fcr */
850 outb(cval, info->ioaddr + UART_LCR);
1da177e4 851
1c45607a 852 return ret;
1da177e4
LT		 853}
854
216ba023
AC		 855static void mxser_check_modem_status(struct tty_struct *tty,
856 struct mxser_port *port, int status)
1da177e4 857{
1c45607a
JS		 858 /* update input line counters */
859 if (status & UART_MSR_TERI)
860 port->icount.rng++;
861 if (status & UART_MSR_DDSR)
862 port->icount.dsr++;
863 if (status & UART_MSR_DDCD)
864 port->icount.dcd++;
865 if (status & UART_MSR_DCTS)
866 port->icount.cts++;
867 port->mon_data.modem_status = status;
868 wake_up_interruptible(&port->delta_msr_wait);
1da177e4 869
0ad9e7d1 870 if ((port->port.flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
1c45607a 871 if (status & UART_MSR_DCD)
0ad9e7d1 872 wake_up_interruptible(&port->port.open_wait);
1c45607a 873 }
1da177e4 874
216ba023 875 tty = tty_port_tty_get(&port->port);
0ad9e7d1 876 if (port->port.flags & ASYNC_CTS_FLOW) {
216ba023 877 if (tty->hw_stopped) {
1c45607a 878 if (status & UART_MSR_CTS) {
216ba023 879 tty->hw_stopped = 0;
1c45607a
JS		 880
881 if ((port->type != PORT_16550A) &&
882 (!port->board->chip_flag)) {
883 outb(port->IER & ~UART_IER_THRI,
884 port->ioaddr + UART_IER);
885 port->IER |= UART_IER_THRI;
886 outb(port->IER, port->ioaddr +
887 UART_IER);
888 }
216ba023 889 tty_wakeup(tty);
1c45607a
JS		 890 }
891 } else {
892 if (!(status & UART_MSR_CTS)) {
216ba023 893 tty->hw_stopped = 1;
1c45607a
JS		 894 if (port->type != PORT_16550A &&
895 !port->board->chip_flag) {
896 port->IER &= ~UART_IER_THRI;
897 outb(port->IER, port->ioaddr +
898 UART_IER);
899 }
900 }
901 }
1da177e4
LT		 902 }
903}
904
216ba023 905static int mxser_startup(struct tty_struct *tty)
1da177e4 906{
216ba023 907 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 908 unsigned long page;
909 unsigned long flags;
1da177e4 910
1c45607a
JS		 911 page = __get_free_page(GFP_KERNEL);
912 if (!page)
913 return -ENOMEM;
1da177e4 914
1c45607a 915 spin_lock_irqsave(&info->slock, flags);
1da177e4 916
0ad9e7d1 917 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a
JS		 918 free_page(page);
919 spin_unlock_irqrestore(&info->slock, flags);
920 return 0;
921 }
6f08b72c 922
1c45607a 923 if (!info->ioaddr || !info->type) {
216ba023 924 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 925 free_page(page);
926 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 927 return 0;
1c45607a 928 }
0ad9e7d1 929 if (info->port.xmit_buf)
1c45607a
JS		 930 free_page(page);
931 else
0ad9e7d1 932 info->port.xmit_buf = (unsigned char *) page;
1da177e4 933
1da177e4 934 /*
1c45607a
JS		 935 * Clear the FIFO buffers and disable them
936 * (they will be reenabled in mxser_change_speed())
1da177e4 937 */
1c45607a
JS		 938 if (info->board->chip_flag)
939 outb((UART_FCR_CLEAR_RCVR |
940 UART_FCR_CLEAR_XMIT |
941 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->ioaddr + UART_FCR);
942 else
943 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
944 info->ioaddr + UART_FCR);
1da177e4 945
1c45607a
JS		 946 /*
947 * At this point there's no way the LSR could still be 0xFF;
948 * if it is, then bail out, because there's likely no UART
949 * here.
950 */
951 if (inb(info->ioaddr + UART_LSR) == 0xff) {
952 spin_unlock_irqrestore(&info->slock, flags);
953 if (capable(CAP_SYS_ADMIN)) {
216ba023
AC		 954 if (tty)
955 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 956 return 0;
957 } else
958 return -ENODEV;
959 }
1da177e4 960
1c45607a
JS		 961 /*
962 * Clear the interrupt registers.
963 */
964 (void) inb(info->ioaddr + UART_LSR);
965 (void) inb(info->ioaddr + UART_RX);
966 (void) inb(info->ioaddr + UART_IIR);
967 (void) inb(info->ioaddr + UART_MSR);
968
969 /*
970 * Now, initialize the UART
971 */
972 outb(UART_LCR_WLEN8, info->ioaddr + UART_LCR); /* reset DLAB */
973 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
974 outb(info->MCR, info->ioaddr + UART_MCR);
975
976 /*
977 * Finally, enable interrupts
978 */
979 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
980
981 if (info->board->chip_flag)
982 info->IER |= MOXA_MUST_IER_EGDAI;
983 outb(info->IER, info->ioaddr + UART_IER); /* enable interrupts */
984
985 /*
986 * And clear the interrupt registers again for luck.
987 */
988 (void) inb(info->ioaddr + UART_LSR);
989 (void) inb(info->ioaddr + UART_RX);
990 (void) inb(info->ioaddr + UART_IIR);
991 (void) inb(info->ioaddr + UART_MSR);
992
216ba023 993 clear_bit(TTY_IO_ERROR, &tty->flags);
1c45607a
JS		 994 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
995
996 /*
997 * and set the speed of the serial port
998 */
216ba023 999 mxser_change_speed(tty, NULL);
0ad9e7d1 1000 info->port.flags |= ASYNC_INITIALIZED;
1c45607a
JS		 1001 spin_unlock_irqrestore(&info->slock, flags);
1002
1003 return 0;
1004}
1005
1006/*
1007 * This routine will shutdown a serial port; interrupts maybe disabled, and
1008 * DTR is dropped if the hangup on close termio flag is on.
1009 */
216ba023 1010static void mxser_shutdown(struct tty_struct *tty)
1c45607a 1011{
216ba023 1012 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1013 unsigned long flags;
1014
0ad9e7d1 1015 if (!(info->port.flags & ASYNC_INITIALIZED))
1c45607a
JS		 1016 return;
1017
1018 spin_lock_irqsave(&info->slock, flags);
1019
1020 /*
1021 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
1022 * here so the queue might never be waken up
1023 */
1024 wake_up_interruptible(&info->delta_msr_wait);
1025
1026 /*
1027 * Free the IRQ, if necessary
1028 */
0ad9e7d1
AC		 1029 if (info->port.xmit_buf) {
1030 free_page((unsigned long) info->port.xmit_buf);
1031 info->port.xmit_buf = NULL;
1da177e4
LT		 1032 }
1033
1c45607a
JS		 1034 info->IER = 0;
1035 outb(0x00, info->ioaddr + UART_IER);
1036
216ba023 1037 if (tty->termios->c_cflag & HUPCL)
1c45607a
JS		 1038 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
1039 outb(info->MCR, info->ioaddr + UART_MCR);
1040
1041 /* clear Rx/Tx FIFO's */
1042 if (info->board->chip_flag)
1043 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT |
1044 MOXA_MUST_FCR_GDA_MODE_ENABLE,
1045 info->ioaddr + UART_FCR);
1046 else
1047 outb(UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT,
1048 info->ioaddr + UART_FCR);
1049
1050 /* read data port to reset things */
1051 (void) inb(info->ioaddr + UART_RX);
1052
216ba023 1053 set_bit(TTY_IO_ERROR, &tty->flags);
1c45607a 1054
0ad9e7d1 1055 info->port.flags &= ~ASYNC_INITIALIZED;
1c45607a
JS		 1056
1057 if (info->board->chip_flag)
1058 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->ioaddr);
1059
1060 spin_unlock_irqrestore(&info->slock, flags);
1061}
1062
1063/*
1064 * This routine is called whenever a serial port is opened. It
1065 * enables interrupts for a serial port, linking in its async structure into
1066 * the IRQ chain. It also performs the serial-specific
1067 * initialization for the tty structure.
1068 */
1069static int mxser_open(struct tty_struct *tty, struct file *filp)
1070{
1071 struct mxser_port *info;
1072 unsigned long flags;
1073 int retval, line;
1074
1075 line = tty->index;
1076 if (line == MXSER_PORTS)
1077 return 0;
1078 if (line < 0 || line > MXSER_PORTS)
1079 return -ENODEV;
1080 info = &mxser_boards[line / MXSER_PORTS_PER_BOARD].ports[line % MXSER_PORTS_PER_BOARD];
1081 if (!info->ioaddr)
1082 return -ENODEV;
1083
1084 tty->driver_data = info;
216ba023 1085 tty_port_tty_set(&info->port, tty);
8ea2c2ec 1086 /*
1c45607a
JS		 1087 * Start up serial port
1088 */
1089 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1090 info->port.count++;
1c45607a 1091 spin_unlock_irqrestore(&info->slock, flags);
216ba023 1092 retval = mxser_startup(tty);
1c45607a
JS		 1093 if (retval)
1094 return retval;
1095
1096 retval = mxser_block_til_ready(tty, filp, info);
1097 if (retval)
1098 return retval;
1da177e4 1099
8cddd707 1100 /* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1101 tty->low_latency = 1;
1102 return 0;
1103}
1104
978e595f
AC		 1105static void mxser_flush_buffer(struct tty_struct *tty)
1106{
1107 struct mxser_port *info = tty->driver_data;
1108 char fcr;
1109 unsigned long flags;
1110
1111
1112 spin_lock_irqsave(&info->slock, flags);
1113 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1114
1115 fcr = inb(info->ioaddr + UART_FCR);
1116 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1117 info->ioaddr + UART_FCR);
1118 outb(fcr, info->ioaddr + UART_FCR);
1119
1120 spin_unlock_irqrestore(&info->slock, flags);
1121
1122 tty_wakeup(tty);
1123}
1124
1125
1da177e4
LT		 1126/*
1127 * This routine is called when the serial port gets closed. First, we
1128 * wait for the last remaining data to be sent. Then, we unlink its
1129 * async structure from the interrupt chain if necessary, and we free
1130 * that IRQ if nothing is left in the chain.
1131 */
1132static void mxser_close(struct tty_struct *tty, struct file *filp)
1133{
1c45607a 1134 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1135
1136 unsigned long timeout;
1137 unsigned long flags;
1da177e4
LT		 1138
1139 if (tty->index == MXSER_PORTS)
1140 return;
1141 if (!info)
6f08b72c 1142 return;
1da177e4
LT		 1143
1144 spin_lock_irqsave(&info->slock, flags);
1145
1146 if (tty_hung_up_p(filp)) {
1147 spin_unlock_irqrestore(&info->slock, flags);
1148 return;
1149 }
0ad9e7d1 1150 if ((tty->count == 1) && (info->port.count != 1)) {
1da177e4
LT		 1151 /*
1152 * Uh, oh. tty->count is 1, which means that the tty
0ad9e7d1 1153 * structure will be freed. Info->port.count should always
1da177e4
LT		 1154 * be one in these conditions. If it's greater than
1155 * one, we've got real problems, since it means the
1156 * serial port won't be shutdown.
1157 */
8ea2c2ec 1158 printk(KERN_ERR "mxser_close: bad serial port count; "
0ad9e7d1
AC		 1159 "tty->count is 1, info->port.count is %d\n", info->port.count);
1160 info->port.count = 1;
1da177e4 1161 }
0ad9e7d1 1162 if (--info->port.count < 0) {
8ea2c2ec 1163 printk(KERN_ERR "mxser_close: bad serial port count for "
0ad9e7d1
AC		 1164 "ttys%d: %d\n", tty->index, info->port.count);
1165 info->port.count = 0;
1da177e4 1166 }
0ad9e7d1 1167 if (info->port.count) {
1da177e4
LT		 1168 spin_unlock_irqrestore(&info->slock, flags);
1169 return;
1170 }
0ad9e7d1 1171 info->port.flags |= ASYNC_CLOSING;
1da177e4
LT		 1172 spin_unlock_irqrestore(&info->slock, flags);
1173 /*
1174 * Save the termios structure, since this port may have
1175 * separate termios for callout and dialin.
1176 */
0ad9e7d1 1177 if (info->port.flags & ASYNC_NORMAL_ACTIVE)
1da177e4
LT		 1178 info->normal_termios = *tty->termios;
1179 /*
1180 * Now we wait for the transmit buffer to clear; and we notify
1181 * the line discipline to only process XON/XOFF characters.
1182 */
1183 tty->closing = 1;
44b7d1b3
AC		 1184 if (info->port.closing_wait != ASYNC_CLOSING_WAIT_NONE)
1185 tty_wait_until_sent(tty, info->port.closing_wait);
1da177e4
LT		 1186 /*
1187 * At this point we stop accepting input. To do this, we
1188 * disable the receive line status interrupts, and tell the
1189 * interrupt driver to stop checking the data ready bit in the
1190 * line status register.
1191 */
1192 info->IER &= ~UART_IER_RLSI;
1c45607a 1193 if (info->board->chip_flag)
1da177e4 1194 info->IER &= ~MOXA_MUST_RECV_ISR;
1c45607a 1195
0ad9e7d1 1196 if (info->port.flags & ASYNC_INITIALIZED) {
1c45607a 1197 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1198 /*
1199 * Before we drop DTR, make sure the UART transmitter
1200 * has completely drained; this is especially
1201 * important if there is a transmit FIFO!
1202 */
1203 timeout = jiffies + HZ;
1c45607a 1204 while (!(inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1205 schedule_timeout_interruptible(5);
1da177e4
LT		 1206 if (time_after(jiffies, timeout))
1207 break;
1208 }
1209 }
216ba023 1210 mxser_shutdown(tty);
1da177e4 1211
978e595f 1212 mxser_flush_buffer(tty);
1c45607a
JS		 1213 tty_ldisc_flush(tty);
1214
1da177e4 1215 tty->closing = 0;
216ba023 1216 tty_port_tty_set(&info->port, NULL);
0ad9e7d1 1217 if (info->port.blocked_open) {
44b7d1b3
AC		 1218 if (info->port.close_delay)
1219 schedule_timeout_interruptible(info->port.close_delay);
0ad9e7d1 1220 wake_up_interruptible(&info->port.open_wait);
1da177e4
LT		 1221 }
1222
0ad9e7d1 1223 info->port.flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1da177e4
LT		 1224}
1225
1226static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1227{
1228 int c, total = 0;
1c45607a 1229 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1230 unsigned long flags;
1231
0ad9e7d1 1232 if (!info->port.xmit_buf)
8ea2c2ec 1233 return 0;
1da177e4
LT		 1234
1235 while (1) {
8ea2c2ec
JJ		 1236 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1237 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1238 if (c <= 0)
1239 break;
1240
0ad9e7d1 1241 memcpy(info->port.xmit_buf + info->xmit_head, buf, c);
1da177e4 1242 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1243 info->xmit_head = (info->xmit_head + c) &
1244 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1245 info->xmit_cnt += c;
1246 spin_unlock_irqrestore(&info->slock, flags);
1247
1248 buf += c;
1249 count -= c;
1250 total += c;
1da177e4
LT		 1251 }
1252
1c45607a 1253 if (info->xmit_cnt && !tty->stopped) {
8ea2c2ec
JJ		 1254 if (!tty->hw_stopped ||
1255 (info->type == PORT_16550A) ||
1c45607a 1256 (info->board->chip_flag)) {
1da177e4 1257 spin_lock_irqsave(&info->slock, flags);
1c45607a
JS		 1258 outb(info->IER & ~UART_IER_THRI, info->ioaddr +
1259 UART_IER);
1da177e4 1260 info->IER |= UART_IER_THRI;
1c45607a 1261 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1262 spin_unlock_irqrestore(&info->slock, flags);
1263 }
1264 }
1265 return total;
1266}
1267
0be2eade 1268static int mxser_put_char(struct tty_struct *tty, unsigned char ch)
1da177e4 1269{
1c45607a 1270 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1271 unsigned long flags;
1272
0ad9e7d1 1273 if (!info->port.xmit_buf)
0be2eade 1274 return 0;
1da177e4
LT		 1275
1276 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
0be2eade 1277 return 0;
1da177e4
LT		 1278
1279 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 1280 info->port.xmit_buf[info->xmit_head++] = ch;
1da177e4
LT		 1281 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1282 info->xmit_cnt++;
1283 spin_unlock_irqrestore(&info->slock, flags);
1c45607a 1284 if (!tty->stopped) {
8ea2c2ec
JJ		 1285 if (!tty->hw_stopped ||
1286 (info->type == PORT_16550A) ||
1c45607a 1287 info->board->chip_flag) {
1da177e4 1288 spin_lock_irqsave(&info->slock, flags);
1c45607a 1289 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1290 info->IER |= UART_IER_THRI;
1c45607a 1291 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1292 spin_unlock_irqrestore(&info->slock, flags);
1293 }
1294 }
0be2eade 1295 return 1;
1da177e4
LT		 1296}
1297
1298
1299static void mxser_flush_chars(struct tty_struct *tty)
1300{
1c45607a 1301 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1302 unsigned long flags;
1303
ace7dd96
JS		 1304 if (info->xmit_cnt <= 0 || tty->stopped || !info->port.xmit_buf ||
1305 (tty->hw_stopped && info->type != PORT_16550A &&
1306 !info->board->chip_flag))
1da177e4
LT		 1307 return;
1308
1309 spin_lock_irqsave(&info->slock, flags);
1310
1c45607a 1311 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 1312 info->IER |= UART_IER_THRI;
1c45607a 1313 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1314
1315 spin_unlock_irqrestore(&info->slock, flags);
1316}
1317
1318static int mxser_write_room(struct tty_struct *tty)
1319{
1c45607a 1320 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1321 int ret;
1322
1323 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
ace7dd96 1324 return ret < 0 ? 0 : ret;
1da177e4
LT		 1325}
1326
1327static int mxser_chars_in_buffer(struct tty_struct *tty)
1328{
1c45607a 1329 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 1330 return info->xmit_cnt;
1331}
1332
1c45607a
JS		 1333/*
1334 * ------------------------------------------------------------
1335 * friends of mxser_ioctl()
1336 * ------------------------------------------------------------
1337 */
216ba023 1338static int mxser_get_serial_info(struct tty_struct *tty,
1c45607a
JS		 1339 struct serial_struct __user *retinfo)
1340{
216ba023 1341 struct mxser_port *info = tty->driver_data;
1c45607a
JS		 1342 struct serial_struct tmp = {
1343 .type = info->type,
216ba023 1344 .line = tty->index,
1c45607a
JS		 1345 .port = info->ioaddr,
1346 .irq = info->board->irq,
0ad9e7d1 1347 .flags = info->port.flags,
1c45607a 1348 .baud_base = info->baud_base,
44b7d1b3
AC		 1349 .close_delay = info->port.close_delay,
1350 .closing_wait = info->port.closing_wait,
1c45607a
JS		 1351 .custom_divisor = info->custom_divisor,
1352 .hub6 = 0
1353 };
1354 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
1355 return -EFAULT;
1356 return 0;
1357}
1358
216ba023 1359static int mxser_set_serial_info(struct tty_struct *tty,
1c45607a 1360 struct serial_struct __user *new_info)
1da177e4 1361{
216ba023 1362 struct mxser_port *info = tty->driver_data;
1c45607a 1363 struct serial_struct new_serial;
80ff8a80 1364 speed_t baud;
1c45607a
JS		 1365 unsigned long sl_flags;
1366 unsigned int flags;
1367 int retval = 0;
1da177e4 1368
1c45607a 1369 if (!new_info || !info->ioaddr)
80ff8a80 1370 return -ENODEV;
1c45607a
JS		 1371 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1372 return -EFAULT;
1da177e4 1373
80ff8a80
JS		 1374 if (new_serial.irq != info->board->irq ||
1375 new_serial.port != info->ioaddr)
1376 return -EINVAL;
1da177e4 1377
0ad9e7d1 1378 flags = info->port.flags & ASYNC_SPD_MASK;
1da177e4 1379
1c45607a
JS		 1380 if (!capable(CAP_SYS_ADMIN)) {
1381 if ((new_serial.baud_base != info->baud_base) ||
44b7d1b3 1382 (new_serial.close_delay != info->port.close_delay) ||
0ad9e7d1 1383 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->port.flags & ~ASYNC_USR_MASK)))
1c45607a 1384 return -EPERM;
0ad9e7d1 1385 info->port.flags = ((info->port.flags & ~ASYNC_USR_MASK) |
1c45607a
JS		 1386 (new_serial.flags & ASYNC_USR_MASK));
1387 } else {
1da177e4 1388 /*
1c45607a
JS		 1389 * OK, past this point, all the error checking has been done.
1390 * At this point, we start making changes.....
1da177e4 1391 */
0ad9e7d1 1392 info->port.flags = ((info->port.flags & ~ASYNC_FLAGS) |
1c45607a 1393 (new_serial.flags & ASYNC_FLAGS));
44b7d1b3
AC		 1394 info->port.close_delay = new_serial.close_delay * HZ / 100;
1395 info->port.closing_wait = new_serial.closing_wait * HZ / 100;
216ba023
AC		 1396 tty->low_latency = (info->port.flags & ASYNC_LOW_LATENCY)
1397 ? 1 : 0;
0ad9e7d1 1398 if ((info->port.flags & ASYNC_SPD_MASK) == ASYNC_SPD_CUST &&
80ff8a80
JS		 1399 (new_serial.baud_base != info->baud_base ||
1400 new_serial.custom_divisor !=
1401 info->custom_divisor)) {
1402 baud = new_serial.baud_base / new_serial.custom_divisor;
216ba023 1403 tty_encode_baud_rate(tty, baud, baud);
80ff8a80 1404 }
1c45607a 1405 }
fc83815c 1406
1c45607a 1407 info->type = new_serial.type;
1da177e4 1408
1c45607a
JS		 1409 process_txrx_fifo(info);
1410
0ad9e7d1
AC		 1411 if (info->port.flags & ASYNC_INITIALIZED) {
1412 if (flags != (info->port.flags & ASYNC_SPD_MASK)) {
1c45607a 1413 spin_lock_irqsave(&info->slock, sl_flags);
216ba023 1414 mxser_change_speed(tty, NULL);
1c45607a 1415 spin_unlock_irqrestore(&info->slock, sl_flags);
1da177e4 1416 }
1c45607a 1417 } else
216ba023 1418 retval = mxser_startup(tty);
1da177e4 1419
1c45607a
JS		 1420 return retval;
1421}
1da177e4 1422
1c45607a
JS		 1423/*
1424 * mxser_get_lsr_info - get line status register info
1425 *
1426 * Purpose: Let user call ioctl() to get info when the UART physically
1427 * is emptied. On bus types like RS485, the transmitter must
1428 * release the bus after transmitting. This must be done when
1429 * the transmit shift register is empty, not be done when the
1430 * transmit holding register is empty. This functionality
1431 * allows an RS485 driver to be written in user space.
1432 */
1433static int mxser_get_lsr_info(struct mxser_port *info,
1434 unsigned int __user *value)
1435{
1436 unsigned char status;
1437 unsigned int result;
1438 unsigned long flags;
1da177e4 1439
1c45607a
JS		 1440 spin_lock_irqsave(&info->slock, flags);
1441 status = inb(info->ioaddr + UART_LSR);
1442 spin_unlock_irqrestore(&info->slock, flags);
1443 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
1444 return put_user(result, value);
1445}
1da177e4 1446
1c45607a
JS		 1447static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
1448{
1449 struct mxser_port *info = tty->driver_data;
1450 unsigned char control, status;
1451 unsigned long flags;
1da177e4 1452
8ea2c2ec 1453
1c45607a
JS		 1454 if (tty->index == MXSER_PORTS)
1455 return -ENOIOCTLCMD;
1456 if (test_bit(TTY_IO_ERROR, &tty->flags))
1457 return -EIO;
1da177e4 1458
1c45607a 1459 control = info->MCR;
1da177e4 1460
1c45607a
JS		 1461 spin_lock_irqsave(&info->slock, flags);
1462 status = inb(info->ioaddr + UART_MSR);
1463 if (status & UART_MSR_ANY_DELTA)
216ba023 1464 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1465 spin_unlock_irqrestore(&info->slock, flags);
1466 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
1467 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
1468 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
1469 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
1470 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
1471 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1472}
1da177e4 1473
1c45607a
JS		 1474static int mxser_tiocmset(struct tty_struct *tty, struct file *file,
1475 unsigned int set, unsigned int clear)
1476{
1477 struct mxser_port *info = tty->driver_data;
1478 unsigned long flags;
1da177e4 1479
1da177e4 1480
1c45607a
JS		 1481 if (tty->index == MXSER_PORTS)
1482 return -ENOIOCTLCMD;
1483 if (test_bit(TTY_IO_ERROR, &tty->flags))
1484 return -EIO;
1da177e4 1485
1c45607a 1486 spin_lock_irqsave(&info->slock, flags);
1da177e4 1487
1c45607a
JS		 1488 if (set & TIOCM_RTS)
1489 info->MCR |= UART_MCR_RTS;
1490 if (set & TIOCM_DTR)
1491 info->MCR |= UART_MCR_DTR;
1da177e4 1492
1c45607a
JS		 1493 if (clear & TIOCM_RTS)
1494 info->MCR &= ~UART_MCR_RTS;
1495 if (clear & TIOCM_DTR)
1496 info->MCR &= ~UART_MCR_DTR;
8ea2c2ec 1497
1c45607a
JS		 1498 outb(info->MCR, info->ioaddr + UART_MCR);
1499 spin_unlock_irqrestore(&info->slock, flags);
1500 return 0;
1501}
1da177e4 1502
1c45607a
JS		 1503static int __init mxser_program_mode(int port)
1504{
1505 int id, i, j, n;
1506
1507 outb(0, port);
1508 outb(0, port);
1509 outb(0, port);
1510 (void)inb(port);
1511 (void)inb(port);
1512 outb(0, port);
1513 (void)inb(port);
1514
1515 id = inb(port + 1) & 0x1F;
1516 if ((id != C168_ASIC_ID) &&
1517 (id != C104_ASIC_ID) &&
1518 (id != C102_ASIC_ID) &&
1519 (id != CI132_ASIC_ID) &&
1520 (id != CI134_ASIC_ID) &&
1521 (id != CI104J_ASIC_ID))
1522 return -1;
1523 for (i = 0, j = 0; i < 4; i++) {
1524 n = inb(port + 2);
1525 if (n == 'M') {
1526 j = 1;
1527 } else if ((j == 1) && (n == 1)) {
1528 j = 2;
1529 break;
1530 } else
1531 j = 0;
1da177e4 1532 }
1c45607a
JS		 1533 if (j != 2)
1534 id = -2;
1535 return id;
1da177e4
LT		 1536}
1537
1c45607a
JS		 1538static void __init mxser_normal_mode(int port)
1539{
1540 int i, n;
1541
1542 outb(0xA5, port + 1);
1543 outb(0x80, port + 3);
1544 outb(12, port + 0); /* 9600 bps */
1545 outb(0, port + 1);
1546 outb(0x03, port + 3); /* 8 data bits */
1547 outb(0x13, port + 4); /* loop back mode */
1548 for (i = 0; i < 16; i++) {
1549 n = inb(port + 5);
1550 if ((n & 0x61) == 0x60)
1551 break;
1552 if ((n & 1) == 1)
1553 (void)inb(port);
1554 }
1555 outb(0x00, port + 4);
1556}
1557
1558#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
1559#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
1560#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
1561#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
1562#define EN_CCMD 0x000 /* Chip's command register */
1563#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
1564#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
1565#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
1566#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
1567#define EN0_DCFG 0x00E /* Data configuration reg WR */
1568#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
1569#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
1570#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
1571static int __init mxser_read_register(int port, unsigned short *regs)
1572{
1573 int i, k, value, id;
1574 unsigned int j;
1575
1576 id = mxser_program_mode(port);
1577 if (id < 0)
1578 return id;
1579 for (i = 0; i < 14; i++) {
1580 k = (i & 0x3F) | 0x180;
1581 for (j = 0x100; j > 0; j >>= 1) {
1582 outb(CHIP_CS, port);
1583 if (k & j) {
1584 outb(CHIP_CS | CHIP_DO, port);
1585 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
1586 } else {
1587 outb(CHIP_CS, port);
1588 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
1589 }
1590 }
1591 (void)inb(port);
1592 value = 0;
1593 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
1594 outb(CHIP_CS, port);
1595 outb(CHIP_CS | CHIP_SK, port);
1596 if (inb(port) & CHIP_DI)
1597 value |= j;
1598 }
1599 regs[i] = value;
1600 outb(0, port);
1601 }
1602 mxser_normal_mode(port);
1603 return id;
1604}
1da177e4
LT		 1605
1606static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1607{
1c45607a 1608 struct mxser_port *port;
216ba023 1609 struct tty_struct *tty;
1c45607a
JS		 1610 int result, status;
1611 unsigned int i, j;
9d6d162d 1612 int ret = 0;
1da177e4
LT		 1613
1614 switch (cmd) {
1da177e4 1615 case MOXA_GET_MAJOR:
8f3d137e
JS		 1616 if (printk_ratelimit())
1617 printk(KERN_WARNING "mxser: '%s' uses deprecated ioctl "
1618 "%x (GET_MAJOR), fix your userspace\n",
1619 current->comm, cmd);
1c45607a 1620 return put_user(ttymajor, (int __user *)argp);
1da177e4
LT		 1621
1622 case MOXA_CHKPORTENABLE:
1623 result = 0;
9d6d162d 1624 lock_kernel();
1c45607a
JS		 1625 for (i = 0; i < MXSER_BOARDS; i++)
1626 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++)
1627 if (mxser_boards[i].ports[j].ioaddr)
1628 result |= (1 << i);
9d6d162d 1629 unlock_kernel();
8ea2c2ec 1630 return put_user(result, (unsigned long __user *)argp);
1da177e4 1631 case MOXA_GETDATACOUNT:
9d6d162d 1632 lock_kernel();
1da177e4 1633 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
9d6d162d
AC		 1634 ret = -EFAULT;
1635 unlock_kernel();
1636 return ret;
72800df9
JS		 1637 case MOXA_GETMSTATUS: {
1638 struct mxser_mstatus ms, __user *msu = argp;
9d6d162d 1639 lock_kernel();
1c45607a
JS		 1640 for (i = 0; i < MXSER_BOARDS; i++)
1641 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++) {
1642 port = &mxser_boards[i].ports[j];
72800df9 1643 memset(&ms, 0, sizeof(ms));
1c45607a 1644
72800df9
JS		 1645 if (!port->ioaddr)
1646 goto copy;
216ba023
AC		 1647
1648 tty = tty_port_tty_get(&port->port);
1da177e4 1649
216ba023 1650 if (!tty || !tty->termios)
72800df9 1651 ms.cflag = port->normal_termios.c_cflag;
1c45607a 1652 else
216ba023
AC		 1653 ms.cflag = tty->termios->c_cflag;
1654 tty_kref_put(tty);
1c45607a 1655 status = inb(port->ioaddr + UART_MSR);
72800df9
JS		 1656 if (status & UART_MSR_DCD)
1657 ms.dcd = 1;
1658 if (status & UART_MSR_DSR)
1659 ms.dsr = 1;
1660 if (status & UART_MSR_CTS)
1661 ms.cts = 1;
1662 copy:
1663 if (copy_to_user(msu, &ms, sizeof(ms))) {
1664 unlock_kernel();
1665 return -EFAULT;
1666 }
1667 msu++;
1c45607a 1668 }
9d6d162d 1669 unlock_kernel();
1da177e4 1670 return 0;
72800df9 1671 }
8ea2c2ec 1672 case MOXA_ASPP_MON_EXT: {
72800df9
JS		 1673 struct mxser_mon_ext *me; /* it's 2k, stack unfriendly */
1674 unsigned int cflag, iflag, p;
1675 u8 opmode;
1676
1677 me = kzalloc(sizeof(*me), GFP_KERNEL);
1678 if (!me)
1679 return -ENOMEM;
1c45607a 1680
9d6d162d 1681 lock_kernel();
72800df9
JS		 1682 for (i = 0, p = 0; i < MXSER_BOARDS; i++) {
1683 for (j = 0; j < MXSER_PORTS_PER_BOARD; j++, p++) {
1684 if (p >= ARRAY_SIZE(me->rx_cnt)) {
1685 i = MXSER_BOARDS;
1686 break;
1687 }
1c45607a
JS		 1688 port = &mxser_boards[i].ports[j];
1689 if (!port->ioaddr)
1da177e4
LT		 1690 continue;
1691
72800df9 1692 status = mxser_get_msr(port->ioaddr, 0, p);
1c45607a 1693
1da177e4 1694 if (status & UART_MSR_TERI)
1c45607a 1695 port->icount.rng++;
1da177e4 1696 if (status & UART_MSR_DDSR)
1c45607a 1697 port->icount.dsr++;
1da177e4 1698 if (status & UART_MSR_DDCD)
1c45607a 1699 port->icount.dcd++;
1da177e4 1700 if (status & UART_MSR_DCTS)
1c45607a
JS		 1701 port->icount.cts++;
1702
1703 port->mon_data.modem_status = status;
72800df9
JS		 1704 me->rx_cnt[p] = port->mon_data.rxcnt;
1705 me->tx_cnt[p] = port->mon_data.txcnt;
1706 me->up_rxcnt[p] = port->mon_data.up_rxcnt;
1707 me->up_txcnt[p] = port->mon_data.up_txcnt;
1708 me->modem_status[p] =
1c45607a 1709 port->mon_data.modem_status;
216ba023 1710 tty = tty_port_tty_get(&port->port);
1c45607a 1711
216ba023 1712 if (!tty || !tty->termios) {
1c45607a
JS		 1713 cflag = port->normal_termios.c_cflag;
1714 iflag = port->normal_termios.c_iflag;
216ba023 1715 me->baudrate[p] = tty_termios_baud_rate(&port->normal_termios);
1da177e4 1716 } else {
216ba023
AC		 1717 cflag = tty->termios->c_cflag;
1718 iflag = tty->termios->c_iflag;
1719 me->baudrate[p] = tty_get_baud_rate(tty);
1da177e4 1720 }
216ba023 1721 tty_kref_put(tty);
1da177e4 1722
72800df9
JS		 1723 me->databits[p] = cflag & CSIZE;
1724 me->stopbits[p] = cflag & CSTOPB;
1725 me->parity[p] = cflag & (PARENB | PARODD |
1726 CMSPAR);
1da177e4
LT		 1727
1728 if (cflag & CRTSCTS)
72800df9 1729 me->flowctrl[p] |= 0x03;
1da177e4
LT		 1730
1731 if (iflag & (IXON | IXOFF))
72800df9 1732 me->flowctrl[p] |= 0x0C;
1da177e4 1733
1c45607a 1734 if (port->type == PORT_16550A)
72800df9 1735 me->fifo[p] = 1;
1da177e4 1736
72800df9
JS		 1737 opmode = inb(port->opmode_ioaddr) >>
1738 ((p % 4) * 2);
1da177e4 1739 opmode &= OP_MODE_MASK;
72800df9 1740 me->iftype[p] = opmode;
1da177e4 1741 }
9d6d162d
AC		 1742 }
1743 unlock_kernel();
72800df9
JS		 1744 if (copy_to_user(argp, me, sizeof(*me)))
1745 ret = -EFAULT;
1746 kfree(me);
1747 return ret;
9d6d162d
AC		 1748 }
1749 default:
1da177e4
LT		 1750 return -ENOIOCTLCMD;
1751 }
1752 return 0;
1753}
1754
1c45607a
JS		 1755static int mxser_cflags_changed(struct mxser_port *info, unsigned long arg,
1756 struct async_icount *cprev)
1da177e4 1757{
1c45607a
JS		 1758 struct async_icount cnow;
1759 unsigned long flags;
1760 int ret;
1da177e4 1761
1c45607a
JS		 1762 spin_lock_irqsave(&info->slock, flags);
1763 cnow = info->icount; /* atomic copy */
1764 spin_unlock_irqrestore(&info->slock, flags);
1da177e4 1765
1c45607a
JS		 1766 ret = ((arg & TIOCM_RNG) && (cnow.rng != cprev->rng)) ||
1767 ((arg & TIOCM_DSR) && (cnow.dsr != cprev->dsr)) ||
1768 ((arg & TIOCM_CD) && (cnow.dcd != cprev->dcd)) ||
1769 ((arg & TIOCM_CTS) && (cnow.cts != cprev->cts));
1da177e4 1770
1c45607a
JS		 1771 *cprev = cnow;
1772
1773 return ret;
1774}
1775
1776static int mxser_ioctl(struct tty_struct *tty, struct file *file,
1777 unsigned int cmd, unsigned long arg)
1da177e4 1778{
1c45607a
JS		 1779 struct mxser_port *info = tty->driver_data;
1780 struct async_icount cnow;
1c45607a
JS		 1781 unsigned long flags;
1782 void __user *argp = (void __user *)arg;
1783 int retval;
1da177e4 1784
1c45607a
JS		 1785 if (tty->index == MXSER_PORTS)
1786 return mxser_ioctl_special(cmd, argp);
1da177e4 1787
1c45607a
JS		 1788 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1789 int p;
1790 unsigned long opmode;
1791 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1792 int shiftbit;
1793 unsigned char val, mask;
1da177e4 1794
1c45607a
JS		 1795 p = tty->index % 4;
1796 if (cmd == MOXA_SET_OP_MODE) {
1797 if (get_user(opmode, (int __user *) argp))
1798 return -EFAULT;
1799 if (opmode != RS232_MODE &&
1800 opmode != RS485_2WIRE_MODE &&
1801 opmode != RS422_MODE &&
1802 opmode != RS485_4WIRE_MODE)
1803 return -EFAULT;
9d6d162d 1804 lock_kernel();
1c45607a
JS		 1805 mask = ModeMask[p];
1806 shiftbit = p * 2;
1807 val = inb(info->opmode_ioaddr);
1808 val &= mask;
1809 val |= (opmode << shiftbit);
1810 outb(val, info->opmode_ioaddr);
9d6d162d 1811 unlock_kernel();
1c45607a 1812 } else {
9d6d162d 1813 lock_kernel();
1c45607a
JS		 1814 shiftbit = p * 2;
1815 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1816 opmode &= OP_MODE_MASK;
9d6d162d 1817 unlock_kernel();
1c45607a
JS		 1818 if (put_user(opmode, (int __user *)argp))
1819 return -EFAULT;
1820 }
1821 return 0;
1822 }
1823
1824 if (cmd != TIOCGSERIAL && cmd != TIOCMIWAIT && cmd != TIOCGICOUNT &&
1825 test_bit(TTY_IO_ERROR, &tty->flags))
1826 return -EIO;
1827
1828 switch (cmd) {
1c45607a 1829 case TIOCGSERIAL:
9d6d162d 1830 lock_kernel();
216ba023 1831 retval = mxser_get_serial_info(tty, argp);
9d6d162d
AC		 1832 unlock_kernel();
1833 return retval;
1c45607a 1834 case TIOCSSERIAL:
9d6d162d 1835 lock_kernel();
216ba023 1836 retval = mxser_set_serial_info(tty, argp);
9d6d162d
AC		 1837 unlock_kernel();
1838 return retval;
1c45607a 1839 case TIOCSERGETLSR: /* Get line status register */
9d6d162d 1840 return mxser_get_lsr_info(info, argp);
1c45607a
JS		 1841 /*
1842 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1843 * - mask passed in arg for lines of interest
1844 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1845 * Caller should use TIOCGICOUNT to see which one it was
1846 */
1847 case TIOCMIWAIT:
1848 spin_lock_irqsave(&info->slock, flags);
1849 cnow = info->icount; /* note the counters on entry */
1850 spin_unlock_irqrestore(&info->slock, flags);
1851
1852 return wait_event_interruptible(info->delta_msr_wait,
1853 mxser_cflags_changed(info, arg, &cnow));
1854 /*
1855 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1856 * Return: write counters to the user passed counter struct
1857 * NB: both 1->0 and 0->1 transitions are counted except for
1858 * RI where only 0->1 is counted.
1859 */
41aee9a1
JS		 1860 case TIOCGICOUNT: {
1861 struct serial_icounter_struct icnt = { 0 };
1c45607a
JS		 1862 spin_lock_irqsave(&info->slock, flags);
1863 cnow = info->icount;
1864 spin_unlock_irqrestore(&info->slock, flags);
41aee9a1
JS		 1865
1866 icnt.frame = cnow.frame;
1867 icnt.brk = cnow.brk;
1868 icnt.overrun = cnow.overrun;
1869 icnt.buf_overrun = cnow.buf_overrun;
1870 icnt.parity = cnow.parity;
1871 icnt.rx = cnow.rx;
1872 icnt.tx = cnow.tx;
1873 icnt.cts = cnow.cts;
1874 icnt.dsr = cnow.dsr;
1875 icnt.rng = cnow.rng;
1876 icnt.dcd = cnow.dcd;
1877
1878 return copy_to_user(argp, &icnt, sizeof(icnt)) ? -EFAULT : 0;
1879 }
1c45607a
JS		 1880 case MOXA_HighSpeedOn:
1881 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1882 case MOXA_SDS_RSTICOUNTER:
9d6d162d 1883 lock_kernel();
1c45607a
JS		 1884 info->mon_data.rxcnt = 0;
1885 info->mon_data.txcnt = 0;
9d6d162d 1886 unlock_kernel();
1c45607a
JS		 1887 return 0;
1888
1889 case MOXA_ASPP_OQUEUE:{
1890 int len, lsr;
1891
9d6d162d 1892 lock_kernel();
1c45607a 1893 len = mxser_chars_in_buffer(tty);
1c45607a 1894 lsr = inb(info->ioaddr + UART_LSR) & UART_LSR_TEMT;
1c45607a 1895 len += (lsr ? 0 : 1);
9d6d162d 1896 unlock_kernel();
1c45607a
JS		 1897
1898 return put_user(len, (int __user *)argp);
1899 }
1900 case MOXA_ASPP_MON: {
1901 int mcr, status;
1902
9d6d162d 1903 lock_kernel();
1c45607a 1904 status = mxser_get_msr(info->ioaddr, 1, tty->index);
216ba023 1905 mxser_check_modem_status(tty, info, status);
1c45607a
JS		 1906
1907 mcr = inb(info->ioaddr + UART_MCR);
1908 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1909 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1910 else
1911 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1912
1913 if (mcr & MOXA_MUST_MCR_TX_XON)
1914 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1915 else
1916 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1917
216ba023 1918 if (tty->hw_stopped)
1c45607a
JS		 1919 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1920 else
1921 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
9d6d162d 1922 unlock_kernel();
1c45607a
JS		 1923 if (copy_to_user(argp, &info->mon_data,
1924 sizeof(struct mxser_mon)))
1925 return -EFAULT;
1926
1927 return 0;
1928 }
1929 case MOXA_ASPP_LSTATUS: {
1930 if (put_user(info->err_shadow, (unsigned char __user *)argp))
1931 return -EFAULT;
1932
1933 info->err_shadow = 0;
1934 return 0;
1935 }
1936 case MOXA_SET_BAUD_METHOD: {
1937 int method;
1938
1939 if (get_user(method, (int __user *)argp))
1940 return -EFAULT;
1941 mxser_set_baud_method[tty->index] = method;
1942 return put_user(method, (int __user *)argp);
1943 }
1944 default:
1945 return -ENOIOCTLCMD;
1946 }
1947 return 0;
1948}
1949
1950static void mxser_stoprx(struct tty_struct *tty)
1951{
1952 struct mxser_port *info = tty->driver_data;
1953
1954 info->ldisc_stop_rx = 1;
1955 if (I_IXOFF(tty)) {
1956 if (info->board->chip_flag) {
1957 info->IER &= ~MOXA_MUST_RECV_ISR;
1958 outb(info->IER, info->ioaddr + UART_IER);
1959 } else {
1960 info->x_char = STOP_CHAR(tty);
1961 outb(0, info->ioaddr + UART_IER);
1962 info->IER |= UART_IER_THRI;
1963 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 1964 }
1965 }
1966
216ba023 1967 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 1968 info->MCR &= ~UART_MCR_RTS;
1969 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 1970 }
1971}
1972
1973/*
1974 * This routine is called by the upper-layer tty layer to signal that
1975 * incoming characters should be throttled.
1976 */
1977static void mxser_throttle(struct tty_struct *tty)
1978{
1da177e4 1979 mxser_stoprx(tty);
1da177e4
LT		 1980}
1981
1982static void mxser_unthrottle(struct tty_struct *tty)
1983{
1c45607a 1984 struct mxser_port *info = tty->driver_data;
1da177e4 1985
1c45607a
JS		 1986 /* startrx */
1987 info->ldisc_stop_rx = 0;
1988 if (I_IXOFF(tty)) {
1989 if (info->x_char)
1990 info->x_char = 0;
1991 else {
1992 if (info->board->chip_flag) {
1993 info->IER |= MOXA_MUST_RECV_ISR;
1994 outb(info->IER, info->ioaddr + UART_IER);
1995 } else {
1996 info->x_char = START_CHAR(tty);
1997 outb(0, info->ioaddr + UART_IER);
1998 info->IER |= UART_IER_THRI;
1999 outb(info->IER, info->ioaddr + UART_IER);
2000 }
1da177e4 2001 }
1c45607a 2002 }
1da177e4 2003
216ba023 2004 if (tty->termios->c_cflag & CRTSCTS) {
1c45607a
JS		 2005 info->MCR |= UART_MCR_RTS;
2006 outb(info->MCR, info->ioaddr + UART_MCR);
1da177e4
LT		 2007 }
2008}
2009
2010/*
2011 * mxser_stop() and mxser_start()
2012 *
2013 * This routines are called before setting or resetting tty->stopped.
2014 * They enable or disable transmitter interrupts, as necessary.
2015 */
2016static void mxser_stop(struct tty_struct *tty)
2017{
1c45607a 2018 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2019 unsigned long flags;
2020
2021 spin_lock_irqsave(&info->slock, flags);
2022 if (info->IER & UART_IER_THRI) {
2023 info->IER &= ~UART_IER_THRI;
1c45607a 2024 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 2025 }
2026 spin_unlock_irqrestore(&info->slock, flags);
2027}
2028
2029static void mxser_start(struct tty_struct *tty)
2030{
1c45607a 2031 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2032 unsigned long flags;
2033
2034 spin_lock_irqsave(&info->slock, flags);
0ad9e7d1 2035 if (info->xmit_cnt && info->port.xmit_buf) {
1c45607a 2036 outb(info->IER & ~UART_IER_THRI, info->ioaddr + UART_IER);
1da177e4 2037 info->IER |= UART_IER_THRI;
1c45607a 2038 outb(info->IER, info->ioaddr + UART_IER);
1da177e4
LT		 2039 }
2040 spin_unlock_irqrestore(&info->slock, flags);
2041}
2042
1c45607a
JS		 2043static void mxser_set_termios(struct tty_struct *tty, struct ktermios *old_termios)
2044{
2045 struct mxser_port *info = tty->driver_data;
2046 unsigned long flags;
2047
2048 spin_lock_irqsave(&info->slock, flags);
216ba023 2049 mxser_change_speed(tty, old_termios);
1c45607a
JS		 2050 spin_unlock_irqrestore(&info->slock, flags);
2051
2052 if ((old_termios->c_cflag & CRTSCTS) &&
2053 !(tty->termios->c_cflag & CRTSCTS)) {
2054 tty->hw_stopped = 0;
2055 mxser_start(tty);
2056 }
2057
2058 /* Handle sw stopped */
2059 if ((old_termios->c_iflag & IXON) &&
2060 !(tty->termios->c_iflag & IXON)) {
2061 tty->stopped = 0;
2062
2063 if (info->board->chip_flag) {
2064 spin_lock_irqsave(&info->slock, flags);
148ff86b
CH		 2065 mxser_disable_must_rx_software_flow_control(
2066 info->ioaddr);
1c45607a
JS		 2067 spin_unlock_irqrestore(&info->slock, flags);
2068 }
2069
2070 mxser_start(tty);
2071 }
2072}
2073
1da177e4
LT		 2074/*
2075 * mxser_wait_until_sent() --- wait until the transmitter is empty
2076 */
2077static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
2078{
1c45607a 2079 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2080 unsigned long orig_jiffies, char_time;
2081 int lsr;
2082
2083 if (info->type == PORT_UNKNOWN)
2084 return;
2085
2086 if (info->xmit_fifo_size == 0)
2087 return; /* Just in case.... */
2088
2089 orig_jiffies = jiffies;
2090 /*
2091 * Set the check interval to be 1/5 of the estimated time to
2092 * send a single character, and make it at least 1. The check
2093 * interval should also be less than the timeout.
2094 *
2095 * Note: we have to use pretty tight timings here to satisfy
2096 * the NIST-PCTS.
2097 */
2098 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
2099 char_time = char_time / 5;
2100 if (char_time == 0)
2101 char_time = 1;
2102 if (timeout && timeout < char_time)
2103 char_time = timeout;
2104 /*
2105 * If the transmitter hasn't cleared in twice the approximate
2106 * amount of time to send the entire FIFO, it probably won't
2107 * ever clear. This assumes the UART isn't doing flow
2108 * control, which is currently the case. Hence, if it ever
2109 * takes longer than info->timeout, this is probably due to a
2110 * UART bug of some kind. So, we clamp the timeout parameter at
2111 * 2*info->timeout.
2112 */
2113 if (!timeout || timeout > 2 * info->timeout)
2114 timeout = 2 * info->timeout;
2115#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 2116 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
2117 timeout, char_time);
1da177e4
LT		 2118 printk("jiff=%lu...", jiffies);
2119#endif
978e595f 2120 lock_kernel();
1c45607a 2121 while (!((lsr = inb(info->ioaddr + UART_LSR)) & UART_LSR_TEMT)) {
1da177e4
LT		 2122#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2123 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
2124#endif
da4cd8df 2125 schedule_timeout_interruptible(char_time);
1da177e4 2126 if (signal_pending(current))
1c45607a
JS		 2127 break;
2128 if (timeout && time_after(jiffies, orig_jiffies + timeout))
2129 break;
1da177e4 2130 }
1c45607a 2131 set_current_state(TASK_RUNNING);
978e595f 2132 unlock_kernel();
1da177e4 2133
1c45607a
JS		 2134#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
2135 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
2136#endif
2137}
1da177e4 2138
1c45607a
JS		 2139/*
2140 * This routine is called by tty_hangup() when a hangup is signaled.
2141 */
2142static void mxser_hangup(struct tty_struct *tty)
2143{
2144 struct mxser_port *info = tty->driver_data;
1da177e4 2145
1c45607a 2146 mxser_flush_buffer(tty);
216ba023 2147 mxser_shutdown(tty);
0ad9e7d1
AC		 2148 info->port.count = 0;
2149 info->port.flags &= ~ASYNC_NORMAL_ACTIVE;
216ba023 2150 tty_port_tty_set(&info->port, NULL);
0ad9e7d1 2151 wake_up_interruptible(&info->port.open_wait);
1da177e4
LT		 2152}
2153
1c45607a
JS		 2154/*
2155 * mxser_rs_break() --- routine which turns the break handling on or off
2156 */
9e98966c 2157static int mxser_rs_break(struct tty_struct *tty, int break_state)
1da177e4 2158{
1c45607a 2159 struct mxser_port *info = tty->driver_data;
1da177e4
LT		 2160 unsigned long flags;
2161
1c45607a
JS		 2162 spin_lock_irqsave(&info->slock, flags);
2163 if (break_state == -1)
2164 outb(inb(info->ioaddr + UART_LCR) | UART_LCR_SBC,
2165 info->ioaddr + UART_LCR);
2166 else
2167 outb(inb(info->ioaddr + UART_LCR) & ~UART_LCR_SBC,
2168 info->ioaddr + UART_LCR);
2169 spin_unlock_irqrestore(&info->slock, flags);
9e98966c 2170 return 0;
1c45607a 2171}
1da177e4 2172
216ba023
AC		 2173static void mxser_receive_chars(struct tty_struct *tty,
2174 struct mxser_port *port, int *status)
1c45607a 2175{
1c45607a
JS		 2176 unsigned char ch, gdl;
2177 int ignored = 0;
2178 int cnt = 0;
2179 int recv_room;
2180 int max = 256;
1da177e4 2181
1c45607a 2182 recv_room = tty->receive_room;
216ba023 2183 if (recv_room == 0 && !port->ldisc_stop_rx)
1c45607a 2184 mxser_stoprx(tty);
1c45607a 2185 if (port->board->chip_flag != MOXA_OTHER_UART) {
1da177e4 2186
1c45607a
JS		 2187 if (*status & UART_LSR_SPECIAL)
2188 goto intr_old;
2189 if (port->board->chip_flag == MOXA_MUST_MU860_HWID &&
2190 (*status & MOXA_MUST_LSR_RERR))
2191 goto intr_old;
2192 if (*status & MOXA_MUST_LSR_RERR)
2193 goto intr_old;
1da177e4 2194
1c45607a
JS		 2195 gdl = inb(port->ioaddr + MOXA_MUST_GDL_REGISTER);
2196
2197 if (port->board->chip_flag == MOXA_MUST_MU150_HWID)
2198 gdl &= MOXA_MUST_GDL_MASK;
2199 if (gdl >= recv_room) {
2200 if (!port->ldisc_stop_rx)
2201 mxser_stoprx(tty);
2202 }
2203 while (gdl--) {
2204 ch = inb(port->ioaddr + UART_RX);
2205 tty_insert_flip_char(tty, ch, 0);
2206 cnt++;
2207 }
2208 goto end_intr;
1da177e4 2209 }
1c45607a
JS		 2210intr_old:
2211
2212 do {
2213 if (max-- < 0)
2214 break;
1da177e4 2215
1c45607a
JS		 2216 ch = inb(port->ioaddr + UART_RX);
2217 if (port->board->chip_flag && (*status & UART_LSR_OE))
2218 outb(0x23, port->ioaddr + UART_FCR);
2219 *status &= port->read_status_mask;
2220 if (*status & port->ignore_status_mask) {
2221 if (++ignored > 100)
2222 break;
2223 } else {
2224 char flag = 0;
2225 if (*status & UART_LSR_SPECIAL) {
2226 if (*status & UART_LSR_BI) {
2227 flag = TTY_BREAK;
2228 port->icount.brk++;
1da177e4 2229
0ad9e7d1 2230 if (port->port.flags & ASYNC_SAK)
1c45607a
JS		 2231 do_SAK(tty);
2232 } else if (*status & UART_LSR_PE) {
2233 flag = TTY_PARITY;
2234 port->icount.parity++;
2235 } else if (*status & UART_LSR_FE) {
2236 flag = TTY_FRAME;
2237 port->icount.frame++;
2238 } else if (*status & UART_LSR_OE) {
2239 flag = TTY_OVERRUN;
2240 port->icount.overrun++;
2241 } else
2242 flag = TTY_BREAK;
2243 }
2244 tty_insert_flip_char(tty, ch, flag);
2245 cnt++;
2246 if (cnt >= recv_room) {
2247 if (!port->ldisc_stop_rx)
2248 mxser_stoprx(tty);
2249 break;
2250 }
1da177e4 2251
1c45607a 2252 }
1da177e4 2253
1c45607a
JS		 2254 if (port->board->chip_flag)
2255 break;
1da177e4 2256
1c45607a
JS		 2257 *status = inb(port->ioaddr + UART_LSR);
2258 } while (*status & UART_LSR_DR);
1da177e4 2259
1c45607a 2260end_intr:
216ba023 2261 mxvar_log.rxcnt[tty->index] += cnt;
1c45607a
JS		 2262 port->mon_data.rxcnt += cnt;
2263 port->mon_data.up_rxcnt += cnt;
1da177e4 2264
1c45607a
JS		 2265 /*
2266 * We are called from an interrupt context with &port->slock
2267 * being held. Drop it temporarily in order to prevent
2268 * recursive locking.
2269 */
2270 spin_unlock(&port->slock);
2271 tty_flip_buffer_push(tty);
2272 spin_lock(&port->slock);
1da177e4
LT		 2273}
2274
216ba023 2275static void mxser_transmit_chars(struct tty_struct *tty, struct mxser_port *port)
1da177e4 2276{
1c45607a 2277 int count, cnt;
1da177e4 2278
1c45607a
JS		 2279 if (port->x_char) {
2280 outb(port->x_char, port->ioaddr + UART_TX);
2281 port->x_char = 0;
216ba023 2282 mxvar_log.txcnt[tty->index]++;
1c45607a
JS		 2283 port->mon_data.txcnt++;
2284 port->mon_data.up_txcnt++;
2285 port->icount.tx++;
2286 return;
2287 }
1da177e4 2288
0ad9e7d1 2289 if (port->port.xmit_buf == NULL)
1c45607a 2290 return;
1da177e4 2291
216ba023
AC		 2292 if (port->xmit_cnt <= 0 || tty->stopped ||
2293 (tty->hw_stopped &&
1c45607a
JS		 2294 (port->type != PORT_16550A) &&
2295 (!port->board->chip_flag))) {
2296 port->IER &= ~UART_IER_THRI;
2297 outb(port->IER, port->ioaddr + UART_IER);
2298 return;
1da177e4
LT		 2299 }
2300
1c45607a
JS		 2301 cnt = port->xmit_cnt;
2302 count = port->xmit_fifo_size;
2303 do {
0ad9e7d1 2304 outb(port->port.xmit_buf[port->xmit_tail++],
1c45607a
JS		 2305 port->ioaddr + UART_TX);
2306 port->xmit_tail = port->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2307 if (--port->xmit_cnt <= 0)
2308 break;
2309 } while (--count > 0);
216ba023 2310 mxvar_log.txcnt[tty->index] += (cnt - port->xmit_cnt);
1da177e4 2311
1c45607a
JS		 2312 port->mon_data.txcnt += (cnt - port->xmit_cnt);
2313 port->mon_data.up_txcnt += (cnt - port->xmit_cnt);
2314 port->icount.tx += (cnt - port->xmit_cnt);
1da177e4 2315
216ba023
AC		 2316 if (port->xmit_cnt < WAKEUP_CHARS && tty)
2317 tty_wakeup(tty);
1c45607a
JS		 2318
2319 if (port->xmit_cnt <= 0) {
2320 port->IER &= ~UART_IER_THRI;
2321 outb(port->IER, port->ioaddr + UART_IER);
1da177e4 2322 }
1da177e4
LT		 2323}
2324
2325/*
1c45607a 2326 * This is the serial driver's generic interrupt routine
1da177e4 2327 */
1c45607a 2328static irqreturn_t mxser_interrupt(int irq, void *dev_id)
1da177e4 2329{
1c45607a
JS		 2330 int status, iir, i;
2331 struct mxser_board *brd = NULL;
2332 struct mxser_port *port;
2333 int max, irqbits, bits, msr;
2334 unsigned int int_cnt, pass_counter = 0;
2335 int handled = IRQ_NONE;
216ba023 2336 struct tty_struct *tty;
1da177e4 2337
1c45607a
JS		 2338 for (i = 0; i < MXSER_BOARDS; i++)
2339 if (dev_id == &mxser_boards[i]) {
2340 brd = dev_id;
2341 break;
2342 }
1da177e4 2343
1c45607a
JS		 2344 if (i == MXSER_BOARDS)
2345 goto irq_stop;
2346 if (brd == NULL)
2347 goto irq_stop;
2348 max = brd->info->nports;
2349 while (pass_counter++ < MXSER_ISR_PASS_LIMIT) {
2350 irqbits = inb(brd->vector) & brd->vector_mask;
2351 if (irqbits == brd->vector_mask)
2352 break;
1da177e4 2353
1c45607a
JS		 2354 handled = IRQ_HANDLED;
2355 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
2356 if (irqbits == brd->vector_mask)
2357 break;
2358 if (bits & irqbits)
2359 continue;
2360 port = &brd->ports[i];
2361
2362 int_cnt = 0;
2363 spin_lock(&port->slock);
2364 do {
2365 iir = inb(port->ioaddr + UART_IIR);
2366 if (iir & UART_IIR_NO_INT)
2367 break;
2368 iir &= MOXA_MUST_IIR_MASK;
216ba023
AC		 2369 tty = tty_port_tty_get(&port->port);
2370 if (!tty ||
0ad9e7d1
AC		 2371 (port->port.flags & ASYNC_CLOSING) ||
2372 !(port->port.flags &
1c45607a
JS		 2373 ASYNC_INITIALIZED)) {
2374 status = inb(port->ioaddr + UART_LSR);
2375 outb(0x27, port->ioaddr + UART_FCR);
2376 inb(port->ioaddr + UART_MSR);
216ba023 2377 tty_kref_put(tty);
1c45607a
JS		 2378 break;
2379 }
1da177e4 2380
1c45607a
JS		 2381 status = inb(port->ioaddr + UART_LSR);
2382
2383 if (status & UART_LSR_PE)
2384 port->err_shadow |= NPPI_NOTIFY_PARITY;
2385 if (status & UART_LSR_FE)
2386 port->err_shadow |= NPPI_NOTIFY_FRAMING;
2387 if (status & UART_LSR_OE)
2388 port->err_shadow |=
2389 NPPI_NOTIFY_HW_OVERRUN;
2390 if (status & UART_LSR_BI)
2391 port->err_shadow |= NPPI_NOTIFY_BREAK;
2392
2393 if (port->board->chip_flag) {
2394 if (iir == MOXA_MUST_IIR_GDA ||
2395 iir == MOXA_MUST_IIR_RDA ||
2396 iir == MOXA_MUST_IIR_RTO ||
2397 iir == MOXA_MUST_IIR_LSR)
216ba023 2398 mxser_receive_chars(tty, port,
1c45607a
JS		 2399 &status);
2400
2401 } else {
2402 status &= port->read_status_mask;
2403 if (status & UART_LSR_DR)
216ba023 2404 mxser_receive_chars(tty, port,
1c45607a
JS		 2405 &status);
2406 }
2407 msr = inb(port->ioaddr + UART_MSR);
2408 if (msr & UART_MSR_ANY_DELTA)
216ba023 2409 mxser_check_modem_status(tty, port, msr);
1c45607a
JS		 2410
2411 if (port->board->chip_flag) {
2412 if (iir == 0x02 && (status &
2413 UART_LSR_THRE))
216ba023 2414 mxser_transmit_chars(tty, port);
1c45607a
JS		 2415 } else {
2416 if (status & UART_LSR_THRE)
216ba023 2417 mxser_transmit_chars(tty, port);
1c45607a 2418 }
216ba023 2419 tty_kref_put(tty);
1c45607a
JS		 2420 } while (int_cnt++ < MXSER_ISR_PASS_LIMIT);
2421 spin_unlock(&port->slock);
2422 }
2423 }
1da177e4 2424
1c45607a
JS		 2425irq_stop:
2426 return handled;
2427}
1da177e4 2428
1c45607a
JS		 2429static const struct tty_operations mxser_ops = {
2430 .open = mxser_open,
2431 .close = mxser_close,
2432 .write = mxser_write,
2433 .put_char = mxser_put_char,
2434 .flush_chars = mxser_flush_chars,
2435 .write_room = mxser_write_room,
2436 .chars_in_buffer = mxser_chars_in_buffer,
2437 .flush_buffer = mxser_flush_buffer,
2438 .ioctl = mxser_ioctl,
2439 .throttle = mxser_throttle,
2440 .unthrottle = mxser_unthrottle,
2441 .set_termios = mxser_set_termios,
2442 .stop = mxser_stop,
2443 .start = mxser_start,
2444 .hangup = mxser_hangup,
2445 .break_ctl = mxser_rs_break,
2446 .wait_until_sent = mxser_wait_until_sent,
2447 .tiocmget = mxser_tiocmget,
2448 .tiocmset = mxser_tiocmset,
2449};
1da177e4 2450
1c45607a
JS		 2451/*
2452 * The MOXA Smartio/Industio serial driver boot-time initialization code!
2453 */
1da177e4 2454
1c45607a
JS		 2455static void mxser_release_res(struct mxser_board *brd, struct pci_dev *pdev,
2456 unsigned int irq)
2457{
2458 if (irq)
2459 free_irq(brd->irq, brd);
2460 if (pdev != NULL) { /* PCI */
2461#ifdef CONFIG_PCI
2462 pci_release_region(pdev, 2);
2463 pci_release_region(pdev, 3);
2464#endif
2465 } else {
2466 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
2467 release_region(brd->vector, 1);
2468 }
1da177e4
LT		 2469}
2470
1c45607a
JS		 2471static int __devinit mxser_initbrd(struct mxser_board *brd,
2472 struct pci_dev *pdev)
1da177e4 2473{
1c45607a
JS		 2474 struct mxser_port *info;
2475 unsigned int i;
2476 int retval;
1da177e4 2477
83766bc6
JS		 2478 printk(KERN_INFO "mxser: max. baud rate = %d bps\n",
2479 brd->ports[0].max_baud);
1da177e4 2480
1c45607a
JS		 2481 for (i = 0; i < brd->info->nports; i++) {
2482 info = &brd->ports[i];
44b7d1b3 2483 tty_port_init(&info->port);
1c45607a
JS		 2484 info->board = brd;
2485 info->stop_rx = 0;
2486 info->ldisc_stop_rx = 0;
1da177e4 2487
1c45607a
JS		 2488 /* Enhance mode enabled here */
2489 if (brd->chip_flag != MOXA_OTHER_UART)
148ff86b 2490 mxser_enable_must_enchance_mode(info->ioaddr);
1da177e4 2491
0ad9e7d1 2492 info->port.flags = ASYNC_SHARE_IRQ;
1c45607a 2493 info->type = brd->uart_type;
1da177e4 2494
1c45607a 2495 process_txrx_fifo(info);
1da177e4 2496
1c45607a 2497 info->custom_divisor = info->baud_base * 16;
44b7d1b3
AC		 2498 info->port.close_delay = 5 * HZ / 10;
2499 info->port.closing_wait = 30 * HZ;
1c45607a 2500 info->normal_termios = mxvar_sdriver->init_termios;
1c45607a
JS		 2501 init_waitqueue_head(&info->delta_msr_wait);
2502 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
2503 info->err_shadow = 0;
2504 spin_lock_init(&info->slock);
1da177e4 2505
1c45607a
JS		 2506 /* before set INT ISR, disable all int */
2507 outb(inb(info->ioaddr + UART_IER) & 0xf0,
2508 info->ioaddr + UART_IER);
2509 }
1da177e4 2510
1c45607a
JS		 2511 retval = request_irq(brd->irq, mxser_interrupt, IRQF_SHARED, "mxser",
2512 brd);
2513 if (retval) {
2514 printk(KERN_ERR "Board %s: Request irq failed, IRQ (%d) may "
2515 "conflict with another device.\n",
2516 brd->info->name, brd->irq);
2517 /* We hold resources, we need to release them. */
2518 mxser_release_res(brd, pdev, 0);
2519 }
2520 return retval;
2521}
1da177e4 2522
1c45607a 2523static int __init mxser_get_ISA_conf(int cap, struct mxser_board *brd)
1da177e4
LT		 2524{
2525 int id, i, bits;
2526 unsigned short regs[16], irq;
2527 unsigned char scratch, scratch2;
2528
1c45607a 2529 brd->chip_flag = MOXA_OTHER_UART;
1da177e4
LT		 2530
2531 id = mxser_read_register(cap, regs);
1c45607a
JS		 2532 switch (id) {
2533 case C168_ASIC_ID:
2534 brd->info = &mxser_cards[0];
2535 break;
2536 case C104_ASIC_ID:
2537 brd->info = &mxser_cards[1];
2538 break;
2539 case CI104J_ASIC_ID:
2540 brd->info = &mxser_cards[2];
2541 break;
2542 case C102_ASIC_ID:
2543 brd->info = &mxser_cards[5];
2544 break;
2545 case CI132_ASIC_ID:
2546 brd->info = &mxser_cards[6];
2547 break;
2548 case CI134_ASIC_ID:
2549 brd->info = &mxser_cards[7];
2550 break;
2551 default:
8ea2c2ec 2552 return 0;
1c45607a 2553 }
1da177e4
LT		 2554
2555 irq = 0;
1c45607a
JS		 2556 /* some ISA cards have 2 ports, but we want to see them as 4-port (why?)
2557 Flag-hack checks if configuration should be read as 2-port here. */
2558 if (brd->info->nports == 2 || (brd->info->flags & MXSER_HAS2)) {
1da177e4
LT		 2559 irq = regs[9] & 0xF000;
2560 irq = irq | (irq >> 4);
2561 if (irq != (regs[9] & 0xFF00))
83766bc6 2562 goto err_irqconflict;
1c45607a 2563 } else if (brd->info->nports == 4) {
1da177e4
LT		 2564 irq = regs[9] & 0xF000;
2565 irq = irq | (irq >> 4);
2566 irq = irq | (irq >> 8);
2567 if (irq != regs[9])
83766bc6 2568 goto err_irqconflict;
1c45607a 2569 } else if (brd->info->nports == 8) {
1da177e4
LT		 2570 irq = regs[9] & 0xF000;
2571 irq = irq | (irq >> 4);
2572 irq = irq | (irq >> 8);
2573 if ((irq != regs[9]) || (irq != regs[10]))
83766bc6 2574 goto err_irqconflict;
1da177e4
LT		 2575 }
2576
83766bc6
JS		 2577 if (!irq) {
2578 printk(KERN_ERR "mxser: interrupt number unset\n");
2579 return -EIO;
2580 }
1c45607a 2581 brd->irq = ((int)(irq & 0xF000) >> 12);
1da177e4 2582 for (i = 0; i < 8; i++)
1c45607a 2583 brd->ports[i].ioaddr = (int) regs[i + 1] & 0xFFF8;
83766bc6
JS		 2584 if ((regs[12] & 0x80) == 0) {
2585 printk(KERN_ERR "mxser: invalid interrupt vector\n");
2586 return -EIO;
2587 }
1c45607a 2588 brd->vector = (int)regs[11]; /* interrupt vector */
1da177e4 2589 if (id == 1)
1c45607a 2590 brd->vector_mask = 0x00FF;
1da177e4 2591 else
1c45607a 2592 brd->vector_mask = 0x000F;
1da177e4
LT		 2593 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
2594 if (regs[12] & bits) {
1c45607a
JS		 2595 brd->ports[i].baud_base = 921600;
2596 brd->ports[i].max_baud = 921600;
1da177e4 2597 } else {
1c45607a
JS		 2598 brd->ports[i].baud_base = 115200;
2599 brd->ports[i].max_baud = 115200;
1da177e4
LT		 2600 }
2601 }
2602 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
2603 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
2604 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
2605 outb(scratch2, cap + UART_LCR);
2606 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
2607 scratch = inb(cap + UART_IIR);
2608
2609 if (scratch & 0xC0)
1c45607a 2610 brd->uart_type = PORT_16550A;
1da177e4 2611 else
1c45607a
JS		 2612 brd->uart_type = PORT_16450;
2613 if (!request_region(brd->ports[0].ioaddr, 8 * brd->info->nports,
83766bc6
JS		 2614 "mxser(IO)")) {
2615 printk(KERN_ERR "mxser: can't request ports I/O region: "
2616 "0x%.8lx-0x%.8lx\n",
2617 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2618 8 * brd->info->nports - 1);
2619 return -EIO;
2620 }
1c45607a
JS		 2621 if (!request_region(brd->vector, 1, "mxser(vector)")) {
2622 release_region(brd->ports[0].ioaddr, 8 * brd->info->nports);
83766bc6
JS		 2623 printk(KERN_ERR "mxser: can't request interrupt vector region: "
2624 "0x%.8lx-0x%.8lx\n",
2625 brd->ports[0].ioaddr, brd->ports[0].ioaddr +
2626 8 * brd->info->nports - 1);
2627 return -EIO;
1c45607a
JS		 2628 }
2629 return brd->info->nports;
83766bc6
JS		 2630
2631err_irqconflict:
2632 printk(KERN_ERR "mxser: invalid interrupt number\n");
2633 return -EIO;
1da177e4
LT		 2634}
2635
1c45607a
JS		 2636static int __devinit mxser_probe(struct pci_dev *pdev,
2637 const struct pci_device_id *ent)
1da177e4 2638{
1c45607a
JS		 2639#ifdef CONFIG_PCI
2640 struct mxser_board *brd;
2641 unsigned int i, j;
2642 unsigned long ioaddress;
2643 int retval = -EINVAL;
1da177e4 2644
1c45607a
JS		 2645 for (i = 0; i < MXSER_BOARDS; i++)
2646 if (mxser_boards[i].info == NULL)
2647 break;
2648
2649 if (i >= MXSER_BOARDS) {
83766bc6
JS		 2650 dev_err(&pdev->dev, "too many boards found (maximum %d), board "
2651 "not configured\n", MXSER_BOARDS);
1c45607a
JS		 2652 goto err;
2653 }
2654
2655 brd = &mxser_boards[i];
2656 brd->idx = i * MXSER_PORTS_PER_BOARD;
83766bc6 2657 dev_info(&pdev->dev, "found MOXA %s board (BusNo=%d, DevNo=%d)\n",
1c45607a
JS		 2658 mxser_cards[ent->driver_data].name,
2659 pdev->bus->number, PCI_SLOT(pdev->devfn));
2660
2661 retval = pci_enable_device(pdev);
2662 if (retval) {
83766bc6 2663 dev_err(&pdev->dev, "PCI enable failed\n");
1c45607a
JS		 2664 goto err;
2665 }
2666
2667 /* io address */
2668 ioaddress = pci_resource_start(pdev, 2);
2669 retval = pci_request_region(pdev, 2, "mxser(IO)");
2670 if (retval)
2671 goto err;
2672
2673 brd->info = &mxser_cards[ent->driver_data];
2674 for (i = 0; i < brd->info->nports; i++)
2675 brd->ports[i].ioaddr = ioaddress + 8 * i;
2676
2677 /* vector */
2678 ioaddress = pci_resource_start(pdev, 3);
2679 retval = pci_request_region(pdev, 3, "mxser(vector)");
2680 if (retval)
2681 goto err_relio;
2682 brd->vector = ioaddress;
2683
2684 /* irq */
2685 brd->irq = pdev->irq;
2686
2687 brd->chip_flag = CheckIsMoxaMust(brd->ports[0].ioaddr);
2688 brd->uart_type = PORT_16550A;
2689 brd->vector_mask = 0;
2690
2691 for (i = 0; i < brd->info->nports; i++) {
2692 for (j = 0; j < UART_INFO_NUM; j++) {
2693 if (Gpci_uart_info[j].type == brd->chip_flag) {
2694 brd->ports[i].max_baud =
2695 Gpci_uart_info[j].max_baud;
2696
2697 /* exception....CP-102 */
2698 if (brd->info->flags & MXSER_HIGHBAUD)
2699 brd->ports[i].max_baud = 921600;
2700 break;
1da177e4
LT		 2701 }
2702 }
1c45607a
JS		 2703 }
2704
2705 if (brd->chip_flag == MOXA_MUST_MU860_HWID) {
2706 for (i = 0; i < brd->info->nports; i++) {
2707 if (i < 4)
2708 brd->ports[i].opmode_ioaddr = ioaddress + 4;
2709 else
2710 brd->ports[i].opmode_ioaddr = ioaddress + 0x0c;
1da177e4 2711 }
1c45607a
JS		 2712 outb(0, ioaddress + 4); /* default set to RS232 mode */
2713 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4 2714 }
1c45607a
JS		 2715
2716 for (i = 0; i < brd->info->nports; i++) {
2717 brd->vector_mask |= (1 << i);
2718 brd->ports[i].baud_base = 921600;
2719 }
2720
2721 /* mxser_initbrd will hook ISR. */
2722 retval = mxser_initbrd(brd, pdev);
2723 if (retval)
2724 goto err_null;
2725
2726 for (i = 0; i < brd->info->nports; i++)
2727 tty_register_device(mxvar_sdriver, brd->idx + i, &pdev->dev);
2728
2729 pci_set_drvdata(pdev, brd);
2730
2731 return 0;
2732err_relio:
2733 pci_release_region(pdev, 2);
2734err_null:
2735 brd->info = NULL;
2736err:
2737 return retval;
2738#else
2739 return -ENODEV;
2740#endif
1da177e4
LT		 2741}
2742
1c45607a 2743static void __devexit mxser_remove(struct pci_dev *pdev)
1da177e4 2744{
1c45607a
JS		 2745 struct mxser_board *brd = pci_get_drvdata(pdev);
2746 unsigned int i;
1da177e4 2747
1c45607a
JS		 2748 for (i = 0; i < brd->info->nports; i++)
2749 tty_unregister_device(mxvar_sdriver, brd->idx + i);
1da177e4 2750
1c45607a
JS		 2751 mxser_release_res(brd, pdev, 1);
2752 brd->info = NULL;
1da177e4
LT		 2753}
2754
1c45607a
JS		 2755static struct pci_driver mxser_driver = {
2756 .name = "mxser",
2757 .id_table = mxser_pcibrds,
2758 .probe = mxser_probe,
2759 .remove = __devexit_p(mxser_remove)
2760};
2761
2762static int __init mxser_module_init(void)
1da177e4 2763{
1c45607a 2764 struct mxser_board *brd;
1df00924
JS		 2765 unsigned int b, i, m;
2766 int retval;
1da177e4 2767
1c45607a
JS		 2768 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
2769 if (!mxvar_sdriver)
2770 return -ENOMEM;
2771
2772 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
2773 MXSER_VERSION);
2774
2775 /* Initialize the tty_driver structure */
2776 mxvar_sdriver->owner = THIS_MODULE;
2777 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
2778 mxvar_sdriver->name = "ttyMI";
2779 mxvar_sdriver->major = ttymajor;
2780 mxvar_sdriver->minor_start = 0;
2781 mxvar_sdriver->num = MXSER_PORTS + 1;
2782 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
2783 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
2784 mxvar_sdriver->init_termios = tty_std_termios;
2785 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
2786 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW|TTY_DRIVER_DYNAMIC_DEV;
2787 tty_set_operations(mxvar_sdriver, &mxser_ops);
2788
2789 retval = tty_register_driver(mxvar_sdriver);
2790 if (retval) {
2791 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family "
2792 "tty driver !\n");
2793 goto err_put;
1da177e4 2794 }
1c45607a 2795
1c45607a 2796 /* Start finding ISA boards here */
1df00924
JS		 2797 for (m = 0, b = 0; b < MXSER_BOARDS; b++) {
2798 if (!ioaddr[b])
2799 continue;
2800
2801 brd = &mxser_boards[m];
2802 retval = mxser_get_ISA_conf(!ioaddr[b], brd);
2803 if (retval <= 0) {
2804 brd->info = NULL;
2805 continue;
2806 }
1c45607a 2807
1df00924
JS		 2808 printk(KERN_INFO "mxser: found MOXA %s board (CAP=0x%lx)\n",
2809 brd->info->name, ioaddr[b]);
83766bc6 2810
1df00924
JS		 2811 /* mxser_initbrd will hook ISR. */
2812 if (mxser_initbrd(brd, NULL) < 0) {
2813 brd->info = NULL;
2814 continue;
2815 }
1c45607a 2816
1df00924
JS		 2817 brd->idx = m * MXSER_PORTS_PER_BOARD;
2818 for (i = 0; i < brd->info->nports; i++)
2819 tty_register_device(mxvar_sdriver, brd->idx + i, NULL);
1c45607a 2820
1df00924
JS		 2821 m++;
2822 }
1c45607a
JS		 2823
2824 retval = pci_register_driver(&mxser_driver);
2825 if (retval) {
83766bc6 2826 printk(KERN_ERR "mxser: can't register pci driver\n");
1c45607a
JS		 2827 if (!m) {
2828 retval = -ENODEV;
2829 goto err_unr;
2830 } /* else: we have some ISA cards under control */
2831 }
2832
1c45607a
JS		 2833 return 0;
2834err_unr:
2835 tty_unregister_driver(mxvar_sdriver);
2836err_put:
2837 put_tty_driver(mxvar_sdriver);
2838 return retval;
2839}
2840
2841static void __exit mxser_module_exit(void)
2842{
2843 unsigned int i, j;
2844
1c45607a
JS		 2845 pci_unregister_driver(&mxser_driver);
2846
2847 for (i = 0; i < MXSER_BOARDS; i++) /* ISA remains */
2848 if (mxser_boards[i].info != NULL)
2849 for (j = 0; j < mxser_boards[i].info->nports; j++)
2850 tty_unregister_device(mxvar_sdriver,
2851 mxser_boards[i].idx + j);
2852 tty_unregister_driver(mxvar_sdriver);
2853 put_tty_driver(mxvar_sdriver);
2854
2855 for (i = 0; i < MXSER_BOARDS; i++)
2856 if (mxser_boards[i].info != NULL)
2857 mxser_release_res(&mxser_boards[i], NULL, 1);
1da177e4
LT		 2858}
2859
2860module_init(mxser_module_init);
2861module_exit(mxser_module_exit);
Linux 6.x block layer and io_uring tree(s)