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[PATCH] at1700 section fix
[linux-2.6-block.git] / drivers / char / mxser.c
CommitLineData
1da177e4
LT		 1/*
2 * mxser.c -- MOXA Smartio/Industio family multiport serial driver.
3 *
4 * Copyright (C) 1999-2001 Moxa Technologies (support@moxa.com.tw).
5 *
6 * This code is loosely based on the Linux serial driver, written by
7 * Linus Torvalds, Theodore T'so and others.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
8ea2c2ec 12 * (at your option) any later version.
1da177e4
LT		 13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 * Original release 10/26/00
24 *
25 * 02/06/01 Support MOXA Industio family boards.
26 * 02/06/01 Support TIOCGICOUNT.
27 * 02/06/01 Fix the problem for connecting to serial mouse.
28 * 02/06/01 Fix the problem for H/W flow control.
29 * 02/06/01 Fix the compling warning when CONFIG_PCI
30 * don't be defined.
31 *
32 * Fed through a cleanup, indent and remove of non 2.6 code by Alan Cox
33 * <alan@redhat.com>. The original 1.8 code is available on www.moxa.com.
34 * - Fixed x86_64 cleanness
35 * - Fixed sleep with spinlock held in mxser_send_break
36 */
37
38
1da177e4 39#include <linux/module.h>
1da177e4
LT		 40#include <linux/autoconf.h>
41#include <linux/errno.h>
42#include <linux/signal.h>
43#include <linux/sched.h>
44#include <linux/timer.h>
45#include <linux/interrupt.h>
46#include <linux/tty.h>
47#include <linux/tty_flip.h>
48#include <linux/serial.h>
49#include <linux/serial_reg.h>
50#include <linux/major.h>
51#include <linux/string.h>
52#include <linux/fcntl.h>
53#include <linux/ptrace.h>
54#include <linux/gfp.h>
55#include <linux/ioport.h>
56#include <linux/mm.h>
57#include <linux/smp_lock.h>
58#include <linux/delay.h>
59#include <linux/pci.h>
60
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/irq.h>
1da177e4
LT		 64#include <asm/bitops.h>
65#include <asm/uaccess.h>
66
67#include "mxser.h"
68
69#define MXSER_VERSION "1.8"
70#define MXSERMAJOR 174
71#define MXSERCUMAJOR 175
72
8ea2c2ec
JJ		 73#define MXSER_EVENT_TXLOW 1
74#define MXSER_EVENT_HANGUP 2
1da177e4
LT		 75
76#define MXSER_BOARDS 4 /* Max. boards */
77#define MXSER_PORTS 32 /* Max. ports */
78#define MXSER_PORTS_PER_BOARD 8 /* Max. ports per board */
79#define MXSER_ISR_PASS_LIMIT 256
80
81#define MXSER_ERR_IOADDR -1
82#define MXSER_ERR_IRQ -2
83#define MXSER_ERR_IRQ_CONFLIT -3
84#define MXSER_ERR_VECTOR -4
85
86#define SERIAL_TYPE_NORMAL 1
87#define SERIAL_TYPE_CALLOUT 2
88
89#define WAKEUP_CHARS 256
90
91#define UART_MCR_AFE 0x20
92#define UART_LSR_SPECIAL 0x1E
93
8ea2c2ec
JJ		 94#define RELEVANT_IFLAG(iflag) (iflag & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK|\
95 IXON|IXOFF))
1da177e4 96
0f2ed4c6 97#define IRQ_T(info) ((info->flags & ASYNC_SHARE_IRQ) ? IRQF_SHARED : IRQF_DISABLED)
1da177e4
LT		 98
99#define C168_ASIC_ID 1
100#define C104_ASIC_ID 2
101#define C102_ASIC_ID 0xB
102#define CI132_ASIC_ID 4
103#define CI134_ASIC_ID 3
104#define CI104J_ASIC_ID 5
105
106enum {
107 MXSER_BOARD_C168_ISA = 1,
108 MXSER_BOARD_C104_ISA,
109 MXSER_BOARD_CI104J,
110 MXSER_BOARD_C168_PCI,
111 MXSER_BOARD_C104_PCI,
112 MXSER_BOARD_C102_ISA,
113 MXSER_BOARD_CI132,
114 MXSER_BOARD_CI134,
115 MXSER_BOARD_CP132,
116 MXSER_BOARD_CP114,
117 MXSER_BOARD_CT114,
118 MXSER_BOARD_CP102,
119 MXSER_BOARD_CP104U,
120 MXSER_BOARD_CP168U,
121 MXSER_BOARD_CP132U,
122 MXSER_BOARD_CP134U,
123 MXSER_BOARD_CP104JU,
124 MXSER_BOARD_RC7000,
125 MXSER_BOARD_CP118U,
126 MXSER_BOARD_CP102UL,
127 MXSER_BOARD_CP102U,
128};
129
130static char *mxser_brdname[] = {
131 "C168 series",
132 "C104 series",
133 "CI-104J series",
134 "C168H/PCI series",
135 "C104H/PCI series",
136 "C102 series",
137 "CI-132 series",
138 "CI-134 series",
139 "CP-132 series",
140 "CP-114 series",
141 "CT-114 series",
142 "CP-102 series",
143 "CP-104U series",
144 "CP-168U series",
145 "CP-132U series",
146 "CP-134U series",
147 "CP-104JU series",
148 "Moxa UC7000 Serial",
149 "CP-118U series",
150 "CP-102UL series",
151 "CP-102U series",
152};
153
154static int mxser_numports[] = {
8ea2c2ec
JJ		 155 8, /* C168-ISA */
156 4, /* C104-ISA */
157 4, /* CI104J */
158 8, /* C168-PCI */
159 4, /* C104-PCI */
160 2, /* C102-ISA */
161 2, /* CI132 */
162 4, /* CI134 */
163 2, /* CP132 */
164 4, /* CP114 */
165 4, /* CT114 */
166 2, /* CP102 */
167 4, /* CP104U */
168 8, /* CP168U */
169 2, /* CP132U */
170 4, /* CP134U */
171 4, /* CP104JU */
172 8, /* RC7000 */
173 8, /* CP118U */
174 2, /* CP102UL */
175 2, /* CP102U */
1da177e4
LT		 176};
177
178#define UART_TYPE_NUM 2
179
180static const unsigned int Gmoxa_uart_id[UART_TYPE_NUM] = {
181 MOXA_MUST_MU150_HWID,
182 MOXA_MUST_MU860_HWID
183};
184
8ea2c2ec 185/* This is only for PCI */
1da177e4
LT		 186#define UART_INFO_NUM 3
187struct mxpciuart_info {
188 int type;
189 int tx_fifo;
190 int rx_fifo;
191 int xmit_fifo_size;
192 int rx_high_water;
193 int rx_trigger;
194 int rx_low_water;
195 long max_baud;
196};
197
198static const struct mxpciuart_info Gpci_uart_info[UART_INFO_NUM] = {
199 {MOXA_OTHER_UART, 16, 16, 16, 14, 14, 1, 921600L},
200 {MOXA_MUST_MU150_HWID, 64, 64, 64, 48, 48, 16, 230400L},
201 {MOXA_MUST_MU860_HWID, 128, 128, 128, 96, 96, 32, 921600L}
202};
203
204
205#ifdef CONFIG_PCI
206
207static struct pci_device_id mxser_pcibrds[] = {
208 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C168, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C168_PCI},
209 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C104, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_C104_PCI},
210 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132},
211 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP114},
212 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CT114, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CT114},
213 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102},
214 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104U},
215 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP168U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP168U},
216 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP132U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP132U},
217 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP134U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP134U},
218 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP104JU, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP104JU},
219 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_RC7000, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_RC7000},
220 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP118U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP118U},
221 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102UL, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102UL},
222 {PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP102U, PCI_ANY_ID, PCI_ANY_ID, 0, 0, MXSER_BOARD_CP102U},
223 {0}
224};
225
226MODULE_DEVICE_TABLE(pci, mxser_pcibrds);
227
228
229#endif
230
231typedef struct _moxa_pci_info {
232 unsigned short busNum;
233 unsigned short devNum;
8ea2c2ec 234 struct pci_dev *pdev; /* add by Victor Yu. 06-23-2003 */
1da177e4
LT		 235} moxa_pci_info;
236
237static int ioaddr[MXSER_BOARDS] = { 0, 0, 0, 0 };
238static int ttymajor = MXSERMAJOR;
239static int calloutmajor = MXSERCUMAJOR;
240static int verbose = 0;
241
242/* Variables for insmod */
243
244MODULE_AUTHOR("Casper Yang");
245MODULE_DESCRIPTION("MOXA Smartio/Industio Family Multiport Board Device Driver");
8d3b33f6
RR		 246module_param_array(ioaddr, int, NULL, 0);
247module_param(ttymajor, int, 0);
248module_param(calloutmajor, int, 0);
249module_param(verbose, bool, 0);
1da177e4
LT		 250MODULE_LICENSE("GPL");
251
252struct mxser_log {
253 int tick;
254 unsigned long rxcnt[MXSER_PORTS];
255 unsigned long txcnt[MXSER_PORTS];
256};
257
258
259struct mxser_mon {
260 unsigned long rxcnt;
261 unsigned long txcnt;
262 unsigned long up_rxcnt;
263 unsigned long up_txcnt;
264 int modem_status;
265 unsigned char hold_reason;
266};
267
268struct mxser_mon_ext {
269 unsigned long rx_cnt[32];
270 unsigned long tx_cnt[32];
271 unsigned long up_rxcnt[32];
272 unsigned long up_txcnt[32];
273 int modem_status[32];
274
275 long baudrate[32];
276 int databits[32];
277 int stopbits[32];
278 int parity[32];
279 int flowctrl[32];
280 int fifo[32];
281 int iftype[32];
282};
8ea2c2ec 283
1da177e4
LT		 284struct mxser_hwconf {
285 int board_type;
286 int ports;
287 int irq;
288 int vector;
289 int vector_mask;
290 int uart_type;
291 int ioaddr[MXSER_PORTS_PER_BOARD];
292 int baud_base[MXSER_PORTS_PER_BOARD];
293 moxa_pci_info pciInfo;
8ea2c2ec
JJ		 294 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
295 int MaxCanSetBaudRate[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 09-04-2002 */
296 int opmode_ioaddr[MXSER_PORTS_PER_BOARD]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 297};
298
299struct mxser_struct {
300 int port;
301 int base; /* port base address */
302 int irq; /* port using irq no. */
303 int vector; /* port irq vector */
304 int vectormask; /* port vector mask */
305 int rx_high_water;
306 int rx_trigger; /* Rx fifo trigger level */
307 int rx_low_water;
308 int baud_base; /* max. speed */
309 int flags; /* defined in tty.h */
310 int type; /* UART type */
311 struct tty_struct *tty;
312 int read_status_mask;
313 int ignore_status_mask;
314 int xmit_fifo_size;
315 int custom_divisor;
316 int x_char; /* xon/xoff character */
317 int close_delay;
318 unsigned short closing_wait;
319 int IER; /* Interrupt Enable Register */
320 int MCR; /* Modem control register */
321 unsigned long event;
322 int count; /* # of fd on device */
323 int blocked_open; /* # of blocked opens */
324 long session; /* Session of opening process */
325 long pgrp; /* pgrp of opening process */
326 unsigned char *xmit_buf;
327 int xmit_head;
328 int xmit_tail;
329 int xmit_cnt;
330 struct work_struct tqueue;
331 struct termios normal_termios;
332 struct termios callout_termios;
333 wait_queue_head_t open_wait;
334 wait_queue_head_t close_wait;
335 wait_queue_head_t delta_msr_wait;
336 struct async_icount icount; /* kernel counters for the 4 input interrupts */
337 int timeout;
8ea2c2ec
JJ		 338 int IsMoxaMustChipFlag; /* add by Victor Yu. 08-30-2002 */
339 int MaxCanSetBaudRate; /* add by Victor Yu. 09-04-2002 */
340 int opmode_ioaddr; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 341 unsigned char stop_rx;
342 unsigned char ldisc_stop_rx;
343 long realbaud;
344 struct mxser_mon mon_data;
345 unsigned char err_shadow;
346 spinlock_t slock;
347};
348
1da177e4
LT		 349struct mxser_mstatus {
350 tcflag_t cflag;
351 int cts;
352 int dsr;
353 int ri;
354 int dcd;
355};
356
357static struct mxser_mstatus GMStatus[MXSER_PORTS];
358
359static int mxserBoardCAP[MXSER_BOARDS] = {
360 0, 0, 0, 0
8ea2c2ec 361 /* 0x180, 0x280, 0x200, 0x320 */
1da177e4
LT		 362};
363
364static struct tty_driver *mxvar_sdriver;
365static struct mxser_struct mxvar_table[MXSER_PORTS];
366static struct tty_struct *mxvar_tty[MXSER_PORTS + 1];
367static struct termios *mxvar_termios[MXSER_PORTS + 1];
368static struct termios *mxvar_termios_locked[MXSER_PORTS + 1];
369static struct mxser_log mxvar_log;
370static int mxvar_diagflag;
371static unsigned char mxser_msr[MXSER_PORTS + 1];
372static struct mxser_mon_ext mon_data_ext;
373static int mxser_set_baud_method[MXSER_PORTS + 1];
374static spinlock_t gm_lock;
375
376/*
377 * This is used to figure out the divisor speeds and the timeouts
378 */
379
380static struct mxser_hwconf mxsercfg[MXSER_BOARDS];
381
382/*
383 * static functions:
384 */
385
386static void mxser_getcfg(int board, struct mxser_hwconf *hwconf);
387static int mxser_init(void);
388
8ea2c2ec 389/* static void mxser_poll(unsigned long); */
1da177e4
LT		 390static int mxser_get_ISA_conf(int, struct mxser_hwconf *);
391static int mxser_get_PCI_conf(int, int, int, struct mxser_hwconf *);
392static void mxser_do_softint(void *);
393static int mxser_open(struct tty_struct *, struct file *);
394static void mxser_close(struct tty_struct *, struct file *);
395static int mxser_write(struct tty_struct *, const unsigned char *, int);
396static int mxser_write_room(struct tty_struct *);
397static void mxser_flush_buffer(struct tty_struct *);
398static int mxser_chars_in_buffer(struct tty_struct *);
399static void mxser_flush_chars(struct tty_struct *);
400static void mxser_put_char(struct tty_struct *, unsigned char);
401static int mxser_ioctl(struct tty_struct *, struct file *, uint, ulong);
402static int mxser_ioctl_special(unsigned int, void __user *);
403static void mxser_throttle(struct tty_struct *);
404static void mxser_unthrottle(struct tty_struct *);
405static void mxser_set_termios(struct tty_struct *, struct termios *);
406static void mxser_stop(struct tty_struct *);
407static void mxser_start(struct tty_struct *);
408static void mxser_hangup(struct tty_struct *);
409static void mxser_rs_break(struct tty_struct *, int);
410static irqreturn_t mxser_interrupt(int, void *, struct pt_regs *);
411static void mxser_receive_chars(struct mxser_struct *, int *);
412static void mxser_transmit_chars(struct mxser_struct *);
413static void mxser_check_modem_status(struct mxser_struct *, int);
414static int mxser_block_til_ready(struct tty_struct *, struct file *, struct mxser_struct *);
415static int mxser_startup(struct mxser_struct *);
416static void mxser_shutdown(struct mxser_struct *);
417static int mxser_change_speed(struct mxser_struct *, struct termios *old_termios);
418static int mxser_get_serial_info(struct mxser_struct *, struct serial_struct __user *);
419static int mxser_set_serial_info(struct mxser_struct *, struct serial_struct __user *);
420static int mxser_get_lsr_info(struct mxser_struct *, unsigned int __user *);
421static void mxser_send_break(struct mxser_struct *, int);
422static int mxser_tiocmget(struct tty_struct *, struct file *);
423static int mxser_tiocmset(struct tty_struct *, struct file *, unsigned int, unsigned int);
424static int mxser_set_baud(struct mxser_struct *info, long newspd);
425static void mxser_wait_until_sent(struct tty_struct *tty, int timeout);
426
427static void mxser_startrx(struct tty_struct *tty);
428static void mxser_stoprx(struct tty_struct *tty);
429
430
431static int CheckIsMoxaMust(int io)
432{
433 u8 oldmcr, hwid;
434 int i;
435
436 outb(0, io + UART_LCR);
437 DISABLE_MOXA_MUST_ENCHANCE_MODE(io);
438 oldmcr = inb(io + UART_MCR);
439 outb(0, io + UART_MCR);
440 SET_MOXA_MUST_XON1_VALUE(io, 0x11);
441 if ((hwid = inb(io + UART_MCR)) != 0) {
442 outb(oldmcr, io + UART_MCR);
8ea2c2ec 443 return MOXA_OTHER_UART;
1da177e4
LT		 444 }
445
446 GET_MOXA_MUST_HARDWARE_ID(io, &hwid);
447 for (i = 0; i < UART_TYPE_NUM; i++) {
448 if (hwid == Gmoxa_uart_id[i])
8ea2c2ec 449 return (int)hwid;
1da177e4
LT		 450 }
451 return MOXA_OTHER_UART;
452}
453
8ea2c2ec 454/* above is modified by Victor Yu. 08-15-2002 */
1da177e4
LT		 455
456static struct tty_operations mxser_ops = {
457 .open = mxser_open,
458 .close = mxser_close,
459 .write = mxser_write,
460 .put_char = mxser_put_char,
461 .flush_chars = mxser_flush_chars,
462 .write_room = mxser_write_room,
463 .chars_in_buffer = mxser_chars_in_buffer,
464 .flush_buffer = mxser_flush_buffer,
465 .ioctl = mxser_ioctl,
466 .throttle = mxser_throttle,
467 .unthrottle = mxser_unthrottle,
468 .set_termios = mxser_set_termios,
469 .stop = mxser_stop,
470 .start = mxser_start,
471 .hangup = mxser_hangup,
57432345
KS		 472 .break_ctl = mxser_rs_break,
473 .wait_until_sent = mxser_wait_until_sent,
1da177e4
LT		 474 .tiocmget = mxser_tiocmget,
475 .tiocmset = mxser_tiocmset,
476};
477
478/*
479 * The MOXA Smartio/Industio serial driver boot-time initialization code!
480 */
481
482static int __init mxser_module_init(void)
483{
484 int ret;
485
486 if (verbose)
487 printk(KERN_DEBUG "Loading module mxser ...\n");
488 ret = mxser_init();
489 if (verbose)
490 printk(KERN_DEBUG "Done.\n");
491 return ret;
492}
493
494static void __exit mxser_module_exit(void)
495{
64698b69 496 int i, err;
1da177e4
LT		 497
498 if (verbose)
499 printk(KERN_DEBUG "Unloading module mxser ...\n");
500
64698b69
KS		 501 err = tty_unregister_driver(mxvar_sdriver);
502 if (!err)
503 put_tty_driver(mxvar_sdriver);
504 else
1da177e4
LT		 505 printk(KERN_ERR "Couldn't unregister MOXA Smartio/Industio family serial driver\n");
506
507 for (i = 0; i < MXSER_BOARDS; i++) {
508 struct pci_dev *pdev;
509
510 if (mxsercfg[i].board_type == -1)
511 continue;
512 else {
513 pdev = mxsercfg[i].pciInfo.pdev;
514 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 515 if (pdev != NULL) { /* PCI */
1da177e4
LT		 516 release_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2));
517 release_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3));
518 } else {
519 release_region(mxsercfg[i].ioaddr[0], 8 * mxsercfg[i].ports);
520 release_region(mxsercfg[i].vector, 1);
521 }
522 }
523 }
524 if (verbose)
525 printk(KERN_DEBUG "Done.\n");
1da177e4
LT		 526}
527
528static void process_txrx_fifo(struct mxser_struct *info)
529{
530 int i;
531
532 if ((info->type == PORT_16450) || (info->type == PORT_8250)) {
533 info->rx_trigger = 1;
534 info->rx_high_water = 1;
535 info->rx_low_water = 1;
536 info->xmit_fifo_size = 1;
537 } else {
538 for (i = 0; i < UART_INFO_NUM; i++) {
539 if (info->IsMoxaMustChipFlag == Gpci_uart_info[i].type) {
540 info->rx_trigger = Gpci_uart_info[i].rx_trigger;
541 info->rx_low_water = Gpci_uart_info[i].rx_low_water;
542 info->rx_high_water = Gpci_uart_info[i].rx_high_water;
543 info->xmit_fifo_size = Gpci_uart_info[i].xmit_fifo_size;
544 break;
545 }
546 }
547 }
548}
549
550static int mxser_initbrd(int board, struct mxser_hwconf *hwconf)
551{
552 struct mxser_struct *info;
553 int retval;
554 int i, n;
555
556 n = board * MXSER_PORTS_PER_BOARD;
557 info = &mxvar_table[n];
558 /*if (verbose) */ {
8ea2c2ec
JJ		 559 printk(KERN_DEBUG " ttyM%d - ttyM%d ",
560 n, n + hwconf->ports - 1);
561 printk(" max. baud rate = %d bps.\n",
562 hwconf->MaxCanSetBaudRate[0]);
1da177e4
LT		 563 }
564
565 for (i = 0; i < hwconf->ports; i++, n++, info++) {
566 info->port = n;
567 info->base = hwconf->ioaddr[i];
568 info->irq = hwconf->irq;
569 info->vector = hwconf->vector;
570 info->vectormask = hwconf->vector_mask;
8ea2c2ec 571 info->opmode_ioaddr = hwconf->opmode_ioaddr[i]; /* add by Victor Yu. 01-05-2004 */
1da177e4
LT		 572 info->stop_rx = 0;
573 info->ldisc_stop_rx = 0;
574
575 info->IsMoxaMustChipFlag = hwconf->IsMoxaMustChipFlag;
8ea2c2ec 576 /* Enhance mode enabled here */
1da177e4
LT		 577 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
578 ENABLE_MOXA_MUST_ENCHANCE_MODE(info->base);
579 }
580
581 info->flags = ASYNC_SHARE_IRQ;
582 info->type = hwconf->uart_type;
583 info->baud_base = hwconf->baud_base[i];
584
585 info->MaxCanSetBaudRate = hwconf->MaxCanSetBaudRate[i];
586
587 process_txrx_fifo(info);
588
589
590 info->custom_divisor = hwconf->baud_base[i] * 16;
591 info->close_delay = 5 * HZ / 10;
592 info->closing_wait = 30 * HZ;
593 INIT_WORK(&info->tqueue, mxser_do_softint, info);
594 info->normal_termios = mxvar_sdriver->init_termios;
595 init_waitqueue_head(&info->open_wait);
596 init_waitqueue_head(&info->close_wait);
597 init_waitqueue_head(&info->delta_msr_wait);
598 memset(&info->mon_data, 0, sizeof(struct mxser_mon));
599 info->err_shadow = 0;
600 spin_lock_init(&info->slock);
601 }
602 /*
603 * Allocate the IRQ if necessary
604 */
605
606
607 /* before set INT ISR, disable all int */
608 for (i = 0; i < hwconf->ports; i++) {
8ea2c2ec
JJ		 609 outb(inb(hwconf->ioaddr[i] + UART_IER) & 0xf0,
610 hwconf->ioaddr[i] + UART_IER);
1da177e4
LT		 611 }
612
613 n = board * MXSER_PORTS_PER_BOARD;
614 info = &mxvar_table[n];
615
8ea2c2ec
JJ		 616 retval = request_irq(hwconf->irq, mxser_interrupt, IRQ_T(info),
617 "mxser", info);
1da177e4 618 if (retval) {
8ea2c2ec
JJ		 619 printk(KERN_ERR "Board %d: %s",
620 board, mxser_brdname[hwconf->board_type - 1]);
621 printk(" Request irq failed, IRQ (%d) may conflict with"
622 " another device.\n", info->irq);
1da177e4
LT		 623 return retval;
624 }
625 return 0;
626}
627
1da177e4
LT		 628static void mxser_getcfg(int board, struct mxser_hwconf *hwconf)
629{
630 mxsercfg[board] = *hwconf;
631}
632
633#ifdef CONFIG_PCI
634static int mxser_get_PCI_conf(int busnum, int devnum, int board_type, struct mxser_hwconf *hwconf)
635{
636 int i, j;
8ea2c2ec 637 /* unsigned int val; */
1da177e4
LT		 638 unsigned int ioaddress;
639 struct pci_dev *pdev = hwconf->pciInfo.pdev;
640
8ea2c2ec 641 /* io address */
1da177e4
LT		 642 hwconf->board_type = board_type;
643 hwconf->ports = mxser_numports[board_type - 1];
644 ioaddress = pci_resource_start(pdev, 2);
8ea2c2ec
JJ		 645 request_region(pci_resource_start(pdev, 2), pci_resource_len(pdev, 2),
646 "mxser(IO)");
1da177e4 647
8ea2c2ec 648 for (i = 0; i < hwconf->ports; i++)
1da177e4 649 hwconf->ioaddr[i] = ioaddress + 8 * i;
1da177e4 650
8ea2c2ec 651 /* vector */
1da177e4 652 ioaddress = pci_resource_start(pdev, 3);
8ea2c2ec
JJ		 653 request_region(pci_resource_start(pdev, 3), pci_resource_len(pdev, 3),
654 "mxser(vector)");
1da177e4
LT		 655 hwconf->vector = ioaddress;
656
8ea2c2ec 657 /* irq */
1da177e4
LT		 658 hwconf->irq = hwconf->pciInfo.pdev->irq;
659
660 hwconf->IsMoxaMustChipFlag = CheckIsMoxaMust(hwconf->ioaddr[0]);
661 hwconf->uart_type = PORT_16550A;
662 hwconf->vector_mask = 0;
663
664
665 for (i = 0; i < hwconf->ports; i++) {
666 for (j = 0; j < UART_INFO_NUM; j++) {
667 if (Gpci_uart_info[j].type == hwconf->IsMoxaMustChipFlag) {
668 hwconf->MaxCanSetBaudRate[i] = Gpci_uart_info[j].max_baud;
669
8ea2c2ec 670 /* exception....CP-102 */
1da177e4
LT		 671 if (board_type == MXSER_BOARD_CP102)
672 hwconf->MaxCanSetBaudRate[i] = 921600;
673 break;
674 }
675 }
676 }
677
678 if (hwconf->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID) {
679 for (i = 0; i < hwconf->ports; i++) {
680 if (i < 4)
681 hwconf->opmode_ioaddr[i] = ioaddress + 4;
682 else
683 hwconf->opmode_ioaddr[i] = ioaddress + 0x0c;
684 }
8ea2c2ec
JJ		 685 outb(0, ioaddress + 4); /* default set to RS232 mode */
686 outb(0, ioaddress + 0x0c); /* default set to RS232 mode */
1da177e4
LT		 687 }
688
689 for (i = 0; i < hwconf->ports; i++) {
690 hwconf->vector_mask |= (1 << i);
691 hwconf->baud_base[i] = 921600;
692 }
8ea2c2ec 693 return 0;
1da177e4
LT		 694}
695#endif
696
697static int mxser_init(void)
698{
699 int i, m, retval, b, n;
1da177e4
LT		 700 struct pci_dev *pdev = NULL;
701 int index;
702 unsigned char busnum, devnum;
703 struct mxser_hwconf hwconf;
704
705 mxvar_sdriver = alloc_tty_driver(MXSER_PORTS + 1);
706 if (!mxvar_sdriver)
707 return -ENOMEM;
708 spin_lock_init(&gm_lock);
709
710 for (i = 0; i < MXSER_BOARDS; i++) {
711 mxsercfg[i].board_type = -1;
712 }
713
8ea2c2ec
JJ		 714 printk(KERN_INFO "MOXA Smartio/Industio family driver version %s\n",
715 MXSER_VERSION);
1da177e4
LT		 716
717 /* Initialize the tty_driver structure */
718 memset(mxvar_sdriver, 0, sizeof(struct tty_driver));
719 mxvar_sdriver->magic = TTY_DRIVER_MAGIC;
720 mxvar_sdriver->name = "ttyM";
721 mxvar_sdriver->major = ttymajor;
722 mxvar_sdriver->minor_start = 0;
723 mxvar_sdriver->num = MXSER_PORTS + 1;
724 mxvar_sdriver->type = TTY_DRIVER_TYPE_SERIAL;
725 mxvar_sdriver->subtype = SERIAL_TYPE_NORMAL;
726 mxvar_sdriver->init_termios = tty_std_termios;
8ea2c2ec 727 mxvar_sdriver->init_termios.c_cflag = B9600|CS8|CREAD|HUPCL|CLOCAL;
1da177e4
LT		 728 mxvar_sdriver->flags = TTY_DRIVER_REAL_RAW;
729 tty_set_operations(mxvar_sdriver, &mxser_ops);
730 mxvar_sdriver->ttys = mxvar_tty;
731 mxvar_sdriver->termios = mxvar_termios;
732 mxvar_sdriver->termios_locked = mxvar_termios_locked;
733
1da177e4
LT		 734 mxvar_diagflag = 0;
735 memset(mxvar_table, 0, MXSER_PORTS * sizeof(struct mxser_struct));
736 memset(&mxvar_log, 0, sizeof(struct mxser_log));
737
738 memset(&mxser_msr, 0, sizeof(unsigned char) * (MXSER_PORTS + 1));
739 memset(&mon_data_ext, 0, sizeof(struct mxser_mon_ext));
740 memset(&mxser_set_baud_method, 0, sizeof(int) * (MXSER_PORTS + 1));
741 memset(&hwconf, 0, sizeof(struct mxser_hwconf));
742
743 m = 0;
744 /* Start finding ISA boards here */
745 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
746 int cap;
8ea2c2ec 747
1da177e4
LT		 748 if (!(cap = mxserBoardCAP[b]))
749 continue;
750
751 retval = mxser_get_ISA_conf(cap, &hwconf);
752
753 if (retval != 0)
8ea2c2ec
JJ		 754 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
755 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 756
757 if (retval <= 0) {
758 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 759 printk(KERN_ERR "Invalid interrupt number, "
760 "board not configured\n");
1da177e4 761 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 762 printk(KERN_ERR "Invalid interrupt number, "
763 "board not configured\n");
1da177e4 764 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 765 printk(KERN_ERR "Invalid interrupt vector, "
766 "board not configured\n");
1da177e4 767 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 768 printk(KERN_ERR "Invalid I/O address, "
769 "board not configured\n");
1da177e4
LT		 770
771 continue;
772 }
773
774 hwconf.pciInfo.busNum = 0;
775 hwconf.pciInfo.devNum = 0;
776 hwconf.pciInfo.pdev = NULL;
777
778 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 779 /*
780 * init mxsercfg first,
781 * or mxsercfg data is not correct on ISR.
782 */
783 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 784 if (mxser_initbrd(m, &hwconf) < 0)
785 continue;
786
1da177e4
LT		 787 m++;
788 }
789
790 /* Start finding ISA boards from module arg */
791 for (b = 0; b < MXSER_BOARDS && m < MXSER_BOARDS; b++) {
792 int cap;
8ea2c2ec 793
1da177e4
LT		 794 if (!(cap = ioaddr[b]))
795 continue;
796
797 retval = mxser_get_ISA_conf(cap, &hwconf);
798
799 if (retval != 0)
8ea2c2ec
JJ		 800 printk(KERN_INFO "Found MOXA %s board (CAP=0x%x)\n",
801 mxser_brdname[hwconf.board_type - 1], ioaddr[b]);
1da177e4
LT		 802
803 if (retval <= 0) {
804 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 805 printk(KERN_ERR "Invalid interrupt number, "
806 "board not configured\n");
1da177e4 807 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 808 printk(KERN_ERR "Invalid interrupt number, "
809 "board not configured\n");
1da177e4 810 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 811 printk(KERN_ERR "Invalid interrupt vector, "
812 "board not configured\n");
1da177e4 813 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 814 printk(KERN_ERR "Invalid I/O address, "
815 "board not configured\n");
1da177e4
LT		 816
817 continue;
818 }
819
820 hwconf.pciInfo.busNum = 0;
821 hwconf.pciInfo.devNum = 0;
822 hwconf.pciInfo.pdev = NULL;
823
824 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 825 /*
826 * init mxsercfg first,
827 * or mxsercfg data is not correct on ISR.
828 */
829 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 830 if (mxser_initbrd(m, &hwconf) < 0)
831 continue;
832
833 m++;
834 }
835
836 /* start finding PCI board here */
837#ifdef CONFIG_PCI
fe971071 838 n = ARRAY_SIZE(mxser_pcibrds) - 1;
1da177e4
LT		 839 index = 0;
840 b = 0;
841 while (b < n) {
8ea2c2ec
JJ		 842 pdev = pci_find_device(mxser_pcibrds[b].vendor,
843 mxser_pcibrds[b].device, pdev);
1da177e4
LT		 844 if (pdev == NULL) {
845 b++;
846 continue;
847 }
848 hwconf.pciInfo.busNum = busnum = pdev->bus->number;
849 hwconf.pciInfo.devNum = devnum = PCI_SLOT(pdev->devfn) << 3;
850 hwconf.pciInfo.pdev = pdev;
8ea2c2ec
JJ		 851 printk(KERN_INFO "Found MOXA %s board(BusNo=%d,DevNo=%d)\n",
852 mxser_brdname[(int) (mxser_pcibrds[b].driver_data) - 1],
853 busnum, devnum >> 3);
1da177e4 854 index++;
8ea2c2ec
JJ		 855 if (m >= MXSER_BOARDS)
856 printk(KERN_ERR
857 "Too many Smartio/Industio family boards find "
858 "(maximum %d), board not configured\n",
859 MXSER_BOARDS);
860 else {
1da177e4 861 if (pci_enable_device(pdev)) {
8ea2c2ec
JJ		 862 printk(KERN_ERR "Moxa SmartI/O PCI enable "
863 "fail !\n");
1da177e4
LT		 864 continue;
865 }
8ea2c2ec
JJ		 866 retval = mxser_get_PCI_conf(busnum, devnum,
867 (int)mxser_pcibrds[b].driver_data,
868 &hwconf);
1da177e4
LT		 869 if (retval < 0) {
870 if (retval == MXSER_ERR_IRQ)
8ea2c2ec
JJ		 871 printk(KERN_ERR
872 "Invalid interrupt number, "
873 "board not configured\n");
1da177e4 874 else if (retval == MXSER_ERR_IRQ_CONFLIT)
8ea2c2ec
JJ		 875 printk(KERN_ERR
876 "Invalid interrupt number, "
877 "board not configured\n");
1da177e4 878 else if (retval == MXSER_ERR_VECTOR)
8ea2c2ec
JJ		 879 printk(KERN_ERR
880 "Invalid interrupt vector, "
881 "board not configured\n");
1da177e4 882 else if (retval == MXSER_ERR_IOADDR)
8ea2c2ec
JJ		 883 printk(KERN_ERR
884 "Invalid I/O address, "
885 "board not configured\n");
1da177e4
LT		 886 continue;
887 }
888 mxser_getcfg(m, &hwconf);
8ea2c2ec
JJ		 889 /* init mxsercfg first,
890 * or mxsercfg data is not correct on ISR.
891 */
892 /* mxser_initbrd will hook ISR. */
1da177e4
LT		 893 if (mxser_initbrd(m, &hwconf) < 0)
894 continue;
895 m++;
896 }
897 }
898#endif
899
64698b69
KS		 900 retval = tty_register_driver(mxvar_sdriver);
901 if (retval) {
8ea2c2ec
JJ		 902 printk(KERN_ERR "Couldn't install MOXA Smartio/Industio family"
903 " driver !\n");
64698b69 904 put_tty_driver(mxvar_sdriver);
1da177e4 905
1da177e4
LT		 906 for (i = 0; i < MXSER_BOARDS; i++) {
907 if (mxsercfg[i].board_type == -1)
908 continue;
909 else {
910 free_irq(mxsercfg[i].irq, &mxvar_table[i * MXSER_PORTS_PER_BOARD]);
8ea2c2ec 911 /* todo: release io, vector */
1da177e4
LT		 912 }
913 }
64698b69 914 return retval;
1da177e4
LT		 915 }
916
64698b69 917 return 0;
1da177e4
LT		 918}
919
920static void mxser_do_softint(void *private_)
921{
56e139f6 922 struct mxser_struct *info = private_;
1da177e4
LT		 923 struct tty_struct *tty;
924
925 tty = info->tty;
926
927 if (tty) {
928 if (test_and_clear_bit(MXSER_EVENT_TXLOW, &info->event))
929 tty_wakeup(tty);
930 if (test_and_clear_bit(MXSER_EVENT_HANGUP, &info->event))
931 tty_hangup(tty);
932 }
933}
934
935static unsigned char mxser_get_msr(int baseaddr, int mode, int port, struct mxser_struct *info)
936{
937 unsigned char status = 0;
938
939 status = inb(baseaddr + UART_MSR);
940
941 mxser_msr[port] &= 0x0F;
942 mxser_msr[port] |= status;
943 status = mxser_msr[port];
944 if (mode)
945 mxser_msr[port] = 0;
946
947 return status;
948}
949
950/*
951 * This routine is called whenever a serial port is opened. It
952 * enables interrupts for a serial port, linking in its async structure into
953 * the IRQ chain. It also performs the serial-specific
954 * initialization for the tty structure.
955 */
956static int mxser_open(struct tty_struct *tty, struct file *filp)
957{
958 struct mxser_struct *info;
959 int retval, line;
960
6f08b72c
KS		 961 /* initialize driver_data in case something fails */
962 tty->driver_data = NULL;
963
1da177e4
LT		 964 line = tty->index;
965 if (line == MXSER_PORTS)
966 return 0;
967 if (line < 0 || line > MXSER_PORTS)
968 return -ENODEV;
969 info = mxvar_table + line;
970 if (!info->base)
8ea2c2ec 971 return -ENODEV;
1da177e4
LT		 972
973 tty->driver_data = info;
974 info->tty = tty;
975 /*
976 * Start up serial port
977 */
978 retval = mxser_startup(info);
979 if (retval)
8ea2c2ec 980 return retval;
1da177e4
LT		 981
982 retval = mxser_block_til_ready(tty, filp, info);
983 if (retval)
8ea2c2ec 984 return retval;
1da177e4
LT		 985
986 info->count++;
987
988 if ((info->count == 1) && (info->flags & ASYNC_SPLIT_TERMIOS)) {
989 if (tty->driver->subtype == SERIAL_TYPE_NORMAL)
990 *tty->termios = info->normal_termios;
991 else
992 *tty->termios = info->callout_termios;
993 mxser_change_speed(info, NULL);
994 }
995
996 info->session = current->signal->session;
997 info->pgrp = process_group(current);
1da177e4 998
8ea2c2ec
JJ		 999 /*
1000 status = mxser_get_msr(info->base, 0, info->port);
1001 mxser_check_modem_status(info, status);
1002 */
1da177e4 1003
8ea2c2ec 1004/* unmark here for very high baud rate (ex. 921600 bps) used */
1da177e4
LT		 1005 tty->low_latency = 1;
1006 return 0;
1007}
1008
1009/*
1010 * This routine is called when the serial port gets closed. First, we
1011 * wait for the last remaining data to be sent. Then, we unlink its
1012 * async structure from the interrupt chain if necessary, and we free
1013 * that IRQ if nothing is left in the chain.
1014 */
1015static void mxser_close(struct tty_struct *tty, struct file *filp)
1016{
56e139f6 1017 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1018
1019 unsigned long timeout;
1020 unsigned long flags;
1021 struct tty_ldisc *ld;
1022
1023 if (tty->index == MXSER_PORTS)
1024 return;
1025 if (!info)
6f08b72c 1026 return;
1da177e4
LT		 1027
1028 spin_lock_irqsave(&info->slock, flags);
1029
1030 if (tty_hung_up_p(filp)) {
1031 spin_unlock_irqrestore(&info->slock, flags);
1032 return;
1033 }
1034 if ((tty->count == 1) && (info->count != 1)) {
1035 /*
1036 * Uh, oh. tty->count is 1, which means that the tty
1037 * structure will be freed. Info->count should always
1038 * be one in these conditions. If it's greater than
1039 * one, we've got real problems, since it means the
1040 * serial port won't be shutdown.
1041 */
8ea2c2ec
JJ		 1042 printk(KERN_ERR "mxser_close: bad serial port count; "
1043 "tty->count is 1, info->count is %d\n", info->count);
1da177e4
LT		 1044 info->count = 1;
1045 }
1046 if (--info->count < 0) {
8ea2c2ec
JJ		 1047 printk(KERN_ERR "mxser_close: bad serial port count for "
1048 "ttys%d: %d\n", info->port, info->count);
1da177e4
LT		 1049 info->count = 0;
1050 }
1051 if (info->count) {
1052 spin_unlock_irqrestore(&info->slock, flags);
1053 return;
1054 }
1055 info->flags |= ASYNC_CLOSING;
1056 spin_unlock_irqrestore(&info->slock, flags);
1057 /*
1058 * Save the termios structure, since this port may have
1059 * separate termios for callout and dialin.
1060 */
1061 if (info->flags & ASYNC_NORMAL_ACTIVE)
1062 info->normal_termios = *tty->termios;
1063 /*
1064 * Now we wait for the transmit buffer to clear; and we notify
1065 * the line discipline to only process XON/XOFF characters.
1066 */
1067 tty->closing = 1;
1068 if (info->closing_wait != ASYNC_CLOSING_WAIT_NONE)
1069 tty_wait_until_sent(tty, info->closing_wait);
1070 /*
1071 * At this point we stop accepting input. To do this, we
1072 * disable the receive line status interrupts, and tell the
1073 * interrupt driver to stop checking the data ready bit in the
1074 * line status register.
1075 */
1076 info->IER &= ~UART_IER_RLSI;
1077 if (info->IsMoxaMustChipFlag)
1078 info->IER &= ~MOXA_MUST_RECV_ISR;
1079/* by William
1080 info->read_status_mask &= ~UART_LSR_DR;
1081*/
1082 if (info->flags & ASYNC_INITIALIZED) {
1083 outb(info->IER, info->base + UART_IER);
1084 /*
1085 * Before we drop DTR, make sure the UART transmitter
1086 * has completely drained; this is especially
1087 * important if there is a transmit FIFO!
1088 */
1089 timeout = jiffies + HZ;
1090 while (!(inb(info->base + UART_LSR) & UART_LSR_TEMT)) {
da4cd8df 1091 schedule_timeout_interruptible(5);
1da177e4
LT		 1092 if (time_after(jiffies, timeout))
1093 break;
1094 }
1095 }
1096 mxser_shutdown(info);
1097
1098 if (tty->driver->flush_buffer)
1099 tty->driver->flush_buffer(tty);
1100
1101 ld = tty_ldisc_ref(tty);
1102 if (ld) {
8ea2c2ec 1103 if (ld->flush_buffer)
1da177e4
LT		 1104 ld->flush_buffer(tty);
1105 tty_ldisc_deref(ld);
1106 }
1107
1108 tty->closing = 0;
1109 info->event = 0;
1110 info->tty = NULL;
1111 if (info->blocked_open) {
da4cd8df
NA		 1112 if (info->close_delay)
1113 schedule_timeout_interruptible(info->close_delay);
1da177e4
LT		 1114 wake_up_interruptible(&info->open_wait);
1115 }
1116
1117 info->flags &= ~(ASYNC_NORMAL_ACTIVE | ASYNC_CLOSING);
1118 wake_up_interruptible(&info->close_wait);
1119
1120}
1121
1122static int mxser_write(struct tty_struct *tty, const unsigned char *buf, int count)
1123{
1124 int c, total = 0;
56e139f6 1125 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1126 unsigned long flags;
1127
8a7f7c93 1128 if (!info->xmit_buf)
8ea2c2ec 1129 return 0;
1da177e4
LT		 1130
1131 while (1) {
8ea2c2ec
JJ		 1132 c = min_t(int, count, min(SERIAL_XMIT_SIZE - info->xmit_cnt - 1,
1133 SERIAL_XMIT_SIZE - info->xmit_head));
1da177e4
LT		 1134 if (c <= 0)
1135 break;
1136
1137 memcpy(info->xmit_buf + info->xmit_head, buf, c);
1138 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 1139 info->xmit_head = (info->xmit_head + c) &
1140 (SERIAL_XMIT_SIZE - 1);
1da177e4
LT		 1141 info->xmit_cnt += c;
1142 spin_unlock_irqrestore(&info->slock, flags);
1143
1144 buf += c;
1145 count -= c;
1146 total += c;
1da177e4
LT		 1147 }
1148
1149 if (info->xmit_cnt && !tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1150 if (!tty->hw_stopped ||
1151 (info->type == PORT_16550A) ||
1152 (info->IsMoxaMustChipFlag)) {
1da177e4
LT		 1153 spin_lock_irqsave(&info->slock, flags);
1154 info->IER |= UART_IER_THRI;
1155 outb(info->IER, info->base + UART_IER);
1156 spin_unlock_irqrestore(&info->slock, flags);
1157 }
1158 }
1159 return total;
1160}
1161
1162static void mxser_put_char(struct tty_struct *tty, unsigned char ch)
1163{
56e139f6 1164 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1165 unsigned long flags;
1166
8a7f7c93 1167 if (!info->xmit_buf)
1da177e4
LT		 1168 return;
1169
1170 if (info->xmit_cnt >= SERIAL_XMIT_SIZE - 1)
1171 return;
1172
1173 spin_lock_irqsave(&info->slock, flags);
1174 info->xmit_buf[info->xmit_head++] = ch;
1175 info->xmit_head &= SERIAL_XMIT_SIZE - 1;
1176 info->xmit_cnt++;
1177 spin_unlock_irqrestore(&info->slock, flags);
1178 if (!tty->stopped && !(info->IER & UART_IER_THRI)) {
8ea2c2ec
JJ		 1179 if (!tty->hw_stopped ||
1180 (info->type == PORT_16550A) ||
1181 info->IsMoxaMustChipFlag) {
1da177e4
LT		 1182 spin_lock_irqsave(&info->slock, flags);
1183 info->IER |= UART_IER_THRI;
1184 outb(info->IER, info->base + UART_IER);
1185 spin_unlock_irqrestore(&info->slock, flags);
1186 }
1187 }
1188}
1189
1190
1191static void mxser_flush_chars(struct tty_struct *tty)
1192{
56e139f6 1193 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1194 unsigned long flags;
1195
8ea2c2ec
JJ		 1196 if (info->xmit_cnt <= 0 ||
1197 tty->stopped ||
1198 !info->xmit_buf ||
1199 (tty->hw_stopped &&
1200 (info->type != PORT_16550A) &&
1201 (!info->IsMoxaMustChipFlag)
1202 ))
1da177e4
LT		 1203 return;
1204
1205 spin_lock_irqsave(&info->slock, flags);
1206
1207 info->IER |= UART_IER_THRI;
1208 outb(info->IER, info->base + UART_IER);
1209
1210 spin_unlock_irqrestore(&info->slock, flags);
1211}
1212
1213static int mxser_write_room(struct tty_struct *tty)
1214{
56e139f6 1215 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1216 int ret;
1217
1218 ret = SERIAL_XMIT_SIZE - info->xmit_cnt - 1;
1219 if (ret < 0)
1220 ret = 0;
8ea2c2ec 1221 return ret;
1da177e4
LT		 1222}
1223
1224static int mxser_chars_in_buffer(struct tty_struct *tty)
1225{
56e139f6 1226 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1227 return info->xmit_cnt;
1228}
1229
1230static void mxser_flush_buffer(struct tty_struct *tty)
1231{
56e139f6 1232 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1233 char fcr;
1234 unsigned long flags;
1235
1236
1237 spin_lock_irqsave(&info->slock, flags);
1238 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
1239
1240 /* below added by shinhay */
1241 fcr = inb(info->base + UART_FCR);
8ea2c2ec
JJ		 1242 outb((fcr | UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
1243 info->base + UART_FCR);
1da177e4
LT		 1244 outb(fcr, info->base + UART_FCR);
1245
1246 spin_unlock_irqrestore(&info->slock, flags);
1247 /* above added by shinhay */
1248
1249 wake_up_interruptible(&tty->write_wait);
1250 if ((tty->flags & (1 << TTY_DO_WRITE_WAKEUP)) && tty->ldisc.write_wakeup)
1251 (tty->ldisc.write_wakeup) (tty);
1252}
1253
1254static int mxser_ioctl(struct tty_struct *tty, struct file *file, unsigned int cmd, unsigned long arg)
1255{
56e139f6 1256 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1257 int retval;
1258 struct async_icount cprev, cnow; /* kernel counter temps */
1259 struct serial_icounter_struct __user *p_cuser;
1260 unsigned long templ;
1261 unsigned long flags;
1262 void __user *argp = (void __user *)arg;
1263
1264 if (tty->index == MXSER_PORTS)
8ea2c2ec 1265 return mxser_ioctl_special(cmd, argp);
1da177e4 1266
8ea2c2ec 1267 /* following add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1268 if (cmd == MOXA_SET_OP_MODE || cmd == MOXA_GET_OP_MODE) {
1269 int opmode, p;
1270 static unsigned char ModeMask[] = { 0xfc, 0xf3, 0xcf, 0x3f };
1271 int shiftbit;
1272 unsigned char val, mask;
1273
1274 p = info->port % 4;
1275 if (cmd == MOXA_SET_OP_MODE) {
1276 if (get_user(opmode, (int __user *) argp))
1277 return -EFAULT;
8ea2c2ec
JJ		 1278 if (opmode != RS232_MODE &&
1279 opmode != RS485_2WIRE_MODE &&
1280 opmode != RS422_MODE &&
1281 opmode != RS485_4WIRE_MODE)
1da177e4
LT		 1282 return -EFAULT;
1283 mask = ModeMask[p];
1284 shiftbit = p * 2;
1285 val = inb(info->opmode_ioaddr);
1286 val &= mask;
1287 val |= (opmode << shiftbit);
1288 outb(val, info->opmode_ioaddr);
1289 } else {
1290 shiftbit = p * 2;
1291 opmode = inb(info->opmode_ioaddr) >> shiftbit;
1292 opmode &= OP_MODE_MASK;
1293 if (copy_to_user(argp, &opmode, sizeof(int)))
1294 return -EFAULT;
1295 }
1296 return 0;
1297 }
8ea2c2ec 1298 /* above add by Victor Yu. 01-05-2004 */
1da177e4
LT		 1299
1300 if ((cmd != TIOCGSERIAL) && (cmd != TIOCMIWAIT) && (cmd != TIOCGICOUNT)) {
1301 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 1302 return -EIO;
1da177e4
LT		 1303 }
1304 switch (cmd) {
1305 case TCSBRK: /* SVID version: non-zero arg --> no break */
1306 retval = tty_check_change(tty);
1307 if (retval)
8ea2c2ec 1308 return retval;
1da177e4
LT		 1309 tty_wait_until_sent(tty, 0);
1310 if (!arg)
1311 mxser_send_break(info, HZ / 4); /* 1/4 second */
8ea2c2ec 1312 return 0;
1da177e4
LT		 1313 case TCSBRKP: /* support for POSIX tcsendbreak() */
1314 retval = tty_check_change(tty);
1315 if (retval)
8ea2c2ec 1316 return retval;
1da177e4
LT		 1317 tty_wait_until_sent(tty, 0);
1318 mxser_send_break(info, arg ? arg * (HZ / 10) : HZ / 4);
8ea2c2ec 1319 return 0;
1da177e4 1320 case TIOCGSOFTCAR:
8ea2c2ec 1321 return put_user(C_CLOCAL(tty) ? 1 : 0, (unsigned long __user *)argp);
1da177e4
LT		 1322 case TIOCSSOFTCAR:
1323 if (get_user(templ, (unsigned long __user *) argp))
1324 return -EFAULT;
1325 arg = templ;
1326 tty->termios->c_cflag = ((tty->termios->c_cflag & ~CLOCAL) | (arg ? CLOCAL : 0));
8ea2c2ec 1327 return 0;
1da177e4
LT		 1328 case TIOCGSERIAL:
1329 return mxser_get_serial_info(info, argp);
1330 case TIOCSSERIAL:
1331 return mxser_set_serial_info(info, argp);
1332 case TIOCSERGETLSR: /* Get line status register */
1333 return mxser_get_lsr_info(info, argp);
1334 /*
1335 * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
1336 * - mask passed in arg for lines of interest
1337 * (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
1338 * Caller should use TIOCGICOUNT to see which one it was
1339 */
8ea2c2ec 1340 case TIOCMIWAIT: {
1da177e4
LT		 1341 DECLARE_WAITQUEUE(wait, current);
1342 int ret;
1343 spin_lock_irqsave(&info->slock, flags);
1344 cprev = info->icount; /* note the counters on entry */
1345 spin_unlock_irqrestore(&info->slock, flags);
1346
1347 add_wait_queue(&info->delta_msr_wait, &wait);
1348 while (1) {
1349 spin_lock_irqsave(&info->slock, flags);
1350 cnow = info->icount; /* atomic copy */
1351 spin_unlock_irqrestore(&info->slock, flags);
1352
1353 set_current_state(TASK_INTERRUPTIBLE);
8ea2c2ec
JJ		 1354 if (((arg & TIOCM_RNG) &&
1355 (cnow.rng != cprev.rng)) ||
1356 ((arg & TIOCM_DSR) &&
1357 (cnow.dsr != cprev.dsr)) ||
1358 ((arg & TIOCM_CD) &&
1359 (cnow.dcd != cprev.dcd)) ||
1360 ((arg & TIOCM_CTS) &&
1361 (cnow.cts != cprev.cts))) {
1da177e4
LT		 1362 ret = 0;
1363 break;
1364 }
1365 /* see if a signal did it */
1366 if (signal_pending(current)) {
1367 ret = -ERESTARTSYS;
1368 break;
1369 }
1370 cprev = cnow;
1371 }
1372 current->state = TASK_RUNNING;
1373 remove_wait_queue(&info->delta_msr_wait, &wait);
1374 break;
1375 }
1376 /* NOTREACHED */
1377 /*
1378 * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
1379 * Return: write counters to the user passed counter struct
1380 * NB: both 1->0 and 0->1 transitions are counted except for
1381 * RI where only 0->1 is counted.
1382 */
1383 case TIOCGICOUNT:
1384 spin_lock_irqsave(&info->slock, flags);
1385 cnow = info->icount;
1386 spin_unlock_irqrestore(&info->slock, flags);
1387 p_cuser = argp;
1388 /* modified by casper 1/11/2000 */
1389 if (put_user(cnow.frame, &p_cuser->frame))
1390 return -EFAULT;
1391 if (put_user(cnow.brk, &p_cuser->brk))
1392 return -EFAULT;
1393 if (put_user(cnow.overrun, &p_cuser->overrun))
1394 return -EFAULT;
1395 if (put_user(cnow.buf_overrun, &p_cuser->buf_overrun))
1396 return -EFAULT;
1397 if (put_user(cnow.parity, &p_cuser->parity))
1398 return -EFAULT;
1399 if (put_user(cnow.rx, &p_cuser->rx))
1400 return -EFAULT;
1401 if (put_user(cnow.tx, &p_cuser->tx))
1402 return -EFAULT;
1403 put_user(cnow.cts, &p_cuser->cts);
1404 put_user(cnow.dsr, &p_cuser->dsr);
1405 put_user(cnow.rng, &p_cuser->rng);
1406 put_user(cnow.dcd, &p_cuser->dcd);
1da177e4
LT		 1407 return 0;
1408 case MOXA_HighSpeedOn:
8ea2c2ec
JJ		 1409 return put_user(info->baud_base != 115200 ? 1 : 0, (int __user *)argp);
1410 case MOXA_SDS_RSTICOUNTER: {
1da177e4
LT		 1411 info->mon_data.rxcnt = 0;
1412 info->mon_data.txcnt = 0;
1413 return 0;
1414 }
8ea2c2ec 1415/* (above) added by James. */
1da177e4
LT		 1416 case MOXA_ASPP_SETBAUD:{
1417 long baud;
8ea2c2ec 1418 if (get_user(baud, (long __user *)argp))
1da177e4
LT		 1419 return -EFAULT;
1420 mxser_set_baud(info, baud);
1421 return 0;
1422 }
1423 case MOXA_ASPP_GETBAUD:
1424 if (copy_to_user(argp, &info->realbaud, sizeof(long)))
1425 return -EFAULT;
1426
1427 return 0;
1428
1429 case MOXA_ASPP_OQUEUE:{
1430 int len, lsr;
1431
1432 len = mxser_chars_in_buffer(tty);
1433
1434 lsr = inb(info->base + UART_LSR) & UART_LSR_TEMT;
1435
1436 len += (lsr ? 0 : 1);
1437
1438 if (copy_to_user(argp, &len, sizeof(int)))
1439 return -EFAULT;
1440
1441 return 0;
1442 }
8ea2c2ec 1443 case MOXA_ASPP_MON: {
1da177e4 1444 int mcr, status;
8ea2c2ec
JJ		 1445
1446 /* info->mon_data.ser_param = tty->termios->c_cflag; */
1da177e4
LT		 1447
1448 status = mxser_get_msr(info->base, 1, info->port, info);
1449 mxser_check_modem_status(info, status);
1450
1451 mcr = inb(info->base + UART_MCR);
1452 if (mcr & MOXA_MUST_MCR_XON_FLAG)
1453 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFHOLD;
1454 else
1455 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFHOLD;
1456
1457 if (mcr & MOXA_MUST_MCR_TX_XON)
1458 info->mon_data.hold_reason &= ~NPPI_NOTIFY_XOFFXENT;
1459 else
1460 info->mon_data.hold_reason |= NPPI_NOTIFY_XOFFXENT;
1461
1462 if (info->tty->hw_stopped)
1463 info->mon_data.hold_reason |= NPPI_NOTIFY_CTSHOLD;
1464 else
1465 info->mon_data.hold_reason &= ~NPPI_NOTIFY_CTSHOLD;
1466
8ea2c2ec
JJ		 1467 if (copy_to_user(argp, &info->mon_data,
1468 sizeof(struct mxser_mon)))
1da177e4
LT		 1469 return -EFAULT;
1470
1471 return 0;
1da177e4
LT		 1472 }
1473
8ea2c2ec
JJ		 1474 case MOXA_ASPP_LSTATUS: {
1475 if (copy_to_user(argp, &info->err_shadow,
1476 sizeof(unsigned char)))
1da177e4
LT		 1477 return -EFAULT;
1478
1479 info->err_shadow = 0;
1480 return 0;
1da177e4 1481 }
8ea2c2ec 1482 case MOXA_SET_BAUD_METHOD: {
1da177e4 1483 int method;
8ea2c2ec
JJ		 1484
1485 if (get_user(method, (int __user *)argp))
1da177e4
LT		 1486 return -EFAULT;
1487 mxser_set_baud_method[info->port] = method;
1488 if (copy_to_user(argp, &method, sizeof(int)))
1489 return -EFAULT;
1490
1491 return 0;
1492 }
1493 default:
1494 return -ENOIOCTLCMD;
1495 }
1496 return 0;
1497}
1498
1499#ifndef CMSPAR
1500#define CMSPAR 010000000000
1501#endif
1502
1503static int mxser_ioctl_special(unsigned int cmd, void __user *argp)
1504{
1505 int i, result, status;
1506
1507 switch (cmd) {
1508 case MOXA_GET_CONF:
8ea2c2ec
JJ		 1509 if (copy_to_user(argp, mxsercfg,
1510 sizeof(struct mxser_hwconf) * 4))
1da177e4
LT		 1511 return -EFAULT;
1512 return 0;
1513 case MOXA_GET_MAJOR:
1514 if (copy_to_user(argp, &ttymajor, sizeof(int)))
1515 return -EFAULT;
1516 return 0;
1517
1518 case MOXA_GET_CUMAJOR:
1519 if (copy_to_user(argp, &calloutmajor, sizeof(int)))
1520 return -EFAULT;
1521 return 0;
1522
1523 case MOXA_CHKPORTENABLE:
1524 result = 0;
1525 for (i = 0; i < MXSER_PORTS; i++) {
1526 if (mxvar_table[i].base)
1527 result |= (1 << i);
1528 }
8ea2c2ec 1529 return put_user(result, (unsigned long __user *)argp);
1da177e4
LT		 1530 case MOXA_GETDATACOUNT:
1531 if (copy_to_user(argp, &mxvar_log, sizeof(mxvar_log)))
1532 return -EFAULT;
8ea2c2ec 1533 return 0;
1da177e4
LT		 1534 case MOXA_GETMSTATUS:
1535 for (i = 0; i < MXSER_PORTS; i++) {
1536 GMStatus[i].ri = 0;
1537 if (!mxvar_table[i].base) {
1538 GMStatus[i].dcd = 0;
1539 GMStatus[i].dsr = 0;
1540 GMStatus[i].cts = 0;
1541 continue;
1542 }
1543
1544 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios)
1545 GMStatus[i].cflag = mxvar_table[i].normal_termios.c_cflag;
1546 else
1547 GMStatus[i].cflag = mxvar_table[i].tty->termios->c_cflag;
1548
1549 status = inb(mxvar_table[i].base + UART_MSR);
1550 if (status & 0x80 /*UART_MSR_DCD */ )
1551 GMStatus[i].dcd = 1;
1552 else
1553 GMStatus[i].dcd = 0;
1554
1555 if (status & 0x20 /*UART_MSR_DSR */ )
1556 GMStatus[i].dsr = 1;
1557 else
1558 GMStatus[i].dsr = 0;
1559
1560
1561 if (status & 0x10 /*UART_MSR_CTS */ )
1562 GMStatus[i].cts = 1;
1563 else
1564 GMStatus[i].cts = 0;
1565 }
8ea2c2ec
JJ		 1566 if (copy_to_user(argp, GMStatus,
1567 sizeof(struct mxser_mstatus) * MXSER_PORTS))
1da177e4
LT		 1568 return -EFAULT;
1569 return 0;
8ea2c2ec 1570 case MOXA_ASPP_MON_EXT: {
1da177e4
LT		 1571 int status;
1572 int opmode, p;
1573 int shiftbit;
1574 unsigned cflag, iflag;
1575
1576 for (i = 0; i < MXSER_PORTS; i++) {
1da177e4
LT		 1577 if (!mxvar_table[i].base)
1578 continue;
1579
8ea2c2ec
JJ		 1580 status = mxser_get_msr(mxvar_table[i].base, 0,
1581 i, &(mxvar_table[i]));
1582 /*
1583 mxser_check_modem_status(&mxvar_table[i],
1584 status);
1585 */
1da177e4
LT		 1586 if (status & UART_MSR_TERI)
1587 mxvar_table[i].icount.rng++;
1588 if (status & UART_MSR_DDSR)
1589 mxvar_table[i].icount.dsr++;
1590 if (status & UART_MSR_DDCD)
1591 mxvar_table[i].icount.dcd++;
1592 if (status & UART_MSR_DCTS)
1593 mxvar_table[i].icount.cts++;
1594
1595 mxvar_table[i].mon_data.modem_status = status;
1596 mon_data_ext.rx_cnt[i] = mxvar_table[i].mon_data.rxcnt;
1597 mon_data_ext.tx_cnt[i] = mxvar_table[i].mon_data.txcnt;
1598 mon_data_ext.up_rxcnt[i] = mxvar_table[i].mon_data.up_rxcnt;
1599 mon_data_ext.up_txcnt[i] = mxvar_table[i].mon_data.up_txcnt;
1600 mon_data_ext.modem_status[i] = mxvar_table[i].mon_data.modem_status;
1601 mon_data_ext.baudrate[i] = mxvar_table[i].realbaud;
1602
1603 if (!mxvar_table[i].tty || !mxvar_table[i].tty->termios) {
1604 cflag = mxvar_table[i].normal_termios.c_cflag;
1605 iflag = mxvar_table[i].normal_termios.c_iflag;
1606 } else {
1607 cflag = mxvar_table[i].tty->termios->c_cflag;
1608 iflag = mxvar_table[i].tty->termios->c_iflag;
1609 }
1610
1611 mon_data_ext.databits[i] = cflag & CSIZE;
1612
1613 mon_data_ext.stopbits[i] = cflag & CSTOPB;
1614
1615 mon_data_ext.parity[i] = cflag & (PARENB | PARODD | CMSPAR);
1616
1617 mon_data_ext.flowctrl[i] = 0x00;
1618
1619 if (cflag & CRTSCTS)
1620 mon_data_ext.flowctrl[i] |= 0x03;
1621
1622 if (iflag & (IXON | IXOFF))
1623 mon_data_ext.flowctrl[i] |= 0x0C;
1624
1625 if (mxvar_table[i].type == PORT_16550A)
1626 mon_data_ext.fifo[i] = 1;
1627 else
1628 mon_data_ext.fifo[i] = 0;
1629
1630 p = i % 4;
1631 shiftbit = p * 2;
1632 opmode = inb(mxvar_table[i].opmode_ioaddr) >> shiftbit;
1633 opmode &= OP_MODE_MASK;
1634
1635 mon_data_ext.iftype[i] = opmode;
1636
1637 }
1638 if (copy_to_user(argp, &mon_data_ext, sizeof(struct mxser_mon_ext)))
1639 return -EFAULT;
1640
1641 return 0;
1642
1643 }
1644 default:
1645 return -ENOIOCTLCMD;
1646 }
1647 return 0;
1648}
1649
1da177e4
LT		 1650static void mxser_stoprx(struct tty_struct *tty)
1651{
56e139f6 1652 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1653 /* unsigned long flags; */
1da177e4
LT		 1654
1655 info->ldisc_stop_rx = 1;
1656 if (I_IXOFF(tty)) {
8ea2c2ec
JJ		 1657 /* MX_LOCK(&info->slock); */
1658 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1659 if (info->IsMoxaMustChipFlag) {
1660 info->IER &= ~MOXA_MUST_RECV_ISR;
1661 outb(info->IER, info->base + UART_IER);
1662 } else {
8ea2c2ec 1663 /* above add by Victor Yu. 09-02-2002 */
1da177e4 1664 info->x_char = STOP_CHAR(tty);
8ea2c2ec
JJ		 1665 /* mask by Victor Yu. 09-02-2002 */
1666 /* outb(info->IER, 0); */
1da177e4
LT		 1667 outb(0, info->base + UART_IER);
1668 info->IER |= UART_IER_THRI;
8ea2c2ec
JJ		 1669 /* force Tx interrupt */
1670 outb(info->IER, info->base + UART_IER);
1671 } /* add by Victor Yu. 09-02-2002 */
1672 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1673 }
1674
1675 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1676 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1677 info->MCR &= ~UART_MCR_RTS;
1678 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1679 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1680 }
1681}
1682
1683static void mxser_startrx(struct tty_struct *tty)
1684{
56e139f6 1685 struct mxser_struct *info = tty->driver_data;
8ea2c2ec 1686 /* unsigned long flags; */
1da177e4
LT		 1687
1688 info->ldisc_stop_rx = 0;
1689 if (I_IXOFF(tty)) {
1690 if (info->x_char)
1691 info->x_char = 0;
1692 else {
8ea2c2ec 1693 /* MX_LOCK(&info->slock); */
1da177e4 1694
8ea2c2ec 1695 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1696 if (info->IsMoxaMustChipFlag) {
1697 info->IER |= MOXA_MUST_RECV_ISR;
1698 outb(info->IER, info->base + UART_IER);
1699 } else {
8ea2c2ec 1700 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1701
1702 info->x_char = START_CHAR(tty);
8ea2c2ec
JJ		 1703 /* mask by Victor Yu. 09-02-2002 */
1704 /* outb(info->IER, 0); */
1705 /* add by Victor Yu. 09-02-2002 */
1706 outb(0, info->base + UART_IER);
1707 /* force Tx interrupt */
1708 info->IER |= UART_IER_THRI;
1da177e4 1709 outb(info->IER, info->base + UART_IER);
8ea2c2ec
JJ		 1710 } /* add by Victor Yu. 09-02-2002 */
1711 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1712 }
1713 }
1714
1715 if (info->tty->termios->c_cflag & CRTSCTS) {
8ea2c2ec 1716 /* MX_LOCK(&info->slock); */
1da177e4
LT		 1717 info->MCR |= UART_MCR_RTS;
1718 outb(info->MCR, info->base + UART_MCR);
8ea2c2ec 1719 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1720 }
1721}
1722
1723/*
1724 * This routine is called by the upper-layer tty layer to signal that
1725 * incoming characters should be throttled.
1726 */
1727static void mxser_throttle(struct tty_struct *tty)
1728{
8ea2c2ec
JJ		 1729 /* struct mxser_struct *info = tty->driver_data; */
1730 /* unsigned long flags; */
1731
1732 /* MX_LOCK(&info->slock); */
1da177e4 1733 mxser_stoprx(tty);
8ea2c2ec 1734 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1735}
1736
1737static void mxser_unthrottle(struct tty_struct *tty)
1738{
8ea2c2ec
JJ		 1739 /* struct mxser_struct *info = tty->driver_data; */
1740 /* unsigned long flags; */
1741
1742 /* MX_LOCK(&info->slock); */
1da177e4 1743 mxser_startrx(tty);
8ea2c2ec 1744 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 1745}
1746
1747static void mxser_set_termios(struct tty_struct *tty, struct termios *old_termios)
1748{
56e139f6 1749 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1750 unsigned long flags;
1751
8ea2c2ec
JJ		 1752 if ((tty->termios->c_cflag != old_termios->c_cflag) ||
1753 (RELEVANT_IFLAG(tty->termios->c_iflag) != RELEVANT_IFLAG(old_termios->c_iflag))) {
1da177e4
LT		 1754
1755 mxser_change_speed(info, old_termios);
1756
8ea2c2ec
JJ		 1757 if ((old_termios->c_cflag & CRTSCTS) &&
1758 !(tty->termios->c_cflag & CRTSCTS)) {
1da177e4
LT		 1759 tty->hw_stopped = 0;
1760 mxser_start(tty);
1761 }
1762 }
1763
1764/* Handle sw stopped */
8ea2c2ec
JJ		 1765 if ((old_termios->c_iflag & IXON) &&
1766 !(tty->termios->c_iflag & IXON)) {
1da177e4
LT		 1767 tty->stopped = 0;
1768
8ea2c2ec 1769 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1770 if (info->IsMoxaMustChipFlag) {
1771 spin_lock_irqsave(&info->slock, flags);
1772 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
1773 spin_unlock_irqrestore(&info->slock, flags);
1774 }
8ea2c2ec 1775 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1776
1777 mxser_start(tty);
1778 }
1779}
1780
1781/*
1782 * mxser_stop() and mxser_start()
1783 *
1784 * This routines are called before setting or resetting tty->stopped.
1785 * They enable or disable transmitter interrupts, as necessary.
1786 */
1787static void mxser_stop(struct tty_struct *tty)
1788{
56e139f6 1789 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1790 unsigned long flags;
1791
1792 spin_lock_irqsave(&info->slock, flags);
1793 if (info->IER & UART_IER_THRI) {
1794 info->IER &= ~UART_IER_THRI;
1795 outb(info->IER, info->base + UART_IER);
1796 }
1797 spin_unlock_irqrestore(&info->slock, flags);
1798}
1799
1800static void mxser_start(struct tty_struct *tty)
1801{
56e139f6 1802 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1803 unsigned long flags;
1804
1805 spin_lock_irqsave(&info->slock, flags);
1806 if (info->xmit_cnt && info->xmit_buf && !(info->IER & UART_IER_THRI)) {
1807 info->IER |= UART_IER_THRI;
1808 outb(info->IER, info->base + UART_IER);
1809 }
1810 spin_unlock_irqrestore(&info->slock, flags);
1811}
1812
1813/*
1814 * mxser_wait_until_sent() --- wait until the transmitter is empty
1815 */
1816static void mxser_wait_until_sent(struct tty_struct *tty, int timeout)
1817{
56e139f6 1818 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1819 unsigned long orig_jiffies, char_time;
1820 int lsr;
1821
1822 if (info->type == PORT_UNKNOWN)
1823 return;
1824
1825 if (info->xmit_fifo_size == 0)
1826 return; /* Just in case.... */
1827
1828 orig_jiffies = jiffies;
1829 /*
1830 * Set the check interval to be 1/5 of the estimated time to
1831 * send a single character, and make it at least 1. The check
1832 * interval should also be less than the timeout.
1833 *
1834 * Note: we have to use pretty tight timings here to satisfy
1835 * the NIST-PCTS.
1836 */
1837 char_time = (info->timeout - HZ / 50) / info->xmit_fifo_size;
1838 char_time = char_time / 5;
1839 if (char_time == 0)
1840 char_time = 1;
1841 if (timeout && timeout < char_time)
1842 char_time = timeout;
1843 /*
1844 * If the transmitter hasn't cleared in twice the approximate
1845 * amount of time to send the entire FIFO, it probably won't
1846 * ever clear. This assumes the UART isn't doing flow
1847 * control, which is currently the case. Hence, if it ever
1848 * takes longer than info->timeout, this is probably due to a
1849 * UART bug of some kind. So, we clamp the timeout parameter at
1850 * 2*info->timeout.
1851 */
1852 if (!timeout || timeout > 2 * info->timeout)
1853 timeout = 2 * info->timeout;
1854#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
8ea2c2ec
JJ		 1855 printk(KERN_DEBUG "In rs_wait_until_sent(%d) check=%lu...",
1856 timeout, char_time);
1da177e4
LT		 1857 printk("jiff=%lu...", jiffies);
1858#endif
1859 while (!((lsr = inb(info->base + UART_LSR)) & UART_LSR_TEMT)) {
1860#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1861 printk("lsr = %d (jiff=%lu)...", lsr, jiffies);
1862#endif
da4cd8df 1863 schedule_timeout_interruptible(char_time);
1da177e4
LT		 1864 if (signal_pending(current))
1865 break;
1866 if (timeout && time_after(jiffies, orig_jiffies + timeout))
1867 break;
1868 }
1869 set_current_state(TASK_RUNNING);
1870
1871#ifdef SERIAL_DEBUG_RS_WAIT_UNTIL_SENT
1872 printk("lsr = %d (jiff=%lu)...done\n", lsr, jiffies);
1873#endif
1874}
1875
1876
1877/*
1878 * This routine is called by tty_hangup() when a hangup is signaled.
1879 */
1880void mxser_hangup(struct tty_struct *tty)
1881{
56e139f6 1882 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1883
1884 mxser_flush_buffer(tty);
1885 mxser_shutdown(info);
1886 info->event = 0;
1887 info->count = 0;
1888 info->flags &= ~ASYNC_NORMAL_ACTIVE;
1889 info->tty = NULL;
1890 wake_up_interruptible(&info->open_wait);
1891}
1892
1893
8ea2c2ec 1894/* added by James 03-12-2004. */
1da177e4
LT		 1895/*
1896 * mxser_rs_break() --- routine which turns the break handling on or off
1897 */
1898static void mxser_rs_break(struct tty_struct *tty, int break_state)
1899{
56e139f6 1900 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 1901 unsigned long flags;
1902
1903 spin_lock_irqsave(&info->slock, flags);
1904 if (break_state == -1)
8ea2c2ec
JJ		 1905 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
1906 info->base + UART_LCR);
1da177e4 1907 else
8ea2c2ec
JJ		 1908 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
1909 info->base + UART_LCR);
1da177e4
LT		 1910 spin_unlock_irqrestore(&info->slock, flags);
1911}
1912
8ea2c2ec 1913/* (above) added by James. */
1da177e4
LT		 1914
1915
1916/*
1917 * This is the serial driver's generic interrupt routine
1918 */
1919static irqreturn_t mxser_interrupt(int irq, void *dev_id, struct pt_regs *regs)
1920{
1921 int status, iir, i;
1922 struct mxser_struct *info;
1923 struct mxser_struct *port;
1924 int max, irqbits, bits, msr;
1925 int pass_counter = 0;
1926 int handled = IRQ_NONE;
1927
1928 port = NULL;
8ea2c2ec 1929 /* spin_lock(&gm_lock); */
1da177e4
LT		 1930
1931 for (i = 0; i < MXSER_BOARDS; i++) {
1932 if (dev_id == &(mxvar_table[i * MXSER_PORTS_PER_BOARD])) {
1933 port = dev_id;
1934 break;
1935 }
1936 }
1937
8ea2c2ec 1938 if (i == MXSER_BOARDS)
1da177e4 1939 goto irq_stop;
8ea2c2ec 1940 if (port == 0)
1da177e4 1941 goto irq_stop;
1da177e4
LT		 1942 max = mxser_numports[mxsercfg[i].board_type - 1];
1943 while (1) {
1944 irqbits = inb(port->vector) & port->vectormask;
8ea2c2ec 1945 if (irqbits == port->vectormask)
1da177e4 1946 break;
1da177e4
LT		 1947
1948 handled = IRQ_HANDLED;
1949 for (i = 0, bits = 1; i < max; i++, irqbits |= bits, bits <<= 1) {
8ea2c2ec 1950 if (irqbits == port->vectormask)
1da177e4 1951 break;
1da177e4
LT		 1952 if (bits & irqbits)
1953 continue;
1954 info = port + i;
1955
8ea2c2ec 1956 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 1957 iir = inb(info->base + UART_IIR);
1958 if (iir & UART_IIR_NO_INT)
1959 continue;
1960 iir &= MOXA_MUST_IIR_MASK;
1961 if (!info->tty) {
1962 status = inb(info->base + UART_LSR);
1963 outb(0x27, info->base + UART_FCR);
1964 inb(info->base + UART_MSR);
1965 continue;
1966 }
8ea2c2ec 1967 /* above add by Victor Yu. 09-13-2002 */
1da177e4 1968 /*
8ea2c2ec 1969 if (info->tty->flip.count < TTY_FLIPBUF_SIZE / 4) {
1da177e4
LT		 1970 info->IER |= MOXA_MUST_RECV_ISR;
1971 outb(info->IER, info->base + UART_IER);
1972 }
1973 */
1974
1975
1976 /* mask by Victor Yu. 09-13-2002
1977 if ( !info->tty ||
1978 (inb(info->base + UART_IIR) & UART_IIR_NO_INT) )
1979 continue;
1980 */
1981 /* mask by Victor Yu. 09-02-2002
1982 status = inb(info->base + UART_LSR) & info->read_status_mask;
1983 */
1984
8ea2c2ec 1985 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 1986 status = inb(info->base + UART_LSR);
1987
8ea2c2ec 1988 if (status & UART_LSR_PE)
1da177e4 1989 info->err_shadow |= NPPI_NOTIFY_PARITY;
8ea2c2ec 1990 if (status & UART_LSR_FE)
1da177e4 1991 info->err_shadow |= NPPI_NOTIFY_FRAMING;
8ea2c2ec 1992 if (status & UART_LSR_OE)
1da177e4 1993 info->err_shadow |= NPPI_NOTIFY_HW_OVERRUN;
1da177e4
LT		 1994 if (status & UART_LSR_BI)
1995 info->err_shadow |= NPPI_NOTIFY_BREAK;
1996
1997 if (info->IsMoxaMustChipFlag) {
1998 /*
1999 if ( (status & 0x02) && !(status & 0x01) ) {
2000 outb(info->base+UART_FCR, 0x23);
2001 continue;
2002 }
2003 */
8ea2c2ec
JJ		 2004 if (iir == MOXA_MUST_IIR_GDA ||
2005 iir == MOXA_MUST_IIR_RDA ||
2006 iir == MOXA_MUST_IIR_RTO ||
2007 iir == MOXA_MUST_IIR_LSR)
1da177e4
LT		 2008 mxser_receive_chars(info, &status);
2009
2010 } else {
8ea2c2ec 2011 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2012
2013 status &= info->read_status_mask;
2014 if (status & UART_LSR_DR)
2015 mxser_receive_chars(info, &status);
2016 }
2017 msr = inb(info->base + UART_MSR);
2018 if (msr & UART_MSR_ANY_DELTA) {
2019 mxser_check_modem_status(info, msr);
2020 }
8ea2c2ec 2021 /* following add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2022 if (info->IsMoxaMustChipFlag) {
2023 if ((iir == 0x02) && (status & UART_LSR_THRE)) {
2024 mxser_transmit_chars(info);
2025 }
2026 } else {
8ea2c2ec 2027 /* above add by Victor Yu. 09-13-2002 */
1da177e4
LT		 2028
2029 if (status & UART_LSR_THRE) {
2030/* 8-2-99 by William
2031 if ( info->x_char || (info->xmit_cnt > 0) )
2032*/
2033 mxser_transmit_chars(info);
2034 }
2035 }
2036 }
2037 if (pass_counter++ > MXSER_ISR_PASS_LIMIT) {
2038 break; /* Prevent infinite loops */
2039 }
2040 }
2041
2042 irq_stop:
8ea2c2ec 2043 /* spin_unlock(&gm_lock); */
1da177e4
LT		 2044 return handled;
2045}
2046
2047static void mxser_receive_chars(struct mxser_struct *info, int *status)
2048{
2049 struct tty_struct *tty = info->tty;
2050 unsigned char ch, gdl;
2051 int ignored = 0;
2052 int cnt = 0;
1da177e4
LT		 2053 int recv_room;
2054 int max = 256;
2055 unsigned long flags;
2056
2057 spin_lock_irqsave(&info->slock, flags);
2058
33f0f88f 2059 recv_room = tty->receive_room;
1da177e4 2060 if ((recv_room == 0) && (!info->ldisc_stop_rx)) {
8ea2c2ec 2061 /* mxser_throttle(tty); */
1da177e4 2062 mxser_stoprx(tty);
8ea2c2ec 2063 /* return; */
1da177e4
LT		 2064 }
2065
8ea2c2ec 2066 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2067 if (info->IsMoxaMustChipFlag != MOXA_OTHER_UART) {
2068
2069 if (*status & UART_LSR_SPECIAL) {
2070 goto intr_old;
2071 }
8ea2c2ec
JJ		 2072 /* following add by Victor Yu. 02-11-2004 */
2073 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU860_HWID &&
2074 (*status & MOXA_MUST_LSR_RERR))
1da177e4 2075 goto intr_old;
8ea2c2ec 2076 /* above add by Victor Yu. 02-14-2004 */
1da177e4
LT		 2077 if (*status & MOXA_MUST_LSR_RERR)
2078 goto intr_old;
2079
2080 gdl = inb(info->base + MOXA_MUST_GDL_REGISTER);
2081
8ea2c2ec
JJ		 2082 /* add by Victor Yu. 02-11-2004 */
2083 if (info->IsMoxaMustChipFlag == MOXA_MUST_MU150_HWID)
1da177e4
LT		 2084 gdl &= MOXA_MUST_GDL_MASK;
2085 if (gdl >= recv_room) {
2086 if (!info->ldisc_stop_rx) {
8ea2c2ec 2087 /* mxser_throttle(tty); */
1da177e4
LT		 2088 mxser_stoprx(tty);
2089 }
8ea2c2ec 2090 /* return; */
1da177e4
LT		 2091 }
2092 while (gdl--) {
2093 ch = inb(info->base + UART_RX);
3399ba5b 2094 tty_insert_flip_char(tty, ch, 0);
1da177e4
LT		 2095 cnt++;
2096 /*
8ea2c2ec 2097 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4 2098 mxser_stoprx(tty);
8ea2c2ec 2099 info->stop_rx = 1;
1da177e4
LT		 2100 break;
2101 } */
2102 }
2103 goto end_intr;
2104 }
8ea2c2ec
JJ		 2105 intr_old:
2106 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2107
2108 do {
2109 if (max-- < 0)
2110 break;
2111 /*
8ea2c2ec 2112 if ((cnt >= HI_WATER) && (info->stop_rx == 0)) {
1da177e4
LT		 2113 mxser_stoprx(tty);
2114 info->stop_rx=1;
2115 break;
2116 }
2117 */
2118
2119 ch = inb(info->base + UART_RX);
8ea2c2ec 2120 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2121 if (info->IsMoxaMustChipFlag && (*status & UART_LSR_OE) /*&& !(*status&UART_LSR_DR) */ )
2122 outb(0x23, info->base + UART_FCR);
2123 *status &= info->read_status_mask;
8ea2c2ec 2124 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2125 if (*status & info->ignore_status_mask) {
2126 if (++ignored > 100)
2127 break;
2128 } else {
3399ba5b 2129 char flag = 0;
1da177e4
LT		 2130 if (*status & UART_LSR_SPECIAL) {
2131 if (*status & UART_LSR_BI) {
3399ba5b 2132 flag = TTY_BREAK;
1da177e4
LT		 2133/* added by casper 1/11/2000 */
2134 info->icount.brk++;
1da177e4
LT		 2135/* */
2136 if (info->flags & ASYNC_SAK)
2137 do_SAK(tty);
2138 } else if (*status & UART_LSR_PE) {
3399ba5b 2139 flag = TTY_PARITY;
1da177e4
LT		 2140/* added by casper 1/11/2000 */
2141 info->icount.parity++;
2142/* */
2143 } else if (*status & UART_LSR_FE) {
3399ba5b 2144 flag = TTY_FRAME;
1da177e4
LT		 2145/* added by casper 1/11/2000 */
2146 info->icount.frame++;
2147/* */
2148 } else if (*status & UART_LSR_OE) {
3399ba5b 2149 flag = TTY_OVERRUN;
1da177e4
LT		 2150/* added by casper 1/11/2000 */
2151 info->icount.overrun++;
2152/* */
3399ba5b
DV		 2153 }
2154 }
2155 tty_insert_flip_char(tty, ch, flag);
1da177e4
LT		 2156 cnt++;
2157 if (cnt >= recv_room) {
2158 if (!info->ldisc_stop_rx) {
8ea2c2ec 2159 /* mxser_throttle(tty); */
1da177e4
LT		 2160 mxser_stoprx(tty);
2161 }
2162 break;
2163 }
2164
2165 }
2166
8ea2c2ec 2167 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2168 if (info->IsMoxaMustChipFlag)
2169 break;
8ea2c2ec 2170 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2171
2172 /* mask by Victor Yu. 09-02-2002
2173 *status = inb(info->base + UART_LSR) & info->read_status_mask;
2174 */
8ea2c2ec 2175 /* following add by Victor Yu. 09-02-2002 */
1da177e4 2176 *status = inb(info->base + UART_LSR);
8ea2c2ec 2177 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2178 } while (*status & UART_LSR_DR);
2179
8ea2c2ec 2180end_intr: /* add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2181 mxvar_log.rxcnt[info->port] += cnt;
2182 info->mon_data.rxcnt += cnt;
2183 info->mon_data.up_rxcnt += cnt;
2184 spin_unlock_irqrestore(&info->slock, flags);
3399ba5b 2185
1da177e4
LT		 2186 tty_flip_buffer_push(tty);
2187}
2188
2189static void mxser_transmit_chars(struct mxser_struct *info)
2190{
2191 int count, cnt;
2192 unsigned long flags;
2193
2194 spin_lock_irqsave(&info->slock, flags);
2195
2196 if (info->x_char) {
2197 outb(info->x_char, info->base + UART_TX);
2198 info->x_char = 0;
2199 mxvar_log.txcnt[info->port]++;
2200 info->mon_data.txcnt++;
2201 info->mon_data.up_txcnt++;
2202
2203/* added by casper 1/11/2000 */
2204 info->icount.tx++;
2205/* */
2206 spin_unlock_irqrestore(&info->slock, flags);
2207 return;
2208 }
2209
2210 if (info->xmit_buf == 0) {
2211 spin_unlock_irqrestore(&info->slock, flags);
2212 return;
2213 }
2214
8ea2c2ec
JJ		 2215 if ((info->xmit_cnt <= 0) || info->tty->stopped ||
2216 (info->tty->hw_stopped &&
2217 (info->type != PORT_16550A) &&
2218 (!info->IsMoxaMustChipFlag))) {
1da177e4
LT		 2219 info->IER &= ~UART_IER_THRI;
2220 outb(info->IER, info->base + UART_IER);
2221 spin_unlock_irqrestore(&info->slock, flags);
2222 return;
2223 }
2224
2225 cnt = info->xmit_cnt;
2226 count = info->xmit_fifo_size;
2227 do {
8ea2c2ec
JJ		 2228 outb(info->xmit_buf[info->xmit_tail++],
2229 info->base + UART_TX);
1da177e4
LT		 2230 info->xmit_tail = info->xmit_tail & (SERIAL_XMIT_SIZE - 1);
2231 if (--info->xmit_cnt <= 0)
2232 break;
2233 } while (--count > 0);
2234 mxvar_log.txcnt[info->port] += (cnt - info->xmit_cnt);
2235
8ea2c2ec 2236/* added by James 03-12-2004. */
1da177e4
LT		 2237 info->mon_data.txcnt += (cnt - info->xmit_cnt);
2238 info->mon_data.up_txcnt += (cnt - info->xmit_cnt);
8ea2c2ec 2239/* (above) added by James. */
1da177e4
LT		 2240
2241/* added by casper 1/11/2000 */
2242 info->icount.tx += (cnt - info->xmit_cnt);
2243/* */
2244
2245 if (info->xmit_cnt < WAKEUP_CHARS) {
2246 set_bit(MXSER_EVENT_TXLOW, &info->event);
2247 schedule_work(&info->tqueue);
2248 }
2249 if (info->xmit_cnt <= 0) {
2250 info->IER &= ~UART_IER_THRI;
2251 outb(info->IER, info->base + UART_IER);
2252 }
2253 spin_unlock_irqrestore(&info->slock, flags);
2254}
2255
2256static void mxser_check_modem_status(struct mxser_struct *info, int status)
2257{
2258 /* update input line counters */
2259 if (status & UART_MSR_TERI)
2260 info->icount.rng++;
2261 if (status & UART_MSR_DDSR)
2262 info->icount.dsr++;
2263 if (status & UART_MSR_DDCD)
2264 info->icount.dcd++;
2265 if (status & UART_MSR_DCTS)
2266 info->icount.cts++;
2267 info->mon_data.modem_status = status;
2268 wake_up_interruptible(&info->delta_msr_wait);
2269
1da177e4
LT		 2270 if ((info->flags & ASYNC_CHECK_CD) && (status & UART_MSR_DDCD)) {
2271 if (status & UART_MSR_DCD)
2272 wake_up_interruptible(&info->open_wait);
2273 schedule_work(&info->tqueue);
2274 }
2275
2276 if (info->flags & ASYNC_CTS_FLOW) {
2277 if (info->tty->hw_stopped) {
2278 if (status & UART_MSR_CTS) {
2279 info->tty->hw_stopped = 0;
2280
8ea2c2ec
JJ		 2281 if ((info->type != PORT_16550A) &&
2282 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2283 info->IER |= UART_IER_THRI;
2284 outb(info->IER, info->base + UART_IER);
2285 }
2286 set_bit(MXSER_EVENT_TXLOW, &info->event);
2287 schedule_work(&info->tqueue); }
2288 } else {
2289 if (!(status & UART_MSR_CTS)) {
2290 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2291 if ((info->type != PORT_16550A) &&
2292 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2293 info->IER &= ~UART_IER_THRI;
2294 outb(info->IER, info->base + UART_IER);
2295 }
2296 }
2297 }
2298 }
2299}
2300
2301static int mxser_block_til_ready(struct tty_struct *tty, struct file *filp, struct mxser_struct *info)
2302{
2303 DECLARE_WAITQUEUE(wait, current);
2304 int retval;
2305 int do_clocal = 0;
2306 unsigned long flags;
2307
2308 /*
2309 * If non-blocking mode is set, or the port is not enabled,
2310 * then make the check up front and then exit.
2311 */
2312 if ((filp->f_flags & O_NONBLOCK) || (tty->flags & (1 << TTY_IO_ERROR))) {
2313 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2314 return 0;
1da177e4
LT		 2315 }
2316
2317 if (tty->termios->c_cflag & CLOCAL)
2318 do_clocal = 1;
2319
2320 /*
2321 * Block waiting for the carrier detect and the line to become
2322 * free (i.e., not in use by the callout). While we are in
2323 * this loop, info->count is dropped by one, so that
2324 * mxser_close() knows when to free things. We restore it upon
2325 * exit, either normal or abnormal.
2326 */
2327 retval = 0;
2328 add_wait_queue(&info->open_wait, &wait);
2329
2330 spin_lock_irqsave(&info->slock, flags);
2331 if (!tty_hung_up_p(filp))
2332 info->count--;
2333 spin_unlock_irqrestore(&info->slock, flags);
2334 info->blocked_open++;
2335 while (1) {
2336 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2337 outb(inb(info->base + UART_MCR) |
2338 UART_MCR_DTR | UART_MCR_RTS, info->base + UART_MCR);
1da177e4
LT		 2339 spin_unlock_irqrestore(&info->slock, flags);
2340 set_current_state(TASK_INTERRUPTIBLE);
2341 if (tty_hung_up_p(filp) || !(info->flags & ASYNC_INITIALIZED)) {
2342 if (info->flags & ASYNC_HUP_NOTIFY)
2343 retval = -EAGAIN;
2344 else
2345 retval = -ERESTARTSYS;
2346 break;
2347 }
8ea2c2ec
JJ		 2348 if (!(info->flags & ASYNC_CLOSING) &&
2349 (do_clocal ||
2350 (inb(info->base + UART_MSR) & UART_MSR_DCD)))
1da177e4
LT		 2351 break;
2352 if (signal_pending(current)) {
2353 retval = -ERESTARTSYS;
2354 break;
2355 }
2356 schedule();
2357 }
2358 set_current_state(TASK_RUNNING);
2359 remove_wait_queue(&info->open_wait, &wait);
2360 if (!tty_hung_up_p(filp))
2361 info->count++;
2362 info->blocked_open--;
2363 if (retval)
8ea2c2ec 2364 return retval;
1da177e4 2365 info->flags |= ASYNC_NORMAL_ACTIVE;
8ea2c2ec 2366 return 0;
1da177e4
LT		 2367}
2368
2369static int mxser_startup(struct mxser_struct *info)
2370{
1da177e4
LT		 2371 unsigned long page;
2372 unsigned long flags;
2373
2374 page = __get_free_page(GFP_KERNEL);
2375 if (!page)
8ea2c2ec 2376 return -ENOMEM;
1da177e4
LT		 2377
2378 spin_lock_irqsave(&info->slock, flags);
2379
2380 if (info->flags & ASYNC_INITIALIZED) {
2381 free_page(page);
2382 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2383 return 0;
1da177e4
LT		 2384 }
2385
2386 if (!info->base || !info->type) {
2387 if (info->tty)
2388 set_bit(TTY_IO_ERROR, &info->tty->flags);
2389 free_page(page);
2390 spin_unlock_irqrestore(&info->slock, flags);
8ea2c2ec 2391 return 0;
1da177e4
LT		 2392 }
2393 if (info->xmit_buf)
2394 free_page(page);
2395 else
2396 info->xmit_buf = (unsigned char *) page;
2397
2398 /*
2399 * Clear the FIFO buffers and disable them
2400 * (they will be reenabled in mxser_change_speed())
2401 */
2402 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2403 outb((UART_FCR_CLEAR_RCVR |
2404 UART_FCR_CLEAR_XMIT |
2405 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2406 else
8ea2c2ec
JJ		 2407 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2408 info->base + UART_FCR);
1da177e4
LT		 2409
2410 /*
2411 * At this point there's no way the LSR could still be 0xFF;
2412 * if it is, then bail out, because there's likely no UART
2413 * here.
2414 */
2415 if (inb(info->base + UART_LSR) == 0xff) {
2416 spin_unlock_irqrestore(&info->slock, flags);
2417 if (capable(CAP_SYS_ADMIN)) {
2418 if (info->tty)
2419 set_bit(TTY_IO_ERROR, &info->tty->flags);
8ea2c2ec 2420 return 0;
1da177e4 2421 } else
8ea2c2ec 2422 return -ENODEV;
1da177e4
LT		 2423 }
2424
2425 /*
2426 * Clear the interrupt registers.
2427 */
2428 (void) inb(info->base + UART_LSR);
2429 (void) inb(info->base + UART_RX);
2430 (void) inb(info->base + UART_IIR);
2431 (void) inb(info->base + UART_MSR);
2432
2433 /*
2434 * Now, initialize the UART
2435 */
2436 outb(UART_LCR_WLEN8, info->base + UART_LCR); /* reset DLAB */
2437 info->MCR = UART_MCR_DTR | UART_MCR_RTS;
2438 outb(info->MCR, info->base + UART_MCR);
2439
2440 /*
2441 * Finally, enable interrupts
2442 */
2443 info->IER = UART_IER_MSI | UART_IER_RLSI | UART_IER_RDI;
8ea2c2ec 2444 /* info->IER = UART_IER_RLSI | UART_IER_RDI; */
1da177e4 2445
8ea2c2ec 2446 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2447 if (info->IsMoxaMustChipFlag)
2448 info->IER |= MOXA_MUST_IER_EGDAI;
8ea2c2ec 2449 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2450 outb(info->IER, info->base + UART_IER); /* enable interrupts */
2451
2452 /*
2453 * And clear the interrupt registers again for luck.
2454 */
2455 (void) inb(info->base + UART_LSR);
2456 (void) inb(info->base + UART_RX);
2457 (void) inb(info->base + UART_IIR);
2458 (void) inb(info->base + UART_MSR);
2459
2460 if (info->tty)
2461 clear_bit(TTY_IO_ERROR, &info->tty->flags);
2462 info->xmit_cnt = info->xmit_head = info->xmit_tail = 0;
2463
2464 /*
2465 * and set the speed of the serial port
2466 */
2467 spin_unlock_irqrestore(&info->slock, flags);
2468 mxser_change_speed(info, NULL);
2469
2470 info->flags |= ASYNC_INITIALIZED;
8ea2c2ec 2471 return 0;
1da177e4
LT		 2472}
2473
2474/*
2475 * This routine will shutdown a serial port; interrupts maybe disabled, and
2476 * DTR is dropped if the hangup on close termio flag is on.
2477 */
2478static void mxser_shutdown(struct mxser_struct *info)
2479{
2480 unsigned long flags;
2481
2482 if (!(info->flags & ASYNC_INITIALIZED))
2483 return;
2484
2485 spin_lock_irqsave(&info->slock, flags);
2486
2487 /*
2488 * clear delta_msr_wait queue to avoid mem leaks: we may free the irq
2489 * here so the queue might never be waken up
2490 */
2491 wake_up_interruptible(&info->delta_msr_wait);
2492
2493 /*
2494 * Free the IRQ, if necessary
2495 */
2496 if (info->xmit_buf) {
2497 free_page((unsigned long) info->xmit_buf);
2498 info->xmit_buf = NULL;
2499 }
2500
2501 info->IER = 0;
2502 outb(0x00, info->base + UART_IER);
2503
2504 if (!info->tty || (info->tty->termios->c_cflag & HUPCL))
2505 info->MCR &= ~(UART_MCR_DTR | UART_MCR_RTS);
2506 outb(info->MCR, info->base + UART_MCR);
2507
2508 /* clear Rx/Tx FIFO's */
8ea2c2ec 2509 /* following add by Victor Yu. 08-30-2002 */
1da177e4 2510 if (info->IsMoxaMustChipFlag)
8ea2c2ec
JJ		 2511 outb((UART_FCR_CLEAR_RCVR |
2512 UART_FCR_CLEAR_XMIT |
2513 MOXA_MUST_FCR_GDA_MODE_ENABLE), info->base + UART_FCR);
1da177e4 2514 else
8ea2c2ec
JJ		 2515 /* above add by Victor Yu. 08-30-2002 */
2516 outb((UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT),
2517 info->base + UART_FCR);
1da177e4
LT		 2518
2519 /* read data port to reset things */
2520 (void) inb(info->base + UART_RX);
2521
2522 if (info->tty)
2523 set_bit(TTY_IO_ERROR, &info->tty->flags);
2524
2525 info->flags &= ~ASYNC_INITIALIZED;
2526
8ea2c2ec
JJ		 2527 /* following add by Victor Yu. 09-23-2002 */
2528 if (info->IsMoxaMustChipFlag)
1da177e4 2529 SET_MOXA_MUST_NO_SOFTWARE_FLOW_CONTROL(info->base);
8ea2c2ec 2530 /* above add by Victor Yu. 09-23-2002 */
1da177e4
LT		 2531
2532 spin_unlock_irqrestore(&info->slock, flags);
2533}
2534
2535/*
2536 * This routine is called to set the UART divisor registers to match
2537 * the specified baud rate for a serial port.
2538 */
2539static int mxser_change_speed(struct mxser_struct *info, struct termios *old_termios)
2540{
2541 unsigned cflag, cval, fcr;
2542 int ret = 0;
2543 unsigned char status;
2544 long baud;
2545 unsigned long flags;
2546
1da177e4
LT		 2547 if (!info->tty || !info->tty->termios)
2548 return ret;
2549 cflag = info->tty->termios->c_cflag;
2550 if (!(info->base))
2551 return ret;
2552
1da177e4
LT		 2553#ifndef B921600
2554#define B921600 (B460800 +1)
2555#endif
2556 if (mxser_set_baud_method[info->port] == 0) {
2557 switch (cflag & (CBAUD | CBAUDEX)) {
2558 case B921600:
2559 baud = 921600;
2560 break;
2561 case B460800:
2562 baud = 460800;
2563 break;
2564 case B230400:
2565 baud = 230400;
2566 break;
2567 case B115200:
2568 baud = 115200;
2569 break;
2570 case B57600:
2571 baud = 57600;
2572 break;
2573 case B38400:
2574 baud = 38400;
2575 break;
2576 case B19200:
2577 baud = 19200;
2578 break;
2579 case B9600:
2580 baud = 9600;
2581 break;
2582 case B4800:
2583 baud = 4800;
2584 break;
2585 case B2400:
2586 baud = 2400;
2587 break;
2588 case B1800:
2589 baud = 1800;
2590 break;
2591 case B1200:
2592 baud = 1200;
2593 break;
2594 case B600:
2595 baud = 600;
2596 break;
2597 case B300:
2598 baud = 300;
2599 break;
2600 case B200:
2601 baud = 200;
2602 break;
2603 case B150:
2604 baud = 150;
2605 break;
2606 case B134:
2607 baud = 134;
2608 break;
2609 case B110:
2610 baud = 110;
2611 break;
2612 case B75:
2613 baud = 75;
2614 break;
2615 case B50:
2616 baud = 50;
2617 break;
2618 default:
2619 baud = 0;
2620 break;
2621 }
2622 mxser_set_baud(info, baud);
2623 }
2624
2625 /* byte size and parity */
2626 switch (cflag & CSIZE) {
2627 case CS5:
2628 cval = 0x00;
2629 break;
2630 case CS6:
2631 cval = 0x01;
2632 break;
2633 case CS7:
2634 cval = 0x02;
2635 break;
2636 case CS8:
2637 cval = 0x03;
2638 break;
2639 default:
2640 cval = 0x00;
2641 break; /* too keep GCC shut... */
2642 }
2643 if (cflag & CSTOPB)
2644 cval |= 0x04;
2645 if (cflag & PARENB)
2646 cval |= UART_LCR_PARITY;
8ea2c2ec 2647 if (!(cflag & PARODD))
1da177e4 2648 cval |= UART_LCR_EPAR;
1da177e4
LT		 2649 if (cflag & CMSPAR)
2650 cval |= UART_LCR_SPAR;
2651
2652 if ((info->type == PORT_8250) || (info->type == PORT_16450)) {
2653 if (info->IsMoxaMustChipFlag) {
2654 fcr = UART_FCR_ENABLE_FIFO;
2655 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2656 SET_MOXA_MUST_FIFO_VALUE(info);
2657 } else
2658 fcr = 0;
2659 } else {
2660 fcr = UART_FCR_ENABLE_FIFO;
8ea2c2ec 2661 /* following add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2662 if (info->IsMoxaMustChipFlag) {
2663 fcr |= MOXA_MUST_FCR_GDA_MODE_ENABLE;
2664 SET_MOXA_MUST_FIFO_VALUE(info);
2665 } else {
8ea2c2ec 2666 /* above add by Victor Yu. 08-30-2002 */
1da177e4
LT		 2667 switch (info->rx_trigger) {
2668 case 1:
2669 fcr |= UART_FCR_TRIGGER_1;
2670 break;
2671 case 4:
2672 fcr |= UART_FCR_TRIGGER_4;
2673 break;
2674 case 8:
2675 fcr |= UART_FCR_TRIGGER_8;
2676 break;
2677 default:
2678 fcr |= UART_FCR_TRIGGER_14;
2679 break;
2680 }
2681 }
2682 }
2683
2684 /* CTS flow control flag and modem status interrupts */
2685 info->IER &= ~UART_IER_MSI;
2686 info->MCR &= ~UART_MCR_AFE;
2687 if (cflag & CRTSCTS) {
2688 info->flags |= ASYNC_CTS_FLOW;
2689 info->IER |= UART_IER_MSI;
2690 if ((info->type == PORT_16550A) || (info->IsMoxaMustChipFlag)) {
2691 info->MCR |= UART_MCR_AFE;
8ea2c2ec
JJ		 2692 /* status = mxser_get_msr(info->base, 0, info->port); */
2693/*
2694 save_flags(flags);
1da177e4
LT		 2695 cli();
2696 status = inb(baseaddr + UART_MSR);
8ea2c2ec
JJ		 2697 restore_flags(flags);
2698*/
2699 /* mxser_check_modem_status(info, status); */
1da177e4 2700 } else {
8ea2c2ec
JJ		 2701 /* status = mxser_get_msr(info->base, 0, info->port); */
2702 /* MX_LOCK(&info->slock); */
1da177e4 2703 status = inb(info->base + UART_MSR);
8ea2c2ec 2704 /* MX_UNLOCK(&info->slock); */
1da177e4
LT		 2705 if (info->tty->hw_stopped) {
2706 if (status & UART_MSR_CTS) {
2707 info->tty->hw_stopped = 0;
8ea2c2ec
JJ		 2708 if ((info->type != PORT_16550A) &&
2709 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2710 info->IER |= UART_IER_THRI;
2711 outb(info->IER, info->base + UART_IER);
2712 }
2713 set_bit(MXSER_EVENT_TXLOW, &info->event);
2714 schedule_work(&info->tqueue); }
2715 } else {
2716 if (!(status & UART_MSR_CTS)) {
2717 info->tty->hw_stopped = 1;
8ea2c2ec
JJ		 2718 if ((info->type != PORT_16550A) &&
2719 (!info->IsMoxaMustChipFlag)) {
1da177e4
LT		 2720 info->IER &= ~UART_IER_THRI;
2721 outb(info->IER, info->base + UART_IER);
2722 }
2723 }
2724 }
2725 }
2726 } else {
2727 info->flags &= ~ASYNC_CTS_FLOW;
2728 }
2729 outb(info->MCR, info->base + UART_MCR);
2730 if (cflag & CLOCAL) {
2731 info->flags &= ~ASYNC_CHECK_CD;
2732 } else {
2733 info->flags |= ASYNC_CHECK_CD;
2734 info->IER |= UART_IER_MSI;
2735 }
2736 outb(info->IER, info->base + UART_IER);
2737
2738 /*
2739 * Set up parity check flag
2740 */
2741 info->read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
2742 if (I_INPCK(info->tty))
2743 info->read_status_mask |= UART_LSR_FE | UART_LSR_PE;
2744 if (I_BRKINT(info->tty) || I_PARMRK(info->tty))
2745 info->read_status_mask |= UART_LSR_BI;
2746
2747 info->ignore_status_mask = 0;
2748
2749 if (I_IGNBRK(info->tty)) {
2750 info->ignore_status_mask |= UART_LSR_BI;
2751 info->read_status_mask |= UART_LSR_BI;
2752 /*
2753 * If we're ignore parity and break indicators, ignore
2754 * overruns too. (For real raw support).
2755 */
2756 if (I_IGNPAR(info->tty)) {
8ea2c2ec
JJ		 2757 info->ignore_status_mask |=
2758 UART_LSR_OE |
2759 UART_LSR_PE |
2760 UART_LSR_FE;
2761 info->read_status_mask |=
2762 UART_LSR_OE |
2763 UART_LSR_PE |
2764 UART_LSR_FE;
1da177e4
LT		 2765 }
2766 }
8ea2c2ec 2767 /* following add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2768 if (info->IsMoxaMustChipFlag) {
2769 spin_lock_irqsave(&info->slock, flags);
2770 SET_MOXA_MUST_XON1_VALUE(info->base, START_CHAR(info->tty));
2771 SET_MOXA_MUST_XOFF1_VALUE(info->base, STOP_CHAR(info->tty));
2772 if (I_IXON(info->tty)) {
2773 ENABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2774 } else {
2775 DISABLE_MOXA_MUST_RX_SOFTWARE_FLOW_CONTROL(info->base);
2776 }
2777 if (I_IXOFF(info->tty)) {
2778 ENABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2779 } else {
2780 DISABLE_MOXA_MUST_TX_SOFTWARE_FLOW_CONTROL(info->base);
2781 }
2782 /*
2783 if ( I_IXANY(info->tty) ) {
2784 info->MCR |= MOXA_MUST_MCR_XON_ANY;
2785 ENABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2786 } else {
2787 info->MCR &= ~MOXA_MUST_MCR_XON_ANY;
2788 DISABLE_MOXA_MUST_XON_ANY_FLOW_CONTROL(info->base);
2789 }
2790 */
2791 spin_unlock_irqrestore(&info->slock, flags);
2792 }
8ea2c2ec 2793 /* above add by Victor Yu. 09-02-2002 */
1da177e4
LT		 2794
2795
2796 outb(fcr, info->base + UART_FCR); /* set fcr */
2797 outb(cval, info->base + UART_LCR);
2798
2799 return ret;
2800}
2801
2802
2803static int mxser_set_baud(struct mxser_struct *info, long newspd)
2804{
2805 int quot = 0;
2806 unsigned char cval;
2807 int ret = 0;
2808 unsigned long flags;
2809
2810 if (!info->tty || !info->tty->termios)
2811 return ret;
2812
2813 if (!(info->base))
2814 return ret;
2815
2816 if (newspd > info->MaxCanSetBaudRate)
2817 return 0;
2818
2819 info->realbaud = newspd;
2820 if (newspd == 134) {
2821 quot = (2 * info->baud_base / 269);
2822 } else if (newspd) {
2823 quot = info->baud_base / newspd;
1da177e4
LT		 2824 if (quot == 0)
2825 quot = 1;
1da177e4
LT		 2826 } else {
2827 quot = 0;
2828 }
2829
2830 info->timeout = ((info->xmit_fifo_size * HZ * 10 * quot) / info->baud_base);
2831 info->timeout += HZ / 50; /* Add .02 seconds of slop */
2832
2833 if (quot) {
2834 spin_lock_irqsave(&info->slock, flags);
2835 info->MCR |= UART_MCR_DTR;
2836 outb(info->MCR, info->base + UART_MCR);
2837 spin_unlock_irqrestore(&info->slock, flags);
2838 } else {
2839 spin_lock_irqsave(&info->slock, flags);
2840 info->MCR &= ~UART_MCR_DTR;
2841 outb(info->MCR, info->base + UART_MCR);
2842 spin_unlock_irqrestore(&info->slock, flags);
2843 return ret;
2844 }
2845
2846 cval = inb(info->base + UART_LCR);
2847
2848 outb(cval | UART_LCR_DLAB, info->base + UART_LCR); /* set DLAB */
2849
2850 outb(quot & 0xff, info->base + UART_DLL); /* LS of divisor */
2851 outb(quot >> 8, info->base + UART_DLM); /* MS of divisor */
2852 outb(cval, info->base + UART_LCR); /* reset DLAB */
2853
2854
2855 return ret;
2856}
2857
1da177e4
LT		 2858/*
2859 * ------------------------------------------------------------
2860 * friends of mxser_ioctl()
2861 * ------------------------------------------------------------
2862 */
2863static int mxser_get_serial_info(struct mxser_struct *info, struct serial_struct __user *retinfo)
2864{
2865 struct serial_struct tmp;
2866
2867 if (!retinfo)
8ea2c2ec 2868 return -EFAULT;
1da177e4
LT		 2869 memset(&tmp, 0, sizeof(tmp));
2870 tmp.type = info->type;
2871 tmp.line = info->port;
2872 tmp.port = info->base;
2873 tmp.irq = info->irq;
2874 tmp.flags = info->flags;
2875 tmp.baud_base = info->baud_base;
2876 tmp.close_delay = info->close_delay;
2877 tmp.closing_wait = info->closing_wait;
2878 tmp.custom_divisor = info->custom_divisor;
2879 tmp.hub6 = 0;
2880 if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
2881 return -EFAULT;
8ea2c2ec 2882 return 0;
1da177e4
LT		 2883}
2884
2885static int mxser_set_serial_info(struct mxser_struct *info, struct serial_struct __user *new_info)
2886{
2887 struct serial_struct new_serial;
2888 unsigned int flags;
2889 int retval = 0;
2890
2891 if (!new_info || !info->base)
8ea2c2ec 2892 return -EFAULT;
1da177e4
LT		 2893 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
2894 return -EFAULT;
2895
8ea2c2ec
JJ		 2896 if ((new_serial.irq != info->irq) ||
2897 (new_serial.port != info->base) ||
2898 (new_serial.custom_divisor != info->custom_divisor) ||
2899 (new_serial.baud_base != info->baud_base))
2900 return -EPERM;
1da177e4
LT		 2901
2902 flags = info->flags & ASYNC_SPD_MASK;
2903
2904 if (!capable(CAP_SYS_ADMIN)) {
8ea2c2ec
JJ		 2905 if ((new_serial.baud_base != info->baud_base) ||
2906 (new_serial.close_delay != info->close_delay) ||
2907 ((new_serial.flags & ~ASYNC_USR_MASK) != (info->flags & ~ASYNC_USR_MASK)))
2908 return -EPERM;
2909 info->flags = ((info->flags & ~ASYNC_USR_MASK) |
2910 (new_serial.flags & ASYNC_USR_MASK));
1da177e4
LT		 2911 } else {
2912 /*
2913 * OK, past this point, all the error checking has been done.
2914 * At this point, we start making changes.....
2915 */
8ea2c2ec
JJ		 2916 info->flags = ((info->flags & ~ASYNC_FLAGS) |
2917 (new_serial.flags & ASYNC_FLAGS));
1da177e4
LT		 2918 info->close_delay = new_serial.close_delay * HZ / 100;
2919 info->closing_wait = new_serial.closing_wait * HZ / 100;
8ea2c2ec
JJ		 2920 info->tty->low_latency =
2921 (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0;
2922 info->tty->low_latency = 0; /* (info->flags & ASYNC_LOW_LATENCY) ? 1 : 0; */
1da177e4
LT		 2923 }
2924
2925 /* added by casper, 3/17/2000, for mouse */
2926 info->type = new_serial.type;
2927
2928 process_txrx_fifo(info);
2929
1da177e4
LT		 2930 if (info->flags & ASYNC_INITIALIZED) {
2931 if (flags != (info->flags & ASYNC_SPD_MASK)) {
2932 mxser_change_speed(info, NULL);
2933 }
2934 } else {
2935 retval = mxser_startup(info);
2936 }
8ea2c2ec 2937 return retval;
1da177e4
LT		 2938}
2939
2940/*
2941 * mxser_get_lsr_info - get line status register info
2942 *
2943 * Purpose: Let user call ioctl() to get info when the UART physically
2944 * is emptied. On bus types like RS485, the transmitter must
2945 * release the bus after transmitting. This must be done when
2946 * the transmit shift register is empty, not be done when the
2947 * transmit holding register is empty. This functionality
2948 * allows an RS485 driver to be written in user space.
2949 */
2950static int mxser_get_lsr_info(struct mxser_struct *info, unsigned int __user *value)
2951{
2952 unsigned char status;
2953 unsigned int result;
2954 unsigned long flags;
2955
2956 spin_lock_irqsave(&info->slock, flags);
2957 status = inb(info->base + UART_LSR);
2958 spin_unlock_irqrestore(&info->slock, flags);
2959 result = ((status & UART_LSR_TEMT) ? TIOCSER_TEMT : 0);
2960 return put_user(result, value);
2961}
2962
2963/*
2964 * This routine sends a break character out the serial port.
2965 */
2966static void mxser_send_break(struct mxser_struct *info, int duration)
2967{
2968 unsigned long flags;
2969
2970 if (!info->base)
2971 return;
2972 set_current_state(TASK_INTERRUPTIBLE);
2973 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2974 outb(inb(info->base + UART_LCR) | UART_LCR_SBC,
2975 info->base + UART_LCR);
1da177e4
LT		 2976 spin_unlock_irqrestore(&info->slock, flags);
2977 schedule_timeout(duration);
2978 spin_lock_irqsave(&info->slock, flags);
8ea2c2ec
JJ		 2979 outb(inb(info->base + UART_LCR) & ~UART_LCR_SBC,
2980 info->base + UART_LCR);
1da177e4
LT		 2981 spin_unlock_irqrestore(&info->slock, flags);
2982}
2983
2984static int mxser_tiocmget(struct tty_struct *tty, struct file *file)
2985{
56e139f6 2986 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 2987 unsigned char control, status;
2988 unsigned long flags;
2989
2990
2991 if (tty->index == MXSER_PORTS)
8ea2c2ec 2992 return -ENOIOCTLCMD;
1da177e4 2993 if (tty->flags & (1 << TTY_IO_ERROR))
8ea2c2ec 2994 return -EIO;
1da177e4
LT		 2995
2996 control = info->MCR;
2997
2998 spin_lock_irqsave(&info->slock, flags);
2999 status = inb(info->base + UART_MSR);
3000 if (status & UART_MSR_ANY_DELTA)
3001 mxser_check_modem_status(info, status);
3002 spin_unlock_irqrestore(&info->slock, flags);
3003 return ((control & UART_MCR_RTS) ? TIOCM_RTS : 0) |
8ea2c2ec
JJ		 3004 ((control & UART_MCR_DTR) ? TIOCM_DTR : 0) |
3005 ((status & UART_MSR_DCD) ? TIOCM_CAR : 0) |
3006 ((status & UART_MSR_RI) ? TIOCM_RNG : 0) |
3007 ((status & UART_MSR_DSR) ? TIOCM_DSR : 0) |
3008 ((status & UART_MSR_CTS) ? TIOCM_CTS : 0);
1da177e4
LT		 3009}
3010
3011static int mxser_tiocmset(struct tty_struct *tty, struct file *file, unsigned int set, unsigned int clear)
3012{
56e139f6 3013 struct mxser_struct *info = tty->driver_data;
1da177e4
LT		 3014 unsigned long flags;
3015
3016
3017 if (tty->index == MXSER_PORTS)
3018 return -ENOIOCTLCMD;
3019 if (tty->flags & (1 << TTY_IO_ERROR))
3020 return -EIO;
3021
3022 spin_lock_irqsave(&info->slock, flags);
3023
3024 if (set & TIOCM_RTS)
3025 info->MCR |= UART_MCR_RTS;
3026 if (set & TIOCM_DTR)
3027 info->MCR |= UART_MCR_DTR;
3028
3029 if (clear & TIOCM_RTS)
3030 info->MCR &= ~UART_MCR_RTS;
3031 if (clear & TIOCM_DTR)
3032 info->MCR &= ~UART_MCR_DTR;
3033
3034 outb(info->MCR, info->base + UART_MCR);
3035 spin_unlock_irqrestore(&info->slock, flags);
3036 return 0;
3037}
3038
3039
3040static int mxser_read_register(int, unsigned short *);
3041static int mxser_program_mode(int);
3042static void mxser_normal_mode(int);
3043
3044static int mxser_get_ISA_conf(int cap, struct mxser_hwconf *hwconf)
3045{
3046 int id, i, bits;
3047 unsigned short regs[16], irq;
3048 unsigned char scratch, scratch2;
3049
3050 hwconf->IsMoxaMustChipFlag = MOXA_OTHER_UART;
3051
3052 id = mxser_read_register(cap, regs);
3053 if (id == C168_ASIC_ID) {
3054 hwconf->board_type = MXSER_BOARD_C168_ISA;
3055 hwconf->ports = 8;
3056 } else if (id == C104_ASIC_ID) {
3057 hwconf->board_type = MXSER_BOARD_C104_ISA;
3058 hwconf->ports = 4;
3059 } else if (id == C102_ASIC_ID) {
3060 hwconf->board_type = MXSER_BOARD_C102_ISA;
3061 hwconf->ports = 2;
3062 } else if (id == CI132_ASIC_ID) {
3063 hwconf->board_type = MXSER_BOARD_CI132;
3064 hwconf->ports = 2;
3065 } else if (id == CI134_ASIC_ID) {
3066 hwconf->board_type = MXSER_BOARD_CI134;
3067 hwconf->ports = 4;
3068 } else if (id == CI104J_ASIC_ID) {
3069 hwconf->board_type = MXSER_BOARD_CI104J;
3070 hwconf->ports = 4;
3071 } else
8ea2c2ec 3072 return 0;
1da177e4
LT		 3073
3074 irq = 0;
3075 if (hwconf->ports == 2) {
3076 irq = regs[9] & 0xF000;
3077 irq = irq | (irq >> 4);
3078 if (irq != (regs[9] & 0xFF00))
8ea2c2ec 3079 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3080 } else if (hwconf->ports == 4) {
3081 irq = regs[9] & 0xF000;
3082 irq = irq | (irq >> 4);
3083 irq = irq | (irq >> 8);
3084 if (irq != regs[9])
8ea2c2ec 3085 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3086 } else if (hwconf->ports == 8) {
3087 irq = regs[9] & 0xF000;
3088 irq = irq | (irq >> 4);
3089 irq = irq | (irq >> 8);
3090 if ((irq != regs[9]) || (irq != regs[10]))
8ea2c2ec 3091 return MXSER_ERR_IRQ_CONFLIT;
1da177e4
LT		 3092 }
3093
8ea2c2ec
JJ		 3094 if (!irq)
3095 return MXSER_ERR_IRQ;
3096 hwconf->irq = ((int)(irq & 0xF000) >> 12);
1da177e4
LT		 3097 for (i = 0; i < 8; i++)
3098 hwconf->ioaddr[i] = (int) regs[i + 1] & 0xFFF8;
8ea2c2ec
JJ		 3099 if ((regs[12] & 0x80) == 0)
3100 return MXSER_ERR_VECTOR;
3101 hwconf->vector = (int)regs[11]; /* interrupt vector */
1da177e4
LT		 3102 if (id == 1)
3103 hwconf->vector_mask = 0x00FF;
3104 else
3105 hwconf->vector_mask = 0x000F;
3106 for (i = 7, bits = 0x0100; i >= 0; i--, bits <<= 1) {
3107 if (regs[12] & bits) {
3108 hwconf->baud_base[i] = 921600;
8ea2c2ec 3109 hwconf->MaxCanSetBaudRate[i] = 921600; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3110 } else {
3111 hwconf->baud_base[i] = 115200;
8ea2c2ec 3112 hwconf->MaxCanSetBaudRate[i] = 115200; /* add by Victor Yu. 09-04-2002 */
1da177e4
LT		 3113 }
3114 }
3115 scratch2 = inb(cap + UART_LCR) & (~UART_LCR_DLAB);
3116 outb(scratch2 | UART_LCR_DLAB, cap + UART_LCR);
3117 outb(0, cap + UART_EFR); /* EFR is the same as FCR */
3118 outb(scratch2, cap + UART_LCR);
3119 outb(UART_FCR_ENABLE_FIFO, cap + UART_FCR);
3120 scratch = inb(cap + UART_IIR);
3121
3122 if (scratch & 0xC0)
3123 hwconf->uart_type = PORT_16550A;
3124 else
3125 hwconf->uart_type = PORT_16450;
3126 if (id == 1)
3127 hwconf->ports = 8;
3128 else
3129 hwconf->ports = 4;
3130 request_region(hwconf->ioaddr[0], 8 * hwconf->ports, "mxser(IO)");
3131 request_region(hwconf->vector, 1, "mxser(vector)");
8ea2c2ec 3132 return hwconf->ports;
1da177e4
LT		 3133}
3134
3135#define CHIP_SK 0x01 /* Serial Data Clock in Eprom */
3136#define CHIP_DO 0x02 /* Serial Data Output in Eprom */
3137#define CHIP_CS 0x04 /* Serial Chip Select in Eprom */
3138#define CHIP_DI 0x08 /* Serial Data Input in Eprom */
3139#define EN_CCMD 0x000 /* Chip's command register */
3140#define EN0_RSARLO 0x008 /* Remote start address reg 0 */
3141#define EN0_RSARHI 0x009 /* Remote start address reg 1 */
3142#define EN0_RCNTLO 0x00A /* Remote byte count reg WR */
3143#define EN0_RCNTHI 0x00B /* Remote byte count reg WR */
3144#define EN0_DCFG 0x00E /* Data configuration reg WR */
3145#define EN0_PORT 0x010 /* Rcv missed frame error counter RD */
3146#define ENC_PAGE0 0x000 /* Select page 0 of chip registers */
3147#define ENC_PAGE3 0x0C0 /* Select page 3 of chip registers */
3148static int mxser_read_register(int port, unsigned short *regs)
3149{
3150 int i, k, value, id;
3151 unsigned int j;
3152
3153 id = mxser_program_mode(port);
3154 if (id < 0)
8ea2c2ec 3155 return id;
1da177e4
LT		 3156 for (i = 0; i < 14; i++) {
3157 k = (i & 0x3F) | 0x180;
3158 for (j = 0x100; j > 0; j >>= 1) {
3159 outb(CHIP_CS, port);
3160 if (k & j) {
3161 outb(CHIP_CS | CHIP_DO, port);
3162 outb(CHIP_CS | CHIP_DO | CHIP_SK, port); /* A? bit of read */
3163 } else {
3164 outb(CHIP_CS, port);
3165 outb(CHIP_CS | CHIP_SK, port); /* A? bit of read */
3166 }
3167 }
8ea2c2ec 3168 (void)inb(port);
1da177e4
LT		 3169 value = 0;
3170 for (k = 0, j = 0x8000; k < 16; k++, j >>= 1) {
3171 outb(CHIP_CS, port);
3172 outb(CHIP_CS | CHIP_SK, port);
3173 if (inb(port) & CHIP_DI)
3174 value |= j;
3175 }
3176 regs[i] = value;
3177 outb(0, port);
3178 }
3179 mxser_normal_mode(port);
8ea2c2ec 3180 return id;
1da177e4
LT		 3181}
3182
3183static int mxser_program_mode(int port)
3184{
3185 int id, i, j, n;
8ea2c2ec 3186 /* unsigned long flags; */
1da177e4
LT		 3187
3188 spin_lock(&gm_lock);
3189 outb(0, port);
3190 outb(0, port);
3191 outb(0, port);
8ea2c2ec
JJ		 3192 (void)inb(port);
3193 (void)inb(port);
1da177e4 3194 outb(0, port);
8ea2c2ec
JJ		 3195 (void)inb(port);
3196 /* restore_flags(flags); */
1da177e4
LT		 3197 spin_unlock(&gm_lock);
3198
3199 id = inb(port + 1) & 0x1F;
8ea2c2ec
JJ		 3200 if ((id != C168_ASIC_ID) &&
3201 (id != C104_ASIC_ID) &&
3202 (id != C102_ASIC_ID) &&
3203 (id != CI132_ASIC_ID) &&
3204 (id != CI134_ASIC_ID) &&
3205 (id != CI104J_ASIC_ID))
3206 return -1;
1da177e4
LT		 3207 for (i = 0, j = 0; i < 4; i++) {
3208 n = inb(port + 2);
3209 if (n == 'M') {
3210 j = 1;
3211 } else if ((j == 1) && (n == 1)) {
3212 j = 2;
3213 break;
3214 } else
3215 j = 0;
3216 }
3217 if (j != 2)
3218 id = -2;
8ea2c2ec 3219 return id;
1da177e4
LT		 3220}
3221
3222static void mxser_normal_mode(int port)
3223{
3224 int i, n;
3225
3226 outb(0xA5, port + 1);
3227 outb(0x80, port + 3);
3228 outb(12, port + 0); /* 9600 bps */
3229 outb(0, port + 1);
3230 outb(0x03, port + 3); /* 8 data bits */
3231 outb(0x13, port + 4); /* loop back mode */
3232 for (i = 0; i < 16; i++) {
3233 n = inb(port + 5);
3234 if ((n & 0x61) == 0x60)
3235 break;
3236 if ((n & 1) == 1)
8ea2c2ec 3237 (void)inb(port);
1da177e4
LT		 3238 }
3239 outb(0x00, port + 4);
3240}
3241
3242module_init(mxser_module_init);
3243module_exit(mxser_module_exit);
Linux 6.x block layer and io_uring tree(s)