Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * ipmi_si.c | |
3 | * | |
4 | * The interface to the IPMI driver for the system interfaces (KCS, SMIC, | |
5 | * BT). | |
6 | * | |
7 | * Author: MontaVista Software, Inc. | |
8 | * Corey Minyard <minyard@mvista.com> | |
9 | * source@mvista.com | |
10 | * | |
11 | * Copyright 2002 MontaVista Software Inc. | |
dba9b4f6 | 12 | * Copyright 2006 IBM Corp., Christian Krafft <krafft@de.ibm.com> |
1da177e4 LT |
13 | * |
14 | * This program is free software; you can redistribute it and/or modify it | |
15 | * under the terms of the GNU General Public License as published by the | |
16 | * Free Software Foundation; either version 2 of the License, or (at your | |
17 | * option) any later version. | |
18 | * | |
19 | * | |
20 | * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED | |
21 | * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF | |
22 | * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. | |
23 | * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, | |
24 | * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, | |
25 | * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS | |
26 | * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND | |
27 | * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR | |
28 | * TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE | |
29 | * USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. | |
30 | * | |
31 | * You should have received a copy of the GNU General Public License along | |
32 | * with this program; if not, write to the Free Software Foundation, Inc., | |
33 | * 675 Mass Ave, Cambridge, MA 02139, USA. | |
34 | */ | |
35 | ||
36 | /* | |
37 | * This file holds the "policy" for the interface to the SMI state | |
38 | * machine. It does the configuration, handles timers and interrupts, | |
39 | * and drives the real SMI state machine. | |
40 | */ | |
41 | ||
1da177e4 LT |
42 | #include <linux/module.h> |
43 | #include <linux/moduleparam.h> | |
1da177e4 | 44 | #include <linux/sched.h> |
07412736 | 45 | #include <linux/seq_file.h> |
1da177e4 LT |
46 | #include <linux/timer.h> |
47 | #include <linux/errno.h> | |
48 | #include <linux/spinlock.h> | |
49 | #include <linux/slab.h> | |
50 | #include <linux/delay.h> | |
51 | #include <linux/list.h> | |
52 | #include <linux/pci.h> | |
53 | #include <linux/ioport.h> | |
ea94027b | 54 | #include <linux/notifier.h> |
b0defcdb | 55 | #include <linux/mutex.h> |
e9a705a0 | 56 | #include <linux/kthread.h> |
1da177e4 | 57 | #include <asm/irq.h> |
1da177e4 LT |
58 | #include <linux/interrupt.h> |
59 | #include <linux/rcupdate.h> | |
16f4232c | 60 | #include <linux/ipmi.h> |
1da177e4 LT |
61 | #include <linux/ipmi_smi.h> |
62 | #include <asm/io.h> | |
63 | #include "ipmi_si_sm.h" | |
b224cd3a | 64 | #include <linux/dmi.h> |
b361e27b CM |
65 | #include <linux/string.h> |
66 | #include <linux/ctype.h> | |
11c675ce SR |
67 | #include <linux/of_device.h> |
68 | #include <linux/of_platform.h> | |
672d8eaf RH |
69 | #include <linux/of_address.h> |
70 | #include <linux/of_irq.h> | |
58c9d61f | 71 | #include <linux/acpi.h> |
dba9b4f6 | 72 | |
fdbeb7de TB |
73 | #ifdef CONFIG_PARISC |
74 | #include <asm/hardware.h> /* for register_parisc_driver() stuff */ | |
75 | #include <asm/parisc-device.h> | |
76 | #endif | |
77 | ||
b361e27b | 78 | #define PFX "ipmi_si: " |
1da177e4 LT |
79 | |
80 | /* Measure times between events in the driver. */ | |
81 | #undef DEBUG_TIMING | |
82 | ||
83 | /* Call every 10 ms. */ | |
84 | #define SI_TIMEOUT_TIME_USEC 10000 | |
85 | #define SI_USEC_PER_JIFFY (1000000/HZ) | |
86 | #define SI_TIMEOUT_JIFFIES (SI_TIMEOUT_TIME_USEC/SI_USEC_PER_JIFFY) | |
87 | #define SI_SHORT_TIMEOUT_USEC 250 /* .25ms when the SM request a | |
c305e3d3 | 88 | short timeout */ |
1da177e4 LT |
89 | |
90 | enum si_intf_state { | |
91 | SI_NORMAL, | |
92 | SI_GETTING_FLAGS, | |
93 | SI_GETTING_EVENTS, | |
94 | SI_CLEARING_FLAGS, | |
1da177e4 | 95 | SI_GETTING_MESSAGES, |
d9b7e4f7 CM |
96 | SI_CHECKING_ENABLES, |
97 | SI_SETTING_ENABLES | |
1da177e4 LT |
98 | /* FIXME - add watchdog stuff. */ |
99 | }; | |
100 | ||
9dbf68f9 CM |
101 | /* Some BT-specific defines we need here. */ |
102 | #define IPMI_BT_INTMASK_REG 2 | |
103 | #define IPMI_BT_INTMASK_CLEAR_IRQ_BIT 2 | |
104 | #define IPMI_BT_INTMASK_ENABLE_IRQ_BIT 1 | |
105 | ||
1da177e4 | 106 | enum si_type { |
76824852 | 107 | SI_KCS, SI_SMIC, SI_BT |
1da177e4 | 108 | }; |
99ee6735 LC |
109 | |
110 | static const char * const si_to_str[] = { "kcs", "smic", "bt" }; | |
1da177e4 | 111 | |
50c812b2 CM |
112 | #define DEVICE_NAME "ipmi_si" |
113 | ||
a1e9c9dd | 114 | static struct platform_driver ipmi_driver; |
64959e2d CM |
115 | |
116 | /* | |
117 | * Indexes into stats[] in smi_info below. | |
118 | */ | |
ba8ff1c6 CM |
119 | enum si_stat_indexes { |
120 | /* | |
121 | * Number of times the driver requested a timer while an operation | |
122 | * was in progress. | |
123 | */ | |
124 | SI_STAT_short_timeouts = 0, | |
125 | ||
126 | /* | |
127 | * Number of times the driver requested a timer while nothing was in | |
128 | * progress. | |
129 | */ | |
130 | SI_STAT_long_timeouts, | |
131 | ||
132 | /* Number of times the interface was idle while being polled. */ | |
133 | SI_STAT_idles, | |
134 | ||
135 | /* Number of interrupts the driver handled. */ | |
136 | SI_STAT_interrupts, | |
137 | ||
138 | /* Number of time the driver got an ATTN from the hardware. */ | |
139 | SI_STAT_attentions, | |
64959e2d | 140 | |
ba8ff1c6 CM |
141 | /* Number of times the driver requested flags from the hardware. */ |
142 | SI_STAT_flag_fetches, | |
143 | ||
144 | /* Number of times the hardware didn't follow the state machine. */ | |
145 | SI_STAT_hosed_count, | |
146 | ||
147 | /* Number of completed messages. */ | |
148 | SI_STAT_complete_transactions, | |
149 | ||
150 | /* Number of IPMI events received from the hardware. */ | |
151 | SI_STAT_events, | |
152 | ||
153 | /* Number of watchdog pretimeouts. */ | |
154 | SI_STAT_watchdog_pretimeouts, | |
155 | ||
b3834be5 | 156 | /* Number of asynchronous messages received. */ |
ba8ff1c6 CM |
157 | SI_STAT_incoming_messages, |
158 | ||
159 | ||
160 | /* This *must* remain last, add new values above this. */ | |
161 | SI_NUM_STATS | |
162 | }; | |
64959e2d | 163 | |
c305e3d3 | 164 | struct smi_info { |
a9a2c44f | 165 | int intf_num; |
1da177e4 LT |
166 | ipmi_smi_t intf; |
167 | struct si_sm_data *si_sm; | |
81d02b7f | 168 | const struct si_sm_handlers *handlers; |
1da177e4 LT |
169 | enum si_type si_type; |
170 | spinlock_t si_lock; | |
b874b985 | 171 | struct ipmi_smi_msg *waiting_msg; |
1da177e4 LT |
172 | struct ipmi_smi_msg *curr_msg; |
173 | enum si_intf_state si_state; | |
174 | ||
c305e3d3 CM |
175 | /* |
176 | * Used to handle the various types of I/O that can occur with | |
177 | * IPMI | |
178 | */ | |
1da177e4 LT |
179 | struct si_sm_io io; |
180 | int (*io_setup)(struct smi_info *info); | |
181 | void (*io_cleanup)(struct smi_info *info); | |
182 | int (*irq_setup)(struct smi_info *info); | |
183 | void (*irq_cleanup)(struct smi_info *info); | |
184 | unsigned int io_size; | |
5fedc4a2 | 185 | enum ipmi_addr_src addr_source; /* ACPI, PCI, SMBIOS, hardcode, etc. */ |
b0defcdb CM |
186 | void (*addr_source_cleanup)(struct smi_info *info); |
187 | void *addr_source_data; | |
1da177e4 | 188 | |
c305e3d3 CM |
189 | /* |
190 | * Per-OEM handler, called from handle_flags(). Returns 1 | |
191 | * when handle_flags() needs to be re-run or 0 indicating it | |
192 | * set si_state itself. | |
193 | */ | |
3ae0e0f9 CM |
194 | int (*oem_data_avail_handler)(struct smi_info *smi_info); |
195 | ||
c305e3d3 CM |
196 | /* |
197 | * Flags from the last GET_MSG_FLAGS command, used when an ATTN | |
198 | * is set to hold the flags until we are done handling everything | |
199 | * from the flags. | |
200 | */ | |
1da177e4 LT |
201 | #define RECEIVE_MSG_AVAIL 0x01 |
202 | #define EVENT_MSG_BUFFER_FULL 0x02 | |
203 | #define WDT_PRE_TIMEOUT_INT 0x08 | |
3ae0e0f9 CM |
204 | #define OEM0_DATA_AVAIL 0x20 |
205 | #define OEM1_DATA_AVAIL 0x40 | |
206 | #define OEM2_DATA_AVAIL 0x80 | |
207 | #define OEM_DATA_AVAIL (OEM0_DATA_AVAIL | \ | |
c305e3d3 CM |
208 | OEM1_DATA_AVAIL | \ |
209 | OEM2_DATA_AVAIL) | |
1da177e4 LT |
210 | unsigned char msg_flags; |
211 | ||
40112ae7 | 212 | /* Does the BMC have an event buffer? */ |
7aefac26 | 213 | bool has_event_buffer; |
40112ae7 | 214 | |
c305e3d3 CM |
215 | /* |
216 | * If set to true, this will request events the next time the | |
217 | * state machine is idle. | |
218 | */ | |
1da177e4 LT |
219 | atomic_t req_events; |
220 | ||
c305e3d3 CM |
221 | /* |
222 | * If true, run the state machine to completion on every send | |
223 | * call. Generally used after a panic to make sure stuff goes | |
224 | * out. | |
225 | */ | |
7aefac26 | 226 | bool run_to_completion; |
1da177e4 LT |
227 | |
228 | /* The I/O port of an SI interface. */ | |
229 | int port; | |
230 | ||
c305e3d3 CM |
231 | /* |
232 | * The space between start addresses of the two ports. For | |
233 | * instance, if the first port is 0xca2 and the spacing is 4, then | |
234 | * the second port is 0xca6. | |
235 | */ | |
1da177e4 LT |
236 | unsigned int spacing; |
237 | ||
238 | /* zero if no irq; */ | |
239 | int irq; | |
240 | ||
241 | /* The timer for this si. */ | |
242 | struct timer_list si_timer; | |
243 | ||
48e8ac29 BS |
244 | /* This flag is set, if the timer is running (timer_pending() isn't enough) */ |
245 | bool timer_running; | |
246 | ||
1da177e4 LT |
247 | /* The time (in jiffies) the last timeout occurred at. */ |
248 | unsigned long last_timeout_jiffies; | |
249 | ||
89986496 CM |
250 | /* Are we waiting for the events, pretimeouts, received msgs? */ |
251 | atomic_t need_watch; | |
252 | ||
c305e3d3 CM |
253 | /* |
254 | * The driver will disable interrupts when it gets into a | |
255 | * situation where it cannot handle messages due to lack of | |
256 | * memory. Once that situation clears up, it will re-enable | |
257 | * interrupts. | |
258 | */ | |
7aefac26 | 259 | bool interrupt_disabled; |
1da177e4 | 260 | |
d9b7e4f7 CM |
261 | /* |
262 | * Does the BMC support events? | |
263 | */ | |
264 | bool supports_event_msg_buff; | |
265 | ||
1e7d6a45 | 266 | /* |
d0882897 CM |
267 | * Can we disable interrupts the global enables receive irq |
268 | * bit? There are currently two forms of brokenness, some | |
269 | * systems cannot disable the bit (which is technically within | |
270 | * the spec but a bad idea) and some systems have the bit | |
271 | * forced to zero even though interrupts work (which is | |
272 | * clearly outside the spec). The next bool tells which form | |
273 | * of brokenness is present. | |
1e7d6a45 | 274 | */ |
d0882897 CM |
275 | bool cannot_disable_irq; |
276 | ||
277 | /* | |
278 | * Some systems are broken and cannot set the irq enable | |
279 | * bit, even if they support interrupts. | |
280 | */ | |
281 | bool irq_enable_broken; | |
1e7d6a45 | 282 | |
a8df150c CM |
283 | /* |
284 | * Did we get an attention that we did not handle? | |
285 | */ | |
286 | bool got_attn; | |
287 | ||
50c812b2 | 288 | /* From the get device id response... */ |
3ae0e0f9 | 289 | struct ipmi_device_id device_id; |
1da177e4 | 290 | |
50c812b2 CM |
291 | /* Driver model stuff. */ |
292 | struct device *dev; | |
293 | struct platform_device *pdev; | |
294 | ||
c305e3d3 CM |
295 | /* |
296 | * True if we allocated the device, false if it came from | |
297 | * someplace else (like PCI). | |
298 | */ | |
7aefac26 | 299 | bool dev_registered; |
50c812b2 | 300 | |
1da177e4 LT |
301 | /* Slave address, could be reported from DMI. */ |
302 | unsigned char slave_addr; | |
303 | ||
304 | /* Counters and things for the proc filesystem. */ | |
64959e2d | 305 | atomic_t stats[SI_NUM_STATS]; |
a9a2c44f | 306 | |
c305e3d3 | 307 | struct task_struct *thread; |
b0defcdb CM |
308 | |
309 | struct list_head link; | |
16f4232c | 310 | union ipmi_smi_info_union addr_info; |
1da177e4 LT |
311 | }; |
312 | ||
64959e2d CM |
313 | #define smi_inc_stat(smi, stat) \ |
314 | atomic_inc(&(smi)->stats[SI_STAT_ ## stat]) | |
315 | #define smi_get_stat(smi, stat) \ | |
316 | ((unsigned int) atomic_read(&(smi)->stats[SI_STAT_ ## stat])) | |
317 | ||
a51f4a81 CM |
318 | #define SI_MAX_PARMS 4 |
319 | ||
320 | static int force_kipmid[SI_MAX_PARMS]; | |
321 | static int num_force_kipmid; | |
56480287 | 322 | #ifdef CONFIG_PCI |
7aefac26 | 323 | static bool pci_registered; |
56480287 | 324 | #endif |
fdbeb7de | 325 | #ifdef CONFIG_PARISC |
7aefac26 | 326 | static bool parisc_registered; |
fdbeb7de | 327 | #endif |
a51f4a81 | 328 | |
ae74e823 MW |
329 | static unsigned int kipmid_max_busy_us[SI_MAX_PARMS]; |
330 | static int num_max_busy_us; | |
331 | ||
7aefac26 | 332 | static bool unload_when_empty = true; |
b361e27b | 333 | |
2407d77a | 334 | static int add_smi(struct smi_info *smi); |
b0defcdb | 335 | static int try_smi_init(struct smi_info *smi); |
b361e27b | 336 | static void cleanup_one_si(struct smi_info *to_clean); |
d2478521 | 337 | static void cleanup_ipmi_si(void); |
b0defcdb | 338 | |
f93aae9f JS |
339 | #ifdef DEBUG_TIMING |
340 | void debug_timestamp(char *msg) | |
341 | { | |
48862ea2 | 342 | struct timespec64 t; |
f93aae9f | 343 | |
48862ea2 JS |
344 | getnstimeofday64(&t); |
345 | pr_debug("**%s: %lld.%9.9ld\n", msg, (long long) t.tv_sec, t.tv_nsec); | |
f93aae9f JS |
346 | } |
347 | #else | |
348 | #define debug_timestamp(x) | |
349 | #endif | |
350 | ||
e041c683 | 351 | static ATOMIC_NOTIFIER_HEAD(xaction_notifier_list); |
c305e3d3 | 352 | static int register_xaction_notifier(struct notifier_block *nb) |
ea94027b | 353 | { |
e041c683 | 354 | return atomic_notifier_chain_register(&xaction_notifier_list, nb); |
ea94027b CM |
355 | } |
356 | ||
1da177e4 LT |
357 | static void deliver_recv_msg(struct smi_info *smi_info, |
358 | struct ipmi_smi_msg *msg) | |
359 | { | |
7adf579c | 360 | /* Deliver the message to the upper layer. */ |
968bf7cc CM |
361 | if (smi_info->intf) |
362 | ipmi_smi_msg_received(smi_info->intf, msg); | |
363 | else | |
364 | ipmi_free_smi_msg(msg); | |
1da177e4 LT |
365 | } |
366 | ||
4d7cbac7 | 367 | static void return_hosed_msg(struct smi_info *smi_info, int cCode) |
1da177e4 LT |
368 | { |
369 | struct ipmi_smi_msg *msg = smi_info->curr_msg; | |
370 | ||
4d7cbac7 CM |
371 | if (cCode < 0 || cCode > IPMI_ERR_UNSPECIFIED) |
372 | cCode = IPMI_ERR_UNSPECIFIED; | |
373 | /* else use it as is */ | |
374 | ||
25985edc | 375 | /* Make it a response */ |
1da177e4 LT |
376 | msg->rsp[0] = msg->data[0] | 4; |
377 | msg->rsp[1] = msg->data[1]; | |
4d7cbac7 | 378 | msg->rsp[2] = cCode; |
1da177e4 LT |
379 | msg->rsp_size = 3; |
380 | ||
381 | smi_info->curr_msg = NULL; | |
382 | deliver_recv_msg(smi_info, msg); | |
383 | } | |
384 | ||
385 | static enum si_sm_result start_next_msg(struct smi_info *smi_info) | |
386 | { | |
387 | int rv; | |
1da177e4 | 388 | |
b874b985 | 389 | if (!smi_info->waiting_msg) { |
1da177e4 LT |
390 | smi_info->curr_msg = NULL; |
391 | rv = SI_SM_IDLE; | |
392 | } else { | |
393 | int err; | |
394 | ||
b874b985 CM |
395 | smi_info->curr_msg = smi_info->waiting_msg; |
396 | smi_info->waiting_msg = NULL; | |
f93aae9f | 397 | debug_timestamp("Start2"); |
e041c683 AS |
398 | err = atomic_notifier_call_chain(&xaction_notifier_list, |
399 | 0, smi_info); | |
ea94027b CM |
400 | if (err & NOTIFY_STOP_MASK) { |
401 | rv = SI_SM_CALL_WITHOUT_DELAY; | |
402 | goto out; | |
403 | } | |
1da177e4 LT |
404 | err = smi_info->handlers->start_transaction( |
405 | smi_info->si_sm, | |
406 | smi_info->curr_msg->data, | |
407 | smi_info->curr_msg->data_size); | |
c305e3d3 | 408 | if (err) |
4d7cbac7 | 409 | return_hosed_msg(smi_info, err); |
1da177e4 LT |
410 | |
411 | rv = SI_SM_CALL_WITHOUT_DELAY; | |
412 | } | |
76824852 | 413 | out: |
1da177e4 LT |
414 | return rv; |
415 | } | |
416 | ||
0cfec916 CM |
417 | static void smi_mod_timer(struct smi_info *smi_info, unsigned long new_val) |
418 | { | |
419 | smi_info->last_timeout_jiffies = jiffies; | |
420 | mod_timer(&smi_info->si_timer, new_val); | |
421 | smi_info->timer_running = true; | |
422 | } | |
423 | ||
424 | /* | |
425 | * Start a new message and (re)start the timer and thread. | |
426 | */ | |
427 | static void start_new_msg(struct smi_info *smi_info, unsigned char *msg, | |
428 | unsigned int size) | |
429 | { | |
430 | smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES); | |
431 | ||
432 | if (smi_info->thread) | |
433 | wake_up_process(smi_info->thread); | |
434 | ||
435 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, size); | |
436 | } | |
437 | ||
438 | static void start_check_enables(struct smi_info *smi_info, bool start_timer) | |
ee6cd5f8 CM |
439 | { |
440 | unsigned char msg[2]; | |
441 | ||
442 | msg[0] = (IPMI_NETFN_APP_REQUEST << 2); | |
443 | msg[1] = IPMI_GET_BMC_GLOBAL_ENABLES_CMD; | |
444 | ||
0cfec916 CM |
445 | if (start_timer) |
446 | start_new_msg(smi_info, msg, 2); | |
447 | else | |
448 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2); | |
d9b7e4f7 | 449 | smi_info->si_state = SI_CHECKING_ENABLES; |
ee6cd5f8 CM |
450 | } |
451 | ||
0cfec916 | 452 | static void start_clear_flags(struct smi_info *smi_info, bool start_timer) |
1da177e4 LT |
453 | { |
454 | unsigned char msg[3]; | |
455 | ||
456 | /* Make sure the watchdog pre-timeout flag is not set at startup. */ | |
457 | msg[0] = (IPMI_NETFN_APP_REQUEST << 2); | |
458 | msg[1] = IPMI_CLEAR_MSG_FLAGS_CMD; | |
459 | msg[2] = WDT_PRE_TIMEOUT_INT; | |
460 | ||
0cfec916 CM |
461 | if (start_timer) |
462 | start_new_msg(smi_info, msg, 3); | |
463 | else | |
464 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 3); | |
1da177e4 LT |
465 | smi_info->si_state = SI_CLEARING_FLAGS; |
466 | } | |
467 | ||
968bf7cc CM |
468 | static void start_getting_msg_queue(struct smi_info *smi_info) |
469 | { | |
470 | smi_info->curr_msg->data[0] = (IPMI_NETFN_APP_REQUEST << 2); | |
471 | smi_info->curr_msg->data[1] = IPMI_GET_MSG_CMD; | |
472 | smi_info->curr_msg->data_size = 2; | |
473 | ||
0cfec916 CM |
474 | start_new_msg(smi_info, smi_info->curr_msg->data, |
475 | smi_info->curr_msg->data_size); | |
968bf7cc CM |
476 | smi_info->si_state = SI_GETTING_MESSAGES; |
477 | } | |
478 | ||
479 | static void start_getting_events(struct smi_info *smi_info) | |
480 | { | |
481 | smi_info->curr_msg->data[0] = (IPMI_NETFN_APP_REQUEST << 2); | |
482 | smi_info->curr_msg->data[1] = IPMI_READ_EVENT_MSG_BUFFER_CMD; | |
483 | smi_info->curr_msg->data_size = 2; | |
484 | ||
0cfec916 CM |
485 | start_new_msg(smi_info, smi_info->curr_msg->data, |
486 | smi_info->curr_msg->data_size); | |
968bf7cc CM |
487 | smi_info->si_state = SI_GETTING_EVENTS; |
488 | } | |
489 | ||
c305e3d3 CM |
490 | /* |
491 | * When we have a situtaion where we run out of memory and cannot | |
492 | * allocate messages, we just leave them in the BMC and run the system | |
493 | * polled until we can allocate some memory. Once we have some | |
494 | * memory, we will re-enable the interrupt. | |
1e7d6a45 CM |
495 | * |
496 | * Note that we cannot just use disable_irq(), since the interrupt may | |
497 | * be shared. | |
c305e3d3 | 498 | */ |
0cfec916 | 499 | static inline bool disable_si_irq(struct smi_info *smi_info, bool start_timer) |
1da177e4 | 500 | { |
b0defcdb | 501 | if ((smi_info->irq) && (!smi_info->interrupt_disabled)) { |
7aefac26 | 502 | smi_info->interrupt_disabled = true; |
0cfec916 | 503 | start_check_enables(smi_info, start_timer); |
968bf7cc | 504 | return true; |
1da177e4 | 505 | } |
968bf7cc | 506 | return false; |
1da177e4 LT |
507 | } |
508 | ||
968bf7cc | 509 | static inline bool enable_si_irq(struct smi_info *smi_info) |
1da177e4 LT |
510 | { |
511 | if ((smi_info->irq) && (smi_info->interrupt_disabled)) { | |
7aefac26 | 512 | smi_info->interrupt_disabled = false; |
0cfec916 | 513 | start_check_enables(smi_info, true); |
968bf7cc CM |
514 | return true; |
515 | } | |
516 | return false; | |
517 | } | |
518 | ||
519 | /* | |
520 | * Allocate a message. If unable to allocate, start the interrupt | |
521 | * disable process and return NULL. If able to allocate but | |
522 | * interrupts are disabled, free the message and return NULL after | |
523 | * starting the interrupt enable process. | |
524 | */ | |
525 | static struct ipmi_smi_msg *alloc_msg_handle_irq(struct smi_info *smi_info) | |
526 | { | |
527 | struct ipmi_smi_msg *msg; | |
528 | ||
529 | msg = ipmi_alloc_smi_msg(); | |
530 | if (!msg) { | |
0cfec916 | 531 | if (!disable_si_irq(smi_info, true)) |
968bf7cc CM |
532 | smi_info->si_state = SI_NORMAL; |
533 | } else if (enable_si_irq(smi_info)) { | |
534 | ipmi_free_smi_msg(msg); | |
535 | msg = NULL; | |
1da177e4 | 536 | } |
968bf7cc | 537 | return msg; |
1da177e4 LT |
538 | } |
539 | ||
540 | static void handle_flags(struct smi_info *smi_info) | |
541 | { | |
76824852 | 542 | retry: |
1da177e4 LT |
543 | if (smi_info->msg_flags & WDT_PRE_TIMEOUT_INT) { |
544 | /* Watchdog pre-timeout */ | |
64959e2d | 545 | smi_inc_stat(smi_info, watchdog_pretimeouts); |
1da177e4 | 546 | |
0cfec916 | 547 | start_clear_flags(smi_info, true); |
1da177e4 | 548 | smi_info->msg_flags &= ~WDT_PRE_TIMEOUT_INT; |
968bf7cc CM |
549 | if (smi_info->intf) |
550 | ipmi_smi_watchdog_pretimeout(smi_info->intf); | |
1da177e4 LT |
551 | } else if (smi_info->msg_flags & RECEIVE_MSG_AVAIL) { |
552 | /* Messages available. */ | |
968bf7cc CM |
553 | smi_info->curr_msg = alloc_msg_handle_irq(smi_info); |
554 | if (!smi_info->curr_msg) | |
1da177e4 | 555 | return; |
1da177e4 | 556 | |
968bf7cc | 557 | start_getting_msg_queue(smi_info); |
1da177e4 LT |
558 | } else if (smi_info->msg_flags & EVENT_MSG_BUFFER_FULL) { |
559 | /* Events available. */ | |
968bf7cc CM |
560 | smi_info->curr_msg = alloc_msg_handle_irq(smi_info); |
561 | if (!smi_info->curr_msg) | |
1da177e4 | 562 | return; |
1da177e4 | 563 | |
968bf7cc | 564 | start_getting_events(smi_info); |
4064d5ef | 565 | } else if (smi_info->msg_flags & OEM_DATA_AVAIL && |
c305e3d3 | 566 | smi_info->oem_data_avail_handler) { |
4064d5ef CM |
567 | if (smi_info->oem_data_avail_handler(smi_info)) |
568 | goto retry; | |
c305e3d3 | 569 | } else |
1da177e4 | 570 | smi_info->si_state = SI_NORMAL; |
1da177e4 LT |
571 | } |
572 | ||
d9b7e4f7 CM |
573 | /* |
574 | * Global enables we care about. | |
575 | */ | |
576 | #define GLOBAL_ENABLES_MASK (IPMI_BMC_EVT_MSG_BUFF | IPMI_BMC_RCV_MSG_INTR | \ | |
577 | IPMI_BMC_EVT_MSG_INTR) | |
578 | ||
95c97b59 CM |
579 | static u8 current_global_enables(struct smi_info *smi_info, u8 base, |
580 | bool *irq_on) | |
d9b7e4f7 CM |
581 | { |
582 | u8 enables = 0; | |
583 | ||
584 | if (smi_info->supports_event_msg_buff) | |
585 | enables |= IPMI_BMC_EVT_MSG_BUFF; | |
d9b7e4f7 | 586 | |
d0882897 CM |
587 | if (((smi_info->irq && !smi_info->interrupt_disabled) || |
588 | smi_info->cannot_disable_irq) && | |
589 | !smi_info->irq_enable_broken) | |
d9b7e4f7 | 590 | enables |= IPMI_BMC_RCV_MSG_INTR; |
d9b7e4f7 CM |
591 | |
592 | if (smi_info->supports_event_msg_buff && | |
d0882897 CM |
593 | smi_info->irq && !smi_info->interrupt_disabled && |
594 | !smi_info->irq_enable_broken) | |
d9b7e4f7 | 595 | enables |= IPMI_BMC_EVT_MSG_INTR; |
d9b7e4f7 | 596 | |
95c97b59 CM |
597 | *irq_on = enables & (IPMI_BMC_EVT_MSG_INTR | IPMI_BMC_RCV_MSG_INTR); |
598 | ||
d9b7e4f7 CM |
599 | return enables; |
600 | } | |
601 | ||
95c97b59 CM |
602 | static void check_bt_irq(struct smi_info *smi_info, bool irq_on) |
603 | { | |
604 | u8 irqstate = smi_info->io.inputb(&smi_info->io, IPMI_BT_INTMASK_REG); | |
605 | ||
606 | irqstate &= IPMI_BT_INTMASK_ENABLE_IRQ_BIT; | |
607 | ||
608 | if ((bool)irqstate == irq_on) | |
609 | return; | |
610 | ||
611 | if (irq_on) | |
612 | smi_info->io.outputb(&smi_info->io, IPMI_BT_INTMASK_REG, | |
613 | IPMI_BT_INTMASK_ENABLE_IRQ_BIT); | |
614 | else | |
615 | smi_info->io.outputb(&smi_info->io, IPMI_BT_INTMASK_REG, 0); | |
616 | } | |
617 | ||
1da177e4 LT |
618 | static void handle_transaction_done(struct smi_info *smi_info) |
619 | { | |
620 | struct ipmi_smi_msg *msg; | |
1da177e4 | 621 | |
f93aae9f | 622 | debug_timestamp("Done"); |
1da177e4 LT |
623 | switch (smi_info->si_state) { |
624 | case SI_NORMAL: | |
b0defcdb | 625 | if (!smi_info->curr_msg) |
1da177e4 LT |
626 | break; |
627 | ||
628 | smi_info->curr_msg->rsp_size | |
629 | = smi_info->handlers->get_result( | |
630 | smi_info->si_sm, | |
631 | smi_info->curr_msg->rsp, | |
632 | IPMI_MAX_MSG_LENGTH); | |
633 | ||
c305e3d3 CM |
634 | /* |
635 | * Do this here becase deliver_recv_msg() releases the | |
636 | * lock, and a new message can be put in during the | |
637 | * time the lock is released. | |
638 | */ | |
1da177e4 LT |
639 | msg = smi_info->curr_msg; |
640 | smi_info->curr_msg = NULL; | |
641 | deliver_recv_msg(smi_info, msg); | |
642 | break; | |
643 | ||
644 | case SI_GETTING_FLAGS: | |
645 | { | |
646 | unsigned char msg[4]; | |
647 | unsigned int len; | |
648 | ||
649 | /* We got the flags from the SMI, now handle them. */ | |
650 | len = smi_info->handlers->get_result(smi_info->si_sm, msg, 4); | |
651 | if (msg[2] != 0) { | |
c305e3d3 | 652 | /* Error fetching flags, just give up for now. */ |
1da177e4 LT |
653 | smi_info->si_state = SI_NORMAL; |
654 | } else if (len < 4) { | |
c305e3d3 CM |
655 | /* |
656 | * Hmm, no flags. That's technically illegal, but | |
657 | * don't use uninitialized data. | |
658 | */ | |
1da177e4 LT |
659 | smi_info->si_state = SI_NORMAL; |
660 | } else { | |
661 | smi_info->msg_flags = msg[3]; | |
662 | handle_flags(smi_info); | |
663 | } | |
664 | break; | |
665 | } | |
666 | ||
667 | case SI_CLEARING_FLAGS: | |
1da177e4 LT |
668 | { |
669 | unsigned char msg[3]; | |
670 | ||
671 | /* We cleared the flags. */ | |
672 | smi_info->handlers->get_result(smi_info->si_sm, msg, 3); | |
673 | if (msg[2] != 0) { | |
674 | /* Error clearing flags */ | |
279fbd0c MS |
675 | dev_warn(smi_info->dev, |
676 | "Error clearing flags: %2.2x\n", msg[2]); | |
1da177e4 | 677 | } |
d9b7e4f7 | 678 | smi_info->si_state = SI_NORMAL; |
1da177e4 LT |
679 | break; |
680 | } | |
681 | ||
682 | case SI_GETTING_EVENTS: | |
683 | { | |
684 | smi_info->curr_msg->rsp_size | |
685 | = smi_info->handlers->get_result( | |
686 | smi_info->si_sm, | |
687 | smi_info->curr_msg->rsp, | |
688 | IPMI_MAX_MSG_LENGTH); | |
689 | ||
c305e3d3 CM |
690 | /* |
691 | * Do this here becase deliver_recv_msg() releases the | |
692 | * lock, and a new message can be put in during the | |
693 | * time the lock is released. | |
694 | */ | |
1da177e4 LT |
695 | msg = smi_info->curr_msg; |
696 | smi_info->curr_msg = NULL; | |
697 | if (msg->rsp[2] != 0) { | |
698 | /* Error getting event, probably done. */ | |
699 | msg->done(msg); | |
700 | ||
701 | /* Take off the event flag. */ | |
702 | smi_info->msg_flags &= ~EVENT_MSG_BUFFER_FULL; | |
703 | handle_flags(smi_info); | |
704 | } else { | |
64959e2d | 705 | smi_inc_stat(smi_info, events); |
1da177e4 | 706 | |
c305e3d3 CM |
707 | /* |
708 | * Do this before we deliver the message | |
709 | * because delivering the message releases the | |
710 | * lock and something else can mess with the | |
711 | * state. | |
712 | */ | |
1da177e4 LT |
713 | handle_flags(smi_info); |
714 | ||
715 | deliver_recv_msg(smi_info, msg); | |
716 | } | |
717 | break; | |
718 | } | |
719 | ||
720 | case SI_GETTING_MESSAGES: | |
721 | { | |
722 | smi_info->curr_msg->rsp_size | |
723 | = smi_info->handlers->get_result( | |
724 | smi_info->si_sm, | |
725 | smi_info->curr_msg->rsp, | |
726 | IPMI_MAX_MSG_LENGTH); | |
727 | ||
c305e3d3 CM |
728 | /* |
729 | * Do this here becase deliver_recv_msg() releases the | |
730 | * lock, and a new message can be put in during the | |
731 | * time the lock is released. | |
732 | */ | |
1da177e4 LT |
733 | msg = smi_info->curr_msg; |
734 | smi_info->curr_msg = NULL; | |
735 | if (msg->rsp[2] != 0) { | |
736 | /* Error getting event, probably done. */ | |
737 | msg->done(msg); | |
738 | ||
739 | /* Take off the msg flag. */ | |
740 | smi_info->msg_flags &= ~RECEIVE_MSG_AVAIL; | |
741 | handle_flags(smi_info); | |
742 | } else { | |
64959e2d | 743 | smi_inc_stat(smi_info, incoming_messages); |
1da177e4 | 744 | |
c305e3d3 CM |
745 | /* |
746 | * Do this before we deliver the message | |
747 | * because delivering the message releases the | |
748 | * lock and something else can mess with the | |
749 | * state. | |
750 | */ | |
1da177e4 LT |
751 | handle_flags(smi_info); |
752 | ||
753 | deliver_recv_msg(smi_info, msg); | |
754 | } | |
755 | break; | |
756 | } | |
757 | ||
d9b7e4f7 | 758 | case SI_CHECKING_ENABLES: |
1da177e4 LT |
759 | { |
760 | unsigned char msg[4]; | |
d9b7e4f7 | 761 | u8 enables; |
95c97b59 | 762 | bool irq_on; |
1da177e4 LT |
763 | |
764 | /* We got the flags from the SMI, now handle them. */ | |
765 | smi_info->handlers->get_result(smi_info->si_sm, msg, 4); | |
766 | if (msg[2] != 0) { | |
0849bfec CM |
767 | dev_warn(smi_info->dev, |
768 | "Couldn't get irq info: %x.\n", msg[2]); | |
769 | dev_warn(smi_info->dev, | |
770 | "Maybe ok, but ipmi might run very slowly.\n"); | |
1da177e4 | 771 | smi_info->si_state = SI_NORMAL; |
d9b7e4f7 CM |
772 | break; |
773 | } | |
95c97b59 CM |
774 | enables = current_global_enables(smi_info, 0, &irq_on); |
775 | if (smi_info->si_type == SI_BT) | |
776 | /* BT has its own interrupt enable bit. */ | |
777 | check_bt_irq(smi_info, irq_on); | |
d9b7e4f7 CM |
778 | if (enables != (msg[3] & GLOBAL_ENABLES_MASK)) { |
779 | /* Enables are not correct, fix them. */ | |
1da177e4 LT |
780 | msg[0] = (IPMI_NETFN_APP_REQUEST << 2); |
781 | msg[1] = IPMI_SET_BMC_GLOBAL_ENABLES_CMD; | |
d9b7e4f7 | 782 | msg[2] = enables | (msg[3] & ~GLOBAL_ENABLES_MASK); |
1da177e4 LT |
783 | smi_info->handlers->start_transaction( |
784 | smi_info->si_sm, msg, 3); | |
d9b7e4f7 CM |
785 | smi_info->si_state = SI_SETTING_ENABLES; |
786 | } else if (smi_info->supports_event_msg_buff) { | |
787 | smi_info->curr_msg = ipmi_alloc_smi_msg(); | |
788 | if (!smi_info->curr_msg) { | |
789 | smi_info->si_state = SI_NORMAL; | |
790 | break; | |
791 | } | |
792 | start_getting_msg_queue(smi_info); | |
793 | } else { | |
794 | smi_info->si_state = SI_NORMAL; | |
1da177e4 LT |
795 | } |
796 | break; | |
797 | } | |
798 | ||
d9b7e4f7 | 799 | case SI_SETTING_ENABLES: |
1da177e4 LT |
800 | { |
801 | unsigned char msg[4]; | |
802 | ||
1da177e4 | 803 | smi_info->handlers->get_result(smi_info->si_sm, msg, 4); |
d9b7e4f7 | 804 | if (msg[2] != 0) |
0849bfec | 805 | dev_warn(smi_info->dev, |
d9b7e4f7 CM |
806 | "Could not set the global enables: 0x%x.\n", |
807 | msg[2]); | |
808 | ||
809 | if (smi_info->supports_event_msg_buff) { | |
810 | smi_info->curr_msg = ipmi_alloc_smi_msg(); | |
811 | if (!smi_info->curr_msg) { | |
812 | smi_info->si_state = SI_NORMAL; | |
813 | break; | |
814 | } | |
815 | start_getting_msg_queue(smi_info); | |
ee6cd5f8 | 816 | } else { |
d9b7e4f7 | 817 | smi_info->si_state = SI_NORMAL; |
ee6cd5f8 | 818 | } |
ee6cd5f8 CM |
819 | break; |
820 | } | |
1da177e4 LT |
821 | } |
822 | } | |
823 | ||
c305e3d3 CM |
824 | /* |
825 | * Called on timeouts and events. Timeouts should pass the elapsed | |
826 | * time, interrupts should pass in zero. Must be called with | |
827 | * si_lock held and interrupts disabled. | |
828 | */ | |
1da177e4 LT |
829 | static enum si_sm_result smi_event_handler(struct smi_info *smi_info, |
830 | int time) | |
831 | { | |
832 | enum si_sm_result si_sm_result; | |
833 | ||
76824852 | 834 | restart: |
c305e3d3 CM |
835 | /* |
836 | * There used to be a loop here that waited a little while | |
837 | * (around 25us) before giving up. That turned out to be | |
838 | * pointless, the minimum delays I was seeing were in the 300us | |
839 | * range, which is far too long to wait in an interrupt. So | |
840 | * we just run until the state machine tells us something | |
841 | * happened or it needs a delay. | |
842 | */ | |
1da177e4 LT |
843 | si_sm_result = smi_info->handlers->event(smi_info->si_sm, time); |
844 | time = 0; | |
845 | while (si_sm_result == SI_SM_CALL_WITHOUT_DELAY) | |
1da177e4 | 846 | si_sm_result = smi_info->handlers->event(smi_info->si_sm, 0); |
1da177e4 | 847 | |
c305e3d3 | 848 | if (si_sm_result == SI_SM_TRANSACTION_COMPLETE) { |
64959e2d | 849 | smi_inc_stat(smi_info, complete_transactions); |
1da177e4 LT |
850 | |
851 | handle_transaction_done(smi_info); | |
d9dffd2a | 852 | goto restart; |
c305e3d3 | 853 | } else if (si_sm_result == SI_SM_HOSED) { |
64959e2d | 854 | smi_inc_stat(smi_info, hosed_count); |
1da177e4 | 855 | |
c305e3d3 CM |
856 | /* |
857 | * Do the before return_hosed_msg, because that | |
858 | * releases the lock. | |
859 | */ | |
1da177e4 LT |
860 | smi_info->si_state = SI_NORMAL; |
861 | if (smi_info->curr_msg != NULL) { | |
c305e3d3 CM |
862 | /* |
863 | * If we were handling a user message, format | |
864 | * a response to send to the upper layer to | |
865 | * tell it about the error. | |
866 | */ | |
4d7cbac7 | 867 | return_hosed_msg(smi_info, IPMI_ERR_UNSPECIFIED); |
1da177e4 | 868 | } |
d9dffd2a | 869 | goto restart; |
1da177e4 LT |
870 | } |
871 | ||
4ea18425 CM |
872 | /* |
873 | * We prefer handling attn over new messages. But don't do | |
874 | * this if there is not yet an upper layer to handle anything. | |
875 | */ | |
a8df150c CM |
876 | if (likely(smi_info->intf) && |
877 | (si_sm_result == SI_SM_ATTN || smi_info->got_attn)) { | |
1da177e4 LT |
878 | unsigned char msg[2]; |
879 | ||
a8df150c CM |
880 | if (smi_info->si_state != SI_NORMAL) { |
881 | /* | |
882 | * We got an ATTN, but we are doing something else. | |
883 | * Handle the ATTN later. | |
884 | */ | |
885 | smi_info->got_attn = true; | |
886 | } else { | |
887 | smi_info->got_attn = false; | |
888 | smi_inc_stat(smi_info, attentions); | |
1da177e4 | 889 | |
a8df150c CM |
890 | /* |
891 | * Got a attn, send down a get message flags to see | |
892 | * what's causing it. It would be better to handle | |
893 | * this in the upper layer, but due to the way | |
894 | * interrupts work with the SMI, that's not really | |
895 | * possible. | |
896 | */ | |
897 | msg[0] = (IPMI_NETFN_APP_REQUEST << 2); | |
898 | msg[1] = IPMI_GET_MSG_FLAGS_CMD; | |
1da177e4 | 899 | |
0cfec916 | 900 | start_new_msg(smi_info, msg, 2); |
a8df150c CM |
901 | smi_info->si_state = SI_GETTING_FLAGS; |
902 | goto restart; | |
903 | } | |
1da177e4 LT |
904 | } |
905 | ||
906 | /* If we are currently idle, try to start the next message. */ | |
907 | if (si_sm_result == SI_SM_IDLE) { | |
64959e2d | 908 | smi_inc_stat(smi_info, idles); |
1da177e4 LT |
909 | |
910 | si_sm_result = start_next_msg(smi_info); | |
911 | if (si_sm_result != SI_SM_IDLE) | |
912 | goto restart; | |
c305e3d3 | 913 | } |
1da177e4 LT |
914 | |
915 | if ((si_sm_result == SI_SM_IDLE) | |
c305e3d3 CM |
916 | && (atomic_read(&smi_info->req_events))) { |
917 | /* | |
918 | * We are idle and the upper layer requested that I fetch | |
919 | * events, so do so. | |
920 | */ | |
55162fb1 | 921 | atomic_set(&smi_info->req_events, 0); |
1da177e4 | 922 | |
d9b7e4f7 CM |
923 | /* |
924 | * Take this opportunity to check the interrupt and | |
925 | * message enable state for the BMC. The BMC can be | |
926 | * asynchronously reset, and may thus get interrupts | |
927 | * disable and messages disabled. | |
928 | */ | |
929 | if (smi_info->supports_event_msg_buff || smi_info->irq) { | |
0cfec916 | 930 | start_check_enables(smi_info, true); |
d9b7e4f7 CM |
931 | } else { |
932 | smi_info->curr_msg = alloc_msg_handle_irq(smi_info); | |
933 | if (!smi_info->curr_msg) | |
934 | goto out; | |
1da177e4 | 935 | |
d9b7e4f7 CM |
936 | start_getting_events(smi_info); |
937 | } | |
1da177e4 LT |
938 | goto restart; |
939 | } | |
314ef52f CM |
940 | |
941 | if (si_sm_result == SI_SM_IDLE && smi_info->timer_running) { | |
942 | /* Ok it if fails, the timer will just go off. */ | |
943 | if (del_timer(&smi_info->si_timer)) | |
944 | smi_info->timer_running = false; | |
945 | } | |
946 | ||
76824852 | 947 | out: |
1da177e4 LT |
948 | return si_sm_result; |
949 | } | |
950 | ||
89986496 CM |
951 | static void check_start_timer_thread(struct smi_info *smi_info) |
952 | { | |
953 | if (smi_info->si_state == SI_NORMAL && smi_info->curr_msg == NULL) { | |
954 | smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES); | |
955 | ||
956 | if (smi_info->thread) | |
957 | wake_up_process(smi_info->thread); | |
958 | ||
959 | start_next_msg(smi_info); | |
960 | smi_event_handler(smi_info, 0); | |
961 | } | |
962 | } | |
963 | ||
82802f96 | 964 | static void flush_messages(void *send_info) |
e45361d7 | 965 | { |
82802f96 | 966 | struct smi_info *smi_info = send_info; |
e45361d7 HK |
967 | enum si_sm_result result; |
968 | ||
969 | /* | |
970 | * Currently, this function is called only in run-to-completion | |
971 | * mode. This means we are single-threaded, no need for locks. | |
972 | */ | |
973 | result = smi_event_handler(smi_info, 0); | |
974 | while (result != SI_SM_IDLE) { | |
975 | udelay(SI_SHORT_TIMEOUT_USEC); | |
976 | result = smi_event_handler(smi_info, SI_SHORT_TIMEOUT_USEC); | |
977 | } | |
978 | } | |
979 | ||
1da177e4 | 980 | static void sender(void *send_info, |
99ab32f3 | 981 | struct ipmi_smi_msg *msg) |
1da177e4 LT |
982 | { |
983 | struct smi_info *smi_info = send_info; | |
1da177e4 | 984 | unsigned long flags; |
1da177e4 | 985 | |
f93aae9f | 986 | debug_timestamp("Enqueue"); |
1da177e4 LT |
987 | |
988 | if (smi_info->run_to_completion) { | |
bda4c30a | 989 | /* |
82802f96 HK |
990 | * If we are running to completion, start it. Upper |
991 | * layer will call flush_messages to clear it out. | |
bda4c30a | 992 | */ |
9f812704 | 993 | smi_info->waiting_msg = msg; |
1da177e4 | 994 | return; |
1da177e4 | 995 | } |
1da177e4 | 996 | |
f60adf42 | 997 | spin_lock_irqsave(&smi_info->si_lock, flags); |
1d86e29b CM |
998 | /* |
999 | * The following two lines don't need to be under the lock for | |
1000 | * the lock's sake, but they do need SMP memory barriers to | |
1001 | * avoid getting things out of order. We are already claiming | |
1002 | * the lock, anyway, so just do it under the lock to avoid the | |
1003 | * ordering problem. | |
1004 | */ | |
1005 | BUG_ON(smi_info->waiting_msg); | |
1006 | smi_info->waiting_msg = msg; | |
89986496 | 1007 | check_start_timer_thread(smi_info); |
bda4c30a | 1008 | spin_unlock_irqrestore(&smi_info->si_lock, flags); |
1da177e4 LT |
1009 | } |
1010 | ||
7aefac26 | 1011 | static void set_run_to_completion(void *send_info, bool i_run_to_completion) |
1da177e4 LT |
1012 | { |
1013 | struct smi_info *smi_info = send_info; | |
1da177e4 LT |
1014 | |
1015 | smi_info->run_to_completion = i_run_to_completion; | |
e45361d7 HK |
1016 | if (i_run_to_completion) |
1017 | flush_messages(smi_info); | |
1da177e4 LT |
1018 | } |
1019 | ||
ae74e823 MW |
1020 | /* |
1021 | * Use -1 in the nsec value of the busy waiting timespec to tell that | |
1022 | * we are spinning in kipmid looking for something and not delaying | |
1023 | * between checks | |
1024 | */ | |
48862ea2 | 1025 | static inline void ipmi_si_set_not_busy(struct timespec64 *ts) |
ae74e823 MW |
1026 | { |
1027 | ts->tv_nsec = -1; | |
1028 | } | |
48862ea2 | 1029 | static inline int ipmi_si_is_busy(struct timespec64 *ts) |
ae74e823 MW |
1030 | { |
1031 | return ts->tv_nsec != -1; | |
1032 | } | |
1033 | ||
cc4cbe90 AB |
1034 | static inline int ipmi_thread_busy_wait(enum si_sm_result smi_result, |
1035 | const struct smi_info *smi_info, | |
48862ea2 | 1036 | struct timespec64 *busy_until) |
ae74e823 MW |
1037 | { |
1038 | unsigned int max_busy_us = 0; | |
1039 | ||
1040 | if (smi_info->intf_num < num_max_busy_us) | |
1041 | max_busy_us = kipmid_max_busy_us[smi_info->intf_num]; | |
1042 | if (max_busy_us == 0 || smi_result != SI_SM_CALL_WITH_DELAY) | |
1043 | ipmi_si_set_not_busy(busy_until); | |
1044 | else if (!ipmi_si_is_busy(busy_until)) { | |
48862ea2 JS |
1045 | getnstimeofday64(busy_until); |
1046 | timespec64_add_ns(busy_until, max_busy_us*NSEC_PER_USEC); | |
ae74e823 | 1047 | } else { |
48862ea2 JS |
1048 | struct timespec64 now; |
1049 | ||
1050 | getnstimeofday64(&now); | |
1051 | if (unlikely(timespec64_compare(&now, busy_until) > 0)) { | |
ae74e823 MW |
1052 | ipmi_si_set_not_busy(busy_until); |
1053 | return 0; | |
1054 | } | |
1055 | } | |
1056 | return 1; | |
1057 | } | |
1058 | ||
1059 | ||
1060 | /* | |
1061 | * A busy-waiting loop for speeding up IPMI operation. | |
1062 | * | |
1063 | * Lousy hardware makes this hard. This is only enabled for systems | |
1064 | * that are not BT and do not have interrupts. It starts spinning | |
1065 | * when an operation is complete or until max_busy tells it to stop | |
1066 | * (if that is enabled). See the paragraph on kimid_max_busy_us in | |
1067 | * Documentation/IPMI.txt for details. | |
1068 | */ | |
a9a2c44f CM |
1069 | static int ipmi_thread(void *data) |
1070 | { | |
1071 | struct smi_info *smi_info = data; | |
e9a705a0 | 1072 | unsigned long flags; |
a9a2c44f | 1073 | enum si_sm_result smi_result; |
48862ea2 | 1074 | struct timespec64 busy_until; |
a9a2c44f | 1075 | |
ae74e823 | 1076 | ipmi_si_set_not_busy(&busy_until); |
8698a745 | 1077 | set_user_nice(current, MAX_NICE); |
e9a705a0 | 1078 | while (!kthread_should_stop()) { |
ae74e823 MW |
1079 | int busy_wait; |
1080 | ||
a9a2c44f | 1081 | spin_lock_irqsave(&(smi_info->si_lock), flags); |
8a3628d5 | 1082 | smi_result = smi_event_handler(smi_info, 0); |
48e8ac29 BS |
1083 | |
1084 | /* | |
1085 | * If the driver is doing something, there is a possible | |
1086 | * race with the timer. If the timer handler see idle, | |
1087 | * and the thread here sees something else, the timer | |
1088 | * handler won't restart the timer even though it is | |
1089 | * required. So start it here if necessary. | |
1090 | */ | |
1091 | if (smi_result != SI_SM_IDLE && !smi_info->timer_running) | |
1092 | smi_mod_timer(smi_info, jiffies + SI_TIMEOUT_JIFFIES); | |
1093 | ||
a9a2c44f | 1094 | spin_unlock_irqrestore(&(smi_info->si_lock), flags); |
ae74e823 MW |
1095 | busy_wait = ipmi_thread_busy_wait(smi_result, smi_info, |
1096 | &busy_until); | |
c305e3d3 CM |
1097 | if (smi_result == SI_SM_CALL_WITHOUT_DELAY) |
1098 | ; /* do nothing */ | |
ae74e823 | 1099 | else if (smi_result == SI_SM_CALL_WITH_DELAY && busy_wait) |
33979734 | 1100 | schedule(); |
89986496 CM |
1101 | else if (smi_result == SI_SM_IDLE) { |
1102 | if (atomic_read(&smi_info->need_watch)) { | |
1103 | schedule_timeout_interruptible(100); | |
1104 | } else { | |
1105 | /* Wait to be woken up when we are needed. */ | |
1106 | __set_current_state(TASK_INTERRUPTIBLE); | |
1107 | schedule(); | |
1108 | } | |
1109 | } else | |
8d1f66dc | 1110 | schedule_timeout_interruptible(1); |
a9a2c44f | 1111 | } |
a9a2c44f CM |
1112 | return 0; |
1113 | } | |
1114 | ||
1115 | ||
1da177e4 LT |
1116 | static void poll(void *send_info) |
1117 | { | |
1118 | struct smi_info *smi_info = send_info; | |
f60adf42 | 1119 | unsigned long flags = 0; |
7aefac26 | 1120 | bool run_to_completion = smi_info->run_to_completion; |
1da177e4 | 1121 | |
15c62e10 CM |
1122 | /* |
1123 | * Make sure there is some delay in the poll loop so we can | |
1124 | * drive time forward and timeout things. | |
1125 | */ | |
1126 | udelay(10); | |
f60adf42 CM |
1127 | if (!run_to_completion) |
1128 | spin_lock_irqsave(&smi_info->si_lock, flags); | |
15c62e10 | 1129 | smi_event_handler(smi_info, 10); |
f60adf42 CM |
1130 | if (!run_to_completion) |
1131 | spin_unlock_irqrestore(&smi_info->si_lock, flags); | |
1da177e4 LT |
1132 | } |
1133 | ||
1134 | static void request_events(void *send_info) | |
1135 | { | |
1136 | struct smi_info *smi_info = send_info; | |
1137 | ||
b874b985 | 1138 | if (!smi_info->has_event_buffer) |
b361e27b CM |
1139 | return; |
1140 | ||
1da177e4 LT |
1141 | atomic_set(&smi_info->req_events, 1); |
1142 | } | |
1143 | ||
7aefac26 | 1144 | static void set_need_watch(void *send_info, bool enable) |
89986496 CM |
1145 | { |
1146 | struct smi_info *smi_info = send_info; | |
1147 | unsigned long flags; | |
1148 | ||
1149 | atomic_set(&smi_info->need_watch, enable); | |
1150 | spin_lock_irqsave(&smi_info->si_lock, flags); | |
1151 | check_start_timer_thread(smi_info); | |
1152 | spin_unlock_irqrestore(&smi_info->si_lock, flags); | |
1153 | } | |
1154 | ||
0c8204b3 | 1155 | static int initialized; |
1da177e4 | 1156 | |
1da177e4 LT |
1157 | static void smi_timeout(unsigned long data) |
1158 | { | |
1159 | struct smi_info *smi_info = (struct smi_info *) data; | |
1160 | enum si_sm_result smi_result; | |
1161 | unsigned long flags; | |
1162 | unsigned long jiffies_now; | |
c4edff1c | 1163 | long time_diff; |
3326f4f2 | 1164 | long timeout; |
1da177e4 | 1165 | |
1da177e4 | 1166 | spin_lock_irqsave(&(smi_info->si_lock), flags); |
f93aae9f JS |
1167 | debug_timestamp("Timer"); |
1168 | ||
1da177e4 | 1169 | jiffies_now = jiffies; |
c4edff1c | 1170 | time_diff = (((long)jiffies_now - (long)smi_info->last_timeout_jiffies) |
1da177e4 LT |
1171 | * SI_USEC_PER_JIFFY); |
1172 | smi_result = smi_event_handler(smi_info, time_diff); | |
1173 | ||
b0defcdb | 1174 | if ((smi_info->irq) && (!smi_info->interrupt_disabled)) { |
1da177e4 | 1175 | /* Running with interrupts, only do long timeouts. */ |
3326f4f2 | 1176 | timeout = jiffies + SI_TIMEOUT_JIFFIES; |
64959e2d | 1177 | smi_inc_stat(smi_info, long_timeouts); |
3326f4f2 | 1178 | goto do_mod_timer; |
1da177e4 LT |
1179 | } |
1180 | ||
c305e3d3 CM |
1181 | /* |
1182 | * If the state machine asks for a short delay, then shorten | |
1183 | * the timer timeout. | |
1184 | */ | |
1da177e4 | 1185 | if (smi_result == SI_SM_CALL_WITH_DELAY) { |
64959e2d | 1186 | smi_inc_stat(smi_info, short_timeouts); |
3326f4f2 | 1187 | timeout = jiffies + 1; |
1da177e4 | 1188 | } else { |
64959e2d | 1189 | smi_inc_stat(smi_info, long_timeouts); |
3326f4f2 | 1190 | timeout = jiffies + SI_TIMEOUT_JIFFIES; |
1da177e4 LT |
1191 | } |
1192 | ||
76824852 | 1193 | do_mod_timer: |
3326f4f2 | 1194 | if (smi_result != SI_SM_IDLE) |
48e8ac29 BS |
1195 | smi_mod_timer(smi_info, timeout); |
1196 | else | |
1197 | smi_info->timer_running = false; | |
1198 | spin_unlock_irqrestore(&(smi_info->si_lock), flags); | |
1da177e4 LT |
1199 | } |
1200 | ||
7d12e780 | 1201 | static irqreturn_t si_irq_handler(int irq, void *data) |
1da177e4 LT |
1202 | { |
1203 | struct smi_info *smi_info = data; | |
1204 | unsigned long flags; | |
1da177e4 LT |
1205 | |
1206 | spin_lock_irqsave(&(smi_info->si_lock), flags); | |
1207 | ||
64959e2d | 1208 | smi_inc_stat(smi_info, interrupts); |
1da177e4 | 1209 | |
f93aae9f JS |
1210 | debug_timestamp("Interrupt"); |
1211 | ||
1da177e4 | 1212 | smi_event_handler(smi_info, 0); |
1da177e4 LT |
1213 | spin_unlock_irqrestore(&(smi_info->si_lock), flags); |
1214 | return IRQ_HANDLED; | |
1215 | } | |
1216 | ||
7d12e780 | 1217 | static irqreturn_t si_bt_irq_handler(int irq, void *data) |
9dbf68f9 CM |
1218 | { |
1219 | struct smi_info *smi_info = data; | |
1220 | /* We need to clear the IRQ flag for the BT interface. */ | |
1221 | smi_info->io.outputb(&smi_info->io, IPMI_BT_INTMASK_REG, | |
1222 | IPMI_BT_INTMASK_CLEAR_IRQ_BIT | |
1223 | | IPMI_BT_INTMASK_ENABLE_IRQ_BIT); | |
7d12e780 | 1224 | return si_irq_handler(irq, data); |
9dbf68f9 CM |
1225 | } |
1226 | ||
453823ba CM |
1227 | static int smi_start_processing(void *send_info, |
1228 | ipmi_smi_t intf) | |
1229 | { | |
1230 | struct smi_info *new_smi = send_info; | |
a51f4a81 | 1231 | int enable = 0; |
453823ba CM |
1232 | |
1233 | new_smi->intf = intf; | |
1234 | ||
1235 | /* Set up the timer that drives the interface. */ | |
1236 | setup_timer(&new_smi->si_timer, smi_timeout, (long)new_smi); | |
48e8ac29 | 1237 | smi_mod_timer(new_smi, jiffies + SI_TIMEOUT_JIFFIES); |
453823ba | 1238 | |
27f972d3 JS |
1239 | /* Try to claim any interrupts. */ |
1240 | if (new_smi->irq_setup) | |
1241 | new_smi->irq_setup(new_smi); | |
1242 | ||
a51f4a81 CM |
1243 | /* |
1244 | * Check if the user forcefully enabled the daemon. | |
1245 | */ | |
1246 | if (new_smi->intf_num < num_force_kipmid) | |
1247 | enable = force_kipmid[new_smi->intf_num]; | |
df3fe8de CM |
1248 | /* |
1249 | * The BT interface is efficient enough to not need a thread, | |
1250 | * and there is no need for a thread if we have interrupts. | |
1251 | */ | |
c305e3d3 | 1252 | else if ((new_smi->si_type != SI_BT) && (!new_smi->irq)) |
a51f4a81 CM |
1253 | enable = 1; |
1254 | ||
1255 | if (enable) { | |
453823ba CM |
1256 | new_smi->thread = kthread_run(ipmi_thread, new_smi, |
1257 | "kipmi%d", new_smi->intf_num); | |
1258 | if (IS_ERR(new_smi->thread)) { | |
279fbd0c MS |
1259 | dev_notice(new_smi->dev, "Could not start" |
1260 | " kernel thread due to error %ld, only using" | |
1261 | " timers to drive the interface\n", | |
1262 | PTR_ERR(new_smi->thread)); | |
453823ba CM |
1263 | new_smi->thread = NULL; |
1264 | } | |
1265 | } | |
1266 | ||
1267 | return 0; | |
1268 | } | |
9dbf68f9 | 1269 | |
16f4232c ZY |
1270 | static int get_smi_info(void *send_info, struct ipmi_smi_info *data) |
1271 | { | |
1272 | struct smi_info *smi = send_info; | |
1273 | ||
1274 | data->addr_src = smi->addr_source; | |
1275 | data->dev = smi->dev; | |
1276 | data->addr_info = smi->addr_info; | |
1277 | get_device(smi->dev); | |
1278 | ||
1279 | return 0; | |
1280 | } | |
1281 | ||
7aefac26 | 1282 | static void set_maintenance_mode(void *send_info, bool enable) |
b9675136 CM |
1283 | { |
1284 | struct smi_info *smi_info = send_info; | |
1285 | ||
1286 | if (!enable) | |
1287 | atomic_set(&smi_info->req_events, 0); | |
1288 | } | |
1289 | ||
81d02b7f | 1290 | static const struct ipmi_smi_handlers handlers = { |
1da177e4 | 1291 | .owner = THIS_MODULE, |
453823ba | 1292 | .start_processing = smi_start_processing, |
16f4232c | 1293 | .get_smi_info = get_smi_info, |
1da177e4 LT |
1294 | .sender = sender, |
1295 | .request_events = request_events, | |
89986496 | 1296 | .set_need_watch = set_need_watch, |
b9675136 | 1297 | .set_maintenance_mode = set_maintenance_mode, |
1da177e4 | 1298 | .set_run_to_completion = set_run_to_completion, |
82802f96 | 1299 | .flush_messages = flush_messages, |
1da177e4 LT |
1300 | .poll = poll, |
1301 | }; | |
1302 | ||
c305e3d3 CM |
1303 | /* |
1304 | * There can be 4 IO ports passed in (with or without IRQs), 4 addresses, | |
1305 | * a default IO port, and 1 ACPI/SPMI address. That sets SI_MAX_DRIVERS. | |
1306 | */ | |
1da177e4 | 1307 | |
b0defcdb | 1308 | static LIST_HEAD(smi_infos); |
d6dfd131 | 1309 | static DEFINE_MUTEX(smi_infos_lock); |
b0defcdb | 1310 | static int smi_num; /* Used to sequence the SMIs */ |
1da177e4 | 1311 | |
1da177e4 | 1312 | #define DEFAULT_REGSPACING 1 |
dba9b4f6 | 1313 | #define DEFAULT_REGSIZE 1 |
1da177e4 | 1314 | |
d941aeae | 1315 | #ifdef CONFIG_ACPI |
fedb25ea | 1316 | static bool si_tryacpi = true; |
d941aeae CM |
1317 | #endif |
1318 | #ifdef CONFIG_DMI | |
fedb25ea | 1319 | static bool si_trydmi = true; |
d941aeae | 1320 | #endif |
fedb25ea | 1321 | static bool si_tryplatform = true; |
f2afae46 | 1322 | #ifdef CONFIG_PCI |
fedb25ea | 1323 | static bool si_trypci = true; |
f2afae46 | 1324 | #endif |
0dfe6e7e | 1325 | static bool si_trydefaults = IS_ENABLED(CONFIG_IPMI_SI_PROBE_DEFAULTS); |
1da177e4 LT |
1326 | static char *si_type[SI_MAX_PARMS]; |
1327 | #define MAX_SI_TYPE_STR 30 | |
1328 | static char si_type_str[MAX_SI_TYPE_STR]; | |
1329 | static unsigned long addrs[SI_MAX_PARMS]; | |
64a6f950 | 1330 | static unsigned int num_addrs; |
1da177e4 | 1331 | static unsigned int ports[SI_MAX_PARMS]; |
64a6f950 | 1332 | static unsigned int num_ports; |
1da177e4 | 1333 | static int irqs[SI_MAX_PARMS]; |
64a6f950 | 1334 | static unsigned int num_irqs; |
1da177e4 | 1335 | static int regspacings[SI_MAX_PARMS]; |
64a6f950 | 1336 | static unsigned int num_regspacings; |
1da177e4 | 1337 | static int regsizes[SI_MAX_PARMS]; |
64a6f950 | 1338 | static unsigned int num_regsizes; |
1da177e4 | 1339 | static int regshifts[SI_MAX_PARMS]; |
64a6f950 | 1340 | static unsigned int num_regshifts; |
2f95d513 | 1341 | static int slave_addrs[SI_MAX_PARMS]; /* Leaving 0 chooses the default value */ |
64a6f950 | 1342 | static unsigned int num_slave_addrs; |
1da177e4 | 1343 | |
b361e27b CM |
1344 | #define IPMI_IO_ADDR_SPACE 0 |
1345 | #define IPMI_MEM_ADDR_SPACE 1 | |
99ee6735 | 1346 | static const char * const addr_space_to_str[] = { "i/o", "mem" }; |
b361e27b CM |
1347 | |
1348 | static int hotmod_handler(const char *val, struct kernel_param *kp); | |
1349 | ||
1350 | module_param_call(hotmod, hotmod_handler, NULL, NULL, 0200); | |
1351 | MODULE_PARM_DESC(hotmod, "Add and remove interfaces. See" | |
1352 | " Documentation/IPMI.txt in the kernel sources for the" | |
1353 | " gory details."); | |
1da177e4 | 1354 | |
d941aeae CM |
1355 | #ifdef CONFIG_ACPI |
1356 | module_param_named(tryacpi, si_tryacpi, bool, 0); | |
1357 | MODULE_PARM_DESC(tryacpi, "Setting this to zero will disable the" | |
1358 | " default scan of the interfaces identified via ACPI"); | |
1359 | #endif | |
1360 | #ifdef CONFIG_DMI | |
1361 | module_param_named(trydmi, si_trydmi, bool, 0); | |
1362 | MODULE_PARM_DESC(trydmi, "Setting this to zero will disable the" | |
1363 | " default scan of the interfaces identified via DMI"); | |
1364 | #endif | |
f2afae46 | 1365 | module_param_named(tryplatform, si_tryplatform, bool, 0); |
f813655a | 1366 | MODULE_PARM_DESC(tryplatform, "Setting this to zero will disable the" |
f2afae46 CM |
1367 | " default scan of the interfaces identified via platform" |
1368 | " interfaces like openfirmware"); | |
1369 | #ifdef CONFIG_PCI | |
1370 | module_param_named(trypci, si_trypci, bool, 0); | |
f813655a | 1371 | MODULE_PARM_DESC(trypci, "Setting this to zero will disable the" |
f2afae46 CM |
1372 | " default scan of the interfaces identified via pci"); |
1373 | #endif | |
1da177e4 LT |
1374 | module_param_named(trydefaults, si_trydefaults, bool, 0); |
1375 | MODULE_PARM_DESC(trydefaults, "Setting this to 'false' will disable the" | |
1376 | " default scan of the KCS and SMIC interface at the standard" | |
1377 | " address"); | |
1378 | module_param_string(type, si_type_str, MAX_SI_TYPE_STR, 0); | |
1379 | MODULE_PARM_DESC(type, "Defines the type of each interface, each" | |
1380 | " interface separated by commas. The types are 'kcs'," | |
1381 | " 'smic', and 'bt'. For example si_type=kcs,bt will set" | |
1382 | " the first interface to kcs and the second to bt"); | |
64a6f950 | 1383 | module_param_array(addrs, ulong, &num_addrs, 0); |
1da177e4 LT |
1384 | MODULE_PARM_DESC(addrs, "Sets the memory address of each interface, the" |
1385 | " addresses separated by commas. Only use if an interface" | |
1386 | " is in memory. Otherwise, set it to zero or leave" | |
1387 | " it blank."); | |
64a6f950 | 1388 | module_param_array(ports, uint, &num_ports, 0); |
1da177e4 LT |
1389 | MODULE_PARM_DESC(ports, "Sets the port address of each interface, the" |
1390 | " addresses separated by commas. Only use if an interface" | |
1391 | " is a port. Otherwise, set it to zero or leave" | |
1392 | " it blank."); | |
1393 | module_param_array(irqs, int, &num_irqs, 0); | |
1394 | MODULE_PARM_DESC(irqs, "Sets the interrupt of each interface, the" | |
1395 | " addresses separated by commas. Only use if an interface" | |
1396 | " has an interrupt. Otherwise, set it to zero or leave" | |
1397 | " it blank."); | |
1398 | module_param_array(regspacings, int, &num_regspacings, 0); | |
1399 | MODULE_PARM_DESC(regspacings, "The number of bytes between the start address" | |
1400 | " and each successive register used by the interface. For" | |
1401 | " instance, if the start address is 0xca2 and the spacing" | |
1402 | " is 2, then the second address is at 0xca4. Defaults" | |
1403 | " to 1."); | |
1404 | module_param_array(regsizes, int, &num_regsizes, 0); | |
1405 | MODULE_PARM_DESC(regsizes, "The size of the specific IPMI register in bytes." | |
1406 | " This should generally be 1, 2, 4, or 8 for an 8-bit," | |
1407 | " 16-bit, 32-bit, or 64-bit register. Use this if you" | |
1408 | " the 8-bit IPMI register has to be read from a larger" | |
1409 | " register."); | |
1410 | module_param_array(regshifts, int, &num_regshifts, 0); | |
1411 | MODULE_PARM_DESC(regshifts, "The amount to shift the data read from the." | |
1412 | " IPMI register, in bits. For instance, if the data" | |
1413 | " is read from a 32-bit word and the IPMI data is in" | |
1414 | " bit 8-15, then the shift would be 8"); | |
1415 | module_param_array(slave_addrs, int, &num_slave_addrs, 0); | |
1416 | MODULE_PARM_DESC(slave_addrs, "Set the default IPMB slave address for" | |
1417 | " the controller. Normally this is 0x20, but can be" | |
1418 | " overridden by this parm. This is an array indexed" | |
1419 | " by interface number."); | |
a51f4a81 CM |
1420 | module_param_array(force_kipmid, int, &num_force_kipmid, 0); |
1421 | MODULE_PARM_DESC(force_kipmid, "Force the kipmi daemon to be enabled (1) or" | |
1422 | " disabled(0). Normally the IPMI driver auto-detects" | |
1423 | " this, but the value may be overridden by this parm."); | |
7aefac26 | 1424 | module_param(unload_when_empty, bool, 0); |
b361e27b CM |
1425 | MODULE_PARM_DESC(unload_when_empty, "Unload the module if no interfaces are" |
1426 | " specified or found, default is 1. Setting to 0" | |
1427 | " is useful for hot add of devices using hotmod."); | |
ae74e823 MW |
1428 | module_param_array(kipmid_max_busy_us, uint, &num_max_busy_us, 0644); |
1429 | MODULE_PARM_DESC(kipmid_max_busy_us, | |
1430 | "Max time (in microseconds) to busy-wait for IPMI data before" | |
1431 | " sleeping. 0 (default) means to wait forever. Set to 100-500" | |
1432 | " if kipmid is using up a lot of CPU time."); | |
1da177e4 LT |
1433 | |
1434 | ||
b0defcdb | 1435 | static void std_irq_cleanup(struct smi_info *info) |
1da177e4 | 1436 | { |
b0defcdb CM |
1437 | if (info->si_type == SI_BT) |
1438 | /* Disable the interrupt in the BT interface. */ | |
1439 | info->io.outputb(&info->io, IPMI_BT_INTMASK_REG, 0); | |
1440 | free_irq(info->irq, info); | |
1da177e4 | 1441 | } |
1da177e4 LT |
1442 | |
1443 | static int std_irq_setup(struct smi_info *info) | |
1444 | { | |
1445 | int rv; | |
1446 | ||
b0defcdb | 1447 | if (!info->irq) |
1da177e4 LT |
1448 | return 0; |
1449 | ||
9dbf68f9 CM |
1450 | if (info->si_type == SI_BT) { |
1451 | rv = request_irq(info->irq, | |
1452 | si_bt_irq_handler, | |
aa5b2bab | 1453 | IRQF_SHARED, |
9dbf68f9 CM |
1454 | DEVICE_NAME, |
1455 | info); | |
b0defcdb | 1456 | if (!rv) |
9dbf68f9 CM |
1457 | /* Enable the interrupt in the BT interface. */ |
1458 | info->io.outputb(&info->io, IPMI_BT_INTMASK_REG, | |
1459 | IPMI_BT_INTMASK_ENABLE_IRQ_BIT); | |
1460 | } else | |
1461 | rv = request_irq(info->irq, | |
1462 | si_irq_handler, | |
aa5b2bab | 1463 | IRQF_SHARED, |
9dbf68f9 CM |
1464 | DEVICE_NAME, |
1465 | info); | |
1da177e4 | 1466 | if (rv) { |
279fbd0c MS |
1467 | dev_warn(info->dev, "%s unable to claim interrupt %d," |
1468 | " running polled\n", | |
1469 | DEVICE_NAME, info->irq); | |
1da177e4 LT |
1470 | info->irq = 0; |
1471 | } else { | |
b0defcdb | 1472 | info->irq_cleanup = std_irq_cleanup; |
279fbd0c | 1473 | dev_info(info->dev, "Using irq %d\n", info->irq); |
1da177e4 LT |
1474 | } |
1475 | ||
1476 | return rv; | |
1477 | } | |
1478 | ||
81d02b7f | 1479 | static unsigned char port_inb(const struct si_sm_io *io, unsigned int offset) |
1da177e4 | 1480 | { |
b0defcdb | 1481 | unsigned int addr = io->addr_data; |
1da177e4 | 1482 | |
b0defcdb | 1483 | return inb(addr + (offset * io->regspacing)); |
1da177e4 LT |
1484 | } |
1485 | ||
81d02b7f | 1486 | static void port_outb(const struct si_sm_io *io, unsigned int offset, |
1da177e4 LT |
1487 | unsigned char b) |
1488 | { | |
b0defcdb | 1489 | unsigned int addr = io->addr_data; |
1da177e4 | 1490 | |
b0defcdb | 1491 | outb(b, addr + (offset * io->regspacing)); |
1da177e4 LT |
1492 | } |
1493 | ||
81d02b7f | 1494 | static unsigned char port_inw(const struct si_sm_io *io, unsigned int offset) |
1da177e4 | 1495 | { |
b0defcdb | 1496 | unsigned int addr = io->addr_data; |
1da177e4 | 1497 | |
b0defcdb | 1498 | return (inw(addr + (offset * io->regspacing)) >> io->regshift) & 0xff; |
1da177e4 LT |
1499 | } |
1500 | ||
81d02b7f | 1501 | static void port_outw(const struct si_sm_io *io, unsigned int offset, |
1da177e4 LT |
1502 | unsigned char b) |
1503 | { | |
b0defcdb | 1504 | unsigned int addr = io->addr_data; |
1da177e4 | 1505 | |
b0defcdb | 1506 | outw(b << io->regshift, addr + (offset * io->regspacing)); |
1da177e4 LT |
1507 | } |
1508 | ||
81d02b7f | 1509 | static unsigned char port_inl(const struct si_sm_io *io, unsigned int offset) |
1da177e4 | 1510 | { |
b0defcdb | 1511 | unsigned int addr = io->addr_data; |
1da177e4 | 1512 | |
b0defcdb | 1513 | return (inl(addr + (offset * io->regspacing)) >> io->regshift) & 0xff; |
1da177e4 LT |
1514 | } |
1515 | ||
81d02b7f | 1516 | static void port_outl(const struct si_sm_io *io, unsigned int offset, |
1da177e4 LT |
1517 | unsigned char b) |
1518 | { | |
b0defcdb | 1519 | unsigned int addr = io->addr_data; |
1da177e4 | 1520 | |
b0defcdb | 1521 | outl(b << io->regshift, addr+(offset * io->regspacing)); |
1da177e4 LT |
1522 | } |
1523 | ||
1524 | static void port_cleanup(struct smi_info *info) | |
1525 | { | |
b0defcdb | 1526 | unsigned int addr = info->io.addr_data; |
d61a3ead | 1527 | int idx; |
1da177e4 | 1528 | |
b0defcdb | 1529 | if (addr) { |
c305e3d3 | 1530 | for (idx = 0; idx < info->io_size; idx++) |
d61a3ead CM |
1531 | release_region(addr + idx * info->io.regspacing, |
1532 | info->io.regsize); | |
1da177e4 | 1533 | } |
1da177e4 LT |
1534 | } |
1535 | ||
1536 | static int port_setup(struct smi_info *info) | |
1537 | { | |
b0defcdb | 1538 | unsigned int addr = info->io.addr_data; |
d61a3ead | 1539 | int idx; |
1da177e4 | 1540 | |
b0defcdb | 1541 | if (!addr) |
1da177e4 LT |
1542 | return -ENODEV; |
1543 | ||
1544 | info->io_cleanup = port_cleanup; | |
1545 | ||
c305e3d3 CM |
1546 | /* |
1547 | * Figure out the actual inb/inw/inl/etc routine to use based | |
1548 | * upon the register size. | |
1549 | */ | |
1da177e4 LT |
1550 | switch (info->io.regsize) { |
1551 | case 1: | |
1552 | info->io.inputb = port_inb; | |
1553 | info->io.outputb = port_outb; | |
1554 | break; | |
1555 | case 2: | |
1556 | info->io.inputb = port_inw; | |
1557 | info->io.outputb = port_outw; | |
1558 | break; | |
1559 | case 4: | |
1560 | info->io.inputb = port_inl; | |
1561 | info->io.outputb = port_outl; | |
1562 | break; | |
1563 | default: | |
279fbd0c MS |
1564 | dev_warn(info->dev, "Invalid register size: %d\n", |
1565 | info->io.regsize); | |
1da177e4 LT |
1566 | return -EINVAL; |
1567 | } | |
1568 | ||
c305e3d3 CM |
1569 | /* |
1570 | * Some BIOSes reserve disjoint I/O regions in their ACPI | |
d61a3ead CM |
1571 | * tables. This causes problems when trying to register the |
1572 | * entire I/O region. Therefore we must register each I/O | |
1573 | * port separately. | |
1574 | */ | |
c305e3d3 | 1575 | for (idx = 0; idx < info->io_size; idx++) { |
d61a3ead CM |
1576 | if (request_region(addr + idx * info->io.regspacing, |
1577 | info->io.regsize, DEVICE_NAME) == NULL) { | |
1578 | /* Undo allocations */ | |
76824852 | 1579 | while (idx--) |
d61a3ead CM |
1580 | release_region(addr + idx * info->io.regspacing, |
1581 | info->io.regsize); | |
d61a3ead CM |
1582 | return -EIO; |
1583 | } | |
1584 | } | |
1da177e4 LT |
1585 | return 0; |
1586 | } | |
1587 | ||
81d02b7f CM |
1588 | static unsigned char intf_mem_inb(const struct si_sm_io *io, |
1589 | unsigned int offset) | |
1da177e4 LT |
1590 | { |
1591 | return readb((io->addr)+(offset * io->regspacing)); | |
1592 | } | |
1593 | ||
81d02b7f CM |
1594 | static void intf_mem_outb(const struct si_sm_io *io, unsigned int offset, |
1595 | unsigned char b) | |
1da177e4 LT |
1596 | { |
1597 | writeb(b, (io->addr)+(offset * io->regspacing)); | |
1598 | } | |
1599 | ||
81d02b7f CM |
1600 | static unsigned char intf_mem_inw(const struct si_sm_io *io, |
1601 | unsigned int offset) | |
1da177e4 LT |
1602 | { |
1603 | return (readw((io->addr)+(offset * io->regspacing)) >> io->regshift) | |
64d9fe69 | 1604 | & 0xff; |
1da177e4 LT |
1605 | } |
1606 | ||
81d02b7f CM |
1607 | static void intf_mem_outw(const struct si_sm_io *io, unsigned int offset, |
1608 | unsigned char b) | |
1da177e4 LT |
1609 | { |
1610 | writeb(b << io->regshift, (io->addr)+(offset * io->regspacing)); | |
1611 | } | |
1612 | ||
81d02b7f CM |
1613 | static unsigned char intf_mem_inl(const struct si_sm_io *io, |
1614 | unsigned int offset) | |
1da177e4 LT |
1615 | { |
1616 | return (readl((io->addr)+(offset * io->regspacing)) >> io->regshift) | |
64d9fe69 | 1617 | & 0xff; |
1da177e4 LT |
1618 | } |
1619 | ||
81d02b7f CM |
1620 | static void intf_mem_outl(const struct si_sm_io *io, unsigned int offset, |
1621 | unsigned char b) | |
1da177e4 LT |
1622 | { |
1623 | writel(b << io->regshift, (io->addr)+(offset * io->regspacing)); | |
1624 | } | |
1625 | ||
1626 | #ifdef readq | |
81d02b7f | 1627 | static unsigned char mem_inq(const struct si_sm_io *io, unsigned int offset) |
1da177e4 LT |
1628 | { |
1629 | return (readq((io->addr)+(offset * io->regspacing)) >> io->regshift) | |
64d9fe69 | 1630 | & 0xff; |
1da177e4 LT |
1631 | } |
1632 | ||
81d02b7f | 1633 | static void mem_outq(const struct si_sm_io *io, unsigned int offset, |
1da177e4 LT |
1634 | unsigned char b) |
1635 | { | |
1636 | writeq(b << io->regshift, (io->addr)+(offset * io->regspacing)); | |
1637 | } | |
1638 | #endif | |
1639 | ||
1640 | static void mem_cleanup(struct smi_info *info) | |
1641 | { | |
b0defcdb | 1642 | unsigned long addr = info->io.addr_data; |
1da177e4 LT |
1643 | int mapsize; |
1644 | ||
1645 | if (info->io.addr) { | |
1646 | iounmap(info->io.addr); | |
1647 | ||
1648 | mapsize = ((info->io_size * info->io.regspacing) | |
1649 | - (info->io.regspacing - info->io.regsize)); | |
1650 | ||
b0defcdb | 1651 | release_mem_region(addr, mapsize); |
1da177e4 | 1652 | } |
1da177e4 LT |
1653 | } |
1654 | ||
1655 | static int mem_setup(struct smi_info *info) | |
1656 | { | |
b0defcdb | 1657 | unsigned long addr = info->io.addr_data; |
1da177e4 LT |
1658 | int mapsize; |
1659 | ||
b0defcdb | 1660 | if (!addr) |
1da177e4 LT |
1661 | return -ENODEV; |
1662 | ||
1663 | info->io_cleanup = mem_cleanup; | |
1664 | ||
c305e3d3 CM |
1665 | /* |
1666 | * Figure out the actual readb/readw/readl/etc routine to use based | |
1667 | * upon the register size. | |
1668 | */ | |
1da177e4 LT |
1669 | switch (info->io.regsize) { |
1670 | case 1: | |
546cfdf4 AD |
1671 | info->io.inputb = intf_mem_inb; |
1672 | info->io.outputb = intf_mem_outb; | |
1da177e4 LT |
1673 | break; |
1674 | case 2: | |
546cfdf4 AD |
1675 | info->io.inputb = intf_mem_inw; |
1676 | info->io.outputb = intf_mem_outw; | |
1da177e4 LT |
1677 | break; |
1678 | case 4: | |
546cfdf4 AD |
1679 | info->io.inputb = intf_mem_inl; |
1680 | info->io.outputb = intf_mem_outl; | |
1da177e4 LT |
1681 | break; |
1682 | #ifdef readq | |
1683 | case 8: | |
1684 | info->io.inputb = mem_inq; | |
1685 | info->io.outputb = mem_outq; | |
1686 | break; | |
1687 | #endif | |
1688 | default: | |
279fbd0c MS |
1689 | dev_warn(info->dev, "Invalid register size: %d\n", |
1690 | info->io.regsize); | |
1da177e4 LT |
1691 | return -EINVAL; |
1692 | } | |
1693 | ||
c305e3d3 CM |
1694 | /* |
1695 | * Calculate the total amount of memory to claim. This is an | |
1da177e4 LT |
1696 | * unusual looking calculation, but it avoids claiming any |
1697 | * more memory than it has to. It will claim everything | |
1698 | * between the first address to the end of the last full | |
c305e3d3 CM |
1699 | * register. |
1700 | */ | |
1da177e4 LT |
1701 | mapsize = ((info->io_size * info->io.regspacing) |
1702 | - (info->io.regspacing - info->io.regsize)); | |
1703 | ||
b0defcdb | 1704 | if (request_mem_region(addr, mapsize, DEVICE_NAME) == NULL) |
1da177e4 LT |
1705 | return -EIO; |
1706 | ||
b0defcdb | 1707 | info->io.addr = ioremap(addr, mapsize); |
1da177e4 | 1708 | if (info->io.addr == NULL) { |
b0defcdb | 1709 | release_mem_region(addr, mapsize); |
1da177e4 LT |
1710 | return -EIO; |
1711 | } | |
1712 | return 0; | |
1713 | } | |
1714 | ||
b361e27b CM |
1715 | /* |
1716 | * Parms come in as <op1>[:op2[:op3...]]. ops are: | |
1717 | * add|remove,kcs|bt|smic,mem|i/o,<address>[,<opt1>[,<opt2>[,...]]] | |
1718 | * Options are: | |
1719 | * rsp=<regspacing> | |
1720 | * rsi=<regsize> | |
1721 | * rsh=<regshift> | |
1722 | * irq=<irq> | |
1723 | * ipmb=<ipmb addr> | |
1724 | */ | |
1725 | enum hotmod_op { HM_ADD, HM_REMOVE }; | |
1726 | struct hotmod_vals { | |
99ee6735 LC |
1727 | const char *name; |
1728 | const int val; | |
b361e27b | 1729 | }; |
99ee6735 LC |
1730 | |
1731 | static const struct hotmod_vals hotmod_ops[] = { | |
b361e27b CM |
1732 | { "add", HM_ADD }, |
1733 | { "remove", HM_REMOVE }, | |
1734 | { NULL } | |
1735 | }; | |
99ee6735 LC |
1736 | |
1737 | static const struct hotmod_vals hotmod_si[] = { | |
b361e27b CM |
1738 | { "kcs", SI_KCS }, |
1739 | { "smic", SI_SMIC }, | |
1740 | { "bt", SI_BT }, | |
1741 | { NULL } | |
1742 | }; | |
99ee6735 LC |
1743 | |
1744 | static const struct hotmod_vals hotmod_as[] = { | |
b361e27b CM |
1745 | { "mem", IPMI_MEM_ADDR_SPACE }, |
1746 | { "i/o", IPMI_IO_ADDR_SPACE }, | |
1747 | { NULL } | |
1748 | }; | |
1d5636cc | 1749 | |
99ee6735 LC |
1750 | static int parse_str(const struct hotmod_vals *v, int *val, char *name, |
1751 | char **curr) | |
b361e27b CM |
1752 | { |
1753 | char *s; | |
1754 | int i; | |
1755 | ||
1756 | s = strchr(*curr, ','); | |
1757 | if (!s) { | |
1758 | printk(KERN_WARNING PFX "No hotmod %s given.\n", name); | |
1759 | return -EINVAL; | |
1760 | } | |
1761 | *s = '\0'; | |
1762 | s++; | |
ceb51ca8 | 1763 | for (i = 0; v[i].name; i++) { |
1d5636cc | 1764 | if (strcmp(*curr, v[i].name) == 0) { |
b361e27b CM |
1765 | *val = v[i].val; |
1766 | *curr = s; | |
1767 | return 0; | |
1768 | } | |
1769 | } | |
1770 | ||
1771 | printk(KERN_WARNING PFX "Invalid hotmod %s '%s'\n", name, *curr); | |
1772 | return -EINVAL; | |
1773 | } | |
1774 | ||
1d5636cc CM |
1775 | static int check_hotmod_int_op(const char *curr, const char *option, |
1776 | const char *name, int *val) | |
1777 | { | |
1778 | char *n; | |
1779 | ||
1780 | if (strcmp(curr, name) == 0) { | |
1781 | if (!option) { | |
1782 | printk(KERN_WARNING PFX | |
1783 | "No option given for '%s'\n", | |
1784 | curr); | |
1785 | return -EINVAL; | |
1786 | } | |
1787 | *val = simple_strtoul(option, &n, 0); | |
1788 | if ((*n != '\0') || (*option == '\0')) { | |
1789 | printk(KERN_WARNING PFX | |
1790 | "Bad option given for '%s'\n", | |
1791 | curr); | |
1792 | return -EINVAL; | |
1793 | } | |
1794 | return 1; | |
1795 | } | |
1796 | return 0; | |
1797 | } | |
1798 | ||
de5e2ddf ED |
1799 | static struct smi_info *smi_info_alloc(void) |
1800 | { | |
1801 | struct smi_info *info = kzalloc(sizeof(*info), GFP_KERNEL); | |
1802 | ||
f60adf42 | 1803 | if (info) |
de5e2ddf | 1804 | spin_lock_init(&info->si_lock); |
de5e2ddf ED |
1805 | return info; |
1806 | } | |
1807 | ||
b361e27b CM |
1808 | static int hotmod_handler(const char *val, struct kernel_param *kp) |
1809 | { | |
1810 | char *str = kstrdup(val, GFP_KERNEL); | |
1d5636cc | 1811 | int rv; |
b361e27b CM |
1812 | char *next, *curr, *s, *n, *o; |
1813 | enum hotmod_op op; | |
1814 | enum si_type si_type; | |
1815 | int addr_space; | |
1816 | unsigned long addr; | |
1817 | int regspacing; | |
1818 | int regsize; | |
1819 | int regshift; | |
1820 | int irq; | |
1821 | int ipmb; | |
1822 | int ival; | |
1d5636cc | 1823 | int len; |
b361e27b CM |
1824 | struct smi_info *info; |
1825 | ||
1826 | if (!str) | |
1827 | return -ENOMEM; | |
1828 | ||
1829 | /* Kill any trailing spaces, as we can get a "\n" from echo. */ | |
1d5636cc CM |
1830 | len = strlen(str); |
1831 | ival = len - 1; | |
b361e27b CM |
1832 | while ((ival >= 0) && isspace(str[ival])) { |
1833 | str[ival] = '\0'; | |
1834 | ival--; | |
1835 | } | |
1836 | ||
1837 | for (curr = str; curr; curr = next) { | |
1838 | regspacing = 1; | |
1839 | regsize = 1; | |
1840 | regshift = 0; | |
1841 | irq = 0; | |
2f95d513 | 1842 | ipmb = 0; /* Choose the default if not specified */ |
b361e27b CM |
1843 | |
1844 | next = strchr(curr, ':'); | |
1845 | if (next) { | |
1846 | *next = '\0'; | |
1847 | next++; | |
1848 | } | |
1849 | ||
1850 | rv = parse_str(hotmod_ops, &ival, "operation", &curr); | |
1851 | if (rv) | |
1852 | break; | |
1853 | op = ival; | |
1854 | ||
1855 | rv = parse_str(hotmod_si, &ival, "interface type", &curr); | |
1856 | if (rv) | |
1857 | break; | |
1858 | si_type = ival; | |
1859 | ||
1860 | rv = parse_str(hotmod_as, &addr_space, "address space", &curr); | |
1861 | if (rv) | |
1862 | break; | |
1863 | ||
1864 | s = strchr(curr, ','); | |
1865 | if (s) { | |
1866 | *s = '\0'; | |
1867 | s++; | |
1868 | } | |
1869 | addr = simple_strtoul(curr, &n, 0); | |
1870 | if ((*n != '\0') || (*curr == '\0')) { | |
1871 | printk(KERN_WARNING PFX "Invalid hotmod address" | |
1872 | " '%s'\n", curr); | |
1873 | break; | |
1874 | } | |
1875 | ||
1876 | while (s) { | |
1877 | curr = s; | |
1878 | s = strchr(curr, ','); | |
1879 | if (s) { | |
1880 | *s = '\0'; | |
1881 | s++; | |
1882 | } | |
1883 | o = strchr(curr, '='); | |
1884 | if (o) { | |
1885 | *o = '\0'; | |
1886 | o++; | |
1887 | } | |
1d5636cc CM |
1888 | rv = check_hotmod_int_op(curr, o, "rsp", ®spacing); |
1889 | if (rv < 0) | |
b361e27b | 1890 | goto out; |
1d5636cc CM |
1891 | else if (rv) |
1892 | continue; | |
1893 | rv = check_hotmod_int_op(curr, o, "rsi", ®size); | |
1894 | if (rv < 0) | |
1895 | goto out; | |
1896 | else if (rv) | |
1897 | continue; | |
1898 | rv = check_hotmod_int_op(curr, o, "rsh", ®shift); | |
1899 | if (rv < 0) | |
1900 | goto out; | |
1901 | else if (rv) | |
1902 | continue; | |
1903 | rv = check_hotmod_int_op(curr, o, "irq", &irq); | |
1904 | if (rv < 0) | |
1905 | goto out; | |
1906 | else if (rv) | |
1907 | continue; | |
1908 | rv = check_hotmod_int_op(curr, o, "ipmb", &ipmb); | |
1909 | if (rv < 0) | |
1910 | goto out; | |
1911 | else if (rv) | |
1912 | continue; | |
1913 | ||
1914 | rv = -EINVAL; | |
1915 | printk(KERN_WARNING PFX | |
1916 | "Invalid hotmod option '%s'\n", | |
1917 | curr); | |
1918 | goto out; | |
b361e27b CM |
1919 | } |
1920 | ||
1921 | if (op == HM_ADD) { | |
de5e2ddf | 1922 | info = smi_info_alloc(); |
b361e27b CM |
1923 | if (!info) { |
1924 | rv = -ENOMEM; | |
1925 | goto out; | |
1926 | } | |
1927 | ||
5fedc4a2 | 1928 | info->addr_source = SI_HOTMOD; |
b361e27b CM |
1929 | info->si_type = si_type; |
1930 | info->io.addr_data = addr; | |
1931 | info->io.addr_type = addr_space; | |
1932 | if (addr_space == IPMI_MEM_ADDR_SPACE) | |
1933 | info->io_setup = mem_setup; | |
1934 | else | |
1935 | info->io_setup = port_setup; | |
1936 | ||
1937 | info->io.addr = NULL; | |
1938 | info->io.regspacing = regspacing; | |
1939 | if (!info->io.regspacing) | |
1940 | info->io.regspacing = DEFAULT_REGSPACING; | |
1941 | info->io.regsize = regsize; | |
1942 | if (!info->io.regsize) | |
1943 | info->io.regsize = DEFAULT_REGSPACING; | |
1944 | info->io.regshift = regshift; | |
1945 | info->irq = irq; | |
1946 | if (info->irq) | |
1947 | info->irq_setup = std_irq_setup; | |
1948 | info->slave_addr = ipmb; | |
1949 | ||
d02b3709 CM |
1950 | rv = add_smi(info); |
1951 | if (rv) { | |
7faefea6 | 1952 | kfree(info); |
d02b3709 CM |
1953 | goto out; |
1954 | } | |
1955 | rv = try_smi_init(info); | |
1956 | if (rv) { | |
1957 | cleanup_one_si(info); | |
1958 | goto out; | |
7faefea6 | 1959 | } |
b361e27b CM |
1960 | } else { |
1961 | /* remove */ | |
1962 | struct smi_info *e, *tmp_e; | |
1963 | ||
1964 | mutex_lock(&smi_infos_lock); | |
1965 | list_for_each_entry_safe(e, tmp_e, &smi_infos, link) { | |
1966 | if (e->io.addr_type != addr_space) | |
1967 | continue; | |
1968 | if (e->si_type != si_type) | |
1969 | continue; | |
1970 | if (e->io.addr_data == addr) | |
1971 | cleanup_one_si(e); | |
1972 | } | |
1973 | mutex_unlock(&smi_infos_lock); | |
1974 | } | |
1975 | } | |
1d5636cc | 1976 | rv = len; |
76824852 | 1977 | out: |
b361e27b CM |
1978 | kfree(str); |
1979 | return rv; | |
1980 | } | |
b0defcdb | 1981 | |
2223cbec | 1982 | static int hardcode_find_bmc(void) |
1da177e4 | 1983 | { |
a1e9c9dd | 1984 | int ret = -ENODEV; |
b0defcdb | 1985 | int i; |
1da177e4 LT |
1986 | struct smi_info *info; |
1987 | ||
b0defcdb CM |
1988 | for (i = 0; i < SI_MAX_PARMS; i++) { |
1989 | if (!ports[i] && !addrs[i]) | |
1990 | continue; | |
1da177e4 | 1991 | |
de5e2ddf | 1992 | info = smi_info_alloc(); |
b0defcdb | 1993 | if (!info) |
a1e9c9dd | 1994 | return -ENOMEM; |
1da177e4 | 1995 | |
5fedc4a2 | 1996 | info->addr_source = SI_HARDCODED; |
279fbd0c | 1997 | printk(KERN_INFO PFX "probing via hardcoded address\n"); |
1da177e4 | 1998 | |
1d5636cc | 1999 | if (!si_type[i] || strcmp(si_type[i], "kcs") == 0) { |
b0defcdb | 2000 | info->si_type = SI_KCS; |
1d5636cc | 2001 | } else if (strcmp(si_type[i], "smic") == 0) { |
b0defcdb | 2002 | info->si_type = SI_SMIC; |
1d5636cc | 2003 | } else if (strcmp(si_type[i], "bt") == 0) { |
b0defcdb CM |
2004 | info->si_type = SI_BT; |
2005 | } else { | |
279fbd0c | 2006 | printk(KERN_WARNING PFX "Interface type specified " |
b0defcdb CM |
2007 | "for interface %d, was invalid: %s\n", |
2008 | i, si_type[i]); | |
2009 | kfree(info); | |
2010 | continue; | |
2011 | } | |
1da177e4 | 2012 | |
b0defcdb CM |
2013 | if (ports[i]) { |
2014 | /* An I/O port */ | |
2015 | info->io_setup = port_setup; | |
2016 | info->io.addr_data = ports[i]; | |
2017 | info->io.addr_type = IPMI_IO_ADDR_SPACE; | |
2018 | } else if (addrs[i]) { | |
2019 | /* A memory port */ | |
2020 | info->io_setup = mem_setup; | |
2021 | info->io.addr_data = addrs[i]; | |
2022 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; | |
2023 | } else { | |
279fbd0c MS |
2024 | printk(KERN_WARNING PFX "Interface type specified " |
2025 | "for interface %d, but port and address were " | |
2026 | "not set or set to zero.\n", i); | |
b0defcdb CM |
2027 | kfree(info); |
2028 | continue; | |
2029 | } | |
1da177e4 | 2030 | |
b0defcdb CM |
2031 | info->io.addr = NULL; |
2032 | info->io.regspacing = regspacings[i]; | |
2033 | if (!info->io.regspacing) | |
2034 | info->io.regspacing = DEFAULT_REGSPACING; | |
2035 | info->io.regsize = regsizes[i]; | |
2036 | if (!info->io.regsize) | |
2037 | info->io.regsize = DEFAULT_REGSPACING; | |
2038 | info->io.regshift = regshifts[i]; | |
2039 | info->irq = irqs[i]; | |
2040 | if (info->irq) | |
2041 | info->irq_setup = std_irq_setup; | |
2f95d513 | 2042 | info->slave_addr = slave_addrs[i]; |
1da177e4 | 2043 | |
7faefea6 | 2044 | if (!add_smi(info)) { |
2407d77a MG |
2045 | if (try_smi_init(info)) |
2046 | cleanup_one_si(info); | |
a1e9c9dd | 2047 | ret = 0; |
7faefea6 YL |
2048 | } else { |
2049 | kfree(info); | |
2050 | } | |
b0defcdb | 2051 | } |
a1e9c9dd | 2052 | return ret; |
b0defcdb | 2053 | } |
1da177e4 | 2054 | |
8466361a | 2055 | #ifdef CONFIG_ACPI |
1da177e4 | 2056 | |
c305e3d3 CM |
2057 | /* |
2058 | * Once we get an ACPI failure, we don't try any more, because we go | |
2059 | * through the tables sequentially. Once we don't find a table, there | |
2060 | * are no more. | |
2061 | */ | |
0c8204b3 | 2062 | static int acpi_failure; |
1da177e4 LT |
2063 | |
2064 | /* For GPE-type interrupts. */ | |
8b6cd8ad LM |
2065 | static u32 ipmi_acpi_gpe(acpi_handle gpe_device, |
2066 | u32 gpe_number, void *context) | |
1da177e4 LT |
2067 | { |
2068 | struct smi_info *smi_info = context; | |
2069 | unsigned long flags; | |
1da177e4 LT |
2070 | |
2071 | spin_lock_irqsave(&(smi_info->si_lock), flags); | |
2072 | ||
64959e2d | 2073 | smi_inc_stat(smi_info, interrupts); |
1da177e4 | 2074 | |
f93aae9f JS |
2075 | debug_timestamp("ACPI_GPE"); |
2076 | ||
1da177e4 | 2077 | smi_event_handler(smi_info, 0); |
1da177e4 LT |
2078 | spin_unlock_irqrestore(&(smi_info->si_lock), flags); |
2079 | ||
2080 | return ACPI_INTERRUPT_HANDLED; | |
2081 | } | |
2082 | ||
b0defcdb CM |
2083 | static void acpi_gpe_irq_cleanup(struct smi_info *info) |
2084 | { | |
2085 | if (!info->irq) | |
2086 | return; | |
2087 | ||
2088 | acpi_remove_gpe_handler(NULL, info->irq, &ipmi_acpi_gpe); | |
2089 | } | |
2090 | ||
1da177e4 LT |
2091 | static int acpi_gpe_irq_setup(struct smi_info *info) |
2092 | { | |
2093 | acpi_status status; | |
2094 | ||
b0defcdb | 2095 | if (!info->irq) |
1da177e4 LT |
2096 | return 0; |
2097 | ||
1da177e4 LT |
2098 | status = acpi_install_gpe_handler(NULL, |
2099 | info->irq, | |
2100 | ACPI_GPE_LEVEL_TRIGGERED, | |
2101 | &ipmi_acpi_gpe, | |
2102 | info); | |
2103 | if (status != AE_OK) { | |
279fbd0c MS |
2104 | dev_warn(info->dev, "%s unable to claim ACPI GPE %d," |
2105 | " running polled\n", DEVICE_NAME, info->irq); | |
1da177e4 LT |
2106 | info->irq = 0; |
2107 | return -EINVAL; | |
2108 | } else { | |
b0defcdb | 2109 | info->irq_cleanup = acpi_gpe_irq_cleanup; |
279fbd0c | 2110 | dev_info(info->dev, "Using ACPI GPE %d\n", info->irq); |
1da177e4 LT |
2111 | return 0; |
2112 | } | |
2113 | } | |
2114 | ||
1da177e4 LT |
2115 | /* |
2116 | * Defined at | |
631dd1a8 | 2117 | * http://h21007.www2.hp.com/portal/download/files/unprot/hpspmi.pdf |
1da177e4 LT |
2118 | */ |
2119 | struct SPMITable { | |
2120 | s8 Signature[4]; | |
2121 | u32 Length; | |
2122 | u8 Revision; | |
2123 | u8 Checksum; | |
2124 | s8 OEMID[6]; | |
2125 | s8 OEMTableID[8]; | |
2126 | s8 OEMRevision[4]; | |
2127 | s8 CreatorID[4]; | |
2128 | s8 CreatorRevision[4]; | |
2129 | u8 InterfaceType; | |
2130 | u8 IPMIlegacy; | |
2131 | s16 SpecificationRevision; | |
2132 | ||
2133 | /* | |
2134 | * Bit 0 - SCI interrupt supported | |
2135 | * Bit 1 - I/O APIC/SAPIC | |
2136 | */ | |
2137 | u8 InterruptType; | |
2138 | ||
c305e3d3 CM |
2139 | /* |
2140 | * If bit 0 of InterruptType is set, then this is the SCI | |
2141 | * interrupt in the GPEx_STS register. | |
2142 | */ | |
1da177e4 LT |
2143 | u8 GPE; |
2144 | ||
2145 | s16 Reserved; | |
2146 | ||
c305e3d3 CM |
2147 | /* |
2148 | * If bit 1 of InterruptType is set, then this is the I/O | |
2149 | * APIC/SAPIC interrupt. | |
2150 | */ | |
1da177e4 LT |
2151 | u32 GlobalSystemInterrupt; |
2152 | ||
2153 | /* The actual register address. */ | |
2154 | struct acpi_generic_address addr; | |
2155 | ||
2156 | u8 UID[4]; | |
2157 | ||
2158 | s8 spmi_id[1]; /* A '\0' terminated array starts here. */ | |
2159 | }; | |
2160 | ||
2223cbec | 2161 | static int try_init_spmi(struct SPMITable *spmi) |
1da177e4 LT |
2162 | { |
2163 | struct smi_info *info; | |
d02b3709 | 2164 | int rv; |
1da177e4 | 2165 | |
1da177e4 | 2166 | if (spmi->IPMIlegacy != 1) { |
279fbd0c MS |
2167 | printk(KERN_INFO PFX "Bad SPMI legacy %d\n", spmi->IPMIlegacy); |
2168 | return -ENODEV; | |
1da177e4 LT |
2169 | } |
2170 | ||
de5e2ddf | 2171 | info = smi_info_alloc(); |
b0defcdb | 2172 | if (!info) { |
279fbd0c | 2173 | printk(KERN_ERR PFX "Could not allocate SI data (3)\n"); |
b0defcdb CM |
2174 | return -ENOMEM; |
2175 | } | |
2176 | ||
5fedc4a2 | 2177 | info->addr_source = SI_SPMI; |
279fbd0c | 2178 | printk(KERN_INFO PFX "probing via SPMI\n"); |
1da177e4 | 2179 | |
1da177e4 | 2180 | /* Figure out the interface type. */ |
c305e3d3 | 2181 | switch (spmi->InterfaceType) { |
1da177e4 | 2182 | case 1: /* KCS */ |
b0defcdb | 2183 | info->si_type = SI_KCS; |
1da177e4 | 2184 | break; |
1da177e4 | 2185 | case 2: /* SMIC */ |
b0defcdb | 2186 | info->si_type = SI_SMIC; |
1da177e4 | 2187 | break; |
1da177e4 | 2188 | case 3: /* BT */ |
b0defcdb | 2189 | info->si_type = SI_BT; |
1da177e4 | 2190 | break; |
ab42bf24 CM |
2191 | case 4: /* SSIF, just ignore */ |
2192 | kfree(info); | |
2193 | return -EIO; | |
1da177e4 | 2194 | default: |
279fbd0c MS |
2195 | printk(KERN_INFO PFX "Unknown ACPI/SPMI SI type %d\n", |
2196 | spmi->InterfaceType); | |
b0defcdb | 2197 | kfree(info); |
1da177e4 LT |
2198 | return -EIO; |
2199 | } | |
2200 | ||
1da177e4 LT |
2201 | if (spmi->InterruptType & 1) { |
2202 | /* We've got a GPE interrupt. */ | |
2203 | info->irq = spmi->GPE; | |
2204 | info->irq_setup = acpi_gpe_irq_setup; | |
1da177e4 LT |
2205 | } else if (spmi->InterruptType & 2) { |
2206 | /* We've got an APIC/SAPIC interrupt. */ | |
2207 | info->irq = spmi->GlobalSystemInterrupt; | |
2208 | info->irq_setup = std_irq_setup; | |
1da177e4 LT |
2209 | } else { |
2210 | /* Use the default interrupt setting. */ | |
2211 | info->irq = 0; | |
2212 | info->irq_setup = NULL; | |
2213 | } | |
2214 | ||
15a58ed1 | 2215 | if (spmi->addr.bit_width) { |
35bc37a0 | 2216 | /* A (hopefully) properly formed register bit width. */ |
15a58ed1 | 2217 | info->io.regspacing = spmi->addr.bit_width / 8; |
35bc37a0 | 2218 | } else { |
35bc37a0 CM |
2219 | info->io.regspacing = DEFAULT_REGSPACING; |
2220 | } | |
b0defcdb | 2221 | info->io.regsize = info->io.regspacing; |
15a58ed1 | 2222 | info->io.regshift = spmi->addr.bit_offset; |
1da177e4 | 2223 | |
15a58ed1 | 2224 | if (spmi->addr.space_id == ACPI_ADR_SPACE_SYSTEM_MEMORY) { |
1da177e4 | 2225 | info->io_setup = mem_setup; |
8fe1425a | 2226 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; |
15a58ed1 | 2227 | } else if (spmi->addr.space_id == ACPI_ADR_SPACE_SYSTEM_IO) { |
1da177e4 | 2228 | info->io_setup = port_setup; |
8fe1425a | 2229 | info->io.addr_type = IPMI_IO_ADDR_SPACE; |
1da177e4 LT |
2230 | } else { |
2231 | kfree(info); | |
279fbd0c | 2232 | printk(KERN_WARNING PFX "Unknown ACPI I/O Address type\n"); |
1da177e4 LT |
2233 | return -EIO; |
2234 | } | |
b0defcdb | 2235 | info->io.addr_data = spmi->addr.address; |
1da177e4 | 2236 | |
7bb671e3 YL |
2237 | pr_info("ipmi_si: SPMI: %s %#lx regsize %d spacing %d irq %d\n", |
2238 | (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? "io" : "mem", | |
2239 | info->io.addr_data, info->io.regsize, info->io.regspacing, | |
2240 | info->irq); | |
2241 | ||
d02b3709 CM |
2242 | rv = add_smi(info); |
2243 | if (rv) | |
7faefea6 | 2244 | kfree(info); |
1da177e4 | 2245 | |
d02b3709 | 2246 | return rv; |
1da177e4 | 2247 | } |
b0defcdb | 2248 | |
2223cbec | 2249 | static void spmi_find_bmc(void) |
b0defcdb CM |
2250 | { |
2251 | acpi_status status; | |
2252 | struct SPMITable *spmi; | |
2253 | int i; | |
2254 | ||
2255 | if (acpi_disabled) | |
2256 | return; | |
2257 | ||
2258 | if (acpi_failure) | |
2259 | return; | |
2260 | ||
2261 | for (i = 0; ; i++) { | |
15a58ed1 AS |
2262 | status = acpi_get_table(ACPI_SIG_SPMI, i+1, |
2263 | (struct acpi_table_header **)&spmi); | |
b0defcdb CM |
2264 | if (status != AE_OK) |
2265 | return; | |
2266 | ||
18a3e0bf | 2267 | try_init_spmi(spmi); |
b0defcdb CM |
2268 | } |
2269 | } | |
1da177e4 LT |
2270 | #endif |
2271 | ||
a9fad4cc | 2272 | #ifdef CONFIG_DMI |
c305e3d3 | 2273 | struct dmi_ipmi_data { |
1da177e4 LT |
2274 | u8 type; |
2275 | u8 addr_space; | |
2276 | unsigned long base_addr; | |
2277 | u8 irq; | |
2278 | u8 offset; | |
2279 | u8 slave_addr; | |
b0defcdb | 2280 | }; |
1da177e4 | 2281 | |
2223cbec | 2282 | static int decode_dmi(const struct dmi_header *dm, |
b0defcdb | 2283 | struct dmi_ipmi_data *dmi) |
1da177e4 | 2284 | { |
1855256c | 2285 | const u8 *data = (const u8 *)dm; |
1da177e4 LT |
2286 | unsigned long base_addr; |
2287 | u8 reg_spacing; | |
b224cd3a | 2288 | u8 len = dm->length; |
1da177e4 | 2289 | |
b0defcdb | 2290 | dmi->type = data[4]; |
1da177e4 LT |
2291 | |
2292 | memcpy(&base_addr, data+8, sizeof(unsigned long)); | |
2293 | if (len >= 0x11) { | |
2294 | if (base_addr & 1) { | |
2295 | /* I/O */ | |
2296 | base_addr &= 0xFFFE; | |
b0defcdb | 2297 | dmi->addr_space = IPMI_IO_ADDR_SPACE; |
c305e3d3 | 2298 | } else |
1da177e4 | 2299 | /* Memory */ |
b0defcdb | 2300 | dmi->addr_space = IPMI_MEM_ADDR_SPACE; |
c305e3d3 | 2301 | |
1da177e4 LT |
2302 | /* If bit 4 of byte 0x10 is set, then the lsb for the address |
2303 | is odd. */ | |
b0defcdb | 2304 | dmi->base_addr = base_addr | ((data[0x10] & 0x10) >> 4); |
1da177e4 | 2305 | |
b0defcdb | 2306 | dmi->irq = data[0x11]; |
1da177e4 LT |
2307 | |
2308 | /* The top two bits of byte 0x10 hold the register spacing. */ | |
b224cd3a | 2309 | reg_spacing = (data[0x10] & 0xC0) >> 6; |
c305e3d3 | 2310 | switch (reg_spacing) { |
1da177e4 | 2311 | case 0x00: /* Byte boundaries */ |
b0defcdb | 2312 | dmi->offset = 1; |
1da177e4 LT |
2313 | break; |
2314 | case 0x01: /* 32-bit boundaries */ | |
b0defcdb | 2315 | dmi->offset = 4; |
1da177e4 LT |
2316 | break; |
2317 | case 0x02: /* 16-byte boundaries */ | |
b0defcdb | 2318 | dmi->offset = 16; |
1da177e4 LT |
2319 | break; |
2320 | default: | |
2321 | /* Some other interface, just ignore it. */ | |
2322 | return -EIO; | |
2323 | } | |
2324 | } else { | |
2325 | /* Old DMI spec. */ | |
c305e3d3 CM |
2326 | /* |
2327 | * Note that technically, the lower bit of the base | |
92068801 CM |
2328 | * address should be 1 if the address is I/O and 0 if |
2329 | * the address is in memory. So many systems get that | |
2330 | * wrong (and all that I have seen are I/O) so we just | |
2331 | * ignore that bit and assume I/O. Systems that use | |
c305e3d3 CM |
2332 | * memory should use the newer spec, anyway. |
2333 | */ | |
b0defcdb CM |
2334 | dmi->base_addr = base_addr & 0xfffe; |
2335 | dmi->addr_space = IPMI_IO_ADDR_SPACE; | |
2336 | dmi->offset = 1; | |
1da177e4 LT |
2337 | } |
2338 | ||
b0defcdb | 2339 | dmi->slave_addr = data[6]; |
1da177e4 | 2340 | |
b0defcdb | 2341 | return 0; |
1da177e4 LT |
2342 | } |
2343 | ||
2223cbec | 2344 | static void try_init_dmi(struct dmi_ipmi_data *ipmi_data) |
1da177e4 | 2345 | { |
b0defcdb | 2346 | struct smi_info *info; |
1da177e4 | 2347 | |
de5e2ddf | 2348 | info = smi_info_alloc(); |
b0defcdb | 2349 | if (!info) { |
279fbd0c | 2350 | printk(KERN_ERR PFX "Could not allocate SI data\n"); |
b0defcdb | 2351 | return; |
1da177e4 | 2352 | } |
1da177e4 | 2353 | |
5fedc4a2 | 2354 | info->addr_source = SI_SMBIOS; |
279fbd0c | 2355 | printk(KERN_INFO PFX "probing via SMBIOS\n"); |
1da177e4 | 2356 | |
e8b33617 | 2357 | switch (ipmi_data->type) { |
b0defcdb CM |
2358 | case 0x01: /* KCS */ |
2359 | info->si_type = SI_KCS; | |
2360 | break; | |
2361 | case 0x02: /* SMIC */ | |
2362 | info->si_type = SI_SMIC; | |
2363 | break; | |
2364 | case 0x03: /* BT */ | |
2365 | info->si_type = SI_BT; | |
2366 | break; | |
2367 | default: | |
80cd6920 | 2368 | kfree(info); |
b0defcdb | 2369 | return; |
1da177e4 | 2370 | } |
1da177e4 | 2371 | |
b0defcdb CM |
2372 | switch (ipmi_data->addr_space) { |
2373 | case IPMI_MEM_ADDR_SPACE: | |
1da177e4 | 2374 | info->io_setup = mem_setup; |
b0defcdb CM |
2375 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; |
2376 | break; | |
2377 | ||
2378 | case IPMI_IO_ADDR_SPACE: | |
1da177e4 | 2379 | info->io_setup = port_setup; |
b0defcdb CM |
2380 | info->io.addr_type = IPMI_IO_ADDR_SPACE; |
2381 | break; | |
2382 | ||
2383 | default: | |
1da177e4 | 2384 | kfree(info); |
279fbd0c | 2385 | printk(KERN_WARNING PFX "Unknown SMBIOS I/O Address type: %d\n", |
b0defcdb CM |
2386 | ipmi_data->addr_space); |
2387 | return; | |
1da177e4 | 2388 | } |
b0defcdb | 2389 | info->io.addr_data = ipmi_data->base_addr; |
1da177e4 | 2390 | |
b0defcdb CM |
2391 | info->io.regspacing = ipmi_data->offset; |
2392 | if (!info->io.regspacing) | |
1da177e4 LT |
2393 | info->io.regspacing = DEFAULT_REGSPACING; |
2394 | info->io.regsize = DEFAULT_REGSPACING; | |
b0defcdb | 2395 | info->io.regshift = 0; |
1da177e4 LT |
2396 | |
2397 | info->slave_addr = ipmi_data->slave_addr; | |
2398 | ||
b0defcdb CM |
2399 | info->irq = ipmi_data->irq; |
2400 | if (info->irq) | |
2401 | info->irq_setup = std_irq_setup; | |
1da177e4 | 2402 | |
7bb671e3 YL |
2403 | pr_info("ipmi_si: SMBIOS: %s %#lx regsize %d spacing %d irq %d\n", |
2404 | (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? "io" : "mem", | |
2405 | info->io.addr_data, info->io.regsize, info->io.regspacing, | |
2406 | info->irq); | |
2407 | ||
7faefea6 YL |
2408 | if (add_smi(info)) |
2409 | kfree(info); | |
b0defcdb | 2410 | } |
1da177e4 | 2411 | |
2223cbec | 2412 | static void dmi_find_bmc(void) |
b0defcdb | 2413 | { |
1855256c | 2414 | const struct dmi_device *dev = NULL; |
b0defcdb CM |
2415 | struct dmi_ipmi_data data; |
2416 | int rv; | |
2417 | ||
2418 | while ((dev = dmi_find_device(DMI_DEV_TYPE_IPMI, NULL, dev))) { | |
397f4ebf | 2419 | memset(&data, 0, sizeof(data)); |
1855256c JG |
2420 | rv = decode_dmi((const struct dmi_header *) dev->device_data, |
2421 | &data); | |
b0defcdb CM |
2422 | if (!rv) |
2423 | try_init_dmi(&data); | |
2424 | } | |
1da177e4 | 2425 | } |
a9fad4cc | 2426 | #endif /* CONFIG_DMI */ |
1da177e4 LT |
2427 | |
2428 | #ifdef CONFIG_PCI | |
2429 | ||
b0defcdb CM |
2430 | #define PCI_ERMC_CLASSCODE 0x0C0700 |
2431 | #define PCI_ERMC_CLASSCODE_MASK 0xffffff00 | |
2432 | #define PCI_ERMC_CLASSCODE_TYPE_MASK 0xff | |
2433 | #define PCI_ERMC_CLASSCODE_TYPE_SMIC 0x00 | |
2434 | #define PCI_ERMC_CLASSCODE_TYPE_KCS 0x01 | |
2435 | #define PCI_ERMC_CLASSCODE_TYPE_BT 0x02 | |
2436 | ||
1da177e4 LT |
2437 | #define PCI_HP_VENDOR_ID 0x103C |
2438 | #define PCI_MMC_DEVICE_ID 0x121A | |
2439 | #define PCI_MMC_ADDR_CW 0x10 | |
2440 | ||
b0defcdb CM |
2441 | static void ipmi_pci_cleanup(struct smi_info *info) |
2442 | { | |
2443 | struct pci_dev *pdev = info->addr_source_data; | |
2444 | ||
2445 | pci_disable_device(pdev); | |
2446 | } | |
1da177e4 | 2447 | |
2223cbec | 2448 | static int ipmi_pci_probe_regspacing(struct smi_info *info) |
a6c16c28 CM |
2449 | { |
2450 | if (info->si_type == SI_KCS) { | |
2451 | unsigned char status; | |
2452 | int regspacing; | |
2453 | ||
2454 | info->io.regsize = DEFAULT_REGSIZE; | |
2455 | info->io.regshift = 0; | |
2456 | info->io_size = 2; | |
2457 | info->handlers = &kcs_smi_handlers; | |
2458 | ||
2459 | /* detect 1, 4, 16byte spacing */ | |
2460 | for (regspacing = DEFAULT_REGSPACING; regspacing <= 16;) { | |
2461 | info->io.regspacing = regspacing; | |
2462 | if (info->io_setup(info)) { | |
2463 | dev_err(info->dev, | |
2464 | "Could not setup I/O space\n"); | |
2465 | return DEFAULT_REGSPACING; | |
2466 | } | |
2467 | /* write invalid cmd */ | |
2468 | info->io.outputb(&info->io, 1, 0x10); | |
2469 | /* read status back */ | |
2470 | status = info->io.inputb(&info->io, 1); | |
2471 | info->io_cleanup(info); | |
2472 | if (status) | |
2473 | return regspacing; | |
2474 | regspacing *= 4; | |
2475 | } | |
2476 | } | |
2477 | return DEFAULT_REGSPACING; | |
2478 | } | |
2479 | ||
2223cbec | 2480 | static int ipmi_pci_probe(struct pci_dev *pdev, |
b0defcdb | 2481 | const struct pci_device_id *ent) |
1da177e4 | 2482 | { |
b0defcdb CM |
2483 | int rv; |
2484 | int class_type = pdev->class & PCI_ERMC_CLASSCODE_TYPE_MASK; | |
2485 | struct smi_info *info; | |
1da177e4 | 2486 | |
de5e2ddf | 2487 | info = smi_info_alloc(); |
b0defcdb | 2488 | if (!info) |
1cd441f9 | 2489 | return -ENOMEM; |
1da177e4 | 2490 | |
5fedc4a2 | 2491 | info->addr_source = SI_PCI; |
279fbd0c | 2492 | dev_info(&pdev->dev, "probing via PCI"); |
1da177e4 | 2493 | |
b0defcdb CM |
2494 | switch (class_type) { |
2495 | case PCI_ERMC_CLASSCODE_TYPE_SMIC: | |
2496 | info->si_type = SI_SMIC; | |
2497 | break; | |
1da177e4 | 2498 | |
b0defcdb CM |
2499 | case PCI_ERMC_CLASSCODE_TYPE_KCS: |
2500 | info->si_type = SI_KCS; | |
2501 | break; | |
2502 | ||
2503 | case PCI_ERMC_CLASSCODE_TYPE_BT: | |
2504 | info->si_type = SI_BT; | |
2505 | break; | |
2506 | ||
2507 | default: | |
2508 | kfree(info); | |
279fbd0c | 2509 | dev_info(&pdev->dev, "Unknown IPMI type: %d\n", class_type); |
1cd441f9 | 2510 | return -ENOMEM; |
1da177e4 LT |
2511 | } |
2512 | ||
b0defcdb CM |
2513 | rv = pci_enable_device(pdev); |
2514 | if (rv) { | |
279fbd0c | 2515 | dev_err(&pdev->dev, "couldn't enable PCI device\n"); |
b0defcdb CM |
2516 | kfree(info); |
2517 | return rv; | |
1da177e4 LT |
2518 | } |
2519 | ||
b0defcdb CM |
2520 | info->addr_source_cleanup = ipmi_pci_cleanup; |
2521 | info->addr_source_data = pdev; | |
1da177e4 | 2522 | |
b0defcdb CM |
2523 | if (pci_resource_flags(pdev, 0) & IORESOURCE_IO) { |
2524 | info->io_setup = port_setup; | |
2525 | info->io.addr_type = IPMI_IO_ADDR_SPACE; | |
2526 | } else { | |
2527 | info->io_setup = mem_setup; | |
2528 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; | |
1da177e4 | 2529 | } |
b0defcdb | 2530 | info->io.addr_data = pci_resource_start(pdev, 0); |
1da177e4 | 2531 | |
a6c16c28 CM |
2532 | info->io.regspacing = ipmi_pci_probe_regspacing(info); |
2533 | info->io.regsize = DEFAULT_REGSIZE; | |
b0defcdb | 2534 | info->io.regshift = 0; |
1da177e4 | 2535 | |
b0defcdb CM |
2536 | info->irq = pdev->irq; |
2537 | if (info->irq) | |
2538 | info->irq_setup = std_irq_setup; | |
1da177e4 | 2539 | |
50c812b2 | 2540 | info->dev = &pdev->dev; |
fca3b747 | 2541 | pci_set_drvdata(pdev, info); |
50c812b2 | 2542 | |
279fbd0c MS |
2543 | dev_info(&pdev->dev, "%pR regsize %d spacing %d irq %d\n", |
2544 | &pdev->resource[0], info->io.regsize, info->io.regspacing, | |
2545 | info->irq); | |
2546 | ||
d02b3709 CM |
2547 | rv = add_smi(info); |
2548 | if (rv) { | |
7faefea6 | 2549 | kfree(info); |
d02b3709 CM |
2550 | pci_disable_device(pdev); |
2551 | } | |
7faefea6 | 2552 | |
d02b3709 | 2553 | return rv; |
b0defcdb | 2554 | } |
1da177e4 | 2555 | |
39af33fc | 2556 | static void ipmi_pci_remove(struct pci_dev *pdev) |
b0defcdb | 2557 | { |
fca3b747 CM |
2558 | struct smi_info *info = pci_get_drvdata(pdev); |
2559 | cleanup_one_si(info); | |
b0defcdb | 2560 | } |
1da177e4 | 2561 | |
81d02b7f | 2562 | static const struct pci_device_id ipmi_pci_devices[] = { |
b0defcdb | 2563 | { PCI_DEVICE(PCI_HP_VENDOR_ID, PCI_MMC_DEVICE_ID) }, |
248bdd5e KC |
2564 | { PCI_DEVICE_CLASS(PCI_ERMC_CLASSCODE, PCI_ERMC_CLASSCODE_MASK) }, |
2565 | { 0, } | |
b0defcdb CM |
2566 | }; |
2567 | MODULE_DEVICE_TABLE(pci, ipmi_pci_devices); | |
2568 | ||
2569 | static struct pci_driver ipmi_pci_driver = { | |
c305e3d3 CM |
2570 | .name = DEVICE_NAME, |
2571 | .id_table = ipmi_pci_devices, | |
2572 | .probe = ipmi_pci_probe, | |
bcd2982a | 2573 | .remove = ipmi_pci_remove, |
b0defcdb CM |
2574 | }; |
2575 | #endif /* CONFIG_PCI */ | |
1da177e4 | 2576 | |
a1e9c9dd | 2577 | #ifdef CONFIG_OF |
0fbcf4af CM |
2578 | static const struct of_device_id of_ipmi_match[] = { |
2579 | { .type = "ipmi", .compatible = "ipmi-kcs", | |
2580 | .data = (void *)(unsigned long) SI_KCS }, | |
2581 | { .type = "ipmi", .compatible = "ipmi-smic", | |
2582 | .data = (void *)(unsigned long) SI_SMIC }, | |
2583 | { .type = "ipmi", .compatible = "ipmi-bt", | |
2584 | .data = (void *)(unsigned long) SI_BT }, | |
2585 | {}, | |
2586 | }; | |
66f44018 | 2587 | MODULE_DEVICE_TABLE(of, of_ipmi_match); |
0fbcf4af CM |
2588 | |
2589 | static int of_ipmi_probe(struct platform_device *dev) | |
2590 | { | |
b1608d69 | 2591 | const struct of_device_id *match; |
dba9b4f6 CM |
2592 | struct smi_info *info; |
2593 | struct resource resource; | |
da81c3b9 | 2594 | const __be32 *regsize, *regspacing, *regshift; |
61c7a080 | 2595 | struct device_node *np = dev->dev.of_node; |
dba9b4f6 CM |
2596 | int ret; |
2597 | int proplen; | |
2598 | ||
279fbd0c | 2599 | dev_info(&dev->dev, "probing via device tree\n"); |
dba9b4f6 | 2600 | |
0fbcf4af | 2601 | match = of_match_device(of_ipmi_match, &dev->dev); |
b1608d69 | 2602 | if (!match) |
0fbcf4af | 2603 | return -ENODEV; |
a1e9c9dd | 2604 | |
08dc4169 BH |
2605 | if (!of_device_is_available(np)) |
2606 | return -EINVAL; | |
2607 | ||
dba9b4f6 CM |
2608 | ret = of_address_to_resource(np, 0, &resource); |
2609 | if (ret) { | |
2610 | dev_warn(&dev->dev, PFX "invalid address from OF\n"); | |
2611 | return ret; | |
2612 | } | |
2613 | ||
9c25099d | 2614 | regsize = of_get_property(np, "reg-size", &proplen); |
dba9b4f6 CM |
2615 | if (regsize && proplen != 4) { |
2616 | dev_warn(&dev->dev, PFX "invalid regsize from OF\n"); | |
2617 | return -EINVAL; | |
2618 | } | |
2619 | ||
9c25099d | 2620 | regspacing = of_get_property(np, "reg-spacing", &proplen); |
dba9b4f6 CM |
2621 | if (regspacing && proplen != 4) { |
2622 | dev_warn(&dev->dev, PFX "invalid regspacing from OF\n"); | |
2623 | return -EINVAL; | |
2624 | } | |
2625 | ||
9c25099d | 2626 | regshift = of_get_property(np, "reg-shift", &proplen); |
dba9b4f6 CM |
2627 | if (regshift && proplen != 4) { |
2628 | dev_warn(&dev->dev, PFX "invalid regshift from OF\n"); | |
2629 | return -EINVAL; | |
2630 | } | |
2631 | ||
de5e2ddf | 2632 | info = smi_info_alloc(); |
dba9b4f6 CM |
2633 | |
2634 | if (!info) { | |
2635 | dev_err(&dev->dev, | |
279fbd0c | 2636 | "could not allocate memory for OF probe\n"); |
dba9b4f6 CM |
2637 | return -ENOMEM; |
2638 | } | |
2639 | ||
b1608d69 | 2640 | info->si_type = (enum si_type) match->data; |
5fedc4a2 | 2641 | info->addr_source = SI_DEVICETREE; |
dba9b4f6 CM |
2642 | info->irq_setup = std_irq_setup; |
2643 | ||
3b7ec117 NC |
2644 | if (resource.flags & IORESOURCE_IO) { |
2645 | info->io_setup = port_setup; | |
2646 | info->io.addr_type = IPMI_IO_ADDR_SPACE; | |
2647 | } else { | |
2648 | info->io_setup = mem_setup; | |
2649 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; | |
2650 | } | |
2651 | ||
dba9b4f6 CM |
2652 | info->io.addr_data = resource.start; |
2653 | ||
da81c3b9 RH |
2654 | info->io.regsize = regsize ? be32_to_cpup(regsize) : DEFAULT_REGSIZE; |
2655 | info->io.regspacing = regspacing ? be32_to_cpup(regspacing) : DEFAULT_REGSPACING; | |
2656 | info->io.regshift = regshift ? be32_to_cpup(regshift) : 0; | |
dba9b4f6 | 2657 | |
61c7a080 | 2658 | info->irq = irq_of_parse_and_map(dev->dev.of_node, 0); |
dba9b4f6 CM |
2659 | info->dev = &dev->dev; |
2660 | ||
279fbd0c | 2661 | dev_dbg(&dev->dev, "addr 0x%lx regsize %d spacing %d irq %d\n", |
dba9b4f6 CM |
2662 | info->io.addr_data, info->io.regsize, info->io.regspacing, |
2663 | info->irq); | |
2664 | ||
9de33df4 | 2665 | dev_set_drvdata(&dev->dev, info); |
dba9b4f6 | 2666 | |
d02b3709 CM |
2667 | ret = add_smi(info); |
2668 | if (ret) { | |
7faefea6 | 2669 | kfree(info); |
d02b3709 | 2670 | return ret; |
7faefea6 | 2671 | } |
7faefea6 | 2672 | return 0; |
dba9b4f6 | 2673 | } |
0fbcf4af CM |
2674 | #else |
2675 | #define of_ipmi_match NULL | |
2676 | static int of_ipmi_probe(struct platform_device *dev) | |
2677 | { | |
2678 | return -ENODEV; | |
2679 | } | |
2680 | #endif | |
dba9b4f6 | 2681 | |
0fbcf4af CM |
2682 | #ifdef CONFIG_ACPI |
2683 | static int acpi_ipmi_probe(struct platform_device *dev) | |
dba9b4f6 | 2684 | { |
0fbcf4af CM |
2685 | struct smi_info *info; |
2686 | struct resource *res, *res_second; | |
2687 | acpi_handle handle; | |
2688 | acpi_status status; | |
2689 | unsigned long long tmp; | |
2690 | int rv = -EINVAL; | |
2691 | ||
9f0257b3 JL |
2692 | if (!si_tryacpi) |
2693 | return 0; | |
2694 | ||
0fbcf4af CM |
2695 | handle = ACPI_HANDLE(&dev->dev); |
2696 | if (!handle) | |
2697 | return -ENODEV; | |
2698 | ||
2699 | info = smi_info_alloc(); | |
2700 | if (!info) | |
2701 | return -ENOMEM; | |
2702 | ||
2703 | info->addr_source = SI_ACPI; | |
2704 | dev_info(&dev->dev, PFX "probing via ACPI\n"); | |
2705 | ||
2706 | info->addr_info.acpi_info.acpi_handle = handle; | |
2707 | ||
2708 | /* _IFT tells us the interface type: KCS, BT, etc */ | |
2709 | status = acpi_evaluate_integer(handle, "_IFT", NULL, &tmp); | |
2710 | if (ACPI_FAILURE(status)) { | |
2711 | dev_err(&dev->dev, "Could not find ACPI IPMI interface type\n"); | |
2712 | goto err_free; | |
2713 | } | |
2714 | ||
2715 | switch (tmp) { | |
2716 | case 1: | |
2717 | info->si_type = SI_KCS; | |
2718 | break; | |
2719 | case 2: | |
2720 | info->si_type = SI_SMIC; | |
2721 | break; | |
2722 | case 3: | |
2723 | info->si_type = SI_BT; | |
2724 | break; | |
2725 | case 4: /* SSIF, just ignore */ | |
2726 | rv = -ENODEV; | |
2727 | goto err_free; | |
2728 | default: | |
2729 | dev_info(&dev->dev, "unknown IPMI type %lld\n", tmp); | |
2730 | goto err_free; | |
2731 | } | |
2732 | ||
2733 | res = platform_get_resource(dev, IORESOURCE_IO, 0); | |
2734 | if (res) { | |
2735 | info->io_setup = port_setup; | |
2736 | info->io.addr_type = IPMI_IO_ADDR_SPACE; | |
2737 | } else { | |
2738 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | |
2739 | if (res) { | |
2740 | info->io_setup = mem_setup; | |
2741 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; | |
2742 | } | |
2743 | } | |
2744 | if (!res) { | |
2745 | dev_err(&dev->dev, "no I/O or memory address\n"); | |
2746 | goto err_free; | |
2747 | } | |
2748 | info->io.addr_data = res->start; | |
2749 | ||
2750 | info->io.regspacing = DEFAULT_REGSPACING; | |
2751 | res_second = platform_get_resource(dev, | |
2752 | (info->io.addr_type == IPMI_IO_ADDR_SPACE) ? | |
2753 | IORESOURCE_IO : IORESOURCE_MEM, | |
2754 | 1); | |
2755 | if (res_second) { | |
2756 | if (res_second->start > info->io.addr_data) | |
2757 | info->io.regspacing = | |
2758 | res_second->start - info->io.addr_data; | |
2759 | } | |
2760 | info->io.regsize = DEFAULT_REGSPACING; | |
2761 | info->io.regshift = 0; | |
2762 | ||
2763 | /* If _GPE exists, use it; otherwise use standard interrupts */ | |
2764 | status = acpi_evaluate_integer(handle, "_GPE", NULL, &tmp); | |
2765 | if (ACPI_SUCCESS(status)) { | |
2766 | info->irq = tmp; | |
2767 | info->irq_setup = acpi_gpe_irq_setup; | |
2768 | } else { | |
2769 | int irq = platform_get_irq(dev, 0); | |
2770 | ||
2771 | if (irq > 0) { | |
2772 | info->irq = irq; | |
2773 | info->irq_setup = std_irq_setup; | |
2774 | } | |
2775 | } | |
2776 | ||
2777 | info->dev = &dev->dev; | |
2778 | platform_set_drvdata(dev, info); | |
2779 | ||
2780 | dev_info(info->dev, "%pR regsize %d spacing %d irq %d\n", | |
2781 | res, info->io.regsize, info->io.regspacing, | |
2782 | info->irq); | |
2783 | ||
2784 | rv = add_smi(info); | |
2785 | if (rv) | |
2786 | kfree(info); | |
2787 | ||
2788 | return rv; | |
2789 | ||
2790 | err_free: | |
2791 | kfree(info); | |
2792 | return rv; | |
2793 | } | |
2794 | ||
81d02b7f | 2795 | static const struct acpi_device_id acpi_ipmi_match[] = { |
0fbcf4af CM |
2796 | { "IPI0001", 0 }, |
2797 | { }, | |
2798 | }; | |
2799 | MODULE_DEVICE_TABLE(acpi, acpi_ipmi_match); | |
2800 | #else | |
2801 | static int acpi_ipmi_probe(struct platform_device *dev) | |
2802 | { | |
2803 | return -ENODEV; | |
2804 | } | |
a1e9c9dd | 2805 | #endif |
0fbcf4af CM |
2806 | |
2807 | static int ipmi_probe(struct platform_device *dev) | |
2808 | { | |
2809 | if (of_ipmi_probe(dev) == 0) | |
2810 | return 0; | |
2811 | ||
2812 | return acpi_ipmi_probe(dev); | |
dba9b4f6 CM |
2813 | } |
2814 | ||
0fbcf4af | 2815 | static int ipmi_remove(struct platform_device *dev) |
dba9b4f6 | 2816 | { |
0fbcf4af CM |
2817 | struct smi_info *info = dev_get_drvdata(&dev->dev); |
2818 | ||
a7930899 | 2819 | cleanup_one_si(info); |
0fbcf4af CM |
2820 | return 0; |
2821 | } | |
dba9b4f6 | 2822 | |
a1e9c9dd | 2823 | static struct platform_driver ipmi_driver = { |
4018294b | 2824 | .driver = { |
a1e9c9dd | 2825 | .name = DEVICE_NAME, |
0fbcf4af CM |
2826 | .of_match_table = of_ipmi_match, |
2827 | .acpi_match_table = ACPI_PTR(acpi_ipmi_match), | |
4018294b | 2828 | }, |
a1e9c9dd | 2829 | .probe = ipmi_probe, |
bcd2982a | 2830 | .remove = ipmi_remove, |
dba9b4f6 | 2831 | }; |
dba9b4f6 | 2832 | |
fdbeb7de TB |
2833 | #ifdef CONFIG_PARISC |
2834 | static int ipmi_parisc_probe(struct parisc_device *dev) | |
2835 | { | |
2836 | struct smi_info *info; | |
dfa19426 | 2837 | int rv; |
fdbeb7de TB |
2838 | |
2839 | info = smi_info_alloc(); | |
2840 | ||
2841 | if (!info) { | |
2842 | dev_err(&dev->dev, | |
2843 | "could not allocate memory for PARISC probe\n"); | |
2844 | return -ENOMEM; | |
2845 | } | |
2846 | ||
2847 | info->si_type = SI_KCS; | |
2848 | info->addr_source = SI_DEVICETREE; | |
2849 | info->io_setup = mem_setup; | |
2850 | info->io.addr_type = IPMI_MEM_ADDR_SPACE; | |
2851 | info->io.addr_data = dev->hpa.start; | |
2852 | info->io.regsize = 1; | |
2853 | info->io.regspacing = 1; | |
2854 | info->io.regshift = 0; | |
2855 | info->irq = 0; /* no interrupt */ | |
2856 | info->irq_setup = NULL; | |
2857 | info->dev = &dev->dev; | |
2858 | ||
2859 | dev_dbg(&dev->dev, "addr 0x%lx\n", info->io.addr_data); | |
2860 | ||
2861 | dev_set_drvdata(&dev->dev, info); | |
2862 | ||
d02b3709 CM |
2863 | rv = add_smi(info); |
2864 | if (rv) { | |
fdbeb7de | 2865 | kfree(info); |
d02b3709 | 2866 | return rv; |
fdbeb7de TB |
2867 | } |
2868 | ||
2869 | return 0; | |
2870 | } | |
2871 | ||
2872 | static int ipmi_parisc_remove(struct parisc_device *dev) | |
2873 | { | |
2874 | cleanup_one_si(dev_get_drvdata(&dev->dev)); | |
2875 | return 0; | |
2876 | } | |
2877 | ||
99ee6735 | 2878 | static const struct parisc_device_id ipmi_parisc_tbl[] = { |
fdbeb7de TB |
2879 | { HPHW_MC, HVERSION_REV_ANY_ID, 0x004, 0xC0 }, |
2880 | { 0, } | |
2881 | }; | |
2882 | ||
2883 | static struct parisc_driver ipmi_parisc_driver = { | |
2884 | .name = "ipmi", | |
2885 | .id_table = ipmi_parisc_tbl, | |
2886 | .probe = ipmi_parisc_probe, | |
2887 | .remove = ipmi_parisc_remove, | |
2888 | }; | |
2889 | #endif /* CONFIG_PARISC */ | |
2890 | ||
40112ae7 | 2891 | static int wait_for_msg_done(struct smi_info *smi_info) |
1da177e4 | 2892 | { |
50c812b2 | 2893 | enum si_sm_result smi_result; |
1da177e4 LT |
2894 | |
2895 | smi_result = smi_info->handlers->event(smi_info->si_sm, 0); | |
c305e3d3 | 2896 | for (;;) { |
c3e7e791 CM |
2897 | if (smi_result == SI_SM_CALL_WITH_DELAY || |
2898 | smi_result == SI_SM_CALL_WITH_TICK_DELAY) { | |
da4cd8df | 2899 | schedule_timeout_uninterruptible(1); |
1da177e4 | 2900 | smi_result = smi_info->handlers->event( |
e21404dc | 2901 | smi_info->si_sm, jiffies_to_usecs(1)); |
c305e3d3 | 2902 | } else if (smi_result == SI_SM_CALL_WITHOUT_DELAY) { |
1da177e4 LT |
2903 | smi_result = smi_info->handlers->event( |
2904 | smi_info->si_sm, 0); | |
c305e3d3 | 2905 | } else |
1da177e4 LT |
2906 | break; |
2907 | } | |
40112ae7 | 2908 | if (smi_result == SI_SM_HOSED) |
c305e3d3 CM |
2909 | /* |
2910 | * We couldn't get the state machine to run, so whatever's at | |
2911 | * the port is probably not an IPMI SMI interface. | |
2912 | */ | |
40112ae7 CM |
2913 | return -ENODEV; |
2914 | ||
2915 | return 0; | |
2916 | } | |
2917 | ||
2918 | static int try_get_dev_id(struct smi_info *smi_info) | |
2919 | { | |
2920 | unsigned char msg[2]; | |
2921 | unsigned char *resp; | |
2922 | unsigned long resp_len; | |
2923 | int rv = 0; | |
2924 | ||
2925 | resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL); | |
2926 | if (!resp) | |
2927 | return -ENOMEM; | |
2928 | ||
2929 | /* | |
2930 | * Do a Get Device ID command, since it comes back with some | |
2931 | * useful info. | |
2932 | */ | |
2933 | msg[0] = IPMI_NETFN_APP_REQUEST << 2; | |
2934 | msg[1] = IPMI_GET_DEVICE_ID_CMD; | |
2935 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2); | |
2936 | ||
2937 | rv = wait_for_msg_done(smi_info); | |
2938 | if (rv) | |
1da177e4 | 2939 | goto out; |
1da177e4 | 2940 | |
1da177e4 LT |
2941 | resp_len = smi_info->handlers->get_result(smi_info->si_sm, |
2942 | resp, IPMI_MAX_MSG_LENGTH); | |
1da177e4 | 2943 | |
d8c98618 CM |
2944 | /* Check and record info from the get device id, in case we need it. */ |
2945 | rv = ipmi_demangle_device_id(resp, resp_len, &smi_info->device_id); | |
1da177e4 | 2946 | |
76824852 | 2947 | out: |
1da177e4 LT |
2948 | kfree(resp); |
2949 | return rv; | |
2950 | } | |
2951 | ||
d0882897 | 2952 | static int get_global_enables(struct smi_info *smi_info, u8 *enables) |
1e7d6a45 CM |
2953 | { |
2954 | unsigned char msg[3]; | |
2955 | unsigned char *resp; | |
2956 | unsigned long resp_len; | |
2957 | int rv; | |
2958 | ||
2959 | resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL); | |
d0882897 CM |
2960 | if (!resp) |
2961 | return -ENOMEM; | |
1e7d6a45 CM |
2962 | |
2963 | msg[0] = IPMI_NETFN_APP_REQUEST << 2; | |
2964 | msg[1] = IPMI_GET_BMC_GLOBAL_ENABLES_CMD; | |
2965 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2); | |
2966 | ||
2967 | rv = wait_for_msg_done(smi_info); | |
2968 | if (rv) { | |
d0882897 CM |
2969 | dev_warn(smi_info->dev, |
2970 | "Error getting response from get global enables command: %d\n", | |
2971 | rv); | |
1e7d6a45 CM |
2972 | goto out; |
2973 | } | |
2974 | ||
2975 | resp_len = smi_info->handlers->get_result(smi_info->si_sm, | |
2976 | resp, IPMI_MAX_MSG_LENGTH); | |
2977 | ||
2978 | if (resp_len < 4 || | |
2979 | resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 || | |
2980 | resp[1] != IPMI_GET_BMC_GLOBAL_ENABLES_CMD || | |
2981 | resp[2] != 0) { | |
d0882897 CM |
2982 | dev_warn(smi_info->dev, |
2983 | "Invalid return from get global enables command: %ld %x %x %x\n", | |
2984 | resp_len, resp[0], resp[1], resp[2]); | |
1e7d6a45 CM |
2985 | rv = -EINVAL; |
2986 | goto out; | |
d0882897 CM |
2987 | } else { |
2988 | *enables = resp[3]; | |
1e7d6a45 CM |
2989 | } |
2990 | ||
d0882897 CM |
2991 | out: |
2992 | kfree(resp); | |
2993 | return rv; | |
2994 | } | |
2995 | ||
2996 | /* | |
2997 | * Returns 1 if it gets an error from the command. | |
2998 | */ | |
2999 | static int set_global_enables(struct smi_info *smi_info, u8 enables) | |
3000 | { | |
3001 | unsigned char msg[3]; | |
3002 | unsigned char *resp; | |
3003 | unsigned long resp_len; | |
3004 | int rv; | |
3005 | ||
3006 | resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL); | |
3007 | if (!resp) | |
3008 | return -ENOMEM; | |
1e7d6a45 CM |
3009 | |
3010 | msg[0] = IPMI_NETFN_APP_REQUEST << 2; | |
3011 | msg[1] = IPMI_SET_BMC_GLOBAL_ENABLES_CMD; | |
d0882897 | 3012 | msg[2] = enables; |
1e7d6a45 CM |
3013 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 3); |
3014 | ||
3015 | rv = wait_for_msg_done(smi_info); | |
3016 | if (rv) { | |
d0882897 CM |
3017 | dev_warn(smi_info->dev, |
3018 | "Error getting response from set global enables command: %d\n", | |
3019 | rv); | |
1e7d6a45 CM |
3020 | goto out; |
3021 | } | |
3022 | ||
3023 | resp_len = smi_info->handlers->get_result(smi_info->si_sm, | |
3024 | resp, IPMI_MAX_MSG_LENGTH); | |
3025 | ||
3026 | if (resp_len < 3 || | |
3027 | resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 || | |
3028 | resp[1] != IPMI_SET_BMC_GLOBAL_ENABLES_CMD) { | |
d0882897 CM |
3029 | dev_warn(smi_info->dev, |
3030 | "Invalid return from set global enables command: %ld %x %x\n", | |
3031 | resp_len, resp[0], resp[1]); | |
1e7d6a45 CM |
3032 | rv = -EINVAL; |
3033 | goto out; | |
3034 | } | |
3035 | ||
d0882897 CM |
3036 | if (resp[2] != 0) |
3037 | rv = 1; | |
3038 | ||
3039 | out: | |
3040 | kfree(resp); | |
3041 | return rv; | |
3042 | } | |
3043 | ||
3044 | /* | |
3045 | * Some BMCs do not support clearing the receive irq bit in the global | |
3046 | * enables (even if they don't support interrupts on the BMC). Check | |
3047 | * for this and handle it properly. | |
3048 | */ | |
3049 | static void check_clr_rcv_irq(struct smi_info *smi_info) | |
3050 | { | |
3051 | u8 enables = 0; | |
3052 | int rv; | |
3053 | ||
3054 | rv = get_global_enables(smi_info, &enables); | |
3055 | if (!rv) { | |
3056 | if ((enables & IPMI_BMC_RCV_MSG_INTR) == 0) | |
3057 | /* Already clear, should work ok. */ | |
3058 | return; | |
3059 | ||
3060 | enables &= ~IPMI_BMC_RCV_MSG_INTR; | |
3061 | rv = set_global_enables(smi_info, enables); | |
3062 | } | |
3063 | ||
3064 | if (rv < 0) { | |
3065 | dev_err(smi_info->dev, | |
3066 | "Cannot check clearing the rcv irq: %d\n", rv); | |
3067 | return; | |
3068 | } | |
3069 | ||
3070 | if (rv) { | |
1e7d6a45 CM |
3071 | /* |
3072 | * An error when setting the event buffer bit means | |
3073 | * clearing the bit is not supported. | |
3074 | */ | |
d0882897 CM |
3075 | dev_warn(smi_info->dev, |
3076 | "The BMC does not support clearing the recv irq bit, compensating, but the BMC needs to be fixed.\n"); | |
3077 | smi_info->cannot_disable_irq = true; | |
3078 | } | |
3079 | } | |
3080 | ||
3081 | /* | |
3082 | * Some BMCs do not support setting the interrupt bits in the global | |
3083 | * enables even if they support interrupts. Clearly bad, but we can | |
3084 | * compensate. | |
3085 | */ | |
3086 | static void check_set_rcv_irq(struct smi_info *smi_info) | |
3087 | { | |
3088 | u8 enables = 0; | |
3089 | int rv; | |
3090 | ||
3091 | if (!smi_info->irq) | |
3092 | return; | |
3093 | ||
3094 | rv = get_global_enables(smi_info, &enables); | |
3095 | if (!rv) { | |
3096 | enables |= IPMI_BMC_RCV_MSG_INTR; | |
3097 | rv = set_global_enables(smi_info, enables); | |
3098 | } | |
3099 | ||
3100 | if (rv < 0) { | |
3101 | dev_err(smi_info->dev, | |
3102 | "Cannot check setting the rcv irq: %d\n", rv); | |
3103 | return; | |
3104 | } | |
3105 | ||
3106 | if (rv) { | |
3107 | /* | |
3108 | * An error when setting the event buffer bit means | |
3109 | * setting the bit is not supported. | |
3110 | */ | |
3111 | dev_warn(smi_info->dev, | |
3112 | "The BMC does not support setting the recv irq bit, compensating, but the BMC needs to be fixed.\n"); | |
3113 | smi_info->cannot_disable_irq = true; | |
3114 | smi_info->irq_enable_broken = true; | |
1e7d6a45 | 3115 | } |
1e7d6a45 CM |
3116 | } |
3117 | ||
40112ae7 CM |
3118 | static int try_enable_event_buffer(struct smi_info *smi_info) |
3119 | { | |
3120 | unsigned char msg[3]; | |
3121 | unsigned char *resp; | |
3122 | unsigned long resp_len; | |
3123 | int rv = 0; | |
3124 | ||
3125 | resp = kmalloc(IPMI_MAX_MSG_LENGTH, GFP_KERNEL); | |
3126 | if (!resp) | |
3127 | return -ENOMEM; | |
3128 | ||
3129 | msg[0] = IPMI_NETFN_APP_REQUEST << 2; | |
3130 | msg[1] = IPMI_GET_BMC_GLOBAL_ENABLES_CMD; | |
3131 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 2); | |
3132 | ||
3133 | rv = wait_for_msg_done(smi_info); | |
3134 | if (rv) { | |
279fbd0c MS |
3135 | printk(KERN_WARNING PFX "Error getting response from get" |
3136 | " global enables command, the event buffer is not" | |
40112ae7 CM |
3137 | " enabled.\n"); |
3138 | goto out; | |
3139 | } | |
3140 | ||
3141 | resp_len = smi_info->handlers->get_result(smi_info->si_sm, | |
3142 | resp, IPMI_MAX_MSG_LENGTH); | |
3143 | ||
3144 | if (resp_len < 4 || | |
3145 | resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 || | |
3146 | resp[1] != IPMI_GET_BMC_GLOBAL_ENABLES_CMD || | |
3147 | resp[2] != 0) { | |
279fbd0c MS |
3148 | printk(KERN_WARNING PFX "Invalid return from get global" |
3149 | " enables command, cannot enable the event buffer.\n"); | |
40112ae7 CM |
3150 | rv = -EINVAL; |
3151 | goto out; | |
3152 | } | |
3153 | ||
d9b7e4f7 | 3154 | if (resp[3] & IPMI_BMC_EVT_MSG_BUFF) { |
40112ae7 | 3155 | /* buffer is already enabled, nothing to do. */ |
d9b7e4f7 | 3156 | smi_info->supports_event_msg_buff = true; |
40112ae7 | 3157 | goto out; |
d9b7e4f7 | 3158 | } |
40112ae7 CM |
3159 | |
3160 | msg[0] = IPMI_NETFN_APP_REQUEST << 2; | |
3161 | msg[1] = IPMI_SET_BMC_GLOBAL_ENABLES_CMD; | |
3162 | msg[2] = resp[3] | IPMI_BMC_EVT_MSG_BUFF; | |
3163 | smi_info->handlers->start_transaction(smi_info->si_sm, msg, 3); | |
3164 | ||
3165 | rv = wait_for_msg_done(smi_info); | |
3166 | if (rv) { | |
279fbd0c MS |
3167 | printk(KERN_WARNING PFX "Error getting response from set" |
3168 | " global, enables command, the event buffer is not" | |
40112ae7 CM |
3169 | " enabled.\n"); |
3170 | goto out; | |
3171 | } | |
3172 | ||
3173 | resp_len = smi_info->handlers->get_result(smi_info->si_sm, | |
3174 | resp, IPMI_MAX_MSG_LENGTH); | |
3175 | ||
3176 | if (resp_len < 3 || | |
3177 | resp[0] != (IPMI_NETFN_APP_REQUEST | 1) << 2 || | |
3178 | resp[1] != IPMI_SET_BMC_GLOBAL_ENABLES_CMD) { | |
279fbd0c MS |
3179 | printk(KERN_WARNING PFX "Invalid return from get global," |
3180 | "enables command, not enable the event buffer.\n"); | |
40112ae7 CM |
3181 | rv = -EINVAL; |
3182 | goto out; | |
3183 | } | |
3184 | ||
3185 | if (resp[2] != 0) | |
3186 | /* | |
3187 | * An error when setting the event buffer bit means | |
3188 | * that the event buffer is not supported. | |
3189 | */ | |
3190 | rv = -ENOENT; | |
d9b7e4f7 CM |
3191 | else |
3192 | smi_info->supports_event_msg_buff = true; | |
3193 | ||
76824852 | 3194 | out: |
40112ae7 CM |
3195 | kfree(resp); |
3196 | return rv; | |
3197 | } | |
3198 | ||
07412736 | 3199 | static int smi_type_proc_show(struct seq_file *m, void *v) |
1da177e4 | 3200 | { |
07412736 | 3201 | struct smi_info *smi = m->private; |
1da177e4 | 3202 | |
d6c5dc18 JP |
3203 | seq_printf(m, "%s\n", si_to_str[smi->si_type]); |
3204 | ||
5e33cd0c | 3205 | return 0; |
1da177e4 LT |
3206 | } |
3207 | ||
07412736 | 3208 | static int smi_type_proc_open(struct inode *inode, struct file *file) |
1da177e4 | 3209 | { |
d9dda78b | 3210 | return single_open(file, smi_type_proc_show, PDE_DATA(inode)); |
07412736 AD |
3211 | } |
3212 | ||
3213 | static const struct file_operations smi_type_proc_ops = { | |
3214 | .open = smi_type_proc_open, | |
3215 | .read = seq_read, | |
3216 | .llseek = seq_lseek, | |
3217 | .release = single_release, | |
3218 | }; | |
3219 | ||
3220 | static int smi_si_stats_proc_show(struct seq_file *m, void *v) | |
3221 | { | |
3222 | struct smi_info *smi = m->private; | |
1da177e4 | 3223 | |
07412736 | 3224 | seq_printf(m, "interrupts_enabled: %d\n", |
b0defcdb | 3225 | smi->irq && !smi->interrupt_disabled); |
07412736 | 3226 | seq_printf(m, "short_timeouts: %u\n", |
64959e2d | 3227 | smi_get_stat(smi, short_timeouts)); |
07412736 | 3228 | seq_printf(m, "long_timeouts: %u\n", |
64959e2d | 3229 | smi_get_stat(smi, long_timeouts)); |
07412736 | 3230 | seq_printf(m, "idles: %u\n", |
64959e2d | 3231 | smi_get_stat(smi, idles)); |
07412736 | 3232 | seq_printf(m, "interrupts: %u\n", |
64959e2d | 3233 | smi_get_stat(smi, interrupts)); |
07412736 | 3234 | seq_printf(m, "attentions: %u\n", |
64959e2d | 3235 | smi_get_stat(smi, attentions)); |
07412736 | 3236 | seq_printf(m, "flag_fetches: %u\n", |
64959e2d | 3237 | smi_get_stat(smi, flag_fetches)); |
07412736 | 3238 | seq_printf(m, "hosed_count: %u\n", |
64959e2d | 3239 | smi_get_stat(smi, hosed_count)); |
07412736 | 3240 | seq_printf(m, "complete_transactions: %u\n", |
64959e2d | 3241 | smi_get_stat(smi, complete_transactions)); |
07412736 | 3242 | seq_printf(m, "events: %u\n", |
64959e2d | 3243 | smi_get_stat(smi, events)); |
07412736 | 3244 | seq_printf(m, "watchdog_pretimeouts: %u\n", |
64959e2d | 3245 | smi_get_stat(smi, watchdog_pretimeouts)); |
07412736 | 3246 | seq_printf(m, "incoming_messages: %u\n", |
64959e2d | 3247 | smi_get_stat(smi, incoming_messages)); |
07412736 AD |
3248 | return 0; |
3249 | } | |
1da177e4 | 3250 | |
07412736 AD |
3251 | static int smi_si_stats_proc_open(struct inode *inode, struct file *file) |
3252 | { | |
d9dda78b | 3253 | return single_open(file, smi_si_stats_proc_show, PDE_DATA(inode)); |
b361e27b CM |
3254 | } |
3255 | ||
07412736 AD |
3256 | static const struct file_operations smi_si_stats_proc_ops = { |
3257 | .open = smi_si_stats_proc_open, | |
3258 | .read = seq_read, | |
3259 | .llseek = seq_lseek, | |
3260 | .release = single_release, | |
3261 | }; | |
3262 | ||
3263 | static int smi_params_proc_show(struct seq_file *m, void *v) | |
b361e27b | 3264 | { |
07412736 | 3265 | struct smi_info *smi = m->private; |
b361e27b | 3266 | |
d6c5dc18 JP |
3267 | seq_printf(m, |
3268 | "%s,%s,0x%lx,rsp=%d,rsi=%d,rsh=%d,irq=%d,ipmb=%d\n", | |
3269 | si_to_str[smi->si_type], | |
3270 | addr_space_to_str[smi->io.addr_type], | |
3271 | smi->io.addr_data, | |
3272 | smi->io.regspacing, | |
3273 | smi->io.regsize, | |
3274 | smi->io.regshift, | |
3275 | smi->irq, | |
3276 | smi->slave_addr); | |
3277 | ||
5e33cd0c | 3278 | return 0; |
1da177e4 LT |
3279 | } |
3280 | ||
07412736 AD |
3281 | static int smi_params_proc_open(struct inode *inode, struct file *file) |
3282 | { | |
d9dda78b | 3283 | return single_open(file, smi_params_proc_show, PDE_DATA(inode)); |
07412736 AD |
3284 | } |
3285 | ||
3286 | static const struct file_operations smi_params_proc_ops = { | |
3287 | .open = smi_params_proc_open, | |
3288 | .read = seq_read, | |
3289 | .llseek = seq_lseek, | |
3290 | .release = single_release, | |
3291 | }; | |
3292 | ||
3ae0e0f9 CM |
3293 | /* |
3294 | * oem_data_avail_to_receive_msg_avail | |
3295 | * @info - smi_info structure with msg_flags set | |
3296 | * | |
3297 | * Converts flags from OEM_DATA_AVAIL to RECEIVE_MSG_AVAIL | |
3298 | * Returns 1 indicating need to re-run handle_flags(). | |
3299 | */ | |
3300 | static int oem_data_avail_to_receive_msg_avail(struct smi_info *smi_info) | |
3301 | { | |
e8b33617 | 3302 | smi_info->msg_flags = ((smi_info->msg_flags & ~OEM_DATA_AVAIL) | |
c305e3d3 | 3303 | RECEIVE_MSG_AVAIL); |
3ae0e0f9 CM |
3304 | return 1; |
3305 | } | |
3306 | ||
3307 | /* | |
3308 | * setup_dell_poweredge_oem_data_handler | |
3309 | * @info - smi_info.device_id must be populated | |
3310 | * | |
3311 | * Systems that match, but have firmware version < 1.40 may assert | |
3312 | * OEM0_DATA_AVAIL on their own, without being told via Set Flags that | |
3313 | * it's safe to do so. Such systems will de-assert OEM1_DATA_AVAIL | |
3314 | * upon receipt of IPMI_GET_MSG_CMD, so we should treat these flags | |
3315 | * as RECEIVE_MSG_AVAIL instead. | |
3316 | * | |
3317 | * As Dell has no plans to release IPMI 1.5 firmware that *ever* | |
3318 | * assert the OEM[012] bits, and if it did, the driver would have to | |
3319 | * change to handle that properly, we don't actually check for the | |
3320 | * firmware version. | |
3321 | * Device ID = 0x20 BMC on PowerEdge 8G servers | |
3322 | * Device Revision = 0x80 | |
3323 | * Firmware Revision1 = 0x01 BMC version 1.40 | |
3324 | * Firmware Revision2 = 0x40 BCD encoded | |
3325 | * IPMI Version = 0x51 IPMI 1.5 | |
3326 | * Manufacturer ID = A2 02 00 Dell IANA | |
3327 | * | |
d5a2b89a CM |
3328 | * Additionally, PowerEdge systems with IPMI < 1.5 may also assert |
3329 | * OEM0_DATA_AVAIL and needs to be treated as RECEIVE_MSG_AVAIL. | |
3330 | * | |
3ae0e0f9 CM |
3331 | */ |
3332 | #define DELL_POWEREDGE_8G_BMC_DEVICE_ID 0x20 | |
3333 | #define DELL_POWEREDGE_8G_BMC_DEVICE_REV 0x80 | |
3334 | #define DELL_POWEREDGE_8G_BMC_IPMI_VERSION 0x51 | |
50c812b2 | 3335 | #define DELL_IANA_MFR_ID 0x0002a2 |
3ae0e0f9 CM |
3336 | static void setup_dell_poweredge_oem_data_handler(struct smi_info *smi_info) |
3337 | { | |
3338 | struct ipmi_device_id *id = &smi_info->device_id; | |
50c812b2 | 3339 | if (id->manufacturer_id == DELL_IANA_MFR_ID) { |
d5a2b89a CM |
3340 | if (id->device_id == DELL_POWEREDGE_8G_BMC_DEVICE_ID && |
3341 | id->device_revision == DELL_POWEREDGE_8G_BMC_DEVICE_REV && | |
50c812b2 | 3342 | id->ipmi_version == DELL_POWEREDGE_8G_BMC_IPMI_VERSION) { |
d5a2b89a CM |
3343 | smi_info->oem_data_avail_handler = |
3344 | oem_data_avail_to_receive_msg_avail; | |
c305e3d3 CM |
3345 | } else if (ipmi_version_major(id) < 1 || |
3346 | (ipmi_version_major(id) == 1 && | |
3347 | ipmi_version_minor(id) < 5)) { | |
d5a2b89a CM |
3348 | smi_info->oem_data_avail_handler = |
3349 | oem_data_avail_to_receive_msg_avail; | |
3350 | } | |
3ae0e0f9 CM |
3351 | } |
3352 | } | |
3353 | ||
ea94027b CM |
3354 | #define CANNOT_RETURN_REQUESTED_LENGTH 0xCA |
3355 | static void return_hosed_msg_badsize(struct smi_info *smi_info) | |
3356 | { | |
3357 | struct ipmi_smi_msg *msg = smi_info->curr_msg; | |
3358 | ||
25985edc | 3359 | /* Make it a response */ |
ea94027b CM |
3360 | msg->rsp[0] = msg->data[0] | 4; |
3361 | msg->rsp[1] = msg->data[1]; | |
3362 | msg->rsp[2] = CANNOT_RETURN_REQUESTED_LENGTH; | |
3363 | msg->rsp_size = 3; | |
3364 | smi_info->curr_msg = NULL; | |
3365 | deliver_recv_msg(smi_info, msg); | |
3366 | } | |
3367 | ||
3368 | /* | |
3369 | * dell_poweredge_bt_xaction_handler | |
3370 | * @info - smi_info.device_id must be populated | |
3371 | * | |
3372 | * Dell PowerEdge servers with the BT interface (x6xx and 1750) will | |
3373 | * not respond to a Get SDR command if the length of the data | |
3374 | * requested is exactly 0x3A, which leads to command timeouts and no | |
3375 | * data returned. This intercepts such commands, and causes userspace | |
3376 | * callers to try again with a different-sized buffer, which succeeds. | |
3377 | */ | |
3378 | ||
3379 | #define STORAGE_NETFN 0x0A | |
3380 | #define STORAGE_CMD_GET_SDR 0x23 | |
3381 | static int dell_poweredge_bt_xaction_handler(struct notifier_block *self, | |
3382 | unsigned long unused, | |
3383 | void *in) | |
3384 | { | |
3385 | struct smi_info *smi_info = in; | |
3386 | unsigned char *data = smi_info->curr_msg->data; | |
3387 | unsigned int size = smi_info->curr_msg->data_size; | |
3388 | if (size >= 8 && | |
3389 | (data[0]>>2) == STORAGE_NETFN && | |
3390 | data[1] == STORAGE_CMD_GET_SDR && | |
3391 | data[7] == 0x3A) { | |
3392 | return_hosed_msg_badsize(smi_info); | |
3393 | return NOTIFY_STOP; | |
3394 | } | |
3395 | return NOTIFY_DONE; | |
3396 | } | |
3397 | ||
3398 | static struct notifier_block dell_poweredge_bt_xaction_notifier = { | |
3399 | .notifier_call = dell_poweredge_bt_xaction_handler, | |
3400 | }; | |
3401 | ||
3402 | /* | |
3403 | * setup_dell_poweredge_bt_xaction_handler | |
3404 | * @info - smi_info.device_id must be filled in already | |
3405 | * | |
3406 | * Fills in smi_info.device_id.start_transaction_pre_hook | |
3407 | * when we know what function to use there. | |
3408 | */ | |
3409 | static void | |
3410 | setup_dell_poweredge_bt_xaction_handler(struct smi_info *smi_info) | |
3411 | { | |
3412 | struct ipmi_device_id *id = &smi_info->device_id; | |
50c812b2 | 3413 | if (id->manufacturer_id == DELL_IANA_MFR_ID && |
ea94027b CM |
3414 | smi_info->si_type == SI_BT) |
3415 | register_xaction_notifier(&dell_poweredge_bt_xaction_notifier); | |
3416 | } | |
3417 | ||
3ae0e0f9 CM |
3418 | /* |
3419 | * setup_oem_data_handler | |
3420 | * @info - smi_info.device_id must be filled in already | |
3421 | * | |
3422 | * Fills in smi_info.device_id.oem_data_available_handler | |
3423 | * when we know what function to use there. | |
3424 | */ | |
3425 | ||
3426 | static void setup_oem_data_handler(struct smi_info *smi_info) | |
3427 | { | |
3428 | setup_dell_poweredge_oem_data_handler(smi_info); | |
3429 | } | |
3430 | ||
ea94027b CM |
3431 | static void setup_xaction_handlers(struct smi_info *smi_info) |
3432 | { | |
3433 | setup_dell_poweredge_bt_xaction_handler(smi_info); | |
3434 | } | |
3435 | ||
d0882897 CM |
3436 | static void check_for_broken_irqs(struct smi_info *smi_info) |
3437 | { | |
3438 | check_clr_rcv_irq(smi_info); | |
3439 | check_set_rcv_irq(smi_info); | |
3440 | } | |
3441 | ||
a9a2c44f CM |
3442 | static inline void wait_for_timer_and_thread(struct smi_info *smi_info) |
3443 | { | |
b874b985 CM |
3444 | if (smi_info->thread != NULL) |
3445 | kthread_stop(smi_info->thread); | |
3446 | if (smi_info->timer_running) | |
453823ba | 3447 | del_timer_sync(&smi_info->si_timer); |
a9a2c44f CM |
3448 | } |
3449 | ||
81d02b7f | 3450 | static const struct ipmi_default_vals |
b0defcdb | 3451 | { |
99ee6735 LC |
3452 | const int type; |
3453 | const int port; | |
7420884c | 3454 | } ipmi_defaults[] = |
b0defcdb CM |
3455 | { |
3456 | { .type = SI_KCS, .port = 0xca2 }, | |
3457 | { .type = SI_SMIC, .port = 0xca9 }, | |
3458 | { .type = SI_BT, .port = 0xe4 }, | |
3459 | { .port = 0 } | |
3460 | }; | |
3461 | ||
2223cbec | 3462 | static void default_find_bmc(void) |
b0defcdb CM |
3463 | { |
3464 | struct smi_info *info; | |
3465 | int i; | |
3466 | ||
3467 | for (i = 0; ; i++) { | |
3468 | if (!ipmi_defaults[i].port) | |
3469 | break; | |
68e1ee62 | 3470 | #ifdef CONFIG_PPC |
4ff31d77 CK |
3471 | if (check_legacy_ioport(ipmi_defaults[i].port)) |
3472 | continue; | |
3473 | #endif | |
de5e2ddf | 3474 | info = smi_info_alloc(); |
a09f4855 AM |
3475 | if (!info) |
3476 | return; | |
4ff31d77 | 3477 | |
5fedc4a2 | 3478 | info->addr_source = SI_DEFAULT; |
b0defcdb CM |
3479 | |
3480 | info->si_type = ipmi_defaults[i].type; | |
3481 | info->io_setup = port_setup; | |
3482 | info->io.addr_data = ipmi_defaults[i].port; | |
3483 | info->io.addr_type = IPMI_IO_ADDR_SPACE; | |
3484 | ||
3485 | info->io.addr = NULL; | |
3486 | info->io.regspacing = DEFAULT_REGSPACING; | |
3487 | info->io.regsize = DEFAULT_REGSPACING; | |
3488 | info->io.regshift = 0; | |
3489 | ||
2407d77a MG |
3490 | if (add_smi(info) == 0) { |
3491 | if ((try_smi_init(info)) == 0) { | |
3492 | /* Found one... */ | |
279fbd0c | 3493 | printk(KERN_INFO PFX "Found default %s" |
2407d77a MG |
3494 | " state machine at %s address 0x%lx\n", |
3495 | si_to_str[info->si_type], | |
3496 | addr_space_to_str[info->io.addr_type], | |
3497 | info->io.addr_data); | |
3498 | } else | |
3499 | cleanup_one_si(info); | |
7faefea6 YL |
3500 | } else { |
3501 | kfree(info); | |
b0defcdb CM |
3502 | } |
3503 | } | |
3504 | } | |
3505 | ||
3506 | static int is_new_interface(struct smi_info *info) | |
1da177e4 | 3507 | { |
b0defcdb | 3508 | struct smi_info *e; |
1da177e4 | 3509 | |
b0defcdb CM |
3510 | list_for_each_entry(e, &smi_infos, link) { |
3511 | if (e->io.addr_type != info->io.addr_type) | |
3512 | continue; | |
3513 | if (e->io.addr_data == info->io.addr_data) | |
3514 | return 0; | |
3515 | } | |
1da177e4 | 3516 | |
b0defcdb CM |
3517 | return 1; |
3518 | } | |
1da177e4 | 3519 | |
2407d77a | 3520 | static int add_smi(struct smi_info *new_smi) |
b0defcdb | 3521 | { |
2407d77a | 3522 | int rv = 0; |
b0defcdb | 3523 | |
279fbd0c | 3524 | printk(KERN_INFO PFX "Adding %s-specified %s state machine", |
7e50387b CM |
3525 | ipmi_addr_src_to_str(new_smi->addr_source), |
3526 | si_to_str[new_smi->si_type]); | |
d6dfd131 | 3527 | mutex_lock(&smi_infos_lock); |
b0defcdb | 3528 | if (!is_new_interface(new_smi)) { |
7bb671e3 | 3529 | printk(KERN_CONT " duplicate interface\n"); |
b0defcdb CM |
3530 | rv = -EBUSY; |
3531 | goto out_err; | |
3532 | } | |
1da177e4 | 3533 | |
2407d77a MG |
3534 | printk(KERN_CONT "\n"); |
3535 | ||
1da177e4 LT |
3536 | /* So we know not to free it unless we have allocated one. */ |
3537 | new_smi->intf = NULL; | |
3538 | new_smi->si_sm = NULL; | |
3539 | new_smi->handlers = NULL; | |
3540 | ||
2407d77a MG |
3541 | list_add_tail(&new_smi->link, &smi_infos); |
3542 | ||
3543 | out_err: | |
3544 | mutex_unlock(&smi_infos_lock); | |
3545 | return rv; | |
3546 | } | |
3547 | ||
3548 | static int try_smi_init(struct smi_info *new_smi) | |
3549 | { | |
3550 | int rv = 0; | |
3551 | int i; | |
3552 | ||
279fbd0c | 3553 | printk(KERN_INFO PFX "Trying %s-specified %s state" |
2407d77a MG |
3554 | " machine at %s address 0x%lx, slave address 0x%x," |
3555 | " irq %d\n", | |
7e50387b | 3556 | ipmi_addr_src_to_str(new_smi->addr_source), |
2407d77a MG |
3557 | si_to_str[new_smi->si_type], |
3558 | addr_space_to_str[new_smi->io.addr_type], | |
3559 | new_smi->io.addr_data, | |
3560 | new_smi->slave_addr, new_smi->irq); | |
3561 | ||
b0defcdb CM |
3562 | switch (new_smi->si_type) { |
3563 | case SI_KCS: | |
1da177e4 | 3564 | new_smi->handlers = &kcs_smi_handlers; |
b0defcdb CM |
3565 | break; |
3566 | ||
3567 | case SI_SMIC: | |
1da177e4 | 3568 | new_smi->handlers = &smic_smi_handlers; |
b0defcdb CM |
3569 | break; |
3570 | ||
3571 | case SI_BT: | |
1da177e4 | 3572 | new_smi->handlers = &bt_smi_handlers; |
b0defcdb CM |
3573 | break; |
3574 | ||
3575 | default: | |
1da177e4 LT |
3576 | /* No support for anything else yet. */ |
3577 | rv = -EIO; | |
3578 | goto out_err; | |
3579 | } | |
3580 | ||
3581 | /* Allocate the state machine's data and initialize it. */ | |
3582 | new_smi->si_sm = kmalloc(new_smi->handlers->size(), GFP_KERNEL); | |
b0defcdb | 3583 | if (!new_smi->si_sm) { |
279fbd0c MS |
3584 | printk(KERN_ERR PFX |
3585 | "Could not allocate state machine memory\n"); | |
1da177e4 LT |
3586 | rv = -ENOMEM; |
3587 | goto out_err; | |
3588 | } | |
3589 | new_smi->io_size = new_smi->handlers->init_data(new_smi->si_sm, | |
3590 | &new_smi->io); | |
3591 | ||
3592 | /* Now that we know the I/O size, we can set up the I/O. */ | |
3593 | rv = new_smi->io_setup(new_smi); | |
3594 | if (rv) { | |
279fbd0c | 3595 | printk(KERN_ERR PFX "Could not set up I/O space\n"); |
1da177e4 LT |
3596 | goto out_err; |
3597 | } | |
3598 | ||
1da177e4 LT |
3599 | /* Do low-level detection first. */ |
3600 | if (new_smi->handlers->detect(new_smi->si_sm)) { | |
b0defcdb | 3601 | if (new_smi->addr_source) |
279fbd0c | 3602 | printk(KERN_INFO PFX "Interface detection failed\n"); |
1da177e4 LT |
3603 | rv = -ENODEV; |
3604 | goto out_err; | |
3605 | } | |
3606 | ||
c305e3d3 CM |
3607 | /* |
3608 | * Attempt a get device id command. If it fails, we probably | |
3609 | * don't have a BMC here. | |
3610 | */ | |
1da177e4 | 3611 | rv = try_get_dev_id(new_smi); |
b0defcdb CM |
3612 | if (rv) { |
3613 | if (new_smi->addr_source) | |
279fbd0c | 3614 | printk(KERN_INFO PFX "There appears to be no BMC" |
b0defcdb | 3615 | " at this location\n"); |
1da177e4 | 3616 | goto out_err; |
b0defcdb | 3617 | } |
1da177e4 | 3618 | |
3ae0e0f9 | 3619 | setup_oem_data_handler(new_smi); |
ea94027b | 3620 | setup_xaction_handlers(new_smi); |
d0882897 | 3621 | check_for_broken_irqs(new_smi); |
3ae0e0f9 | 3622 | |
b874b985 | 3623 | new_smi->waiting_msg = NULL; |
1da177e4 LT |
3624 | new_smi->curr_msg = NULL; |
3625 | atomic_set(&new_smi->req_events, 0); | |
7aefac26 | 3626 | new_smi->run_to_completion = false; |
64959e2d CM |
3627 | for (i = 0; i < SI_NUM_STATS; i++) |
3628 | atomic_set(&new_smi->stats[i], 0); | |
1da177e4 | 3629 | |
7aefac26 | 3630 | new_smi->interrupt_disabled = true; |
89986496 | 3631 | atomic_set(&new_smi->need_watch, 0); |
b0defcdb CM |
3632 | new_smi->intf_num = smi_num; |
3633 | smi_num++; | |
1da177e4 | 3634 | |
40112ae7 CM |
3635 | rv = try_enable_event_buffer(new_smi); |
3636 | if (rv == 0) | |
7aefac26 | 3637 | new_smi->has_event_buffer = true; |
40112ae7 | 3638 | |
c305e3d3 CM |
3639 | /* |
3640 | * Start clearing the flags before we enable interrupts or the | |
3641 | * timer to avoid racing with the timer. | |
3642 | */ | |
0cfec916 | 3643 | start_clear_flags(new_smi, false); |
d9b7e4f7 CM |
3644 | |
3645 | /* | |
3646 | * IRQ is defined to be set when non-zero. req_events will | |
3647 | * cause a global flags check that will enable interrupts. | |
3648 | */ | |
3649 | if (new_smi->irq) { | |
3650 | new_smi->interrupt_disabled = false; | |
3651 | atomic_set(&new_smi->req_events, 1); | |
3652 | } | |
1da177e4 | 3653 | |
50c812b2 | 3654 | if (!new_smi->dev) { |
c305e3d3 CM |
3655 | /* |
3656 | * If we don't already have a device from something | |
3657 | * else (like PCI), then register a new one. | |
3658 | */ | |
50c812b2 CM |
3659 | new_smi->pdev = platform_device_alloc("ipmi_si", |
3660 | new_smi->intf_num); | |
8b32b5d0 | 3661 | if (!new_smi->pdev) { |
279fbd0c MS |
3662 | printk(KERN_ERR PFX |
3663 | "Unable to allocate platform device\n"); | |
453823ba | 3664 | goto out_err; |
50c812b2 CM |
3665 | } |
3666 | new_smi->dev = &new_smi->pdev->dev; | |
fe2d5ffc | 3667 | new_smi->dev->driver = &ipmi_driver.driver; |
50c812b2 | 3668 | |
b48f5457 | 3669 | rv = platform_device_add(new_smi->pdev); |
50c812b2 | 3670 | if (rv) { |
279fbd0c MS |
3671 | printk(KERN_ERR PFX |
3672 | "Unable to register system interface device:" | |
50c812b2 CM |
3673 | " %d\n", |
3674 | rv); | |
453823ba | 3675 | goto out_err; |
50c812b2 | 3676 | } |
7aefac26 | 3677 | new_smi->dev_registered = true; |
50c812b2 CM |
3678 | } |
3679 | ||
1da177e4 LT |
3680 | rv = ipmi_register_smi(&handlers, |
3681 | new_smi, | |
50c812b2 CM |
3682 | &new_smi->device_id, |
3683 | new_smi->dev, | |
453823ba | 3684 | new_smi->slave_addr); |
1da177e4 | 3685 | if (rv) { |
279fbd0c MS |
3686 | dev_err(new_smi->dev, "Unable to register device: error %d\n", |
3687 | rv); | |
1da177e4 LT |
3688 | goto out_err_stop_timer; |
3689 | } | |
3690 | ||
3691 | rv = ipmi_smi_add_proc_entry(new_smi->intf, "type", | |
07412736 | 3692 | &smi_type_proc_ops, |
99b76233 | 3693 | new_smi); |
1da177e4 | 3694 | if (rv) { |
279fbd0c | 3695 | dev_err(new_smi->dev, "Unable to create proc entry: %d\n", rv); |
1da177e4 LT |
3696 | goto out_err_stop_timer; |
3697 | } | |
3698 | ||
3699 | rv = ipmi_smi_add_proc_entry(new_smi->intf, "si_stats", | |
07412736 | 3700 | &smi_si_stats_proc_ops, |
99b76233 | 3701 | new_smi); |
1da177e4 | 3702 | if (rv) { |
279fbd0c | 3703 | dev_err(new_smi->dev, "Unable to create proc entry: %d\n", rv); |
1da177e4 LT |
3704 | goto out_err_stop_timer; |
3705 | } | |
3706 | ||
b361e27b | 3707 | rv = ipmi_smi_add_proc_entry(new_smi->intf, "params", |
07412736 | 3708 | &smi_params_proc_ops, |
99b76233 | 3709 | new_smi); |
b361e27b | 3710 | if (rv) { |
279fbd0c | 3711 | dev_err(new_smi->dev, "Unable to create proc entry: %d\n", rv); |
b361e27b CM |
3712 | goto out_err_stop_timer; |
3713 | } | |
3714 | ||
279fbd0c MS |
3715 | dev_info(new_smi->dev, "IPMI %s interface initialized\n", |
3716 | si_to_str[new_smi->si_type]); | |
1da177e4 LT |
3717 | |
3718 | return 0; | |
3719 | ||
76824852 | 3720 | out_err_stop_timer: |
a9a2c44f | 3721 | wait_for_timer_and_thread(new_smi); |
1da177e4 | 3722 | |
76824852 | 3723 | out_err: |
7aefac26 | 3724 | new_smi->interrupt_disabled = true; |
2407d77a MG |
3725 | |
3726 | if (new_smi->intf) { | |
b874b985 | 3727 | ipmi_smi_t intf = new_smi->intf; |
2407d77a | 3728 | new_smi->intf = NULL; |
b874b985 | 3729 | ipmi_unregister_smi(intf); |
2407d77a | 3730 | } |
1da177e4 | 3731 | |
2407d77a | 3732 | if (new_smi->irq_cleanup) { |
b0defcdb | 3733 | new_smi->irq_cleanup(new_smi); |
2407d77a MG |
3734 | new_smi->irq_cleanup = NULL; |
3735 | } | |
1da177e4 | 3736 | |
c305e3d3 CM |
3737 | /* |
3738 | * Wait until we know that we are out of any interrupt | |
3739 | * handlers might have been running before we freed the | |
3740 | * interrupt. | |
3741 | */ | |
fbd568a3 | 3742 | synchronize_sched(); |
1da177e4 LT |
3743 | |
3744 | if (new_smi->si_sm) { | |
3745 | if (new_smi->handlers) | |
3746 | new_smi->handlers->cleanup(new_smi->si_sm); | |
3747 | kfree(new_smi->si_sm); | |
2407d77a | 3748 | new_smi->si_sm = NULL; |
1da177e4 | 3749 | } |
2407d77a | 3750 | if (new_smi->addr_source_cleanup) { |
b0defcdb | 3751 | new_smi->addr_source_cleanup(new_smi); |
2407d77a MG |
3752 | new_smi->addr_source_cleanup = NULL; |
3753 | } | |
3754 | if (new_smi->io_cleanup) { | |
7767e126 | 3755 | new_smi->io_cleanup(new_smi); |
2407d77a MG |
3756 | new_smi->io_cleanup = NULL; |
3757 | } | |
1da177e4 | 3758 | |
2407d77a | 3759 | if (new_smi->dev_registered) { |
50c812b2 | 3760 | platform_device_unregister(new_smi->pdev); |
7aefac26 | 3761 | new_smi->dev_registered = false; |
2407d77a | 3762 | } |
b0defcdb | 3763 | |
1da177e4 LT |
3764 | return rv; |
3765 | } | |
3766 | ||
2223cbec | 3767 | static int init_ipmi_si(void) |
1da177e4 | 3768 | { |
1da177e4 LT |
3769 | int i; |
3770 | char *str; | |
50c812b2 | 3771 | int rv; |
2407d77a | 3772 | struct smi_info *e; |
06ee4594 | 3773 | enum ipmi_addr_src type = SI_INVALID; |
1da177e4 LT |
3774 | |
3775 | if (initialized) | |
3776 | return 0; | |
3777 | initialized = 1; | |
3778 | ||
f2afae46 CM |
3779 | if (si_tryplatform) { |
3780 | rv = platform_driver_register(&ipmi_driver); | |
3781 | if (rv) { | |
3782 | printk(KERN_ERR PFX "Unable to register " | |
3783 | "driver: %d\n", rv); | |
3784 | return rv; | |
3785 | } | |
50c812b2 CM |
3786 | } |
3787 | ||
1da177e4 LT |
3788 | /* Parse out the si_type string into its components. */ |
3789 | str = si_type_str; | |
3790 | if (*str != '\0') { | |
e8b33617 | 3791 | for (i = 0; (i < SI_MAX_PARMS) && (*str != '\0'); i++) { |
1da177e4 LT |
3792 | si_type[i] = str; |
3793 | str = strchr(str, ','); | |
3794 | if (str) { | |
3795 | *str = '\0'; | |
3796 | str++; | |
3797 | } else { | |
3798 | break; | |
3799 | } | |
3800 | } | |
3801 | } | |
3802 | ||
1fdd75bd | 3803 | printk(KERN_INFO "IPMI System Interface driver.\n"); |
1da177e4 | 3804 | |
d8cc5267 | 3805 | /* If the user gave us a device, they presumably want us to use it */ |
a1e9c9dd | 3806 | if (!hardcode_find_bmc()) |
d8cc5267 | 3807 | return 0; |
d8cc5267 | 3808 | |
b0defcdb | 3809 | #ifdef CONFIG_PCI |
f2afae46 CM |
3810 | if (si_trypci) { |
3811 | rv = pci_register_driver(&ipmi_pci_driver); | |
3812 | if (rv) | |
3813 | printk(KERN_ERR PFX "Unable to register " | |
3814 | "PCI driver: %d\n", rv); | |
3815 | else | |
7aefac26 | 3816 | pci_registered = true; |
f2afae46 | 3817 | } |
b0defcdb CM |
3818 | #endif |
3819 | ||
754d4531 | 3820 | #ifdef CONFIG_DMI |
d941aeae CM |
3821 | if (si_trydmi) |
3822 | dmi_find_bmc(); | |
754d4531 MG |
3823 | #endif |
3824 | ||
3825 | #ifdef CONFIG_ACPI | |
d941aeae CM |
3826 | if (si_tryacpi) |
3827 | spmi_find_bmc(); | |
754d4531 MG |
3828 | #endif |
3829 | ||
fdbeb7de TB |
3830 | #ifdef CONFIG_PARISC |
3831 | register_parisc_driver(&ipmi_parisc_driver); | |
7aefac26 | 3832 | parisc_registered = true; |
fdbeb7de TB |
3833 | /* poking PC IO addresses will crash machine, don't do it */ |
3834 | si_trydefaults = 0; | |
3835 | #endif | |
3836 | ||
06ee4594 MG |
3837 | /* We prefer devices with interrupts, but in the case of a machine |
3838 | with multiple BMCs we assume that there will be several instances | |
3839 | of a given type so if we succeed in registering a type then also | |
3840 | try to register everything else of the same type */ | |
d8cc5267 | 3841 | |
2407d77a MG |
3842 | mutex_lock(&smi_infos_lock); |
3843 | list_for_each_entry(e, &smi_infos, link) { | |
06ee4594 MG |
3844 | /* Try to register a device if it has an IRQ and we either |
3845 | haven't successfully registered a device yet or this | |
3846 | device has the same type as one we successfully registered */ | |
3847 | if (e->irq && (!type || e->addr_source == type)) { | |
d8cc5267 | 3848 | if (!try_smi_init(e)) { |
06ee4594 | 3849 | type = e->addr_source; |
d8cc5267 MG |
3850 | } |
3851 | } | |
3852 | } | |
3853 | ||
06ee4594 MG |
3854 | /* type will only have been set if we successfully registered an si */ |
3855 | if (type) { | |
3856 | mutex_unlock(&smi_infos_lock); | |
3857 | return 0; | |
3858 | } | |
3859 | ||
d8cc5267 MG |
3860 | /* Fall back to the preferred device */ |
3861 | ||
3862 | list_for_each_entry(e, &smi_infos, link) { | |
06ee4594 | 3863 | if (!e->irq && (!type || e->addr_source == type)) { |
d8cc5267 | 3864 | if (!try_smi_init(e)) { |
06ee4594 | 3865 | type = e->addr_source; |
d8cc5267 MG |
3866 | } |
3867 | } | |
2407d77a MG |
3868 | } |
3869 | mutex_unlock(&smi_infos_lock); | |
3870 | ||
06ee4594 MG |
3871 | if (type) |
3872 | return 0; | |
3873 | ||
b0defcdb | 3874 | if (si_trydefaults) { |
d6dfd131 | 3875 | mutex_lock(&smi_infos_lock); |
b0defcdb CM |
3876 | if (list_empty(&smi_infos)) { |
3877 | /* No BMC was found, try defaults. */ | |
d6dfd131 | 3878 | mutex_unlock(&smi_infos_lock); |
b0defcdb | 3879 | default_find_bmc(); |
2407d77a | 3880 | } else |
d6dfd131 | 3881 | mutex_unlock(&smi_infos_lock); |
1da177e4 LT |
3882 | } |
3883 | ||
d6dfd131 | 3884 | mutex_lock(&smi_infos_lock); |
b361e27b | 3885 | if (unload_when_empty && list_empty(&smi_infos)) { |
d6dfd131 | 3886 | mutex_unlock(&smi_infos_lock); |
d2478521 | 3887 | cleanup_ipmi_si(); |
279fbd0c MS |
3888 | printk(KERN_WARNING PFX |
3889 | "Unable to find any System Interface(s)\n"); | |
1da177e4 | 3890 | return -ENODEV; |
b0defcdb | 3891 | } else { |
d6dfd131 | 3892 | mutex_unlock(&smi_infos_lock); |
b0defcdb | 3893 | return 0; |
1da177e4 | 3894 | } |
1da177e4 LT |
3895 | } |
3896 | module_init(init_ipmi_si); | |
3897 | ||
b361e27b | 3898 | static void cleanup_one_si(struct smi_info *to_clean) |
1da177e4 | 3899 | { |
2407d77a | 3900 | int rv = 0; |
1da177e4 | 3901 | |
b0defcdb | 3902 | if (!to_clean) |
1da177e4 LT |
3903 | return; |
3904 | ||
b874b985 CM |
3905 | if (to_clean->intf) { |
3906 | ipmi_smi_t intf = to_clean->intf; | |
3907 | ||
3908 | to_clean->intf = NULL; | |
3909 | rv = ipmi_unregister_smi(intf); | |
3910 | if (rv) { | |
3911 | pr_err(PFX "Unable to unregister device: errno=%d\n", | |
3912 | rv); | |
3913 | } | |
3914 | } | |
3915 | ||
567eded9 TI |
3916 | if (to_clean->dev) |
3917 | dev_set_drvdata(to_clean->dev, NULL); | |
3918 | ||
b0defcdb CM |
3919 | list_del(&to_clean->link); |
3920 | ||
c305e3d3 | 3921 | /* |
b874b985 CM |
3922 | * Make sure that interrupts, the timer and the thread are |
3923 | * stopped and will not run again. | |
c305e3d3 | 3924 | */ |
b874b985 CM |
3925 | if (to_clean->irq_cleanup) |
3926 | to_clean->irq_cleanup(to_clean); | |
a9a2c44f | 3927 | wait_for_timer_and_thread(to_clean); |
1da177e4 | 3928 | |
c305e3d3 CM |
3929 | /* |
3930 | * Timeouts are stopped, now make sure the interrupts are off | |
b874b985 CM |
3931 | * in the BMC. Note that timers and CPU interrupts are off, |
3932 | * so no need for locks. | |
c305e3d3 | 3933 | */ |
ee6cd5f8 | 3934 | while (to_clean->curr_msg || (to_clean->si_state != SI_NORMAL)) { |
ee6cd5f8 CM |
3935 | poll(to_clean); |
3936 | schedule_timeout_uninterruptible(1); | |
ee6cd5f8 | 3937 | } |
0cfec916 | 3938 | disable_si_irq(to_clean, false); |
e8b33617 | 3939 | while (to_clean->curr_msg || (to_clean->si_state != SI_NORMAL)) { |
1da177e4 | 3940 | poll(to_clean); |
da4cd8df | 3941 | schedule_timeout_uninterruptible(1); |
1da177e4 LT |
3942 | } |
3943 | ||
2407d77a MG |
3944 | if (to_clean->handlers) |
3945 | to_clean->handlers->cleanup(to_clean->si_sm); | |
1da177e4 LT |
3946 | |
3947 | kfree(to_clean->si_sm); | |
3948 | ||
b0defcdb CM |
3949 | if (to_clean->addr_source_cleanup) |
3950 | to_clean->addr_source_cleanup(to_clean); | |
7767e126 PG |
3951 | if (to_clean->io_cleanup) |
3952 | to_clean->io_cleanup(to_clean); | |
50c812b2 CM |
3953 | |
3954 | if (to_clean->dev_registered) | |
3955 | platform_device_unregister(to_clean->pdev); | |
3956 | ||
3957 | kfree(to_clean); | |
1da177e4 LT |
3958 | } |
3959 | ||
0dcf334c | 3960 | static void cleanup_ipmi_si(void) |
1da177e4 | 3961 | { |
b0defcdb | 3962 | struct smi_info *e, *tmp_e; |
1da177e4 | 3963 | |
b0defcdb | 3964 | if (!initialized) |
1da177e4 LT |
3965 | return; |
3966 | ||
b0defcdb | 3967 | #ifdef CONFIG_PCI |
56480287 MG |
3968 | if (pci_registered) |
3969 | pci_unregister_driver(&ipmi_pci_driver); | |
b0defcdb | 3970 | #endif |
fdbeb7de TB |
3971 | #ifdef CONFIG_PARISC |
3972 | if (parisc_registered) | |
3973 | unregister_parisc_driver(&ipmi_parisc_driver); | |
3974 | #endif | |
b0defcdb | 3975 | |
a1e9c9dd | 3976 | platform_driver_unregister(&ipmi_driver); |
dba9b4f6 | 3977 | |
d6dfd131 | 3978 | mutex_lock(&smi_infos_lock); |
b0defcdb CM |
3979 | list_for_each_entry_safe(e, tmp_e, &smi_infos, link) |
3980 | cleanup_one_si(e); | |
d6dfd131 | 3981 | mutex_unlock(&smi_infos_lock); |
1da177e4 LT |
3982 | } |
3983 | module_exit(cleanup_ipmi_si); | |
3984 | ||
3985 | MODULE_LICENSE("GPL"); | |
1fdd75bd | 3986 | MODULE_AUTHOR("Corey Minyard <minyard@mvista.com>"); |
c305e3d3 CM |
3987 | MODULE_DESCRIPTION("Interface to the IPMI driver for the KCS, SMIC, and BT" |
3988 | " system interfaces."); |