[linux-block.git] / drivers / char / hw_random / ks-sa-rng.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Random Number Generator driver for the Keystone SOC
 *
 * Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com
 *
 * Authors:	Sandeep Nair
 *		Vitaly Andrianov
 */

#include <linux/hw_random.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/io.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#include <linux/pm_runtime.h>
#include <linux/err.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/delay.h>
#include <linux/timekeeping.h>

#define SA_CMD_STATUS_OFS			0x8

/* TRNG enable control in SA System module*/
#define SA_CMD_STATUS_REG_TRNG_ENABLE		BIT(3)

/* TRNG start control in TRNG module */
#define TRNG_CNTL_REG_TRNG_ENABLE		BIT(10)

/* Data ready indicator in STATUS register */
#define TRNG_STATUS_REG_READY			BIT(0)

/* Data ready clear control in INTACK register */
#define TRNG_INTACK_REG_READY			BIT(0)

/*
 * Number of samples taken to gather entropy during startup.
 * If value is 0, the number of samples is 2^24 else
 * equals value times 2^8.
 */
#define TRNG_DEF_STARTUP_CYCLES			0
#define TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT	16

/*
 * Minimum number of samples taken to regenerate entropy
 * If value is 0, the number of samples is 2^24 else
 * equals value times 2^6.
 */
#define TRNG_DEF_MIN_REFILL_CYCLES		1
#define TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT	0

/*
 * Maximum number of samples taken to regenerate entropy
 * If value is 0, the number of samples is 2^24 else
 * equals value times 2^8.
 */
#define TRNG_DEF_MAX_REFILL_CYCLES		0
#define TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT	16

/* Number of CLK input cycles between samples */
#define TRNG_DEF_CLK_DIV_CYCLES			0
#define TRNG_CFG_REG_SAMPLE_DIV_SHIFT		8

/* Maximum retries to get rng data */
#define SA_MAX_RNG_DATA_RETRIES			5
/* Delay between retries (in usecs) */
#define SA_RNG_DATA_RETRY_DELAY			5

struct trng_regs {
	u32	output_l;
	u32	output_h;
	u32	status;
	u32	intmask;
	u32	intack;
	u32	control;
	u32	config;
};

struct ks_sa_rng {
	struct device	*dev;
	struct hwrng	rng;
	struct clk	*clk;
	struct regmap	*regmap_cfg;
	struct trng_regs __iomem *reg_rng;
	u64 ready_ts;
	unsigned int refill_delay_ns;
};

static unsigned int cycles_to_ns(unsigned long clk_rate, unsigned int cycles)
{
	return DIV_ROUND_UP_ULL((TRNG_DEF_CLK_DIV_CYCLES + 1) * 1000000000ull *
				cycles, clk_rate);
}

static unsigned int startup_delay_ns(unsigned long clk_rate)
{
	if (!TRNG_DEF_STARTUP_CYCLES)
		return cycles_to_ns(clk_rate, BIT(24));
	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_STARTUP_CYCLES);
}

static unsigned int refill_delay_ns(unsigned long clk_rate)
{
	if (!TRNG_DEF_MAX_REFILL_CYCLES)
		return cycles_to_ns(clk_rate, BIT(24));
	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_MAX_REFILL_CYCLES);
}

static int ks_sa_rng_init(struct hwrng *rng)
{
	u32 value;
	struct device *dev = (struct device *)rng->priv;
	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
	unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk);

	/* Enable RNG module */
	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
			  SA_CMD_STATUS_REG_TRNG_ENABLE,
			  SA_CMD_STATUS_REG_TRNG_ENABLE);

	/* Configure RNG module */
	writel(0, &ks_sa_rng->reg_rng->control);
	value = TRNG_DEF_STARTUP_CYCLES << TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT;
	writel(value, &ks_sa_rng->reg_rng->control);

	value =	(TRNG_DEF_MIN_REFILL_CYCLES <<
		 TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT) |
		(TRNG_DEF_MAX_REFILL_CYCLES <<
		 TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT) |
		(TRNG_DEF_CLK_DIV_CYCLES <<
		 TRNG_CFG_REG_SAMPLE_DIV_SHIFT);

	writel(value, &ks_sa_rng->reg_rng->config);

	/* Disable all interrupts from TRNG */
	writel(0, &ks_sa_rng->reg_rng->intmask);

	/* Enable RNG */
	value = readl(&ks_sa_rng->reg_rng->control);
	value |= TRNG_CNTL_REG_TRNG_ENABLE;
	writel(value, &ks_sa_rng->reg_rng->control);

	ks_sa_rng->refill_delay_ns = refill_delay_ns(clk_rate);
	ks_sa_rng->ready_ts = ktime_get_ns() +
			      startup_delay_ns(clk_rate);

	return 0;
}

static void ks_sa_rng_cleanup(struct hwrng *rng)
{
	struct device *dev = (struct device *)rng->priv;
	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);

	/* Disable RNG */
	writel(0, &ks_sa_rng->reg_rng->control);
	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
			  SA_CMD_STATUS_REG_TRNG_ENABLE, 0);
}

static int ks_sa_rng_data_read(struct hwrng *rng, u32 *data)
{
	struct device *dev = (struct device *)rng->priv;
	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);

	/* Read random data */
	data[0] = readl(&ks_sa_rng->reg_rng->output_l);
	data[1] = readl(&ks_sa_rng->reg_rng->output_h);

	writel(TRNG_INTACK_REG_READY, &ks_sa_rng->reg_rng->intack);
	ks_sa_rng->ready_ts = ktime_get_ns() + ks_sa_rng->refill_delay_ns;

	return sizeof(u32) * 2;
}

static int ks_sa_rng_data_present(struct hwrng *rng, int wait)
{
	struct device *dev = (struct device *)rng->priv;
	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
	u64 now = ktime_get_ns();

	u32	ready;
	int	j;

	if (wait && now < ks_sa_rng->ready_ts) {
		/* Max delay expected here is 81920000 ns */
		unsigned long min_delay =
			DIV_ROUND_UP((u32)(ks_sa_rng->ready_ts - now), 1000);

		usleep_range(min_delay, min_delay + SA_RNG_DATA_RETRY_DELAY);
	}

	for (j = 0; j < SA_MAX_RNG_DATA_RETRIES; j++) {
		ready = readl(&ks_sa_rng->reg_rng->status);
		ready &= TRNG_STATUS_REG_READY;

		if (ready || !wait)
			break;

		udelay(SA_RNG_DATA_RETRY_DELAY);
	}

	return ready;
}

static int ks_sa_rng_probe(struct platform_device *pdev)
{
	struct ks_sa_rng	*ks_sa_rng;
	struct device		*dev = &pdev->dev;
	int			ret;

	ks_sa_rng = devm_kzalloc(dev, sizeof(*ks_sa_rng), GFP_KERNEL);
	if (!ks_sa_rng)
		return -ENOMEM;

	ks_sa_rng->dev = dev;
	ks_sa_rng->rng = (struct hwrng) {
		.name = "ks_sa_hwrng",
		.init = ks_sa_rng_init,
		.data_read = ks_sa_rng_data_read,
		.data_present = ks_sa_rng_data_present,
		.cleanup = ks_sa_rng_cleanup,
	};
	ks_sa_rng->rng.priv = (unsigned long)dev;

	ks_sa_rng->reg_rng = devm_platform_ioremap_resource(pdev, 0);
	if (IS_ERR(ks_sa_rng->reg_rng))
		return PTR_ERR(ks_sa_rng->reg_rng);

	ks_sa_rng->regmap_cfg =
		syscon_regmap_lookup_by_phandle(dev->of_node,
						"ti,syscon-sa-cfg");

	if (IS_ERR(ks_sa_rng->regmap_cfg)) {
		dev_err(dev, "syscon_node_to_regmap failed\n");
		return -EINVAL;
	}

	pm_runtime_enable(dev);
	ret = pm_runtime_get_sync(dev);
	if (ret < 0) {
		dev_err(dev, "Failed to enable SA power-domain\n");
		pm_runtime_put_noidle(dev);
		pm_runtime_disable(dev);
		return ret;
	}

	platform_set_drvdata(pdev, ks_sa_rng);

	return devm_hwrng_register(&pdev->dev, &ks_sa_rng->rng);
}

static int ks_sa_rng_remove(struct platform_device *pdev)
{
	pm_runtime_put_sync(&pdev->dev);
	pm_runtime_disable(&pdev->dev);

	return 0;
}

static const struct of_device_id ks_sa_rng_dt_match[] = {
	{
		.compatible = "ti,keystone-rng",
	},
	{ },
};
MODULE_DEVICE_TABLE(of, ks_sa_rng_dt_match);

static struct platform_driver ks_sa_rng_driver = {
	.driver		= {
		.name	= "ks-sa-rng",
		.of_match_table = ks_sa_rng_dt_match,
	},
	.probe		= ks_sa_rng_probe,
	.remove		= ks_sa_rng_remove,
};

module_platform_driver(ks_sa_rng_driver);

MODULE_DESCRIPTION("Keystone NETCP SA H/W Random Number Generator driver");
MODULE_AUTHOR("Vitaly Andrianov <vitalya@ti.com>");
MODULE_LICENSE("GPL");
Commit	Line	Data
1802d0be	1	// SPDX-License-Identifier: GPL-2.0-only
eb428ee0 VA	2	/*
	3	* Random Number Generator driver for the Keystone SOC
	4	*
8832cfd3	5	* Copyright (C) 2016 Texas Instruments Incorporated - https://www.ti.com
eb428ee0 VA	6	*
	7	* Authors: Sandeep Nair
	8	* Vitaly Andrianov
eb428ee0 VA	9	*/
	10
	11	#include <linux/hw_random.h>
	12	#include <linux/kernel.h>
	13	#include <linux/module.h>
	14	#include <linux/io.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/clk.h>
	17	#include <linux/pm_runtime.h>
	18	#include <linux/err.h>
	19	#include <linux/regmap.h>
	20	#include <linux/mfd/syscon.h>
	21	#include <linux/of.h>
	22	#include <linux/of_address.h>
	23	#include <linux/delay.h>
6d01d851	24	#include <linux/timekeeping.h>
eb428ee0 VA	25
	26	#define SA_CMD_STATUS_OFS 0x8
	27
	28	/* TRNG enable control in SA System module*/
	29	#define SA_CMD_STATUS_REG_TRNG_ENABLE BIT(3)
	30
	31	/* TRNG start control in TRNG module */
	32	#define TRNG_CNTL_REG_TRNG_ENABLE BIT(10)
	33
	34	/* Data ready indicator in STATUS register */
	35	#define TRNG_STATUS_REG_READY BIT(0)
	36
	37	/* Data ready clear control in INTACK register */
	38	#define TRNG_INTACK_REG_READY BIT(0)
	39
	40	/*
	41	* Number of samples taken to gather entropy during startup.
	42	* If value is 0, the number of samples is 2^24 else
	43	* equals value times 2^8.
	44	*/
	45	#define TRNG_DEF_STARTUP_CYCLES 0
	46	#define TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT 16
	47
	48	/*
	49	* Minimum number of samples taken to regenerate entropy
	50	* If value is 0, the number of samples is 2^24 else
	51	* equals value times 2^6.
	52	*/
	53	#define TRNG_DEF_MIN_REFILL_CYCLES 1
	54	#define TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT 0
	55
	56	/*
	57	* Maximum number of samples taken to regenerate entropy
	58	* If value is 0, the number of samples is 2^24 else
	59	* equals value times 2^8.
	60	*/
	61	#define TRNG_DEF_MAX_REFILL_CYCLES 0
	62	#define TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT 16
	63
	64	/* Number of CLK input cycles between samples */
	65	#define TRNG_DEF_CLK_DIV_CYCLES 0
	66	#define TRNG_CFG_REG_SAMPLE_DIV_SHIFT 8
	67
	68	/* Maximum retries to get rng data */
	69	#define SA_MAX_RNG_DATA_RETRIES 5
	70	/* Delay between retries (in usecs) */
	71	#define SA_RNG_DATA_RETRY_DELAY 5
	72
	73	struct trng_regs {
	74	u32 output_l;
	75	u32 output_h;
	76	u32 status;
	77	u32 intmask;
	78	u32 intack;
	79	u32 control;
	80	u32 config;
	81	};
	82
	83	struct ks_sa_rng {
	84	struct device *dev;
	85	struct hwrng rng;
	86	struct clk *clk;
	87	struct regmap *regmap_cfg;
d1569349	88	struct trng_regs __iomem *reg_rng;
6d01d851 AS	89	u64 ready_ts;
6d01d851 AS	90	unsigned int refill_delay_ns;
eb428ee0 VA	91	};
eb428ee0 VA	92
6d01d851 AS	93	static unsigned int cycles_to_ns(unsigned long clk_rate, unsigned int cycles)
	94	{
	95	return DIV_ROUND_UP_ULL((TRNG_DEF_CLK_DIV_CYCLES + 1) * 1000000000ull *
	96	cycles, clk_rate);
	97	}
	98
	99	static unsigned int startup_delay_ns(unsigned long clk_rate)
	100	{
	101	if (!TRNG_DEF_STARTUP_CYCLES)
	102	return cycles_to_ns(clk_rate, BIT(24));
	103	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_STARTUP_CYCLES);
	104	}
	105
	106	static unsigned int refill_delay_ns(unsigned long clk_rate)
	107	{
	108	if (!TRNG_DEF_MAX_REFILL_CYCLES)
	109	return cycles_to_ns(clk_rate, BIT(24));
	110	return cycles_to_ns(clk_rate, 256 * TRNG_DEF_MAX_REFILL_CYCLES);
	111	}
	112
eb428ee0 VA	113	static int ks_sa_rng_init(struct hwrng *rng)
	114	{
	115	u32 value;
	116	struct device dev = (struct device )rng->priv;
	117	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
6d01d851	118	unsigned long clk_rate = clk_get_rate(ks_sa_rng->clk);
eb428ee0 VA	119
	120	/* Enable RNG module */
	121	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
	122	SA_CMD_STATUS_REG_TRNG_ENABLE,
	123	SA_CMD_STATUS_REG_TRNG_ENABLE);
	124
	125	/* Configure RNG module */
	126	writel(0, &ks_sa_rng->reg_rng->control);
	127	value = TRNG_DEF_STARTUP_CYCLES << TRNG_CNTL_REG_STARTUP_CYCLES_SHIFT;
	128	writel(value, &ks_sa_rng->reg_rng->control);
	129
	130	value = (TRNG_DEF_MIN_REFILL_CYCLES <<
	131	TRNG_CFG_REG_MIN_REFILL_CYCLES_SHIFT) \|
	132	(TRNG_DEF_MAX_REFILL_CYCLES <<
	133	TRNG_CFG_REG_MAX_REFILL_CYCLES_SHIFT) \|
	134	(TRNG_DEF_CLK_DIV_CYCLES <<
	135	TRNG_CFG_REG_SAMPLE_DIV_SHIFT);
	136
	137	writel(value, &ks_sa_rng->reg_rng->config);
	138
	139	/* Disable all interrupts from TRNG */
	140	writel(0, &ks_sa_rng->reg_rng->intmask);
	141
	142	/* Enable RNG */
	143	value = readl(&ks_sa_rng->reg_rng->control);
	144	value \|= TRNG_CNTL_REG_TRNG_ENABLE;
	145	writel(value, &ks_sa_rng->reg_rng->control);
	146
6d01d851 AS	147	ks_sa_rng->refill_delay_ns = refill_delay_ns(clk_rate);
	148	ks_sa_rng->ready_ts = ktime_get_ns() +
	149	startup_delay_ns(clk_rate);
	150
eb428ee0 VA	151	return 0;
	152	}
	153
	154	static void ks_sa_rng_cleanup(struct hwrng *rng)
	155	{
	156	struct device dev = (struct device )rng->priv;
	157	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
	158
	159	/* Disable RNG */
	160	writel(0, &ks_sa_rng->reg_rng->control);
	161	regmap_write_bits(ks_sa_rng->regmap_cfg, SA_CMD_STATUS_OFS,
	162	SA_CMD_STATUS_REG_TRNG_ENABLE, 0);
	163	}
	164
	165	static int ks_sa_rng_data_read(struct hwrng rng, u32 data)
	166	{
	167	struct device dev = (struct device )rng->priv;
	168	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
	169
	170	/* Read random data */
	171	data[0] = readl(&ks_sa_rng->reg_rng->output_l);
	172	data[1] = readl(&ks_sa_rng->reg_rng->output_h);
	173
	174	writel(TRNG_INTACK_REG_READY, &ks_sa_rng->reg_rng->intack);
6d01d851	175	ks_sa_rng->ready_ts = ktime_get_ns() + ks_sa_rng->refill_delay_ns;
eb428ee0 VA	176
	177	return sizeof(u32) * 2;
	178	}
	179
	180	static int ks_sa_rng_data_present(struct hwrng *rng, int wait)
	181	{
	182	struct device dev = (struct device )rng->priv;
	183	struct ks_sa_rng *ks_sa_rng = dev_get_drvdata(dev);
6d01d851	184	u64 now = ktime_get_ns();
eb428ee0 VA	185
	186	u32 ready;
	187	int j;
	188
6d01d851 AS	189	if (wait && now < ks_sa_rng->ready_ts) {
	190	/* Max delay expected here is 81920000 ns */
	191	unsigned long min_delay =
	192	DIV_ROUND_UP((u32)(ks_sa_rng->ready_ts - now), 1000);
	193
	194	usleep_range(min_delay, min_delay + SA_RNG_DATA_RETRY_DELAY);
	195	}
	196
eb428ee0 VA	197	for (j = 0; j < SA_MAX_RNG_DATA_RETRIES; j++) {
	198	ready = readl(&ks_sa_rng->reg_rng->status);
	199	ready &= TRNG_STATUS_REG_READY;
	200
	201	if (ready \|\| !wait)
	202	break;
	203
	204	udelay(SA_RNG_DATA_RETRY_DELAY);
	205	}
	206
	207	return ready;
	208	}
	209
	210	static int ks_sa_rng_probe(struct platform_device *pdev)
	211	{
	212	struct ks_sa_rng *ks_sa_rng;
	213	struct device *dev = &pdev->dev;
	214	int ret;
eb428ee0 VA	215
	216	ks_sa_rng = devm_kzalloc(dev, sizeof(*ks_sa_rng), GFP_KERNEL);
	217	if (!ks_sa_rng)
	218	return -ENOMEM;
	219
	220	ks_sa_rng->dev = dev;
	221	ks_sa_rng->rng = (struct hwrng) {
	222	.name = "ks_sa_hwrng",
	223	.init = ks_sa_rng_init,
	224	.data_read = ks_sa_rng_data_read,
	225	.data_present = ks_sa_rng_data_present,
	226	.cleanup = ks_sa_rng_cleanup,
	227	};
	228	ks_sa_rng->rng.priv = (unsigned long)dev;
	229
871d030d	230	ks_sa_rng->reg_rng = devm_platform_ioremap_resource(pdev, 0);
eb428ee0 VA	231	if (IS_ERR(ks_sa_rng->reg_rng))
	232	return PTR_ERR(ks_sa_rng->reg_rng);
	233
	234	ks_sa_rng->regmap_cfg =
	235	syscon_regmap_lookup_by_phandle(dev->of_node,
	236	"ti,syscon-sa-cfg");
	237
	238	if (IS_ERR(ks_sa_rng->regmap_cfg)) {
	239	dev_err(dev, "syscon_node_to_regmap failed\n");
	240	return -EINVAL;
	241	}
	242
	243	pm_runtime_enable(dev);
	244	ret = pm_runtime_get_sync(dev);
	245	if (ret < 0) {
	246	dev_err(dev, "Failed to enable SA power-domain\n");
95459261	247	pm_runtime_put_noidle(dev);
eb428ee0 VA	248	pm_runtime_disable(dev);
	249	return ret;
	250	}
	251
	252	platform_set_drvdata(pdev, ks_sa_rng);
	253
	254	return devm_hwrng_register(&pdev->dev, &ks_sa_rng->rng);
	255	}
	256
	257	static int ks_sa_rng_remove(struct platform_device *pdev)
	258	{
	259	pm_runtime_put_sync(&pdev->dev);
	260	pm_runtime_disable(&pdev->dev);
	261
	262	return 0;
	263	}
	264
	265	static const struct of_device_id ks_sa_rng_dt_match[] = {
	266	{
	267	.compatible = "ti,keystone-rng",
	268	},
	269	{ },
	270	};
	271	MODULE_DEVICE_TABLE(of, ks_sa_rng_dt_match);
	272
	273	static struct platform_driver ks_sa_rng_driver = {
	274	.driver = {
	275	.name = "ks-sa-rng",
	276	.of_match_table = ks_sa_rng_dt_match,
	277	},
	278	.probe = ks_sa_rng_probe,
	279	.remove = ks_sa_rng_remove,
	280	};
	281
	282	module_platform_driver(ks_sa_rng_driver);
	283
	284	MODULE_DESCRIPTION("Keystone NETCP SA H/W Random Number Generator driver");
	285	MODULE_AUTHOR("Vitaly Andrianov <vitalya@ti.com>");
	286	MODULE_LICENSE("GPL");