[linux-block.git] / drivers / char / hw_random / ba431-rng.c

// SPDX-License-Identifier: GPL-2.0
// Copyright (c) 2020 Silex Insight

#include <linux/delay.h>
#include <linux/hw_random.h>
#include <linux/io.h>
#include <linux/iopoll.h>
#include <linux/kernel.h>
#include <linux/mod_devicetable.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/workqueue.h>

#define BA431_RESET_DELAY			1 /* usec */
#define BA431_RESET_READ_STATUS_TIMEOUT		1000 /* usec */
#define BA431_RESET_READ_STATUS_INTERVAL	10 /* usec */
#define BA431_READ_RETRY_INTERVAL		1 /* usec */

#define BA431_REG_CTRL				0x00
#define BA431_REG_FIFO_LEVEL			0x04
#define BA431_REG_STATUS			0x30
#define BA431_REG_FIFODATA			0x80

#define BA431_CTRL_ENABLE			BIT(0)
#define BA431_CTRL_SOFTRESET			BIT(8)

#define BA431_STATUS_STATE_MASK			(BIT(1) | BIT(2) | BIT(3))
#define BA431_STATUS_STATE_OFFSET		1

enum ba431_state {
	BA431_STATE_RESET,
	BA431_STATE_STARTUP,
	BA431_STATE_FIFOFULLON,
	BA431_STATE_FIFOFULLOFF,
	BA431_STATE_RUNNING,
	BA431_STATE_ERROR
};

struct ba431_trng {
	struct device *dev;
	void __iomem *base;
	struct hwrng rng;
	atomic_t reset_pending;
	struct work_struct reset_work;
};

static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg)
{
	return ioread32(ba431->base + reg);
}

static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg,
					u32 val)
{
	iowrite32(val, ba431->base + reg);
}

static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431)
{
	u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS);

	return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET;
}

static int ba431_trng_is_in_error(struct ba431_trng *ba431)
{
	enum ba431_state state = ba431_trng_get_state(ba431);

	if ((state < BA431_STATE_STARTUP) ||
	    (state >= BA431_STATE_ERROR))
		return 1;

	return 0;
}

static int ba431_trng_reset(struct ba431_trng *ba431)
{
	int ret;

	/* Disable interrupts, random generation and enable the softreset */
	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET);
	udelay(BA431_RESET_DELAY);
	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE);

	/* Wait until the state changed */
	if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret,
			       BA431_RESET_READ_STATUS_INTERVAL,
			       BA431_RESET_READ_STATUS_TIMEOUT)) {
		dev_err(ba431->dev, "reset failed (state: %d)\n",
			ba431_trng_get_state(ba431));
		return -ETIMEDOUT;
	}

	dev_info(ba431->dev, "reset done\n");

	return 0;
}

static void ba431_trng_reset_work(struct work_struct *work)
{
	struct ba431_trng *ba431 = container_of(work, struct ba431_trng,
						reset_work);
	ba431_trng_reset(ba431);
	atomic_set(&ba431->reset_pending, 0);
}

static void ba431_trng_schedule_reset(struct ba431_trng *ba431)
{
	if (atomic_cmpxchg(&ba431->reset_pending, 0, 1))
		return;

	schedule_work(&ba431->reset_work);
}

static int ba431_trng_read(struct hwrng *rng, void *buf, size_t max, bool wait)
{
	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
	u32 *data = buf;
	unsigned int level, i;
	int n = 0;

	while (max > 0) {
		level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL);
		if (!level) {
			if (ba431_trng_is_in_error(ba431)) {
				ba431_trng_schedule_reset(ba431);
				break;
			}

			if (!wait)
				break;

			udelay(BA431_READ_RETRY_INTERVAL);
			continue;
		}

		i = level;
		do {
			data[n++] = ba431_trng_read_reg(ba431,
							BA431_REG_FIFODATA);
			max -= sizeof(*data);
		} while (--i && (max > 0));

		if (ba431_trng_is_in_error(ba431)) {
			n -= (level - i);
			ba431_trng_schedule_reset(ba431);
			break;
		}
	}

	n *= sizeof(data);
	return (n || !wait) ? n : -EIO;
}

static void ba431_trng_cleanup(struct hwrng *rng)
{
	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);

	ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0);
	cancel_work_sync(&ba431->reset_work);
}

static int ba431_trng_init(struct hwrng *rng)
{
	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);

	return ba431_trng_reset(ba431);
}

static int ba431_trng_probe(struct platform_device *pdev)
{
	struct ba431_trng *ba431;
	struct resource *res;
	int ret;

	ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL);
	if (!ba431)
		return -ENOMEM;

	ba431->dev = &pdev->dev;

	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
	ba431->base = devm_ioremap_resource(&pdev->dev, res);
	if (IS_ERR(ba431->base))
		return PTR_ERR(ba431->base);

	atomic_set(&ba431->reset_pending, 0);
	INIT_WORK(&ba431->reset_work, ba431_trng_reset_work);
	ba431->rng.name = pdev->name;
	ba431->rng.init = ba431_trng_init;
	ba431->rng.cleanup = ba431_trng_cleanup;
	ba431->rng.read = ba431_trng_read;

	platform_set_drvdata(pdev, ba431);

	ret = hwrng_register(&ba431->rng);
	if (ret) {
		dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret);
		return ret;
	}

	dev_info(&pdev->dev, "BA431 TRNG registered\n");

	return 0;
}

static int ba431_trng_remove(struct platform_device *pdev)
{
	struct ba431_trng *ba431 = platform_get_drvdata(pdev);

	hwrng_unregister(&ba431->rng);

	return 0;
}

static const struct of_device_id ba431_trng_dt_ids[] = {
	{ .compatible = "silex-insight,ba431-rng", .data = NULL },
	{ /* sentinel */ }
};
MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids);

static struct platform_driver ba431_trng_driver = {
	.driver = {
		.name = "ba431-rng",
		.of_match_table = ba431_trng_dt_ids,
	},
	.probe = ba431_trng_probe,
	.remove = ba431_trng_remove,
};

module_platform_driver(ba431_trng_driver);

MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431");
MODULE_LICENSE("GPL");
Commit	Line	Data
0289e9be OS	1	// SPDX-License-Identifier: GPL-2.0
	2	// Copyright (c) 2020 Silex Insight
	3
	4	#include <linux/delay.h>
	5	#include <linux/hw_random.h>
	6	#include <linux/io.h>
	7	#include <linux/iopoll.h>
271dead3	8	#include <linux/kernel.h>
0289e9be OS	9	#include <linux/mod_devicetable.h>
	10	#include <linux/module.h>
	11	#include <linux/platform_device.h>
	12	#include <linux/workqueue.h>
	13
	14	#define BA431_RESET_DELAY 1 /* usec */
	15	#define BA431_RESET_READ_STATUS_TIMEOUT 1000 /* usec */
	16	#define BA431_RESET_READ_STATUS_INTERVAL 10 /* usec */
	17	#define BA431_READ_RETRY_INTERVAL 1 /* usec */
	18
	19	#define BA431_REG_CTRL 0x00
	20	#define BA431_REG_FIFO_LEVEL 0x04
	21	#define BA431_REG_STATUS 0x30
	22	#define BA431_REG_FIFODATA 0x80
	23
	24	#define BA431_CTRL_ENABLE BIT(0)
	25	#define BA431_CTRL_SOFTRESET BIT(8)
	26
	27	#define BA431_STATUS_STATE_MASK (BIT(1) \| BIT(2) \| BIT(3))
	28	#define BA431_STATUS_STATE_OFFSET 1
	29
	30	enum ba431_state {
	31	BA431_STATE_RESET,
	32	BA431_STATE_STARTUP,
	33	BA431_STATE_FIFOFULLON,
	34	BA431_STATE_FIFOFULLOFF,
	35	BA431_STATE_RUNNING,
	36	BA431_STATE_ERROR
	37	};
	38
	39	struct ba431_trng {
	40	struct device *dev;
	41	void __iomem *base;
	42	struct hwrng rng;
	43	atomic_t reset_pending;
	44	struct work_struct reset_work;
	45	};
	46
	47	static inline u32 ba431_trng_read_reg(struct ba431_trng *ba431, u32 reg)
	48	{
	49	return ioread32(ba431->base + reg);
	50	}
	51
	52	static inline void ba431_trng_write_reg(struct ba431_trng *ba431, u32 reg,
	53	u32 val)
	54	{
	55	iowrite32(val, ba431->base + reg);
	56	}
	57
	58	static inline enum ba431_state ba431_trng_get_state(struct ba431_trng *ba431)
	59	{
	60	u32 status = ba431_trng_read_reg(ba431, BA431_REG_STATUS);
	61
	62	return (status & BA431_STATUS_STATE_MASK) >> BA431_STATUS_STATE_OFFSET;
	63	}
	64
	65	static int ba431_trng_is_in_error(struct ba431_trng *ba431)
	66	{
	67	enum ba431_state state = ba431_trng_get_state(ba431);
	68
	69	if ((state < BA431_STATE_STARTUP) \|\|
	70	(state >= BA431_STATE_ERROR))
	71	return 1;
	72
73	return 0;
74	}
75
76	static int ba431_trng_reset(struct ba431_trng *ba431)
77	{
78	int ret;
79
80	/* Disable interrupts, random generation and enable the softreset */
81	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_SOFTRESET);
82	udelay(BA431_RESET_DELAY);
83	ba431_trng_write_reg(ba431, BA431_REG_CTRL, BA431_CTRL_ENABLE);
84
85	/* Wait until the state changed */
86	if (readx_poll_timeout(ba431_trng_is_in_error, ba431, ret, !ret,
87	BA431_RESET_READ_STATUS_INTERVAL,
88	BA431_RESET_READ_STATUS_TIMEOUT)) {
89	dev_err(ba431->dev, "reset failed (state: %d)\n",
90	ba431_trng_get_state(ba431));
91	return -ETIMEDOUT;
92	}
93
94	dev_info(ba431->dev, "reset done\n");
95
96	return 0;
97	}
98
99	static void ba431_trng_reset_work(struct work_struct *work)
100	{
101	struct ba431_trng *ba431 = container_of(work, struct ba431_trng,
102	reset_work);
103	ba431_trng_reset(ba431);
104	atomic_set(&ba431->reset_pending, 0);
105	}
106
107	static void ba431_trng_schedule_reset(struct ba431_trng *ba431)
108	{
109	if (atomic_cmpxchg(&ba431->reset_pending, 0, 1))
110	return;
111
112	schedule_work(&ba431->reset_work);
113	}
114
115	static int ba431_trng_read(struct hwrng rng, void buf, size_t max, bool wait)
116	{
117	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
118	u32 *data = buf;
119	unsigned int level, i;
120	int n = 0;
121
122	while (max > 0) {
123	level = ba431_trng_read_reg(ba431, BA431_REG_FIFO_LEVEL);
124	if (!level) {
125	if (ba431_trng_is_in_error(ba431)) {
126	ba431_trng_schedule_reset(ba431);
127	break;
128	}
129
130	if (!wait)
131	break;
132
133	udelay(BA431_READ_RETRY_INTERVAL);
134	continue;
135	}
136
137	i = level;
138	do {
139	data[n++] = ba431_trng_read_reg(ba431,
140	BA431_REG_FIFODATA);
141	max -= sizeof(*data);
142	} while (--i && (max > 0));
143
144	if (ba431_trng_is_in_error(ba431)) {
145	n -= (level - i);
146	ba431_trng_schedule_reset(ba431);
147	break;
148	}
149	}
150
151	n *= sizeof(data);
152	return (n \|\| !wait) ? n : -EIO;
153	}
154
155	static void ba431_trng_cleanup(struct hwrng *rng)
156	{
157	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
158
159	ba431_trng_write_reg(ba431, BA431_REG_CTRL, 0);
160	cancel_work_sync(&ba431->reset_work);
161	}
162
163	static int ba431_trng_init(struct hwrng *rng)
164	{
165	struct ba431_trng *ba431 = container_of(rng, struct ba431_trng, rng);
166
167	return ba431_trng_reset(ba431);
168	}
169
170	static int ba431_trng_probe(struct platform_device *pdev)
171	{
172	struct ba431_trng *ba431;
173	struct resource *res;
174	int ret;
175
176	ba431 = devm_kzalloc(&pdev->dev, sizeof(*ba431), GFP_KERNEL);
177	if (!ba431)
178	return -ENOMEM;
179
180	ba431->dev = &pdev->dev;
181
182	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
183	ba431->base = devm_ioremap_resource(&pdev->dev, res);
184	if (IS_ERR(ba431->base))
185	return PTR_ERR(ba431->base);
186
187	atomic_set(&ba431->reset_pending, 0);
188	INIT_WORK(&ba431->reset_work, ba431_trng_reset_work);
189	ba431->rng.name = pdev->name;
190	ba431->rng.init = ba431_trng_init;
191	ba431->rng.cleanup = ba431_trng_cleanup;
192	ba431->rng.read = ba431_trng_read;
193
194	platform_set_drvdata(pdev, ba431);
195
196	ret = hwrng_register(&ba431->rng);
197	if (ret) {
198	dev_err(&pdev->dev, "BA431 registration failed (%d)\n", ret);
199	return ret;
200	}
201
202	dev_info(&pdev->dev, "BA431 TRNG registered\n");
203
204	return 0;
205	}
206
207	static int ba431_trng_remove(struct platform_device *pdev)
208	{
209	struct ba431_trng *ba431 = platform_get_drvdata(pdev);
210
211	hwrng_unregister(&ba431->rng);
212
213	return 0;
214	}
215
216	static const struct of_device_id ba431_trng_dt_ids[] = {
217	{ .compatible = "silex-insight,ba431-rng", .data = NULL },
218	{ /* sentinel */ }
219	};
220	MODULE_DEVICE_TABLE(of, ba431_trng_dt_ids);
221
222	static struct platform_driver ba431_trng_driver = {
223	.driver = {
224	.name = "ba431-rng",
225	.of_match_table = ba431_trng_dt_ids,
226	},
227	.probe = ba431_trng_probe,
228	.remove = ba431_trng_remove,
229	};
230
231	module_platform_driver(ba431_trng_driver);
232
233	MODULE_AUTHOR("Olivier Sobrie <olivier@sobrie.be>");
234	MODULE_DESCRIPTION("TRNG driver for Silex Insight BA431");
235	MODULE_LICENSE("GPL");