Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <robert.picco@hp.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
48b81880 | 17 | #include <linux/smp_lock.h> |
1da177e4 LT |
18 | #include <linux/types.h> |
19 | #include <linux/miscdevice.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/fcntl.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/poll.h> | |
f23f6e08 | 25 | #include <linux/mm.h> |
1da177e4 LT |
26 | #include <linux/proc_fs.h> |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/sysctl.h> | |
29 | #include <linux/wait.h> | |
30 | #include <linux/bcd.h> | |
31 | #include <linux/seq_file.h> | |
32 | #include <linux/bitops.h> | |
0aa366f3 | 33 | #include <linux/clocksource.h> |
1da177e4 LT |
34 | |
35 | #include <asm/current.h> | |
36 | #include <asm/uaccess.h> | |
37 | #include <asm/system.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/div64.h> | |
41 | ||
42 | #include <linux/acpi.h> | |
43 | #include <acpi/acpi_bus.h> | |
44 | #include <linux/hpet.h> | |
45 | ||
46 | /* | |
47 | * The High Precision Event Timer driver. | |
48 | * This driver is closely modelled after the rtc.c driver. | |
96803820 | 49 | * http://www.intel.com/hardwaredesign/hpetspec.htm |
1da177e4 LT |
50 | */ |
51 | #define HPET_USER_FREQ (64) | |
52 | #define HPET_DRIFT (500) | |
53 | ||
757c4724 RD |
54 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
55 | ||
0aa366f3 TL |
56 | #if BITS_PER_LONG == 64 |
57 | #define write_counter(V, MC) writeq(V, MC) | |
58 | #define read_counter(MC) readq(MC) | |
59 | #else | |
60 | #define write_counter(V, MC) writel(V, MC) | |
61 | #define read_counter(MC) readl(MC) | |
62 | #endif | |
63 | ||
642d30bb | 64 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 65 | |
3dffec45 ÇO |
66 | /* This clocksource driver currently only works on ia64 */ |
67 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
68 | static void __iomem *hpet_mctr; |
69 | ||
70 | static cycle_t read_hpet(void) | |
71 | { | |
72 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
73 | } | |
74 | ||
75 | static struct clocksource clocksource_hpet = { | |
76 | .name = "hpet", | |
77 | .rating = 250, | |
78 | .read = read_hpet, | |
712aaa1c | 79 | .mask = CLOCKSOURCE_MASK(64), |
0aa366f3 TL |
80 | .mult = 0, /*to be caluclated*/ |
81 | .shift = 10, | |
82 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
83 | }; | |
84 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 85 | #endif |
0aa366f3 | 86 | |
1da177e4 LT |
87 | /* A lock for concurrent access by app and isr hpet activity. */ |
88 | static DEFINE_SPINLOCK(hpet_lock); | |
89 | /* A lock for concurrent intermodule access to hpet and isr hpet activity. */ | |
90 | static DEFINE_SPINLOCK(hpet_task_lock); | |
91 | ||
92 | #define HPET_DEV_NAME (7) | |
93 | ||
94 | struct hpet_dev { | |
95 | struct hpets *hd_hpets; | |
96 | struct hpet __iomem *hd_hpet; | |
97 | struct hpet_timer __iomem *hd_timer; | |
98 | unsigned long hd_ireqfreq; | |
99 | unsigned long hd_irqdata; | |
100 | wait_queue_head_t hd_waitqueue; | |
101 | struct fasync_struct *hd_async_queue; | |
102 | struct hpet_task *hd_task; | |
103 | unsigned int hd_flags; | |
104 | unsigned int hd_irq; | |
105 | unsigned int hd_hdwirq; | |
106 | char hd_name[HPET_DEV_NAME]; | |
107 | }; | |
108 | ||
109 | struct hpets { | |
110 | struct hpets *hp_next; | |
111 | struct hpet __iomem *hp_hpet; | |
112 | unsigned long hp_hpet_phys; | |
0aa366f3 | 113 | struct clocksource *hp_clocksource; |
ba3f213f | 114 | unsigned long long hp_tick_freq; |
1da177e4 LT |
115 | unsigned long hp_delta; |
116 | unsigned int hp_ntimer; | |
117 | unsigned int hp_which; | |
118 | struct hpet_dev hp_dev[1]; | |
119 | }; | |
120 | ||
121 | static struct hpets *hpets; | |
122 | ||
123 | #define HPET_OPEN 0x0001 | |
124 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
125 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 126 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 127 | |
1da177e4 LT |
128 | |
129 | #ifndef readq | |
887c27f3 | 130 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
131 | { |
132 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
133 | } | |
134 | #endif | |
135 | ||
136 | #ifndef writeq | |
887c27f3 | 137 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
138 | { |
139 | writel(v & 0xffffffff, addr); | |
140 | writel(v >> 32, addr + 4); | |
141 | } | |
142 | #endif | |
143 | ||
7d12e780 | 144 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
145 | { |
146 | struct hpet_dev *devp; | |
147 | unsigned long isr; | |
148 | ||
149 | devp = data; | |
0d290861 CL |
150 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
151 | ||
152 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
153 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
154 | return IRQ_NONE; | |
1da177e4 LT |
155 | |
156 | spin_lock(&hpet_lock); | |
157 | devp->hd_irqdata++; | |
158 | ||
159 | /* | |
160 | * For non-periodic timers, increment the accumulator. | |
161 | * This has the effect of treating non-periodic like periodic. | |
162 | */ | |
163 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
164 | unsigned long m, t; | |
165 | ||
166 | t = devp->hd_ireqfreq; | |
167 | m = read_counter(&devp->hd_hpet->hpet_mc); | |
168 | write_counter(t + m + devp->hd_hpets->hp_delta, | |
169 | &devp->hd_timer->hpet_compare); | |
170 | } | |
171 | ||
0d290861 CL |
172 | if (devp->hd_flags & HPET_SHARED_IRQ) |
173 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
174 | spin_unlock(&hpet_lock); |
175 | ||
176 | spin_lock(&hpet_task_lock); | |
177 | if (devp->hd_task) | |
178 | devp->hd_task->ht_func(devp->hd_task->ht_data); | |
179 | spin_unlock(&hpet_task_lock); | |
180 | ||
181 | wake_up_interruptible(&devp->hd_waitqueue); | |
182 | ||
183 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
184 | ||
185 | return IRQ_HANDLED; | |
186 | } | |
187 | ||
188 | static int hpet_open(struct inode *inode, struct file *file) | |
189 | { | |
190 | struct hpet_dev *devp; | |
191 | struct hpets *hpetp; | |
192 | int i; | |
193 | ||
194 | if (file->f_mode & FMODE_WRITE) | |
195 | return -EINVAL; | |
196 | ||
48b81880 | 197 | lock_kernel(); |
1da177e4 LT |
198 | spin_lock_irq(&hpet_lock); |
199 | ||
200 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
201 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
202 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN | |
203 | || hpetp->hp_dev[i].hd_task) | |
204 | continue; | |
205 | else { | |
206 | devp = &hpetp->hp_dev[i]; | |
207 | break; | |
208 | } | |
209 | ||
210 | if (!devp) { | |
211 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 212 | unlock_kernel(); |
1da177e4 LT |
213 | return -EBUSY; |
214 | } | |
215 | ||
216 | file->private_data = devp; | |
217 | devp->hd_irqdata = 0; | |
218 | devp->hd_flags |= HPET_OPEN; | |
219 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 220 | unlock_kernel(); |
1da177e4 LT |
221 | |
222 | return 0; | |
223 | } | |
224 | ||
225 | static ssize_t | |
226 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
227 | { | |
228 | DECLARE_WAITQUEUE(wait, current); | |
229 | unsigned long data; | |
230 | ssize_t retval; | |
231 | struct hpet_dev *devp; | |
232 | ||
233 | devp = file->private_data; | |
234 | if (!devp->hd_ireqfreq) | |
235 | return -EIO; | |
236 | ||
237 | if (count < sizeof(unsigned long)) | |
238 | return -EINVAL; | |
239 | ||
240 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
241 | ||
242 | for ( ; ; ) { | |
243 | set_current_state(TASK_INTERRUPTIBLE); | |
244 | ||
245 | spin_lock_irq(&hpet_lock); | |
246 | data = devp->hd_irqdata; | |
247 | devp->hd_irqdata = 0; | |
248 | spin_unlock_irq(&hpet_lock); | |
249 | ||
250 | if (data) | |
251 | break; | |
252 | else if (file->f_flags & O_NONBLOCK) { | |
253 | retval = -EAGAIN; | |
254 | goto out; | |
255 | } else if (signal_pending(current)) { | |
256 | retval = -ERESTARTSYS; | |
257 | goto out; | |
258 | } | |
259 | schedule(); | |
260 | } | |
261 | ||
262 | retval = put_user(data, (unsigned long __user *)buf); | |
263 | if (!retval) | |
264 | retval = sizeof(unsigned long); | |
265 | out: | |
266 | __set_current_state(TASK_RUNNING); | |
267 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
268 | ||
269 | return retval; | |
270 | } | |
271 | ||
272 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
273 | { | |
274 | unsigned long v; | |
275 | struct hpet_dev *devp; | |
276 | ||
277 | devp = file->private_data; | |
278 | ||
279 | if (!devp->hd_ireqfreq) | |
280 | return 0; | |
281 | ||
282 | poll_wait(file, &devp->hd_waitqueue, wait); | |
283 | ||
284 | spin_lock_irq(&hpet_lock); | |
285 | v = devp->hd_irqdata; | |
286 | spin_unlock_irq(&hpet_lock); | |
287 | ||
288 | if (v != 0) | |
289 | return POLLIN | POLLRDNORM; | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
294 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
295 | { | |
296 | #ifdef CONFIG_HPET_MMAP | |
297 | struct hpet_dev *devp; | |
298 | unsigned long addr; | |
299 | ||
300 | if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) | |
301 | return -EINVAL; | |
302 | ||
303 | devp = file->private_data; | |
304 | addr = devp->hd_hpets->hp_hpet_phys; | |
305 | ||
306 | if (addr & (PAGE_SIZE - 1)) | |
307 | return -ENOSYS; | |
308 | ||
309 | vma->vm_flags |= VM_IO; | |
310 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
1da177e4 LT |
311 | |
312 | if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, | |
313 | PAGE_SIZE, vma->vm_page_prot)) { | |
3e6716e7 | 314 | printk(KERN_ERR "%s: io_remap_pfn_range failed\n", |
bf9d8929 | 315 | __func__); |
1da177e4 LT |
316 | return -EAGAIN; |
317 | } | |
318 | ||
319 | return 0; | |
320 | #else | |
321 | return -ENOSYS; | |
322 | #endif | |
323 | } | |
324 | ||
325 | static int hpet_fasync(int fd, struct file *file, int on) | |
326 | { | |
327 | struct hpet_dev *devp; | |
328 | ||
329 | devp = file->private_data; | |
330 | ||
331 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
332 | return 0; | |
333 | else | |
334 | return -EIO; | |
335 | } | |
336 | ||
337 | static int hpet_release(struct inode *inode, struct file *file) | |
338 | { | |
339 | struct hpet_dev *devp; | |
340 | struct hpet_timer __iomem *timer; | |
341 | int irq = 0; | |
342 | ||
343 | devp = file->private_data; | |
344 | timer = devp->hd_timer; | |
345 | ||
346 | spin_lock_irq(&hpet_lock); | |
347 | ||
348 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
349 | &timer->hpet_config); | |
350 | ||
351 | irq = devp->hd_irq; | |
352 | devp->hd_irq = 0; | |
353 | ||
354 | devp->hd_ireqfreq = 0; | |
355 | ||
356 | if (devp->hd_flags & HPET_PERIODIC | |
357 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
358 | unsigned long v; | |
359 | ||
360 | v = readq(&timer->hpet_config); | |
361 | v ^= Tn_TYPE_CNF_MASK; | |
362 | writeq(v, &timer->hpet_config); | |
363 | } | |
364 | ||
365 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
366 | spin_unlock_irq(&hpet_lock); | |
367 | ||
368 | if (irq) | |
369 | free_irq(irq, devp); | |
370 | ||
371 | if (file->f_flags & FASYNC) | |
372 | hpet_fasync(-1, file, 0); | |
373 | ||
374 | file->private_data = NULL; | |
375 | return 0; | |
376 | } | |
377 | ||
378 | static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int); | |
379 | ||
380 | static int | |
381 | hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |
382 | unsigned long arg) | |
383 | { | |
384 | struct hpet_dev *devp; | |
385 | ||
386 | devp = file->private_data; | |
387 | return hpet_ioctl_common(devp, cmd, arg, 0); | |
388 | } | |
389 | ||
390 | static int hpet_ioctl_ieon(struct hpet_dev *devp) | |
391 | { | |
392 | struct hpet_timer __iomem *timer; | |
393 | struct hpet __iomem *hpet; | |
394 | struct hpets *hpetp; | |
395 | int irq; | |
396 | unsigned long g, v, t, m; | |
397 | unsigned long flags, isr; | |
398 | ||
399 | timer = devp->hd_timer; | |
400 | hpet = devp->hd_hpet; | |
401 | hpetp = devp->hd_hpets; | |
402 | ||
9090e6db CL |
403 | if (!devp->hd_ireqfreq) |
404 | return -EIO; | |
405 | ||
1da177e4 LT |
406 | spin_lock_irq(&hpet_lock); |
407 | ||
408 | if (devp->hd_flags & HPET_IE) { | |
409 | spin_unlock_irq(&hpet_lock); | |
410 | return -EBUSY; | |
411 | } | |
412 | ||
413 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
414 | |
415 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
416 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
417 | spin_unlock_irq(&hpet_lock); |
418 | ||
1da177e4 LT |
419 | irq = devp->hd_hdwirq; |
420 | ||
421 | if (irq) { | |
0d290861 | 422 | unsigned long irq_flags; |
1da177e4 | 423 | |
0d290861 CL |
424 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
425 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 426 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
427 | if (request_irq(irq, hpet_interrupt, irq_flags, |
428 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
429 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
430 | irq = 0; | |
431 | } | |
432 | } | |
433 | ||
434 | if (irq == 0) { | |
435 | spin_lock_irq(&hpet_lock); | |
436 | devp->hd_flags ^= HPET_IE; | |
437 | spin_unlock_irq(&hpet_lock); | |
438 | return -EIO; | |
439 | } | |
440 | ||
441 | devp->hd_irq = irq; | |
442 | t = devp->hd_ireqfreq; | |
443 | v = readq(&timer->hpet_config); | |
444 | g = v | Tn_INT_ENB_CNF_MASK; | |
445 | ||
446 | if (devp->hd_flags & HPET_PERIODIC) { | |
447 | write_counter(t, &timer->hpet_compare); | |
448 | g |= Tn_TYPE_CNF_MASK; | |
449 | v |= Tn_TYPE_CNF_MASK; | |
450 | writeq(v, &timer->hpet_config); | |
451 | v |= Tn_VAL_SET_CNF_MASK; | |
452 | writeq(v, &timer->hpet_config); | |
453 | local_irq_save(flags); | |
454 | m = read_counter(&hpet->hpet_mc); | |
455 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
456 | } else { | |
457 | local_irq_save(flags); | |
458 | m = read_counter(&hpet->hpet_mc); | |
459 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
460 | } | |
461 | ||
0d290861 | 462 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 463 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
464 | writel(isr, &hpet->hpet_isr); |
465 | } | |
1da177e4 LT |
466 | writeq(g, &timer->hpet_config); |
467 | local_irq_restore(flags); | |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
ba3f213f CL |
472 | /* converts Hz to number of timer ticks */ |
473 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
474 | unsigned long dis) | |
1da177e4 | 475 | { |
ba3f213f | 476 | unsigned long long m; |
1da177e4 | 477 | |
ba3f213f | 478 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 479 | do_div(m, dis); |
1da177e4 LT |
480 | return (unsigned long)m; |
481 | } | |
482 | ||
483 | static int | |
484 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) | |
485 | { | |
486 | struct hpet_timer __iomem *timer; | |
487 | struct hpet __iomem *hpet; | |
488 | struct hpets *hpetp; | |
489 | int err; | |
490 | unsigned long v; | |
491 | ||
492 | switch (cmd) { | |
493 | case HPET_IE_OFF: | |
494 | case HPET_INFO: | |
495 | case HPET_EPI: | |
496 | case HPET_DPI: | |
497 | case HPET_IRQFREQ: | |
498 | timer = devp->hd_timer; | |
499 | hpet = devp->hd_hpet; | |
500 | hpetp = devp->hd_hpets; | |
501 | break; | |
502 | case HPET_IE_ON: | |
503 | return hpet_ioctl_ieon(devp); | |
504 | default: | |
505 | return -EINVAL; | |
506 | } | |
507 | ||
508 | err = 0; | |
509 | ||
510 | switch (cmd) { | |
511 | case HPET_IE_OFF: | |
512 | if ((devp->hd_flags & HPET_IE) == 0) | |
513 | break; | |
514 | v = readq(&timer->hpet_config); | |
515 | v &= ~Tn_INT_ENB_CNF_MASK; | |
516 | writeq(v, &timer->hpet_config); | |
517 | if (devp->hd_irq) { | |
518 | free_irq(devp->hd_irq, devp); | |
519 | devp->hd_irq = 0; | |
520 | } | |
521 | devp->hd_flags ^= HPET_IE; | |
522 | break; | |
523 | case HPET_INFO: | |
524 | { | |
525 | struct hpet_info info; | |
526 | ||
af95eade CL |
527 | if (devp->hd_ireqfreq) |
528 | info.hi_ireqfreq = | |
529 | hpet_time_div(hpetp, devp->hd_ireqfreq); | |
530 | else | |
531 | info.hi_ireqfreq = 0; | |
1da177e4 LT |
532 | info.hi_flags = |
533 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; | |
c860ed9f CL |
534 | info.hi_hpet = hpetp->hp_which; |
535 | info.hi_timer = devp - hpetp->hp_dev; | |
8e8505be CL |
536 | if (kernel) |
537 | memcpy((void *)arg, &info, sizeof(info)); | |
538 | else | |
539 | if (copy_to_user((void __user *)arg, &info, | |
540 | sizeof(info))) | |
541 | err = -EFAULT; | |
1da177e4 LT |
542 | break; |
543 | } | |
544 | case HPET_EPI: | |
545 | v = readq(&timer->hpet_config); | |
546 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
547 | err = -ENXIO; | |
548 | break; | |
549 | } | |
550 | devp->hd_flags |= HPET_PERIODIC; | |
551 | break; | |
552 | case HPET_DPI: | |
553 | v = readq(&timer->hpet_config); | |
554 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
555 | err = -ENXIO; | |
556 | break; | |
557 | } | |
558 | if (devp->hd_flags & HPET_PERIODIC && | |
559 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
560 | v = readq(&timer->hpet_config); | |
561 | v ^= Tn_TYPE_CNF_MASK; | |
562 | writeq(v, &timer->hpet_config); | |
563 | } | |
564 | devp->hd_flags &= ~HPET_PERIODIC; | |
565 | break; | |
566 | case HPET_IRQFREQ: | |
567 | if (!kernel && (arg > hpet_max_freq) && | |
568 | !capable(CAP_SYS_RESOURCE)) { | |
569 | err = -EACCES; | |
570 | break; | |
571 | } | |
572 | ||
189e2dd1 | 573 | if (!arg) { |
1da177e4 LT |
574 | err = -EINVAL; |
575 | break; | |
576 | } | |
577 | ||
ba3f213f | 578 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
579 | } |
580 | ||
581 | return err; | |
582 | } | |
583 | ||
62322d25 | 584 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
585 | .owner = THIS_MODULE, |
586 | .llseek = no_llseek, | |
587 | .read = hpet_read, | |
588 | .poll = hpet_poll, | |
589 | .ioctl = hpet_ioctl, | |
590 | .open = hpet_open, | |
591 | .release = hpet_release, | |
592 | .fasync = hpet_fasync, | |
593 | .mmap = hpet_mmap, | |
594 | }; | |
595 | ||
3e6716e7 RD |
596 | static int hpet_is_known(struct hpet_data *hdp) |
597 | { | |
598 | struct hpets *hpetp; | |
599 | ||
600 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
601 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
602 | return 1; | |
603 | ||
604 | return 0; | |
605 | } | |
606 | ||
1da177e4 LT |
607 | static inline int hpet_tpcheck(struct hpet_task *tp) |
608 | { | |
609 | struct hpet_dev *devp; | |
610 | struct hpets *hpetp; | |
611 | ||
612 | devp = tp->ht_opaque; | |
613 | ||
614 | if (!devp) | |
615 | return -ENXIO; | |
616 | ||
617 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
618 | if (devp >= hpetp->hp_dev | |
619 | && devp < (hpetp->hp_dev + hpetp->hp_ntimer) | |
620 | && devp->hd_hpet == hpetp->hp_hpet) | |
621 | return 0; | |
622 | ||
623 | return -ENXIO; | |
624 | } | |
625 | ||
626 | int hpet_unregister(struct hpet_task *tp) | |
627 | { | |
628 | struct hpet_dev *devp; | |
629 | struct hpet_timer __iomem *timer; | |
630 | int err; | |
631 | ||
632 | if ((err = hpet_tpcheck(tp))) | |
633 | return err; | |
634 | ||
635 | spin_lock_irq(&hpet_task_lock); | |
636 | spin_lock(&hpet_lock); | |
637 | ||
638 | devp = tp->ht_opaque; | |
639 | if (devp->hd_task != tp) { | |
640 | spin_unlock(&hpet_lock); | |
641 | spin_unlock_irq(&hpet_task_lock); | |
642 | return -ENXIO; | |
643 | } | |
644 | ||
645 | timer = devp->hd_timer; | |
646 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
647 | &timer->hpet_config); | |
648 | devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC); | |
649 | devp->hd_task = NULL; | |
650 | spin_unlock(&hpet_lock); | |
651 | spin_unlock_irq(&hpet_task_lock); | |
652 | ||
653 | return 0; | |
654 | } | |
655 | ||
1da177e4 LT |
656 | static ctl_table hpet_table[] = { |
657 | { | |
22943364 | 658 | .ctl_name = CTL_UNNUMBERED, |
1da177e4 LT |
659 | .procname = "max-user-freq", |
660 | .data = &hpet_max_freq, | |
661 | .maxlen = sizeof(int), | |
662 | .mode = 0644, | |
663 | .proc_handler = &proc_dointvec, | |
664 | }, | |
665 | {.ctl_name = 0} | |
666 | }; | |
667 | ||
668 | static ctl_table hpet_root[] = { | |
669 | { | |
22943364 | 670 | .ctl_name = CTL_UNNUMBERED, |
1da177e4 LT |
671 | .procname = "hpet", |
672 | .maxlen = 0, | |
673 | .mode = 0555, | |
674 | .child = hpet_table, | |
675 | }, | |
676 | {.ctl_name = 0} | |
677 | }; | |
678 | ||
679 | static ctl_table dev_root[] = { | |
680 | { | |
681 | .ctl_name = CTL_DEV, | |
682 | .procname = "dev", | |
683 | .maxlen = 0, | |
684 | .mode = 0555, | |
685 | .child = hpet_root, | |
686 | }, | |
687 | {.ctl_name = 0} | |
688 | }; | |
689 | ||
690 | static struct ctl_table_header *sysctl_header; | |
691 | ||
1da177e4 LT |
692 | /* |
693 | * Adjustment for when arming the timer with | |
694 | * initial conditions. That is, main counter | |
695 | * ticks expired before interrupts are enabled. | |
696 | */ | |
697 | #define TICK_CALIBRATE (1000UL) | |
698 | ||
699 | static unsigned long hpet_calibrate(struct hpets *hpetp) | |
700 | { | |
701 | struct hpet_timer __iomem *timer = NULL; | |
702 | unsigned long t, m, count, i, flags, start; | |
703 | struct hpet_dev *devp; | |
704 | int j; | |
705 | struct hpet __iomem *hpet; | |
706 | ||
707 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
708 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
709 | timer = devp->hd_timer; | |
710 | break; | |
711 | } | |
712 | ||
713 | if (!timer) | |
714 | return 0; | |
715 | ||
3d5640d1 | 716 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
717 | t = read_counter(&timer->hpet_compare); |
718 | ||
719 | i = 0; | |
ba3f213f | 720 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
721 | |
722 | local_irq_save(flags); | |
723 | ||
724 | start = read_counter(&hpet->hpet_mc); | |
725 | ||
726 | do { | |
727 | m = read_counter(&hpet->hpet_mc); | |
728 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
729 | } while (i++, (m - start) < count); | |
730 | ||
731 | local_irq_restore(flags); | |
732 | ||
733 | return (m - start) / i; | |
734 | } | |
735 | ||
736 | int hpet_alloc(struct hpet_data *hdp) | |
737 | { | |
5761d64b | 738 | u64 cap, mcfg; |
1da177e4 | 739 | struct hpet_dev *devp; |
5761d64b | 740 | u32 i, ntimer; |
1da177e4 LT |
741 | struct hpets *hpetp; |
742 | size_t siz; | |
743 | struct hpet __iomem *hpet; | |
3e6716e7 | 744 | static struct hpets *last = NULL; |
5761d64b | 745 | unsigned long period; |
ba3f213f | 746 | unsigned long long temp; |
1da177e4 LT |
747 | |
748 | /* | |
749 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
750 | * If platform dependent code has allocated the hpet that |
751 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 752 | */ |
3e6716e7 RD |
753 | if (hpet_is_known(hdp)) { |
754 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 755 | __func__); |
3e6716e7 RD |
756 | return 0; |
757 | } | |
1da177e4 LT |
758 | |
759 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
760 | sizeof(struct hpet_dev)); | |
761 | ||
3e6716e7 | 762 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
763 | |
764 | if (!hpetp) | |
765 | return -ENOMEM; | |
766 | ||
1da177e4 LT |
767 | hpetp->hp_which = hpet_nhpet++; |
768 | hpetp->hp_hpet = hdp->hd_address; | |
769 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
770 | ||
771 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 772 | |
5761d64b TG |
773 | for (i = 0; i < hdp->hd_nirqs; i++) |
774 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 775 | |
5761d64b | 776 | hpet = hpetp->hp_hpet; |
e3f37a54 | 777 | |
1da177e4 LT |
778 | cap = readq(&hpet->hpet_cap); |
779 | ||
780 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
781 | ||
782 | if (hpetp->hp_ntimer != ntimer) { | |
783 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
784 | " with number of timers\n"); | |
785 | kfree(hpetp); | |
786 | return -ENODEV; | |
787 | } | |
788 | ||
789 | if (last) | |
790 | last->hp_next = hpetp; | |
791 | else | |
792 | hpets = hpetp; | |
793 | ||
794 | last = hpetp; | |
795 | ||
ba3f213f CL |
796 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
797 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
798 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
799 | temp += period >> 1; /* round */ | |
800 | do_div(temp, period); | |
801 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 802 | |
3034d11c AK |
803 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
804 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
805 | hpetp->hp_ntimer > 1 ? "s" : ""); |
806 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5761d64b | 807 | printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
1da177e4 LT |
808 | printk("\n"); |
809 | ||
318db8f0 CL |
810 | printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n", |
811 | hpetp->hp_which, hpetp->hp_ntimer, | |
812 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq); | |
1da177e4 LT |
813 | |
814 | mcfg = readq(&hpet->hpet_config); | |
815 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
816 | write_counter(0L, &hpet->hpet_mc); | |
817 | mcfg |= HPET_ENABLE_CNF_MASK; | |
818 | writeq(mcfg, &hpet->hpet_config); | |
819 | } | |
820 | ||
642d30bb | 821 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
822 | struct hpet_timer __iomem *timer; |
823 | ||
824 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
825 | |
826 | devp->hd_hpets = hpetp; | |
827 | devp->hd_hpet = hpet; | |
828 | devp->hd_timer = timer; | |
829 | ||
830 | /* | |
831 | * If the timer was reserved by platform code, | |
832 | * then make timer unavailable for opens. | |
833 | */ | |
834 | if (hdp->hd_state & (1 << i)) { | |
835 | devp->hd_flags = HPET_OPEN; | |
836 | continue; | |
837 | } | |
838 | ||
839 | init_waitqueue_head(&devp->hd_waitqueue); | |
840 | } | |
841 | ||
842 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 843 | |
3b2b64fd LT |
844 | /* This clocksource driver currently only works on ia64 */ |
845 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
846 | if (!hpet_clocksource) { |
847 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
848 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); | |
849 | clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, | |
850 | clocksource_hpet.shift); | |
851 | clocksource_register(&clocksource_hpet); | |
852 | hpetp->hp_clocksource = &clocksource_hpet; | |
853 | hpet_clocksource = &clocksource_hpet; | |
854 | } | |
3b2b64fd | 855 | #endif |
1da177e4 LT |
856 | |
857 | return 0; | |
858 | } | |
859 | ||
860 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
861 | { | |
862 | struct hpet_data *hdp; | |
863 | acpi_status status; | |
864 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
865 | |
866 | hdp = data; | |
867 | ||
868 | status = acpi_resource_to_address64(res, &addr); | |
869 | ||
870 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 871 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 872 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 873 | |
3e6716e7 RD |
874 | if (hpet_is_known(hdp)) { |
875 | printk(KERN_DEBUG "%s: 0x%lx is busy\n", | |
bf9d8929 | 876 | __func__, hdp->hd_phys_address); |
3e6716e7 | 877 | iounmap(hdp->hd_address); |
78e1ca49 | 878 | return AE_ALREADY_EXISTS; |
3e6716e7 | 879 | } |
50eca3eb BM |
880 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
881 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
882 | |
883 | fixmem32 = &res->data.fixed_memory32; | |
884 | if (!fixmem32) | |
78e1ca49 | 885 | return AE_NO_MEMORY; |
757c4724 | 886 | |
50eca3eb BM |
887 | hdp->hd_phys_address = fixmem32->address; |
888 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
889 | HPET_RANGE_SIZE); |
890 | ||
3e6716e7 RD |
891 | if (hpet_is_known(hdp)) { |
892 | printk(KERN_DEBUG "%s: 0x%lx is busy\n", | |
bf9d8929 | 893 | __func__, hdp->hd_phys_address); |
3e6716e7 | 894 | iounmap(hdp->hd_address); |
78e1ca49 | 895 | return AE_ALREADY_EXISTS; |
3e6716e7 | 896 | } |
50eca3eb BM |
897 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
898 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 899 | int i, irq; |
1da177e4 LT |
900 | |
901 | irqp = &res->data.extended_irq; | |
902 | ||
be5efffb BH |
903 | for (i = 0; i < irqp->interrupt_count; i++) { |
904 | irq = acpi_register_gsi(irqp->interrupts[i], | |
905 | irqp->triggering, irqp->polarity); | |
906 | if (irq < 0) | |
907 | return AE_ERROR; | |
908 | ||
909 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
910 | hdp->hd_nirqs++; | |
1da177e4 LT |
911 | } |
912 | } | |
913 | ||
914 | return AE_OK; | |
915 | } | |
916 | ||
917 | static int hpet_acpi_add(struct acpi_device *device) | |
918 | { | |
919 | acpi_status result; | |
920 | struct hpet_data data; | |
921 | ||
922 | memset(&data, 0, sizeof(data)); | |
923 | ||
924 | result = | |
925 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
926 | hpet_resources, &data); | |
927 | ||
928 | if (ACPI_FAILURE(result)) | |
929 | return -ENODEV; | |
930 | ||
931 | if (!data.hd_address || !data.hd_nirqs) { | |
bf9d8929 | 932 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
933 | return -ENODEV; |
934 | } | |
935 | ||
936 | return hpet_alloc(&data); | |
937 | } | |
938 | ||
939 | static int hpet_acpi_remove(struct acpi_device *device, int type) | |
940 | { | |
0aa366f3 | 941 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
942 | return -EINVAL; |
943 | } | |
944 | ||
1ba90e3a TR |
945 | static const struct acpi_device_id hpet_device_ids[] = { |
946 | {"PNP0103", 0}, | |
947 | {"", 0}, | |
948 | }; | |
949 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
950 | ||
1da177e4 LT |
951 | static struct acpi_driver hpet_acpi_driver = { |
952 | .name = "hpet", | |
1ba90e3a | 953 | .ids = hpet_device_ids, |
1da177e4 LT |
954 | .ops = { |
955 | .add = hpet_acpi_add, | |
956 | .remove = hpet_acpi_remove, | |
957 | }, | |
958 | }; | |
959 | ||
960 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
961 | ||
962 | static int __init hpet_init(void) | |
963 | { | |
964 | int result; | |
965 | ||
966 | result = misc_register(&hpet_misc); | |
967 | if (result < 0) | |
968 | return -ENODEV; | |
969 | ||
0b4d4147 | 970 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
971 | |
972 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
973 | if (result < 0) { | |
974 | if (sysctl_header) | |
975 | unregister_sysctl_table(sysctl_header); | |
976 | misc_deregister(&hpet_misc); | |
977 | return result; | |
978 | } | |
979 | ||
980 | return 0; | |
981 | } | |
982 | ||
983 | static void __exit hpet_exit(void) | |
984 | { | |
985 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
986 | ||
987 | if (sysctl_header) | |
988 | unregister_sysctl_table(sysctl_header); | |
989 | misc_deregister(&hpet_misc); | |
990 | ||
991 | return; | |
992 | } | |
993 | ||
994 | module_init(hpet_init); | |
995 | module_exit(hpet_exit); | |
996 | MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); | |
997 | MODULE_LICENSE("GPL"); |