[PATCH] hpet: use HPET physical addresses for dup. detection
[linux-2.6-block.git] / drivers / char / hpet.c
CommitLineData
1da177e4
LT
1/*
2 * Intel & MS High Precision Event Timer Implementation.
3 *
4 * Copyright (C) 2003 Intel Corporation
5 * Venki Pallipadi
6 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
7 * Bob Picco <robert.picco@hp.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
13
14#include <linux/config.h>
15#include <linux/interrupt.h>
16#include <linux/module.h>
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/miscdevice.h>
20#include <linux/major.h>
21#include <linux/ioport.h>
22#include <linux/fcntl.h>
23#include <linux/init.h>
24#include <linux/poll.h>
25#include <linux/proc_fs.h>
26#include <linux/spinlock.h>
27#include <linux/sysctl.h>
28#include <linux/wait.h>
29#include <linux/bcd.h>
30#include <linux/seq_file.h>
31#include <linux/bitops.h>
32
33#include <asm/current.h>
34#include <asm/uaccess.h>
35#include <asm/system.h>
36#include <asm/io.h>
37#include <asm/irq.h>
38#include <asm/div64.h>
39
40#include <linux/acpi.h>
41#include <acpi/acpi_bus.h>
42#include <linux/hpet.h>
43
44/*
45 * The High Precision Event Timer driver.
46 * This driver is closely modelled after the rtc.c driver.
96803820 47 * http://www.intel.com/hardwaredesign/hpetspec.htm
1da177e4
LT
48 */
49#define HPET_USER_FREQ (64)
50#define HPET_DRIFT (500)
51
757c4724
RD
52#define HPET_RANGE_SIZE 1024 /* from HPET spec */
53
642d30bb 54static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
1da177e4
LT
55
56/* A lock for concurrent access by app and isr hpet activity. */
57static DEFINE_SPINLOCK(hpet_lock);
58/* A lock for concurrent intermodule access to hpet and isr hpet activity. */
59static DEFINE_SPINLOCK(hpet_task_lock);
60
61#define HPET_DEV_NAME (7)
62
63struct hpet_dev {
64 struct hpets *hd_hpets;
65 struct hpet __iomem *hd_hpet;
66 struct hpet_timer __iomem *hd_timer;
67 unsigned long hd_ireqfreq;
68 unsigned long hd_irqdata;
69 wait_queue_head_t hd_waitqueue;
70 struct fasync_struct *hd_async_queue;
71 struct hpet_task *hd_task;
72 unsigned int hd_flags;
73 unsigned int hd_irq;
74 unsigned int hd_hdwirq;
75 char hd_name[HPET_DEV_NAME];
76};
77
78struct hpets {
79 struct hpets *hp_next;
80 struct hpet __iomem *hp_hpet;
81 unsigned long hp_hpet_phys;
82 struct time_interpolator *hp_interpolator;
ba3f213f 83 unsigned long long hp_tick_freq;
1da177e4
LT
84 unsigned long hp_delta;
85 unsigned int hp_ntimer;
86 unsigned int hp_which;
87 struct hpet_dev hp_dev[1];
88};
89
90static struct hpets *hpets;
91
92#define HPET_OPEN 0x0001
93#define HPET_IE 0x0002 /* interrupt enabled */
94#define HPET_PERIODIC 0x0004
0d290861 95#define HPET_SHARED_IRQ 0x0008
1da177e4
LT
96
97#if BITS_PER_LONG == 64
98#define write_counter(V, MC) writeq(V, MC)
99#define read_counter(MC) readq(MC)
100#else
101#define write_counter(V, MC) writel(V, MC)
102#define read_counter(MC) readl(MC)
103#endif
104
105#ifndef readq
887c27f3 106static inline unsigned long long readq(void __iomem *addr)
1da177e4
LT
107{
108 return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL);
109}
110#endif
111
112#ifndef writeq
887c27f3 113static inline void writeq(unsigned long long v, void __iomem *addr)
1da177e4
LT
114{
115 writel(v & 0xffffffff, addr);
116 writel(v >> 32, addr + 4);
117}
118#endif
119
120static irqreturn_t hpet_interrupt(int irq, void *data, struct pt_regs *regs)
121{
122 struct hpet_dev *devp;
123 unsigned long isr;
124
125 devp = data;
0d290861
CL
126 isr = 1 << (devp - devp->hd_hpets->hp_dev);
127
128 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
129 !(isr & readl(&devp->hd_hpet->hpet_isr)))
130 return IRQ_NONE;
1da177e4
LT
131
132 spin_lock(&hpet_lock);
133 devp->hd_irqdata++;
134
135 /*
136 * For non-periodic timers, increment the accumulator.
137 * This has the effect of treating non-periodic like periodic.
138 */
139 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
140 unsigned long m, t;
141
142 t = devp->hd_ireqfreq;
143 m = read_counter(&devp->hd_hpet->hpet_mc);
144 write_counter(t + m + devp->hd_hpets->hp_delta,
145 &devp->hd_timer->hpet_compare);
146 }
147
0d290861
CL
148 if (devp->hd_flags & HPET_SHARED_IRQ)
149 writel(isr, &devp->hd_hpet->hpet_isr);
1da177e4
LT
150 spin_unlock(&hpet_lock);
151
152 spin_lock(&hpet_task_lock);
153 if (devp->hd_task)
154 devp->hd_task->ht_func(devp->hd_task->ht_data);
155 spin_unlock(&hpet_task_lock);
156
157 wake_up_interruptible(&devp->hd_waitqueue);
158
159 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
160
161 return IRQ_HANDLED;
162}
163
164static int hpet_open(struct inode *inode, struct file *file)
165{
166 struct hpet_dev *devp;
167 struct hpets *hpetp;
168 int i;
169
170 if (file->f_mode & FMODE_WRITE)
171 return -EINVAL;
172
173 spin_lock_irq(&hpet_lock);
174
175 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
176 for (i = 0; i < hpetp->hp_ntimer; i++)
177 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN
178 || hpetp->hp_dev[i].hd_task)
179 continue;
180 else {
181 devp = &hpetp->hp_dev[i];
182 break;
183 }
184
185 if (!devp) {
186 spin_unlock_irq(&hpet_lock);
187 return -EBUSY;
188 }
189
190 file->private_data = devp;
191 devp->hd_irqdata = 0;
192 devp->hd_flags |= HPET_OPEN;
193 spin_unlock_irq(&hpet_lock);
194
195 return 0;
196}
197
198static ssize_t
199hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
200{
201 DECLARE_WAITQUEUE(wait, current);
202 unsigned long data;
203 ssize_t retval;
204 struct hpet_dev *devp;
205
206 devp = file->private_data;
207 if (!devp->hd_ireqfreq)
208 return -EIO;
209
210 if (count < sizeof(unsigned long))
211 return -EINVAL;
212
213 add_wait_queue(&devp->hd_waitqueue, &wait);
214
215 for ( ; ; ) {
216 set_current_state(TASK_INTERRUPTIBLE);
217
218 spin_lock_irq(&hpet_lock);
219 data = devp->hd_irqdata;
220 devp->hd_irqdata = 0;
221 spin_unlock_irq(&hpet_lock);
222
223 if (data)
224 break;
225 else if (file->f_flags & O_NONBLOCK) {
226 retval = -EAGAIN;
227 goto out;
228 } else if (signal_pending(current)) {
229 retval = -ERESTARTSYS;
230 goto out;
231 }
232 schedule();
233 }
234
235 retval = put_user(data, (unsigned long __user *)buf);
236 if (!retval)
237 retval = sizeof(unsigned long);
238out:
239 __set_current_state(TASK_RUNNING);
240 remove_wait_queue(&devp->hd_waitqueue, &wait);
241
242 return retval;
243}
244
245static unsigned int hpet_poll(struct file *file, poll_table * wait)
246{
247 unsigned long v;
248 struct hpet_dev *devp;
249
250 devp = file->private_data;
251
252 if (!devp->hd_ireqfreq)
253 return 0;
254
255 poll_wait(file, &devp->hd_waitqueue, wait);
256
257 spin_lock_irq(&hpet_lock);
258 v = devp->hd_irqdata;
259 spin_unlock_irq(&hpet_lock);
260
261 if (v != 0)
262 return POLLIN | POLLRDNORM;
263
264 return 0;
265}
266
267static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
268{
269#ifdef CONFIG_HPET_MMAP
270 struct hpet_dev *devp;
271 unsigned long addr;
272
273 if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff)
274 return -EINVAL;
275
276 devp = file->private_data;
277 addr = devp->hd_hpets->hp_hpet_phys;
278
279 if (addr & (PAGE_SIZE - 1))
280 return -ENOSYS;
281
282 vma->vm_flags |= VM_IO;
283 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
1da177e4
LT
284
285 if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT,
286 PAGE_SIZE, vma->vm_page_prot)) {
287 printk(KERN_ERR "remap_pfn_range failed in hpet.c\n");
288 return -EAGAIN;
289 }
290
291 return 0;
292#else
293 return -ENOSYS;
294#endif
295}
296
297static int hpet_fasync(int fd, struct file *file, int on)
298{
299 struct hpet_dev *devp;
300
301 devp = file->private_data;
302
303 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
304 return 0;
305 else
306 return -EIO;
307}
308
309static int hpet_release(struct inode *inode, struct file *file)
310{
311 struct hpet_dev *devp;
312 struct hpet_timer __iomem *timer;
313 int irq = 0;
314
315 devp = file->private_data;
316 timer = devp->hd_timer;
317
318 spin_lock_irq(&hpet_lock);
319
320 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
321 &timer->hpet_config);
322
323 irq = devp->hd_irq;
324 devp->hd_irq = 0;
325
326 devp->hd_ireqfreq = 0;
327
328 if (devp->hd_flags & HPET_PERIODIC
329 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
330 unsigned long v;
331
332 v = readq(&timer->hpet_config);
333 v ^= Tn_TYPE_CNF_MASK;
334 writeq(v, &timer->hpet_config);
335 }
336
337 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
338 spin_unlock_irq(&hpet_lock);
339
340 if (irq)
341 free_irq(irq, devp);
342
343 if (file->f_flags & FASYNC)
344 hpet_fasync(-1, file, 0);
345
346 file->private_data = NULL;
347 return 0;
348}
349
350static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int);
351
352static int
353hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd,
354 unsigned long arg)
355{
356 struct hpet_dev *devp;
357
358 devp = file->private_data;
359 return hpet_ioctl_common(devp, cmd, arg, 0);
360}
361
362static int hpet_ioctl_ieon(struct hpet_dev *devp)
363{
364 struct hpet_timer __iomem *timer;
365 struct hpet __iomem *hpet;
366 struct hpets *hpetp;
367 int irq;
368 unsigned long g, v, t, m;
369 unsigned long flags, isr;
370
371 timer = devp->hd_timer;
372 hpet = devp->hd_hpet;
373 hpetp = devp->hd_hpets;
374
9090e6db
CL
375 if (!devp->hd_ireqfreq)
376 return -EIO;
377
1da177e4
LT
378 spin_lock_irq(&hpet_lock);
379
380 if (devp->hd_flags & HPET_IE) {
381 spin_unlock_irq(&hpet_lock);
382 return -EBUSY;
383 }
384
385 devp->hd_flags |= HPET_IE;
0d290861
CL
386
387 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
388 devp->hd_flags |= HPET_SHARED_IRQ;
1da177e4
LT
389 spin_unlock_irq(&hpet_lock);
390
1da177e4
LT
391 irq = devp->hd_hdwirq;
392
393 if (irq) {
0d290861 394 unsigned long irq_flags;
1da177e4 395
0d290861
CL
396 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
397 irq_flags = devp->hd_flags & HPET_SHARED_IRQ
398 ? SA_SHIRQ : SA_INTERRUPT;
399 if (request_irq(irq, hpet_interrupt, irq_flags,
400 devp->hd_name, (void *)devp)) {
1da177e4
LT
401 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
402 irq = 0;
403 }
404 }
405
406 if (irq == 0) {
407 spin_lock_irq(&hpet_lock);
408 devp->hd_flags ^= HPET_IE;
409 spin_unlock_irq(&hpet_lock);
410 return -EIO;
411 }
412
413 devp->hd_irq = irq;
414 t = devp->hd_ireqfreq;
415 v = readq(&timer->hpet_config);
416 g = v | Tn_INT_ENB_CNF_MASK;
417
418 if (devp->hd_flags & HPET_PERIODIC) {
419 write_counter(t, &timer->hpet_compare);
420 g |= Tn_TYPE_CNF_MASK;
421 v |= Tn_TYPE_CNF_MASK;
422 writeq(v, &timer->hpet_config);
423 v |= Tn_VAL_SET_CNF_MASK;
424 writeq(v, &timer->hpet_config);
425 local_irq_save(flags);
426 m = read_counter(&hpet->hpet_mc);
427 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
428 } else {
429 local_irq_save(flags);
430 m = read_counter(&hpet->hpet_mc);
431 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
432 }
433
0d290861 434 if (devp->hd_flags & HPET_SHARED_IRQ) {
3d5640d1 435 isr = 1 << (devp - devp->hd_hpets->hp_dev);
0d290861
CL
436 writel(isr, &hpet->hpet_isr);
437 }
1da177e4
LT
438 writeq(g, &timer->hpet_config);
439 local_irq_restore(flags);
440
441 return 0;
442}
443
ba3f213f
CL
444/* converts Hz to number of timer ticks */
445static inline unsigned long hpet_time_div(struct hpets *hpets,
446 unsigned long dis)
1da177e4 447{
ba3f213f 448 unsigned long long m;
1da177e4 449
ba3f213f 450 m = hpets->hp_tick_freq + (dis >> 1);
1da177e4 451 do_div(m, dis);
1da177e4
LT
452 return (unsigned long)m;
453}
454
455static int
456hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel)
457{
458 struct hpet_timer __iomem *timer;
459 struct hpet __iomem *hpet;
460 struct hpets *hpetp;
461 int err;
462 unsigned long v;
463
464 switch (cmd) {
465 case HPET_IE_OFF:
466 case HPET_INFO:
467 case HPET_EPI:
468 case HPET_DPI:
469 case HPET_IRQFREQ:
470 timer = devp->hd_timer;
471 hpet = devp->hd_hpet;
472 hpetp = devp->hd_hpets;
473 break;
474 case HPET_IE_ON:
475 return hpet_ioctl_ieon(devp);
476 default:
477 return -EINVAL;
478 }
479
480 err = 0;
481
482 switch (cmd) {
483 case HPET_IE_OFF:
484 if ((devp->hd_flags & HPET_IE) == 0)
485 break;
486 v = readq(&timer->hpet_config);
487 v &= ~Tn_INT_ENB_CNF_MASK;
488 writeq(v, &timer->hpet_config);
489 if (devp->hd_irq) {
490 free_irq(devp->hd_irq, devp);
491 devp->hd_irq = 0;
492 }
493 devp->hd_flags ^= HPET_IE;
494 break;
495 case HPET_INFO:
496 {
497 struct hpet_info info;
498
af95eade
CL
499 if (devp->hd_ireqfreq)
500 info.hi_ireqfreq =
501 hpet_time_div(hpetp, devp->hd_ireqfreq);
502 else
503 info.hi_ireqfreq = 0;
1da177e4
LT
504 info.hi_flags =
505 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
c860ed9f
CL
506 info.hi_hpet = hpetp->hp_which;
507 info.hi_timer = devp - hpetp->hp_dev;
8e8505be
CL
508 if (kernel)
509 memcpy((void *)arg, &info, sizeof(info));
510 else
511 if (copy_to_user((void __user *)arg, &info,
512 sizeof(info)))
513 err = -EFAULT;
1da177e4
LT
514 break;
515 }
516 case HPET_EPI:
517 v = readq(&timer->hpet_config);
518 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
519 err = -ENXIO;
520 break;
521 }
522 devp->hd_flags |= HPET_PERIODIC;
523 break;
524 case HPET_DPI:
525 v = readq(&timer->hpet_config);
526 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
527 err = -ENXIO;
528 break;
529 }
530 if (devp->hd_flags & HPET_PERIODIC &&
531 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
532 v = readq(&timer->hpet_config);
533 v ^= Tn_TYPE_CNF_MASK;
534 writeq(v, &timer->hpet_config);
535 }
536 devp->hd_flags &= ~HPET_PERIODIC;
537 break;
538 case HPET_IRQFREQ:
539 if (!kernel && (arg > hpet_max_freq) &&
540 !capable(CAP_SYS_RESOURCE)) {
541 err = -EACCES;
542 break;
543 }
544
189e2dd1 545 if (!arg) {
1da177e4
LT
546 err = -EINVAL;
547 break;
548 }
549
ba3f213f 550 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
1da177e4
LT
551 }
552
553 return err;
554}
555
556static struct file_operations hpet_fops = {
557 .owner = THIS_MODULE,
558 .llseek = no_llseek,
559 .read = hpet_read,
560 .poll = hpet_poll,
561 .ioctl = hpet_ioctl,
562 .open = hpet_open,
563 .release = hpet_release,
564 .fasync = hpet_fasync,
565 .mmap = hpet_mmap,
566};
567
568EXPORT_SYMBOL(hpet_alloc);
569EXPORT_SYMBOL(hpet_register);
570EXPORT_SYMBOL(hpet_unregister);
571EXPORT_SYMBOL(hpet_control);
572
573int hpet_register(struct hpet_task *tp, int periodic)
574{
575 unsigned int i;
576 u64 mask;
577 struct hpet_timer __iomem *timer;
578 struct hpet_dev *devp;
579 struct hpets *hpetp;
580
581 switch (periodic) {
582 case 1:
583 mask = Tn_PER_INT_CAP_MASK;
584 break;
585 case 0:
586 mask = 0;
587 break;
588 default:
589 return -EINVAL;
590 }
591
7522e4ec
CL
592 tp->ht_opaque = NULL;
593
1da177e4
LT
594 spin_lock_irq(&hpet_task_lock);
595 spin_lock(&hpet_lock);
596
597 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
598 for (timer = hpetp->hp_hpet->hpet_timers, i = 0;
599 i < hpetp->hp_ntimer; i++, timer++) {
600 if ((readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK)
601 != mask)
602 continue;
603
604 devp = &hpetp->hp_dev[i];
605
606 if (devp->hd_flags & HPET_OPEN || devp->hd_task) {
607 devp = NULL;
608 continue;
609 }
610
611 tp->ht_opaque = devp;
612 devp->hd_task = tp;
613 break;
614 }
615
616 spin_unlock(&hpet_lock);
617 spin_unlock_irq(&hpet_task_lock);
618
619 if (tp->ht_opaque)
620 return 0;
621 else
622 return -EBUSY;
623}
624
625static inline int hpet_tpcheck(struct hpet_task *tp)
626{
627 struct hpet_dev *devp;
628 struct hpets *hpetp;
629
630 devp = tp->ht_opaque;
631
632 if (!devp)
633 return -ENXIO;
634
635 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
636 if (devp >= hpetp->hp_dev
637 && devp < (hpetp->hp_dev + hpetp->hp_ntimer)
638 && devp->hd_hpet == hpetp->hp_hpet)
639 return 0;
640
641 return -ENXIO;
642}
643
644int hpet_unregister(struct hpet_task *tp)
645{
646 struct hpet_dev *devp;
647 struct hpet_timer __iomem *timer;
648 int err;
649
650 if ((err = hpet_tpcheck(tp)))
651 return err;
652
653 spin_lock_irq(&hpet_task_lock);
654 spin_lock(&hpet_lock);
655
656 devp = tp->ht_opaque;
657 if (devp->hd_task != tp) {
658 spin_unlock(&hpet_lock);
659 spin_unlock_irq(&hpet_task_lock);
660 return -ENXIO;
661 }
662
663 timer = devp->hd_timer;
664 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
665 &timer->hpet_config);
666 devp->hd_flags &= ~(HPET_IE | HPET_PERIODIC);
667 devp->hd_task = NULL;
668 spin_unlock(&hpet_lock);
669 spin_unlock_irq(&hpet_task_lock);
670
671 return 0;
672}
673
674int hpet_control(struct hpet_task *tp, unsigned int cmd, unsigned long arg)
675{
676 struct hpet_dev *devp;
677 int err;
678
679 if ((err = hpet_tpcheck(tp)))
680 return err;
681
682 spin_lock_irq(&hpet_lock);
683 devp = tp->ht_opaque;
684 if (devp->hd_task != tp) {
685 spin_unlock_irq(&hpet_lock);
686 return -ENXIO;
687 }
688 spin_unlock_irq(&hpet_lock);
689 return hpet_ioctl_common(devp, cmd, arg, 1);
690}
691
692static ctl_table hpet_table[] = {
693 {
694 .ctl_name = 1,
695 .procname = "max-user-freq",
696 .data = &hpet_max_freq,
697 .maxlen = sizeof(int),
698 .mode = 0644,
699 .proc_handler = &proc_dointvec,
700 },
701 {.ctl_name = 0}
702};
703
704static ctl_table hpet_root[] = {
705 {
706 .ctl_name = 1,
707 .procname = "hpet",
708 .maxlen = 0,
709 .mode = 0555,
710 .child = hpet_table,
711 },
712 {.ctl_name = 0}
713};
714
715static ctl_table dev_root[] = {
716 {
717 .ctl_name = CTL_DEV,
718 .procname = "dev",
719 .maxlen = 0,
720 .mode = 0555,
721 .child = hpet_root,
722 },
723 {.ctl_name = 0}
724};
725
726static struct ctl_table_header *sysctl_header;
727
728static void hpet_register_interpolator(struct hpets *hpetp)
729{
730#ifdef CONFIG_TIME_INTERPOLATION
731 struct time_interpolator *ti;
732
733 ti = kmalloc(sizeof(*ti), GFP_KERNEL);
734 if (!ti)
735 return;
736
737 memset(ti, 0, sizeof(*ti));
738 ti->source = TIME_SOURCE_MMIO64;
739 ti->shift = 10;
740 ti->addr = &hpetp->hp_hpet->hpet_mc;
ba3f213f 741 ti->frequency = hpetp->hp_tick_freq;
96803820 742 ti->drift = HPET_DRIFT;
1da177e4
LT
743 ti->mask = -1;
744
745 hpetp->hp_interpolator = ti;
746 register_time_interpolator(ti);
747#endif
748}
749
750/*
751 * Adjustment for when arming the timer with
752 * initial conditions. That is, main counter
753 * ticks expired before interrupts are enabled.
754 */
755#define TICK_CALIBRATE (1000UL)
756
757static unsigned long hpet_calibrate(struct hpets *hpetp)
758{
759 struct hpet_timer __iomem *timer = NULL;
760 unsigned long t, m, count, i, flags, start;
761 struct hpet_dev *devp;
762 int j;
763 struct hpet __iomem *hpet;
764
765 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
766 if ((devp->hd_flags & HPET_OPEN) == 0) {
767 timer = devp->hd_timer;
768 break;
769 }
770
771 if (!timer)
772 return 0;
773
3d5640d1 774 hpet = hpetp->hp_hpet;
1da177e4
LT
775 t = read_counter(&timer->hpet_compare);
776
777 i = 0;
ba3f213f 778 count = hpet_time_div(hpetp, TICK_CALIBRATE);
1da177e4
LT
779
780 local_irq_save(flags);
781
782 start = read_counter(&hpet->hpet_mc);
783
784 do {
785 m = read_counter(&hpet->hpet_mc);
786 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
787 } while (i++, (m - start) < count);
788
789 local_irq_restore(flags);
790
791 return (m - start) / i;
792}
793
794int hpet_alloc(struct hpet_data *hdp)
795{
796 u64 cap, mcfg;
797 struct hpet_dev *devp;
798 u32 i, ntimer;
799 struct hpets *hpetp;
800 size_t siz;
801 struct hpet __iomem *hpet;
802 static struct hpets *last = (struct hpets *)0;
318db8f0 803 unsigned long period;
ba3f213f 804 unsigned long long temp;
1da177e4
LT
805
806 /*
807 * hpet_alloc can be called by platform dependent code.
808 * if platform dependent code has allocated the hpet
809 * ACPI also reports hpet, then we catch it here.
810 */
811 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
b6ab1262
RD
812 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) {
813 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
814 __FUNCTION__);
1da177e4 815 return 0;
b6ab1262 816 }
1da177e4
LT
817
818 siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) *
819 sizeof(struct hpet_dev));
820
821 hpetp = kmalloc(siz, GFP_KERNEL);
822
823 if (!hpetp)
824 return -ENOMEM;
825
826 memset(hpetp, 0, siz);
827
828 hpetp->hp_which = hpet_nhpet++;
829 hpetp->hp_hpet = hdp->hd_address;
830 hpetp->hp_hpet_phys = hdp->hd_phys_address;
831
832 hpetp->hp_ntimer = hdp->hd_nirqs;
833
834 for (i = 0; i < hdp->hd_nirqs; i++)
835 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
836
837 hpet = hpetp->hp_hpet;
838
839 cap = readq(&hpet->hpet_cap);
840
841 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
842
843 if (hpetp->hp_ntimer != ntimer) {
844 printk(KERN_WARNING "hpet: number irqs doesn't agree"
845 " with number of timers\n");
846 kfree(hpetp);
847 return -ENODEV;
848 }
849
850 if (last)
851 last->hp_next = hpetp;
852 else
853 hpets = hpetp;
854
855 last = hpetp;
856
ba3f213f
CL
857 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
858 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
859 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
860 temp += period >> 1; /* round */
861 do_div(temp, period);
862 hpetp->hp_tick_freq = temp; /* ticks per second */
1da177e4 863
b6ab1262
RD
864 printk(KERN_INFO "hpet%d: at MMIO 0x%lx (virtual 0x%p), IRQ%s",
865 hpetp->hp_which, hdp->hd_phys_address, hdp->hd_address,
1da177e4
LT
866 hpetp->hp_ntimer > 1 ? "s" : "");
867 for (i = 0; i < hpetp->hp_ntimer; i++)
868 printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
869 printk("\n");
870
318db8f0
CL
871 printk(KERN_INFO "hpet%u: %u %d-bit timers, %Lu Hz\n",
872 hpetp->hp_which, hpetp->hp_ntimer,
873 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, hpetp->hp_tick_freq);
1da177e4
LT
874
875 mcfg = readq(&hpet->hpet_config);
876 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
877 write_counter(0L, &hpet->hpet_mc);
878 mcfg |= HPET_ENABLE_CNF_MASK;
879 writeq(mcfg, &hpet->hpet_config);
880 }
881
642d30bb 882 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
1da177e4
LT
883 struct hpet_timer __iomem *timer;
884
885 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
1da177e4
LT
886
887 devp->hd_hpets = hpetp;
888 devp->hd_hpet = hpet;
889 devp->hd_timer = timer;
890
891 /*
892 * If the timer was reserved by platform code,
893 * then make timer unavailable for opens.
894 */
895 if (hdp->hd_state & (1 << i)) {
896 devp->hd_flags = HPET_OPEN;
897 continue;
898 }
899
900 init_waitqueue_head(&devp->hd_waitqueue);
901 }
902
903 hpetp->hp_delta = hpet_calibrate(hpetp);
904 hpet_register_interpolator(hpetp);
905
906 return 0;
907}
908
909static acpi_status hpet_resources(struct acpi_resource *res, void *data)
910{
911 struct hpet_data *hdp;
912 acpi_status status;
913 struct acpi_resource_address64 addr;
914 struct hpets *hpetp;
915
916 hdp = data;
917
918 status = acpi_resource_to_address64(res, &addr);
919
920 if (ACPI_SUCCESS(status)) {
921 unsigned long size;
922
923 size = addr.max_address_range - addr.min_address_range + 1;
924 hdp->hd_phys_address = addr.min_address_range;
925 hdp->hd_address = ioremap(addr.min_address_range, size);
926
927 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
b6ab1262
RD
928 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) {
929 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
930 __FUNCTION__, hdp->hd_phys_address);
931 iounmap(hdp->hd_address);
1da177e4 932 return -EBUSY;
b6ab1262 933 }
757c4724
RD
934 } else if (res->id == ACPI_RSTYPE_FIXED_MEM32) {
935 struct acpi_resource_fixed_mem32 *fixmem32;
936
937 fixmem32 = &res->data.fixed_memory32;
938 if (!fixmem32)
939 return -EINVAL;
940
941 hdp->hd_phys_address = fixmem32->range_base_address;
942 hdp->hd_address = ioremap(fixmem32->range_base_address,
943 HPET_RANGE_SIZE);
944
945 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
b6ab1262
RD
946 if (hpetp->hp_hpet_phys == hdp->hd_phys_address) {
947 printk(KERN_DEBUG "%s: 0x%lx is busy\n",
948 __FUNCTION__, hdp->hd_phys_address);
949 iounmap(hdp->hd_address);
757c4724
RD
950 return -EBUSY;
951 }
1da177e4
LT
952 } else if (res->id == ACPI_RSTYPE_EXT_IRQ) {
953 struct acpi_resource_ext_irq *irqp;
954 int i;
955
956 irqp = &res->data.extended_irq;
957
958 if (irqp->number_of_interrupts > 0) {
959 hdp->hd_nirqs = irqp->number_of_interrupts;
960
a9bd53bc
KK
961 for (i = 0; i < hdp->hd_nirqs; i++) {
962 int rc =
1da177e4
LT
963 acpi_register_gsi(irqp->interrupts[i],
964 irqp->edge_level,
965 irqp->active_high_low);
a9bd53bc
KK
966 if (rc < 0)
967 return AE_ERROR;
968 hdp->hd_irq[i] = rc;
969 }
1da177e4
LT
970 }
971 }
972
973 return AE_OK;
974}
975
976static int hpet_acpi_add(struct acpi_device *device)
977{
978 acpi_status result;
979 struct hpet_data data;
980
981 memset(&data, 0, sizeof(data));
982
983 result =
984 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
985 hpet_resources, &data);
986
987 if (ACPI_FAILURE(result))
988 return -ENODEV;
989
990 if (!data.hd_address || !data.hd_nirqs) {
991 printk("%s: no address or irqs in _CRS\n", __FUNCTION__);
992 return -ENODEV;
993 }
994
995 return hpet_alloc(&data);
996}
997
998static int hpet_acpi_remove(struct acpi_device *device, int type)
999{
1000 /* XXX need to unregister interpolator, dealloc mem, etc */
1001 return -EINVAL;
1002}
1003
1004static struct acpi_driver hpet_acpi_driver = {
1005 .name = "hpet",
1006 .ids = "PNP0103",
1007 .ops = {
1008 .add = hpet_acpi_add,
1009 .remove = hpet_acpi_remove,
1010 },
1011};
1012
1013static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1014
1015static int __init hpet_init(void)
1016{
1017 int result;
1018
1019 result = misc_register(&hpet_misc);
1020 if (result < 0)
1021 return -ENODEV;
1022
1023 sysctl_header = register_sysctl_table(dev_root, 0);
1024
1025 result = acpi_bus_register_driver(&hpet_acpi_driver);
1026 if (result < 0) {
1027 if (sysctl_header)
1028 unregister_sysctl_table(sysctl_header);
1029 misc_deregister(&hpet_misc);
1030 return result;
1031 }
1032
1033 return 0;
1034}
1035
1036static void __exit hpet_exit(void)
1037{
1038 acpi_bus_unregister_driver(&hpet_acpi_driver);
1039
1040 if (sysctl_header)
1041 unregister_sysctl_table(sysctl_header);
1042 misc_deregister(&hpet_misc);
1043
1044 return;
1045}
1046
1047module_init(hpet_init);
1048module_exit(hpet_exit);
1049MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1050MODULE_LICENSE("GPL");