Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | * Intel & MS High Precision Event Timer Implementation. | |
3 | * | |
4 | * Copyright (C) 2003 Intel Corporation | |
5 | * Venki Pallipadi | |
6 | * (c) Copyright 2004 Hewlett-Packard Development Company, L.P. | |
7 | * Bob Picco <robert.picco@hp.com> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License version 2 as | |
11 | * published by the Free Software Foundation. | |
12 | */ | |
13 | ||
1da177e4 LT |
14 | #include <linux/interrupt.h> |
15 | #include <linux/module.h> | |
16 | #include <linux/kernel.h> | |
48b81880 | 17 | #include <linux/smp_lock.h> |
1da177e4 LT |
18 | #include <linux/types.h> |
19 | #include <linux/miscdevice.h> | |
20 | #include <linux/major.h> | |
21 | #include <linux/ioport.h> | |
22 | #include <linux/fcntl.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/poll.h> | |
f23f6e08 | 25 | #include <linux/mm.h> |
1da177e4 LT |
26 | #include <linux/proc_fs.h> |
27 | #include <linux/spinlock.h> | |
28 | #include <linux/sysctl.h> | |
29 | #include <linux/wait.h> | |
30 | #include <linux/bcd.h> | |
31 | #include <linux/seq_file.h> | |
32 | #include <linux/bitops.h> | |
0aa366f3 | 33 | #include <linux/clocksource.h> |
1da177e4 LT |
34 | |
35 | #include <asm/current.h> | |
36 | #include <asm/uaccess.h> | |
37 | #include <asm/system.h> | |
38 | #include <asm/io.h> | |
39 | #include <asm/irq.h> | |
40 | #include <asm/div64.h> | |
41 | ||
42 | #include <linux/acpi.h> | |
43 | #include <acpi/acpi_bus.h> | |
44 | #include <linux/hpet.h> | |
45 | ||
46 | /* | |
47 | * The High Precision Event Timer driver. | |
48 | * This driver is closely modelled after the rtc.c driver. | |
e45f2c07 | 49 | * http://www.intel.com/hardwaredesign/hpetspec_1.pdf |
1da177e4 LT |
50 | */ |
51 | #define HPET_USER_FREQ (64) | |
52 | #define HPET_DRIFT (500) | |
53 | ||
757c4724 RD |
54 | #define HPET_RANGE_SIZE 1024 /* from HPET spec */ |
55 | ||
64a76f66 DB |
56 | |
57 | /* WARNING -- don't get confused. These macros are never used | |
58 | * to write the (single) counter, and rarely to read it. | |
59 | * They're badly named; to fix, someday. | |
60 | */ | |
0aa366f3 TL |
61 | #if BITS_PER_LONG == 64 |
62 | #define write_counter(V, MC) writeq(V, MC) | |
63 | #define read_counter(MC) readq(MC) | |
64 | #else | |
65 | #define write_counter(V, MC) writel(V, MC) | |
66 | #define read_counter(MC) readl(MC) | |
67 | #endif | |
68 | ||
642d30bb | 69 | static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ; |
1da177e4 | 70 | |
3dffec45 ÇO |
71 | /* This clocksource driver currently only works on ia64 */ |
72 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
73 | static void __iomem *hpet_mctr; |
74 | ||
8e19608e | 75 | static cycle_t read_hpet(struct clocksource *cs) |
0aa366f3 TL |
76 | { |
77 | return (cycle_t)read_counter((void __iomem *)hpet_mctr); | |
78 | } | |
79 | ||
80 | static struct clocksource clocksource_hpet = { | |
81 | .name = "hpet", | |
82 | .rating = 250, | |
83 | .read = read_hpet, | |
712aaa1c | 84 | .mask = CLOCKSOURCE_MASK(64), |
64a76f66 | 85 | .mult = 0, /* to be calculated */ |
0aa366f3 TL |
86 | .shift = 10, |
87 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | |
88 | }; | |
89 | static struct clocksource *hpet_clocksource; | |
3dffec45 | 90 | #endif |
0aa366f3 | 91 | |
1da177e4 LT |
92 | /* A lock for concurrent access by app and isr hpet activity. */ |
93 | static DEFINE_SPINLOCK(hpet_lock); | |
1da177e4 LT |
94 | |
95 | #define HPET_DEV_NAME (7) | |
96 | ||
97 | struct hpet_dev { | |
98 | struct hpets *hd_hpets; | |
99 | struct hpet __iomem *hd_hpet; | |
100 | struct hpet_timer __iomem *hd_timer; | |
101 | unsigned long hd_ireqfreq; | |
102 | unsigned long hd_irqdata; | |
103 | wait_queue_head_t hd_waitqueue; | |
104 | struct fasync_struct *hd_async_queue; | |
1da177e4 LT |
105 | unsigned int hd_flags; |
106 | unsigned int hd_irq; | |
107 | unsigned int hd_hdwirq; | |
108 | char hd_name[HPET_DEV_NAME]; | |
109 | }; | |
110 | ||
111 | struct hpets { | |
112 | struct hpets *hp_next; | |
113 | struct hpet __iomem *hp_hpet; | |
114 | unsigned long hp_hpet_phys; | |
0aa366f3 | 115 | struct clocksource *hp_clocksource; |
ba3f213f | 116 | unsigned long long hp_tick_freq; |
1da177e4 LT |
117 | unsigned long hp_delta; |
118 | unsigned int hp_ntimer; | |
119 | unsigned int hp_which; | |
120 | struct hpet_dev hp_dev[1]; | |
121 | }; | |
122 | ||
123 | static struct hpets *hpets; | |
124 | ||
125 | #define HPET_OPEN 0x0001 | |
126 | #define HPET_IE 0x0002 /* interrupt enabled */ | |
127 | #define HPET_PERIODIC 0x0004 | |
0d290861 | 128 | #define HPET_SHARED_IRQ 0x0008 |
1da177e4 | 129 | |
1da177e4 LT |
130 | |
131 | #ifndef readq | |
887c27f3 | 132 | static inline unsigned long long readq(void __iomem *addr) |
1da177e4 LT |
133 | { |
134 | return readl(addr) | (((unsigned long long)readl(addr + 4)) << 32LL); | |
135 | } | |
136 | #endif | |
137 | ||
138 | #ifndef writeq | |
887c27f3 | 139 | static inline void writeq(unsigned long long v, void __iomem *addr) |
1da177e4 LT |
140 | { |
141 | writel(v & 0xffffffff, addr); | |
142 | writel(v >> 32, addr + 4); | |
143 | } | |
144 | #endif | |
145 | ||
7d12e780 | 146 | static irqreturn_t hpet_interrupt(int irq, void *data) |
1da177e4 LT |
147 | { |
148 | struct hpet_dev *devp; | |
149 | unsigned long isr; | |
150 | ||
151 | devp = data; | |
0d290861 CL |
152 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
153 | ||
154 | if ((devp->hd_flags & HPET_SHARED_IRQ) && | |
155 | !(isr & readl(&devp->hd_hpet->hpet_isr))) | |
156 | return IRQ_NONE; | |
1da177e4 LT |
157 | |
158 | spin_lock(&hpet_lock); | |
159 | devp->hd_irqdata++; | |
160 | ||
161 | /* | |
162 | * For non-periodic timers, increment the accumulator. | |
163 | * This has the effect of treating non-periodic like periodic. | |
164 | */ | |
165 | if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) { | |
166 | unsigned long m, t; | |
167 | ||
168 | t = devp->hd_ireqfreq; | |
ae21cf92 NC |
169 | m = read_counter(&devp->hd_timer->hpet_compare); |
170 | write_counter(t + m, &devp->hd_timer->hpet_compare); | |
1da177e4 LT |
171 | } |
172 | ||
0d290861 CL |
173 | if (devp->hd_flags & HPET_SHARED_IRQ) |
174 | writel(isr, &devp->hd_hpet->hpet_isr); | |
1da177e4 LT |
175 | spin_unlock(&hpet_lock); |
176 | ||
1da177e4 LT |
177 | wake_up_interruptible(&devp->hd_waitqueue); |
178 | ||
179 | kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN); | |
180 | ||
181 | return IRQ_HANDLED; | |
182 | } | |
183 | ||
70ef6d59 KH |
184 | static void hpet_timer_set_irq(struct hpet_dev *devp) |
185 | { | |
186 | unsigned long v; | |
187 | int irq, gsi; | |
188 | struct hpet_timer __iomem *timer; | |
189 | ||
190 | spin_lock_irq(&hpet_lock); | |
191 | if (devp->hd_hdwirq) { | |
192 | spin_unlock_irq(&hpet_lock); | |
193 | return; | |
194 | } | |
195 | ||
196 | timer = devp->hd_timer; | |
197 | ||
198 | /* we prefer level triggered mode */ | |
199 | v = readl(&timer->hpet_config); | |
200 | if (!(v & Tn_INT_TYPE_CNF_MASK)) { | |
201 | v |= Tn_INT_TYPE_CNF_MASK; | |
202 | writel(v, &timer->hpet_config); | |
203 | } | |
204 | spin_unlock_irq(&hpet_lock); | |
205 | ||
206 | v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >> | |
207 | Tn_INT_ROUTE_CAP_SHIFT; | |
208 | ||
209 | /* | |
210 | * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by | |
211 | * legacy device. In IO APIC mode, we skip all the legacy IRQS. | |
212 | */ | |
213 | if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) | |
214 | v &= ~0xf3df; | |
215 | else | |
216 | v &= ~0xffff; | |
217 | ||
218 | for (irq = find_first_bit(&v, HPET_MAX_IRQ); irq < HPET_MAX_IRQ; | |
219 | irq = find_next_bit(&v, HPET_MAX_IRQ, 1 + irq)) { | |
220 | ||
1f45f562 | 221 | if (irq >= nr_irqs) { |
70ef6d59 KH |
222 | irq = HPET_MAX_IRQ; |
223 | break; | |
224 | } | |
225 | ||
a2f809b0 | 226 | gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE, |
70ef6d59 KH |
227 | ACPI_ACTIVE_LOW); |
228 | if (gsi > 0) | |
229 | break; | |
230 | ||
231 | /* FIXME: Setup interrupt source table */ | |
232 | } | |
233 | ||
234 | if (irq < HPET_MAX_IRQ) { | |
235 | spin_lock_irq(&hpet_lock); | |
236 | v = readl(&timer->hpet_config); | |
237 | v |= irq << Tn_INT_ROUTE_CNF_SHIFT; | |
238 | writel(v, &timer->hpet_config); | |
239 | devp->hd_hdwirq = gsi; | |
240 | spin_unlock_irq(&hpet_lock); | |
241 | } | |
242 | return; | |
243 | } | |
244 | ||
1da177e4 LT |
245 | static int hpet_open(struct inode *inode, struct file *file) |
246 | { | |
247 | struct hpet_dev *devp; | |
248 | struct hpets *hpetp; | |
249 | int i; | |
250 | ||
251 | if (file->f_mode & FMODE_WRITE) | |
252 | return -EINVAL; | |
253 | ||
48b81880 | 254 | lock_kernel(); |
1da177e4 LT |
255 | spin_lock_irq(&hpet_lock); |
256 | ||
257 | for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next) | |
258 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
64a76f66 | 259 | if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) |
1da177e4 LT |
260 | continue; |
261 | else { | |
262 | devp = &hpetp->hp_dev[i]; | |
263 | break; | |
264 | } | |
265 | ||
266 | if (!devp) { | |
267 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 268 | unlock_kernel(); |
1da177e4 LT |
269 | return -EBUSY; |
270 | } | |
271 | ||
272 | file->private_data = devp; | |
273 | devp->hd_irqdata = 0; | |
274 | devp->hd_flags |= HPET_OPEN; | |
275 | spin_unlock_irq(&hpet_lock); | |
48b81880 | 276 | unlock_kernel(); |
1da177e4 | 277 | |
70ef6d59 KH |
278 | hpet_timer_set_irq(devp); |
279 | ||
1da177e4 LT |
280 | return 0; |
281 | } | |
282 | ||
283 | static ssize_t | |
284 | hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos) | |
285 | { | |
286 | DECLARE_WAITQUEUE(wait, current); | |
287 | unsigned long data; | |
288 | ssize_t retval; | |
289 | struct hpet_dev *devp; | |
290 | ||
291 | devp = file->private_data; | |
292 | if (!devp->hd_ireqfreq) | |
293 | return -EIO; | |
294 | ||
295 | if (count < sizeof(unsigned long)) | |
296 | return -EINVAL; | |
297 | ||
298 | add_wait_queue(&devp->hd_waitqueue, &wait); | |
299 | ||
300 | for ( ; ; ) { | |
301 | set_current_state(TASK_INTERRUPTIBLE); | |
302 | ||
303 | spin_lock_irq(&hpet_lock); | |
304 | data = devp->hd_irqdata; | |
305 | devp->hd_irqdata = 0; | |
306 | spin_unlock_irq(&hpet_lock); | |
307 | ||
308 | if (data) | |
309 | break; | |
310 | else if (file->f_flags & O_NONBLOCK) { | |
311 | retval = -EAGAIN; | |
312 | goto out; | |
313 | } else if (signal_pending(current)) { | |
314 | retval = -ERESTARTSYS; | |
315 | goto out; | |
316 | } | |
317 | schedule(); | |
318 | } | |
319 | ||
320 | retval = put_user(data, (unsigned long __user *)buf); | |
321 | if (!retval) | |
322 | retval = sizeof(unsigned long); | |
323 | out: | |
324 | __set_current_state(TASK_RUNNING); | |
325 | remove_wait_queue(&devp->hd_waitqueue, &wait); | |
326 | ||
327 | return retval; | |
328 | } | |
329 | ||
330 | static unsigned int hpet_poll(struct file *file, poll_table * wait) | |
331 | { | |
332 | unsigned long v; | |
333 | struct hpet_dev *devp; | |
334 | ||
335 | devp = file->private_data; | |
336 | ||
337 | if (!devp->hd_ireqfreq) | |
338 | return 0; | |
339 | ||
340 | poll_wait(file, &devp->hd_waitqueue, wait); | |
341 | ||
342 | spin_lock_irq(&hpet_lock); | |
343 | v = devp->hd_irqdata; | |
344 | spin_unlock_irq(&hpet_lock); | |
345 | ||
346 | if (v != 0) | |
347 | return POLLIN | POLLRDNORM; | |
348 | ||
349 | return 0; | |
350 | } | |
351 | ||
352 | static int hpet_mmap(struct file *file, struct vm_area_struct *vma) | |
353 | { | |
354 | #ifdef CONFIG_HPET_MMAP | |
355 | struct hpet_dev *devp; | |
356 | unsigned long addr; | |
357 | ||
358 | if (((vma->vm_end - vma->vm_start) != PAGE_SIZE) || vma->vm_pgoff) | |
359 | return -EINVAL; | |
360 | ||
361 | devp = file->private_data; | |
362 | addr = devp->hd_hpets->hp_hpet_phys; | |
363 | ||
364 | if (addr & (PAGE_SIZE - 1)) | |
365 | return -ENOSYS; | |
366 | ||
367 | vma->vm_flags |= VM_IO; | |
368 | vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot); | |
1da177e4 LT |
369 | |
370 | if (io_remap_pfn_range(vma, vma->vm_start, addr >> PAGE_SHIFT, | |
371 | PAGE_SIZE, vma->vm_page_prot)) { | |
3e6716e7 | 372 | printk(KERN_ERR "%s: io_remap_pfn_range failed\n", |
bf9d8929 | 373 | __func__); |
1da177e4 LT |
374 | return -EAGAIN; |
375 | } | |
376 | ||
377 | return 0; | |
378 | #else | |
379 | return -ENOSYS; | |
380 | #endif | |
381 | } | |
382 | ||
383 | static int hpet_fasync(int fd, struct file *file, int on) | |
384 | { | |
385 | struct hpet_dev *devp; | |
386 | ||
387 | devp = file->private_data; | |
388 | ||
389 | if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0) | |
390 | return 0; | |
391 | else | |
392 | return -EIO; | |
393 | } | |
394 | ||
395 | static int hpet_release(struct inode *inode, struct file *file) | |
396 | { | |
397 | struct hpet_dev *devp; | |
398 | struct hpet_timer __iomem *timer; | |
399 | int irq = 0; | |
400 | ||
401 | devp = file->private_data; | |
402 | timer = devp->hd_timer; | |
403 | ||
404 | spin_lock_irq(&hpet_lock); | |
405 | ||
406 | writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK), | |
407 | &timer->hpet_config); | |
408 | ||
409 | irq = devp->hd_irq; | |
410 | devp->hd_irq = 0; | |
411 | ||
412 | devp->hd_ireqfreq = 0; | |
413 | ||
414 | if (devp->hd_flags & HPET_PERIODIC | |
415 | && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
416 | unsigned long v; | |
417 | ||
418 | v = readq(&timer->hpet_config); | |
419 | v ^= Tn_TYPE_CNF_MASK; | |
420 | writeq(v, &timer->hpet_config); | |
421 | } | |
422 | ||
423 | devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC); | |
424 | spin_unlock_irq(&hpet_lock); | |
425 | ||
426 | if (irq) | |
427 | free_irq(irq, devp); | |
428 | ||
1da177e4 LT |
429 | file->private_data = NULL; |
430 | return 0; | |
431 | } | |
432 | ||
433 | static int hpet_ioctl_common(struct hpet_dev *, int, unsigned long, int); | |
434 | ||
435 | static int | |
436 | hpet_ioctl(struct inode *inode, struct file *file, unsigned int cmd, | |
437 | unsigned long arg) | |
438 | { | |
439 | struct hpet_dev *devp; | |
440 | ||
441 | devp = file->private_data; | |
442 | return hpet_ioctl_common(devp, cmd, arg, 0); | |
443 | } | |
444 | ||
445 | static int hpet_ioctl_ieon(struct hpet_dev *devp) | |
446 | { | |
447 | struct hpet_timer __iomem *timer; | |
448 | struct hpet __iomem *hpet; | |
449 | struct hpets *hpetp; | |
450 | int irq; | |
451 | unsigned long g, v, t, m; | |
452 | unsigned long flags, isr; | |
453 | ||
454 | timer = devp->hd_timer; | |
455 | hpet = devp->hd_hpet; | |
456 | hpetp = devp->hd_hpets; | |
457 | ||
9090e6db CL |
458 | if (!devp->hd_ireqfreq) |
459 | return -EIO; | |
460 | ||
1da177e4 LT |
461 | spin_lock_irq(&hpet_lock); |
462 | ||
463 | if (devp->hd_flags & HPET_IE) { | |
464 | spin_unlock_irq(&hpet_lock); | |
465 | return -EBUSY; | |
466 | } | |
467 | ||
468 | devp->hd_flags |= HPET_IE; | |
0d290861 CL |
469 | |
470 | if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK) | |
471 | devp->hd_flags |= HPET_SHARED_IRQ; | |
1da177e4 LT |
472 | spin_unlock_irq(&hpet_lock); |
473 | ||
1da177e4 LT |
474 | irq = devp->hd_hdwirq; |
475 | ||
476 | if (irq) { | |
0d290861 | 477 | unsigned long irq_flags; |
1da177e4 | 478 | |
0d290861 CL |
479 | sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev)); |
480 | irq_flags = devp->hd_flags & HPET_SHARED_IRQ | |
0f2ed4c6 | 481 | ? IRQF_SHARED : IRQF_DISABLED; |
0d290861 CL |
482 | if (request_irq(irq, hpet_interrupt, irq_flags, |
483 | devp->hd_name, (void *)devp)) { | |
1da177e4 LT |
484 | printk(KERN_ERR "hpet: IRQ %d is not free\n", irq); |
485 | irq = 0; | |
486 | } | |
487 | } | |
488 | ||
489 | if (irq == 0) { | |
490 | spin_lock_irq(&hpet_lock); | |
491 | devp->hd_flags ^= HPET_IE; | |
492 | spin_unlock_irq(&hpet_lock); | |
493 | return -EIO; | |
494 | } | |
495 | ||
496 | devp->hd_irq = irq; | |
497 | t = devp->hd_ireqfreq; | |
498 | v = readq(&timer->hpet_config); | |
64a76f66 DB |
499 | |
500 | /* 64-bit comparators are not yet supported through the ioctls, | |
501 | * so force this into 32-bit mode if it supports both modes | |
502 | */ | |
503 | g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK; | |
1da177e4 LT |
504 | |
505 | if (devp->hd_flags & HPET_PERIODIC) { | |
1da177e4 | 506 | g |= Tn_TYPE_CNF_MASK; |
ae21cf92 | 507 | v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK; |
1da177e4 LT |
508 | writeq(v, &timer->hpet_config); |
509 | local_irq_save(flags); | |
64a76f66 | 510 | |
ae21cf92 NC |
511 | /* |
512 | * NOTE: First we modify the hidden accumulator | |
64a76f66 DB |
513 | * register supported by periodic-capable comparators. |
514 | * We never want to modify the (single) counter; that | |
ae21cf92 NC |
515 | * would affect all the comparators. The value written |
516 | * is the counter value when the first interrupt is due. | |
64a76f66 | 517 | */ |
1da177e4 LT |
518 | m = read_counter(&hpet->hpet_mc); |
519 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
ae21cf92 NC |
520 | /* |
521 | * Then we modify the comparator, indicating the period | |
522 | * for subsequent interrupt. | |
523 | */ | |
524 | write_counter(t, &timer->hpet_compare); | |
1da177e4 LT |
525 | } else { |
526 | local_irq_save(flags); | |
527 | m = read_counter(&hpet->hpet_mc); | |
528 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
529 | } | |
530 | ||
0d290861 | 531 | if (devp->hd_flags & HPET_SHARED_IRQ) { |
3d5640d1 | 532 | isr = 1 << (devp - devp->hd_hpets->hp_dev); |
0d290861 CL |
533 | writel(isr, &hpet->hpet_isr); |
534 | } | |
1da177e4 LT |
535 | writeq(g, &timer->hpet_config); |
536 | local_irq_restore(flags); | |
537 | ||
538 | return 0; | |
539 | } | |
540 | ||
ba3f213f CL |
541 | /* converts Hz to number of timer ticks */ |
542 | static inline unsigned long hpet_time_div(struct hpets *hpets, | |
543 | unsigned long dis) | |
1da177e4 | 544 | { |
ba3f213f | 545 | unsigned long long m; |
1da177e4 | 546 | |
ba3f213f | 547 | m = hpets->hp_tick_freq + (dis >> 1); |
1da177e4 | 548 | do_div(m, dis); |
1da177e4 LT |
549 | return (unsigned long)m; |
550 | } | |
551 | ||
552 | static int | |
553 | hpet_ioctl_common(struct hpet_dev *devp, int cmd, unsigned long arg, int kernel) | |
554 | { | |
555 | struct hpet_timer __iomem *timer; | |
556 | struct hpet __iomem *hpet; | |
557 | struct hpets *hpetp; | |
558 | int err; | |
559 | unsigned long v; | |
560 | ||
561 | switch (cmd) { | |
562 | case HPET_IE_OFF: | |
563 | case HPET_INFO: | |
564 | case HPET_EPI: | |
565 | case HPET_DPI: | |
566 | case HPET_IRQFREQ: | |
567 | timer = devp->hd_timer; | |
568 | hpet = devp->hd_hpet; | |
569 | hpetp = devp->hd_hpets; | |
570 | break; | |
571 | case HPET_IE_ON: | |
572 | return hpet_ioctl_ieon(devp); | |
573 | default: | |
574 | return -EINVAL; | |
575 | } | |
576 | ||
577 | err = 0; | |
578 | ||
579 | switch (cmd) { | |
580 | case HPET_IE_OFF: | |
581 | if ((devp->hd_flags & HPET_IE) == 0) | |
582 | break; | |
583 | v = readq(&timer->hpet_config); | |
584 | v &= ~Tn_INT_ENB_CNF_MASK; | |
585 | writeq(v, &timer->hpet_config); | |
586 | if (devp->hd_irq) { | |
587 | free_irq(devp->hd_irq, devp); | |
588 | devp->hd_irq = 0; | |
589 | } | |
590 | devp->hd_flags ^= HPET_IE; | |
591 | break; | |
592 | case HPET_INFO: | |
593 | { | |
594 | struct hpet_info info; | |
595 | ||
af95eade CL |
596 | if (devp->hd_ireqfreq) |
597 | info.hi_ireqfreq = | |
598 | hpet_time_div(hpetp, devp->hd_ireqfreq); | |
599 | else | |
600 | info.hi_ireqfreq = 0; | |
1da177e4 LT |
601 | info.hi_flags = |
602 | readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK; | |
c860ed9f CL |
603 | info.hi_hpet = hpetp->hp_which; |
604 | info.hi_timer = devp - hpetp->hp_dev; | |
8e8505be CL |
605 | if (kernel) |
606 | memcpy((void *)arg, &info, sizeof(info)); | |
607 | else | |
608 | if (copy_to_user((void __user *)arg, &info, | |
609 | sizeof(info))) | |
610 | err = -EFAULT; | |
1da177e4 LT |
611 | break; |
612 | } | |
613 | case HPET_EPI: | |
614 | v = readq(&timer->hpet_config); | |
615 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
616 | err = -ENXIO; | |
617 | break; | |
618 | } | |
619 | devp->hd_flags |= HPET_PERIODIC; | |
620 | break; | |
621 | case HPET_DPI: | |
622 | v = readq(&timer->hpet_config); | |
623 | if ((v & Tn_PER_INT_CAP_MASK) == 0) { | |
624 | err = -ENXIO; | |
625 | break; | |
626 | } | |
627 | if (devp->hd_flags & HPET_PERIODIC && | |
628 | readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) { | |
629 | v = readq(&timer->hpet_config); | |
630 | v ^= Tn_TYPE_CNF_MASK; | |
631 | writeq(v, &timer->hpet_config); | |
632 | } | |
633 | devp->hd_flags &= ~HPET_PERIODIC; | |
634 | break; | |
635 | case HPET_IRQFREQ: | |
636 | if (!kernel && (arg > hpet_max_freq) && | |
637 | !capable(CAP_SYS_RESOURCE)) { | |
638 | err = -EACCES; | |
639 | break; | |
640 | } | |
641 | ||
189e2dd1 | 642 | if (!arg) { |
1da177e4 LT |
643 | err = -EINVAL; |
644 | break; | |
645 | } | |
646 | ||
ba3f213f | 647 | devp->hd_ireqfreq = hpet_time_div(hpetp, arg); |
1da177e4 LT |
648 | } |
649 | ||
650 | return err; | |
651 | } | |
652 | ||
62322d25 | 653 | static const struct file_operations hpet_fops = { |
1da177e4 LT |
654 | .owner = THIS_MODULE, |
655 | .llseek = no_llseek, | |
656 | .read = hpet_read, | |
657 | .poll = hpet_poll, | |
658 | .ioctl = hpet_ioctl, | |
659 | .open = hpet_open, | |
660 | .release = hpet_release, | |
661 | .fasync = hpet_fasync, | |
662 | .mmap = hpet_mmap, | |
663 | }; | |
664 | ||
3e6716e7 RD |
665 | static int hpet_is_known(struct hpet_data *hdp) |
666 | { | |
667 | struct hpets *hpetp; | |
668 | ||
669 | for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next) | |
670 | if (hpetp->hp_hpet_phys == hdp->hd_phys_address) | |
671 | return 1; | |
672 | ||
673 | return 0; | |
674 | } | |
675 | ||
1da177e4 LT |
676 | static ctl_table hpet_table[] = { |
677 | { | |
1da177e4 LT |
678 | .procname = "max-user-freq", |
679 | .data = &hpet_max_freq, | |
680 | .maxlen = sizeof(int), | |
681 | .mode = 0644, | |
6d456111 | 682 | .proc_handler = proc_dointvec, |
1da177e4 | 683 | }, |
894d2491 | 684 | {} |
1da177e4 LT |
685 | }; |
686 | ||
687 | static ctl_table hpet_root[] = { | |
688 | { | |
1da177e4 LT |
689 | .procname = "hpet", |
690 | .maxlen = 0, | |
691 | .mode = 0555, | |
692 | .child = hpet_table, | |
693 | }, | |
894d2491 | 694 | {} |
1da177e4 LT |
695 | }; |
696 | ||
697 | static ctl_table dev_root[] = { | |
698 | { | |
1da177e4 LT |
699 | .procname = "dev", |
700 | .maxlen = 0, | |
701 | .mode = 0555, | |
702 | .child = hpet_root, | |
703 | }, | |
894d2491 | 704 | {} |
1da177e4 LT |
705 | }; |
706 | ||
707 | static struct ctl_table_header *sysctl_header; | |
708 | ||
1da177e4 LT |
709 | /* |
710 | * Adjustment for when arming the timer with | |
711 | * initial conditions. That is, main counter | |
712 | * ticks expired before interrupts are enabled. | |
713 | */ | |
714 | #define TICK_CALIBRATE (1000UL) | |
715 | ||
303d379c | 716 | static unsigned long __hpet_calibrate(struct hpets *hpetp) |
1da177e4 LT |
717 | { |
718 | struct hpet_timer __iomem *timer = NULL; | |
719 | unsigned long t, m, count, i, flags, start; | |
720 | struct hpet_dev *devp; | |
721 | int j; | |
722 | struct hpet __iomem *hpet; | |
723 | ||
724 | for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++) | |
725 | if ((devp->hd_flags & HPET_OPEN) == 0) { | |
726 | timer = devp->hd_timer; | |
727 | break; | |
728 | } | |
729 | ||
730 | if (!timer) | |
731 | return 0; | |
732 | ||
3d5640d1 | 733 | hpet = hpetp->hp_hpet; |
1da177e4 LT |
734 | t = read_counter(&timer->hpet_compare); |
735 | ||
736 | i = 0; | |
ba3f213f | 737 | count = hpet_time_div(hpetp, TICK_CALIBRATE); |
1da177e4 LT |
738 | |
739 | local_irq_save(flags); | |
740 | ||
741 | start = read_counter(&hpet->hpet_mc); | |
742 | ||
743 | do { | |
744 | m = read_counter(&hpet->hpet_mc); | |
745 | write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare); | |
746 | } while (i++, (m - start) < count); | |
747 | ||
748 | local_irq_restore(flags); | |
749 | ||
750 | return (m - start) / i; | |
751 | } | |
752 | ||
303d379c YG |
753 | static unsigned long hpet_calibrate(struct hpets *hpetp) |
754 | { | |
755 | unsigned long ret = -1; | |
756 | unsigned long tmp; | |
757 | ||
758 | /* | |
759 | * Try to calibrate until return value becomes stable small value. | |
760 | * If SMI interruption occurs in calibration loop, the return value | |
761 | * will be big. This avoids its impact. | |
762 | */ | |
763 | for ( ; ; ) { | |
764 | tmp = __hpet_calibrate(hpetp); | |
765 | if (ret <= tmp) | |
766 | break; | |
767 | ret = tmp; | |
768 | } | |
769 | ||
770 | return ret; | |
771 | } | |
772 | ||
1da177e4 LT |
773 | int hpet_alloc(struct hpet_data *hdp) |
774 | { | |
5761d64b | 775 | u64 cap, mcfg; |
1da177e4 | 776 | struct hpet_dev *devp; |
5761d64b | 777 | u32 i, ntimer; |
1da177e4 LT |
778 | struct hpets *hpetp; |
779 | size_t siz; | |
780 | struct hpet __iomem *hpet; | |
3e6716e7 | 781 | static struct hpets *last = NULL; |
5761d64b | 782 | unsigned long period; |
ba3f213f | 783 | unsigned long long temp; |
f92a789d | 784 | u32 remainder; |
1da177e4 LT |
785 | |
786 | /* | |
787 | * hpet_alloc can be called by platform dependent code. | |
3e6716e7 RD |
788 | * If platform dependent code has allocated the hpet that |
789 | * ACPI has also reported, then we catch it here. | |
1da177e4 | 790 | */ |
3e6716e7 RD |
791 | if (hpet_is_known(hdp)) { |
792 | printk(KERN_DEBUG "%s: duplicate HPET ignored\n", | |
bf9d8929 | 793 | __func__); |
3e6716e7 RD |
794 | return 0; |
795 | } | |
1da177e4 LT |
796 | |
797 | siz = sizeof(struct hpets) + ((hdp->hd_nirqs - 1) * | |
798 | sizeof(struct hpet_dev)); | |
799 | ||
3e6716e7 | 800 | hpetp = kzalloc(siz, GFP_KERNEL); |
1da177e4 LT |
801 | |
802 | if (!hpetp) | |
803 | return -ENOMEM; | |
804 | ||
1da177e4 LT |
805 | hpetp->hp_which = hpet_nhpet++; |
806 | hpetp->hp_hpet = hdp->hd_address; | |
807 | hpetp->hp_hpet_phys = hdp->hd_phys_address; | |
808 | ||
809 | hpetp->hp_ntimer = hdp->hd_nirqs; | |
e3f37a54 | 810 | |
5761d64b TG |
811 | for (i = 0; i < hdp->hd_nirqs; i++) |
812 | hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i]; | |
37a47db8 | 813 | |
5761d64b | 814 | hpet = hpetp->hp_hpet; |
e3f37a54 | 815 | |
1da177e4 LT |
816 | cap = readq(&hpet->hpet_cap); |
817 | ||
818 | ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1; | |
819 | ||
820 | if (hpetp->hp_ntimer != ntimer) { | |
821 | printk(KERN_WARNING "hpet: number irqs doesn't agree" | |
822 | " with number of timers\n"); | |
823 | kfree(hpetp); | |
824 | return -ENODEV; | |
825 | } | |
826 | ||
827 | if (last) | |
828 | last->hp_next = hpetp; | |
829 | else | |
830 | hpets = hpetp; | |
831 | ||
832 | last = hpetp; | |
833 | ||
ba3f213f CL |
834 | period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >> |
835 | HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */ | |
836 | temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */ | |
837 | temp += period >> 1; /* round */ | |
838 | do_div(temp, period); | |
839 | hpetp->hp_tick_freq = temp; /* ticks per second */ | |
1da177e4 | 840 | |
3034d11c AK |
841 | printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s", |
842 | hpetp->hp_which, hdp->hd_phys_address, | |
1da177e4 LT |
843 | hpetp->hp_ntimer > 1 ? "s" : ""); |
844 | for (i = 0; i < hpetp->hp_ntimer; i++) | |
5761d64b | 845 | printk("%s %d", i > 0 ? "," : "", hdp->hd_irq[i]); |
1da177e4 LT |
846 | printk("\n"); |
847 | ||
f92a789d DB |
848 | temp = hpetp->hp_tick_freq; |
849 | remainder = do_div(temp, 1000000); | |
64a76f66 DB |
850 | printk(KERN_INFO |
851 | "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n", | |
852 | hpetp->hp_which, hpetp->hp_ntimer, | |
853 | cap & HPET_COUNTER_SIZE_MASK ? 64 : 32, | |
f92a789d | 854 | (unsigned) temp, remainder); |
1da177e4 LT |
855 | |
856 | mcfg = readq(&hpet->hpet_config); | |
857 | if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) { | |
858 | write_counter(0L, &hpet->hpet_mc); | |
859 | mcfg |= HPET_ENABLE_CNF_MASK; | |
860 | writeq(mcfg, &hpet->hpet_config); | |
861 | } | |
862 | ||
642d30bb | 863 | for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) { |
1da177e4 LT |
864 | struct hpet_timer __iomem *timer; |
865 | ||
866 | timer = &hpet->hpet_timers[devp - hpetp->hp_dev]; | |
1da177e4 LT |
867 | |
868 | devp->hd_hpets = hpetp; | |
869 | devp->hd_hpet = hpet; | |
870 | devp->hd_timer = timer; | |
871 | ||
872 | /* | |
873 | * If the timer was reserved by platform code, | |
874 | * then make timer unavailable for opens. | |
875 | */ | |
876 | if (hdp->hd_state & (1 << i)) { | |
877 | devp->hd_flags = HPET_OPEN; | |
878 | continue; | |
879 | } | |
880 | ||
881 | init_waitqueue_head(&devp->hd_waitqueue); | |
882 | } | |
883 | ||
884 | hpetp->hp_delta = hpet_calibrate(hpetp); | |
0aa366f3 | 885 | |
3b2b64fd LT |
886 | /* This clocksource driver currently only works on ia64 */ |
887 | #ifdef CONFIG_IA64 | |
0aa366f3 TL |
888 | if (!hpet_clocksource) { |
889 | hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc; | |
890 | CLKSRC_FSYS_MMIO_SET(clocksource_hpet.fsys_mmio, hpet_mctr); | |
891 | clocksource_hpet.mult = clocksource_hz2mult(hpetp->hp_tick_freq, | |
892 | clocksource_hpet.shift); | |
893 | clocksource_register(&clocksource_hpet); | |
894 | hpetp->hp_clocksource = &clocksource_hpet; | |
895 | hpet_clocksource = &clocksource_hpet; | |
896 | } | |
3b2b64fd | 897 | #endif |
1da177e4 LT |
898 | |
899 | return 0; | |
900 | } | |
901 | ||
902 | static acpi_status hpet_resources(struct acpi_resource *res, void *data) | |
903 | { | |
904 | struct hpet_data *hdp; | |
905 | acpi_status status; | |
906 | struct acpi_resource_address64 addr; | |
1da177e4 LT |
907 | |
908 | hdp = data; | |
909 | ||
910 | status = acpi_resource_to_address64(res, &addr); | |
911 | ||
912 | if (ACPI_SUCCESS(status)) { | |
50eca3eb | 913 | hdp->hd_phys_address = addr.minimum; |
9224a867 | 914 | hdp->hd_address = ioremap(addr.minimum, addr.address_length); |
1da177e4 | 915 | |
3e6716e7 | 916 | if (hpet_is_known(hdp)) { |
3e6716e7 | 917 | iounmap(hdp->hd_address); |
78e1ca49 | 918 | return AE_ALREADY_EXISTS; |
3e6716e7 | 919 | } |
50eca3eb BM |
920 | } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) { |
921 | struct acpi_resource_fixed_memory32 *fixmem32; | |
757c4724 RD |
922 | |
923 | fixmem32 = &res->data.fixed_memory32; | |
924 | if (!fixmem32) | |
78e1ca49 | 925 | return AE_NO_MEMORY; |
757c4724 | 926 | |
50eca3eb BM |
927 | hdp->hd_phys_address = fixmem32->address; |
928 | hdp->hd_address = ioremap(fixmem32->address, | |
757c4724 RD |
929 | HPET_RANGE_SIZE); |
930 | ||
3e6716e7 | 931 | if (hpet_is_known(hdp)) { |
3e6716e7 | 932 | iounmap(hdp->hd_address); |
78e1ca49 | 933 | return AE_ALREADY_EXISTS; |
3e6716e7 | 934 | } |
50eca3eb BM |
935 | } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) { |
936 | struct acpi_resource_extended_irq *irqp; | |
be5efffb | 937 | int i, irq; |
1da177e4 LT |
938 | |
939 | irqp = &res->data.extended_irq; | |
940 | ||
be5efffb | 941 | for (i = 0; i < irqp->interrupt_count; i++) { |
a2f809b0 | 942 | irq = acpi_register_gsi(NULL, irqp->interrupts[i], |
be5efffb BH |
943 | irqp->triggering, irqp->polarity); |
944 | if (irq < 0) | |
945 | return AE_ERROR; | |
946 | ||
947 | hdp->hd_irq[hdp->hd_nirqs] = irq; | |
948 | hdp->hd_nirqs++; | |
1da177e4 LT |
949 | } |
950 | } | |
951 | ||
952 | return AE_OK; | |
953 | } | |
954 | ||
955 | static int hpet_acpi_add(struct acpi_device *device) | |
956 | { | |
957 | acpi_status result; | |
958 | struct hpet_data data; | |
959 | ||
960 | memset(&data, 0, sizeof(data)); | |
961 | ||
962 | result = | |
963 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, | |
964 | hpet_resources, &data); | |
965 | ||
966 | if (ACPI_FAILURE(result)) | |
967 | return -ENODEV; | |
968 | ||
969 | if (!data.hd_address || !data.hd_nirqs) { | |
bf9d8929 | 970 | printk("%s: no address or irqs in _CRS\n", __func__); |
1da177e4 LT |
971 | return -ENODEV; |
972 | } | |
973 | ||
974 | return hpet_alloc(&data); | |
975 | } | |
976 | ||
977 | static int hpet_acpi_remove(struct acpi_device *device, int type) | |
978 | { | |
0aa366f3 | 979 | /* XXX need to unregister clocksource, dealloc mem, etc */ |
1da177e4 LT |
980 | return -EINVAL; |
981 | } | |
982 | ||
1ba90e3a TR |
983 | static const struct acpi_device_id hpet_device_ids[] = { |
984 | {"PNP0103", 0}, | |
985 | {"", 0}, | |
986 | }; | |
987 | MODULE_DEVICE_TABLE(acpi, hpet_device_ids); | |
988 | ||
1da177e4 LT |
989 | static struct acpi_driver hpet_acpi_driver = { |
990 | .name = "hpet", | |
1ba90e3a | 991 | .ids = hpet_device_ids, |
1da177e4 LT |
992 | .ops = { |
993 | .add = hpet_acpi_add, | |
994 | .remove = hpet_acpi_remove, | |
995 | }, | |
996 | }; | |
997 | ||
998 | static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops }; | |
999 | ||
1000 | static int __init hpet_init(void) | |
1001 | { | |
1002 | int result; | |
1003 | ||
1004 | result = misc_register(&hpet_misc); | |
1005 | if (result < 0) | |
1006 | return -ENODEV; | |
1007 | ||
0b4d4147 | 1008 | sysctl_header = register_sysctl_table(dev_root); |
1da177e4 LT |
1009 | |
1010 | result = acpi_bus_register_driver(&hpet_acpi_driver); | |
1011 | if (result < 0) { | |
1012 | if (sysctl_header) | |
1013 | unregister_sysctl_table(sysctl_header); | |
1014 | misc_deregister(&hpet_misc); | |
1015 | return result; | |
1016 | } | |
1017 | ||
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | static void __exit hpet_exit(void) | |
1022 | { | |
1023 | acpi_bus_unregister_driver(&hpet_acpi_driver); | |
1024 | ||
1025 | if (sysctl_header) | |
1026 | unregister_sysctl_table(sysctl_header); | |
1027 | misc_deregister(&hpet_misc); | |
1028 | ||
1029 | return; | |
1030 | } | |
1031 | ||
1032 | module_init(hpet_init); | |
1033 | module_exit(hpet_exit); | |
1034 | MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>"); | |
1035 | MODULE_LICENSE("GPL"); |