virtio_net: set the default max ring size by find_vqs()
[linux-2.6-block.git] / drivers / char / hpet.c
CommitLineData
d2912cb1 1// SPDX-License-Identifier: GPL-2.0-only
1da177e4
LT
2/*
3 * Intel & MS High Precision Event Timer Implementation.
4 *
5 * Copyright (C) 2003 Intel Corporation
6 * Venki Pallipadi
7 * (c) Copyright 2004 Hewlett-Packard Development Company, L.P.
8 * Bob Picco <robert.picco@hp.com>
1da177e4
LT
9 */
10
1da177e4 11#include <linux/interrupt.h>
1da177e4
LT
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <linux/miscdevice.h>
15#include <linux/major.h>
16#include <linux/ioport.h>
17#include <linux/fcntl.h>
18#include <linux/init.h>
b86f3295 19#include <linux/io-64-nonatomic-lo-hi.h>
1da177e4 20#include <linux/poll.h>
f23f6e08 21#include <linux/mm.h>
1da177e4
LT
22#include <linux/proc_fs.h>
23#include <linux/spinlock.h>
24#include <linux/sysctl.h>
25#include <linux/wait.h>
174cd4b1 26#include <linux/sched/signal.h>
1da177e4
LT
27#include <linux/bcd.h>
28#include <linux/seq_file.h>
29#include <linux/bitops.h>
54066a57 30#include <linux/compat.h>
0aa366f3 31#include <linux/clocksource.h>
0ca01763 32#include <linux/uaccess.h>
5a0e3ad6 33#include <linux/slab.h>
0ca01763 34#include <linux/io.h>
8b48463f
LZ
35#include <linux/acpi.h>
36#include <linux/hpet.h>
1da177e4 37#include <asm/current.h>
1da177e4
LT
38#include <asm/irq.h>
39#include <asm/div64.h>
40
1da177e4
LT
41/*
42 * The High Precision Event Timer driver.
43 * This driver is closely modelled after the rtc.c driver.
4e7f9df2 44 * See HPET spec revision 1.
1da177e4
LT
45 */
46#define HPET_USER_FREQ (64)
47#define HPET_DRIFT (500)
48
757c4724
RD
49#define HPET_RANGE_SIZE 1024 /* from HPET spec */
50
64a76f66
DB
51
52/* WARNING -- don't get confused. These macros are never used
53 * to write the (single) counter, and rarely to read it.
54 * They're badly named; to fix, someday.
55 */
0aa366f3
TL
56#if BITS_PER_LONG == 64
57#define write_counter(V, MC) writeq(V, MC)
58#define read_counter(MC) readq(MC)
59#else
60#define write_counter(V, MC) writel(V, MC)
61#define read_counter(MC) readl(MC)
62#endif
63
54066a57 64static DEFINE_MUTEX(hpet_mutex); /* replaces BKL */
642d30bb 65static u32 hpet_nhpet, hpet_max_freq = HPET_USER_FREQ;
1da177e4 66
3dffec45
ÇO
67/* This clocksource driver currently only works on ia64 */
68#ifdef CONFIG_IA64
0aa366f3
TL
69static void __iomem *hpet_mctr;
70
a5a1d1c2 71static u64 read_hpet(struct clocksource *cs)
0aa366f3 72{
a5a1d1c2 73 return (u64)read_counter((void __iomem *)hpet_mctr);
0aa366f3
TL
74}
75
76static struct clocksource clocksource_hpet = {
0ca01763
JSR
77 .name = "hpet",
78 .rating = 250,
79 .read = read_hpet,
80 .mask = CLOCKSOURCE_MASK(64),
0ca01763 81 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
0aa366f3
TL
82};
83static struct clocksource *hpet_clocksource;
3dffec45 84#endif
0aa366f3 85
1da177e4
LT
86/* A lock for concurrent access by app and isr hpet activity. */
87static DEFINE_SPINLOCK(hpet_lock);
1da177e4
LT
88
89#define HPET_DEV_NAME (7)
90
91struct hpet_dev {
92 struct hpets *hd_hpets;
93 struct hpet __iomem *hd_hpet;
94 struct hpet_timer __iomem *hd_timer;
95 unsigned long hd_ireqfreq;
96 unsigned long hd_irqdata;
97 wait_queue_head_t hd_waitqueue;
98 struct fasync_struct *hd_async_queue;
1da177e4
LT
99 unsigned int hd_flags;
100 unsigned int hd_irq;
101 unsigned int hd_hdwirq;
102 char hd_name[HPET_DEV_NAME];
103};
104
105struct hpets {
106 struct hpets *hp_next;
107 struct hpet __iomem *hp_hpet;
108 unsigned long hp_hpet_phys;
0aa366f3 109 struct clocksource *hp_clocksource;
ba3f213f 110 unsigned long long hp_tick_freq;
1da177e4
LT
111 unsigned long hp_delta;
112 unsigned int hp_ntimer;
113 unsigned int hp_which;
987f028b 114 struct hpet_dev hp_dev[];
1da177e4
LT
115};
116
117static struct hpets *hpets;
118
119#define HPET_OPEN 0x0001
120#define HPET_IE 0x0002 /* interrupt enabled */
121#define HPET_PERIODIC 0x0004
0d290861 122#define HPET_SHARED_IRQ 0x0008
1da177e4 123
7d12e780 124static irqreturn_t hpet_interrupt(int irq, void *data)
1da177e4
LT
125{
126 struct hpet_dev *devp;
127 unsigned long isr;
128
129 devp = data;
0d290861
CL
130 isr = 1 << (devp - devp->hd_hpets->hp_dev);
131
132 if ((devp->hd_flags & HPET_SHARED_IRQ) &&
133 !(isr & readl(&devp->hd_hpet->hpet_isr)))
134 return IRQ_NONE;
1da177e4
LT
135
136 spin_lock(&hpet_lock);
137 devp->hd_irqdata++;
138
139 /*
140 * For non-periodic timers, increment the accumulator.
141 * This has the effect of treating non-periodic like periodic.
142 */
143 if ((devp->hd_flags & (HPET_IE | HPET_PERIODIC)) == HPET_IE) {
d80758c0 144 unsigned long t, mc, base, k;
273ef950
NC
145 struct hpet __iomem *hpet = devp->hd_hpet;
146 struct hpets *hpetp = devp->hd_hpets;
1da177e4
LT
147
148 t = devp->hd_ireqfreq;
d80758c0 149 read_counter(&devp->hd_timer->hpet_compare);
273ef950
NC
150 mc = read_counter(&hpet->hpet_mc);
151 /* The time for the next interrupt would logically be t + m,
152 * however, if we are very unlucky and the interrupt is delayed
153 * for longer than t then we will completely miss the next
154 * interrupt if we set t + m and an application will hang.
155 * Therefore we need to make a more complex computation assuming
156 * that there exists a k for which the following is true:
157 * k * t + base < mc + delta
158 * (k + 1) * t + base > mc + delta
159 * where t is the interval in hpet ticks for the given freq,
160 * base is the theoretical start value 0 < base < t,
161 * mc is the main counter value at the time of the interrupt,
162 * delta is the time it takes to write the a value to the
163 * comparator.
164 * k may then be computed as (mc - base + delta) / t .
165 */
166 base = mc % t;
167 k = (mc - base + hpetp->hp_delta) / t;
168 write_counter(t * (k + 1) + base,
169 &devp->hd_timer->hpet_compare);
1da177e4
LT
170 }
171
0d290861
CL
172 if (devp->hd_flags & HPET_SHARED_IRQ)
173 writel(isr, &devp->hd_hpet->hpet_isr);
1da177e4
LT
174 spin_unlock(&hpet_lock);
175
1da177e4
LT
176 wake_up_interruptible(&devp->hd_waitqueue);
177
178 kill_fasync(&devp->hd_async_queue, SIGIO, POLL_IN);
179
180 return IRQ_HANDLED;
181}
182
70ef6d59
KH
183static void hpet_timer_set_irq(struct hpet_dev *devp)
184{
185 unsigned long v;
186 int irq, gsi;
187 struct hpet_timer __iomem *timer;
188
189 spin_lock_irq(&hpet_lock);
190 if (devp->hd_hdwirq) {
191 spin_unlock_irq(&hpet_lock);
192 return;
193 }
194
195 timer = devp->hd_timer;
196
197 /* we prefer level triggered mode */
198 v = readl(&timer->hpet_config);
199 if (!(v & Tn_INT_TYPE_CNF_MASK)) {
200 v |= Tn_INT_TYPE_CNF_MASK;
201 writel(v, &timer->hpet_config);
202 }
203 spin_unlock_irq(&hpet_lock);
204
205 v = (readq(&timer->hpet_config) & Tn_INT_ROUTE_CAP_MASK) >>
206 Tn_INT_ROUTE_CAP_SHIFT;
207
208 /*
209 * In PIC mode, skip IRQ0-4, IRQ6-9, IRQ12-15 which is always used by
210 * legacy device. In IO APIC mode, we skip all the legacy IRQS.
211 */
212 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC)
213 v &= ~0xf3df;
214 else
215 v &= ~0xffff;
216
e5d61511 217 for_each_set_bit(irq, &v, HPET_MAX_IRQ) {
1f45f562 218 if (irq >= nr_irqs) {
70ef6d59
KH
219 irq = HPET_MAX_IRQ;
220 break;
221 }
222
a2f809b0 223 gsi = acpi_register_gsi(NULL, irq, ACPI_LEVEL_SENSITIVE,
70ef6d59
KH
224 ACPI_ACTIVE_LOW);
225 if (gsi > 0)
226 break;
227
228 /* FIXME: Setup interrupt source table */
229 }
230
231 if (irq < HPET_MAX_IRQ) {
232 spin_lock_irq(&hpet_lock);
233 v = readl(&timer->hpet_config);
234 v |= irq << Tn_INT_ROUTE_CNF_SHIFT;
235 writel(v, &timer->hpet_config);
236 devp->hd_hdwirq = gsi;
237 spin_unlock_irq(&hpet_lock);
238 }
239 return;
240}
241
1da177e4
LT
242static int hpet_open(struct inode *inode, struct file *file)
243{
244 struct hpet_dev *devp;
245 struct hpets *hpetp;
246 int i;
247
248 if (file->f_mode & FMODE_WRITE)
249 return -EINVAL;
250
54066a57 251 mutex_lock(&hpet_mutex);
1da177e4
LT
252 spin_lock_irq(&hpet_lock);
253
254 for (devp = NULL, hpetp = hpets; hpetp && !devp; hpetp = hpetp->hp_next)
255 for (i = 0; i < hpetp->hp_ntimer; i++)
7163ae16 256 if (hpetp->hp_dev[i].hd_flags & HPET_OPEN) {
1da177e4 257 continue;
7163ae16 258 } else {
1da177e4
LT
259 devp = &hpetp->hp_dev[i];
260 break;
261 }
262
263 if (!devp) {
264 spin_unlock_irq(&hpet_lock);
54066a57 265 mutex_unlock(&hpet_mutex);
1da177e4
LT
266 return -EBUSY;
267 }
268
269 file->private_data = devp;
270 devp->hd_irqdata = 0;
271 devp->hd_flags |= HPET_OPEN;
272 spin_unlock_irq(&hpet_lock);
54066a57 273 mutex_unlock(&hpet_mutex);
1da177e4 274
70ef6d59
KH
275 hpet_timer_set_irq(devp);
276
1da177e4
LT
277 return 0;
278}
279
280static ssize_t
281hpet_read(struct file *file, char __user *buf, size_t count, loff_t * ppos)
282{
283 DECLARE_WAITQUEUE(wait, current);
284 unsigned long data;
285 ssize_t retval;
286 struct hpet_dev *devp;
287
288 devp = file->private_data;
289 if (!devp->hd_ireqfreq)
290 return -EIO;
291
292 if (count < sizeof(unsigned long))
293 return -EINVAL;
294
295 add_wait_queue(&devp->hd_waitqueue, &wait);
296
297 for ( ; ; ) {
298 set_current_state(TASK_INTERRUPTIBLE);
299
300 spin_lock_irq(&hpet_lock);
301 data = devp->hd_irqdata;
302 devp->hd_irqdata = 0;
303 spin_unlock_irq(&hpet_lock);
304
7163ae16 305 if (data) {
1da177e4 306 break;
7163ae16 307 } else if (file->f_flags & O_NONBLOCK) {
1da177e4
LT
308 retval = -EAGAIN;
309 goto out;
310 } else if (signal_pending(current)) {
311 retval = -ERESTARTSYS;
312 goto out;
313 }
314 schedule();
315 }
316
317 retval = put_user(data, (unsigned long __user *)buf);
318 if (!retval)
319 retval = sizeof(unsigned long);
320out:
321 __set_current_state(TASK_RUNNING);
322 remove_wait_queue(&devp->hd_waitqueue, &wait);
323
324 return retval;
325}
326
afc9a42b 327static __poll_t hpet_poll(struct file *file, poll_table * wait)
1da177e4
LT
328{
329 unsigned long v;
330 struct hpet_dev *devp;
331
332 devp = file->private_data;
333
334 if (!devp->hd_ireqfreq)
335 return 0;
336
337 poll_wait(file, &devp->hd_waitqueue, wait);
338
339 spin_lock_irq(&hpet_lock);
340 v = devp->hd_irqdata;
341 spin_unlock_irq(&hpet_lock);
342
343 if (v != 0)
a9a08845 344 return EPOLLIN | EPOLLRDNORM;
1da177e4
LT
345
346 return 0;
347}
348
3d035f58
PB
349#ifdef CONFIG_HPET_MMAP
350#ifdef CONFIG_HPET_MMAP_DEFAULT
351static int hpet_mmap_enabled = 1;
352#else
353static int hpet_mmap_enabled = 0;
354#endif
355
356static __init int hpet_mmap_enable(char *str)
357{
358 get_option(&str, &hpet_mmap_enabled);
359 pr_info("HPET mmap %s\n", hpet_mmap_enabled ? "enabled" : "disabled");
360 return 1;
361}
24d48a61 362__setup("hpet_mmap=", hpet_mmap_enable);
3d035f58 363
1da177e4
LT
364static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
365{
1da177e4
LT
366 struct hpet_dev *devp;
367 unsigned long addr;
368
3d035f58
PB
369 if (!hpet_mmap_enabled)
370 return -EACCES;
371
1da177e4
LT
372 devp = file->private_data;
373 addr = devp->hd_hpets->hp_hpet_phys;
374
375 if (addr & (PAGE_SIZE - 1))
376 return -ENOSYS;
377
1da177e4 378 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
2323036d 379 return vm_iomap_memory(vma, addr, PAGE_SIZE);
3d035f58 380}
1da177e4 381#else
3d035f58
PB
382static int hpet_mmap(struct file *file, struct vm_area_struct *vma)
383{
1da177e4 384 return -ENOSYS;
1da177e4 385}
3d035f58 386#endif
1da177e4
LT
387
388static int hpet_fasync(int fd, struct file *file, int on)
389{
390 struct hpet_dev *devp;
391
392 devp = file->private_data;
393
394 if (fasync_helper(fd, file, on, &devp->hd_async_queue) >= 0)
395 return 0;
396 else
397 return -EIO;
398}
399
400static int hpet_release(struct inode *inode, struct file *file)
401{
402 struct hpet_dev *devp;
403 struct hpet_timer __iomem *timer;
404 int irq = 0;
405
406 devp = file->private_data;
407 timer = devp->hd_timer;
408
409 spin_lock_irq(&hpet_lock);
410
411 writeq((readq(&timer->hpet_config) & ~Tn_INT_ENB_CNF_MASK),
412 &timer->hpet_config);
413
414 irq = devp->hd_irq;
415 devp->hd_irq = 0;
416
417 devp->hd_ireqfreq = 0;
418
419 if (devp->hd_flags & HPET_PERIODIC
420 && readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
421 unsigned long v;
422
423 v = readq(&timer->hpet_config);
424 v ^= Tn_TYPE_CNF_MASK;
425 writeq(v, &timer->hpet_config);
426 }
427
428 devp->hd_flags &= ~(HPET_OPEN | HPET_IE | HPET_PERIODIC);
429 spin_unlock_irq(&hpet_lock);
430
431 if (irq)
432 free_irq(irq, devp);
433
1da177e4
LT
434 file->private_data = NULL;
435 return 0;
436}
437
1da177e4
LT
438static int hpet_ioctl_ieon(struct hpet_dev *devp)
439{
440 struct hpet_timer __iomem *timer;
441 struct hpet __iomem *hpet;
442 struct hpets *hpetp;
443 int irq;
444 unsigned long g, v, t, m;
445 unsigned long flags, isr;
446
447 timer = devp->hd_timer;
448 hpet = devp->hd_hpet;
449 hpetp = devp->hd_hpets;
450
9090e6db
CL
451 if (!devp->hd_ireqfreq)
452 return -EIO;
453
1da177e4
LT
454 spin_lock_irq(&hpet_lock);
455
456 if (devp->hd_flags & HPET_IE) {
457 spin_unlock_irq(&hpet_lock);
458 return -EBUSY;
459 }
460
461 devp->hd_flags |= HPET_IE;
0d290861
CL
462
463 if (readl(&timer->hpet_config) & Tn_INT_TYPE_CNF_MASK)
464 devp->hd_flags |= HPET_SHARED_IRQ;
1da177e4
LT
465 spin_unlock_irq(&hpet_lock);
466
1da177e4
LT
467 irq = devp->hd_hdwirq;
468
469 if (irq) {
0d290861 470 unsigned long irq_flags;
1da177e4 471
96e9694d
CL
472 if (devp->hd_flags & HPET_SHARED_IRQ) {
473 /*
474 * To prevent the interrupt handler from seeing an
475 * unwanted interrupt status bit, program the timer
476 * so that it will not fire in the near future ...
477 */
478 writel(readl(&timer->hpet_config) & ~Tn_TYPE_CNF_MASK,
479 &timer->hpet_config);
480 write_counter(read_counter(&hpet->hpet_mc),
481 &timer->hpet_compare);
482 /* ... and clear any left-over status. */
483 isr = 1 << (devp - devp->hd_hpets->hp_dev);
484 writel(isr, &hpet->hpet_isr);
485 }
486
0d290861 487 sprintf(devp->hd_name, "hpet%d", (int)(devp - hpetp->hp_dev));
158f0bb0 488 irq_flags = devp->hd_flags & HPET_SHARED_IRQ ? IRQF_SHARED : 0;
0d290861
CL
489 if (request_irq(irq, hpet_interrupt, irq_flags,
490 devp->hd_name, (void *)devp)) {
1da177e4
LT
491 printk(KERN_ERR "hpet: IRQ %d is not free\n", irq);
492 irq = 0;
493 }
494 }
495
496 if (irq == 0) {
497 spin_lock_irq(&hpet_lock);
498 devp->hd_flags ^= HPET_IE;
499 spin_unlock_irq(&hpet_lock);
500 return -EIO;
501 }
502
503 devp->hd_irq = irq;
504 t = devp->hd_ireqfreq;
505 v = readq(&timer->hpet_config);
64a76f66
DB
506
507 /* 64-bit comparators are not yet supported through the ioctls,
508 * so force this into 32-bit mode if it supports both modes
509 */
510 g = v | Tn_32MODE_CNF_MASK | Tn_INT_ENB_CNF_MASK;
1da177e4
LT
511
512 if (devp->hd_flags & HPET_PERIODIC) {
1da177e4 513 g |= Tn_TYPE_CNF_MASK;
ae21cf92 514 v |= Tn_TYPE_CNF_MASK | Tn_VAL_SET_CNF_MASK;
1da177e4
LT
515 writeq(v, &timer->hpet_config);
516 local_irq_save(flags);
64a76f66 517
ae21cf92
NC
518 /*
519 * NOTE: First we modify the hidden accumulator
64a76f66
DB
520 * register supported by periodic-capable comparators.
521 * We never want to modify the (single) counter; that
ae21cf92
NC
522 * would affect all the comparators. The value written
523 * is the counter value when the first interrupt is due.
64a76f66 524 */
1da177e4
LT
525 m = read_counter(&hpet->hpet_mc);
526 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
ae21cf92
NC
527 /*
528 * Then we modify the comparator, indicating the period
529 * for subsequent interrupt.
530 */
531 write_counter(t, &timer->hpet_compare);
1da177e4
LT
532 } else {
533 local_irq_save(flags);
534 m = read_counter(&hpet->hpet_mc);
535 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
536 }
537
0d290861 538 if (devp->hd_flags & HPET_SHARED_IRQ) {
3d5640d1 539 isr = 1 << (devp - devp->hd_hpets->hp_dev);
0d290861
CL
540 writel(isr, &hpet->hpet_isr);
541 }
1da177e4
LT
542 writeq(g, &timer->hpet_config);
543 local_irq_restore(flags);
544
545 return 0;
546}
547
ba3f213f
CL
548/* converts Hz to number of timer ticks */
549static inline unsigned long hpet_time_div(struct hpets *hpets,
550 unsigned long dis)
1da177e4 551{
ba3f213f 552 unsigned long long m;
1da177e4 553
ba3f213f 554 m = hpets->hp_tick_freq + (dis >> 1);
0c7d37f4 555 return div64_ul(m, dis);
1da177e4
LT
556}
557
558static int
5cd5e6ad 559hpet_ioctl_common(struct hpet_dev *devp, unsigned int cmd, unsigned long arg,
54066a57 560 struct hpet_info *info)
1da177e4
LT
561{
562 struct hpet_timer __iomem *timer;
1da177e4
LT
563 struct hpets *hpetp;
564 int err;
565 unsigned long v;
566
567 switch (cmd) {
568 case HPET_IE_OFF:
569 case HPET_INFO:
570 case HPET_EPI:
571 case HPET_DPI:
572 case HPET_IRQFREQ:
573 timer = devp->hd_timer;
1da177e4
LT
574 hpetp = devp->hd_hpets;
575 break;
576 case HPET_IE_ON:
577 return hpet_ioctl_ieon(devp);
578 default:
579 return -EINVAL;
580 }
581
582 err = 0;
583
584 switch (cmd) {
585 case HPET_IE_OFF:
586 if ((devp->hd_flags & HPET_IE) == 0)
587 break;
588 v = readq(&timer->hpet_config);
589 v &= ~Tn_INT_ENB_CNF_MASK;
590 writeq(v, &timer->hpet_config);
591 if (devp->hd_irq) {
592 free_irq(devp->hd_irq, devp);
593 devp->hd_irq = 0;
594 }
595 devp->hd_flags ^= HPET_IE;
596 break;
597 case HPET_INFO:
598 {
dae512ed 599 memset(info, 0, sizeof(*info));
af95eade 600 if (devp->hd_ireqfreq)
54066a57 601 info->hi_ireqfreq =
af95eade 602 hpet_time_div(hpetp, devp->hd_ireqfreq);
54066a57 603 info->hi_flags =
1da177e4 604 readq(&timer->hpet_config) & Tn_PER_INT_CAP_MASK;
54066a57
AB
605 info->hi_hpet = hpetp->hp_which;
606 info->hi_timer = devp - hpetp->hp_dev;
1da177e4
LT
607 break;
608 }
609 case HPET_EPI:
610 v = readq(&timer->hpet_config);
611 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
612 err = -ENXIO;
613 break;
614 }
615 devp->hd_flags |= HPET_PERIODIC;
616 break;
617 case HPET_DPI:
618 v = readq(&timer->hpet_config);
619 if ((v & Tn_PER_INT_CAP_MASK) == 0) {
620 err = -ENXIO;
621 break;
622 }
623 if (devp->hd_flags & HPET_PERIODIC &&
624 readq(&timer->hpet_config) & Tn_TYPE_CNF_MASK) {
625 v = readq(&timer->hpet_config);
626 v ^= Tn_TYPE_CNF_MASK;
627 writeq(v, &timer->hpet_config);
628 }
629 devp->hd_flags &= ~HPET_PERIODIC;
630 break;
631 case HPET_IRQFREQ:
54066a57 632 if ((arg > hpet_max_freq) &&
1da177e4
LT
633 !capable(CAP_SYS_RESOURCE)) {
634 err = -EACCES;
635 break;
636 }
637
189e2dd1 638 if (!arg) {
1da177e4
LT
639 err = -EINVAL;
640 break;
641 }
642
ba3f213f 643 devp->hd_ireqfreq = hpet_time_div(hpetp, arg);
1da177e4
LT
644 }
645
646 return err;
647}
648
54066a57
AB
649static long
650hpet_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
651{
652 struct hpet_info info;
653 int err;
654
655 mutex_lock(&hpet_mutex);
656 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
657 mutex_unlock(&hpet_mutex);
658
659 if ((cmd == HPET_INFO) && !err &&
660 (copy_to_user((void __user *)arg, &info, sizeof(info))))
661 err = -EFAULT;
662
663 return err;
664}
665
666#ifdef CONFIG_COMPAT
667struct compat_hpet_info {
668 compat_ulong_t hi_ireqfreq; /* Hz */
669 compat_ulong_t hi_flags; /* information */
670 unsigned short hi_hpet;
671 unsigned short hi_timer;
672};
673
674static long
675hpet_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
676{
677 struct hpet_info info;
678 int err;
679
680 mutex_lock(&hpet_mutex);
681 err = hpet_ioctl_common(file->private_data, cmd, arg, &info);
682 mutex_unlock(&hpet_mutex);
683
684 if ((cmd == HPET_INFO) && !err) {
685 struct compat_hpet_info __user *u = compat_ptr(arg);
686 if (put_user(info.hi_ireqfreq, &u->hi_ireqfreq) ||
687 put_user(info.hi_flags, &u->hi_flags) ||
688 put_user(info.hi_hpet, &u->hi_hpet) ||
689 put_user(info.hi_timer, &u->hi_timer))
690 err = -EFAULT;
691 }
692
693 return err;
694}
695#endif
696
62322d25 697static const struct file_operations hpet_fops = {
1da177e4
LT
698 .owner = THIS_MODULE,
699 .llseek = no_llseek,
700 .read = hpet_read,
701 .poll = hpet_poll,
55929332 702 .unlocked_ioctl = hpet_ioctl,
54066a57
AB
703#ifdef CONFIG_COMPAT
704 .compat_ioctl = hpet_compat_ioctl,
705#endif
1da177e4
LT
706 .open = hpet_open,
707 .release = hpet_release,
708 .fasync = hpet_fasync,
709 .mmap = hpet_mmap,
710};
711
3e6716e7
RD
712static int hpet_is_known(struct hpet_data *hdp)
713{
714 struct hpets *hpetp;
715
716 for (hpetp = hpets; hpetp; hpetp = hpetp->hp_next)
717 if (hpetp->hp_hpet_phys == hdp->hd_phys_address)
718 return 1;
719
720 return 0;
721}
722
a151427e 723static struct ctl_table hpet_table[] = {
1da177e4 724 {
1da177e4
LT
725 .procname = "max-user-freq",
726 .data = &hpet_max_freq,
727 .maxlen = sizeof(int),
728 .mode = 0644,
6d456111 729 .proc_handler = proc_dointvec,
1da177e4 730 },
894d2491 731 {}
1da177e4
LT
732};
733
1da177e4
LT
734static struct ctl_table_header *sysctl_header;
735
1da177e4
LT
736/*
737 * Adjustment for when arming the timer with
738 * initial conditions. That is, main counter
739 * ticks expired before interrupts are enabled.
740 */
741#define TICK_CALIBRATE (1000UL)
742
303d379c 743static unsigned long __hpet_calibrate(struct hpets *hpetp)
1da177e4
LT
744{
745 struct hpet_timer __iomem *timer = NULL;
746 unsigned long t, m, count, i, flags, start;
747 struct hpet_dev *devp;
748 int j;
749 struct hpet __iomem *hpet;
750
751 for (j = 0, devp = hpetp->hp_dev; j < hpetp->hp_ntimer; j++, devp++)
752 if ((devp->hd_flags & HPET_OPEN) == 0) {
753 timer = devp->hd_timer;
754 break;
755 }
756
757 if (!timer)
758 return 0;
759
3d5640d1 760 hpet = hpetp->hp_hpet;
1da177e4
LT
761 t = read_counter(&timer->hpet_compare);
762
763 i = 0;
ba3f213f 764 count = hpet_time_div(hpetp, TICK_CALIBRATE);
1da177e4
LT
765
766 local_irq_save(flags);
767
768 start = read_counter(&hpet->hpet_mc);
769
770 do {
771 m = read_counter(&hpet->hpet_mc);
772 write_counter(t + m + hpetp->hp_delta, &timer->hpet_compare);
773 } while (i++, (m - start) < count);
774
775 local_irq_restore(flags);
776
777 return (m - start) / i;
778}
779
303d379c
YG
780static unsigned long hpet_calibrate(struct hpets *hpetp)
781{
2cf4e52e 782 unsigned long ret = ~0UL;
303d379c
YG
783 unsigned long tmp;
784
785 /*
786 * Try to calibrate until return value becomes stable small value.
787 * If SMI interruption occurs in calibration loop, the return value
788 * will be big. This avoids its impact.
789 */
790 for ( ; ; ) {
791 tmp = __hpet_calibrate(hpetp);
792 if (ret <= tmp)
793 break;
794 ret = tmp;
795 }
796
797 return ret;
798}
799
1da177e4
LT
800int hpet_alloc(struct hpet_data *hdp)
801{
5761d64b 802 u64 cap, mcfg;
1da177e4 803 struct hpet_dev *devp;
5761d64b 804 u32 i, ntimer;
1da177e4 805 struct hpets *hpetp;
1da177e4 806 struct hpet __iomem *hpet;
0ca01763 807 static struct hpets *last;
5761d64b 808 unsigned long period;
ba3f213f 809 unsigned long long temp;
f92a789d 810 u32 remainder;
1da177e4
LT
811
812 /*
813 * hpet_alloc can be called by platform dependent code.
3e6716e7
RD
814 * If platform dependent code has allocated the hpet that
815 * ACPI has also reported, then we catch it here.
1da177e4 816 */
3e6716e7
RD
817 if (hpet_is_known(hdp)) {
818 printk(KERN_DEBUG "%s: duplicate HPET ignored\n",
bf9d8929 819 __func__);
3e6716e7
RD
820 return 0;
821 }
1da177e4 822
98c49f17 823 hpetp = kzalloc(struct_size(hpetp, hp_dev, hdp->hd_nirqs),
401c9bd1 824 GFP_KERNEL);
1da177e4
LT
825
826 if (!hpetp)
827 return -ENOMEM;
828
1da177e4
LT
829 hpetp->hp_which = hpet_nhpet++;
830 hpetp->hp_hpet = hdp->hd_address;
831 hpetp->hp_hpet_phys = hdp->hd_phys_address;
832
833 hpetp->hp_ntimer = hdp->hd_nirqs;
e3f37a54 834
5761d64b
TG
835 for (i = 0; i < hdp->hd_nirqs; i++)
836 hpetp->hp_dev[i].hd_hdwirq = hdp->hd_irq[i];
37a47db8 837
5761d64b 838 hpet = hpetp->hp_hpet;
e3f37a54 839
1da177e4
LT
840 cap = readq(&hpet->hpet_cap);
841
842 ntimer = ((cap & HPET_NUM_TIM_CAP_MASK) >> HPET_NUM_TIM_CAP_SHIFT) + 1;
843
844 if (hpetp->hp_ntimer != ntimer) {
845 printk(KERN_WARNING "hpet: number irqs doesn't agree"
846 " with number of timers\n");
847 kfree(hpetp);
848 return -ENODEV;
849 }
850
851 if (last)
852 last->hp_next = hpetp;
853 else
854 hpets = hpetp;
855
856 last = hpetp;
857
ba3f213f
CL
858 period = (cap & HPET_COUNTER_CLK_PERIOD_MASK) >>
859 HPET_COUNTER_CLK_PERIOD_SHIFT; /* fs, 10^-15 */
860 temp = 1000000000000000uLL; /* 10^15 femtoseconds per second */
861 temp += period >> 1; /* round */
862 do_div(temp, period);
863 hpetp->hp_tick_freq = temp; /* ticks per second */
1da177e4 864
3034d11c
AK
865 printk(KERN_INFO "hpet%d: at MMIO 0x%lx, IRQ%s",
866 hpetp->hp_which, hdp->hd_phys_address,
1da177e4
LT
867 hpetp->hp_ntimer > 1 ? "s" : "");
868 for (i = 0; i < hpetp->hp_ntimer; i++)
5da527aa
KS
869 printk(KERN_CONT "%s %d", i > 0 ? "," : "", hdp->hd_irq[i]);
870 printk(KERN_CONT "\n");
1da177e4 871
f92a789d
DB
872 temp = hpetp->hp_tick_freq;
873 remainder = do_div(temp, 1000000);
64a76f66
DB
874 printk(KERN_INFO
875 "hpet%u: %u comparators, %d-bit %u.%06u MHz counter\n",
876 hpetp->hp_which, hpetp->hp_ntimer,
877 cap & HPET_COUNTER_SIZE_MASK ? 64 : 32,
f92a789d 878 (unsigned) temp, remainder);
1da177e4
LT
879
880 mcfg = readq(&hpet->hpet_config);
881 if ((mcfg & HPET_ENABLE_CNF_MASK) == 0) {
882 write_counter(0L, &hpet->hpet_mc);
883 mcfg |= HPET_ENABLE_CNF_MASK;
884 writeq(mcfg, &hpet->hpet_config);
885 }
886
642d30bb 887 for (i = 0, devp = hpetp->hp_dev; i < hpetp->hp_ntimer; i++, devp++) {
1da177e4
LT
888 struct hpet_timer __iomem *timer;
889
890 timer = &hpet->hpet_timers[devp - hpetp->hp_dev];
1da177e4
LT
891
892 devp->hd_hpets = hpetp;
893 devp->hd_hpet = hpet;
894 devp->hd_timer = timer;
895
896 /*
897 * If the timer was reserved by platform code,
898 * then make timer unavailable for opens.
899 */
900 if (hdp->hd_state & (1 << i)) {
901 devp->hd_flags = HPET_OPEN;
902 continue;
903 }
904
905 init_waitqueue_head(&devp->hd_waitqueue);
906 }
907
908 hpetp->hp_delta = hpet_calibrate(hpetp);
0aa366f3 909
3b2b64fd
LT
910/* This clocksource driver currently only works on ia64 */
911#ifdef CONFIG_IA64
0aa366f3
TL
912 if (!hpet_clocksource) {
913 hpet_mctr = (void __iomem *)&hpetp->hp_hpet->hpet_mc;
574c44fa 914 clocksource_hpet.archdata.fsys_mmio = hpet_mctr;
d60c3041 915 clocksource_register_hz(&clocksource_hpet, hpetp->hp_tick_freq);
0aa366f3
TL
916 hpetp->hp_clocksource = &clocksource_hpet;
917 hpet_clocksource = &clocksource_hpet;
918 }
3b2b64fd 919#endif
1da177e4
LT
920
921 return 0;
922}
923
924static acpi_status hpet_resources(struct acpi_resource *res, void *data)
925{
926 struct hpet_data *hdp;
927 acpi_status status;
928 struct acpi_resource_address64 addr;
1da177e4
LT
929
930 hdp = data;
931
932 status = acpi_resource_to_address64(res, &addr);
933
934 if (ACPI_SUCCESS(status)) {
a45de93e
LZ
935 hdp->hd_phys_address = addr.address.minimum;
936 hdp->hd_address = ioremap(addr.address.minimum, addr.address.address_length);
b11701c9
TS
937 if (!hdp->hd_address)
938 return AE_ERROR;
1da177e4 939
3e6716e7 940 if (hpet_is_known(hdp)) {
3e6716e7 941 iounmap(hdp->hd_address);
78e1ca49 942 return AE_ALREADY_EXISTS;
3e6716e7 943 }
50eca3eb
BM
944 } else if (res->type == ACPI_RESOURCE_TYPE_FIXED_MEMORY32) {
945 struct acpi_resource_fixed_memory32 *fixmem32;
757c4724
RD
946
947 fixmem32 = &res->data.fixed_memory32;
757c4724 948
50eca3eb
BM
949 hdp->hd_phys_address = fixmem32->address;
950 hdp->hd_address = ioremap(fixmem32->address,
757c4724 951 HPET_RANGE_SIZE);
b11701c9
TS
952 if (!hdp->hd_address)
953 return AE_ERROR;
757c4724 954
3e6716e7 955 if (hpet_is_known(hdp)) {
3e6716e7 956 iounmap(hdp->hd_address);
78e1ca49 957 return AE_ALREADY_EXISTS;
3e6716e7 958 }
50eca3eb
BM
959 } else if (res->type == ACPI_RESOURCE_TYPE_EXTENDED_IRQ) {
960 struct acpi_resource_extended_irq *irqp;
be5efffb 961 int i, irq;
1da177e4
LT
962
963 irqp = &res->data.extended_irq;
964
be5efffb 965 for (i = 0; i < irqp->interrupt_count; i++) {
2cf4e52e
CG
966 if (hdp->hd_nirqs >= HPET_MAX_TIMERS)
967 break;
968
a2f809b0 969 irq = acpi_register_gsi(NULL, irqp->interrupts[i],
7163ae16
CL
970 irqp->triggering,
971 irqp->polarity);
be5efffb
BH
972 if (irq < 0)
973 return AE_ERROR;
974
975 hdp->hd_irq[hdp->hd_nirqs] = irq;
976 hdp->hd_nirqs++;
1da177e4
LT
977 }
978 }
979
980 return AE_OK;
981}
982
983static int hpet_acpi_add(struct acpi_device *device)
984{
985 acpi_status result;
986 struct hpet_data data;
987
988 memset(&data, 0, sizeof(data));
989
990 result =
991 acpi_walk_resources(device->handle, METHOD_NAME__CRS,
992 hpet_resources, &data);
993
994 if (ACPI_FAILURE(result))
995 return -ENODEV;
996
997 if (!data.hd_address || !data.hd_nirqs) {
a56d5318
JS
998 if (data.hd_address)
999 iounmap(data.hd_address);
bf9d8929 1000 printk("%s: no address or irqs in _CRS\n", __func__);
1da177e4
LT
1001 return -ENODEV;
1002 }
1003
1004 return hpet_alloc(&data);
1005}
1006
1ba90e3a
TR
1007static const struct acpi_device_id hpet_device_ids[] = {
1008 {"PNP0103", 0},
1009 {"", 0},
1010};
1ba90e3a 1011
1da177e4
LT
1012static struct acpi_driver hpet_acpi_driver = {
1013 .name = "hpet",
1ba90e3a 1014 .ids = hpet_device_ids,
1da177e4
LT
1015 .ops = {
1016 .add = hpet_acpi_add,
1da177e4
LT
1017 },
1018};
1019
1020static struct miscdevice hpet_misc = { HPET_MINOR, "hpet", &hpet_fops };
1021
1022static int __init hpet_init(void)
1023{
1024 int result;
1025
1026 result = misc_register(&hpet_misc);
1027 if (result < 0)
1028 return -ENODEV;
1029
c8dd5541 1030 sysctl_header = register_sysctl("dev/hpet", hpet_table);
1da177e4
LT
1031
1032 result = acpi_bus_register_driver(&hpet_acpi_driver);
1033 if (result < 0) {
1034 if (sysctl_header)
1035 unregister_sysctl_table(sysctl_header);
1036 misc_deregister(&hpet_misc);
1037 return result;
1038 }
1039
1040 return 0;
1041}
a8cedfec 1042device_initcall(hpet_init);
1da177e4 1043
a8cedfec 1044/*
1da177e4
LT
1045MODULE_AUTHOR("Bob Picco <Robert.Picco@hp.com>");
1046MODULE_LICENSE("GPL");
a8cedfec 1047*/