drm: update radeon to 1.25 add r200 vertex program support
[linux-2.6-block.git] / drivers / char / drm / via_drv.h
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1/*
2 * Copyright 1998-2003 VIA Technologies, Inc. All Rights Reserved.
3 * Copyright 2001-2003 S3 Graphics, Inc. All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
11 *
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
14 * of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * VIA, S3 GRAPHICS, AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
23 */
24#ifndef _VIA_DRV_H_
25#define _VIA_DRV_H_
26
92514243 27#define DRIVER_AUTHOR "Various"
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28
29#define DRIVER_NAME "via"
30#define DRIVER_DESC "VIA Unichrome / Pro"
443448d0 31#define DRIVER_DATE "20051116"
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32
33#define DRIVER_MAJOR 2
92514243 34#define DRIVER_MINOR 7
443448d0 35#define DRIVER_PATCHLEVEL 4
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36
37#include "via_verifier.h"
38
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39#include "via_dmablit.h"
40
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41#define VIA_PCI_BUF_SIZE 60000
42#define VIA_FIRE_BUF_SIZE 1024
92514243 43#define VIA_NUM_IRQS 4
22f579c6 44
22f579c6 45typedef struct drm_via_ring_buffer {
92514243 46 drm_local_map_t map;
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47 char *virtual_start;
48} drm_via_ring_buffer_t;
49
50typedef uint32_t maskarray_t[5];
51
52typedef struct drm_via_irq {
53 atomic_t irq_received;
54 uint32_t pending_mask;
55 uint32_t enable_mask;
56 wait_queue_head_t irq_queue;
57} drm_via_irq_t;
b5e89ed5 58
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59typedef struct drm_via_private {
60 drm_via_sarea_t *sarea_priv;
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61 drm_local_map_t *sarea;
62 drm_local_map_t *fb;
63 drm_local_map_t *mmio;
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64 unsigned long agpAddr;
65 wait_queue_head_t decoder_queue[VIA_NR_XVMC_LOCKS];
66 char *dma_ptr;
67 unsigned int dma_low;
68 unsigned int dma_high;
69 unsigned int dma_offset;
70 uint32_t dma_wrap;
71 volatile uint32_t *last_pause_ptr;
72 volatile uint32_t *hw_addr_ptr;
73 drm_via_ring_buffer_t ring;
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74 struct timeval last_vblank;
75 int last_vblank_valid;
76 unsigned usec_per_vblank;
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77 drm_via_state_t hc_state;
78 char pci_buf[VIA_PCI_BUF_SIZE];
79 const uint32_t *fire_offsets[VIA_FIRE_BUF_SIZE];
80 uint32_t num_fire_offsets;
81 int pro_group_a;
82 drm_via_irq_t via_irqs[VIA_NUM_IRQS];
83 unsigned num_irqs;
84 maskarray_t *irq_masks;
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85 uint32_t irq_enable_mask;
86 uint32_t irq_pending_mask;
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87 int *irq_map;
88 drm_via_blitq_t blit_queues[VIA_NUM_BLIT_ENGINES];
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89} drm_via_private_t;
90
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91enum via_family {
92 VIA_OTHER = 0,
93 VIA_PRO_GROUP_A,
94};
95
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96/* VIA MMIO register access */
97#define VIA_BASE ((dev_priv->mmio))
98
99#define VIA_READ(reg) DRM_READ32(VIA_BASE, reg)
100#define VIA_WRITE(reg,val) DRM_WRITE32(VIA_BASE, reg, val)
101#define VIA_READ8(reg) DRM_READ8(VIA_BASE, reg)
102#define VIA_WRITE8(reg,val) DRM_WRITE8(VIA_BASE, reg, val)
103
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104extern drm_ioctl_desc_t via_ioctls[];
105extern int via_max_ioctl;
106
107extern int via_fb_init(DRM_IOCTL_ARGS);
108extern int via_mem_alloc(DRM_IOCTL_ARGS);
109extern int via_mem_free(DRM_IOCTL_ARGS);
110extern int via_agp_init(DRM_IOCTL_ARGS);
111extern int via_map_init(DRM_IOCTL_ARGS);
112extern int via_decoder_futex(DRM_IOCTL_ARGS);
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113extern int via_wait_irq(DRM_IOCTL_ARGS);
114extern int via_dma_blit_sync( DRM_IOCTL_ARGS );
115extern int via_dma_blit( DRM_IOCTL_ARGS );
116
117extern int via_driver_load(drm_device_t *dev, unsigned long chipset);
118extern int via_driver_unload(drm_device_t *dev);
119
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120extern int via_init_context(drm_device_t * dev, int context);
121extern int via_final_context(drm_device_t * dev, int context);
122
123extern int via_do_cleanup_map(drm_device_t * dev);
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124extern int via_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
125
126extern irqreturn_t via_driver_irq_handler(DRM_IRQ_ARGS);
127extern void via_driver_irq_preinstall(drm_device_t * dev);
128extern void via_driver_irq_postinstall(drm_device_t * dev);
129extern void via_driver_irq_uninstall(drm_device_t * dev);
130
131extern int via_dma_cleanup(drm_device_t * dev);
132extern void via_init_command_verifier(void);
133extern int via_driver_dma_quiescent(drm_device_t * dev);
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134extern void via_init_futex(drm_via_private_t * dev_priv);
135extern void via_cleanup_futex(drm_via_private_t * dev_priv);
136extern void via_release_futex(drm_via_private_t * dev_priv, int context);
22f579c6 137
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138extern void via_dmablit_handler(drm_device_t *dev, int engine, int from_irq);
139extern void via_init_dmablit(drm_device_t *dev);
b3a83639 140
22f579c6 141#endif