drm: lindent the drm directory.
[linux-2.6-block.git] / drivers / char / drm / mga_irq.c
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1da177e4
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1/* mga_irq.c -- IRQ handling for radeon -*- linux-c -*-
2 *
3 * Copyright (C) The Weather Channel, Inc. 2002. All Rights Reserved.
b5e89ed5 4 *
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5 * The Weather Channel (TM) funded Tungsten Graphics to develop the
6 * initial release of the Radeon 8500 driver under the XFree86 license.
7 * This notice must be preserved.
8 *
9 * Permission is hereby granted, free of charge, to any person obtaining a
10 * copy of this software and associated documentation files (the "Software"),
11 * to deal in the Software without restriction, including without limitation
12 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
13 * and/or sell copies of the Software, and to permit persons to whom the
14 * Software is furnished to do so, subject to the following conditions:
15 *
16 * The above copyright notice and this permission notice (including the next
17 * paragraph) shall be included in all copies or substantial portions of the
18 * Software.
19 *
20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
21 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
22 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
23 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
24 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
25 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
26 * DEALINGS IN THE SOFTWARE.
27 *
28 * Authors:
29 * Keith Whitwell <keith@tungstengraphics.com>
30 * Eric Anholt <anholt@FreeBSD.org>
31 */
32
33#include "drmP.h"
34#include "drm.h"
35#include "mga_drm.h"
36#include "mga_drv.h"
37
b5e89ed5 38irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
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39{
40 drm_device_t *dev = (drm_device_t *) arg;
b5e89ed5 41 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
1da177e4 42 int status;
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43 int handled = 0;
44
45 status = MGA_READ(MGA_STATUS);
1da177e4 46
1da177e4 47 /* VBLANK interrupt */
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48 if (status & MGA_VLINEPEN) {
49 MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
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50 atomic_inc(&dev->vbl_received);
51 DRM_WAKEUP(&dev->vbl_queue);
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52 drm_vbl_send_signals(dev);
53 handled = 1;
54 }
55
56 /* SOFTRAP interrupt */
57 if (status & MGA_SOFTRAPEN) {
58 const u32 prim_start = MGA_READ(MGA_PRIMADDRESS);
b5e89ed5 59 const u32 prim_end = MGA_READ(MGA_PRIMEND);
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60
61 MGA_WRITE(MGA_ICLEAR, MGA_SOFTRAPICLR);
62
63 /* In addition to clearing the interrupt-pending bit, we
64 * have to write to MGA_PRIMEND to re-start the DMA operation.
65 */
b5e89ed5 66 if ((prim_start & ~0x03) != (prim_end & ~0x03)) {
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67 MGA_WRITE(MGA_PRIMEND, prim_end);
68 }
69
70 atomic_inc(&dev_priv->last_fence_retired);
71 DRM_WAKEUP(&dev_priv->fence_queue);
72 handled = 1;
73 }
74
b5e89ed5 75 if (handled) {
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76 return IRQ_HANDLED;
77 }
78 return IRQ_NONE;
79}
80
b5e89ed5 81int mga_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
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82{
83 unsigned int cur_vblank;
84 int ret = 0;
85
86 /* Assume that the user has missed the current sequence number
87 * by about a day rather than she wants to wait for years
b5e89ed5 88 * using vertical blanks...
1da177e4 89 */
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90 DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
91 (((cur_vblank = atomic_read(&dev->vbl_received))
92 - *sequence) <= (1 << 23)));
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93
94 *sequence = cur_vblank;
95
96 return ret;
97}
98
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99int mga_driver_fence_wait(drm_device_t * dev, unsigned int *sequence)
100{
101 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
102 unsigned int cur_fence;
103 int ret = 0;
104
105 /* Assume that the user has missed the current sequence number
106 * by about a day rather than she wants to wait for years
107 * using fences.
108 */
109 DRM_WAIT_ON(ret, dev_priv->fence_queue, 3 * DRM_HZ,
110 (((cur_fence = atomic_read(&dev_priv->last_fence_retired))
111 - *sequence) <= (1 << 23)));
112
113 *sequence = cur_fence;
114
115 return ret;
116}
117
118void mga_driver_irq_preinstall(drm_device_t * dev)
119{
120 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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121
122 /* Disable *all* interrupts */
b5e89ed5 123 MGA_WRITE(MGA_IEN, 0);
1da177e4 124 /* Clear bits if they're already high */
b5e89ed5 125 MGA_WRITE(MGA_ICLEAR, ~0);
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126}
127
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128void mga_driver_irq_postinstall(drm_device_t * dev)
129{
130 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
131
b5e89ed5 132 DRM_INIT_WAITQUEUE(&dev_priv->fence_queue);
1da177e4 133
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134 /* Turn on vertical blank interrupt and soft trap interrupt. */
135 MGA_WRITE(MGA_IEN, MGA_VLINEIEN | MGA_SOFTRAPEN);
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136}
137
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138void mga_driver_irq_uninstall(drm_device_t * dev)
139{
140 drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
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141 if (!dev_priv)
142 return;
143
144 /* Disable *all* interrupts */
6795c985 145 MGA_WRITE(MGA_IEN, 0);
b5e89ed5 146
6795c985 147 dev->irq_enabled = 0;
1da177e4 148}