Commit | Line | Data |
---|---|---|
0d6aa60b | 1 | /* i915_irq.c -- IRQ support for the I915 -*- linux-c -*- |
1da177e4 | 2 | */ |
0d6aa60b | 3 | /* |
1da177e4 LT |
4 | * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas. |
5 | * All Rights Reserved. | |
bc54fd1a DA |
6 | * |
7 | * Permission is hereby granted, free of charge, to any person obtaining a | |
8 | * copy of this software and associated documentation files (the | |
9 | * "Software"), to deal in the Software without restriction, including | |
10 | * without limitation the rights to use, copy, modify, merge, publish, | |
11 | * distribute, sub license, and/or sell copies of the Software, and to | |
12 | * permit persons to whom the Software is furnished to do so, subject to | |
13 | * the following conditions: | |
14 | * | |
15 | * The above copyright notice and this permission notice (including the | |
16 | * next paragraph) shall be included in all copies or substantial portions | |
17 | * of the Software. | |
18 | * | |
19 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS | |
20 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF | |
21 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. | |
22 | * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR | |
23 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, | |
24 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE | |
25 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. | |
26 | * | |
0d6aa60b | 27 | */ |
1da177e4 LT |
28 | |
29 | #include "drmP.h" | |
30 | #include "drm.h" | |
31 | #include "i915_drm.h" | |
32 | #include "i915_drv.h" | |
33 | ||
0d6aa60b DA |
34 | #define USER_INT_FLAG (1<<1) |
35 | #define VSYNC_PIPEB_FLAG (1<<5) | |
36 | #define VSYNC_PIPEA_FLAG (1<<7) | |
37 | ||
1da177e4 | 38 | #define MAX_NOPID ((u32)~0) |
1da177e4 | 39 | |
a6b54f3f MCA |
40 | /** |
41 | * Emit blits for scheduled buffer swaps. | |
42 | * | |
43 | * This function will be called with the HW lock held. | |
44 | */ | |
84b1fd10 | 45 | static void i915_vblank_tasklet(struct drm_device *dev) |
a6b54f3f MCA |
46 | { |
47 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
a0b136bb | 48 | unsigned long irqflags; |
3188a24c MCA |
49 | struct list_head *list, *tmp, hits, *hit; |
50 | int nhits, nrects, slice[2], upper[2], lower[2], i; | |
51 | unsigned counter[2] = { atomic_read(&dev->vbl_received), | |
52 | atomic_read(&dev->vbl_received2) }; | |
c60ce623 | 53 | struct drm_drawable_info *drw; |
3188a24c MCA |
54 | drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv; |
55 | u32 cpp = dev_priv->cpp; | |
56 | u32 cmd = (cpp == 4) ? (XY_SRC_COPY_BLT_CMD | | |
57 | XY_SRC_COPY_BLT_WRITE_ALPHA | | |
58 | XY_SRC_COPY_BLT_WRITE_RGB) | |
59 | : XY_SRC_COPY_BLT_CMD; | |
60 | u32 pitchropcpp = (sarea_priv->pitch * cpp) | (0xcc << 16) | | |
61 | (cpp << 23) | (1 << 24); | |
62 | RING_LOCALS; | |
a6b54f3f MCA |
63 | |
64 | DRM_DEBUG("\n"); | |
65 | ||
3188a24c MCA |
66 | INIT_LIST_HEAD(&hits); |
67 | ||
68 | nhits = nrects = 0; | |
69 | ||
a6b54f3f MCA |
70 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); |
71 | ||
3188a24c | 72 | /* Find buffer swaps scheduled for this vertical blank */ |
a6b54f3f MCA |
73 | list_for_each_safe(list, tmp, &dev_priv->vbl_swaps.head) { |
74 | drm_i915_vbl_swap_t *vbl_swap = | |
75 | list_entry(list, drm_i915_vbl_swap_t, head); | |
a6b54f3f | 76 | |
3188a24c MCA |
77 | if ((counter[vbl_swap->pipe] - vbl_swap->sequence) > (1<<23)) |
78 | continue; | |
79 | ||
80 | list_del(list); | |
81 | dev_priv->swaps_pending--; | |
82 | ||
83 | spin_unlock(&dev_priv->swaps_lock); | |
84 | spin_lock(&dev->drw_lock); | |
a6b54f3f | 85 | |
3188a24c | 86 | drw = drm_get_drawable_info(dev, vbl_swap->drw_id); |
a6b54f3f | 87 | |
3188a24c MCA |
88 | if (!drw) { |
89 | spin_unlock(&dev->drw_lock); | |
90 | drm_free(vbl_swap, sizeof(*vbl_swap), DRM_MEM_DRIVER); | |
91 | spin_lock(&dev_priv->swaps_lock); | |
92 | continue; | |
93 | } | |
a6b54f3f | 94 | |
3188a24c MCA |
95 | list_for_each(hit, &hits) { |
96 | drm_i915_vbl_swap_t *swap_cmp = | |
97 | list_entry(hit, drm_i915_vbl_swap_t, head); | |
c60ce623 | 98 | struct drm_drawable_info *drw_cmp = |
3188a24c | 99 | drm_get_drawable_info(dev, swap_cmp->drw_id); |
a6b54f3f | 100 | |
3188a24c MCA |
101 | if (drw_cmp && |
102 | drw_cmp->rects[0].y1 > drw->rects[0].y1) { | |
103 | list_add_tail(list, hit); | |
104 | break; | |
a6b54f3f | 105 | } |
3188a24c | 106 | } |
a6b54f3f | 107 | |
3188a24c | 108 | spin_unlock(&dev->drw_lock); |
a6b54f3f | 109 | |
3188a24c MCA |
110 | /* List of hits was empty, or we reached the end of it */ |
111 | if (hit == &hits) | |
112 | list_add_tail(list, hits.prev); | |
a6b54f3f | 113 | |
3188a24c | 114 | nhits++; |
a6b54f3f | 115 | |
3188a24c MCA |
116 | spin_lock(&dev_priv->swaps_lock); |
117 | } | |
118 | ||
119 | if (nhits == 0) { | |
120 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
121 | return; | |
122 | } | |
123 | ||
124 | spin_unlock(&dev_priv->swaps_lock); | |
125 | ||
126 | i915_kernel_lost_context(dev); | |
127 | ||
128 | BEGIN_LP_RING(6); | |
129 | ||
130 | OUT_RING(GFX_OP_DRAWRECT_INFO); | |
131 | OUT_RING(0); | |
132 | OUT_RING(0); | |
133 | OUT_RING(sarea_priv->width | sarea_priv->height << 16); | |
134 | OUT_RING(sarea_priv->width | sarea_priv->height << 16); | |
135 | OUT_RING(0); | |
a6b54f3f | 136 | |
3188a24c MCA |
137 | ADVANCE_LP_RING(); |
138 | ||
139 | sarea_priv->ctxOwner = DRM_KERNEL_CONTEXT; | |
140 | ||
141 | upper[0] = upper[1] = 0; | |
142 | slice[0] = max(sarea_priv->pipeA_h / nhits, 1); | |
143 | slice[1] = max(sarea_priv->pipeB_h / nhits, 1); | |
144 | lower[0] = sarea_priv->pipeA_y + slice[0]; | |
145 | lower[1] = sarea_priv->pipeB_y + slice[0]; | |
146 | ||
147 | spin_lock(&dev->drw_lock); | |
148 | ||
149 | /* Emit blits for buffer swaps, partitioning both outputs into as many | |
150 | * slices as there are buffer swaps scheduled in order to avoid tearing | |
151 | * (based on the assumption that a single buffer swap would always | |
152 | * complete before scanout starts). | |
153 | */ | |
154 | for (i = 0; i++ < nhits; | |
155 | upper[0] = lower[0], lower[0] += slice[0], | |
156 | upper[1] = lower[1], lower[1] += slice[1]) { | |
157 | if (i == nhits) | |
158 | lower[0] = lower[1] = sarea_priv->height; | |
159 | ||
160 | list_for_each(hit, &hits) { | |
161 | drm_i915_vbl_swap_t *swap_hit = | |
162 | list_entry(hit, drm_i915_vbl_swap_t, head); | |
c60ce623 | 163 | struct drm_clip_rect *rect; |
3188a24c MCA |
164 | int num_rects, pipe; |
165 | unsigned short top, bottom; | |
166 | ||
167 | drw = drm_get_drawable_info(dev, swap_hit->drw_id); | |
168 | ||
169 | if (!drw) | |
170 | continue; | |
171 | ||
172 | rect = drw->rects; | |
173 | pipe = swap_hit->pipe; | |
174 | top = upper[pipe]; | |
175 | bottom = lower[pipe]; | |
176 | ||
177 | for (num_rects = drw->num_rects; num_rects--; rect++) { | |
178 | int y1 = max(rect->y1, top); | |
179 | int y2 = min(rect->y2, bottom); | |
180 | ||
181 | if (y1 >= y2) | |
182 | continue; | |
183 | ||
184 | BEGIN_LP_RING(8); | |
185 | ||
186 | OUT_RING(cmd); | |
187 | OUT_RING(pitchropcpp); | |
188 | OUT_RING((y1 << 16) | rect->x1); | |
189 | OUT_RING((y2 << 16) | rect->x2); | |
190 | OUT_RING(sarea_priv->front_offset); | |
191 | OUT_RING((y1 << 16) | rect->x1); | |
192 | OUT_RING(pitchropcpp & 0xffff); | |
193 | OUT_RING(sarea_priv->back_offset); | |
194 | ||
195 | ADVANCE_LP_RING(); | |
196 | } | |
a6b54f3f MCA |
197 | } |
198 | } | |
199 | ||
3188a24c MCA |
200 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); |
201 | ||
202 | list_for_each_safe(hit, tmp, &hits) { | |
203 | drm_i915_vbl_swap_t *swap_hit = | |
204 | list_entry(hit, drm_i915_vbl_swap_t, head); | |
205 | ||
206 | list_del(hit); | |
207 | ||
208 | drm_free(swap_hit, sizeof(*swap_hit), DRM_MEM_DRIVER); | |
209 | } | |
a6b54f3f MCA |
210 | } |
211 | ||
1da177e4 LT |
212 | irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS) |
213 | { | |
84b1fd10 | 214 | struct drm_device *dev = (struct drm_device *) arg; |
1da177e4 LT |
215 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; |
216 | u16 temp; | |
e4a7b1d1 DA |
217 | u32 pipea_stats, pipeb_stats; |
218 | ||
219 | pipea_stats = I915_READ(I915REG_PIPEASTAT); | |
220 | pipeb_stats = I915_READ(I915REG_PIPEBSTAT); | |
1da177e4 LT |
221 | |
222 | temp = I915_READ16(I915REG_INT_IDENTITY_R); | |
702880f2 DA |
223 | |
224 | temp &= (USER_INT_FLAG | VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG); | |
1da177e4 LT |
225 | |
226 | DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp); | |
227 | ||
228 | if (temp == 0) | |
229 | return IRQ_NONE; | |
230 | ||
231 | I915_WRITE16(I915REG_INT_IDENTITY_R, temp); | |
e4a7b1d1 DA |
232 | (void) I915_READ16(I915REG_INT_IDENTITY_R); |
233 | DRM_READMEMORYBARRIER(); | |
0d6aa60b | 234 | |
6e5fca53 DA |
235 | dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); |
236 | ||
0d6aa60b DA |
237 | if (temp & USER_INT_FLAG) |
238 | DRM_WAKEUP(&dev_priv->irq_queue); | |
239 | ||
702880f2 | 240 | if (temp & (VSYNC_PIPEA_FLAG | VSYNC_PIPEB_FLAG)) { |
2228ed67 MCA |
241 | int vblank_pipe = dev_priv->vblank_pipe; |
242 | ||
243 | if ((vblank_pipe & | |
68815bad MCA |
244 | (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) |
245 | == (DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B)) { | |
246 | if (temp & VSYNC_PIPEA_FLAG) | |
247 | atomic_inc(&dev->vbl_received); | |
248 | if (temp & VSYNC_PIPEB_FLAG) | |
249 | atomic_inc(&dev->vbl_received2); | |
2228ed67 MCA |
250 | } else if (((temp & VSYNC_PIPEA_FLAG) && |
251 | (vblank_pipe & DRM_I915_VBLANK_PIPE_A)) || | |
252 | ((temp & VSYNC_PIPEB_FLAG) && | |
253 | (vblank_pipe & DRM_I915_VBLANK_PIPE_B))) | |
68815bad MCA |
254 | atomic_inc(&dev->vbl_received); |
255 | ||
0d6aa60b DA |
256 | DRM_WAKEUP(&dev->vbl_queue); |
257 | drm_vbl_send_signals(dev); | |
a6b54f3f | 258 | |
2228ed67 MCA |
259 | if (dev_priv->swaps_pending > 0) |
260 | drm_locked_tasklet(dev, i915_vblank_tasklet); | |
e4a7b1d1 DA |
261 | I915_WRITE(I915REG_PIPEASTAT, |
262 | pipea_stats|I915_VBLANK_INTERRUPT_ENABLE| | |
263 | I915_VBLANK_CLEAR); | |
264 | I915_WRITE(I915REG_PIPEBSTAT, | |
265 | pipeb_stats|I915_VBLANK_INTERRUPT_ENABLE| | |
266 | I915_VBLANK_CLEAR); | |
0d6aa60b | 267 | } |
1da177e4 LT |
268 | |
269 | return IRQ_HANDLED; | |
270 | } | |
271 | ||
84b1fd10 | 272 | static int i915_emit_irq(struct drm_device * dev) |
1da177e4 LT |
273 | { |
274 | drm_i915_private_t *dev_priv = dev->dev_private; | |
1da177e4 LT |
275 | RING_LOCALS; |
276 | ||
277 | i915_kernel_lost_context(dev); | |
278 | ||
3e684eae | 279 | DRM_DEBUG("\n"); |
1da177e4 | 280 | |
c29b669c | 281 | dev_priv->sarea_priv->last_enqueue = ++dev_priv->counter; |
1da177e4 | 282 | |
c29b669c AH |
283 | if (dev_priv->counter > 0x7FFFFFFFUL) |
284 | dev_priv->sarea_priv->last_enqueue = dev_priv->counter = 1; | |
285 | ||
286 | BEGIN_LP_RING(6); | |
287 | OUT_RING(CMD_STORE_DWORD_IDX); | |
288 | OUT_RING(20); | |
289 | OUT_RING(dev_priv->counter); | |
290 | OUT_RING(0); | |
1da177e4 LT |
291 | OUT_RING(0); |
292 | OUT_RING(GFX_OP_USER_INTERRUPT); | |
293 | ADVANCE_LP_RING(); | |
bc5f4523 | 294 | |
c29b669c | 295 | return dev_priv->counter; |
1da177e4 LT |
296 | } |
297 | ||
84b1fd10 | 298 | static int i915_wait_irq(struct drm_device * dev, int irq_nr) |
1da177e4 LT |
299 | { |
300 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
301 | int ret = 0; | |
302 | ||
3e684eae | 303 | DRM_DEBUG("irq_nr=%d breadcrumb=%d\n", irq_nr, |
1da177e4 LT |
304 | READ_BREADCRUMB(dev_priv)); |
305 | ||
306 | if (READ_BREADCRUMB(dev_priv) >= irq_nr) | |
307 | return 0; | |
308 | ||
309 | dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT; | |
310 | ||
311 | DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ, | |
312 | READ_BREADCRUMB(dev_priv) >= irq_nr); | |
313 | ||
20caafa6 | 314 | if (ret == -EBUSY) { |
3e684eae | 315 | DRM_ERROR("EBUSY -- rec: %d emitted: %d\n", |
1da177e4 LT |
316 | READ_BREADCRUMB(dev_priv), (int)dev_priv->counter); |
317 | } | |
318 | ||
319 | dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv); | |
320 | return ret; | |
321 | } | |
322 | ||
84b1fd10 | 323 | static int i915_driver_vblank_do_wait(struct drm_device *dev, unsigned int *sequence, |
68815bad | 324 | atomic_t *counter) |
0d6aa60b DA |
325 | { |
326 | drm_i915_private_t *dev_priv = dev->dev_private; | |
327 | unsigned int cur_vblank; | |
328 | int ret = 0; | |
329 | ||
330 | if (!dev_priv) { | |
3e684eae | 331 | DRM_ERROR("called with no initialization\n"); |
20caafa6 | 332 | return -EINVAL; |
0d6aa60b DA |
333 | } |
334 | ||
335 | DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ, | |
68815bad | 336 | (((cur_vblank = atomic_read(counter)) |
0d6aa60b | 337 | - *sequence) <= (1<<23))); |
bc5f4523 | 338 | |
0d6aa60b DA |
339 | *sequence = cur_vblank; |
340 | ||
341 | return ret; | |
342 | } | |
343 | ||
344 | ||
84b1fd10 | 345 | int i915_driver_vblank_wait(struct drm_device *dev, unsigned int *sequence) |
68815bad MCA |
346 | { |
347 | return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received); | |
348 | } | |
349 | ||
84b1fd10 | 350 | int i915_driver_vblank_wait2(struct drm_device *dev, unsigned int *sequence) |
68815bad MCA |
351 | { |
352 | return i915_driver_vblank_do_wait(dev, sequence, &dev->vbl_received2); | |
353 | } | |
354 | ||
1da177e4 LT |
355 | /* Needs the lock as it touches the ring. |
356 | */ | |
c153f45f EA |
357 | int i915_irq_emit(struct drm_device *dev, void *data, |
358 | struct drm_file *file_priv) | |
1da177e4 | 359 | { |
1da177e4 | 360 | drm_i915_private_t *dev_priv = dev->dev_private; |
c153f45f | 361 | drm_i915_irq_emit_t *emit = data; |
1da177e4 LT |
362 | int result; |
363 | ||
6c340eac | 364 | LOCK_TEST_WITH_RETURN(dev, file_priv); |
1da177e4 LT |
365 | |
366 | if (!dev_priv) { | |
3e684eae | 367 | DRM_ERROR("called with no initialization\n"); |
20caafa6 | 368 | return -EINVAL; |
1da177e4 LT |
369 | } |
370 | ||
1da177e4 LT |
371 | result = i915_emit_irq(dev); |
372 | ||
c153f45f | 373 | if (DRM_COPY_TO_USER(emit->irq_seq, &result, sizeof(int))) { |
1da177e4 | 374 | DRM_ERROR("copy_to_user\n"); |
20caafa6 | 375 | return -EFAULT; |
1da177e4 LT |
376 | } |
377 | ||
378 | return 0; | |
379 | } | |
380 | ||
381 | /* Doesn't need the hardware lock. | |
382 | */ | |
c153f45f EA |
383 | int i915_irq_wait(struct drm_device *dev, void *data, |
384 | struct drm_file *file_priv) | |
1da177e4 | 385 | { |
1da177e4 | 386 | drm_i915_private_t *dev_priv = dev->dev_private; |
c153f45f | 387 | drm_i915_irq_wait_t *irqwait = data; |
1da177e4 LT |
388 | |
389 | if (!dev_priv) { | |
3e684eae | 390 | DRM_ERROR("called with no initialization\n"); |
20caafa6 | 391 | return -EINVAL; |
1da177e4 LT |
392 | } |
393 | ||
c153f45f | 394 | return i915_wait_irq(dev, irqwait->irq_seq); |
1da177e4 LT |
395 | } |
396 | ||
84b1fd10 | 397 | static void i915_enable_interrupt (struct drm_device *dev) |
702880f2 DA |
398 | { |
399 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
400 | u16 flag; | |
401 | ||
402 | flag = 0; | |
403 | if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_A) | |
404 | flag |= VSYNC_PIPEA_FLAG; | |
405 | if (dev_priv->vblank_pipe & DRM_I915_VBLANK_PIPE_B) | |
406 | flag |= VSYNC_PIPEB_FLAG; | |
5b51694a | 407 | |
702880f2 | 408 | I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG | flag); |
702880f2 DA |
409 | } |
410 | ||
411 | /* Set the vblank monitor pipe | |
412 | */ | |
c153f45f EA |
413 | int i915_vblank_pipe_set(struct drm_device *dev, void *data, |
414 | struct drm_file *file_priv) | |
702880f2 | 415 | { |
702880f2 | 416 | drm_i915_private_t *dev_priv = dev->dev_private; |
c153f45f | 417 | drm_i915_vblank_pipe_t *pipe = data; |
702880f2 DA |
418 | |
419 | if (!dev_priv) { | |
3e684eae | 420 | DRM_ERROR("called with no initialization\n"); |
20caafa6 | 421 | return -EINVAL; |
702880f2 DA |
422 | } |
423 | ||
c153f45f | 424 | if (pipe->pipe & ~(DRM_I915_VBLANK_PIPE_A|DRM_I915_VBLANK_PIPE_B)) { |
3e684eae | 425 | DRM_ERROR("called with invalid pipe 0x%x\n", pipe->pipe); |
20caafa6 | 426 | return -EINVAL; |
5b51694a MCA |
427 | } |
428 | ||
c153f45f | 429 | dev_priv->vblank_pipe = pipe->pipe; |
5b51694a MCA |
430 | |
431 | i915_enable_interrupt (dev); | |
432 | ||
433 | return 0; | |
702880f2 DA |
434 | } |
435 | ||
c153f45f EA |
436 | int i915_vblank_pipe_get(struct drm_device *dev, void *data, |
437 | struct drm_file *file_priv) | |
702880f2 | 438 | { |
702880f2 | 439 | drm_i915_private_t *dev_priv = dev->dev_private; |
c153f45f | 440 | drm_i915_vblank_pipe_t *pipe = data; |
702880f2 DA |
441 | u16 flag; |
442 | ||
443 | if (!dev_priv) { | |
3e684eae | 444 | DRM_ERROR("called with no initialization\n"); |
20caafa6 | 445 | return -EINVAL; |
702880f2 DA |
446 | } |
447 | ||
448 | flag = I915_READ(I915REG_INT_ENABLE_R); | |
c153f45f | 449 | pipe->pipe = 0; |
702880f2 | 450 | if (flag & VSYNC_PIPEA_FLAG) |
c153f45f | 451 | pipe->pipe |= DRM_I915_VBLANK_PIPE_A; |
702880f2 | 452 | if (flag & VSYNC_PIPEB_FLAG) |
c153f45f EA |
453 | pipe->pipe |= DRM_I915_VBLANK_PIPE_B; |
454 | ||
702880f2 DA |
455 | return 0; |
456 | } | |
457 | ||
a6b54f3f MCA |
458 | /** |
459 | * Schedule buffer swap at given vertical blank. | |
460 | */ | |
c153f45f EA |
461 | int i915_vblank_swap(struct drm_device *dev, void *data, |
462 | struct drm_file *file_priv) | |
a6b54f3f | 463 | { |
a6b54f3f | 464 | drm_i915_private_t *dev_priv = dev->dev_private; |
c153f45f | 465 | drm_i915_vblank_swap_t *swap = data; |
a6b54f3f | 466 | drm_i915_vbl_swap_t *vbl_swap; |
a0b136bb MCA |
467 | unsigned int pipe, seqtype, curseq; |
468 | unsigned long irqflags; | |
a6b54f3f MCA |
469 | struct list_head *list; |
470 | ||
471 | if (!dev_priv) { | |
472 | DRM_ERROR("%s called with no initialization\n", __func__); | |
20caafa6 | 473 | return -EINVAL; |
a6b54f3f MCA |
474 | } |
475 | ||
476 | if (dev_priv->sarea_priv->rotation) { | |
477 | DRM_DEBUG("Rotation not supported\n"); | |
20caafa6 | 478 | return -EINVAL; |
a6b54f3f MCA |
479 | } |
480 | ||
c153f45f | 481 | if (swap->seqtype & ~(_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE | |
2228ed67 | 482 | _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS)) { |
c153f45f | 483 | DRM_ERROR("Invalid sequence type 0x%x\n", swap->seqtype); |
20caafa6 | 484 | return -EINVAL; |
541f29aa MCA |
485 | } |
486 | ||
c153f45f | 487 | pipe = (swap->seqtype & _DRM_VBLANK_SECONDARY) ? 1 : 0; |
541f29aa | 488 | |
c153f45f | 489 | seqtype = swap->seqtype & (_DRM_VBLANK_RELATIVE | _DRM_VBLANK_ABSOLUTE); |
541f29aa | 490 | |
541f29aa MCA |
491 | if (!(dev_priv->vblank_pipe & (1 << pipe))) { |
492 | DRM_ERROR("Invalid pipe %d\n", pipe); | |
20caafa6 | 493 | return -EINVAL; |
a6b54f3f MCA |
494 | } |
495 | ||
496 | spin_lock_irqsave(&dev->drw_lock, irqflags); | |
497 | ||
c153f45f | 498 | if (!drm_get_drawable_info(dev, swap->drawable)) { |
a6b54f3f | 499 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); |
c153f45f | 500 | DRM_DEBUG("Invalid drawable ID %d\n", swap->drawable); |
20caafa6 | 501 | return -EINVAL; |
a6b54f3f MCA |
502 | } |
503 | ||
504 | spin_unlock_irqrestore(&dev->drw_lock, irqflags); | |
505 | ||
541f29aa MCA |
506 | curseq = atomic_read(pipe ? &dev->vbl_received2 : &dev->vbl_received); |
507 | ||
2228ed67 | 508 | if (seqtype == _DRM_VBLANK_RELATIVE) |
c153f45f | 509 | swap->sequence += curseq; |
2228ed67 | 510 | |
c153f45f EA |
511 | if ((curseq - swap->sequence) <= (1<<23)) { |
512 | if (swap->seqtype & _DRM_VBLANK_NEXTONMISS) { | |
513 | swap->sequence = curseq + 1; | |
2228ed67 | 514 | } else { |
541f29aa | 515 | DRM_DEBUG("Missed target sequence\n"); |
20caafa6 | 516 | return -EINVAL; |
541f29aa | 517 | } |
541f29aa MCA |
518 | } |
519 | ||
2228ed67 MCA |
520 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); |
521 | ||
a6b54f3f MCA |
522 | list_for_each(list, &dev_priv->vbl_swaps.head) { |
523 | vbl_swap = list_entry(list, drm_i915_vbl_swap_t, head); | |
524 | ||
c153f45f | 525 | if (vbl_swap->drw_id == swap->drawable && |
541f29aa | 526 | vbl_swap->pipe == pipe && |
c153f45f | 527 | vbl_swap->sequence == swap->sequence) { |
a6b54f3f MCA |
528 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); |
529 | DRM_DEBUG("Already scheduled\n"); | |
530 | return 0; | |
531 | } | |
532 | } | |
533 | ||
534 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
535 | ||
21fa60ed MCA |
536 | if (dev_priv->swaps_pending >= 100) { |
537 | DRM_DEBUG("Too many swaps queued\n"); | |
20caafa6 | 538 | return -EBUSY; |
21fa60ed MCA |
539 | } |
540 | ||
54583bf4 | 541 | vbl_swap = drm_calloc(1, sizeof(*vbl_swap), DRM_MEM_DRIVER); |
a6b54f3f MCA |
542 | |
543 | if (!vbl_swap) { | |
544 | DRM_ERROR("Failed to allocate memory to queue swap\n"); | |
20caafa6 | 545 | return -ENOMEM; |
a6b54f3f MCA |
546 | } |
547 | ||
548 | DRM_DEBUG("\n"); | |
549 | ||
c153f45f | 550 | vbl_swap->drw_id = swap->drawable; |
541f29aa | 551 | vbl_swap->pipe = pipe; |
c153f45f | 552 | vbl_swap->sequence = swap->sequence; |
a6b54f3f MCA |
553 | |
554 | spin_lock_irqsave(&dev_priv->swaps_lock, irqflags); | |
555 | ||
d5b0d1b5 | 556 | list_add_tail(&vbl_swap->head, &dev_priv->vbl_swaps.head); |
a6b54f3f MCA |
557 | dev_priv->swaps_pending++; |
558 | ||
559 | spin_unlock_irqrestore(&dev_priv->swaps_lock, irqflags); | |
560 | ||
561 | return 0; | |
562 | } | |
563 | ||
1da177e4 LT |
564 | /* drm_dma.h hooks |
565 | */ | |
84b1fd10 | 566 | void i915_driver_irq_preinstall(struct drm_device * dev) |
1da177e4 LT |
567 | { |
568 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
569 | ||
570 | I915_WRITE16(I915REG_HWSTAM, 0xfffe); | |
571 | I915_WRITE16(I915REG_INT_MASK_R, 0x0); | |
572 | I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); | |
573 | } | |
574 | ||
84b1fd10 | 575 | void i915_driver_irq_postinstall(struct drm_device * dev) |
1da177e4 LT |
576 | { |
577 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
578 | ||
a6399bdd | 579 | spin_lock_init(&dev_priv->swaps_lock); |
a6b54f3f MCA |
580 | INIT_LIST_HEAD(&dev_priv->vbl_swaps.head); |
581 | dev_priv->swaps_pending = 0; | |
582 | ||
5b51694a MCA |
583 | if (!dev_priv->vblank_pipe) |
584 | dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A; | |
702880f2 | 585 | i915_enable_interrupt(dev); |
1da177e4 LT |
586 | DRM_INIT_WAITQUEUE(&dev_priv->irq_queue); |
587 | } | |
588 | ||
84b1fd10 | 589 | void i915_driver_irq_uninstall(struct drm_device * dev) |
1da177e4 LT |
590 | { |
591 | drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; | |
91e3738e DA |
592 | u16 temp; |
593 | ||
1da177e4 LT |
594 | if (!dev_priv) |
595 | return; | |
596 | ||
597 | I915_WRITE16(I915REG_HWSTAM, 0xffff); | |
598 | I915_WRITE16(I915REG_INT_MASK_R, 0xffff); | |
599 | I915_WRITE16(I915REG_INT_ENABLE_R, 0x0); | |
91e3738e DA |
600 | |
601 | temp = I915_READ16(I915REG_INT_IDENTITY_R); | |
602 | I915_WRITE16(I915REG_INT_IDENTITY_R, temp); | |
1da177e4 | 603 | } |