Use helpers to obtain task pid in printks
[linux-2.6-block.git] / drivers / char / drm / i810_dma.c
CommitLineData
1da177e4
LT
1/* i810_dma.c -- DMA support for the i810 -*- linux-c -*-
2 * Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
3 *
4 * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
5 * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
6 * All Rights Reserved.
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a
9 * copy of this software and associated documentation files (the "Software"),
10 * to deal in the Software without restriction, including without limitation
11 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
12 * and/or sell copies of the Software, and to permit persons to whom the
13 * Software is furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the next
16 * paragraph) shall be included in all copies or substantial portions of the
17 * Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
23 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
24 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
25 * DEALINGS IN THE SOFTWARE.
26 *
27 * Authors: Rickard E. (Rik) Faith <faith@valinux.com>
28 * Jeff Hartmann <jhartmann@valinux.com>
29 * Keith Whitwell <keith@tungstengraphics.com>
30 *
31 */
32
33#include "drmP.h"
34#include "drm.h"
35#include "i810_drm.h"
36#include "i810_drv.h"
37#include <linux/interrupt.h> /* For task queue support */
38#include <linux/delay.h>
39#include <linux/pagemap.h>
40
41#define I810_BUF_FREE 2
42#define I810_BUF_CLIENT 1
43#define I810_BUF_HARDWARE 0
44
45#define I810_BUF_UNMAPPED 0
46#define I810_BUF_MAPPED 1
47
056219e2 48static struct drm_buf *i810_freelist_get(struct drm_device * dev)
1da177e4 49{
cdd55a29 50 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
51 int i;
52 int used;
1da177e4
LT
53
54 /* Linear search might not be the best solution */
55
b5e89ed5 56 for (i = 0; i < dma->buf_count; i++) {
056219e2 57 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 58 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 59 /* In use is already a pointer */
b5e89ed5 60 used = cmpxchg(buf_priv->in_use, I810_BUF_FREE,
1da177e4
LT
61 I810_BUF_CLIENT);
62 if (used == I810_BUF_FREE) {
63 return buf;
64 }
65 }
b5e89ed5 66 return NULL;
1da177e4
LT
67}
68
69/* This should only be called if the buffer is not sent to the hardware
70 * yet, the hardware updates in use for us once its on the ring buffer.
71 */
72
056219e2 73static int i810_freelist_put(struct drm_device * dev, struct drm_buf * buf)
1da177e4 74{
b5e89ed5
DA
75 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
76 int used;
1da177e4 77
b5e89ed5
DA
78 /* In use is already a pointer */
79 used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_FREE);
1da177e4 80 if (used != I810_BUF_CLIENT) {
b5e89ed5
DA
81 DRM_ERROR("Freeing buffer thats not in use : %d\n", buf->idx);
82 return -EINVAL;
1da177e4
LT
83 }
84
b5e89ed5 85 return 0;
1da177e4
LT
86}
87
c94f7029 88static int i810_mmap_buffers(struct file *filp, struct vm_area_struct *vma)
1da177e4 89{
eddca551
DA
90 struct drm_file *priv = filp->private_data;
91 struct drm_device *dev;
b5e89ed5 92 drm_i810_private_t *dev_priv;
056219e2 93 struct drm_buf *buf;
1da177e4
LT
94 drm_i810_buf_priv_t *buf_priv;
95
96 lock_kernel();
b5e89ed5 97 dev = priv->head->dev;
1da177e4 98 dev_priv = dev->dev_private;
b5e89ed5 99 buf = dev_priv->mmap_buffer;
1da177e4
LT
100 buf_priv = buf->dev_private;
101
102 vma->vm_flags |= (VM_IO | VM_DONTCOPY);
103 vma->vm_file = filp;
104
b5e89ed5 105 buf_priv->currently_mapped = I810_BUF_MAPPED;
1da177e4
LT
106 unlock_kernel();
107
108 if (io_remap_pfn_range(vma, vma->vm_start,
3d77461e 109 vma->vm_pgoff,
b5e89ed5
DA
110 vma->vm_end - vma->vm_start, vma->vm_page_prot))
111 return -EAGAIN;
1da177e4
LT
112 return 0;
113}
114
2b8693c0 115static const struct file_operations i810_buffer_fops = {
b5e89ed5 116 .open = drm_open,
c94f7029 117 .release = drm_release,
b5e89ed5
DA
118 .ioctl = drm_ioctl,
119 .mmap = i810_mmap_buffers,
120 .fasync = drm_fasync,
c94f7029
DA
121};
122
6c340eac 123static int i810_map_buffer(struct drm_buf * buf, struct drm_file *file_priv)
1da177e4 124{
6c340eac 125 struct drm_device *dev = file_priv->head->dev;
1da177e4 126 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 127 drm_i810_private_t *dev_priv = dev->dev_private;
99ac48f5 128 const struct file_operations *old_fops;
1da177e4
LT
129 int retcode = 0;
130
b5e89ed5 131 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
1da177e4
LT
132 return -EINVAL;
133
b5e89ed5 134 down_write(&current->mm->mmap_sem);
6c340eac
EA
135 old_fops = file_priv->filp->f_op;
136 file_priv->filp->f_op = &i810_buffer_fops;
1da177e4 137 dev_priv->mmap_buffer = buf;
6c340eac 138 buf_priv->virtual = (void *)do_mmap(file_priv->filp, 0, buf->total,
b5e89ed5
DA
139 PROT_READ | PROT_WRITE,
140 MAP_SHARED, buf->bus_address);
1da177e4 141 dev_priv->mmap_buffer = NULL;
6c340eac 142 file_priv->filp->f_op = old_fops;
c7aed179 143 if (IS_ERR(buf_priv->virtual)) {
1da177e4
LT
144 /* Real error */
145 DRM_ERROR("mmap error\n");
c7aed179 146 retcode = PTR_ERR(buf_priv->virtual);
1da177e4
LT
147 buf_priv->virtual = NULL;
148 }
b5e89ed5 149 up_write(&current->mm->mmap_sem);
1da177e4
LT
150
151 return retcode;
152}
153
056219e2 154static int i810_unmap_buffer(struct drm_buf * buf)
1da177e4
LT
155{
156 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
157 int retcode = 0;
158
159 if (buf_priv->currently_mapped != I810_BUF_MAPPED)
160 return -EINVAL;
161
162 down_write(&current->mm->mmap_sem);
163 retcode = do_munmap(current->mm,
164 (unsigned long)buf_priv->virtual,
165 (size_t) buf->total);
166 up_write(&current->mm->mmap_sem);
167
b5e89ed5
DA
168 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
169 buf_priv->virtual = NULL;
1da177e4
LT
170
171 return retcode;
172}
173
eddca551 174static int i810_dma_get_buffer(struct drm_device * dev, drm_i810_dma_t * d,
6c340eac 175 struct drm_file *file_priv)
1da177e4 176{
056219e2 177 struct drm_buf *buf;
1da177e4
LT
178 drm_i810_buf_priv_t *buf_priv;
179 int retcode = 0;
180
181 buf = i810_freelist_get(dev);
182 if (!buf) {
183 retcode = -ENOMEM;
b5e89ed5 184 DRM_DEBUG("retcode=%d\n", retcode);
1da177e4
LT
185 return retcode;
186 }
187
6c340eac 188 retcode = i810_map_buffer(buf, file_priv);
1da177e4
LT
189 if (retcode) {
190 i810_freelist_put(dev, buf);
b5e89ed5 191 DRM_ERROR("mapbuf failed, retcode %d\n", retcode);
1da177e4
LT
192 return retcode;
193 }
6c340eac 194 buf->file_priv = file_priv;
1da177e4
LT
195 buf_priv = buf->dev_private;
196 d->granted = 1;
b5e89ed5
DA
197 d->request_idx = buf->idx;
198 d->request_size = buf->total;
199 d->virtual = buf_priv->virtual;
1da177e4
LT
200
201 return retcode;
202}
203
eddca551 204static int i810_dma_cleanup(struct drm_device * dev)
1da177e4 205{
cdd55a29 206 struct drm_device_dma *dma = dev->dma;
1da177e4
LT
207
208 /* Make sure interrupts are disabled here because the uninstall ioctl
209 * may not have been called from userspace and after dev_private
210 * is freed, it's too late.
211 */
212 if (drm_core_check_feature(dev, DRIVER_HAVE_IRQ) && dev->irq_enabled)
213 drm_irq_uninstall(dev);
214
215 if (dev->dev_private) {
216 int i;
b5e89ed5
DA
217 drm_i810_private_t *dev_priv =
218 (drm_i810_private_t *) dev->dev_private;
1da177e4
LT
219
220 if (dev_priv->ring.virtual_start) {
b9094d3a 221 drm_core_ioremapfree(&dev_priv->ring.map, dev);
1da177e4 222 }
b5e89ed5
DA
223 if (dev_priv->hw_status_page) {
224 pci_free_consistent(dev->pdev, PAGE_SIZE,
1da177e4
LT
225 dev_priv->hw_status_page,
226 dev_priv->dma_status_page);
b5e89ed5
DA
227 /* Need to rewrite hardware status page */
228 I810_WRITE(0x02080, 0x1ffff000);
1da177e4 229 }
b5e89ed5 230 drm_free(dev->dev_private, sizeof(drm_i810_private_t),
1da177e4 231 DRM_MEM_DRIVER);
b5e89ed5 232 dev->dev_private = NULL;
1da177e4
LT
233
234 for (i = 0; i < dma->buf_count; i++) {
056219e2 235 struct drm_buf *buf = dma->buflist[i];
1da177e4 236 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b9094d3a 237
b5e89ed5 238 if (buf_priv->kernel_virtual && buf->total)
b9094d3a 239 drm_core_ioremapfree(&buf_priv->map, dev);
1da177e4
LT
240 }
241 }
b5e89ed5 242 return 0;
1da177e4
LT
243}
244
eddca551 245static int i810_wait_ring(struct drm_device * dev, int n)
1da177e4 246{
b5e89ed5
DA
247 drm_i810_private_t *dev_priv = dev->dev_private;
248 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
249 int iters = 0;
250 unsigned long end;
1da177e4
LT
251 unsigned int last_head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
252
b5e89ed5
DA
253 end = jiffies + (HZ * 3);
254 while (ring->space < n) {
255 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
256 ring->space = ring->head - (ring->tail + 8);
257 if (ring->space < 0)
258 ring->space += ring->Size;
259
1da177e4 260 if (ring->head != last_head) {
b5e89ed5 261 end = jiffies + (HZ * 3);
1da177e4
LT
262 last_head = ring->head;
263 }
b5e89ed5
DA
264
265 iters++;
1da177e4 266 if (time_before(end, jiffies)) {
b5e89ed5
DA
267 DRM_ERROR("space: %d wanted %d\n", ring->space, n);
268 DRM_ERROR("lockup\n");
269 goto out_wait_ring;
1da177e4
LT
270 }
271 udelay(1);
272 }
273
b5e89ed5
DA
274 out_wait_ring:
275 return iters;
1da177e4
LT
276}
277
eddca551 278static void i810_kernel_lost_context(struct drm_device * dev)
1da177e4 279{
b5e89ed5
DA
280 drm_i810_private_t *dev_priv = dev->dev_private;
281 drm_i810_ring_buffer_t *ring = &(dev_priv->ring);
1da177e4 282
b5e89ed5
DA
283 ring->head = I810_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
284 ring->tail = I810_READ(LP_RING + RING_TAIL);
285 ring->space = ring->head - (ring->tail + 8);
286 if (ring->space < 0)
287 ring->space += ring->Size;
1da177e4
LT
288}
289
eddca551 290static int i810_freelist_init(struct drm_device * dev, drm_i810_private_t * dev_priv)
1da177e4 291{
cdd55a29 292 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
293 int my_idx = 24;
294 u32 *hw_status = (u32 *) (dev_priv->hw_status_page + my_idx);
295 int i;
1da177e4
LT
296
297 if (dma->buf_count > 1019) {
b5e89ed5
DA
298 /* Not enough space in the status page for the freelist */
299 return -EINVAL;
1da177e4
LT
300 }
301
b5e89ed5 302 for (i = 0; i < dma->buf_count; i++) {
056219e2 303 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 304 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 305
b5e89ed5
DA
306 buf_priv->in_use = hw_status++;
307 buf_priv->my_use_idx = my_idx;
308 my_idx += 4;
1da177e4 309
b5e89ed5 310 *buf_priv->in_use = I810_BUF_FREE;
1da177e4 311
b9094d3a
DA
312 buf_priv->map.offset = buf->bus_address;
313 buf_priv->map.size = buf->total;
314 buf_priv->map.type = _DRM_AGP;
315 buf_priv->map.flags = 0;
316 buf_priv->map.mtrr = 0;
317
318 drm_core_ioremap(&buf_priv->map, dev);
319 buf_priv->kernel_virtual = buf_priv->map.handle;
320
1da177e4
LT
321 }
322 return 0;
323}
324
eddca551 325static int i810_dma_initialize(struct drm_device * dev,
b5e89ed5
DA
326 drm_i810_private_t * dev_priv,
327 drm_i810_init_t * init)
1da177e4 328{
55910517 329 struct drm_map_list *r_list;
b5e89ed5 330 memset(dev_priv, 0, sizeof(drm_i810_private_t));
1da177e4 331
bd1b331f 332 list_for_each_entry(r_list, &dev->maplist, head) {
1da177e4
LT
333 if (r_list->map &&
334 r_list->map->type == _DRM_SHM &&
b5e89ed5 335 r_list->map->flags & _DRM_CONTAINS_LOCK) {
1da177e4 336 dev_priv->sarea_map = r_list->map;
b5e89ed5
DA
337 break;
338 }
339 }
1da177e4
LT
340 if (!dev_priv->sarea_map) {
341 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
342 i810_dma_cleanup(dev);
343 DRM_ERROR("can not find sarea!\n");
344 return -EINVAL;
1da177e4
LT
345 }
346 dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
347 if (!dev_priv->mmio_map) {
348 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
349 i810_dma_cleanup(dev);
350 DRM_ERROR("can not find mmio map!\n");
351 return -EINVAL;
1da177e4 352 }
d1f2b55a 353 dev->agp_buffer_token = init->buffers_offset;
1da177e4
LT
354 dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
355 if (!dev->agp_buffer_map) {
356 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
357 i810_dma_cleanup(dev);
358 DRM_ERROR("can not find dma buffer map!\n");
359 return -EINVAL;
1da177e4
LT
360 }
361
362 dev_priv->sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 363 ((u8 *) dev_priv->sarea_map->handle + init->sarea_priv_offset);
1da177e4 364
b5e89ed5
DA
365 dev_priv->ring.Start = init->ring_start;
366 dev_priv->ring.End = init->ring_end;
367 dev_priv->ring.Size = init->ring_size;
1da177e4 368
b9094d3a
DA
369 dev_priv->ring.map.offset = dev->agp->base + init->ring_start;
370 dev_priv->ring.map.size = init->ring_size;
371 dev_priv->ring.map.type = _DRM_AGP;
372 dev_priv->ring.map.flags = 0;
373 dev_priv->ring.map.mtrr = 0;
1da177e4 374
b9094d3a
DA
375 drm_core_ioremap(&dev_priv->ring.map, dev);
376
377 if (dev_priv->ring.map.handle == NULL) {
b5e89ed5
DA
378 dev->dev_private = (void *)dev_priv;
379 i810_dma_cleanup(dev);
380 DRM_ERROR("can not ioremap virtual address for"
1da177e4 381 " ring buffer\n");
20caafa6 382 return -ENOMEM;
1da177e4
LT
383 }
384
b9094d3a
DA
385 dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
386
b5e89ed5 387 dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
1da177e4
LT
388
389 dev_priv->w = init->w;
390 dev_priv->h = init->h;
391 dev_priv->pitch = init->pitch;
392 dev_priv->back_offset = init->back_offset;
393 dev_priv->depth_offset = init->depth_offset;
394 dev_priv->front_offset = init->front_offset;
395
396 dev_priv->overlay_offset = init->overlay_offset;
397 dev_priv->overlay_physical = init->overlay_physical;
398
399 dev_priv->front_di1 = init->front_offset | init->pitch_bits;
400 dev_priv->back_di1 = init->back_offset | init->pitch_bits;
401 dev_priv->zi1 = init->depth_offset | init->pitch_bits;
402
b5e89ed5
DA
403 /* Program Hardware Status Page */
404 dev_priv->hw_status_page =
405 pci_alloc_consistent(dev->pdev, PAGE_SIZE,
406 &dev_priv->dma_status_page);
407 if (!dev_priv->hw_status_page) {
1da177e4
LT
408 dev->dev_private = (void *)dev_priv;
409 i810_dma_cleanup(dev);
410 DRM_ERROR("Can not allocate hardware status page\n");
411 return -ENOMEM;
412 }
b5e89ed5
DA
413 memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
414 DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
1da177e4
LT
415
416 I810_WRITE(0x02080, dev_priv->dma_status_page);
b5e89ed5 417 DRM_DEBUG("Enabled hardware status page\n");
1da177e4 418
b5e89ed5 419 /* Now we need to init our freelist */
1da177e4
LT
420 if (i810_freelist_init(dev, dev_priv) != 0) {
421 dev->dev_private = (void *)dev_priv;
b5e89ed5
DA
422 i810_dma_cleanup(dev);
423 DRM_ERROR("Not enough space in the status page for"
1da177e4 424 " the freelist\n");
b5e89ed5 425 return -ENOMEM;
1da177e4
LT
426 }
427 dev->dev_private = (void *)dev_priv;
428
b5e89ed5 429 return 0;
1da177e4
LT
430}
431
c153f45f
EA
432static int i810_dma_init(struct drm_device *dev, void *data,
433 struct drm_file *file_priv)
1da177e4 434{
b5e89ed5 435 drm_i810_private_t *dev_priv;
c153f45f 436 drm_i810_init_t *init = data;
b5e89ed5 437 int retcode = 0;
1da177e4 438
c153f45f 439 switch (init->func) {
b5e89ed5
DA
440 case I810_INIT_DMA_1_4:
441 DRM_INFO("Using v1.4 init.\n");
b5e89ed5
DA
442 dev_priv = drm_alloc(sizeof(drm_i810_private_t),
443 DRM_MEM_DRIVER);
444 if (dev_priv == NULL)
445 return -ENOMEM;
c153f45f 446 retcode = i810_dma_initialize(dev, dev_priv, init);
b5e89ed5
DA
447 break;
448
449 case I810_CLEANUP_DMA:
450 DRM_INFO("DMA Cleanup\n");
451 retcode = i810_dma_cleanup(dev);
452 break;
c153f45f
EA
453 default:
454 return -EINVAL;
1da177e4
LT
455 }
456
b5e89ed5 457 return retcode;
1da177e4
LT
458}
459
1da177e4
LT
460/* Most efficient way to verify state for the i810 is as it is
461 * emitted. Non-conformant state is silently dropped.
462 *
463 * Use 'volatile' & local var tmp to force the emitted values to be
464 * identical to the verified ones.
465 */
eddca551 466static void i810EmitContextVerified(struct drm_device * dev,
b5e89ed5 467 volatile unsigned int *code)
1da177e4 468{
b5e89ed5 469 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
470 int i, j = 0;
471 unsigned int tmp;
472 RING_LOCALS;
473
b5e89ed5 474 BEGIN_LP_RING(I810_CTX_SETUP_SIZE);
1da177e4 475
b5e89ed5
DA
476 OUT_RING(GFX_OP_COLOR_FACTOR);
477 OUT_RING(code[I810_CTXREG_CF1]);
1da177e4 478
b5e89ed5
DA
479 OUT_RING(GFX_OP_STIPPLE);
480 OUT_RING(code[I810_CTXREG_ST1]);
1da177e4 481
b5e89ed5 482 for (i = 4; i < I810_CTX_SETUP_SIZE; i++) {
1da177e4
LT
483 tmp = code[i];
484
b5e89ed5
DA
485 if ((tmp & (7 << 29)) == (3 << 29) &&
486 (tmp & (0x1f << 24)) < (0x1d << 24)) {
487 OUT_RING(tmp);
1da177e4 488 j++;
b5e89ed5
DA
489 } else
490 printk("constext state dropped!!!\n");
1da177e4
LT
491 }
492
493 if (j & 1)
b5e89ed5 494 OUT_RING(0);
1da177e4
LT
495
496 ADVANCE_LP_RING();
497}
498
eddca551 499static void i810EmitTexVerified(struct drm_device * dev, volatile unsigned int *code)
1da177e4 500{
b5e89ed5 501 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
502 int i, j = 0;
503 unsigned int tmp;
504 RING_LOCALS;
505
b5e89ed5 506 BEGIN_LP_RING(I810_TEX_SETUP_SIZE);
1da177e4 507
b5e89ed5
DA
508 OUT_RING(GFX_OP_MAP_INFO);
509 OUT_RING(code[I810_TEXREG_MI1]);
510 OUT_RING(code[I810_TEXREG_MI2]);
511 OUT_RING(code[I810_TEXREG_MI3]);
1da177e4 512
b5e89ed5 513 for (i = 4; i < I810_TEX_SETUP_SIZE; i++) {
1da177e4
LT
514 tmp = code[i];
515
b5e89ed5
DA
516 if ((tmp & (7 << 29)) == (3 << 29) &&
517 (tmp & (0x1f << 24)) < (0x1d << 24)) {
518 OUT_RING(tmp);
1da177e4 519 j++;
b5e89ed5
DA
520 } else
521 printk("texture state dropped!!!\n");
1da177e4
LT
522 }
523
524 if (j & 1)
b5e89ed5 525 OUT_RING(0);
1da177e4
LT
526
527 ADVANCE_LP_RING();
528}
529
1da177e4
LT
530/* Need to do some additional checking when setting the dest buffer.
531 */
eddca551 532static void i810EmitDestVerified(struct drm_device * dev,
b5e89ed5 533 volatile unsigned int *code)
1da177e4 534{
b5e89ed5 535 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
536 unsigned int tmp;
537 RING_LOCALS;
538
b5e89ed5 539 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
540
541 tmp = code[I810_DESTREG_DI1];
542 if (tmp == dev_priv->front_di1 || tmp == dev_priv->back_di1) {
b5e89ed5
DA
543 OUT_RING(CMD_OP_DESTBUFFER_INFO);
544 OUT_RING(tmp);
1da177e4 545 } else
b5e89ed5
DA
546 DRM_DEBUG("bad di1 %x (allow %x or %x)\n",
547 tmp, dev_priv->front_di1, dev_priv->back_di1);
1da177e4
LT
548
549 /* invarient:
550 */
b5e89ed5
DA
551 OUT_RING(CMD_OP_Z_BUFFER_INFO);
552 OUT_RING(dev_priv->zi1);
1da177e4 553
b5e89ed5
DA
554 OUT_RING(GFX_OP_DESTBUFFER_VARS);
555 OUT_RING(code[I810_DESTREG_DV1]);
1da177e4 556
b5e89ed5
DA
557 OUT_RING(GFX_OP_DRAWRECT_INFO);
558 OUT_RING(code[I810_DESTREG_DR1]);
559 OUT_RING(code[I810_DESTREG_DR2]);
560 OUT_RING(code[I810_DESTREG_DR3]);
561 OUT_RING(code[I810_DESTREG_DR4]);
562 OUT_RING(0);
1da177e4
LT
563
564 ADVANCE_LP_RING();
565}
566
eddca551 567static void i810EmitState(struct drm_device * dev)
1da177e4 568{
b5e89ed5
DA
569 drm_i810_private_t *dev_priv = dev->dev_private;
570 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 571 unsigned int dirty = sarea_priv->dirty;
b5e89ed5 572
1da177e4
LT
573 DRM_DEBUG("%s %x\n", __FUNCTION__, dirty);
574
575 if (dirty & I810_UPLOAD_BUFFERS) {
b5e89ed5 576 i810EmitDestVerified(dev, sarea_priv->BufferState);
1da177e4
LT
577 sarea_priv->dirty &= ~I810_UPLOAD_BUFFERS;
578 }
579
580 if (dirty & I810_UPLOAD_CTX) {
b5e89ed5 581 i810EmitContextVerified(dev, sarea_priv->ContextState);
1da177e4
LT
582 sarea_priv->dirty &= ~I810_UPLOAD_CTX;
583 }
584
585 if (dirty & I810_UPLOAD_TEX0) {
b5e89ed5 586 i810EmitTexVerified(dev, sarea_priv->TexState[0]);
1da177e4
LT
587 sarea_priv->dirty &= ~I810_UPLOAD_TEX0;
588 }
589
590 if (dirty & I810_UPLOAD_TEX1) {
b5e89ed5 591 i810EmitTexVerified(dev, sarea_priv->TexState[1]);
1da177e4
LT
592 sarea_priv->dirty &= ~I810_UPLOAD_TEX1;
593 }
594}
595
1da177e4
LT
596/* need to verify
597 */
eddca551 598static void i810_dma_dispatch_clear(struct drm_device * dev, int flags,
b5e89ed5
DA
599 unsigned int clear_color,
600 unsigned int clear_zval)
1da177e4 601{
b5e89ed5
DA
602 drm_i810_private_t *dev_priv = dev->dev_private;
603 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 604 int nbox = sarea_priv->nbox;
eddca551 605 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
606 int pitch = dev_priv->pitch;
607 int cpp = 2;
608 int i;
609 RING_LOCALS;
b5e89ed5
DA
610
611 if (dev_priv->current_page == 1) {
612 unsigned int tmp = flags;
613
1da177e4 614 flags &= ~(I810_FRONT | I810_BACK);
b5e89ed5
DA
615 if (tmp & I810_FRONT)
616 flags |= I810_BACK;
617 if (tmp & I810_BACK)
618 flags |= I810_FRONT;
1da177e4
LT
619 }
620
b5e89ed5 621 i810_kernel_lost_context(dev);
1da177e4 622
b5e89ed5
DA
623 if (nbox > I810_NR_SAREA_CLIPRECTS)
624 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 625
b5e89ed5 626 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
627 unsigned int x = pbox->x1;
628 unsigned int y = pbox->y1;
629 unsigned int width = (pbox->x2 - x) * cpp;
630 unsigned int height = pbox->y2 - y;
631 unsigned int start = y * pitch + x * cpp;
632
633 if (pbox->x1 > pbox->x2 ||
634 pbox->y1 > pbox->y2 ||
b5e89ed5 635 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
636 continue;
637
b5e89ed5
DA
638 if (flags & I810_FRONT) {
639 BEGIN_LP_RING(6);
640 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
641 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
642 OUT_RING((height << 16) | width);
643 OUT_RING(start);
644 OUT_RING(clear_color);
645 OUT_RING(0);
1da177e4
LT
646 ADVANCE_LP_RING();
647 }
648
b5e89ed5
DA
649 if (flags & I810_BACK) {
650 BEGIN_LP_RING(6);
651 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
652 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
653 OUT_RING((height << 16) | width);
654 OUT_RING(dev_priv->back_offset + start);
655 OUT_RING(clear_color);
656 OUT_RING(0);
1da177e4
LT
657 ADVANCE_LP_RING();
658 }
659
b5e89ed5
DA
660 if (flags & I810_DEPTH) {
661 BEGIN_LP_RING(6);
662 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_COLOR_BLT | 0x3);
663 OUT_RING(BR13_SOLID_PATTERN | (0xF0 << 16) | pitch);
664 OUT_RING((height << 16) | width);
665 OUT_RING(dev_priv->depth_offset + start);
666 OUT_RING(clear_zval);
667 OUT_RING(0);
1da177e4
LT
668 ADVANCE_LP_RING();
669 }
670 }
671}
672
eddca551 673static void i810_dma_dispatch_swap(struct drm_device * dev)
1da177e4 674{
b5e89ed5
DA
675 drm_i810_private_t *dev_priv = dev->dev_private;
676 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1da177e4 677 int nbox = sarea_priv->nbox;
eddca551 678 struct drm_clip_rect *pbox = sarea_priv->boxes;
1da177e4
LT
679 int pitch = dev_priv->pitch;
680 int cpp = 2;
681 int i;
682 RING_LOCALS;
683
684 DRM_DEBUG("swapbuffers\n");
685
b5e89ed5 686 i810_kernel_lost_context(dev);
1da177e4 687
b5e89ed5
DA
688 if (nbox > I810_NR_SAREA_CLIPRECTS)
689 nbox = I810_NR_SAREA_CLIPRECTS;
1da177e4 690
b5e89ed5 691 for (i = 0; i < nbox; i++, pbox++) {
1da177e4
LT
692 unsigned int w = pbox->x2 - pbox->x1;
693 unsigned int h = pbox->y2 - pbox->y1;
b5e89ed5 694 unsigned int dst = pbox->x1 * cpp + pbox->y1 * pitch;
1da177e4
LT
695 unsigned int start = dst;
696
697 if (pbox->x1 > pbox->x2 ||
698 pbox->y1 > pbox->y2 ||
b5e89ed5 699 pbox->x2 > dev_priv->w || pbox->y2 > dev_priv->h)
1da177e4
LT
700 continue;
701
b5e89ed5
DA
702 BEGIN_LP_RING(6);
703 OUT_RING(BR00_BITBLT_CLIENT | BR00_OP_SRC_COPY_BLT | 0x4);
704 OUT_RING(pitch | (0xCC << 16));
705 OUT_RING((h << 16) | (w * cpp));
1da177e4 706 if (dev_priv->current_page == 0)
b5e89ed5 707 OUT_RING(dev_priv->front_offset + start);
1da177e4 708 else
b5e89ed5
DA
709 OUT_RING(dev_priv->back_offset + start);
710 OUT_RING(pitch);
1da177e4 711 if (dev_priv->current_page == 0)
b5e89ed5 712 OUT_RING(dev_priv->back_offset + start);
1da177e4 713 else
b5e89ed5 714 OUT_RING(dev_priv->front_offset + start);
1da177e4
LT
715 ADVANCE_LP_RING();
716 }
717}
718
eddca551 719static void i810_dma_dispatch_vertex(struct drm_device * dev,
056219e2 720 struct drm_buf * buf, int discard, int used)
1da177e4 721{
b5e89ed5 722 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4 723 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
b5e89ed5 724 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
eddca551 725 struct drm_clip_rect *box = sarea_priv->boxes;
b5e89ed5 726 int nbox = sarea_priv->nbox;
1da177e4
LT
727 unsigned long address = (unsigned long)buf->bus_address;
728 unsigned long start = address - dev->agp->base;
729 int i = 0;
b5e89ed5 730 RING_LOCALS;
1da177e4 731
b5e89ed5 732 i810_kernel_lost_context(dev);
1da177e4 733
b5e89ed5 734 if (nbox > I810_NR_SAREA_CLIPRECTS)
1da177e4
LT
735 nbox = I810_NR_SAREA_CLIPRECTS;
736
b5e89ed5 737 if (used > 4 * 1024)
1da177e4
LT
738 used = 0;
739
740 if (sarea_priv->dirty)
b5e89ed5 741 i810EmitState(dev);
1da177e4
LT
742
743 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
744 unsigned int prim = (sarea_priv->vertex_prim & PR_MASK);
745
b5e89ed5
DA
746 *(u32 *) buf_priv->kernel_virtual =
747 ((GFX_OP_PRIMITIVE | prim | ((used / 4) - 2)));
1da177e4
LT
748
749 if (used & 4) {
c7aed179 750 *(u32 *) ((char *) buf_priv->kernel_virtual + used) = 0;
1da177e4
LT
751 used += 4;
752 }
753
754 i810_unmap_buffer(buf);
755 }
756
757 if (used) {
758 do {
759 if (i < nbox) {
760 BEGIN_LP_RING(4);
b5e89ed5
DA
761 OUT_RING(GFX_OP_SCISSOR | SC_UPDATE_SCISSOR |
762 SC_ENABLE);
763 OUT_RING(GFX_OP_SCISSOR_INFO);
764 OUT_RING(box[i].x1 | (box[i].y1 << 16));
765 OUT_RING((box[i].x2 -
766 1) | ((box[i].y2 - 1) << 16));
1da177e4
LT
767 ADVANCE_LP_RING();
768 }
769
770 BEGIN_LP_RING(4);
b5e89ed5
DA
771 OUT_RING(CMD_OP_BATCH_BUFFER);
772 OUT_RING(start | BB1_PROTECTED);
773 OUT_RING(start + used - 4);
774 OUT_RING(0);
1da177e4
LT
775 ADVANCE_LP_RING();
776
777 } while (++i < nbox);
778 }
779
780 if (discard) {
781 dev_priv->counter++;
782
b5e89ed5
DA
783 (void)cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
784 I810_BUF_HARDWARE);
1da177e4
LT
785
786 BEGIN_LP_RING(8);
b5e89ed5
DA
787 OUT_RING(CMD_STORE_DWORD_IDX);
788 OUT_RING(20);
789 OUT_RING(dev_priv->counter);
790 OUT_RING(CMD_STORE_DWORD_IDX);
791 OUT_RING(buf_priv->my_use_idx);
792 OUT_RING(I810_BUF_FREE);
793 OUT_RING(CMD_REPORT_HEAD);
794 OUT_RING(0);
1da177e4
LT
795 ADVANCE_LP_RING();
796 }
797}
798
eddca551 799static void i810_dma_dispatch_flip(struct drm_device * dev)
1da177e4 800{
b5e89ed5 801 drm_i810_private_t *dev_priv = dev->dev_private;
1da177e4
LT
802 int pitch = dev_priv->pitch;
803 RING_LOCALS;
804
b5e89ed5
DA
805 DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
806 __FUNCTION__,
807 dev_priv->current_page,
808 dev_priv->sarea_priv->pf_current_page);
809
810 i810_kernel_lost_context(dev);
1da177e4 811
b5e89ed5
DA
812 BEGIN_LP_RING(2);
813 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
814 OUT_RING(0);
1da177e4
LT
815 ADVANCE_LP_RING();
816
b5e89ed5 817 BEGIN_LP_RING(I810_DEST_SETUP_SIZE + 2);
1da177e4
LT
818 /* On i815 at least ASYNC is buggy */
819 /* pitch<<5 is from 11.2.8 p158,
820 its the pitch / 8 then left shifted 8,
821 so (pitch >> 3) << 8 */
b5e89ed5
DA
822 OUT_RING(CMD_OP_FRONTBUFFER_INFO | (pitch << 5) /*| ASYNC_FLIP */ );
823 if (dev_priv->current_page == 0) {
824 OUT_RING(dev_priv->back_offset);
1da177e4
LT
825 dev_priv->current_page = 1;
826 } else {
b5e89ed5 827 OUT_RING(dev_priv->front_offset);
1da177e4
LT
828 dev_priv->current_page = 0;
829 }
830 OUT_RING(0);
831 ADVANCE_LP_RING();
832
833 BEGIN_LP_RING(2);
b5e89ed5
DA
834 OUT_RING(CMD_OP_WAIT_FOR_EVENT | WAIT_FOR_PLANE_A_FLIP);
835 OUT_RING(0);
1da177e4
LT
836 ADVANCE_LP_RING();
837
838 /* Increment the frame counter. The client-side 3D driver must
839 * throttle the framerate by waiting for this value before
840 * performing the swapbuffer ioctl.
841 */
842 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
843
844}
845
eddca551 846static void i810_dma_quiescent(struct drm_device * dev)
1da177e4 847{
b5e89ed5
DA
848 drm_i810_private_t *dev_priv = dev->dev_private;
849 RING_LOCALS;
1da177e4
LT
850
851/* printk("%s\n", __FUNCTION__); */
852
b5e89ed5 853 i810_kernel_lost_context(dev);
1da177e4 854
b5e89ed5
DA
855 BEGIN_LP_RING(4);
856 OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
857 OUT_RING(CMD_REPORT_HEAD);
858 OUT_RING(0);
859 OUT_RING(0);
860 ADVANCE_LP_RING();
1da177e4 861
b5e89ed5 862 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4
LT
863}
864
eddca551 865static int i810_flush_queue(struct drm_device * dev)
1da177e4 866{
b5e89ed5 867 drm_i810_private_t *dev_priv = dev->dev_private;
cdd55a29 868 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
869 int i, ret = 0;
870 RING_LOCALS;
871
1da177e4
LT
872/* printk("%s\n", __FUNCTION__); */
873
b5e89ed5 874 i810_kernel_lost_context(dev);
1da177e4 875
b5e89ed5
DA
876 BEGIN_LP_RING(2);
877 OUT_RING(CMD_REPORT_HEAD);
878 OUT_RING(0);
879 ADVANCE_LP_RING();
1da177e4 880
b5e89ed5 881 i810_wait_ring(dev, dev_priv->ring.Size - 8);
1da177e4 882
b5e89ed5 883 for (i = 0; i < dma->buf_count; i++) {
056219e2 884 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 885 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4
LT
886
887 int used = cmpxchg(buf_priv->in_use, I810_BUF_HARDWARE,
888 I810_BUF_FREE);
889
890 if (used == I810_BUF_HARDWARE)
891 DRM_DEBUG("reclaimed from HARDWARE\n");
892 if (used == I810_BUF_CLIENT)
893 DRM_DEBUG("still on client\n");
894 }
895
b5e89ed5 896 return ret;
1da177e4
LT
897}
898
899/* Must be called with the lock held */
6c340eac
EA
900static void i810_reclaim_buffers(struct drm_device * dev,
901 struct drm_file *file_priv)
1da177e4 902{
cdd55a29 903 struct drm_device_dma *dma = dev->dma;
b5e89ed5 904 int i;
1da177e4 905
b5e89ed5
DA
906 if (!dma)
907 return;
908 if (!dev->dev_private)
909 return;
910 if (!dma->buflist)
911 return;
1da177e4 912
b5e89ed5 913 i810_flush_queue(dev);
1da177e4
LT
914
915 for (i = 0; i < dma->buf_count; i++) {
056219e2 916 struct drm_buf *buf = dma->buflist[i];
b5e89ed5 917 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1da177e4 918
6c340eac 919 if (buf->file_priv == file_priv && buf_priv) {
1da177e4
LT
920 int used = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT,
921 I810_BUF_FREE);
922
923 if (used == I810_BUF_CLIENT)
924 DRM_DEBUG("reclaimed from client\n");
925 if (buf_priv->currently_mapped == I810_BUF_MAPPED)
b5e89ed5 926 buf_priv->currently_mapped = I810_BUF_UNMAPPED;
1da177e4
LT
927 }
928 }
929}
930
c153f45f
EA
931static int i810_flush_ioctl(struct drm_device *dev, void *data,
932 struct drm_file *file_priv)
1da177e4 933{
6c340eac 934 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 935
b5e89ed5
DA
936 i810_flush_queue(dev);
937 return 0;
1da177e4
LT
938}
939
c153f45f
EA
940static int i810_dma_vertex(struct drm_device *dev, void *data,
941 struct drm_file *file_priv)
1da177e4 942{
cdd55a29 943 struct drm_device_dma *dma = dev->dma;
b5e89ed5
DA
944 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
945 u32 *hw_status = dev_priv->hw_status_page;
946 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
947 dev_priv->sarea_priv;
c153f45f 948 drm_i810_vertex_t *vertex = data;
1da177e4 949
6c340eac 950 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT
951
952 DRM_DEBUG("i810 dma vertex, idx %d used %d discard %d\n",
c153f45f 953 vertex->idx, vertex->used, vertex->discard);
1da177e4 954
c153f45f 955 if (vertex->idx < 0 || vertex->idx > dma->buf_count)
1da177e4
LT
956 return -EINVAL;
957
b5e89ed5 958 i810_dma_dispatch_vertex(dev,
c153f45f
EA
959 dma->buflist[vertex->idx],
960 vertex->discard, vertex->used);
1da177e4 961
c153f45f 962 atomic_add(vertex->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 963 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA
964 sarea_priv->last_enqueue = dev_priv->counter - 1;
965 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
966
967 return 0;
968}
969
c153f45f
EA
970static int i810_clear_bufs(struct drm_device *dev, void *data,
971 struct drm_file *file_priv)
1da177e4 972{
c153f45f 973 drm_i810_clear_t *clear = data;
1da177e4 974
6c340eac 975 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 976
b5e89ed5
DA
977 /* GH: Someone's doing nasty things... */
978 if (!dev->dev_private) {
979 return -EINVAL;
980 }
1da177e4 981
c153f45f
EA
982 i810_dma_dispatch_clear(dev, clear->flags,
983 clear->clear_color, clear->clear_depth);
b5e89ed5 984 return 0;
1da177e4
LT
985}
986
c153f45f
EA
987static int i810_swap_bufs(struct drm_device *dev, void *data,
988 struct drm_file *file_priv)
1da177e4 989{
1da177e4
LT
990 DRM_DEBUG("i810_swap_bufs\n");
991
6c340eac 992 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 993
b5e89ed5
DA
994 i810_dma_dispatch_swap(dev);
995 return 0;
1da177e4
LT
996}
997
c153f45f
EA
998static int i810_getage(struct drm_device *dev, void *data,
999 struct drm_file *file_priv)
1da177e4 1000{
b5e89ed5
DA
1001 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1002 u32 *hw_status = dev_priv->hw_status_page;
1003 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1004 dev_priv->sarea_priv;
1005
1006 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1007 return 0;
1008}
1009
c153f45f
EA
1010static int i810_getbuf(struct drm_device *dev, void *data,
1011 struct drm_file *file_priv)
1da177e4 1012{
b5e89ed5 1013 int retcode = 0;
c153f45f 1014 drm_i810_dma_t *d = data;
b5e89ed5
DA
1015 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1016 u32 *hw_status = dev_priv->hw_status_page;
1017 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
1018 dev_priv->sarea_priv;
1019
6c340eac 1020 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1021
c153f45f 1022 d->granted = 0;
1da177e4 1023
c153f45f 1024 retcode = i810_dma_get_buffer(dev, d, file_priv);
1da177e4
LT
1025
1026 DRM_DEBUG("i810_dma: %d returning %d, granted = %d\n",
ba25f9dc 1027 task_pid_nr(current), retcode, d->granted);
1da177e4 1028
b5e89ed5 1029 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1030
1031 return retcode;
1032}
1033
c153f45f
EA
1034static int i810_copybuf(struct drm_device *dev, void *data,
1035 struct drm_file *file_priv)
1da177e4
LT
1036{
1037 /* Never copy - 2.4.x doesn't need it */
1038 return 0;
1039}
1040
c153f45f
EA
1041static int i810_docopy(struct drm_device *dev, void *data,
1042 struct drm_file *file_priv)
1da177e4
LT
1043{
1044 /* Never copy - 2.4.x doesn't need it */
1045 return 0;
1046}
1047
056219e2 1048static void i810_dma_dispatch_mc(struct drm_device * dev, struct drm_buf * buf, int used,
b5e89ed5 1049 unsigned int last_render)
1da177e4
LT
1050{
1051 drm_i810_private_t *dev_priv = dev->dev_private;
1052 drm_i810_buf_priv_t *buf_priv = buf->dev_private;
1053 drm_i810_sarea_t *sarea_priv = dev_priv->sarea_priv;
1054 unsigned long address = (unsigned long)buf->bus_address;
1055 unsigned long start = address - dev->agp->base;
1056 int u;
1057 RING_LOCALS;
1058
1059 i810_kernel_lost_context(dev);
1060
b5e89ed5 1061 u = cmpxchg(buf_priv->in_use, I810_BUF_CLIENT, I810_BUF_HARDWARE);
1da177e4
LT
1062 if (u != I810_BUF_CLIENT) {
1063 DRM_DEBUG("MC found buffer that isn't mine!\n");
1064 }
1065
b5e89ed5 1066 if (used > 4 * 1024)
1da177e4
LT
1067 used = 0;
1068
1069 sarea_priv->dirty = 0x7f;
1070
b5e89ed5 1071 DRM_DEBUG("dispatch mc addr 0x%lx, used 0x%x\n", address, used);
1da177e4
LT
1072
1073 dev_priv->counter++;
1074 DRM_DEBUG("dispatch counter : %ld\n", dev_priv->counter);
1075 DRM_DEBUG("i810_dma_dispatch_mc\n");
1076 DRM_DEBUG("start : %lx\n", start);
1077 DRM_DEBUG("used : %d\n", used);
1078 DRM_DEBUG("start + used - 4 : %ld\n", start + used - 4);
1079
1080 if (buf_priv->currently_mapped == I810_BUF_MAPPED) {
1081 if (used & 4) {
c7aed179 1082 *(u32 *) ((char *) buf_priv->virtual + used) = 0;
1da177e4
LT
1083 used += 4;
1084 }
1085
1086 i810_unmap_buffer(buf);
1087 }
1088 BEGIN_LP_RING(4);
b5e89ed5
DA
1089 OUT_RING(CMD_OP_BATCH_BUFFER);
1090 OUT_RING(start | BB1_PROTECTED);
1091 OUT_RING(start + used - 4);
1092 OUT_RING(0);
1da177e4
LT
1093 ADVANCE_LP_RING();
1094
1da177e4 1095 BEGIN_LP_RING(8);
b5e89ed5
DA
1096 OUT_RING(CMD_STORE_DWORD_IDX);
1097 OUT_RING(buf_priv->my_use_idx);
1098 OUT_RING(I810_BUF_FREE);
1099 OUT_RING(0);
1100
1101 OUT_RING(CMD_STORE_DWORD_IDX);
1102 OUT_RING(16);
1103 OUT_RING(last_render);
1104 OUT_RING(0);
1da177e4
LT
1105 ADVANCE_LP_RING();
1106}
1107
c153f45f
EA
1108static int i810_dma_mc(struct drm_device *dev, void *data,
1109 struct drm_file *file_priv)
1da177e4 1110{
cdd55a29 1111 struct drm_device_dma *dma = dev->dma;
b5e89ed5 1112 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4
LT
1113 u32 *hw_status = dev_priv->hw_status_page;
1114 drm_i810_sarea_t *sarea_priv = (drm_i810_sarea_t *)
b5e89ed5 1115 dev_priv->sarea_priv;
c153f45f 1116 drm_i810_mc_t *mc = data;
1da177e4 1117
6c340eac 1118 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1119
c153f45f 1120 if (mc->idx >= dma->buf_count || mc->idx < 0)
1da177e4
LT
1121 return -EINVAL;
1122
c153f45f
EA
1123 i810_dma_dispatch_mc(dev, dma->buflist[mc->idx], mc->used,
1124 mc->last_render);
1da177e4 1125
c153f45f 1126 atomic_add(mc->used, &dev->counts[_DRM_STAT_SECONDARY]);
1da177e4 1127 atomic_inc(&dev->counts[_DRM_STAT_DMA]);
b5e89ed5
DA
1128 sarea_priv->last_enqueue = dev_priv->counter - 1;
1129 sarea_priv->last_dispatch = (int)hw_status[5];
1da177e4
LT
1130
1131 return 0;
1132}
1133
c153f45f
EA
1134static int i810_rstatus(struct drm_device *dev, void *data,
1135 struct drm_file *file_priv)
1da177e4 1136{
b5e89ed5 1137 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1138
b5e89ed5 1139 return (int)(((u32 *) (dev_priv->hw_status_page))[4]);
1da177e4
LT
1140}
1141
c153f45f
EA
1142static int i810_ov0_info(struct drm_device *dev, void *data,
1143 struct drm_file *file_priv)
1da177e4 1144{
b5e89ed5 1145 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
c153f45f
EA
1146 drm_i810_overlay_t *ov = data;
1147
1148 ov->offset = dev_priv->overlay_offset;
1149 ov->physical = dev_priv->overlay_physical;
1da177e4 1150
1da177e4
LT
1151 return 0;
1152}
1153
c153f45f
EA
1154static int i810_fstatus(struct drm_device *dev, void *data,
1155 struct drm_file *file_priv)
1da177e4 1156{
b5e89ed5 1157 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1158
6c340eac 1159 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT
1160 return I810_READ(0x30008);
1161}
1162
c153f45f
EA
1163static int i810_ov0_flip(struct drm_device *dev, void *data,
1164 struct drm_file *file_priv)
1da177e4 1165{
b5e89ed5 1166 drm_i810_private_t *dev_priv = (drm_i810_private_t *) dev->dev_private;
1da177e4 1167
6c340eac 1168 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4
LT
1169
1170 //Tell the overlay to update
b5e89ed5 1171 I810_WRITE(0x30000, dev_priv->overlay_physical | 0x80000000);
1da177e4
LT
1172
1173 return 0;
1174}
1175
1da177e4 1176/* Not sure why this isn't set all the time:
b5e89ed5 1177 */
eddca551 1178static void i810_do_init_pageflip(struct drm_device * dev)
1da177e4
LT
1179{
1180 drm_i810_private_t *dev_priv = dev->dev_private;
b5e89ed5 1181
1da177e4
LT
1182 DRM_DEBUG("%s\n", __FUNCTION__);
1183 dev_priv->page_flipping = 1;
1184 dev_priv->current_page = 0;
1185 dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
1186}
1187
eddca551 1188static int i810_do_cleanup_pageflip(struct drm_device * dev)
1da177e4
LT
1189{
1190 drm_i810_private_t *dev_priv = dev->dev_private;
1191
1192 DRM_DEBUG("%s\n", __FUNCTION__);
1193 if (dev_priv->current_page != 0)
b5e89ed5 1194 i810_dma_dispatch_flip(dev);
1da177e4
LT
1195
1196 dev_priv->page_flipping = 0;
1197 return 0;
1198}
1199
c153f45f
EA
1200static int i810_flip_bufs(struct drm_device *dev, void *data,
1201 struct drm_file *file_priv)
1da177e4 1202{
1da177e4
LT
1203 drm_i810_private_t *dev_priv = dev->dev_private;
1204
1205 DRM_DEBUG("%s\n", __FUNCTION__);
1206
6c340eac 1207 LOCK_TEST_WITH_RETURN(dev, file_priv);
1da177e4 1208
b5e89ed5
DA
1209 if (!dev_priv->page_flipping)
1210 i810_do_init_pageflip(dev);
1da177e4 1211
b5e89ed5
DA
1212 i810_dma_dispatch_flip(dev);
1213 return 0;
1da177e4
LT
1214}
1215
eddca551 1216int i810_driver_load(struct drm_device *dev, unsigned long flags)
22eae947
DA
1217{
1218 /* i810 has 4 more counters */
1219 dev->counters += 4;
1220 dev->types[6] = _DRM_STAT_IRQ;
1221 dev->types[7] = _DRM_STAT_PRIMARY;
1222 dev->types[8] = _DRM_STAT_SECONDARY;
1223 dev->types[9] = _DRM_STAT_DMA;
1224
1225 return 0;
1226}
1227
eddca551 1228void i810_driver_lastclose(struct drm_device * dev)
1da177e4 1229{
b5e89ed5 1230 i810_dma_cleanup(dev);
1da177e4
LT
1231}
1232
6c340eac 1233void i810_driver_preclose(struct drm_device * dev, struct drm_file *file_priv)
1da177e4
LT
1234{
1235 if (dev->dev_private) {
1236 drm_i810_private_t *dev_priv = dev->dev_private;
1237 if (dev_priv->page_flipping) {
1238 i810_do_cleanup_pageflip(dev);
1239 }
1240 }
1241}
1242
6c340eac
EA
1243void i810_driver_reclaim_buffers_locked(struct drm_device * dev,
1244 struct drm_file *file_priv)
1da177e4 1245{
6c340eac 1246 i810_reclaim_buffers(dev, file_priv);
1da177e4
LT
1247}
1248
eddca551 1249int i810_driver_dma_quiescent(struct drm_device * dev)
1da177e4 1250{
b5e89ed5 1251 i810_dma_quiescent(dev);
1da177e4
LT
1252 return 0;
1253}
1254
c153f45f
EA
1255struct drm_ioctl_desc i810_ioctls[] = {
1256 DRM_IOCTL_DEF(DRM_I810_INIT, i810_dma_init, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1257 DRM_IOCTL_DEF(DRM_I810_VERTEX, i810_dma_vertex, DRM_AUTH),
1258 DRM_IOCTL_DEF(DRM_I810_CLEAR, i810_clear_bufs, DRM_AUTH),
1259 DRM_IOCTL_DEF(DRM_I810_FLUSH, i810_flush_ioctl, DRM_AUTH),
1260 DRM_IOCTL_DEF(DRM_I810_GETAGE, i810_getage, DRM_AUTH),
1261 DRM_IOCTL_DEF(DRM_I810_GETBUF, i810_getbuf, DRM_AUTH),
1262 DRM_IOCTL_DEF(DRM_I810_SWAP, i810_swap_bufs, DRM_AUTH),
1263 DRM_IOCTL_DEF(DRM_I810_COPY, i810_copybuf, DRM_AUTH),
1264 DRM_IOCTL_DEF(DRM_I810_DOCOPY, i810_docopy, DRM_AUTH),
1265 DRM_IOCTL_DEF(DRM_I810_OV0INFO, i810_ov0_info, DRM_AUTH),
1266 DRM_IOCTL_DEF(DRM_I810_FSTATUS, i810_fstatus, DRM_AUTH),
1267 DRM_IOCTL_DEF(DRM_I810_OV0FLIP, i810_ov0_flip, DRM_AUTH),
1268 DRM_IOCTL_DEF(DRM_I810_MC, i810_dma_mc, DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
1269 DRM_IOCTL_DEF(DRM_I810_RSTATUS, i810_rstatus, DRM_AUTH),
1270 DRM_IOCTL_DEF(DRM_I810_FLIP, i810_flip_bufs, DRM_AUTH)
1da177e4
LT
1271};
1272
1273int i810_max_ioctl = DRM_ARRAY_SIZE(i810_ioctls);
cda17380
DA
1274
1275/**
1276 * Determine if the device really is AGP or not.
1277 *
1278 * All Intel graphics chipsets are treated as AGP, even if they are really
1279 * PCI-e.
1280 *
1281 * \param dev The device to be tested.
1282 *
1283 * \returns
1284 * A value of 1 is always retured to indictate every i810 is AGP.
1285 */
eddca551 1286int i810_driver_device_is_agp(struct drm_device * dev)
cda17380
DA
1287{
1288 return 1;
1289}