Commit | Line | Data |
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1da177e4 | 1 | /** |
b5e89ed5 | 2 | * \file ati_pcigart.c |
1da177e4 LT |
3 | * ATI PCI GART support |
4 | * | |
5 | * \author Gareth Hughes <gareth@valinux.com> | |
6 | */ | |
7 | ||
8 | /* | |
9 | * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com | |
10 | * | |
11 | * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. | |
12 | * All Rights Reserved. | |
13 | * | |
14 | * Permission is hereby granted, free of charge, to any person obtaining a | |
15 | * copy of this software and associated documentation files (the "Software"), | |
16 | * to deal in the Software without restriction, including without limitation | |
17 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, | |
18 | * and/or sell copies of the Software, and to permit persons to whom the | |
19 | * Software is furnished to do so, subject to the following conditions: | |
20 | * | |
21 | * The above copyright notice and this permission notice (including the next | |
22 | * paragraph) shall be included in all copies or substantial portions of the | |
23 | * Software. | |
24 | * | |
25 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR | |
26 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, | |
27 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL | |
28 | * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR | |
29 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, | |
30 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER | |
31 | * DEALINGS IN THE SOFTWARE. | |
32 | */ | |
33 | ||
34 | #include "drmP.h" | |
35 | ||
36 | #if PAGE_SIZE == 65536 | |
37 | # define ATI_PCIGART_TABLE_ORDER 0 | |
38 | # define ATI_PCIGART_TABLE_PAGES (1 << 0) | |
39 | #elif PAGE_SIZE == 16384 | |
40 | # define ATI_PCIGART_TABLE_ORDER 1 | |
41 | # define ATI_PCIGART_TABLE_PAGES (1 << 1) | |
42 | #elif PAGE_SIZE == 8192 | |
43 | # define ATI_PCIGART_TABLE_ORDER 2 | |
44 | # define ATI_PCIGART_TABLE_PAGES (1 << 2) | |
45 | #elif PAGE_SIZE == 4096 | |
46 | # define ATI_PCIGART_TABLE_ORDER 3 | |
47 | # define ATI_PCIGART_TABLE_PAGES (1 << 3) | |
48 | #else | |
49 | # error - PAGE_SIZE not 64K, 16K, 8K or 4K | |
50 | #endif | |
51 | ||
52 | # define ATI_MAX_PCIGART_PAGES 8192 /**< 32 MB aperture, 4K pages */ | |
53 | # define ATI_PCIGART_PAGE_SIZE 4096 /**< PCI GART page size */ | |
54 | ||
f26c473c | 55 | static void *drm_ati_alloc_pcigart_table(void) |
1da177e4 LT |
56 | { |
57 | unsigned long address; | |
58 | struct page *page; | |
59 | int i; | |
b5e89ed5 | 60 | DRM_DEBUG("%s\n", __FUNCTION__); |
1da177e4 | 61 | |
507d256b DA |
62 | address = __get_free_pages(GFP_KERNEL | __GFP_COMP, |
63 | ATI_PCIGART_TABLE_ORDER); | |
b5e89ed5 | 64 | if (address == 0UL) { |
f1e5c03d | 65 | return NULL; |
1da177e4 LT |
66 | } |
67 | ||
b5e89ed5 | 68 | page = virt_to_page(address); |
1da177e4 | 69 | |
507d256b | 70 | for (i = 0; i < ATI_PCIGART_TABLE_PAGES; i++, page++) |
b5e89ed5 | 71 | SetPageReserved(page); |
1da177e4 | 72 | |
b5e89ed5 | 73 | DRM_DEBUG("%s: returning 0x%08lx\n", __FUNCTION__, address); |
f26c473c | 74 | return (void *)address; |
1da177e4 LT |
75 | } |
76 | ||
f26c473c | 77 | static void drm_ati_free_pcigart_table(void *address) |
1da177e4 LT |
78 | { |
79 | struct page *page; | |
80 | int i; | |
b5e89ed5 | 81 | DRM_DEBUG("%s\n", __FUNCTION__); |
1da177e4 | 82 | |
f26c473c | 83 | page = virt_to_page((unsigned long)address); |
1da177e4 | 84 | |
507d256b | 85 | for (i = 0; i < ATI_PCIGART_TABLE_PAGES; i++, page++) |
b5e89ed5 | 86 | ClearPageReserved(page); |
1da177e4 | 87 | |
f26c473c | 88 | free_pages((unsigned long)address, ATI_PCIGART_TABLE_ORDER); |
1da177e4 LT |
89 | } |
90 | ||
f26c473c | 91 | int drm_ati_pcigart_cleanup(drm_device_t *dev, drm_ati_pcigart_info *gart_info) |
1da177e4 LT |
92 | { |
93 | drm_sg_mem_t *entry = dev->sg; | |
94 | unsigned long pages; | |
95 | int i; | |
96 | ||
97 | /* we need to support large memory configurations */ | |
b5e89ed5 DA |
98 | if (!entry) { |
99 | DRM_ERROR("no scatter/gather memory!\n"); | |
1da177e4 LT |
100 | return 0; |
101 | } | |
102 | ||
ea98a92f | 103 | if (gart_info->bus_addr) { |
b5e89ed5 | 104 | if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { |
ea98a92f DA |
105 | pci_unmap_single(dev->pdev, gart_info->bus_addr, |
106 | ATI_PCIGART_TABLE_PAGES * PAGE_SIZE, | |
107 | PCI_DMA_TODEVICE); | |
108 | } | |
1da177e4 | 109 | |
b5e89ed5 DA |
110 | pages = (entry->pages <= ATI_MAX_PCIGART_PAGES) |
111 | ? entry->pages : ATI_MAX_PCIGART_PAGES; | |
1da177e4 | 112 | |
b5e89ed5 DA |
113 | for (i = 0; i < pages; i++) { |
114 | if (!entry->busaddr[i]) | |
115 | break; | |
1da177e4 LT |
116 | pci_unmap_single(dev->pdev, entry->busaddr[i], |
117 | PAGE_SIZE, PCI_DMA_TODEVICE); | |
118 | } | |
b5e89ed5 DA |
119 | |
120 | if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) | |
121 | gart_info->bus_addr = 0; | |
1da177e4 LT |
122 | } |
123 | ||
b5e89ed5 DA |
124 | if (gart_info->gart_table_location == DRM_ATI_GART_MAIN |
125 | && gart_info->addr) { | |
ea98a92f | 126 | drm_ati_free_pcigart_table(gart_info->addr); |
f1e5c03d | 127 | gart_info->addr = NULL; |
1da177e4 LT |
128 | } |
129 | ||
130 | return 1; | |
131 | } | |
b5e89ed5 | 132 | |
1da177e4 LT |
133 | EXPORT_SYMBOL(drm_ati_pcigart_cleanup); |
134 | ||
f26c473c | 135 | int drm_ati_pcigart_init(drm_device_t *dev, drm_ati_pcigart_info *gart_info) |
1da177e4 LT |
136 | { |
137 | drm_sg_mem_t *entry = dev->sg; | |
f26c473c | 138 | void *address = NULL; |
1da177e4 LT |
139 | unsigned long pages; |
140 | u32 *pci_gart, page_base, bus_address = 0; | |
141 | int i, j, ret = 0; | |
142 | ||
b5e89ed5 DA |
143 | if (!entry) { |
144 | DRM_ERROR("no scatter/gather memory!\n"); | |
1da177e4 LT |
145 | goto done; |
146 | } | |
147 | ||
b5e89ed5 | 148 | if (gart_info->gart_table_location == DRM_ATI_GART_MAIN) { |
ea98a92f | 149 | DRM_DEBUG("PCI: no table in VRAM: using normal RAM\n"); |
b5e89ed5 | 150 | |
ea98a92f | 151 | address = drm_ati_alloc_pcigart_table(); |
b5e89ed5 DA |
152 | if (!address) { |
153 | DRM_ERROR("cannot allocate PCI GART page!\n"); | |
ea98a92f DA |
154 | goto done; |
155 | } | |
b5e89ed5 DA |
156 | |
157 | if (!dev->pdev) { | |
158 | DRM_ERROR("PCI device unknown!\n"); | |
ea98a92f DA |
159 | goto done; |
160 | } | |
1da177e4 | 161 | |
f26c473c | 162 | bus_address = pci_map_single(dev->pdev, address, |
b5e89ed5 DA |
163 | ATI_PCIGART_TABLE_PAGES * |
164 | PAGE_SIZE, PCI_DMA_TODEVICE); | |
ea98a92f | 165 | if (bus_address == 0) { |
b5e89ed5 DA |
166 | DRM_ERROR("unable to map PCIGART pages!\n"); |
167 | drm_ati_free_pcigart_table(address); | |
f1e5c03d | 168 | address = NULL; |
ea98a92f DA |
169 | goto done; |
170 | } | |
b5e89ed5 | 171 | } else { |
ea98a92f DA |
172 | address = gart_info->addr; |
173 | bus_address = gart_info->bus_addr; | |
b5e89ed5 | 174 | DRM_DEBUG("PCI: Gart Table: VRAM %08X mapped at %08lX\n", |
f26c473c | 175 | bus_address, (unsigned long)address); |
1da177e4 LT |
176 | } |
177 | ||
b5e89ed5 | 178 | pci_gart = (u32 *) address; |
1da177e4 | 179 | |
b5e89ed5 DA |
180 | pages = (entry->pages <= ATI_MAX_PCIGART_PAGES) |
181 | ? entry->pages : ATI_MAX_PCIGART_PAGES; | |
1da177e4 | 182 | |
b5e89ed5 | 183 | memset(pci_gart, 0, ATI_MAX_PCIGART_PAGES * sizeof(u32)); |
1da177e4 | 184 | |
b5e89ed5 | 185 | for (i = 0; i < pages; i++) { |
1da177e4 LT |
186 | /* we need to support large memory configurations */ |
187 | entry->busaddr[i] = pci_map_single(dev->pdev, | |
b5e89ed5 DA |
188 | page_address(entry-> |
189 | pagelist[i]), | |
190 | PAGE_SIZE, PCI_DMA_TODEVICE); | |
1da177e4 | 191 | if (entry->busaddr[i] == 0) { |
b5e89ed5 | 192 | DRM_ERROR("unable to map PCIGART pages!\n"); |
ea98a92f | 193 | drm_ati_pcigart_cleanup(dev, gart_info); |
f26c473c | 194 | address = NULL; |
1da177e4 LT |
195 | bus_address = 0; |
196 | goto done; | |
197 | } | |
198 | page_base = (u32) entry->busaddr[i]; | |
199 | ||
200 | for (j = 0; j < (PAGE_SIZE / ATI_PCIGART_PAGE_SIZE); j++) { | |
ea98a92f | 201 | if (gart_info->is_pcie) |
d34d7ae2 | 202 | *pci_gart = cpu_to_le32((page_base >> 8) | 0xc); |
ea98a92f | 203 | else |
3d5efad9 | 204 | *pci_gart = cpu_to_le32(page_base); |
d34d7ae2 | 205 | pci_gart++; |
1da177e4 LT |
206 | page_base += ATI_PCIGART_PAGE_SIZE; |
207 | } | |
208 | } | |
209 | ||
210 | ret = 1; | |
211 | ||
212 | #if defined(__i386__) || defined(__x86_64__) | |
213 | wbinvd(); | |
214 | #else | |
215 | mb(); | |
216 | #endif | |
217 | ||
b5e89ed5 | 218 | done: |
ea98a92f | 219 | gart_info->addr = address; |
b5e89ed5 | 220 | gart_info->bus_addr = bus_address; |
1da177e4 LT |
221 | return ret; |
222 | } | |
b5e89ed5 | 223 | |
1da177e4 | 224 | EXPORT_SYMBOL(drm_ati_pcigart_init); |