projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
agp/intel: split out gmch/gtt probe, part 2
[linux-block.git] / drivers / char / agp / intel-agp.c
CommitLineData
1da177e4
LT		 1/*
2 * Intel AGPGART routines.
3 */
4
1da177e4
LT		 5#include <linux/module.h>
6#include <linux/pci.h>
5a0e3ad6 7#include <linux/slab.h>
1da177e4 8#include <linux/init.h>
1eaf122c 9#include <linux/kernel.h>
1da177e4
LT		 10#include <linux/pagemap.h>
11#include <linux/agp_backend.h>
48a719c2 12#include <asm/smp.h>
1da177e4 13#include "agp.h"
ff7cdd69 14#include "intel-agp.h"
f8f235e5 15#include <linux/intel-gtt.h>
1da177e4 16
f51b7662 17#include "intel-gtt.c"
65c25aad 18
1f7a6e37
ZW		 19int intel_agp_enabled;
20EXPORT_SYMBOL(intel_agp_enabled);
1da177e4
LT		 21
22static int intel_fetch_size(void)
23{
24 int i;
25 u16 temp;
26 struct aper_size_info_16 *values;
27
28 pci_read_config_word(agp_bridge->dev, INTEL_APSIZE, &temp);
29 values = A_SIZE_16(agp_bridge->driver->aperture_sizes);
30
31 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
32 if (temp == values[i].size_value) {
33 agp_bridge->previous_size = agp_bridge->current_size = (void *) (values + i);
34 agp_bridge->aperture_size_idx = i;
35 return values[i].size;
36 }
37 }
38
39 return 0;
40}
41
42static int __intel_8xx_fetch_size(u8 temp)
43{
44 int i;
45 struct aper_size_info_8 *values;
46
47 values = A_SIZE_8(agp_bridge->driver->aperture_sizes);
48
49 for (i = 0; i < agp_bridge->driver->num_aperture_sizes; i++) {
50 if (temp == values[i].size_value) {
51 agp_bridge->previous_size =
52 agp_bridge->current_size = (void *) (values + i);
53 agp_bridge->aperture_size_idx = i;
54 return values[i].size;
55 }
56 }
57 return 0;
58}
59
60static int intel_8xx_fetch_size(void)
61{
62 u8 temp;
63
64 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
65 return __intel_8xx_fetch_size(temp);
66}
67
68static int intel_815_fetch_size(void)
69{
70 u8 temp;
71
72 /* Intel 815 chipsets have a _weird_ APSIZE register with only
73 * one non-reserved bit, so mask the others out ... */
74 pci_read_config_byte(agp_bridge->dev, INTEL_APSIZE, &temp);
75 temp &= (1 << 3);
76
77 return __intel_8xx_fetch_size(temp);
78}
79
80static void intel_tlbflush(struct agp_memory *mem)
81{
82 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2200);
83 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
84}
85
86
87static void intel_8xx_tlbflush(struct agp_memory *mem)
88{
89 u32 temp;
90 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
91 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp & ~(1 << 7));
92 pci_read_config_dword(agp_bridge->dev, INTEL_AGPCTRL, &temp);
93 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, temp | (1 << 7));
94}
95
96
97static void intel_cleanup(void)
98{
99 u16 temp;
100 struct aper_size_info_16 *previous_size;
101
102 previous_size = A_SIZE_16(agp_bridge->previous_size);
103 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
104 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
105 pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
106}
107
108
109static void intel_8xx_cleanup(void)
110{
111 u16 temp;
112 struct aper_size_info_8 *previous_size;
113
114 previous_size = A_SIZE_8(agp_bridge->previous_size);
115 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp);
116 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp & ~(1 << 9));
117 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, previous_size->size_value);
118}
119
120
121static int intel_configure(void)
122{
123 u32 temp;
124 u16 temp2;
125 struct aper_size_info_16 *current_size;
126
127 current_size = A_SIZE_16(agp_bridge->current_size);
128
129 /* aperture size */
130 pci_write_config_word(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
131
132 /* address to map to */
133 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
134 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
135
136 /* attbase - aperture base */
137 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
138
139 /* agpctrl */
140 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x2280);
141
142 /* paccfg/nbxcfg */
143 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
144 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG,
145 (temp2 & ~(1 << 10)) | (1 << 9));
146 /* clear any possible error conditions */
147 pci_write_config_byte(agp_bridge->dev, INTEL_ERRSTS + 1, 7);
148 return 0;
149}
150
151static int intel_815_configure(void)
152{
153 u32 temp, addr;
154 u8 temp2;
155 struct aper_size_info_8 *current_size;
156
157 /* attbase - aperture base */
158 /* the Intel 815 chipset spec. says that bits 29-31 in the
159 * ATTBASE register are reserved -> try not to write them */
160 if (agp_bridge->gatt_bus_addr & INTEL_815_ATTBASE_MASK) {
e3cf6951 161 dev_emerg(&agp_bridge->dev->dev, "gatt bus addr too high");
1da177e4
LT		 162 return -EINVAL;
163 }
164
165 current_size = A_SIZE_8(agp_bridge->current_size);
166
167 /* aperture size */
168 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
169 current_size->size_value);
170
171 /* address to map to */
172 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
173 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
174
175 pci_read_config_dword(agp_bridge->dev, INTEL_ATTBASE, &addr);
176 addr &= INTEL_815_ATTBASE_MASK;
177 addr |= agp_bridge->gatt_bus_addr;
178 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, addr);
179
180 /* agpctrl */
181 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
182
183 /* apcont */
184 pci_read_config_byte(agp_bridge->dev, INTEL_815_APCONT, &temp2);
185 pci_write_config_byte(agp_bridge->dev, INTEL_815_APCONT, temp2 | (1 << 1));
186
187 /* clear any possible error conditions */
188 /* Oddness : this chipset seems to have no ERRSTS register ! */
189 return 0;
190}
191
192static void intel_820_tlbflush(struct agp_memory *mem)
193{
194 return;
195}
196
197static void intel_820_cleanup(void)
198{
199 u8 temp;
200 struct aper_size_info_8 *previous_size;
201
202 previous_size = A_SIZE_8(agp_bridge->previous_size);
203 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp);
204 pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR,
205 temp & ~(1 << 1));
206 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE,
207 previous_size->size_value);
208}
209
210
211static int intel_820_configure(void)
212{
213 u32 temp;
214 u8 temp2;
215 struct aper_size_info_8 *current_size;
216
217 current_size = A_SIZE_8(agp_bridge->current_size);
218
219 /* aperture size */
220 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
221
222 /* address to map to */
223 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
224 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
225
226 /* attbase - aperture base */
227 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
228
229 /* agpctrl */
230 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
231
232 /* global enable aperture access */
233 /* This flag is not accessed through MCHCFG register as in */
234 /* i850 chipset. */
235 pci_read_config_byte(agp_bridge->dev, INTEL_I820_RDCR, &temp2);
236 pci_write_config_byte(agp_bridge->dev, INTEL_I820_RDCR, temp2 | (1 << 1));
237 /* clear any possible AGP-related error conditions */
238 pci_write_config_word(agp_bridge->dev, INTEL_I820_ERRSTS, 0x001c);
239 return 0;
240}
241
242static int intel_840_configure(void)
243{
244 u32 temp;
245 u16 temp2;
246 struct aper_size_info_8 *current_size;
247
248 current_size = A_SIZE_8(agp_bridge->current_size);
249
250 /* aperture size */
251 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
252
253 /* address to map to */
254 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
255 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
256
257 /* attbase - aperture base */
258 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
259
260 /* agpctrl */
261 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
262
263 /* mcgcfg */
264 pci_read_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, &temp2);
265 pci_write_config_word(agp_bridge->dev, INTEL_I840_MCHCFG, temp2 | (1 << 9));
266 /* clear any possible error conditions */
267 pci_write_config_word(agp_bridge->dev, INTEL_I840_ERRSTS, 0xc000);
268 return 0;
269}
270
271static int intel_845_configure(void)
272{
273 u32 temp;
274 u8 temp2;
275 struct aper_size_info_8 *current_size;
276
277 current_size = A_SIZE_8(agp_bridge->current_size);
278
279 /* aperture size */
280 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
281
b0825488
MG		 282 if (agp_bridge->apbase_config != 0) {
283 pci_write_config_dword(agp_bridge->dev, AGP_APBASE,
284 agp_bridge->apbase_config);
285 } else {
286 /* address to map to */
287 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
288 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
289 agp_bridge->apbase_config = temp;
290 }
1da177e4
LT		 291
292 /* attbase - aperture base */
293 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
294
295 /* agpctrl */
296 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
297
298 /* agpm */
299 pci_read_config_byte(agp_bridge->dev, INTEL_I845_AGPM, &temp2);
300 pci_write_config_byte(agp_bridge->dev, INTEL_I845_AGPM, temp2 | (1 << 1));
301 /* clear any possible error conditions */
302 pci_write_config_word(agp_bridge->dev, INTEL_I845_ERRSTS, 0x001c);
303 return 0;
304}
305
306static int intel_850_configure(void)
307{
308 u32 temp;
309 u16 temp2;
310 struct aper_size_info_8 *current_size;
311
312 current_size = A_SIZE_8(agp_bridge->current_size);
313
314 /* aperture size */
315 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
316
317 /* address to map to */
318 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
319 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
320
321 /* attbase - aperture base */
322 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
323
324 /* agpctrl */
325 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
326
327 /* mcgcfg */
328 pci_read_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, &temp2);
329 pci_write_config_word(agp_bridge->dev, INTEL_I850_MCHCFG, temp2 | (1 << 9));
330 /* clear any possible AGP-related error conditions */
331 pci_write_config_word(agp_bridge->dev, INTEL_I850_ERRSTS, 0x001c);
332 return 0;
333}
334
335static int intel_860_configure(void)
336{
337 u32 temp;
338 u16 temp2;
339 struct aper_size_info_8 *current_size;
340
341 current_size = A_SIZE_8(agp_bridge->current_size);
342
343 /* aperture size */
344 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
345
346 /* address to map to */
347 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
348 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
349
350 /* attbase - aperture base */
351 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
352
353 /* agpctrl */
354 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
355
356 /* mcgcfg */
357 pci_read_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, &temp2);
358 pci_write_config_word(agp_bridge->dev, INTEL_I860_MCHCFG, temp2 | (1 << 9));
359 /* clear any possible AGP-related error conditions */
360 pci_write_config_word(agp_bridge->dev, INTEL_I860_ERRSTS, 0xf700);
361 return 0;
362}
363
364static int intel_830mp_configure(void)
365{
366 u32 temp;
367 u16 temp2;
368 struct aper_size_info_8 *current_size;
369
370 current_size = A_SIZE_8(agp_bridge->current_size);
371
372 /* aperture size */
373 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
374
375 /* address to map to */
376 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
377 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
378
379 /* attbase - aperture base */
380 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
381
382 /* agpctrl */
383 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
384
385 /* gmch */
386 pci_read_config_word(agp_bridge->dev, INTEL_NBXCFG, &temp2);
387 pci_write_config_word(agp_bridge->dev, INTEL_NBXCFG, temp2 | (1 << 9));
388 /* clear any possible AGP-related error conditions */
389 pci_write_config_word(agp_bridge->dev, INTEL_I830_ERRSTS, 0x1c);
390 return 0;
391}
392
393static int intel_7505_configure(void)
394{
395 u32 temp;
396 u16 temp2;
397 struct aper_size_info_8 *current_size;
398
399 current_size = A_SIZE_8(agp_bridge->current_size);
400
401 /* aperture size */
402 pci_write_config_byte(agp_bridge->dev, INTEL_APSIZE, current_size->size_value);
403
404 /* address to map to */
405 pci_read_config_dword(agp_bridge->dev, AGP_APBASE, &temp);
406 agp_bridge->gart_bus_addr = (temp & PCI_BASE_ADDRESS_MEM_MASK);
407
408 /* attbase - aperture base */
409 pci_write_config_dword(agp_bridge->dev, INTEL_ATTBASE, agp_bridge->gatt_bus_addr);
410
411 /* agpctrl */
412 pci_write_config_dword(agp_bridge->dev, INTEL_AGPCTRL, 0x0000);
413
414 /* mchcfg */
415 pci_read_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, &temp2);
416 pci_write_config_word(agp_bridge->dev, INTEL_I7505_MCHCFG, temp2 | (1 << 9));
417
418 return 0;
419}
420
421/* Setup function */
e5524f35 422static const struct gatt_mask intel_generic_masks[] =
1da177e4
LT		 423{
424 {.mask = 0x00000017, .type = 0}
425};
426
e5524f35 427static const struct aper_size_info_8 intel_815_sizes[2] =
1da177e4
LT		 428{
429 {64, 16384, 4, 0},
430 {32, 8192, 3, 8},
431};
432
e5524f35 433static const struct aper_size_info_8 intel_8xx_sizes[7] =
1da177e4
LT		 434{
435 {256, 65536, 6, 0},
436 {128, 32768, 5, 32},
437 {64, 16384, 4, 48},
438 {32, 8192, 3, 56},
439 {16, 4096, 2, 60},
440 {8, 2048, 1, 62},
441 {4, 1024, 0, 63}
442};
443
e5524f35 444static const struct aper_size_info_16 intel_generic_sizes[7] =
1da177e4
LT		 445{
446 {256, 65536, 6, 0},
447 {128, 32768, 5, 32},
448 {64, 16384, 4, 48},
449 {32, 8192, 3, 56},
450 {16, 4096, 2, 60},
451 {8, 2048, 1, 62},
452 {4, 1024, 0, 63}
453};
454
e5524f35 455static const struct aper_size_info_8 intel_830mp_sizes[4] =
1da177e4
LT		 456{
457 {256, 65536, 6, 0},
458 {128, 32768, 5, 32},
459 {64, 16384, 4, 48},
460 {32, 8192, 3, 56}
461};
462
e5524f35 463static const struct agp_bridge_driver intel_generic_driver = {
1da177e4
LT		 464 .owner = THIS_MODULE,
465 .aperture_sizes = intel_generic_sizes,
466 .size_type = U16_APER_SIZE,
467 .num_aperture_sizes = 7,
61cf0593 468 .needs_scratch_page = true,
1da177e4
LT		 469 .configure = intel_configure,
470 .fetch_size = intel_fetch_size,
471 .cleanup = intel_cleanup,
472 .tlb_flush = intel_tlbflush,
473 .mask_memory = agp_generic_mask_memory,
474 .masks = intel_generic_masks,
475 .agp_enable = agp_generic_enable,
476 .cache_flush = global_cache_flush,
477 .create_gatt_table = agp_generic_create_gatt_table,
478 .free_gatt_table = agp_generic_free_gatt_table,
479 .insert_memory = agp_generic_insert_memory,
480 .remove_memory = agp_generic_remove_memory,
481 .alloc_by_type = agp_generic_alloc_by_type,
482 .free_by_type = agp_generic_free_by_type,
483 .agp_alloc_page = agp_generic_alloc_page,
37acee10 484 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 485 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 486 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 487 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 488};
489
e5524f35 490static const struct agp_bridge_driver intel_815_driver = {
1da177e4
LT		 491 .owner = THIS_MODULE,
492 .aperture_sizes = intel_815_sizes,
493 .size_type = U8_APER_SIZE,
494 .num_aperture_sizes = 2,
61cf0593 495 .needs_scratch_page = true,
1da177e4
LT		 496 .configure = intel_815_configure,
497 .fetch_size = intel_815_fetch_size,
498 .cleanup = intel_8xx_cleanup,
499 .tlb_flush = intel_8xx_tlbflush,
500 .mask_memory = agp_generic_mask_memory,
501 .masks = intel_generic_masks,
502 .agp_enable = agp_generic_enable,
503 .cache_flush = global_cache_flush,
504 .create_gatt_table = agp_generic_create_gatt_table,
505 .free_gatt_table = agp_generic_free_gatt_table,
506 .insert_memory = agp_generic_insert_memory,
507 .remove_memory = agp_generic_remove_memory,
508 .alloc_by_type = agp_generic_alloc_by_type,
509 .free_by_type = agp_generic_free_by_type,
510 .agp_alloc_page = agp_generic_alloc_page,
37acee10 511 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 512 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 513 .agp_destroy_pages = agp_generic_destroy_pages,
62c96b9d 514 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 515};
516
e5524f35 517static const struct agp_bridge_driver intel_820_driver = {
1da177e4
LT		 518 .owner = THIS_MODULE,
519 .aperture_sizes = intel_8xx_sizes,
520 .size_type = U8_APER_SIZE,
521 .num_aperture_sizes = 7,
61cf0593 522 .needs_scratch_page = true,
1da177e4
LT		 523 .configure = intel_820_configure,
524 .fetch_size = intel_8xx_fetch_size,
525 .cleanup = intel_820_cleanup,
526 .tlb_flush = intel_820_tlbflush,
527 .mask_memory = agp_generic_mask_memory,
528 .masks = intel_generic_masks,
529 .agp_enable = agp_generic_enable,
530 .cache_flush = global_cache_flush,
531 .create_gatt_table = agp_generic_create_gatt_table,
532 .free_gatt_table = agp_generic_free_gatt_table,
533 .insert_memory = agp_generic_insert_memory,
534 .remove_memory = agp_generic_remove_memory,
535 .alloc_by_type = agp_generic_alloc_by_type,
536 .free_by_type = agp_generic_free_by_type,
537 .agp_alloc_page = agp_generic_alloc_page,
37acee10 538 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 539 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 540 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 541 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 542};
543
e5524f35 544static const struct agp_bridge_driver intel_830mp_driver = {
1da177e4
LT		 545 .owner = THIS_MODULE,
546 .aperture_sizes = intel_830mp_sizes,
547 .size_type = U8_APER_SIZE,
548 .num_aperture_sizes = 4,
61cf0593 549 .needs_scratch_page = true,
1da177e4
LT		 550 .configure = intel_830mp_configure,
551 .fetch_size = intel_8xx_fetch_size,
552 .cleanup = intel_8xx_cleanup,
553 .tlb_flush = intel_8xx_tlbflush,
554 .mask_memory = agp_generic_mask_memory,
555 .masks = intel_generic_masks,
556 .agp_enable = agp_generic_enable,
557 .cache_flush = global_cache_flush,
558 .create_gatt_table = agp_generic_create_gatt_table,
559 .free_gatt_table = agp_generic_free_gatt_table,
560 .insert_memory = agp_generic_insert_memory,
561 .remove_memory = agp_generic_remove_memory,
562 .alloc_by_type = agp_generic_alloc_by_type,
563 .free_by_type = agp_generic_free_by_type,
564 .agp_alloc_page = agp_generic_alloc_page,
37acee10 565 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 566 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 567 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 568 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 569};
570
e5524f35 571static const struct agp_bridge_driver intel_840_driver = {
1da177e4
LT		 572 .owner = THIS_MODULE,
573 .aperture_sizes = intel_8xx_sizes,
574 .size_type = U8_APER_SIZE,
575 .num_aperture_sizes = 7,
61cf0593 576 .needs_scratch_page = true,
1da177e4
LT		 577 .configure = intel_840_configure,
578 .fetch_size = intel_8xx_fetch_size,
579 .cleanup = intel_8xx_cleanup,
580 .tlb_flush = intel_8xx_tlbflush,
581 .mask_memory = agp_generic_mask_memory,
582 .masks = intel_generic_masks,
583 .agp_enable = agp_generic_enable,
584 .cache_flush = global_cache_flush,
585 .create_gatt_table = agp_generic_create_gatt_table,
586 .free_gatt_table = agp_generic_free_gatt_table,
587 .insert_memory = agp_generic_insert_memory,
588 .remove_memory = agp_generic_remove_memory,
589 .alloc_by_type = agp_generic_alloc_by_type,
590 .free_by_type = agp_generic_free_by_type,
591 .agp_alloc_page = agp_generic_alloc_page,
37acee10 592 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 593 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 594 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 595 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 596};
597
e5524f35 598static const struct agp_bridge_driver intel_845_driver = {
1da177e4
LT		 599 .owner = THIS_MODULE,
600 .aperture_sizes = intel_8xx_sizes,
601 .size_type = U8_APER_SIZE,
602 .num_aperture_sizes = 7,
61cf0593 603 .needs_scratch_page = true,
1da177e4
LT		 604 .configure = intel_845_configure,
605 .fetch_size = intel_8xx_fetch_size,
606 .cleanup = intel_8xx_cleanup,
607 .tlb_flush = intel_8xx_tlbflush,
608 .mask_memory = agp_generic_mask_memory,
609 .masks = intel_generic_masks,
610 .agp_enable = agp_generic_enable,
611 .cache_flush = global_cache_flush,
612 .create_gatt_table = agp_generic_create_gatt_table,
613 .free_gatt_table = agp_generic_free_gatt_table,
614 .insert_memory = agp_generic_insert_memory,
615 .remove_memory = agp_generic_remove_memory,
616 .alloc_by_type = agp_generic_alloc_by_type,
617 .free_by_type = agp_generic_free_by_type,
618 .agp_alloc_page = agp_generic_alloc_page,
37acee10 619 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 620 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 621 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 622 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 623};
624
e5524f35 625static const struct agp_bridge_driver intel_850_driver = {
1da177e4
LT		 626 .owner = THIS_MODULE,
627 .aperture_sizes = intel_8xx_sizes,
628 .size_type = U8_APER_SIZE,
629 .num_aperture_sizes = 7,
61cf0593 630 .needs_scratch_page = true,
1da177e4
LT		 631 .configure = intel_850_configure,
632 .fetch_size = intel_8xx_fetch_size,
633 .cleanup = intel_8xx_cleanup,
634 .tlb_flush = intel_8xx_tlbflush,
635 .mask_memory = agp_generic_mask_memory,
636 .masks = intel_generic_masks,
637 .agp_enable = agp_generic_enable,
638 .cache_flush = global_cache_flush,
639 .create_gatt_table = agp_generic_create_gatt_table,
640 .free_gatt_table = agp_generic_free_gatt_table,
641 .insert_memory = agp_generic_insert_memory,
642 .remove_memory = agp_generic_remove_memory,
643 .alloc_by_type = agp_generic_alloc_by_type,
644 .free_by_type = agp_generic_free_by_type,
645 .agp_alloc_page = agp_generic_alloc_page,
37acee10 646 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 647 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 648 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 649 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 650};
651
e5524f35 652static const struct agp_bridge_driver intel_860_driver = {
1da177e4
LT		 653 .owner = THIS_MODULE,
654 .aperture_sizes = intel_8xx_sizes,
655 .size_type = U8_APER_SIZE,
656 .num_aperture_sizes = 7,
61cf0593 657 .needs_scratch_page = true,
1da177e4
LT		 658 .configure = intel_860_configure,
659 .fetch_size = intel_8xx_fetch_size,
660 .cleanup = intel_8xx_cleanup,
661 .tlb_flush = intel_8xx_tlbflush,
662 .mask_memory = agp_generic_mask_memory,
663 .masks = intel_generic_masks,
664 .agp_enable = agp_generic_enable,
665 .cache_flush = global_cache_flush,
666 .create_gatt_table = agp_generic_create_gatt_table,
667 .free_gatt_table = agp_generic_free_gatt_table,
668 .insert_memory = agp_generic_insert_memory,
669 .remove_memory = agp_generic_remove_memory,
670 .alloc_by_type = agp_generic_alloc_by_type,
671 .free_by_type = agp_generic_free_by_type,
672 .agp_alloc_page = agp_generic_alloc_page,
37acee10 673 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 674 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 675 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 676 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 677};
678
e5524f35 679static const struct agp_bridge_driver intel_7505_driver = {
1da177e4
LT		 680 .owner = THIS_MODULE,
681 .aperture_sizes = intel_8xx_sizes,
682 .size_type = U8_APER_SIZE,
683 .num_aperture_sizes = 7,
61cf0593 684 .needs_scratch_page = true,
1da177e4
LT		 685 .configure = intel_7505_configure,
686 .fetch_size = intel_8xx_fetch_size,
687 .cleanup = intel_8xx_cleanup,
688 .tlb_flush = intel_8xx_tlbflush,
689 .mask_memory = agp_generic_mask_memory,
690 .masks = intel_generic_masks,
691 .agp_enable = agp_generic_enable,
692 .cache_flush = global_cache_flush,
693 .create_gatt_table = agp_generic_create_gatt_table,
694 .free_gatt_table = agp_generic_free_gatt_table,
695 .insert_memory = agp_generic_insert_memory,
696 .remove_memory = agp_generic_remove_memory,
697 .alloc_by_type = agp_generic_alloc_by_type,
698 .free_by_type = agp_generic_free_by_type,
699 .agp_alloc_page = agp_generic_alloc_page,
37acee10 700 .agp_alloc_pages = agp_generic_alloc_pages,
1da177e4 701 .agp_destroy_page = agp_generic_destroy_page,
bd07928c 702 .agp_destroy_pages = agp_generic_destroy_pages,
a030ce44 703 .agp_type_to_mask_type = agp_generic_type_to_mask_type,
1da177e4
LT		 704};
705
9614ece1
WZ		 706/* Table to describe Intel GMCH and AGP/PCIE GART drivers. At least one of
707 * driver and gmch_driver must be non-null, and find_gmch will determine
708 * which one should be used if a gmch_chip_id is present.
709 */
02c026ce 710static const struct intel_agp_driver_description {
9614ece1 711 unsigned int chip_id;
9614ece1
WZ		 712 char *name;
713 const struct agp_bridge_driver *driver;
9614ece1 714} intel_agp_chipsets[] = {
02c026ce
DV		 715 { PCI_DEVICE_ID_INTEL_82443LX_0, "440LX", &intel_generic_driver },
716 { PCI_DEVICE_ID_INTEL_82443BX_0, "440BX", &intel_generic_driver },
717 { PCI_DEVICE_ID_INTEL_82443GX_0, "440GX", &intel_generic_driver },
718 { PCI_DEVICE_ID_INTEL_82815_MC, "i815", &intel_815_driver },
719 { PCI_DEVICE_ID_INTEL_82820_HB, "i820", &intel_820_driver },
720 { PCI_DEVICE_ID_INTEL_82820_UP_HB, "i820", &intel_820_driver },
721 { PCI_DEVICE_ID_INTEL_82830_HB, "830M", &intel_830mp_driver },
722 { PCI_DEVICE_ID_INTEL_82840_HB, "i840", &intel_840_driver },
723 { PCI_DEVICE_ID_INTEL_82845_HB, "845G", &intel_845_driver },
724 { PCI_DEVICE_ID_INTEL_82845G_HB, "830M", &intel_845_driver },
725 { PCI_DEVICE_ID_INTEL_82850_HB, "i850", &intel_850_driver },
726 { PCI_DEVICE_ID_INTEL_82854_HB, "854", &intel_845_driver },
727 { PCI_DEVICE_ID_INTEL_82855PM_HB, "855PM", &intel_845_driver },
728 { PCI_DEVICE_ID_INTEL_82855GM_HB, "855GM", &intel_845_driver },
729 { PCI_DEVICE_ID_INTEL_82860_HB, "i860", &intel_860_driver },
730 { PCI_DEVICE_ID_INTEL_82865_HB, "865", &intel_845_driver },
731 { PCI_DEVICE_ID_INTEL_82875_HB, "i875", &intel_845_driver },
732 { PCI_DEVICE_ID_INTEL_7505_0, "E7505", &intel_7505_driver },
733 { PCI_DEVICE_ID_INTEL_7205_0, "E7205", &intel_7505_driver },
734 { 0, NULL, NULL }
9614ece1
WZ		 735};
736
1da177e4
LT		 737static int __devinit agp_intel_probe(struct pci_dev *pdev,
738 const struct pci_device_id *ent)
739{
740 struct agp_bridge_data *bridge;
1da177e4
LT		 741 u8 cap_ptr = 0;
742 struct resource *r;
1f7a6e37 743 int i, err;
1da177e4
LT		 744
745 cap_ptr = pci_find_capability(pdev, PCI_CAP_ID_AGP);
746
747 bridge = agp_alloc_bridge();
748 if (!bridge)
749 return -ENOMEM;
750
22dd82a3
DV		 751 bridge->capndx = cap_ptr;
752
753 if (intel_gmch_probe(pdev, bridge))
754 goto found_gmch;
755
9614ece1
WZ		 756 for (i = 0; intel_agp_chipsets[i].name != NULL; i++) {
757 /* In case that multiple models of gfx chip may
758 stand on same host bridge type, this can be
759 sure we detect the right IGD. */
88889851 760 if (pdev->device == intel_agp_chipsets[i].chip_id) {
22dd82a3
DV		 761 bridge->driver = intel_agp_chipsets[i].driver;
762 break;
88889851 763 }
9614ece1
WZ		 764 }
765
02c026ce 766 if (!bridge->driver) {
1da177e4 767 if (cap_ptr)
e3cf6951
BH		 768 dev_warn(&pdev->dev, "unsupported Intel chipset [%04x/%04x]\n",
769 pdev->vendor, pdev->device);
9614ece1
WZ		 770 agp_put_bridge(bridge);
771 return -ENODEV;
772 }
773
1da177e4 774 bridge->dev = pdev;
22dd82a3 775 bridge->dev_private_data = NULL;
1da177e4 776
e3cf6951 777 dev_info(&pdev->dev, "Intel %s Chipset\n", intel_agp_chipsets[i].name);
1da177e4 778
96576a9e
KV		 779 /*
780 * If the device has not been properly setup, the following will catch
781 * the problem and should stop the system from crashing.
782 * 20030610 - hamish@zot.org
783 */
784 if (pci_enable_device(pdev)) {
785 dev_err(&pdev->dev, "can't enable PCI device\n");
786 agp_put_bridge(bridge);
787 return -ENODEV;
788 }
789
1da177e4
LT		 790 /*
791 * The following fixes the case where the BIOS has "forgotten" to
792 * provide an address range for the GART.
793 * 20030610 - hamish@zot.org
794 */
795 r = &pdev->resource[0];
796 if (!r->start && r->end) {
6a92a4e0 797 if (pci_assign_resource(pdev, 0)) {
e3cf6951 798 dev_err(&pdev->dev, "can't assign resource 0\n");
1da177e4
LT		 799 agp_put_bridge(bridge);
800 return -ENODEV;
801 }
802 }
803
1da177e4
LT		 804 /* Fill in the mode register */
805 if (cap_ptr) {
806 pci_read_config_dword(pdev,
807 bridge->capndx+PCI_AGP_STATUS,
808 &bridge->mode);
809 }
810
22dd82a3 811found_gmch:
1da177e4 812 pci_set_drvdata(pdev, bridge);
1f7a6e37
ZW		 813 err = agp_add_bridge(bridge);
814 if (!err)
815 intel_agp_enabled = 1;
816 return err;
1da177e4
LT		 817}
818
819static void __devexit agp_intel_remove(struct pci_dev *pdev)
820{
821 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
822
823 agp_remove_bridge(bridge);
824
02c026ce 825 intel_gmch_remove(pdev);
1da177e4
LT		 826
827 agp_put_bridge(bridge);
828}
829
85be7d60 830#ifdef CONFIG_PM
1da177e4
LT		 831static int agp_intel_resume(struct pci_dev *pdev)
832{
833 struct agp_bridge_data *bridge = pci_get_drvdata(pdev);
a8c84df9 834 int ret_val;
1da177e4 835
e5a04d52 836 bridge->driver->configure();
1da177e4 837
a8c84df9
KP		 838 ret_val = agp_rebind_memory();
839 if (ret_val != 0)
840 return ret_val;
841
1da177e4
LT		 842 return 0;
843}
85be7d60 844#endif
1da177e4
LT		 845
846static struct pci_device_id agp_intel_pci_table[] = {
847#define ID(x) \
848 { \
849 .class = (PCI_CLASS_BRIDGE_HOST << 8), \
850 .class_mask = ~0, \
851 .vendor = PCI_VENDOR_ID_INTEL, \
852 .device = x, \
853 .subvendor = PCI_ANY_ID, \
854 .subdevice = PCI_ANY_ID, \
855 }
856 ID(PCI_DEVICE_ID_INTEL_82443LX_0),
857 ID(PCI_DEVICE_ID_INTEL_82443BX_0),
858 ID(PCI_DEVICE_ID_INTEL_82443GX_0),
859 ID(PCI_DEVICE_ID_INTEL_82810_MC1),
860 ID(PCI_DEVICE_ID_INTEL_82810_MC3),
861 ID(PCI_DEVICE_ID_INTEL_82810E_MC),
862 ID(PCI_DEVICE_ID_INTEL_82815_MC),
863 ID(PCI_DEVICE_ID_INTEL_82820_HB),
864 ID(PCI_DEVICE_ID_INTEL_82820_UP_HB),
865 ID(PCI_DEVICE_ID_INTEL_82830_HB),
866 ID(PCI_DEVICE_ID_INTEL_82840_HB),
867 ID(PCI_DEVICE_ID_INTEL_82845_HB),
868 ID(PCI_DEVICE_ID_INTEL_82845G_HB),
869 ID(PCI_DEVICE_ID_INTEL_82850_HB),
347486bb 870 ID(PCI_DEVICE_ID_INTEL_82854_HB),
1da177e4
LT		 871 ID(PCI_DEVICE_ID_INTEL_82855PM_HB),
872 ID(PCI_DEVICE_ID_INTEL_82855GM_HB),
873 ID(PCI_DEVICE_ID_INTEL_82860_HB),
874 ID(PCI_DEVICE_ID_INTEL_82865_HB),
875 ID(PCI_DEVICE_ID_INTEL_82875_HB),
876 ID(PCI_DEVICE_ID_INTEL_7505_0),
877 ID(PCI_DEVICE_ID_INTEL_7205_0),
e914a36a 878 ID(PCI_DEVICE_ID_INTEL_E7221_HB),
1da177e4
LT		 879 ID(PCI_DEVICE_ID_INTEL_82915G_HB),
880 ID(PCI_DEVICE_ID_INTEL_82915GM_HB),
d0de98fa 881 ID(PCI_DEVICE_ID_INTEL_82945G_HB),
3b0e8ead 882 ID(PCI_DEVICE_ID_INTEL_82945GM_HB),
dde47876 883 ID(PCI_DEVICE_ID_INTEL_82945GME_HB),
107f517b
AJ		 884 ID(PCI_DEVICE_ID_INTEL_PINEVIEW_M_HB),
885 ID(PCI_DEVICE_ID_INTEL_PINEVIEW_HB),
65c25aad 886 ID(PCI_DEVICE_ID_INTEL_82946GZ_HB),
9119f85a 887 ID(PCI_DEVICE_ID_INTEL_82G35_HB),
65c25aad
EA		 888 ID(PCI_DEVICE_ID_INTEL_82965Q_HB),
889 ID(PCI_DEVICE_ID_INTEL_82965G_HB),
4598af33 890 ID(PCI_DEVICE_ID_INTEL_82965GM_HB),
dde47876 891 ID(PCI_DEVICE_ID_INTEL_82965GME_HB),
874808c6
WZ		 892 ID(PCI_DEVICE_ID_INTEL_G33_HB),
893 ID(PCI_DEVICE_ID_INTEL_Q35_HB),
894 ID(PCI_DEVICE_ID_INTEL_Q33_HB),
99d32bd5 895 ID(PCI_DEVICE_ID_INTEL_GM45_HB),
107f517b 896 ID(PCI_DEVICE_ID_INTEL_EAGLELAKE_HB),
25ce77ab
ZW		 897 ID(PCI_DEVICE_ID_INTEL_Q45_HB),
898 ID(PCI_DEVICE_ID_INTEL_G45_HB),
a50ccc6c 899 ID(PCI_DEVICE_ID_INTEL_G41_HB),
38d8a956 900 ID(PCI_DEVICE_ID_INTEL_B43_HB),
107f517b
AJ		 901 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_D_HB),
902 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_M_HB),
903 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MA_HB),
3ff99164 904 ID(PCI_DEVICE_ID_INTEL_IRONLAKE_MC2_HB),
1089e300 905 ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_HB),
954bce50 906 ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_M_HB),
85540480 907 ID(PCI_DEVICE_ID_INTEL_SANDYBRIDGE_S_HB),
1da177e4
LT		 908 { }
909};
910
911MODULE_DEVICE_TABLE(pci, agp_intel_pci_table);
912
913static struct pci_driver agp_intel_pci_driver = {
914 .name = "agpgart-intel",
915 .id_table = agp_intel_pci_table,
916 .probe = agp_intel_probe,
917 .remove = __devexit_p(agp_intel_remove),
85be7d60 918#ifdef CONFIG_PM
1da177e4 919 .resume = agp_intel_resume,
85be7d60 920#endif
1da177e4
LT		 921};
922
923static int __init agp_intel_init(void)
924{
925 if (agp_off)
926 return -EINVAL;
927 return pci_register_driver(&agp_intel_pci_driver);
928}
929
930static void __exit agp_intel_cleanup(void)
931{
932 pci_unregister_driver(&agp_intel_pci_driver);
933}
934
935module_init(agp_intel_init);
936module_exit(agp_intel_cleanup);
937
f4432c5c 938MODULE_AUTHOR("Dave Jones <davej@redhat.com>");
1da177e4 939MODULE_LICENSE("GPL and additional rights");
Linux 6.x block layer and io_uring tree(s)