gpiolib: Identify arrays matching GPIO hardware
[linux-block.git] / drivers / bus / ts-nbus.c
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1/*
2 * NBUS driver for TS-4600 based boards
3 *
4 * Copyright (c) 2016 - Savoir-faire Linux
5 * Author: Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>
6 *
7 * This file is licensed under the terms of the GNU General Public
8 * License version 2. This program is licensed "as is" without any
9 * warranty of any kind, whether express or implied.
10 *
11 * This driver implements a GPIOs bit-banged bus, called the NBUS by Technologic
12 * Systems. It is used to communicate with the peripherals in the FPGA on the
13 * TS-4600 SoM.
14 */
15
16#include <linux/bitops.h>
17#include <linux/gpio/consumer.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/mutex.h>
21#include <linux/of_platform.h>
22#include <linux/platform_device.h>
23#include <linux/pwm.h>
24#include <linux/ts-nbus.h>
25
26#define TS_NBUS_DIRECTION_IN 0
27#define TS_NBUS_DIRECTION_OUT 1
28#define TS_NBUS_WRITE_ADR 0
29#define TS_NBUS_WRITE_VAL 1
30
31struct ts_nbus {
32 struct pwm_device *pwm;
33 struct gpio_descs *data;
34 struct gpio_desc *csn;
35 struct gpio_desc *txrx;
36 struct gpio_desc *strobe;
37 struct gpio_desc *ale;
38 struct gpio_desc *rdy;
39 struct mutex lock;
40};
41
42/*
43 * request all gpios required by the bus.
44 */
45static int ts_nbus_init_pdata(struct platform_device *pdev, struct ts_nbus
46 *ts_nbus)
47{
48 ts_nbus->data = devm_gpiod_get_array(&pdev->dev, "ts,data",
49 GPIOD_OUT_HIGH);
50 if (IS_ERR(ts_nbus->data)) {
51 dev_err(&pdev->dev, "failed to retrieve ts,data-gpio from dts\n");
52 return PTR_ERR(ts_nbus->data);
53 }
54
55 ts_nbus->csn = devm_gpiod_get(&pdev->dev, "ts,csn", GPIOD_OUT_HIGH);
56 if (IS_ERR(ts_nbus->csn)) {
57 dev_err(&pdev->dev, "failed to retrieve ts,csn-gpio from dts\n");
58 return PTR_ERR(ts_nbus->csn);
59 }
60
61 ts_nbus->txrx = devm_gpiod_get(&pdev->dev, "ts,txrx", GPIOD_OUT_HIGH);
62 if (IS_ERR(ts_nbus->txrx)) {
63 dev_err(&pdev->dev, "failed to retrieve ts,txrx-gpio from dts\n");
64 return PTR_ERR(ts_nbus->txrx);
65 }
66
67 ts_nbus->strobe = devm_gpiod_get(&pdev->dev, "ts,strobe", GPIOD_OUT_HIGH);
68 if (IS_ERR(ts_nbus->strobe)) {
69 dev_err(&pdev->dev, "failed to retrieve ts,strobe-gpio from dts\n");
70 return PTR_ERR(ts_nbus->strobe);
71 }
72
73 ts_nbus->ale = devm_gpiod_get(&pdev->dev, "ts,ale", GPIOD_OUT_HIGH);
74 if (IS_ERR(ts_nbus->ale)) {
75 dev_err(&pdev->dev, "failed to retrieve ts,ale-gpio from dts\n");
76 return PTR_ERR(ts_nbus->ale);
77 }
78
79 ts_nbus->rdy = devm_gpiod_get(&pdev->dev, "ts,rdy", GPIOD_IN);
80 if (IS_ERR(ts_nbus->rdy)) {
81 dev_err(&pdev->dev, "failed to retrieve ts,rdy-gpio from dts\n");
82 return PTR_ERR(ts_nbus->rdy);
83 }
84
85 return 0;
86}
87
88/*
89 * the data gpios are used for reading and writing values, their directions
90 * should be adjusted accordingly.
91 */
92static void ts_nbus_set_direction(struct ts_nbus *ts_nbus, int direction)
93{
94 int i;
95
96 for (i = 0; i < 8; i++) {
97 if (direction == TS_NBUS_DIRECTION_IN)
98 gpiod_direction_input(ts_nbus->data->desc[i]);
99 else
100 /* when used as output the default state of the data
101 * lines are set to high */
102 gpiod_direction_output(ts_nbus->data->desc[i], 1);
103 }
104}
105
106/*
107 * reset the bus in its initial state.
108 * The data, csn, strobe and ale lines must be zero'ed to let the FPGA knows a
109 * new transaction can be process.
110 */
111static void ts_nbus_reset_bus(struct ts_nbus *ts_nbus)
112{
b9762beb 113 DECLARE_BITMAP(values, 8);
5b143d2a 114
b9762beb 115 values[0] = 0;
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116
117 gpiod_set_array_value_cansleep(8, ts_nbus->data->desc, values);
118 gpiod_set_value_cansleep(ts_nbus->csn, 0);
119 gpiod_set_value_cansleep(ts_nbus->strobe, 0);
120 gpiod_set_value_cansleep(ts_nbus->ale, 0);
121}
122
123/*
124 * let the FPGA knows it can process.
125 */
126static void ts_nbus_start_transaction(struct ts_nbus *ts_nbus)
127{
128 gpiod_set_value_cansleep(ts_nbus->strobe, 1);
129}
130
131/*
132 * read a byte value from the data gpios.
133 * return 0 on success or negative errno on failure.
134 */
135static int ts_nbus_read_byte(struct ts_nbus *ts_nbus, u8 *val)
136{
137 struct gpio_descs *gpios = ts_nbus->data;
138 int ret, i;
139
140 *val = 0;
141 for (i = 0; i < 8; i++) {
142 ret = gpiod_get_value_cansleep(gpios->desc[i]);
143 if (ret < 0)
144 return ret;
145 if (ret)
146 *val |= BIT(i);
147 }
148
149 return 0;
150}
151
152/*
153 * set the data gpios accordingly to the byte value.
154 */
155static void ts_nbus_write_byte(struct ts_nbus *ts_nbus, u8 byte)
156{
157 struct gpio_descs *gpios = ts_nbus->data;
b9762beb 158 DECLARE_BITMAP(values, 8);
5b143d2a 159
b9762beb 160 values[0] = byte;
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161
162 gpiod_set_array_value_cansleep(8, gpios->desc, values);
163}
164
165/*
166 * reading the bus consists of resetting the bus, then notifying the FPGA to
167 * send the data in the data gpios and return the read value.
168 * return 0 on success or negative errno on failure.
169 */
170static int ts_nbus_read_bus(struct ts_nbus *ts_nbus, u8 *val)
171{
172 ts_nbus_reset_bus(ts_nbus);
173 ts_nbus_start_transaction(ts_nbus);
174
175 return ts_nbus_read_byte(ts_nbus, val);
176}
177
178/*
179 * writing to the bus consists of resetting the bus, then define the type of
180 * command (address/value), write the data and notify the FPGA to retrieve the
181 * value in the data gpios.
182 */
183static void ts_nbus_write_bus(struct ts_nbus *ts_nbus, int cmd, u8 val)
184{
185 ts_nbus_reset_bus(ts_nbus);
186
187 if (cmd == TS_NBUS_WRITE_ADR)
188 gpiod_set_value_cansleep(ts_nbus->ale, 1);
189
190 ts_nbus_write_byte(ts_nbus, val);
191 ts_nbus_start_transaction(ts_nbus);
192}
193
194/*
195 * read the value in the FPGA register at the given address.
196 * return 0 on success or negative errno on failure.
197 */
198int ts_nbus_read(struct ts_nbus *ts_nbus, u8 adr, u16 *val)
199{
200 int ret, i;
201 u8 byte;
202
203 /* bus access must be atomic */
204 mutex_lock(&ts_nbus->lock);
205
206 /* set the bus in read mode */
207 gpiod_set_value_cansleep(ts_nbus->txrx, 0);
208
209 /* write address */
210 ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);
211
212 /* set the data gpios direction as input before reading */
213 ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_IN);
214
215 /* reading value MSB first */
216 do {
217 *val = 0;
218 byte = 0;
219 for (i = 1; i >= 0; i--) {
220 /* read a byte from the bus, leave on error */
221 ret = ts_nbus_read_bus(ts_nbus, &byte);
222 if (ret < 0)
223 goto err;
224
225 /* append the byte read to the final value */
226 *val |= byte << (i * 8);
227 }
228 gpiod_set_value_cansleep(ts_nbus->csn, 1);
229 ret = gpiod_get_value_cansleep(ts_nbus->rdy);
230 } while (ret);
231
232err:
233 /* restore the data gpios direction as output after reading */
234 ts_nbus_set_direction(ts_nbus, TS_NBUS_DIRECTION_OUT);
235
236 mutex_unlock(&ts_nbus->lock);
237
238 return ret;
239}
240EXPORT_SYMBOL_GPL(ts_nbus_read);
241
242/*
243 * write the desired value in the FPGA register at the given address.
244 */
245int ts_nbus_write(struct ts_nbus *ts_nbus, u8 adr, u16 val)
246{
247 int i;
248
249 /* bus access must be atomic */
250 mutex_lock(&ts_nbus->lock);
251
252 /* set the bus in write mode */
253 gpiod_set_value_cansleep(ts_nbus->txrx, 1);
254
255 /* write address */
256 ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_ADR, adr);
257
258 /* writing value MSB first */
259 for (i = 1; i >= 0; i--)
260 ts_nbus_write_bus(ts_nbus, TS_NBUS_WRITE_VAL, (u8)(val >> (i * 8)));
261
262 /* wait for completion */
263 gpiod_set_value_cansleep(ts_nbus->csn, 1);
264 while (gpiod_get_value_cansleep(ts_nbus->rdy) != 0) {
265 gpiod_set_value_cansleep(ts_nbus->csn, 0);
266 gpiod_set_value_cansleep(ts_nbus->csn, 1);
267 }
268
269 mutex_unlock(&ts_nbus->lock);
270
271 return 0;
272}
273EXPORT_SYMBOL_GPL(ts_nbus_write);
274
275static int ts_nbus_probe(struct platform_device *pdev)
276{
277 struct pwm_device *pwm;
278 struct pwm_args pargs;
279 struct device *dev = &pdev->dev;
280 struct ts_nbus *ts_nbus;
281 int ret;
282
283 ts_nbus = devm_kzalloc(dev, sizeof(*ts_nbus), GFP_KERNEL);
284 if (!ts_nbus)
285 return -ENOMEM;
286
287 mutex_init(&ts_nbus->lock);
288
289 ret = ts_nbus_init_pdata(pdev, ts_nbus);
290 if (ret < 0)
291 return ret;
292
293 pwm = devm_pwm_get(dev, NULL);
294 if (IS_ERR(pwm)) {
295 ret = PTR_ERR(pwm);
296 if (ret != -EPROBE_DEFER)
297 dev_err(dev, "unable to request PWM\n");
298 return ret;
299 }
300
301 pwm_get_args(pwm, &pargs);
302 if (!pargs.period) {
303 dev_err(&pdev->dev, "invalid PWM period\n");
304 return -EINVAL;
305 }
306
307 /*
308 * FIXME: pwm_apply_args() should be removed when switching to
309 * the atomic PWM API.
310 */
311 pwm_apply_args(pwm);
312 ret = pwm_config(pwm, pargs.period, pargs.period);
313 if (ret < 0)
314 return ret;
315
316 /*
317 * we can now start the FPGA and populate the peripherals.
318 */
319 pwm_enable(pwm);
320 ts_nbus->pwm = pwm;
321
322 /*
323 * let the child nodes retrieve this instance of the ts-nbus.
324 */
325 dev_set_drvdata(dev, ts_nbus);
326
327 ret = of_platform_populate(dev->of_node, NULL, NULL, dev);
328 if (ret < 0)
329 return ret;
330
331 dev_info(dev, "initialized\n");
332
333 return 0;
334}
335
336static int ts_nbus_remove(struct platform_device *pdev)
337{
338 struct ts_nbus *ts_nbus = dev_get_drvdata(&pdev->dev);
339
340 /* shutdown the FPGA */
341 mutex_lock(&ts_nbus->lock);
342 pwm_disable(ts_nbus->pwm);
343 mutex_unlock(&ts_nbus->lock);
344
345 return 0;
346}
347
348static const struct of_device_id ts_nbus_of_match[] = {
349 { .compatible = "technologic,ts-nbus", },
350 { },
351};
352MODULE_DEVICE_TABLE(of, ts_nbus_of_match);
353
354static struct platform_driver ts_nbus_driver = {
355 .probe = ts_nbus_probe,
356 .remove = ts_nbus_remove,
357 .driver = {
358 .name = "ts_nbus",
359 .of_match_table = ts_nbus_of_match,
360 },
361};
362
363module_platform_driver(ts_nbus_driver);
364
365MODULE_ALIAS("platform:ts_nbus");
366MODULE_AUTHOR("Sebastien Bourdelin <sebastien.bourdelin@savoirfairelinux.com>");
367MODULE_DESCRIPTION("Technologic Systems NBUS");
368MODULE_LICENSE("GPL v2");