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bus: ti-sysc: Detect timer and gpio on dra7
[linux-2.6-block.git] / drivers / bus / ti-sysc.c
CommitLineData
0eecc636
TL		 1/*
2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/io.h>
15#include <linux/clk.h>
2c355ff6 16#include <linux/clkdev.h>
a885f0fe 17#include <linux/delay.h>
0eecc636
TL		 18#include <linux/module.h>
19#include <linux/platform_device.h>
a885f0fe 20#include <linux/pm_domain.h>
0eecc636 21#include <linux/pm_runtime.h>
5062236e 22#include <linux/reset.h>
0eecc636
TL		 23#include <linux/of_address.h>
24#include <linux/of_platform.h>
2c355ff6 25#include <linux/slab.h>
596e7955 26#include <linux/iopoll.h>
2c355ff6 27
70a65240
TL		 28#include <linux/platform_data/ti-sysc.h>
29
30#include <dt-bindings/bus/ti-sysc.h>
0eecc636 31
596e7955
FA		 32#define MAX_MODULE_SOFTRESET_WAIT 10000
33
0eecc636
TL		 34static const char * const reg_names[] = { "rev", "sysc", "syss", };
35
36enum sysc_clocks {
37 SYSC_FCK,
38 SYSC_ICK,
09dfe581
TL		 39 SYSC_OPTFCK0,
40 SYSC_OPTFCK1,
41 SYSC_OPTFCK2,
42 SYSC_OPTFCK3,
43 SYSC_OPTFCK4,
44 SYSC_OPTFCK5,
45 SYSC_OPTFCK6,
46 SYSC_OPTFCK7,
0eecc636
TL		 47 SYSC_MAX_CLOCKS,
48};
49
09dfe581 50static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
0eecc636 51
c5a2de97
TL		 52#define SYSC_IDLEMODE_MASK 3
53#define SYSC_CLOCKACTIVITY_MASK 3
54
0eecc636
TL		 55/**
56 * struct sysc - TI sysc interconnect target module registers and capabilities
57 * @dev: struct device pointer
58 * @module_pa: physical address of the interconnect target module
59 * @module_size: size of the interconnect target module
60 * @module_va: virtual address of the interconnect target module
61 * @offsets: register offsets from module base
62 * @clocks: clocks used by the interconnect target module
09dfe581
TL		 63 * @clock_roles: clock role names for the found clocks
64 * @nr_clocks: number of clocks used by the interconnect target module
0eecc636 65 * @legacy_mode: configured for legacy mode if set
70a65240
TL		 66 * @cap: interconnect target module capabilities
67 * @cfg: interconnect target module configuration
566a9b05
TL		 68 * @name: name if available
69 * @revision: interconnect target module revision
62020f23 70 * @needs_resume: runtime resume needed on resume from suspend
0eecc636
TL		 71 */
72struct sysc {
73 struct device *dev;
74 u64 module_pa;
75 u32 module_size;
76 void __iomem *module_va;
77 int offsets[SYSC_MAX_REGS];
09dfe581
TL		 78 struct clk **clocks;
79 const char **clock_roles;
80 int nr_clocks;
5062236e 81 struct reset_control *rsts;
0eecc636 82 const char *legacy_mode;
70a65240
TL		 83 const struct sysc_capabilities *cap;
84 struct sysc_config cfg;
ef70b0bd 85 struct ti_sysc_cookie cookie;
566a9b05
TL		 86 const char *name;
87 u32 revision;
62020f23
TL		 88 bool enabled;
89 bool needs_resume;
40d9f912 90 unsigned int noirq_suspend:1;
a885f0fe 91 bool child_needs_resume;
76f0f772 92 struct delayed_work idle_work;
0eecc636
TL		 93};
94
596e7955
FA		 95void sysc_write(struct sysc *ddata, int offset, u32 value)
96{
97 writel_relaxed(value, ddata->module_va + offset);
98}
99
566a9b05
TL		 100static u32 sysc_read(struct sysc *ddata, int offset)
101{
102 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
103 u32 val;
104
105 val = readw_relaxed(ddata->module_va + offset);
106 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
107
108 return val;
109 }
110
111 return readl_relaxed(ddata->module_va + offset);
112}
113
09dfe581
TL		 114static bool sysc_opt_clks_needed(struct sysc *ddata)
115{
116 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
117}
118
0eecc636
TL		 119static u32 sysc_read_revision(struct sysc *ddata)
120{
566a9b05
TL		 121 int offset = ddata->offsets[SYSC_REVISION];
122
123 if (offset < 0)
124 return 0;
125
126 return sysc_read(ddata, offset);
0eecc636
TL		 127}
128
09dfe581 129static int sysc_get_one_clock(struct sysc *ddata, const char *name)
0eecc636 130{
09dfe581
TL		 131 int error, i, index = -ENODEV;
132
133 if (!strncmp(clock_names[SYSC_FCK], name, 3))
134 index = SYSC_FCK;
135 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
136 index = SYSC_ICK;
137
138 if (index < 0) {
139 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
c97c8620 140 if (!ddata->clocks[i]) {
09dfe581
TL		 141 index = i;
142 break;
143 }
144 }
145 }
0eecc636 146
09dfe581
TL		 147 if (index < 0) {
148 dev_err(ddata->dev, "clock %s not added\n", name);
149 return index;
0eecc636 150 }
0eecc636
TL		 151
152 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
153 if (IS_ERR(ddata->clocks[index])) {
154 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
155 return 0;
156
157 dev_err(ddata->dev, "clock get error for %s: %li\n",
158 name, PTR_ERR(ddata->clocks[index]));
159
160 return PTR_ERR(ddata->clocks[index]);
161 }
162
163 error = clk_prepare(ddata->clocks[index]);
164 if (error) {
165 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
166 name, error);
167
168 return error;
169 }
170
171 return 0;
172}
173
174static int sysc_get_clocks(struct sysc *ddata)
175{
09dfe581
TL		 176 struct device_node *np = ddata->dev->of_node;
177 struct property *prop;
178 const char *name;
179 int nr_fck = 0, nr_ick = 0, i, error = 0;
180
20749051 181 ddata->clock_roles = devm_kcalloc(ddata->dev,
09dfe581 182 SYSC_MAX_CLOCKS,
20749051 183 sizeof(*ddata->clock_roles),
09dfe581
TL		 184 GFP_KERNEL);
185 if (!ddata->clock_roles)
186 return -ENOMEM;
187
188 of_property_for_each_string(np, "clock-names", prop, name) {
189 if (!strncmp(clock_names[SYSC_FCK], name, 3))
190 nr_fck++;
191 if (!strncmp(clock_names[SYSC_ICK], name, 3))
192 nr_ick++;
193 ddata->clock_roles[ddata->nr_clocks] = name;
194 ddata->nr_clocks++;
195 }
196
197 if (ddata->nr_clocks < 1)
198 return 0;
199
200 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
201 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
202
203 return -EINVAL;
204 }
205
206 if (nr_fck > 1 || nr_ick > 1) {
207 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
0eecc636 208
09dfe581
TL		 209 return -EINVAL;
210 }
211
20749051
KC		 212 ddata->clocks = devm_kcalloc(ddata->dev,
213 ddata->nr_clocks, sizeof(*ddata->clocks),
09dfe581
TL		 214 GFP_KERNEL);
215 if (!ddata->clocks)
216 return -ENOMEM;
217
218 for (i = 0; i < ddata->nr_clocks; i++) {
219 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
0eecc636
TL		 220 if (error && error != -ENOENT)
221 return error;
222 }
223
224 return 0;
225}
226
5062236e
TL		 227/**
228 * sysc_init_resets - reset module on init
229 * @ddata: device driver data
230 *
231 * A module can have both OCP softreset control and external rstctrl.
232 * If more complicated rstctrl resets are needed, please handle these
233 * directly from the child device driver and map only the module reset
234 * for the parent interconnect target module device.
235 *
236 * Automatic reset of the module on init can be skipped with the
237 * "ti,no-reset-on-init" device tree property.
238 */
239static int sysc_init_resets(struct sysc *ddata)
240{
241 int error;
242
243 ddata->rsts =
244 devm_reset_control_array_get_optional_exclusive(ddata->dev);
245 if (IS_ERR(ddata->rsts))
246 return PTR_ERR(ddata->rsts);
247
248 if (ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
249 goto deassert;
250
251 error = reset_control_assert(ddata->rsts);
252 if (error)
253 return error;
254
255deassert:
256 error = reset_control_deassert(ddata->rsts);
257 if (error)
258 return error;
259
260 return 0;
261}
262
0eecc636
TL		 263/**
264 * sysc_parse_and_check_child_range - parses module IO region from ranges
265 * @ddata: device driver data
266 *
267 * In general we only need rev, syss, and sysc registers and not the whole
268 * module range. But we do want the offsets for these registers from the
269 * module base. This allows us to check them against the legacy hwmod
270 * platform data. Let's also check the ranges are configured properly.
271 */
272static int sysc_parse_and_check_child_range(struct sysc *ddata)
273{
274 struct device_node *np = ddata->dev->of_node;
275 const __be32 *ranges;
276 u32 nr_addr, nr_size;
277 int len, error;
278
279 ranges = of_get_property(np, "ranges", &len);
280 if (!ranges) {
281 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
282
283 return -ENOENT;
284 }
285
286 len /= sizeof(*ranges);
287
288 if (len < 3) {
289 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
290
291 return -EINVAL;
292 }
293
294 error = of_property_read_u32(np, "#address-cells", &nr_addr);
295 if (error)
296 return -ENOENT;
297
298 error = of_property_read_u32(np, "#size-cells", &nr_size);
299 if (error)
300 return -ENOENT;
301
302 if (nr_addr != 1 || nr_size != 1) {
303 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
304
305 return -EINVAL;
306 }
307
308 ranges++;
309 ddata->module_pa = of_translate_address(np, ranges++);
310 ddata->module_size = be32_to_cpup(ranges);
311
0eecc636
TL		 312 return 0;
313}
314
3bb37c8e
TL		 315static struct device_node *stdout_path;
316
317static void sysc_init_stdout_path(struct sysc *ddata)
318{
319 struct device_node *np = NULL;
320 const char *uart;
321
322 if (IS_ERR(stdout_path))
323 return;
324
325 if (stdout_path)
326 return;
327
328 np = of_find_node_by_path("/chosen");
329 if (!np)
330 goto err;
331
332 uart = of_get_property(np, "stdout-path", NULL);
333 if (!uart)
334 goto err;
335
336 np = of_find_node_by_path(uart);
337 if (!np)
338 goto err;
339
340 stdout_path = np;
341
342 return;
343
344err:
345 stdout_path = ERR_PTR(-ENODEV);
346}
347
348static void sysc_check_quirk_stdout(struct sysc *ddata,
349 struct device_node *np)
350{
351 sysc_init_stdout_path(ddata);
352 if (np != stdout_path)
353 return;
354
355 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
356 SYSC_QUIRK_NO_RESET_ON_INIT;
357}
358
0eecc636
TL		 359/**
360 * sysc_check_one_child - check child configuration
361 * @ddata: device driver data
362 * @np: child device node
363 *
364 * Let's avoid messy situations where we have new interconnect target
365 * node but children have "ti,hwmods". These belong to the interconnect
366 * target node and are managed by this driver.
367 */
368static int sysc_check_one_child(struct sysc *ddata,
369 struct device_node *np)
370{
371 const char *name;
372
373 name = of_get_property(np, "ti,hwmods", NULL);
374 if (name)
375 dev_warn(ddata->dev, "really a child ti,hwmods property?");
376
3bb37c8e
TL		 377 sysc_check_quirk_stdout(ddata, np);
378
0eecc636
TL		 379 return 0;
380}
381
382static int sysc_check_children(struct sysc *ddata)
383{
384 struct device_node *child;
385 int error;
386
387 for_each_child_of_node(ddata->dev->of_node, child) {
388 error = sysc_check_one_child(ddata, child);
389 if (error)
390 return error;
391 }
392
393 return 0;
394}
395
a7199e2b
TL		 396/*
397 * So far only I2C uses 16-bit read access with clockactivity with revision
398 * in two registers with stride of 4. We can detect this based on the rev
399 * register size to configure things far enough to be able to properly read
400 * the revision register.
401 */
402static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
403{
dd57ac1e 404 if (resource_size(res) == 8)
a7199e2b 405 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
a7199e2b
TL		 406}
407
0eecc636
TL		 408/**
409 * sysc_parse_one - parses the interconnect target module registers
410 * @ddata: device driver data
411 * @reg: register to parse
412 */
413static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
414{
415 struct resource *res;
416 const char *name;
417
418 switch (reg) {
419 case SYSC_REVISION:
420 case SYSC_SYSCONFIG:
421 case SYSC_SYSSTATUS:
422 name = reg_names[reg];
423 break;
424 default:
425 return -EINVAL;
426 }
427
428 res = platform_get_resource_byname(to_platform_device(ddata->dev),
429 IORESOURCE_MEM, name);
430 if (!res) {
0eecc636
TL		 431 ddata->offsets[reg] = -ENODEV;
432
433 return 0;
434 }
435
436 ddata->offsets[reg] = res->start - ddata->module_pa;
a7199e2b
TL		 437 if (reg == SYSC_REVISION)
438 sysc_check_quirk_16bit(ddata, res);
0eecc636
TL		 439
440 return 0;
441}
442
443static int sysc_parse_registers(struct sysc *ddata)
444{
445 int i, error;
446
447 for (i = 0; i < SYSC_MAX_REGS; i++) {
448 error = sysc_parse_one(ddata, i);
449 if (error)
450 return error;
451 }
452
453 return 0;
454}
455
456/**
457 * sysc_check_registers - check for misconfigured register overlaps
458 * @ddata: device driver data
459 */
460static int sysc_check_registers(struct sysc *ddata)
461{
462 int i, j, nr_regs = 0, nr_matches = 0;
463
464 for (i = 0; i < SYSC_MAX_REGS; i++) {
465 if (ddata->offsets[i] < 0)
466 continue;
467
468 if (ddata->offsets[i] > (ddata->module_size - 4)) {
469 dev_err(ddata->dev, "register outside module range");
470
471 return -EINVAL;
472 }
473
474 for (j = 0; j < SYSC_MAX_REGS; j++) {
475 if (ddata->offsets[j] < 0)
476 continue;
477
478 if (ddata->offsets[i] == ddata->offsets[j])
479 nr_matches++;
480 }
481 nr_regs++;
482 }
483
484 if (nr_regs < 1) {
485 dev_err(ddata->dev, "missing registers\n");
486
487 return -EINVAL;
488 }
489
490 if (nr_matches > nr_regs) {
491 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
492 nr_regs, nr_matches);
493
494 return -EINVAL;
495 }
496
497 return 0;
498}
499
500/**
501 * syc_ioremap - ioremap register space for the interconnect target module
0ef8e3bb 502 * @ddata: device driver data
0eecc636
TL		 503 *
504 * Note that the interconnect target module registers can be anywhere
0ef8e3bb
TL		 505 * within the interconnect target module range. For example, SGX has
506 * them at offset 0x1fc00 in the 32MB module address space. And cpsw
507 * has them at offset 0x1200 in the CPSW_WR child. Usually the
508 * the interconnect target module registers are at the beginning of
509 * the module range though.
0eecc636
TL		 510 */
511static int sysc_ioremap(struct sysc *ddata)
512{
0ef8e3bb 513 int size;
0eecc636 514
0ef8e3bb
TL		 515 size = max3(ddata->offsets[SYSC_REVISION],
516 ddata->offsets[SYSC_SYSCONFIG],
517 ddata->offsets[SYSC_SYSSTATUS]);
518
519 if (size < 0 || (size + sizeof(u32)) > ddata->module_size)
520 return -EINVAL;
0eecc636
TL		 521
522 ddata->module_va = devm_ioremap(ddata->dev,
523 ddata->module_pa,
0ef8e3bb 524 size + sizeof(u32));
0eecc636
TL		 525 if (!ddata->module_va)
526 return -EIO;
527
528 return 0;
529}
530
531/**
532 * sysc_map_and_check_registers - ioremap and check device registers
533 * @ddata: device driver data
534 */
535static int sysc_map_and_check_registers(struct sysc *ddata)
536{
537 int error;
538
539 error = sysc_parse_and_check_child_range(ddata);
540 if (error)
541 return error;
542
543 error = sysc_check_children(ddata);
544 if (error)
545 return error;
546
547 error = sysc_parse_registers(ddata);
548 if (error)
549 return error;
550
551 error = sysc_ioremap(ddata);
552 if (error)
553 return error;
554
555 error = sysc_check_registers(ddata);
556 if (error)
557 return error;
558
559 return 0;
560}
561
562/**
563 * sysc_show_rev - read and show interconnect target module revision
564 * @bufp: buffer to print the information to
565 * @ddata: device driver data
566 */
567static int sysc_show_rev(char *bufp, struct sysc *ddata)
568{
566a9b05 569 int len;
0eecc636
TL		 570
571 if (ddata->offsets[SYSC_REVISION] < 0)
572 return sprintf(bufp, ":NA");
573
566a9b05 574 len = sprintf(bufp, ":%08x", ddata->revision);
0eecc636
TL		 575
576 return len;
577}
578
579static int sysc_show_reg(struct sysc *ddata,
580 char *bufp, enum sysc_registers reg)
581{
582 if (ddata->offsets[reg] < 0)
583 return sprintf(bufp, ":NA");
584
585 return sprintf(bufp, ":%x", ddata->offsets[reg]);
586}
587
a885f0fe
TL		 588static int sysc_show_name(char *bufp, struct sysc *ddata)
589{
590 if (!ddata->name)
591 return 0;
592
593 return sprintf(bufp, ":%s", ddata->name);
594}
595
0eecc636
TL		 596/**
597 * sysc_show_registers - show information about interconnect target module
598 * @ddata: device driver data
599 */
600static void sysc_show_registers(struct sysc *ddata)
601{
602 char buf[128];
603 char *bufp = buf;
604 int i;
605
606 for (i = 0; i < SYSC_MAX_REGS; i++)
607 bufp += sysc_show_reg(ddata, bufp, i);
608
609 bufp += sysc_show_rev(bufp, ddata);
a885f0fe 610 bufp += sysc_show_name(bufp, ddata);
0eecc636
TL		 611
612 dev_dbg(ddata->dev, "%llx:%x%s\n",
613 ddata->module_pa, ddata->module_size,
614 buf);
615}
616
a4a5d493 617static int __maybe_unused sysc_runtime_suspend(struct device *dev)
0eecc636 618{
ef70b0bd 619 struct ti_sysc_platform_data *pdata;
0eecc636 620 struct sysc *ddata;
ef70b0bd 621 int error = 0, i;
0eecc636
TL		 622
623 ddata = dev_get_drvdata(dev);
624
ef70b0bd 625 if (!ddata->enabled)
0eecc636
TL		 626 return 0;
627
ef70b0bd
TL		 628 if (ddata->legacy_mode) {
629 pdata = dev_get_platdata(ddata->dev);
630 if (!pdata)
631 return 0;
632
633 if (!pdata->idle_module)
634 return -ENODEV;
635
636 error = pdata->idle_module(dev, &ddata->cookie);
637 if (error)
638 dev_err(dev, "%s: could not idle: %i\n",
639 __func__, error);
640
641 goto idled;
642 }
643
09dfe581 644 for (i = 0; i < ddata->nr_clocks; i++) {
0eecc636
TL		 645 if (IS_ERR_OR_NULL(ddata->clocks[i]))
646 continue;
09dfe581
TL		 647
648 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
649 break;
650
0eecc636
TL		 651 clk_disable(ddata->clocks[i]);
652 }
653
ef70b0bd
TL		 654idled:
655 ddata->enabled = false;
656
657 return error;
0eecc636
TL		 658}
659
a4a5d493 660static int __maybe_unused sysc_runtime_resume(struct device *dev)
0eecc636 661{
ef70b0bd 662 struct ti_sysc_platform_data *pdata;
0eecc636 663 struct sysc *ddata;
ef70b0bd 664 int error = 0, i;
0eecc636
TL		 665
666 ddata = dev_get_drvdata(dev);
667
ef70b0bd 668 if (ddata->enabled)
0eecc636
TL		 669 return 0;
670
ef70b0bd
TL		 671 if (ddata->legacy_mode) {
672 pdata = dev_get_platdata(ddata->dev);
673 if (!pdata)
674 return 0;
675
676 if (!pdata->enable_module)
677 return -ENODEV;
678
679 error = pdata->enable_module(dev, &ddata->cookie);
680 if (error)
681 dev_err(dev, "%s: could not enable: %i\n",
682 __func__, error);
683
684 goto awake;
685 }
686
09dfe581 687 for (i = 0; i < ddata->nr_clocks; i++) {
0eecc636
TL		 688 if (IS_ERR_OR_NULL(ddata->clocks[i]))
689 continue;
09dfe581
TL		 690
691 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
692 break;
693
0eecc636
TL		 694 error = clk_enable(ddata->clocks[i]);
695 if (error)
696 return error;
697 }
698
ef70b0bd
TL		 699awake:
700 ddata->enabled = true;
701
702 return error;
0eecc636
TL		 703}
704
62020f23
TL		 705#ifdef CONFIG_PM_SLEEP
706static int sysc_suspend(struct device *dev)
707{
708 struct sysc *ddata;
ef55f821 709 int error;
62020f23
TL		 710
711 ddata = dev_get_drvdata(dev);
712
40d9f912 713 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
e7420c2d
TL		 714 return 0;
715
40d9f912 716 if (!ddata->enabled || ddata->noirq_suspend)
62020f23
TL		 717 return 0;
718
ef55f821
TL		 719 dev_dbg(ddata->dev, "%s %s\n", __func__,
720 ddata->name ? ddata->name : "");
721
722 error = pm_runtime_put_sync_suspend(dev);
40d9f912
TL		 723 if (error == -EBUSY) {
724 dev_dbg(ddata->dev, "%s busy, tagging for noirq suspend %s\n",
725 __func__, ddata->name ? ddata->name : "");
726
727 ddata->noirq_suspend = true;
728
729 return 0;
730 } else if (error < 0) {
731 dev_warn(ddata->dev, "%s cannot suspend %i %s\n",
ef55f821
TL		 732 __func__, error,
733 ddata->name ? ddata->name : "");
734
735 return 0;
736 }
737
62020f23
TL		 738 ddata->needs_resume = true;
739
ef55f821 740 return 0;
62020f23
TL		 741}
742
743static int sysc_resume(struct device *dev)
744{
745 struct sysc *ddata;
ef55f821 746 int error;
62020f23
TL		 747
748 ddata = dev_get_drvdata(dev);
e7420c2d 749
40d9f912 750 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
e7420c2d
TL		 751 return 0;
752
40d9f912
TL		 753 if (!ddata->needs_resume || ddata->noirq_suspend)
754 return 0;
e7420c2d 755
40d9f912
TL		 756 dev_dbg(ddata->dev, "%s %s\n", __func__,
757 ddata->name ? ddata->name : "");
e7420c2d 758
40d9f912
TL		 759 error = pm_runtime_get_sync(dev);
760 if (error < 0) {
761 dev_err(ddata->dev, "%s error %i %s\n",
762 __func__, error,
763 ddata->name ? ddata->name : "");
ef55f821 764
40d9f912 765 return error;
e7420c2d
TL		 766 }
767
40d9f912
TL		 768 ddata->needs_resume = false;
769
e7420c2d
TL		 770 return 0;
771}
772
773static int sysc_noirq_suspend(struct device *dev)
774{
775 struct sysc *ddata;
40d9f912 776 int error;
e7420c2d
TL		 777
778 ddata = dev_get_drvdata(dev);
779
780 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
781 return 0;
782
40d9f912 783 if (!ddata->enabled || !ddata->noirq_suspend)
e7420c2d
TL		 784 return 0;
785
786 dev_dbg(ddata->dev, "%s %s\n", __func__,
787 ddata->name ? ddata->name : "");
788
40d9f912
TL		 789 error = sysc_runtime_suspend(dev);
790 if (error) {
791 dev_warn(ddata->dev, "%s busy %i %s\n",
792 __func__, error, ddata->name ? ddata->name : "");
793
794 return 0;
795 }
796
e7420c2d
TL		 797 ddata->needs_resume = true;
798
40d9f912 799 return 0;
e7420c2d
TL		 800}
801
802static int sysc_noirq_resume(struct device *dev)
803{
804 struct sysc *ddata;
40d9f912 805 int error;
e7420c2d
TL		 806
807 ddata = dev_get_drvdata(dev);
808
809 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
810 return 0;
811
40d9f912 812 if (!ddata->needs_resume || !ddata->noirq_suspend)
e7420c2d
TL		 813 return 0;
814
40d9f912
TL		 815 dev_dbg(ddata->dev, "%s %s\n", __func__,
816 ddata->name ? ddata->name : "");
ef55f821 817
40d9f912
TL		 818 error = sysc_runtime_resume(dev);
819 if (error) {
820 dev_warn(ddata->dev, "%s cannot resume %i %s\n",
821 __func__, error,
822 ddata->name ? ddata->name : "");
62020f23 823
40d9f912 824 return error;
62020f23
TL		 825 }
826
40d9f912
TL		 827 /* Maybe also reconsider clearing noirq_suspend at some point */
828 ddata->needs_resume = false;
829
0eecc636
TL		 830 return 0;
831}
62020f23 832#endif
0eecc636
TL		 833
834static const struct dev_pm_ops sysc_pm_ops = {
62020f23 835 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
e7420c2d 836 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_noirq_suspend, sysc_noirq_resume)
0eecc636
TL		 837 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
838 sysc_runtime_resume,
839 NULL)
840};
841
a885f0fe
TL		 842/* Module revision register based quirks */
843struct sysc_revision_quirk {
844 const char *name;
845 u32 base;
846 int rev_offset;
847 int sysc_offset;
848 int syss_offset;
849 u32 revision;
850 u32 revision_mask;
851 u32 quirks;
852};
853
854#define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
855 optrev_val, optrevmask, optquirkmask) \
856 { \
857 .name = (optname), \
858 .base = (optbase), \
859 .rev_offset = (optrev), \
860 .sysc_offset = (optsysc), \
861 .syss_offset = (optsyss), \
862 .revision = (optrev_val), \
863 .revision_mask = (optrevmask), \
864 .quirks = (optquirkmask), \
865 }
866
867static const struct sysc_revision_quirk sysc_revision_quirks[] = {
868 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
3a3d802b 869 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffff00ff,
09dfe581 870 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
a885f0fe
TL		 871 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
872 SYSC_QUIRK_LEGACY_IDLE),
873 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
874 SYSC_QUIRK_LEGACY_IDLE),
875 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
876 SYSC_QUIRK_LEGACY_IDLE),
877 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
878 SYSC_QUIRK_LEGACY_IDLE),
879 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
880 SYSC_QUIRK_LEGACY_IDLE),
881 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
882 SYSC_QUIRK_LEGACY_IDLE),
8cde5d5f 883 /* Some timers on omap4 and later */
3a3d802b
TL		 884 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x50002100, 0xffffffff,
885 SYSC_QUIRK_LEGACY_IDLE),
886 SYSC_QUIRK("timer", 0, 0, 0x10, -1, 0x4fff1301, 0xffff00ff,
8cde5d5f 887 SYSC_QUIRK_LEGACY_IDLE),
a885f0fe
TL		 888 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
889 SYSC_QUIRK_LEGACY_IDLE),
d708bb14 890 /* Uarts on omap4 and later */
b82beef5
TL		 891 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff,
892 SYSC_QUIRK_LEGACY_IDLE),
893 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff,
d708bb14 894 SYSC_QUIRK_LEGACY_IDLE),
7e27e5d0 895
dc4c85ea 896#ifdef DEBUG
1ba30693 897 SYSC_QUIRK("adc", 0, 0, 0x10, -1, 0x47300001, 0xffffffff, 0),
dc4c85ea 898 SYSC_QUIRK("aess", 0, 0, 0x10, -1, 0x40000000, 0xffffffff, 0),
40d9f912 899 SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
1ba30693 900 SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,
23731eac
TL		 901 0xffff00f0, 0),
902 SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0),
1ba30693
TL		 903 SYSC_QUIRK("dcan", 0, 0, -1, -1, 0x00001401, 0xffffffff, 0),
904 SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
905 SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
dc4c85ea
TL		 906 SYSC_QUIRK("gpu", 0, 0x1fc00, 0x1fc10, -1, 0, 0, 0),
907 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x00000006, 0xffffffff, 0),
1ba30693 908 SYSC_QUIRK("hdq1w", 0, 0, 0x14, 0x18, 0x0000000a, 0xffffffff, 0),
dc4c85ea
TL		 909 SYSC_QUIRK("hsi", 0, 0, 0x10, 0x14, 0x50043101, 0xffffffff, 0),
910 SYSC_QUIRK("iss", 0, 0, 0x10, -1, 0x40000101, 0xffffffff, 0),
1ba30693 911 SYSC_QUIRK("i2c", 0, 0, 0x10, 0x90, 0x5040000a, 0xfffffff0, 0),
23731eac 912 SYSC_QUIRK("lcdc", 0, 0, 0x54, -1, 0x4f201000, 0xffffffff, 0),
dc4c85ea 913 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44306302, 0xffffffff, 0),
1ba30693 914 SYSC_QUIRK("mcasp", 0, 0, 0x4, -1, 0x44307b02, 0xffffffff, 0),
dc4c85ea 915 SYSC_QUIRK("mcbsp", 0, -1, 0x8c, -1, 0, 0, 0),
40d9f912 916 SYSC_QUIRK("mcspi", 0, 0, 0x10, -1, 0x40300a0b, 0xffffffff, 0),
1ba30693 917 SYSC_QUIRK("mcspi", 0, 0, 0x110, 0x114, 0x40300a0b, 0xffffffff, 0),
dc4c85ea 918 SYSC_QUIRK("mailbox", 0, 0, 0x10, -1, 0x00000400, 0xffffffff, 0),
1ba30693 919 SYSC_QUIRK("m3", 0, 0, -1, -1, 0x5f580105, 0x0fff0f00, 0),
40d9f912 920 SYSC_QUIRK("ocp2scp", 0, 0, 0x10, 0x14, 0x50060005, 0xffffffff, 0),
1ba30693 921 SYSC_QUIRK("ocp2scp", 0, 0, -1, -1, 0x50060007, 0xffffffff, 0),
40d9f912
TL		 922 SYSC_QUIRK("padconf", 0, 0, 0x10, -1, 0x4fff0800, 0xffffffff, 0),
923 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000100, 0xffffffff, 0),
23731eac 924 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x00004102, 0xffffffff, 0),
1ba30693 925 SYSC_QUIRK("prcm", 0, 0, -1, -1, 0x40000400, 0xffffffff, 0),
40d9f912 926 SYSC_QUIRK("scm", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
23731eac 927 SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4e8b0100, 0xffffffff, 0),
1ba30693 928 SYSC_QUIRK("scm", 0, 0, -1, -1, 0x4f000100, 0xffffffff, 0),
40d9f912
TL		 929 SYSC_QUIRK("scrm", 0, 0, -1, -1, 0x00000010, 0xffffffff, 0),
930 SYSC_QUIRK("sdio", 0, 0, 0x10, -1, 0x40202301, 0xffffffff, 0),
1ba30693 931 SYSC_QUIRK("sdio", 0, 0x2fc, 0x110, 0x114, 0x31010000, 0xffffffff, 0),
40d9f912 932 SYSC_QUIRK("sdma", 0, 0, 0x2c, 0x28, 0x00010900, 0xffffffff, 0),
dc4c85ea
TL		 933 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40000902, 0xffffffff, 0),
934 SYSC_QUIRK("slimbus", 0, 0, 0x10, -1, 0x40002903, 0xffffffff, 0),
935 SYSC_QUIRK("spinlock", 0, 0, 0x10, -1, 0x50020000, 0xffffffff, 0),
1ba30693 936 SYSC_QUIRK("rng", 0, 0x1fe0, 0x1fe4, -1, 0x00000020, 0xffffffff, 0),
23731eac 937 SYSC_QUIRK("rtc", 0, 0x74, 0x78, -1, 0x4eb01908, 0xfffff0f0, 0),
1ba30693 938 SYSC_QUIRK("timer32k", 0, 0, 0x4, -1, 0x00000060, 0xffffffff, 0),
dc4c85ea
TL		 939 SYSC_QUIRK("usbhstll", 0, 0, 0x10, 0x14, 0x00000004, 0xffffffff, 0),
940 SYSC_QUIRK("usb_host_hs", 0, 0, 0x10, 0x14, 0x50700100, 0xffffffff, 0),
941 SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050,
942 0xffffffff, 0),
1ba30693
TL		 943 SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, 0),
944 SYSC_QUIRK("vfpe", 0, 0, 0x104, -1, 0x4d001200, 0xffffffff, 0),
dc4c85ea 945#endif
a885f0fe
TL		 946};
947
948static void sysc_init_revision_quirks(struct sysc *ddata)
949{
950 const struct sysc_revision_quirk *q;
951 int i;
952
953 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
954 q = &sysc_revision_quirks[i];
955
956 if (q->base && q->base != ddata->module_pa)
957 continue;
958
959 if (q->rev_offset >= 0 &&
960 q->rev_offset != ddata->offsets[SYSC_REVISION])
961 continue;
962
963 if (q->sysc_offset >= 0 &&
964 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
965 continue;
966
967 if (q->syss_offset >= 0 &&
968 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
969 continue;
970
971 if (q->revision == ddata->revision ||
972 (q->revision & q->revision_mask) ==
973 (ddata->revision & q->revision_mask)) {
974 ddata->name = q->name;
975 ddata->cfg.quirks |= q->quirks;
976 }
977 }
978}
979
596e7955
FA		 980static int sysc_reset(struct sysc *ddata)
981{
982 int offset = ddata->offsets[SYSC_SYSCONFIG];
983 int val;
984
985 if (ddata->legacy_mode || offset < 0 ||
986 ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)
987 return 0;
988
989 /*
990 * Currently only support reset status in sysstatus.
991 * Warn and return error in all other cases
992 */
993 if (!ddata->cfg.syss_mask) {
994 dev_err(ddata->dev, "No ti,syss-mask. Reset failed\n");
995 return -EINVAL;
996 }
997
998 val = sysc_read(ddata, offset);
999 val |= (0x1 << ddata->cap->regbits->srst_shift);
1000 sysc_write(ddata, offset, val);
1001
1002 /* Poll on reset status */
1003 offset = ddata->offsets[SYSC_SYSSTATUS];
1004
1005 return readl_poll_timeout(ddata->module_va + offset, val,
1006 (val & ddata->cfg.syss_mask) == 0x0,
1007 100, MAX_MODULE_SOFTRESET_WAIT);
1008}
1009
566a9b05
TL		 1010/* At this point the module is configured enough to read the revision */
1011static int sysc_init_module(struct sysc *ddata)
1012{
1013 int error;
1014
a885f0fe
TL		 1015 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
1016 ddata->revision = sysc_read_revision(ddata);
1017 goto rev_quirks;
1018 }
1019
566a9b05
TL		 1020 error = pm_runtime_get_sync(ddata->dev);
1021 if (error < 0) {
1022 pm_runtime_put_noidle(ddata->dev);
1023
1024 return 0;
1025 }
5062236e 1026
596e7955
FA		 1027 error = sysc_reset(ddata);
1028 if (error) {
1029 dev_err(ddata->dev, "Reset failed with %d\n", error);
1030 pm_runtime_put_sync(ddata->dev);
1031
1032 return error;
1033 }
1034
566a9b05
TL		 1035 ddata->revision = sysc_read_revision(ddata);
1036 pm_runtime_put_sync(ddata->dev);
1037
a885f0fe
TL		 1038rev_quirks:
1039 sysc_init_revision_quirks(ddata);
1040
566a9b05
TL		 1041 return 0;
1042}
1043
c5a2de97
TL		 1044static int sysc_init_sysc_mask(struct sysc *ddata)
1045{
1046 struct device_node *np = ddata->dev->of_node;
1047 int error;
1048 u32 val;
1049
1050 error = of_property_read_u32(np, "ti,sysc-mask", &val);
1051 if (error)
1052 return 0;
1053
1054 if (val)
1055 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
1056 else
1057 ddata->cfg.sysc_val = ddata->cap->sysc_mask;
1058
1059 return 0;
1060}
1061
1062static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
1063 const char *name)
1064{
1065 struct device_node *np = ddata->dev->of_node;
1066 struct property *prop;
1067 const __be32 *p;
1068 u32 val;
1069
1070 of_property_for_each_u32(np, name, prop, p, val) {
1071 if (val >= SYSC_NR_IDLEMODES) {
1072 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
1073 return -EINVAL;
1074 }
1075 *idlemodes |= (1 << val);
1076 }
1077
1078 return 0;
1079}
1080
1081static int sysc_init_idlemodes(struct sysc *ddata)
1082{
1083 int error;
1084
1085 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
1086 "ti,sysc-midle");
1087 if (error)
1088 return error;
1089
1090 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
1091 "ti,sysc-sidle");
1092 if (error)
1093 return error;
1094
1095 return 0;
1096}
1097
1098/*
1099 * Only some devices on omap4 and later have SYSCONFIG reset done
1100 * bit. We can detect this if there is no SYSSTATUS at all, or the
1101 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
1102 * have multiple bits for the child devices like OHCI and EHCI.
1103 * Depends on SYSC being parsed first.
1104 */
1105static int sysc_init_syss_mask(struct sysc *ddata)
1106{
1107 struct device_node *np = ddata->dev->of_node;
1108 int error;
1109 u32 val;
1110
1111 error = of_property_read_u32(np, "ti,syss-mask", &val);
1112 if (error) {
1113 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
1114 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
1115 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1116 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1117
1118 return 0;
1119 }
1120
1121 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
1122 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
1123
1124 ddata->cfg.syss_mask = val;
1125
1126 return 0;
1127}
1128
2c355ff6 1129/*
8b2830ba
TL		 1130 * Many child device drivers need to have fck and opt clocks available
1131 * to get the clock rate for device internal configuration etc.
2c355ff6 1132 */
8b2830ba
TL		 1133static int sysc_child_add_named_clock(struct sysc *ddata,
1134 struct device *child,
1135 const char *name)
2c355ff6 1136{
8b2830ba 1137 struct clk *clk;
2c355ff6 1138 struct clk_lookup *l;
8b2830ba 1139 int error = 0;
2c355ff6 1140
8b2830ba 1141 if (!name)
2c355ff6
TL		 1142 return 0;
1143
8b2830ba
TL		 1144 clk = clk_get(child, name);
1145 if (!IS_ERR(clk)) {
1146 clk_put(clk);
2c355ff6
TL		 1147
1148 return -EEXIST;
1149 }
1150
8b2830ba
TL		 1151 clk = clk_get(ddata->dev, name);
1152 if (IS_ERR(clk))
1153 return -ENODEV;
2c355ff6 1154
8b2830ba
TL		 1155 l = clkdev_create(clk, name, dev_name(child));
1156 if (!l)
1157 error = -ENOMEM;
1158
1159 clk_put(clk);
1160
1161 return error;
2c355ff6
TL		 1162}
1163
09dfe581
TL		 1164static int sysc_child_add_clocks(struct sysc *ddata,
1165 struct device *child)
1166{
1167 int i, error;
1168
1169 for (i = 0; i < ddata->nr_clocks; i++) {
1170 error = sysc_child_add_named_clock(ddata,
1171 child,
1172 ddata->clock_roles[i]);
1173 if (error && error != -EEXIST) {
1174 dev_err(ddata->dev, "could not add child clock %s: %i\n",
1175 ddata->clock_roles[i], error);
1176
1177 return error;
1178 }
1179 }
1180
1181 return 0;
1182}
1183
2c355ff6
TL		 1184static struct device_type sysc_device_type = {
1185};
1186
1187static struct sysc *sysc_child_to_parent(struct device *dev)
1188{
1189 struct device *parent = dev->parent;
1190
1191 if (!parent || parent->type != &sysc_device_type)
1192 return NULL;
1193
1194 return dev_get_drvdata(parent);
1195}
1196
a885f0fe
TL		 1197static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
1198{
1199 struct sysc *ddata;
1200 int error;
1201
1202 ddata = sysc_child_to_parent(dev);
1203
1204 error = pm_generic_runtime_suspend(dev);
1205 if (error)
1206 return error;
1207
1208 if (!ddata->enabled)
1209 return 0;
1210
1211 return sysc_runtime_suspend(ddata->dev);
1212}
1213
1214static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
1215{
1216 struct sysc *ddata;
1217 int error;
1218
1219 ddata = sysc_child_to_parent(dev);
1220
1221 if (!ddata->enabled) {
1222 error = sysc_runtime_resume(ddata->dev);
1223 if (error < 0)
1224 dev_err(ddata->dev,
1225 "%s error: %i\n", __func__, error);
1226 }
1227
1228 return pm_generic_runtime_resume(dev);
1229}
1230
1231#ifdef CONFIG_PM_SLEEP
1232static int sysc_child_suspend_noirq(struct device *dev)
1233{
1234 struct sysc *ddata;
1235 int error;
1236
1237 ddata = sysc_child_to_parent(dev);
1238
ef55f821
TL		 1239 dev_dbg(ddata->dev, "%s %s\n", __func__,
1240 ddata->name ? ddata->name : "");
1241
a885f0fe 1242 error = pm_generic_suspend_noirq(dev);
ef55f821
TL		 1243 if (error) {
1244 dev_err(dev, "%s error at %i: %i\n",
1245 __func__, __LINE__, error);
1246
a885f0fe 1247 return error;
ef55f821 1248 }
a885f0fe
TL		 1249
1250 if (!pm_runtime_status_suspended(dev)) {
1251 error = pm_generic_runtime_suspend(dev);
ef55f821 1252 if (error) {
4f3530f4
TL		 1253 dev_warn(dev, "%s busy at %i: %i\n",
1254 __func__, __LINE__, error);
ef55f821 1255
4f3530f4 1256 return 0;
ef55f821 1257 }
a885f0fe
TL		 1258
1259 error = sysc_runtime_suspend(ddata->dev);
ef55f821
TL		 1260 if (error) {
1261 dev_err(dev, "%s error at %i: %i\n",
1262 __func__, __LINE__, error);
1263
a885f0fe 1264 return error;
ef55f821 1265 }
a885f0fe
TL		 1266
1267 ddata->child_needs_resume = true;
1268 }
1269
1270 return 0;
1271}
1272
1273static int sysc_child_resume_noirq(struct device *dev)
1274{
1275 struct sysc *ddata;
1276 int error;
1277
1278 ddata = sysc_child_to_parent(dev);
1279
ef55f821
TL		 1280 dev_dbg(ddata->dev, "%s %s\n", __func__,
1281 ddata->name ? ddata->name : "");
1282
a885f0fe
TL		 1283 if (ddata->child_needs_resume) {
1284 ddata->child_needs_resume = false;
1285
1286 error = sysc_runtime_resume(ddata->dev);
1287 if (error)
1288 dev_err(ddata->dev,
1289 "%s runtime resume error: %i\n",
1290 __func__, error);
1291
1292 error = pm_generic_runtime_resume(dev);
1293 if (error)
1294 dev_err(ddata->dev,
1295 "%s generic runtime resume: %i\n",
1296 __func__, error);
1297 }
1298
1299 return pm_generic_resume_noirq(dev);
1300}
1301#endif
1302
1303struct dev_pm_domain sysc_child_pm_domain = {
1304 .ops = {
1305 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1306 sysc_child_runtime_resume,
1307 NULL)
1308 USE_PLATFORM_PM_SLEEP_OPS
1309 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1310 sysc_child_resume_noirq)
1311 }
1312};
1313
1314/**
1315 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1316 * @ddata: device driver data
1317 * @child: child device driver
1318 *
1319 * Allow idle for child devices as done with _od_runtime_suspend().
1320 * Otherwise many child devices will not idle because of the permanent
1321 * parent usecount set in pm_runtime_irq_safe().
1322 *
1323 * Note that the long term solution is to just modify the child device
1324 * drivers to not set pm_runtime_irq_safe() and then this can be just
1325 * dropped.
1326 */
1327static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1328{
1329 if (!ddata->legacy_mode)
1330 return;
1331
1332 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1333 dev_pm_domain_set(child, &sysc_child_pm_domain);
1334}
1335
2c355ff6
TL		 1336static int sysc_notifier_call(struct notifier_block *nb,
1337 unsigned long event, void *device)
1338{
1339 struct device *dev = device;
1340 struct sysc *ddata;
1341 int error;
1342
1343 ddata = sysc_child_to_parent(dev);
1344 if (!ddata)
1345 return NOTIFY_DONE;
1346
1347 switch (event) {
1348 case BUS_NOTIFY_ADD_DEVICE:
09dfe581
TL		 1349 error = sysc_child_add_clocks(ddata, dev);
1350 if (error)
1351 return error;
a885f0fe 1352 sysc_legacy_idle_quirk(ddata, dev);
2c355ff6
TL		 1353 break;
1354 default:
1355 break;
1356 }
1357
1358 return NOTIFY_DONE;
1359}
1360
1361static struct notifier_block sysc_nb = {
1362 .notifier_call = sysc_notifier_call,
1363};
1364
566a9b05
TL		 1365/* Device tree configured quirks */
1366struct sysc_dts_quirk {
1367 const char *name;
1368 u32 mask;
1369};
1370
1371static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1372 { .name = "ti,no-idle-on-init",
1373 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1374 { .name = "ti,no-reset-on-init",
1375 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1376};
1377
1378static int sysc_init_dts_quirks(struct sysc *ddata)
1379{
1380 struct device_node *np = ddata->dev->of_node;
1381 const struct property *prop;
1382 int i, len, error;
1383 u32 val;
1384
1385 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1386
1387 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1388 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
1389 if (!prop)
d39b6ea4 1390 continue;
566a9b05
TL		 1391
1392 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1393 }
1394
1395 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1396 if (!error) {
1397 if (val > 255) {
1398 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1399 val);
1400 }
1401
1402 ddata->cfg.srst_udelay = (u8)val;
1403 }
1404
1405 return 0;
1406}
1407
0eecc636
TL		 1408static void sysc_unprepare(struct sysc *ddata)
1409{
1410 int i;
1411
1412 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1413 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1414 clk_unprepare(ddata->clocks[i]);
1415 }
1416}
1417
70a65240
TL		 1418/*
1419 * Common sysc register bits found on omap2, also known as type1
1420 */
1421static const struct sysc_regbits sysc_regbits_omap2 = {
1422 .dmadisable_shift = -ENODEV,
1423 .midle_shift = 12,
1424 .sidle_shift = 3,
1425 .clkact_shift = 8,
1426 .emufree_shift = 5,
1427 .enwkup_shift = 2,
1428 .srst_shift = 1,
1429 .autoidle_shift = 0,
1430};
1431
1432static const struct sysc_capabilities sysc_omap2 = {
1433 .type = TI_SYSC_OMAP2,
1434 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1435 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1436 SYSC_OMAP2_AUTOIDLE,
1437 .regbits = &sysc_regbits_omap2,
1438};
1439
1440/* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1441static const struct sysc_capabilities sysc_omap2_timer = {
1442 .type = TI_SYSC_OMAP2_TIMER,
1443 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1444 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1445 SYSC_OMAP2_AUTOIDLE,
1446 .regbits = &sysc_regbits_omap2,
1447 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1448};
1449
1450/*
1451 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1452 * with different sidle position
1453 */
1454static const struct sysc_regbits sysc_regbits_omap3_sham = {
1455 .dmadisable_shift = -ENODEV,
1456 .midle_shift = -ENODEV,
1457 .sidle_shift = 4,
1458 .clkact_shift = -ENODEV,
1459 .enwkup_shift = -ENODEV,
1460 .srst_shift = 1,
1461 .autoidle_shift = 0,
1462 .emufree_shift = -ENODEV,
1463};
1464
1465static const struct sysc_capabilities sysc_omap3_sham = {
1466 .type = TI_SYSC_OMAP3_SHAM,
1467 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1468 .regbits = &sysc_regbits_omap3_sham,
1469};
1470
1471/*
1472 * AES register bits found on omap3 and later, a variant of
1473 * sysc_regbits_omap2 with different sidle position
1474 */
1475static const struct sysc_regbits sysc_regbits_omap3_aes = {
1476 .dmadisable_shift = -ENODEV,
1477 .midle_shift = -ENODEV,
1478 .sidle_shift = 6,
1479 .clkact_shift = -ENODEV,
1480 .enwkup_shift = -ENODEV,
1481 .srst_shift = 1,
1482 .autoidle_shift = 0,
1483 .emufree_shift = -ENODEV,
1484};
1485
1486static const struct sysc_capabilities sysc_omap3_aes = {
1487 .type = TI_SYSC_OMAP3_AES,
1488 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1489 .regbits = &sysc_regbits_omap3_aes,
1490};
1491
1492/*
1493 * Common sysc register bits found on omap4, also known as type2
1494 */
1495static const struct sysc_regbits sysc_regbits_omap4 = {
1496 .dmadisable_shift = 16,
1497 .midle_shift = 4,
1498 .sidle_shift = 2,
1499 .clkact_shift = -ENODEV,
1500 .enwkup_shift = -ENODEV,
1501 .emufree_shift = 1,
1502 .srst_shift = 0,
1503 .autoidle_shift = -ENODEV,
1504};
1505
1506static const struct sysc_capabilities sysc_omap4 = {
1507 .type = TI_SYSC_OMAP4,
1508 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1509 SYSC_OMAP4_SOFTRESET,
1510 .regbits = &sysc_regbits_omap4,
1511};
1512
1513static const struct sysc_capabilities sysc_omap4_timer = {
1514 .type = TI_SYSC_OMAP4_TIMER,
1515 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1516 SYSC_OMAP4_SOFTRESET,
1517 .regbits = &sysc_regbits_omap4,
1518};
1519
1520/*
1521 * Common sysc register bits found on omap4, also known as type3
1522 */
1523static const struct sysc_regbits sysc_regbits_omap4_simple = {
1524 .dmadisable_shift = -ENODEV,
1525 .midle_shift = 2,
1526 .sidle_shift = 0,
1527 .clkact_shift = -ENODEV,
1528 .enwkup_shift = -ENODEV,
1529 .srst_shift = -ENODEV,
1530 .emufree_shift = -ENODEV,
1531 .autoidle_shift = -ENODEV,
1532};
1533
1534static const struct sysc_capabilities sysc_omap4_simple = {
1535 .type = TI_SYSC_OMAP4_SIMPLE,
1536 .regbits = &sysc_regbits_omap4_simple,
1537};
1538
1539/*
1540 * SmartReflex sysc found on omap34xx
1541 */
1542static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1543 .dmadisable_shift = -ENODEV,
1544 .midle_shift = -ENODEV,
1545 .sidle_shift = -ENODEV,
1546 .clkact_shift = 20,
1547 .enwkup_shift = -ENODEV,
1548 .srst_shift = -ENODEV,
1549 .emufree_shift = -ENODEV,
1550 .autoidle_shift = -ENODEV,
1551};
1552
1553static const struct sysc_capabilities sysc_34xx_sr = {
1554 .type = TI_SYSC_OMAP34XX_SR,
1555 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1556 .regbits = &sysc_regbits_omap34xx_sr,
a885f0fe
TL		 1557 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1558 SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1559};
1560
1561/*
1562 * SmartReflex sysc found on omap36xx and later
1563 */
1564static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1565 .dmadisable_shift = -ENODEV,
1566 .midle_shift = -ENODEV,
1567 .sidle_shift = 24,
1568 .clkact_shift = -ENODEV,
1569 .enwkup_shift = 26,
1570 .srst_shift = -ENODEV,
1571 .emufree_shift = -ENODEV,
1572 .autoidle_shift = -ENODEV,
1573};
1574
1575static const struct sysc_capabilities sysc_36xx_sr = {
1576 .type = TI_SYSC_OMAP36XX_SR,
3267c081 1577 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
70a65240 1578 .regbits = &sysc_regbits_omap36xx_sr,
a885f0fe 1579 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1580};
1581
1582static const struct sysc_capabilities sysc_omap4_sr = {
1583 .type = TI_SYSC_OMAP4_SR,
1584 .regbits = &sysc_regbits_omap36xx_sr,
a885f0fe 1585 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1586};
1587
1588/*
1589 * McASP register bits found on omap4 and later
1590 */
1591static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1592 .dmadisable_shift = -ENODEV,
1593 .midle_shift = -ENODEV,
1594 .sidle_shift = 0,
1595 .clkact_shift = -ENODEV,
1596 .enwkup_shift = -ENODEV,
1597 .srst_shift = -ENODEV,
1598 .emufree_shift = -ENODEV,
1599 .autoidle_shift = -ENODEV,
1600};
1601
1602static const struct sysc_capabilities sysc_omap4_mcasp = {
1603 .type = TI_SYSC_OMAP4_MCASP,
1604 .regbits = &sysc_regbits_omap4_mcasp,
1605};
1606
1607/*
1608 * FS USB host found on omap4 and later
1609 */
1610static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1611 .dmadisable_shift = -ENODEV,
1612 .midle_shift = -ENODEV,
1613 .sidle_shift = 24,
1614 .clkact_shift = -ENODEV,
1615 .enwkup_shift = 26,
1616 .srst_shift = -ENODEV,
1617 .emufree_shift = -ENODEV,
1618 .autoidle_shift = -ENODEV,
1619};
1620
1621static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1622 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1623 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1624 .regbits = &sysc_regbits_omap4_usb_host_fs,
1625};
1626
7f35e63d
FA		 1627static const struct sysc_regbits sysc_regbits_dra7_mcan = {
1628 .dmadisable_shift = -ENODEV,
1629 .midle_shift = -ENODEV,
1630 .sidle_shift = -ENODEV,
1631 .clkact_shift = -ENODEV,
1632 .enwkup_shift = 4,
1633 .srst_shift = 0,
1634 .emufree_shift = -ENODEV,
1635 .autoidle_shift = -ENODEV,
1636};
1637
1638static const struct sysc_capabilities sysc_dra7_mcan = {
1639 .type = TI_SYSC_DRA7_MCAN,
1640 .sysc_mask = SYSC_DRA7_MCAN_ENAWAKEUP | SYSC_OMAP4_SOFTRESET,
1641 .regbits = &sysc_regbits_dra7_mcan,
1642};
1643
ef70b0bd
TL		 1644static int sysc_init_pdata(struct sysc *ddata)
1645{
1646 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1647 struct ti_sysc_module_data mdata;
1648 int error = 0;
1649
1650 if (!pdata || !ddata->legacy_mode)
1651 return 0;
1652
1653 mdata.name = ddata->legacy_mode;
1654 mdata.module_pa = ddata->module_pa;
1655 mdata.module_size = ddata->module_size;
1656 mdata.offsets = ddata->offsets;
1657 mdata.nr_offsets = SYSC_MAX_REGS;
1658 mdata.cap = ddata->cap;
1659 mdata.cfg = &ddata->cfg;
1660
1661 if (!pdata->init_module)
1662 return -ENODEV;
1663
1664 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1665 if (error == -EEXIST)
1666 error = 0;
1667
1668 return error;
1669}
1670
70a65240
TL		 1671static int sysc_init_match(struct sysc *ddata)
1672{
1673 const struct sysc_capabilities *cap;
1674
1675 cap = of_device_get_match_data(ddata->dev);
1676 if (!cap)
1677 return -EINVAL;
1678
1679 ddata->cap = cap;
1680 if (ddata->cap)
1681 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1682
1683 return 0;
1684}
1685
76f0f772
TL		 1686static void ti_sysc_idle(struct work_struct *work)
1687{
1688 struct sysc *ddata;
1689
1690 ddata = container_of(work, struct sysc, idle_work.work);
1691
1692 if (pm_runtime_active(ddata->dev))
1693 pm_runtime_put_sync(ddata->dev);
1694}
1695
c4bebea8
TL		 1696static const struct of_device_id sysc_match_table[] = {
1697 { .compatible = "simple-bus", },
1698 { /* sentinel */ },
1699};
1700
0eecc636
TL		 1701static int sysc_probe(struct platform_device *pdev)
1702{
ef70b0bd 1703 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
0eecc636
TL		 1704 struct sysc *ddata;
1705 int error;
1706
1707 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1708 if (!ddata)
1709 return -ENOMEM;
1710
1711 ddata->dev = &pdev->dev;
566a9b05 1712 platform_set_drvdata(pdev, ddata);
0eecc636 1713
70a65240
TL		 1714 error = sysc_init_match(ddata);
1715 if (error)
1716 return error;
1717
566a9b05
TL		 1718 error = sysc_init_dts_quirks(ddata);
1719 if (error)
1720 goto unprepare;
1721
0eecc636
TL		 1722 error = sysc_get_clocks(ddata);
1723 if (error)
1724 return error;
1725
1726 error = sysc_map_and_check_registers(ddata);
1727 if (error)
1728 goto unprepare;
1729
c5a2de97
TL		 1730 error = sysc_init_sysc_mask(ddata);
1731 if (error)
1732 goto unprepare;
1733
1734 error = sysc_init_idlemodes(ddata);
1735 if (error)
1736 goto unprepare;
1737
1738 error = sysc_init_syss_mask(ddata);
1739 if (error)
1740 goto unprepare;
1741
ef70b0bd
TL		 1742 error = sysc_init_pdata(ddata);
1743 if (error)
1744 goto unprepare;
1745
5062236e
TL		 1746 error = sysc_init_resets(ddata);
1747 if (error)
1748 return error;
566a9b05 1749
5062236e 1750 pm_runtime_enable(ddata->dev);
566a9b05
TL		 1751 error = sysc_init_module(ddata);
1752 if (error)
1753 goto unprepare;
1754
0eecc636
TL		 1755 error = pm_runtime_get_sync(ddata->dev);
1756 if (error < 0) {
1757 pm_runtime_put_noidle(ddata->dev);
1758 pm_runtime_disable(ddata->dev);
1759 goto unprepare;
1760 }
1761
0eecc636
TL		 1762 sysc_show_registers(ddata);
1763
2c355ff6 1764 ddata->dev->type = &sysc_device_type;
c4bebea8
TL		 1765 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1766 pdata ? pdata->auxdata : NULL,
ef70b0bd 1767 ddata->dev);
0eecc636
TL		 1768 if (error)
1769 goto err;
1770
76f0f772
TL		 1771 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1772
1773 /* At least earlycon won't survive without deferred idle */
1774 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1775 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1776 schedule_delayed_work(&ddata->idle_work, 3000);
1777 } else {
1778 pm_runtime_put(&pdev->dev);
1779 }
0eecc636 1780
5062236e
TL		 1781 if (!of_get_available_child_count(ddata->dev->of_node))
1782 reset_control_assert(ddata->rsts);
1783
0eecc636
TL		 1784 return 0;
1785
1786err:
0eecc636
TL		 1787 pm_runtime_put_sync(&pdev->dev);
1788 pm_runtime_disable(&pdev->dev);
1789unprepare:
1790 sysc_unprepare(ddata);
1791
1792 return error;
1793}
1794
684be5a4
TL		 1795static int sysc_remove(struct platform_device *pdev)
1796{
1797 struct sysc *ddata = platform_get_drvdata(pdev);
1798 int error;
1799
76f0f772
TL		 1800 cancel_delayed_work_sync(&ddata->idle_work);
1801
684be5a4
TL		 1802 error = pm_runtime_get_sync(ddata->dev);
1803 if (error < 0) {
1804 pm_runtime_put_noidle(ddata->dev);
1805 pm_runtime_disable(ddata->dev);
1806 goto unprepare;
1807 }
1808
1809 of_platform_depopulate(&pdev->dev);
1810
684be5a4
TL		 1811 pm_runtime_put_sync(&pdev->dev);
1812 pm_runtime_disable(&pdev->dev);
5062236e 1813 reset_control_assert(ddata->rsts);
684be5a4
TL		 1814
1815unprepare:
1816 sysc_unprepare(ddata);
1817
1818 return 0;
1819}
1820
0eecc636 1821static const struct of_device_id sysc_match[] = {
70a65240
TL		 1822 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1823 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1824 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1825 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1826 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1827 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1828 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1829 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1830 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1831 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1832 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1833 { .compatible = "ti,sysc-usb-host-fs",
1834 .data = &sysc_omap4_usb_host_fs, },
7f35e63d 1835 { .compatible = "ti,sysc-dra7-mcan", .data = &sysc_dra7_mcan, },
0eecc636
TL		 1836 { },
1837};
1838MODULE_DEVICE_TABLE(of, sysc_match);
1839
1840static struct platform_driver sysc_driver = {
1841 .probe = sysc_probe,
684be5a4 1842 .remove = sysc_remove,
0eecc636
TL		 1843 .driver = {
1844 .name = "ti-sysc",
1845 .of_match_table = sysc_match,
1846 .pm = &sysc_pm_ops,
1847 },
1848};
2c355ff6
TL		 1849
1850static int __init sysc_init(void)
1851{
1852 bus_register_notifier(&platform_bus_type, &sysc_nb);
1853
1854 return platform_driver_register(&sysc_driver);
1855}
1856module_init(sysc_init);
1857
1858static void __exit sysc_exit(void)
1859{
1860 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1861 platform_driver_unregister(&sysc_driver);
1862}
1863module_exit(sysc_exit);
0eecc636
TL		 1864
1865MODULE_DESCRIPTION("TI sysc interconnect target driver");
1866MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)