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bus: ti-sysc: Add handling for clkctrl opt clocks
[linux-2.6-block.git] / drivers / bus / ti-sysc.c
CommitLineData
0eecc636
TL		 1/*
2 * ti-sysc.c - Texas Instruments sysc interconnect target driver
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/io.h>
15#include <linux/clk.h>
2c355ff6 16#include <linux/clkdev.h>
a885f0fe 17#include <linux/delay.h>
0eecc636
TL		 18#include <linux/module.h>
19#include <linux/platform_device.h>
a885f0fe 20#include <linux/pm_domain.h>
0eecc636
TL		 21#include <linux/pm_runtime.h>
22#include <linux/of_address.h>
23#include <linux/of_platform.h>
2c355ff6
TL		 24#include <linux/slab.h>
25
70a65240
TL		 26#include <linux/platform_data/ti-sysc.h>
27
28#include <dt-bindings/bus/ti-sysc.h>
0eecc636 29
0eecc636
TL		 30static const char * const reg_names[] = { "rev", "sysc", "syss", };
31
32enum sysc_clocks {
33 SYSC_FCK,
34 SYSC_ICK,
09dfe581
TL		 35 SYSC_OPTFCK0,
36 SYSC_OPTFCK1,
37 SYSC_OPTFCK2,
38 SYSC_OPTFCK3,
39 SYSC_OPTFCK4,
40 SYSC_OPTFCK5,
41 SYSC_OPTFCK6,
42 SYSC_OPTFCK7,
0eecc636
TL		 43 SYSC_MAX_CLOCKS,
44};
45
09dfe581 46static const char * const clock_names[SYSC_ICK + 1] = { "fck", "ick", };
0eecc636 47
c5a2de97
TL		 48#define SYSC_IDLEMODE_MASK 3
49#define SYSC_CLOCKACTIVITY_MASK 3
50
0eecc636
TL		 51/**
52 * struct sysc - TI sysc interconnect target module registers and capabilities
53 * @dev: struct device pointer
54 * @module_pa: physical address of the interconnect target module
55 * @module_size: size of the interconnect target module
56 * @module_va: virtual address of the interconnect target module
57 * @offsets: register offsets from module base
58 * @clocks: clocks used by the interconnect target module
09dfe581
TL		 59 * @clock_roles: clock role names for the found clocks
60 * @nr_clocks: number of clocks used by the interconnect target module
0eecc636 61 * @legacy_mode: configured for legacy mode if set
70a65240
TL		 62 * @cap: interconnect target module capabilities
63 * @cfg: interconnect target module configuration
566a9b05
TL		 64 * @name: name if available
65 * @revision: interconnect target module revision
62020f23 66 * @needs_resume: runtime resume needed on resume from suspend
0eecc636
TL		 67 */
68struct sysc {
69 struct device *dev;
70 u64 module_pa;
71 u32 module_size;
72 void __iomem *module_va;
73 int offsets[SYSC_MAX_REGS];
09dfe581
TL		 74 struct clk **clocks;
75 const char **clock_roles;
76 int nr_clocks;
0eecc636 77 const char *legacy_mode;
70a65240
TL		 78 const struct sysc_capabilities *cap;
79 struct sysc_config cfg;
ef70b0bd 80 struct ti_sysc_cookie cookie;
566a9b05
TL		 81 const char *name;
82 u32 revision;
62020f23
TL		 83 bool enabled;
84 bool needs_resume;
a885f0fe 85 bool child_needs_resume;
76f0f772 86 struct delayed_work idle_work;
0eecc636
TL		 87};
88
566a9b05
TL		 89static u32 sysc_read(struct sysc *ddata, int offset)
90{
91 if (ddata->cfg.quirks & SYSC_QUIRK_16BIT) {
92 u32 val;
93
94 val = readw_relaxed(ddata->module_va + offset);
95 val |= (readw_relaxed(ddata->module_va + offset + 4) << 16);
96
97 return val;
98 }
99
100 return readl_relaxed(ddata->module_va + offset);
101}
102
09dfe581
TL		 103static bool sysc_opt_clks_needed(struct sysc *ddata)
104{
105 return !!(ddata->cfg.quirks & SYSC_QUIRK_OPT_CLKS_NEEDED);
106}
107
0eecc636
TL		 108static u32 sysc_read_revision(struct sysc *ddata)
109{
566a9b05
TL		 110 int offset = ddata->offsets[SYSC_REVISION];
111
112 if (offset < 0)
113 return 0;
114
115 return sysc_read(ddata, offset);
0eecc636
TL		 116}
117
09dfe581 118static int sysc_get_one_clock(struct sysc *ddata, const char *name)
0eecc636 119{
09dfe581
TL		 120 int error, i, index = -ENODEV;
121
122 if (!strncmp(clock_names[SYSC_FCK], name, 3))
123 index = SYSC_FCK;
124 else if (!strncmp(clock_names[SYSC_ICK], name, 3))
125 index = SYSC_ICK;
126
127 if (index < 0) {
128 for (i = SYSC_OPTFCK0; i < SYSC_MAX_CLOCKS; i++) {
129 if (!clock_names[i]) {
130 index = i;
131 break;
132 }
133 }
134 }
0eecc636 135
09dfe581
TL		 136 if (index < 0) {
137 dev_err(ddata->dev, "clock %s not added\n", name);
138 return index;
0eecc636 139 }
0eecc636
TL		 140
141 ddata->clocks[index] = devm_clk_get(ddata->dev, name);
142 if (IS_ERR(ddata->clocks[index])) {
143 if (PTR_ERR(ddata->clocks[index]) == -ENOENT)
144 return 0;
145
146 dev_err(ddata->dev, "clock get error for %s: %li\n",
147 name, PTR_ERR(ddata->clocks[index]));
148
149 return PTR_ERR(ddata->clocks[index]);
150 }
151
152 error = clk_prepare(ddata->clocks[index]);
153 if (error) {
154 dev_err(ddata->dev, "clock prepare error for %s: %i\n",
155 name, error);
156
157 return error;
158 }
159
160 return 0;
161}
162
163static int sysc_get_clocks(struct sysc *ddata)
164{
09dfe581
TL		 165 struct device_node *np = ddata->dev->of_node;
166 struct property *prop;
167 const char *name;
168 int nr_fck = 0, nr_ick = 0, i, error = 0;
169
170 ddata->clock_roles = devm_kzalloc(ddata->dev,
171 sizeof(*ddata->clock_roles) *
172 SYSC_MAX_CLOCKS,
173 GFP_KERNEL);
174 if (!ddata->clock_roles)
175 return -ENOMEM;
176
177 of_property_for_each_string(np, "clock-names", prop, name) {
178 if (!strncmp(clock_names[SYSC_FCK], name, 3))
179 nr_fck++;
180 if (!strncmp(clock_names[SYSC_ICK], name, 3))
181 nr_ick++;
182 ddata->clock_roles[ddata->nr_clocks] = name;
183 ddata->nr_clocks++;
184 }
185
186 if (ddata->nr_clocks < 1)
187 return 0;
188
189 if (ddata->nr_clocks > SYSC_MAX_CLOCKS) {
190 dev_err(ddata->dev, "too many clocks for %pOF\n", np);
191
192 return -EINVAL;
193 }
194
195 if (nr_fck > 1 || nr_ick > 1) {
196 dev_err(ddata->dev, "max one fck and ick for %pOF\n", np);
0eecc636 197
09dfe581
TL		 198 return -EINVAL;
199 }
200
201 ddata->clocks = devm_kzalloc(ddata->dev,
202 sizeof(*ddata->clocks) * ddata->nr_clocks,
203 GFP_KERNEL);
204 if (!ddata->clocks)
205 return -ENOMEM;
206
207 for (i = 0; i < ddata->nr_clocks; i++) {
208 error = sysc_get_one_clock(ddata, ddata->clock_roles[i]);
0eecc636
TL		 209 if (error && error != -ENOENT)
210 return error;
211 }
212
213 return 0;
214}
215
216/**
217 * sysc_parse_and_check_child_range - parses module IO region from ranges
218 * @ddata: device driver data
219 *
220 * In general we only need rev, syss, and sysc registers and not the whole
221 * module range. But we do want the offsets for these registers from the
222 * module base. This allows us to check them against the legacy hwmod
223 * platform data. Let's also check the ranges are configured properly.
224 */
225static int sysc_parse_and_check_child_range(struct sysc *ddata)
226{
227 struct device_node *np = ddata->dev->of_node;
228 const __be32 *ranges;
229 u32 nr_addr, nr_size;
230 int len, error;
231
232 ranges = of_get_property(np, "ranges", &len);
233 if (!ranges) {
234 dev_err(ddata->dev, "missing ranges for %pOF\n", np);
235
236 return -ENOENT;
237 }
238
239 len /= sizeof(*ranges);
240
241 if (len < 3) {
242 dev_err(ddata->dev, "incomplete ranges for %pOF\n", np);
243
244 return -EINVAL;
245 }
246
247 error = of_property_read_u32(np, "#address-cells", &nr_addr);
248 if (error)
249 return -ENOENT;
250
251 error = of_property_read_u32(np, "#size-cells", &nr_size);
252 if (error)
253 return -ENOENT;
254
255 if (nr_addr != 1 || nr_size != 1) {
256 dev_err(ddata->dev, "invalid ranges for %pOF\n", np);
257
258 return -EINVAL;
259 }
260
261 ranges++;
262 ddata->module_pa = of_translate_address(np, ranges++);
263 ddata->module_size = be32_to_cpup(ranges);
264
0eecc636
TL		 265 return 0;
266}
267
3bb37c8e
TL		 268static struct device_node *stdout_path;
269
270static void sysc_init_stdout_path(struct sysc *ddata)
271{
272 struct device_node *np = NULL;
273 const char *uart;
274
275 if (IS_ERR(stdout_path))
276 return;
277
278 if (stdout_path)
279 return;
280
281 np = of_find_node_by_path("/chosen");
282 if (!np)
283 goto err;
284
285 uart = of_get_property(np, "stdout-path", NULL);
286 if (!uart)
287 goto err;
288
289 np = of_find_node_by_path(uart);
290 if (!np)
291 goto err;
292
293 stdout_path = np;
294
295 return;
296
297err:
298 stdout_path = ERR_PTR(-ENODEV);
299}
300
301static void sysc_check_quirk_stdout(struct sysc *ddata,
302 struct device_node *np)
303{
304 sysc_init_stdout_path(ddata);
305 if (np != stdout_path)
306 return;
307
308 ddata->cfg.quirks |= SYSC_QUIRK_NO_IDLE_ON_INIT |
309 SYSC_QUIRK_NO_RESET_ON_INIT;
310}
311
0eecc636
TL		 312/**
313 * sysc_check_one_child - check child configuration
314 * @ddata: device driver data
315 * @np: child device node
316 *
317 * Let's avoid messy situations where we have new interconnect target
318 * node but children have "ti,hwmods". These belong to the interconnect
319 * target node and are managed by this driver.
320 */
321static int sysc_check_one_child(struct sysc *ddata,
322 struct device_node *np)
323{
324 const char *name;
325
326 name = of_get_property(np, "ti,hwmods", NULL);
327 if (name)
328 dev_warn(ddata->dev, "really a child ti,hwmods property?");
329
3bb37c8e
TL		 330 sysc_check_quirk_stdout(ddata, np);
331
0eecc636
TL		 332 return 0;
333}
334
335static int sysc_check_children(struct sysc *ddata)
336{
337 struct device_node *child;
338 int error;
339
340 for_each_child_of_node(ddata->dev->of_node, child) {
341 error = sysc_check_one_child(ddata, child);
342 if (error)
343 return error;
344 }
345
346 return 0;
347}
348
a7199e2b
TL		 349/*
350 * So far only I2C uses 16-bit read access with clockactivity with revision
351 * in two registers with stride of 4. We can detect this based on the rev
352 * register size to configure things far enough to be able to properly read
353 * the revision register.
354 */
355static void sysc_check_quirk_16bit(struct sysc *ddata, struct resource *res)
356{
dd57ac1e 357 if (resource_size(res) == 8)
a7199e2b 358 ddata->cfg.quirks |= SYSC_QUIRK_16BIT | SYSC_QUIRK_USE_CLOCKACT;
a7199e2b
TL		 359}
360
0eecc636
TL		 361/**
362 * sysc_parse_one - parses the interconnect target module registers
363 * @ddata: device driver data
364 * @reg: register to parse
365 */
366static int sysc_parse_one(struct sysc *ddata, enum sysc_registers reg)
367{
368 struct resource *res;
369 const char *name;
370
371 switch (reg) {
372 case SYSC_REVISION:
373 case SYSC_SYSCONFIG:
374 case SYSC_SYSSTATUS:
375 name = reg_names[reg];
376 break;
377 default:
378 return -EINVAL;
379 }
380
381 res = platform_get_resource_byname(to_platform_device(ddata->dev),
382 IORESOURCE_MEM, name);
383 if (!res) {
0eecc636
TL		 384 ddata->offsets[reg] = -ENODEV;
385
386 return 0;
387 }
388
389 ddata->offsets[reg] = res->start - ddata->module_pa;
a7199e2b
TL		 390 if (reg == SYSC_REVISION)
391 sysc_check_quirk_16bit(ddata, res);
0eecc636
TL		 392
393 return 0;
394}
395
396static int sysc_parse_registers(struct sysc *ddata)
397{
398 int i, error;
399
400 for (i = 0; i < SYSC_MAX_REGS; i++) {
401 error = sysc_parse_one(ddata, i);
402 if (error)
403 return error;
404 }
405
406 return 0;
407}
408
409/**
410 * sysc_check_registers - check for misconfigured register overlaps
411 * @ddata: device driver data
412 */
413static int sysc_check_registers(struct sysc *ddata)
414{
415 int i, j, nr_regs = 0, nr_matches = 0;
416
417 for (i = 0; i < SYSC_MAX_REGS; i++) {
418 if (ddata->offsets[i] < 0)
419 continue;
420
421 if (ddata->offsets[i] > (ddata->module_size - 4)) {
422 dev_err(ddata->dev, "register outside module range");
423
424 return -EINVAL;
425 }
426
427 for (j = 0; j < SYSC_MAX_REGS; j++) {
428 if (ddata->offsets[j] < 0)
429 continue;
430
431 if (ddata->offsets[i] == ddata->offsets[j])
432 nr_matches++;
433 }
434 nr_regs++;
435 }
436
437 if (nr_regs < 1) {
438 dev_err(ddata->dev, "missing registers\n");
439
440 return -EINVAL;
441 }
442
443 if (nr_matches > nr_regs) {
444 dev_err(ddata->dev, "overlapping registers: (%i/%i)",
445 nr_regs, nr_matches);
446
447 return -EINVAL;
448 }
449
450 return 0;
451}
452
453/**
454 * syc_ioremap - ioremap register space for the interconnect target module
455 * @ddata: deviec driver data
456 *
457 * Note that the interconnect target module registers can be anywhere
458 * within the first child device address space. For example, SGX has
459 * them at offset 0x1fc00 in the 32MB module address space. We just
460 * what we need around the interconnect target module registers.
461 */
462static int sysc_ioremap(struct sysc *ddata)
463{
464 u32 size = 0;
465
466 if (ddata->offsets[SYSC_SYSSTATUS] >= 0)
467 size = ddata->offsets[SYSC_SYSSTATUS];
468 else if (ddata->offsets[SYSC_SYSCONFIG] >= 0)
469 size = ddata->offsets[SYSC_SYSCONFIG];
470 else if (ddata->offsets[SYSC_REVISION] >= 0)
471 size = ddata->offsets[SYSC_REVISION];
472 else
473 return -EINVAL;
474
475 size &= 0xfff00;
476 size += SZ_256;
477
478 ddata->module_va = devm_ioremap(ddata->dev,
479 ddata->module_pa,
480 size);
481 if (!ddata->module_va)
482 return -EIO;
483
484 return 0;
485}
486
487/**
488 * sysc_map_and_check_registers - ioremap and check device registers
489 * @ddata: device driver data
490 */
491static int sysc_map_and_check_registers(struct sysc *ddata)
492{
493 int error;
494
495 error = sysc_parse_and_check_child_range(ddata);
496 if (error)
497 return error;
498
499 error = sysc_check_children(ddata);
500 if (error)
501 return error;
502
503 error = sysc_parse_registers(ddata);
504 if (error)
505 return error;
506
507 error = sysc_ioremap(ddata);
508 if (error)
509 return error;
510
511 error = sysc_check_registers(ddata);
512 if (error)
513 return error;
514
515 return 0;
516}
517
518/**
519 * sysc_show_rev - read and show interconnect target module revision
520 * @bufp: buffer to print the information to
521 * @ddata: device driver data
522 */
523static int sysc_show_rev(char *bufp, struct sysc *ddata)
524{
566a9b05 525 int len;
0eecc636
TL		 526
527 if (ddata->offsets[SYSC_REVISION] < 0)
528 return sprintf(bufp, ":NA");
529
566a9b05 530 len = sprintf(bufp, ":%08x", ddata->revision);
0eecc636
TL		 531
532 return len;
533}
534
535static int sysc_show_reg(struct sysc *ddata,
536 char *bufp, enum sysc_registers reg)
537{
538 if (ddata->offsets[reg] < 0)
539 return sprintf(bufp, ":NA");
540
541 return sprintf(bufp, ":%x", ddata->offsets[reg]);
542}
543
a885f0fe
TL		 544static int sysc_show_name(char *bufp, struct sysc *ddata)
545{
546 if (!ddata->name)
547 return 0;
548
549 return sprintf(bufp, ":%s", ddata->name);
550}
551
0eecc636
TL		 552/**
553 * sysc_show_registers - show information about interconnect target module
554 * @ddata: device driver data
555 */
556static void sysc_show_registers(struct sysc *ddata)
557{
558 char buf[128];
559 char *bufp = buf;
560 int i;
561
562 for (i = 0; i < SYSC_MAX_REGS; i++)
563 bufp += sysc_show_reg(ddata, bufp, i);
564
565 bufp += sysc_show_rev(bufp, ddata);
a885f0fe 566 bufp += sysc_show_name(bufp, ddata);
0eecc636
TL		 567
568 dev_dbg(ddata->dev, "%llx:%x%s\n",
569 ddata->module_pa, ddata->module_size,
570 buf);
571}
572
a4a5d493 573static int __maybe_unused sysc_runtime_suspend(struct device *dev)
0eecc636 574{
ef70b0bd 575 struct ti_sysc_platform_data *pdata;
0eecc636 576 struct sysc *ddata;
ef70b0bd 577 int error = 0, i;
0eecc636
TL		 578
579 ddata = dev_get_drvdata(dev);
580
ef70b0bd 581 if (!ddata->enabled)
0eecc636
TL		 582 return 0;
583
ef70b0bd
TL		 584 if (ddata->legacy_mode) {
585 pdata = dev_get_platdata(ddata->dev);
586 if (!pdata)
587 return 0;
588
589 if (!pdata->idle_module)
590 return -ENODEV;
591
592 error = pdata->idle_module(dev, &ddata->cookie);
593 if (error)
594 dev_err(dev, "%s: could not idle: %i\n",
595 __func__, error);
596
597 goto idled;
598 }
599
09dfe581 600 for (i = 0; i < ddata->nr_clocks; i++) {
0eecc636
TL		 601 if (IS_ERR_OR_NULL(ddata->clocks[i]))
602 continue;
09dfe581
TL		 603
604 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
605 break;
606
0eecc636
TL		 607 clk_disable(ddata->clocks[i]);
608 }
609
ef70b0bd
TL		 610idled:
611 ddata->enabled = false;
612
613 return error;
0eecc636
TL		 614}
615
a4a5d493 616static int __maybe_unused sysc_runtime_resume(struct device *dev)
0eecc636 617{
ef70b0bd 618 struct ti_sysc_platform_data *pdata;
0eecc636 619 struct sysc *ddata;
ef70b0bd 620 int error = 0, i;
0eecc636
TL		 621
622 ddata = dev_get_drvdata(dev);
623
ef70b0bd 624 if (ddata->enabled)
0eecc636
TL		 625 return 0;
626
ef70b0bd
TL		 627 if (ddata->legacy_mode) {
628 pdata = dev_get_platdata(ddata->dev);
629 if (!pdata)
630 return 0;
631
632 if (!pdata->enable_module)
633 return -ENODEV;
634
635 error = pdata->enable_module(dev, &ddata->cookie);
636 if (error)
637 dev_err(dev, "%s: could not enable: %i\n",
638 __func__, error);
639
640 goto awake;
641 }
642
09dfe581 643 for (i = 0; i < ddata->nr_clocks; i++) {
0eecc636
TL		 644 if (IS_ERR_OR_NULL(ddata->clocks[i]))
645 continue;
09dfe581
TL		 646
647 if (i >= SYSC_OPTFCK0 && !sysc_opt_clks_needed(ddata))
648 break;
649
0eecc636
TL		 650 error = clk_enable(ddata->clocks[i]);
651 if (error)
652 return error;
653 }
654
ef70b0bd
TL		 655awake:
656 ddata->enabled = true;
657
658 return error;
0eecc636
TL		 659}
660
62020f23
TL		 661#ifdef CONFIG_PM_SLEEP
662static int sysc_suspend(struct device *dev)
663{
664 struct sysc *ddata;
665
666 ddata = dev_get_drvdata(dev);
667
668 if (!ddata->enabled)
669 return 0;
670
671 ddata->needs_resume = true;
672
673 return sysc_runtime_suspend(dev);
674}
675
676static int sysc_resume(struct device *dev)
677{
678 struct sysc *ddata;
679
680 ddata = dev_get_drvdata(dev);
681 if (ddata->needs_resume) {
682 ddata->needs_resume = false;
683
684 return sysc_runtime_resume(dev);
685 }
686
0eecc636
TL		 687 return 0;
688}
62020f23 689#endif
0eecc636
TL		 690
691static const struct dev_pm_ops sysc_pm_ops = {
62020f23 692 SET_SYSTEM_SLEEP_PM_OPS(sysc_suspend, sysc_resume)
0eecc636
TL		 693 SET_RUNTIME_PM_OPS(sysc_runtime_suspend,
694 sysc_runtime_resume,
695 NULL)
696};
697
a885f0fe
TL		 698/* Module revision register based quirks */
699struct sysc_revision_quirk {
700 const char *name;
701 u32 base;
702 int rev_offset;
703 int sysc_offset;
704 int syss_offset;
705 u32 revision;
706 u32 revision_mask;
707 u32 quirks;
708};
709
710#define SYSC_QUIRK(optname, optbase, optrev, optsysc, optsyss, \
711 optrev_val, optrevmask, optquirkmask) \
712 { \
713 .name = (optname), \
714 .base = (optbase), \
715 .rev_offset = (optrev), \
716 .sysc_offset = (optsysc), \
717 .syss_offset = (optsyss), \
718 .revision = (optrev_val), \
719 .revision_mask = (optrevmask), \
720 .quirks = (optquirkmask), \
721 }
722
723static const struct sysc_revision_quirk sysc_revision_quirks[] = {
724 /* These drivers need to be fixed to not use pm_runtime_irq_safe() */
725 SYSC_QUIRK("gpio", 0, 0, 0x10, 0x114, 0x50600801, 0xffffffff,
09dfe581 726 SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_OPT_CLKS_IN_RESET),
a885f0fe
TL		 727 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000020, 0xffffffff,
728 SYSC_QUIRK_LEGACY_IDLE),
729 SYSC_QUIRK("mmu", 0, 0, 0x10, 0x14, 0x00000030, 0xffffffff,
730 SYSC_QUIRK_LEGACY_IDLE),
731 SYSC_QUIRK("sham", 0, 0x100, 0x110, 0x114, 0x40000c03, 0xffffffff,
732 SYSC_QUIRK_LEGACY_IDLE),
733 SYSC_QUIRK("smartreflex", 0, -1, 0x24, -1, 0x00000000, 0xffffffff,
734 SYSC_QUIRK_LEGACY_IDLE),
735 SYSC_QUIRK("smartreflex", 0, -1, 0x38, -1, 0x00000000, 0xffffffff,
736 SYSC_QUIRK_LEGACY_IDLE),
737 SYSC_QUIRK("timer", 0, 0, 0x10, 0x14, 0x00000015, 0xffffffff,
738 SYSC_QUIRK_LEGACY_IDLE),
739 SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x00000052, 0xffffffff,
740 SYSC_QUIRK_LEGACY_IDLE),
741};
742
743static void sysc_init_revision_quirks(struct sysc *ddata)
744{
745 const struct sysc_revision_quirk *q;
746 int i;
747
748 for (i = 0; i < ARRAY_SIZE(sysc_revision_quirks); i++) {
749 q = &sysc_revision_quirks[i];
750
751 if (q->base && q->base != ddata->module_pa)
752 continue;
753
754 if (q->rev_offset >= 0 &&
755 q->rev_offset != ddata->offsets[SYSC_REVISION])
756 continue;
757
758 if (q->sysc_offset >= 0 &&
759 q->sysc_offset != ddata->offsets[SYSC_SYSCONFIG])
760 continue;
761
762 if (q->syss_offset >= 0 &&
763 q->syss_offset != ddata->offsets[SYSC_SYSSTATUS])
764 continue;
765
766 if (q->revision == ddata->revision ||
767 (q->revision & q->revision_mask) ==
768 (ddata->revision & q->revision_mask)) {
769 ddata->name = q->name;
770 ddata->cfg.quirks |= q->quirks;
771 }
772 }
773}
774
566a9b05
TL		 775/* At this point the module is configured enough to read the revision */
776static int sysc_init_module(struct sysc *ddata)
777{
778 int error;
779
a885f0fe
TL		 780 if (ddata->cfg.quirks & SYSC_QUIRK_NO_IDLE_ON_INIT) {
781 ddata->revision = sysc_read_revision(ddata);
782 goto rev_quirks;
783 }
784
566a9b05
TL		 785 error = pm_runtime_get_sync(ddata->dev);
786 if (error < 0) {
787 pm_runtime_put_noidle(ddata->dev);
788
789 return 0;
790 }
791 ddata->revision = sysc_read_revision(ddata);
792 pm_runtime_put_sync(ddata->dev);
793
a885f0fe
TL		 794rev_quirks:
795 sysc_init_revision_quirks(ddata);
796
566a9b05
TL		 797 return 0;
798}
799
c5a2de97
TL		 800static int sysc_init_sysc_mask(struct sysc *ddata)
801{
802 struct device_node *np = ddata->dev->of_node;
803 int error;
804 u32 val;
805
806 error = of_property_read_u32(np, "ti,sysc-mask", &val);
807 if (error)
808 return 0;
809
810 if (val)
811 ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
812 else
813 ddata->cfg.sysc_val = ddata->cap->sysc_mask;
814
815 return 0;
816}
817
818static int sysc_init_idlemode(struct sysc *ddata, u8 *idlemodes,
819 const char *name)
820{
821 struct device_node *np = ddata->dev->of_node;
822 struct property *prop;
823 const __be32 *p;
824 u32 val;
825
826 of_property_for_each_u32(np, name, prop, p, val) {
827 if (val >= SYSC_NR_IDLEMODES) {
828 dev_err(ddata->dev, "invalid idlemode: %i\n", val);
829 return -EINVAL;
830 }
831 *idlemodes |= (1 << val);
832 }
833
834 return 0;
835}
836
837static int sysc_init_idlemodes(struct sysc *ddata)
838{
839 int error;
840
841 error = sysc_init_idlemode(ddata, &ddata->cfg.midlemodes,
842 "ti,sysc-midle");
843 if (error)
844 return error;
845
846 error = sysc_init_idlemode(ddata, &ddata->cfg.sidlemodes,
847 "ti,sysc-sidle");
848 if (error)
849 return error;
850
851 return 0;
852}
853
854/*
855 * Only some devices on omap4 and later have SYSCONFIG reset done
856 * bit. We can detect this if there is no SYSSTATUS at all, or the
857 * SYSTATUS bit 0 is not used. Note that some SYSSTATUS registers
858 * have multiple bits for the child devices like OHCI and EHCI.
859 * Depends on SYSC being parsed first.
860 */
861static int sysc_init_syss_mask(struct sysc *ddata)
862{
863 struct device_node *np = ddata->dev->of_node;
864 int error;
865 u32 val;
866
867 error = of_property_read_u32(np, "ti,syss-mask", &val);
868 if (error) {
869 if ((ddata->cap->type == TI_SYSC_OMAP4 ||
870 ddata->cap->type == TI_SYSC_OMAP4_TIMER) &&
871 (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
872 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
873
874 return 0;
875 }
876
877 if (!(val & 1) && (ddata->cfg.sysc_val & SYSC_OMAP4_SOFTRESET))
878 ddata->cfg.quirks |= SYSC_QUIRK_RESET_STATUS;
879
880 ddata->cfg.syss_mask = val;
881
882 return 0;
883}
884
2c355ff6 885/*
8b2830ba
TL		 886 * Many child device drivers need to have fck and opt clocks available
887 * to get the clock rate for device internal configuration etc.
2c355ff6 888 */
8b2830ba
TL		 889static int sysc_child_add_named_clock(struct sysc *ddata,
890 struct device *child,
891 const char *name)
2c355ff6 892{
8b2830ba 893 struct clk *clk;
2c355ff6 894 struct clk_lookup *l;
8b2830ba 895 int error = 0;
2c355ff6 896
8b2830ba 897 if (!name)
2c355ff6
TL		 898 return 0;
899
8b2830ba
TL		 900 clk = clk_get(child, name);
901 if (!IS_ERR(clk)) {
902 clk_put(clk);
2c355ff6
TL		 903
904 return -EEXIST;
905 }
906
8b2830ba
TL		 907 clk = clk_get(ddata->dev, name);
908 if (IS_ERR(clk))
909 return -ENODEV;
2c355ff6 910
8b2830ba
TL		 911 l = clkdev_create(clk, name, dev_name(child));
912 if (!l)
913 error = -ENOMEM;
914
915 clk_put(clk);
916
917 return error;
2c355ff6
TL		 918}
919
09dfe581
TL		 920static int sysc_child_add_clocks(struct sysc *ddata,
921 struct device *child)
922{
923 int i, error;
924
925 for (i = 0; i < ddata->nr_clocks; i++) {
926 error = sysc_child_add_named_clock(ddata,
927 child,
928 ddata->clock_roles[i]);
929 if (error && error != -EEXIST) {
930 dev_err(ddata->dev, "could not add child clock %s: %i\n",
931 ddata->clock_roles[i], error);
932
933 return error;
934 }
935 }
936
937 return 0;
938}
939
2c355ff6
TL		 940static struct device_type sysc_device_type = {
941};
942
943static struct sysc *sysc_child_to_parent(struct device *dev)
944{
945 struct device *parent = dev->parent;
946
947 if (!parent || parent->type != &sysc_device_type)
948 return NULL;
949
950 return dev_get_drvdata(parent);
951}
952
a885f0fe
TL		 953static int __maybe_unused sysc_child_runtime_suspend(struct device *dev)
954{
955 struct sysc *ddata;
956 int error;
957
958 ddata = sysc_child_to_parent(dev);
959
960 error = pm_generic_runtime_suspend(dev);
961 if (error)
962 return error;
963
964 if (!ddata->enabled)
965 return 0;
966
967 return sysc_runtime_suspend(ddata->dev);
968}
969
970static int __maybe_unused sysc_child_runtime_resume(struct device *dev)
971{
972 struct sysc *ddata;
973 int error;
974
975 ddata = sysc_child_to_parent(dev);
976
977 if (!ddata->enabled) {
978 error = sysc_runtime_resume(ddata->dev);
979 if (error < 0)
980 dev_err(ddata->dev,
981 "%s error: %i\n", __func__, error);
982 }
983
984 return pm_generic_runtime_resume(dev);
985}
986
987#ifdef CONFIG_PM_SLEEP
988static int sysc_child_suspend_noirq(struct device *dev)
989{
990 struct sysc *ddata;
991 int error;
992
993 ddata = sysc_child_to_parent(dev);
994
995 error = pm_generic_suspend_noirq(dev);
996 if (error)
997 return error;
998
999 if (!pm_runtime_status_suspended(dev)) {
1000 error = pm_generic_runtime_suspend(dev);
1001 if (error)
1002 return error;
1003
1004 error = sysc_runtime_suspend(ddata->dev);
1005 if (error)
1006 return error;
1007
1008 ddata->child_needs_resume = true;
1009 }
1010
1011 return 0;
1012}
1013
1014static int sysc_child_resume_noirq(struct device *dev)
1015{
1016 struct sysc *ddata;
1017 int error;
1018
1019 ddata = sysc_child_to_parent(dev);
1020
1021 if (ddata->child_needs_resume) {
1022 ddata->child_needs_resume = false;
1023
1024 error = sysc_runtime_resume(ddata->dev);
1025 if (error)
1026 dev_err(ddata->dev,
1027 "%s runtime resume error: %i\n",
1028 __func__, error);
1029
1030 error = pm_generic_runtime_resume(dev);
1031 if (error)
1032 dev_err(ddata->dev,
1033 "%s generic runtime resume: %i\n",
1034 __func__, error);
1035 }
1036
1037 return pm_generic_resume_noirq(dev);
1038}
1039#endif
1040
1041struct dev_pm_domain sysc_child_pm_domain = {
1042 .ops = {
1043 SET_RUNTIME_PM_OPS(sysc_child_runtime_suspend,
1044 sysc_child_runtime_resume,
1045 NULL)
1046 USE_PLATFORM_PM_SLEEP_OPS
1047 SET_NOIRQ_SYSTEM_SLEEP_PM_OPS(sysc_child_suspend_noirq,
1048 sysc_child_resume_noirq)
1049 }
1050};
1051
1052/**
1053 * sysc_legacy_idle_quirk - handle children in omap_device compatible way
1054 * @ddata: device driver data
1055 * @child: child device driver
1056 *
1057 * Allow idle for child devices as done with _od_runtime_suspend().
1058 * Otherwise many child devices will not idle because of the permanent
1059 * parent usecount set in pm_runtime_irq_safe().
1060 *
1061 * Note that the long term solution is to just modify the child device
1062 * drivers to not set pm_runtime_irq_safe() and then this can be just
1063 * dropped.
1064 */
1065static void sysc_legacy_idle_quirk(struct sysc *ddata, struct device *child)
1066{
1067 if (!ddata->legacy_mode)
1068 return;
1069
1070 if (ddata->cfg.quirks & SYSC_QUIRK_LEGACY_IDLE)
1071 dev_pm_domain_set(child, &sysc_child_pm_domain);
1072}
1073
2c355ff6
TL		 1074static int sysc_notifier_call(struct notifier_block *nb,
1075 unsigned long event, void *device)
1076{
1077 struct device *dev = device;
1078 struct sysc *ddata;
1079 int error;
1080
1081 ddata = sysc_child_to_parent(dev);
1082 if (!ddata)
1083 return NOTIFY_DONE;
1084
1085 switch (event) {
1086 case BUS_NOTIFY_ADD_DEVICE:
09dfe581
TL		 1087 error = sysc_child_add_clocks(ddata, dev);
1088 if (error)
1089 return error;
a885f0fe 1090 sysc_legacy_idle_quirk(ddata, dev);
2c355ff6
TL		 1091 break;
1092 default:
1093 break;
1094 }
1095
1096 return NOTIFY_DONE;
1097}
1098
1099static struct notifier_block sysc_nb = {
1100 .notifier_call = sysc_notifier_call,
1101};
1102
566a9b05
TL		 1103/* Device tree configured quirks */
1104struct sysc_dts_quirk {
1105 const char *name;
1106 u32 mask;
1107};
1108
1109static const struct sysc_dts_quirk sysc_dts_quirks[] = {
1110 { .name = "ti,no-idle-on-init",
1111 .mask = SYSC_QUIRK_NO_IDLE_ON_INIT, },
1112 { .name = "ti,no-reset-on-init",
1113 .mask = SYSC_QUIRK_NO_RESET_ON_INIT, },
1114};
1115
1116static int sysc_init_dts_quirks(struct sysc *ddata)
1117{
1118 struct device_node *np = ddata->dev->of_node;
1119 const struct property *prop;
1120 int i, len, error;
1121 u32 val;
1122
1123 ddata->legacy_mode = of_get_property(np, "ti,hwmods", NULL);
1124
1125 for (i = 0; i < ARRAY_SIZE(sysc_dts_quirks); i++) {
1126 prop = of_get_property(np, sysc_dts_quirks[i].name, &len);
1127 if (!prop)
d39b6ea4 1128 continue;
566a9b05
TL		 1129
1130 ddata->cfg.quirks |= sysc_dts_quirks[i].mask;
1131 }
1132
1133 error = of_property_read_u32(np, "ti,sysc-delay-us", &val);
1134 if (!error) {
1135 if (val > 255) {
1136 dev_warn(ddata->dev, "bad ti,sysc-delay-us: %i\n",
1137 val);
1138 }
1139
1140 ddata->cfg.srst_udelay = (u8)val;
1141 }
1142
1143 return 0;
1144}
1145
0eecc636
TL		 1146static void sysc_unprepare(struct sysc *ddata)
1147{
1148 int i;
1149
1150 for (i = 0; i < SYSC_MAX_CLOCKS; i++) {
1151 if (!IS_ERR_OR_NULL(ddata->clocks[i]))
1152 clk_unprepare(ddata->clocks[i]);
1153 }
1154}
1155
70a65240
TL		 1156/*
1157 * Common sysc register bits found on omap2, also known as type1
1158 */
1159static const struct sysc_regbits sysc_regbits_omap2 = {
1160 .dmadisable_shift = -ENODEV,
1161 .midle_shift = 12,
1162 .sidle_shift = 3,
1163 .clkact_shift = 8,
1164 .emufree_shift = 5,
1165 .enwkup_shift = 2,
1166 .srst_shift = 1,
1167 .autoidle_shift = 0,
1168};
1169
1170static const struct sysc_capabilities sysc_omap2 = {
1171 .type = TI_SYSC_OMAP2,
1172 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1173 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1174 SYSC_OMAP2_AUTOIDLE,
1175 .regbits = &sysc_regbits_omap2,
1176};
1177
1178/* All omap2 and 3 timers, and timers 1, 2 & 10 on omap 4 and 5 */
1179static const struct sysc_capabilities sysc_omap2_timer = {
1180 .type = TI_SYSC_OMAP2_TIMER,
1181 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY | SYSC_OMAP2_EMUFREE |
1182 SYSC_OMAP2_ENAWAKEUP | SYSC_OMAP2_SOFTRESET |
1183 SYSC_OMAP2_AUTOIDLE,
1184 .regbits = &sysc_regbits_omap2,
1185 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT,
1186};
1187
1188/*
1189 * SHAM2 (SHA1/MD5) sysc found on omap3, a variant of sysc_regbits_omap2
1190 * with different sidle position
1191 */
1192static const struct sysc_regbits sysc_regbits_omap3_sham = {
1193 .dmadisable_shift = -ENODEV,
1194 .midle_shift = -ENODEV,
1195 .sidle_shift = 4,
1196 .clkact_shift = -ENODEV,
1197 .enwkup_shift = -ENODEV,
1198 .srst_shift = 1,
1199 .autoidle_shift = 0,
1200 .emufree_shift = -ENODEV,
1201};
1202
1203static const struct sysc_capabilities sysc_omap3_sham = {
1204 .type = TI_SYSC_OMAP3_SHAM,
1205 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1206 .regbits = &sysc_regbits_omap3_sham,
1207};
1208
1209/*
1210 * AES register bits found on omap3 and later, a variant of
1211 * sysc_regbits_omap2 with different sidle position
1212 */
1213static const struct sysc_regbits sysc_regbits_omap3_aes = {
1214 .dmadisable_shift = -ENODEV,
1215 .midle_shift = -ENODEV,
1216 .sidle_shift = 6,
1217 .clkact_shift = -ENODEV,
1218 .enwkup_shift = -ENODEV,
1219 .srst_shift = 1,
1220 .autoidle_shift = 0,
1221 .emufree_shift = -ENODEV,
1222};
1223
1224static const struct sysc_capabilities sysc_omap3_aes = {
1225 .type = TI_SYSC_OMAP3_AES,
1226 .sysc_mask = SYSC_OMAP2_SOFTRESET | SYSC_OMAP2_AUTOIDLE,
1227 .regbits = &sysc_regbits_omap3_aes,
1228};
1229
1230/*
1231 * Common sysc register bits found on omap4, also known as type2
1232 */
1233static const struct sysc_regbits sysc_regbits_omap4 = {
1234 .dmadisable_shift = 16,
1235 .midle_shift = 4,
1236 .sidle_shift = 2,
1237 .clkact_shift = -ENODEV,
1238 .enwkup_shift = -ENODEV,
1239 .emufree_shift = 1,
1240 .srst_shift = 0,
1241 .autoidle_shift = -ENODEV,
1242};
1243
1244static const struct sysc_capabilities sysc_omap4 = {
1245 .type = TI_SYSC_OMAP4,
1246 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1247 SYSC_OMAP4_SOFTRESET,
1248 .regbits = &sysc_regbits_omap4,
1249};
1250
1251static const struct sysc_capabilities sysc_omap4_timer = {
1252 .type = TI_SYSC_OMAP4_TIMER,
1253 .sysc_mask = SYSC_OMAP4_DMADISABLE | SYSC_OMAP4_FREEEMU |
1254 SYSC_OMAP4_SOFTRESET,
1255 .regbits = &sysc_regbits_omap4,
1256};
1257
1258/*
1259 * Common sysc register bits found on omap4, also known as type3
1260 */
1261static const struct sysc_regbits sysc_regbits_omap4_simple = {
1262 .dmadisable_shift = -ENODEV,
1263 .midle_shift = 2,
1264 .sidle_shift = 0,
1265 .clkact_shift = -ENODEV,
1266 .enwkup_shift = -ENODEV,
1267 .srst_shift = -ENODEV,
1268 .emufree_shift = -ENODEV,
1269 .autoidle_shift = -ENODEV,
1270};
1271
1272static const struct sysc_capabilities sysc_omap4_simple = {
1273 .type = TI_SYSC_OMAP4_SIMPLE,
1274 .regbits = &sysc_regbits_omap4_simple,
1275};
1276
1277/*
1278 * SmartReflex sysc found on omap34xx
1279 */
1280static const struct sysc_regbits sysc_regbits_omap34xx_sr = {
1281 .dmadisable_shift = -ENODEV,
1282 .midle_shift = -ENODEV,
1283 .sidle_shift = -ENODEV,
1284 .clkact_shift = 20,
1285 .enwkup_shift = -ENODEV,
1286 .srst_shift = -ENODEV,
1287 .emufree_shift = -ENODEV,
1288 .autoidle_shift = -ENODEV,
1289};
1290
1291static const struct sysc_capabilities sysc_34xx_sr = {
1292 .type = TI_SYSC_OMAP34XX_SR,
1293 .sysc_mask = SYSC_OMAP2_CLOCKACTIVITY,
1294 .regbits = &sysc_regbits_omap34xx_sr,
a885f0fe
TL		 1295 .mod_quirks = SYSC_QUIRK_USE_CLOCKACT | SYSC_QUIRK_UNCACHED |
1296 SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1297};
1298
1299/*
1300 * SmartReflex sysc found on omap36xx and later
1301 */
1302static const struct sysc_regbits sysc_regbits_omap36xx_sr = {
1303 .dmadisable_shift = -ENODEV,
1304 .midle_shift = -ENODEV,
1305 .sidle_shift = 24,
1306 .clkact_shift = -ENODEV,
1307 .enwkup_shift = 26,
1308 .srst_shift = -ENODEV,
1309 .emufree_shift = -ENODEV,
1310 .autoidle_shift = -ENODEV,
1311};
1312
1313static const struct sysc_capabilities sysc_36xx_sr = {
1314 .type = TI_SYSC_OMAP36XX_SR,
3267c081 1315 .sysc_mask = SYSC_OMAP3_SR_ENAWAKEUP,
70a65240 1316 .regbits = &sysc_regbits_omap36xx_sr,
a885f0fe 1317 .mod_quirks = SYSC_QUIRK_UNCACHED | SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1318};
1319
1320static const struct sysc_capabilities sysc_omap4_sr = {
1321 .type = TI_SYSC_OMAP4_SR,
1322 .regbits = &sysc_regbits_omap36xx_sr,
a885f0fe 1323 .mod_quirks = SYSC_QUIRK_LEGACY_IDLE,
70a65240
TL		 1324};
1325
1326/*
1327 * McASP register bits found on omap4 and later
1328 */
1329static const struct sysc_regbits sysc_regbits_omap4_mcasp = {
1330 .dmadisable_shift = -ENODEV,
1331 .midle_shift = -ENODEV,
1332 .sidle_shift = 0,
1333 .clkact_shift = -ENODEV,
1334 .enwkup_shift = -ENODEV,
1335 .srst_shift = -ENODEV,
1336 .emufree_shift = -ENODEV,
1337 .autoidle_shift = -ENODEV,
1338};
1339
1340static const struct sysc_capabilities sysc_omap4_mcasp = {
1341 .type = TI_SYSC_OMAP4_MCASP,
1342 .regbits = &sysc_regbits_omap4_mcasp,
1343};
1344
1345/*
1346 * FS USB host found on omap4 and later
1347 */
1348static const struct sysc_regbits sysc_regbits_omap4_usb_host_fs = {
1349 .dmadisable_shift = -ENODEV,
1350 .midle_shift = -ENODEV,
1351 .sidle_shift = 24,
1352 .clkact_shift = -ENODEV,
1353 .enwkup_shift = 26,
1354 .srst_shift = -ENODEV,
1355 .emufree_shift = -ENODEV,
1356 .autoidle_shift = -ENODEV,
1357};
1358
1359static const struct sysc_capabilities sysc_omap4_usb_host_fs = {
1360 .type = TI_SYSC_OMAP4_USB_HOST_FS,
1361 .sysc_mask = SYSC_OMAP2_ENAWAKEUP,
1362 .regbits = &sysc_regbits_omap4_usb_host_fs,
1363};
1364
ef70b0bd
TL		 1365static int sysc_init_pdata(struct sysc *ddata)
1366{
1367 struct ti_sysc_platform_data *pdata = dev_get_platdata(ddata->dev);
1368 struct ti_sysc_module_data mdata;
1369 int error = 0;
1370
1371 if (!pdata || !ddata->legacy_mode)
1372 return 0;
1373
1374 mdata.name = ddata->legacy_mode;
1375 mdata.module_pa = ddata->module_pa;
1376 mdata.module_size = ddata->module_size;
1377 mdata.offsets = ddata->offsets;
1378 mdata.nr_offsets = SYSC_MAX_REGS;
1379 mdata.cap = ddata->cap;
1380 mdata.cfg = &ddata->cfg;
1381
1382 if (!pdata->init_module)
1383 return -ENODEV;
1384
1385 error = pdata->init_module(ddata->dev, &mdata, &ddata->cookie);
1386 if (error == -EEXIST)
1387 error = 0;
1388
1389 return error;
1390}
1391
70a65240
TL		 1392static int sysc_init_match(struct sysc *ddata)
1393{
1394 const struct sysc_capabilities *cap;
1395
1396 cap = of_device_get_match_data(ddata->dev);
1397 if (!cap)
1398 return -EINVAL;
1399
1400 ddata->cap = cap;
1401 if (ddata->cap)
1402 ddata->cfg.quirks |= ddata->cap->mod_quirks;
1403
1404 return 0;
1405}
1406
76f0f772
TL		 1407static void ti_sysc_idle(struct work_struct *work)
1408{
1409 struct sysc *ddata;
1410
1411 ddata = container_of(work, struct sysc, idle_work.work);
1412
1413 if (pm_runtime_active(ddata->dev))
1414 pm_runtime_put_sync(ddata->dev);
1415}
1416
c4bebea8
TL		 1417static const struct of_device_id sysc_match_table[] = {
1418 { .compatible = "simple-bus", },
1419 { /* sentinel */ },
1420};
1421
0eecc636
TL		 1422static int sysc_probe(struct platform_device *pdev)
1423{
ef70b0bd 1424 struct ti_sysc_platform_data *pdata = dev_get_platdata(&pdev->dev);
0eecc636
TL		 1425 struct sysc *ddata;
1426 int error;
1427
1428 ddata = devm_kzalloc(&pdev->dev, sizeof(*ddata), GFP_KERNEL);
1429 if (!ddata)
1430 return -ENOMEM;
1431
1432 ddata->dev = &pdev->dev;
566a9b05 1433 platform_set_drvdata(pdev, ddata);
0eecc636 1434
70a65240
TL		 1435 error = sysc_init_match(ddata);
1436 if (error)
1437 return error;
1438
566a9b05
TL		 1439 error = sysc_init_dts_quirks(ddata);
1440 if (error)
1441 goto unprepare;
1442
0eecc636
TL		 1443 error = sysc_get_clocks(ddata);
1444 if (error)
1445 return error;
1446
1447 error = sysc_map_and_check_registers(ddata);
1448 if (error)
1449 goto unprepare;
1450
c5a2de97
TL		 1451 error = sysc_init_sysc_mask(ddata);
1452 if (error)
1453 goto unprepare;
1454
1455 error = sysc_init_idlemodes(ddata);
1456 if (error)
1457 goto unprepare;
1458
1459 error = sysc_init_syss_mask(ddata);
1460 if (error)
1461 goto unprepare;
1462
ef70b0bd
TL		 1463 error = sysc_init_pdata(ddata);
1464 if (error)
1465 goto unprepare;
1466
0eecc636 1467 pm_runtime_enable(ddata->dev);
566a9b05
TL		 1468
1469 error = sysc_init_module(ddata);
1470 if (error)
1471 goto unprepare;
1472
0eecc636
TL		 1473 error = pm_runtime_get_sync(ddata->dev);
1474 if (error < 0) {
1475 pm_runtime_put_noidle(ddata->dev);
1476 pm_runtime_disable(ddata->dev);
1477 goto unprepare;
1478 }
1479
0eecc636
TL		 1480 sysc_show_registers(ddata);
1481
2c355ff6 1482 ddata->dev->type = &sysc_device_type;
c4bebea8
TL		 1483 error = of_platform_populate(ddata->dev->of_node, sysc_match_table,
1484 pdata ? pdata->auxdata : NULL,
ef70b0bd 1485 ddata->dev);
0eecc636
TL		 1486 if (error)
1487 goto err;
1488
76f0f772
TL		 1489 INIT_DELAYED_WORK(&ddata->idle_work, ti_sysc_idle);
1490
1491 /* At least earlycon won't survive without deferred idle */
1492 if (ddata->cfg.quirks & (SYSC_QUIRK_NO_IDLE_ON_INIT |
1493 SYSC_QUIRK_NO_RESET_ON_INIT)) {
1494 schedule_delayed_work(&ddata->idle_work, 3000);
1495 } else {
1496 pm_runtime_put(&pdev->dev);
1497 }
0eecc636
TL		 1498
1499 return 0;
1500
1501err:
0eecc636
TL		 1502 pm_runtime_put_sync(&pdev->dev);
1503 pm_runtime_disable(&pdev->dev);
1504unprepare:
1505 sysc_unprepare(ddata);
1506
1507 return error;
1508}
1509
684be5a4
TL		 1510static int sysc_remove(struct platform_device *pdev)
1511{
1512 struct sysc *ddata = platform_get_drvdata(pdev);
1513 int error;
1514
76f0f772
TL		 1515 cancel_delayed_work_sync(&ddata->idle_work);
1516
684be5a4
TL		 1517 error = pm_runtime_get_sync(ddata->dev);
1518 if (error < 0) {
1519 pm_runtime_put_noidle(ddata->dev);
1520 pm_runtime_disable(ddata->dev);
1521 goto unprepare;
1522 }
1523
1524 of_platform_depopulate(&pdev->dev);
1525
684be5a4
TL		 1526 pm_runtime_put_sync(&pdev->dev);
1527 pm_runtime_disable(&pdev->dev);
1528
1529unprepare:
1530 sysc_unprepare(ddata);
1531
1532 return 0;
1533}
1534
0eecc636 1535static const struct of_device_id sysc_match[] = {
70a65240
TL		 1536 { .compatible = "ti,sysc-omap2", .data = &sysc_omap2, },
1537 { .compatible = "ti,sysc-omap2-timer", .data = &sysc_omap2_timer, },
1538 { .compatible = "ti,sysc-omap4", .data = &sysc_omap4, },
1539 { .compatible = "ti,sysc-omap4-timer", .data = &sysc_omap4_timer, },
1540 { .compatible = "ti,sysc-omap4-simple", .data = &sysc_omap4_simple, },
1541 { .compatible = "ti,sysc-omap3430-sr", .data = &sysc_34xx_sr, },
1542 { .compatible = "ti,sysc-omap3630-sr", .data = &sysc_36xx_sr, },
1543 { .compatible = "ti,sysc-omap4-sr", .data = &sysc_omap4_sr, },
1544 { .compatible = "ti,sysc-omap3-sham", .data = &sysc_omap3_sham, },
1545 { .compatible = "ti,sysc-omap-aes", .data = &sysc_omap3_aes, },
1546 { .compatible = "ti,sysc-mcasp", .data = &sysc_omap4_mcasp, },
1547 { .compatible = "ti,sysc-usb-host-fs",
1548 .data = &sysc_omap4_usb_host_fs, },
0eecc636
TL		 1549 { },
1550};
1551MODULE_DEVICE_TABLE(of, sysc_match);
1552
1553static struct platform_driver sysc_driver = {
1554 .probe = sysc_probe,
684be5a4 1555 .remove = sysc_remove,
0eecc636
TL		 1556 .driver = {
1557 .name = "ti-sysc",
1558 .of_match_table = sysc_match,
1559 .pm = &sysc_pm_ops,
1560 },
1561};
2c355ff6
TL		 1562
1563static int __init sysc_init(void)
1564{
1565 bus_register_notifier(&platform_bus_type, &sysc_nb);
1566
1567 return platform_driver_register(&sysc_driver);
1568}
1569module_init(sysc_init);
1570
1571static void __exit sysc_exit(void)
1572{
1573 bus_unregister_notifier(&platform_bus_type, &sysc_nb);
1574 platform_driver_unregister(&sysc_driver);
1575}
1576module_exit(sysc_exit);
0eecc636
TL		 1577
1578MODULE_DESCRIPTION("TI sysc interconnect target driver");
1579MODULE_LICENSE("GPL v2");
Linux 6.x block layer and io_uring tree(s)