Commit | Line | Data |
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b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
26a84b3e KVA |
2 | # |
3 | # Bus Devices | |
4 | # | |
5 | ||
6 | menu "Bus devices" | |
7 | ||
13fbf3c8 | 8 | config ARM_CCI |
47f36e49 OJ |
9 | bool |
10 | ||
11 | config ARM_CCI400_COMMON | |
12 | bool | |
13 | select ARM_CCI | |
14 | ||
47f36e49 OJ |
15 | config ARM_CCI400_PORT_CTRL |
16 | bool | |
13fbf3c8 | 17 | depends on ARM && OF && CPU_V7 |
47f36e49 | 18 | select ARM_CCI400_COMMON |
13fbf3c8 | 19 | help |
47f36e49 OJ |
20 | Low level power management driver for CCI400 cache coherent |
21 | interconnect for ARM platforms. | |
13fbf3c8 | 22 | |
ccea5e8a LW |
23 | config ARM_INTEGRATOR_LM |
24 | bool "ARM Integrator Logic Module bus" | |
25 | depends on HAS_IOMEM | |
26 | depends on ARCH_INTEGRATOR || COMPILE_TEST | |
27 | default ARCH_INTEGRATOR | |
28 | help | |
29 | Say y here to enable support for the ARM Logic Module bus | |
30 | found on the ARM Integrator AP (Application Platform) | |
31 | ||
44127b77 | 32 | config BRCMSTB_GISB_ARB |
707a4cdf | 33 | tristate "Broadcom STB GISB bus arbiter" |
112cd2f9 | 34 | depends on ARCH_BRCMSTB || BMIPS_GENERIC |
b0ec633c | 35 | default ARCH_BRCMSTB || BMIPS_GENERIC |
44127b77 FF |
36 | help |
37 | Driver for the Broadcom Set Top Box System-on-a-chip internal bus | |
38 | arbiter. This driver provides timeout and target abort error handling | |
39 | and internal bus master decoding. | |
40 | ||
8f93662d | 41 | config BT1_APB |
dc20e93b | 42 | bool "Baikal-T1 APB-bus driver" |
8f93662d SS |
43 | depends on MIPS_BAIKAL_T1 || COMPILE_TEST |
44 | select REGMAP_MMIO | |
45 | help | |
46 | Baikal-T1 AXI-APB bridge is used to access the SoC subsystem CSRs. | |
47 | IO requests are routed to this bus by means of the DW AMBA 3 AXI | |
48 | Interconnect. In case of any APB protocol collisions, slave device | |
49 | not responding on timeout an IRQ is raised with an erroneous address | |
50 | reported to the APB terminator (APB Errors Handler Block). This | |
51 | driver provides the interrupt handler to detect the erroneous | |
52 | address, prints an error message about the address fault, updates an | |
53 | errors counter. The counter and the APB-bus operations timeout can be | |
54 | accessed via corresponding sysfs nodes. | |
55 | ||
63cb7713 | 56 | config BT1_AXI |
22e795b4 | 57 | bool "Baikal-T1 AXI-bus driver" |
63cb7713 SS |
58 | depends on MIPS_BAIKAL_T1 || COMPILE_TEST |
59 | select MFD_SYSCON | |
60 | help | |
61 | AXI3-bus is the main communication bus connecting all high-speed | |
62 | peripheral IP-cores with RAM controller and with MIPS P5600 cores on | |
63 | Baikal-T1 SoC. Traffic arbitration is done by means of DW AMBA 3 AXI | |
64 | Interconnect (so called AXI Main Interconnect) routing IO requests | |
65 | from one SoC block to another. This driver provides a way to detect | |
66 | any bus protocol errors and device not responding situations by | |
67 | means of an embedded on top of the interconnect errors handler | |
68 | block (EHB). AXI Interconnect QoS arbitration tuning is currently | |
69 | unsupported. | |
70 | ||
5bc7f990 MB |
71 | config MOXTET |
72 | tristate "CZ.NIC Turris Mox module configuration bus" | |
73 | depends on SPI_MASTER && OF | |
74 | help | |
75 | Say yes here to add support for the module configuration bus found | |
76 | on CZ.NIC's Turris Mox. This is needed for the ability to discover | |
77 | the order in which the modules are connected and to get/set some of | |
78 | their settings. For example the GPIOs on Mox SFP module are | |
79 | configured through this bus. | |
80 | ||
adf38bb0 ZY |
81 | config HISILICON_LPC |
82 | bool "Support for ISA I/O space on HiSilicon Hip06/7" | |
a579fcfa | 83 | depends on (ARM64 && ARCH_HISI) || (COMPILE_TEST && !ALPHA && !HEXAGON && !PARISC) |
fcbfe812 | 84 | depends on HAS_IOPORT |
3e5cd20d | 85 | select INDIRECT_PIO if ARM64 |
adf38bb0 ZY |
86 | help |
87 | Driver to enable I/O access to devices attached to the Low Pin | |
88 | Count bus on the HiSilicon Hip06/7 SoC. | |
89 | ||
85bf6d4e HS |
90 | config IMX_WEIM |
91 | bool "Freescale EIM DRIVER" | |
92 | depends on ARCH_MXC | |
93 | help | |
3f98b6ba | 94 | Driver for i.MX WEIM controller. |
85bf6d4e HS |
95 | The WEIM(Wireless External Interface Module) works like a bus. |
96 | You can attach many different devices on it, such as NOR, onenand. | |
85bf6d4e | 97 | |
1c953bda LW |
98 | config INTEL_IXP4XX_EB |
99 | bool "Intel IXP4xx expansion bus interface driver" | |
100 | depends on HAS_IOMEM | |
101 | depends on ARCH_IXP4XX || COMPILE_TEST | |
102 | default ARCH_IXP4XX | |
103 | select MFD_SYSCON | |
104 | help | |
105 | Driver for the Intel IXP4xx expansion bus interface. The driver is | |
106 | needed to set up various chip select configuration parameters before | |
107 | devices on the expansion bus can be discovered. | |
108 | ||
8286ae03 JH |
109 | config MIPS_CDMM |
110 | bool "MIPS Common Device Memory Map (CDMM) Driver" | |
16274e58 | 111 | depends on CPU_MIPSR2 || CPU_MIPSR5 |
8286ae03 JH |
112 | help |
113 | Driver needed for the MIPS Common Device Memory Map bus in MIPS | |
114 | cores. This bus is for per-CPU tightly coupled devices such as the | |
115 | Fast Debug Channel (FDC). | |
116 | ||
117 | For this to work, either your bootloader needs to enable the CDMM | |
118 | region at an unused physical address on the boot CPU, or else your | |
119 | platform code needs to implement mips_cdmm_phys_base() (see | |
120 | asm/cdmm.h). | |
121 | ||
fddddb52 TP |
122 | config MVEBU_MBUS |
123 | bool | |
124 | depends on PLAT_ORION | |
125 | help | |
126 | Driver needed for the MBus configuration on Marvell EBU SoCs | |
127 | (Kirkwood, Dove, Orion5x, MV78XX0 and Armada 370/XP). | |
128 | ||
0ee7261c SS |
129 | config OMAP_INTERCONNECT |
130 | tristate "OMAP INTERCONNECT DRIVER" | |
131 | depends on ARCH_OMAP2PLUS | |
132 | ||
133 | help | |
134 | Driver to enable OMAP interconnect error handling driver. | |
ed69bdd8 | 135 | |
13fbf3c8 GU |
136 | config OMAP_OCP2SCP |
137 | tristate "OMAP OCP2SCP DRIVER" | |
138 | depends on ARCH_OMAP2PLUS | |
ed69bdd8 | 139 | help |
13fbf3c8 GU |
140 | Driver to enable ocp2scp module which transforms ocp interface |
141 | protocol to scp protocol. In OMAP4, USB PHY is connected via | |
142 | OCP2SCP and in OMAP5, both USB PHY and SATA PHY is connected via | |
143 | OCP2SCP. | |
3b9334ac | 144 | |
335a1275 LW |
145 | config QCOM_EBI2 |
146 | bool "Qualcomm External Bus Interface 2 (EBI2)" | |
d6db68b2 | 147 | depends on HAS_IOMEM |
5fac7e84 | 148 | depends on ARCH_QCOM || COMPILE_TEST |
c5d8ccfe | 149 | default ARCH_QCOM |
335a1275 LW |
150 | help |
151 | Say y here to enable support for the Qualcomm External Bus | |
152 | Interface 2, which can be used to connect things like NAND Flash, | |
153 | SRAM, ethernet adapters, FPGAs and LCD displays. | |
154 | ||
97d485ed MS |
155 | config QCOM_SSC_BLOCK_BUS |
156 | bool "Qualcomm SSC Block Bus Init Driver" | |
157 | depends on ARCH_QCOM | |
158 | help | |
159 | Say y here to enable support for initializing the bus that connects | |
160 | the SSC block's internal bus to the cNoC (configurantion NoC) on | |
161 | (some) qcom SoCs. | |
162 | The SSC (Snapdragon Sensor Core) block contains a gpio controller, | |
163 | i2c/spi/uart controllers, a hexagon core, and a clock controller | |
164 | which provides clocks for the above. | |
165 | ||
8818e865 IZ |
166 | config SUN50I_DE2_BUS |
167 | bool "Allwinner A64 DE2 Bus Driver" | |
168 | default ARM64 | |
169 | depends on ARCH_SUNXI | |
170 | select SUNXI_SRAM | |
171 | help | |
172 | Say y here to enable support for Allwinner A64 DE2 bus driver. It's | |
173 | mostly transparent, but a SRAM region needs to be claimed in the SRAM | |
174 | controller to make the all blocks in the DE2 part accessible. | |
175 | ||
d787dcdb CYT |
176 | config SUNXI_RSB |
177 | tristate "Allwinner sunXi Reduced Serial Bus Driver" | |
dc1a37b2 | 178 | default MACH_SUN8I || MACH_SUN9I || ARM64 |
d787dcdb CYT |
179 | depends on ARCH_SUNXI |
180 | select REGMAP | |
181 | help | |
182 | Say y here to enable support for Allwinner's Reduced Serial Bus | |
183 | (RSB) support. This controller is responsible for communicating | |
184 | with various RSB based devices, such as AXP223, AXP8XX PMICs, | |
185 | and AC100/AC200 ICs. | |
186 | ||
46a88534 | 187 | config TEGRA_ACONNECT |
2d301c07 | 188 | tristate "Tegra ACONNECT Bus Driver" |
46a88534 JH |
189 | depends on ARCH_TEGRA_210_SOC |
190 | depends on OF && PM | |
46a88534 JH |
191 | help |
192 | Driver for the Tegra ACONNECT bus which is used to interface with | |
193 | the devices inside the Audio Processing Engine (APE) for Tegra210. | |
194 | ||
40eb4776 MK |
195 | config TEGRA_GMI |
196 | tristate "Tegra Generic Memory Interface bus driver" | |
197 | depends on ARCH_TEGRA | |
198 | help | |
199 | Driver for the Tegra Generic Memory Interface bus which can be used | |
200 | to attach devices such as NOR, UART, FPGA and more. | |
201 | ||
7cabf925 DL |
202 | config TI_PWMSS |
203 | bool | |
f213729f | 204 | default y if (ARCH_OMAP2PLUS) && (PWM_TIECAP || PWM_TIEHRPWM || TI_EQEP) |
7cabf925 DL |
205 | help |
206 | PWM Subsystem driver support for AM33xx SOC. | |
207 | ||
208 | PWM submodules require PWM config space access from submodule | |
209 | drivers and require common parent driver support. | |
210 | ||
0eecc636 TL |
211 | config TI_SYSC |
212 | bool "TI sysc interconnect target module driver" | |
063dc062 TL |
213 | depends on ARCH_OMAP2PLUS || ARCH_K3 |
214 | default y | |
0eecc636 TL |
215 | help |
216 | Generic driver for Texas Instruments interconnect target module | |
217 | found on many TI SoCs. | |
218 | ||
5b143d2a SB |
219 | config TS_NBUS |
220 | tristate "Technologic Systems NBUS Driver" | |
221 | depends on SOC_IMX28 | |
222 | depends on OF_GPIO && PWM | |
223 | help | |
224 | Driver for the Technologic Systems NBUS which is used to interface | |
225 | with the peripherals in the FPGA of the TS-4600 SoM. | |
226 | ||
4b7f48d3 | 227 | config UNIPHIER_SYSTEM_BUS |
047a555f | 228 | tristate "UniPhier System Bus driver" |
4b7f48d3 MY |
229 | depends on ARCH_UNIPHIER && OF |
230 | default y | |
231 | help | |
232 | Support for UniPhier System Bus, a simple external bus. This is | |
233 | needed to use on-board devices connected to UniPhier SoCs. | |
234 | ||
3b9334ac | 235 | config VEXPRESS_CONFIG |
70e4758a | 236 | tristate "Versatile Express configuration bus" |
3b9334ac PM |
237 | default y if ARCH_VEXPRESS |
238 | depends on ARM || ARM64 | |
b33cdd28 | 239 | depends on OF |
3b9334ac PM |
240 | select REGMAP |
241 | help | |
242 | Platform configuration infrastructure for the ARM Ltd. | |
243 | Versatile Express. | |
8e7223fc BG |
244 | |
245 | config DA8XX_MSTPRI | |
246 | bool "TI da8xx master peripheral priority driver" | |
247 | depends on ARCH_DAVINCI_DA8XX | |
248 | help | |
249 | Driver for Texas Instruments da8xx master peripheral priority | |
250 | configuration. Allows to adjust the priorities of all master | |
251 | peripherals. | |
252 | ||
6bd067c4 | 253 | source "drivers/bus/fsl-mc/Kconfig" |
0cbf2608 | 254 | source "drivers/bus/mhi/Kconfig" |
6bd067c4 | 255 | |
26a84b3e | 256 | endmenu |