Commit | Line | Data |
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0ff252c1 BYTK |
1 | /* |
2 | * Bluetooth Software UART Qualcomm protocol | |
3 | * | |
4 | * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management | |
5 | * protocol extension to H4. | |
6 | * | |
7 | * Copyright (C) 2007 Texas Instruments, Inc. | |
fa9ad876 | 8 | * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. |
0ff252c1 BYTK |
9 | * |
10 | * Acknowledgements: | |
11 | * This file is based on hci_ll.c, which was... | |
12 | * Written by Ohad Ben-Cohen <ohad@bencohen.org> | |
13 | * which was in turn based on hci_h4.c, which was written | |
14 | * by Maxim Krasnyansky and Marcel Holtmann. | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License version 2 | |
18 | * as published by the Free Software Foundation | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
28 | * | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
05ba533c | 32 | #include <linux/clk.h> |
0ff252c1 | 33 | #include <linux/debugfs.h> |
fa9ad876 BG |
34 | #include <linux/delay.h> |
35 | #include <linux/device.h> | |
05ba533c TE |
36 | #include <linux/gpio/consumer.h> |
37 | #include <linux/mod_devicetable.h> | |
38 | #include <linux/module.h> | |
fa9ad876 BG |
39 | #include <linux/of_device.h> |
40 | #include <linux/platform_device.h> | |
41 | #include <linux/regulator/consumer.h> | |
05ba533c | 42 | #include <linux/serdev.h> |
c614ca3f | 43 | #include <asm/unaligned.h> |
0ff252c1 BYTK |
44 | |
45 | #include <net/bluetooth/bluetooth.h> | |
46 | #include <net/bluetooth/hci_core.h> | |
47 | ||
48 | #include "hci_uart.h" | |
49 | #include "btqca.h" | |
50 | ||
51 | /* HCI_IBS protocol messages */ | |
52 | #define HCI_IBS_SLEEP_IND 0xFE | |
53 | #define HCI_IBS_WAKE_IND 0xFD | |
54 | #define HCI_IBS_WAKE_ACK 0xFC | |
f81b001a | 55 | #define HCI_MAX_IBS_SIZE 10 |
0ff252c1 BYTK |
56 | |
57 | /* Controller states */ | |
58 | #define STATE_IN_BAND_SLEEP_ENABLED 1 | |
59 | ||
f81b001a MH |
60 | #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 |
61 | #define IBS_TX_IDLE_TIMEOUT_MS 2000 | |
94d66714 | 62 | #define CMD_TRANS_TIMEOUT_MS 100 |
0ff252c1 | 63 | |
05ba533c TE |
64 | /* susclk rate */ |
65 | #define SUSCLK_RATE_32KHZ 32768 | |
66 | ||
c614ca3f BG |
67 | /* Controller debug log header */ |
68 | #define QCA_DEBUG_HANDLE 0x2EDC | |
69 | ||
0ff252c1 BYTK |
70 | /* HCI_IBS transmit side sleep protocol states */ |
71 | enum tx_ibs_states { | |
72 | HCI_IBS_TX_ASLEEP, | |
73 | HCI_IBS_TX_WAKING, | |
74 | HCI_IBS_TX_AWAKE, | |
75 | }; | |
76 | ||
77 | /* HCI_IBS receive side sleep protocol states */ | |
78 | enum rx_states { | |
79 | HCI_IBS_RX_ASLEEP, | |
80 | HCI_IBS_RX_AWAKE, | |
81 | }; | |
82 | ||
83 | /* HCI_IBS transmit and receive side clock state vote */ | |
84 | enum hci_ibs_clock_state_vote { | |
85 | HCI_IBS_VOTE_STATS_UPDATE, | |
86 | HCI_IBS_TX_VOTE_CLOCK_ON, | |
87 | HCI_IBS_TX_VOTE_CLOCK_OFF, | |
88 | HCI_IBS_RX_VOTE_CLOCK_ON, | |
89 | HCI_IBS_RX_VOTE_CLOCK_OFF, | |
90 | }; | |
91 | ||
92 | struct qca_data { | |
93 | struct hci_uart *hu; | |
94 | struct sk_buff *rx_skb; | |
95 | struct sk_buff_head txq; | |
96 | struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ | |
97 | spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ | |
98 | u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ | |
99 | u8 rx_ibs_state; /* HCI_IBS receive side power state */ | |
621a5f7a VK |
100 | bool tx_vote; /* Clock must be on for TX */ |
101 | bool rx_vote; /* Clock must be on for RX */ | |
0ff252c1 BYTK |
102 | struct timer_list tx_idle_timer; |
103 | u32 tx_idle_delay; | |
104 | struct timer_list wake_retrans_timer; | |
105 | u32 wake_retrans; | |
106 | struct workqueue_struct *workqueue; | |
107 | struct work_struct ws_awake_rx; | |
108 | struct work_struct ws_awake_device; | |
109 | struct work_struct ws_rx_vote_off; | |
110 | struct work_struct ws_tx_vote_off; | |
111 | unsigned long flags; | |
112 | ||
113 | /* For debugging purpose */ | |
114 | u64 ibs_sent_wacks; | |
115 | u64 ibs_sent_slps; | |
116 | u64 ibs_sent_wakes; | |
117 | u64 ibs_recv_wacks; | |
118 | u64 ibs_recv_slps; | |
119 | u64 ibs_recv_wakes; | |
120 | u64 vote_last_jif; | |
121 | u32 vote_on_ms; | |
122 | u32 vote_off_ms; | |
123 | u64 tx_votes_on; | |
124 | u64 rx_votes_on; | |
125 | u64 tx_votes_off; | |
126 | u64 rx_votes_off; | |
127 | u64 votes_on; | |
128 | u64 votes_off; | |
129 | }; | |
130 | ||
83d9c5e5 BG |
131 | enum qca_speed_type { |
132 | QCA_INIT_SPEED = 1, | |
133 | QCA_OPER_SPEED | |
134 | }; | |
135 | ||
fa9ad876 BG |
136 | /* |
137 | * Voltage regulator information required for configuring the | |
138 | * QCA Bluetooth chipset | |
139 | */ | |
140 | struct qca_vreg { | |
141 | const char *name; | |
142 | unsigned int min_uV; | |
143 | unsigned int max_uV; | |
144 | unsigned int load_uA; | |
145 | }; | |
146 | ||
147 | struct qca_vreg_data { | |
148 | enum qca_btsoc_type soc_type; | |
149 | struct qca_vreg *vregs; | |
150 | size_t num_vregs; | |
151 | }; | |
152 | ||
153 | /* | |
154 | * Platform data for the QCA Bluetooth power driver. | |
155 | */ | |
156 | struct qca_power { | |
157 | struct device *dev; | |
158 | const struct qca_vreg_data *vreg_data; | |
159 | struct regulator_bulk_data *vreg_bulk; | |
160 | bool vregs_on; | |
161 | }; | |
162 | ||
05ba533c TE |
163 | struct qca_serdev { |
164 | struct hci_uart serdev_hu; | |
165 | struct gpio_desc *bt_en; | |
166 | struct clk *susclk; | |
fa9ad876 BG |
167 | enum qca_btsoc_type btsoc_type; |
168 | struct qca_power *bt_power; | |
169 | u32 init_speed; | |
170 | u32 oper_speed; | |
05ba533c TE |
171 | }; |
172 | ||
fa9ad876 | 173 | static int qca_power_setup(struct hci_uart *hu, bool on); |
c2d78273 | 174 | static void qca_power_shutdown(struct hci_uart *hu); |
3e4be65e | 175 | static int qca_power_off(struct hci_dev *hdev); |
fa9ad876 | 176 | |
4fdd5a4f MK |
177 | static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) |
178 | { | |
179 | enum qca_btsoc_type soc_type; | |
180 | ||
181 | if (hu->serdev) { | |
182 | struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); | |
183 | ||
184 | soc_type = qsd->btsoc_type; | |
185 | } else { | |
186 | soc_type = QCA_ROME; | |
187 | } | |
188 | ||
189 | return soc_type; | |
190 | } | |
191 | ||
0ff252c1 BYTK |
192 | static void __serial_clock_on(struct tty_struct *tty) |
193 | { | |
194 | /* TODO: Some chipset requires to enable UART clock on client | |
195 | * side to save power consumption or manual work is required. | |
196 | * Please put your code to control UART clock here if needed | |
197 | */ | |
198 | } | |
199 | ||
200 | static void __serial_clock_off(struct tty_struct *tty) | |
201 | { | |
202 | /* TODO: Some chipset requires to disable UART clock on client | |
203 | * side to save power consumption or manual work is required. | |
204 | * Please put your code to control UART clock off here if needed | |
205 | */ | |
206 | } | |
207 | ||
208 | /* serial_clock_vote needs to be called with the ibs lock held */ | |
209 | static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) | |
210 | { | |
211 | struct qca_data *qca = hu->priv; | |
212 | unsigned int diff; | |
213 | ||
214 | bool old_vote = (qca->tx_vote | qca->rx_vote); | |
215 | bool new_vote; | |
216 | ||
217 | switch (vote) { | |
218 | case HCI_IBS_VOTE_STATS_UPDATE: | |
219 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); | |
220 | ||
221 | if (old_vote) | |
222 | qca->vote_off_ms += diff; | |
223 | else | |
224 | qca->vote_on_ms += diff; | |
225 | return; | |
226 | ||
227 | case HCI_IBS_TX_VOTE_CLOCK_ON: | |
228 | qca->tx_vote = true; | |
229 | qca->tx_votes_on++; | |
230 | new_vote = true; | |
231 | break; | |
232 | ||
233 | case HCI_IBS_RX_VOTE_CLOCK_ON: | |
234 | qca->rx_vote = true; | |
235 | qca->rx_votes_on++; | |
236 | new_vote = true; | |
237 | break; | |
238 | ||
239 | case HCI_IBS_TX_VOTE_CLOCK_OFF: | |
240 | qca->tx_vote = false; | |
241 | qca->tx_votes_off++; | |
242 | new_vote = qca->rx_vote | qca->tx_vote; | |
243 | break; | |
244 | ||
245 | case HCI_IBS_RX_VOTE_CLOCK_OFF: | |
246 | qca->rx_vote = false; | |
247 | qca->rx_votes_off++; | |
248 | new_vote = qca->rx_vote | qca->tx_vote; | |
249 | break; | |
250 | ||
251 | default: | |
252 | BT_ERR("Voting irregularity"); | |
253 | return; | |
254 | } | |
255 | ||
256 | if (new_vote != old_vote) { | |
257 | if (new_vote) | |
258 | __serial_clock_on(hu->tty); | |
259 | else | |
260 | __serial_clock_off(hu->tty); | |
261 | ||
ce26d813 PK |
262 | BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", |
263 | vote ? "true" : "false"); | |
0ff252c1 BYTK |
264 | |
265 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); | |
266 | ||
267 | if (new_vote) { | |
268 | qca->votes_on++; | |
269 | qca->vote_off_ms += diff; | |
270 | } else { | |
271 | qca->votes_off++; | |
272 | qca->vote_on_ms += diff; | |
273 | } | |
274 | qca->vote_last_jif = jiffies; | |
275 | } | |
276 | } | |
277 | ||
278 | /* Builds and sends an HCI_IBS command packet. | |
279 | * These are very simple packets with only 1 cmd byte. | |
280 | */ | |
281 | static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) | |
282 | { | |
283 | int err = 0; | |
284 | struct sk_buff *skb = NULL; | |
285 | struct qca_data *qca = hu->priv; | |
286 | ||
287 | BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); | |
288 | ||
289 | skb = bt_skb_alloc(1, GFP_ATOMIC); | |
290 | if (!skb) { | |
291 | BT_ERR("Failed to allocate memory for HCI_IBS packet"); | |
292 | return -ENOMEM; | |
293 | } | |
294 | ||
295 | /* Assign HCI_IBS type */ | |
634fef61 | 296 | skb_put_u8(skb, cmd); |
0ff252c1 BYTK |
297 | |
298 | skb_queue_tail(&qca->txq, skb); | |
299 | ||
300 | return err; | |
301 | } | |
302 | ||
303 | static void qca_wq_awake_device(struct work_struct *work) | |
304 | { | |
305 | struct qca_data *qca = container_of(work, struct qca_data, | |
306 | ws_awake_device); | |
307 | struct hci_uart *hu = qca->hu; | |
308 | unsigned long retrans_delay; | |
309 | ||
310 | BT_DBG("hu %p wq awake device", hu); | |
311 | ||
312 | /* Vote for serial clock */ | |
313 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); | |
314 | ||
315 | spin_lock(&qca->hci_ibs_lock); | |
316 | ||
317 | /* Send wake indication to device */ | |
318 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) | |
319 | BT_ERR("Failed to send WAKE to device"); | |
320 | ||
321 | qca->ibs_sent_wakes++; | |
322 | ||
323 | /* Start retransmit timer */ | |
324 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); | |
325 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); | |
326 | ||
327 | spin_unlock(&qca->hci_ibs_lock); | |
328 | ||
329 | /* Actually send the packets */ | |
330 | hci_uart_tx_wakeup(hu); | |
331 | } | |
332 | ||
333 | static void qca_wq_awake_rx(struct work_struct *work) | |
334 | { | |
335 | struct qca_data *qca = container_of(work, struct qca_data, | |
336 | ws_awake_rx); | |
337 | struct hci_uart *hu = qca->hu; | |
338 | ||
339 | BT_DBG("hu %p wq awake rx", hu); | |
340 | ||
341 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); | |
342 | ||
343 | spin_lock(&qca->hci_ibs_lock); | |
344 | qca->rx_ibs_state = HCI_IBS_RX_AWAKE; | |
345 | ||
346 | /* Always acknowledge device wake up, | |
347 | * sending IBS message doesn't count as TX ON. | |
348 | */ | |
349 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) | |
350 | BT_ERR("Failed to acknowledge device wake up"); | |
351 | ||
352 | qca->ibs_sent_wacks++; | |
353 | ||
354 | spin_unlock(&qca->hci_ibs_lock); | |
355 | ||
356 | /* Actually send the packets */ | |
357 | hci_uart_tx_wakeup(hu); | |
358 | } | |
359 | ||
360 | static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) | |
361 | { | |
362 | struct qca_data *qca = container_of(work, struct qca_data, | |
363 | ws_rx_vote_off); | |
364 | struct hci_uart *hu = qca->hu; | |
365 | ||
366 | BT_DBG("hu %p rx clock vote off", hu); | |
367 | ||
368 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); | |
369 | } | |
370 | ||
371 | static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) | |
372 | { | |
373 | struct qca_data *qca = container_of(work, struct qca_data, | |
374 | ws_tx_vote_off); | |
375 | struct hci_uart *hu = qca->hu; | |
376 | ||
377 | BT_DBG("hu %p tx clock vote off", hu); | |
378 | ||
379 | /* Run HCI tx handling unlocked */ | |
380 | hci_uart_tx_wakeup(hu); | |
381 | ||
382 | /* Now that message queued to tty driver, vote for tty clocks off. | |
383 | * It is up to the tty driver to pend the clocks off until tx done. | |
384 | */ | |
385 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); | |
386 | } | |
387 | ||
04356052 | 388 | static void hci_ibs_tx_idle_timeout(struct timer_list *t) |
0ff252c1 | 389 | { |
04356052 KC |
390 | struct qca_data *qca = from_timer(qca, t, tx_idle_timer); |
391 | struct hci_uart *hu = qca->hu; | |
0ff252c1 BYTK |
392 | unsigned long flags; |
393 | ||
394 | BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); | |
395 | ||
396 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, | |
397 | flags, SINGLE_DEPTH_NESTING); | |
398 | ||
399 | switch (qca->tx_ibs_state) { | |
400 | case HCI_IBS_TX_AWAKE: | |
401 | /* TX_IDLE, go to SLEEP */ | |
402 | if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { | |
403 | BT_ERR("Failed to send SLEEP to device"); | |
404 | break; | |
405 | } | |
406 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; | |
407 | qca->ibs_sent_slps++; | |
408 | queue_work(qca->workqueue, &qca->ws_tx_vote_off); | |
409 | break; | |
410 | ||
411 | case HCI_IBS_TX_ASLEEP: | |
412 | case HCI_IBS_TX_WAKING: | |
413 | /* Fall through */ | |
414 | ||
415 | default: | |
e059a465 | 416 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
0ff252c1 BYTK |
417 | break; |
418 | } | |
419 | ||
420 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
421 | } | |
422 | ||
04356052 | 423 | static void hci_ibs_wake_retrans_timeout(struct timer_list *t) |
0ff252c1 | 424 | { |
04356052 KC |
425 | struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); |
426 | struct hci_uart *hu = qca->hu; | |
0ff252c1 | 427 | unsigned long flags, retrans_delay; |
a9137188 | 428 | bool retransmit = false; |
0ff252c1 BYTK |
429 | |
430 | BT_DBG("hu %p wake retransmit timeout in %d state", | |
431 | hu, qca->tx_ibs_state); | |
432 | ||
433 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, | |
434 | flags, SINGLE_DEPTH_NESTING); | |
435 | ||
436 | switch (qca->tx_ibs_state) { | |
437 | case HCI_IBS_TX_WAKING: | |
438 | /* No WAKE_ACK, retransmit WAKE */ | |
a9137188 | 439 | retransmit = true; |
0ff252c1 BYTK |
440 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { |
441 | BT_ERR("Failed to acknowledge device wake up"); | |
442 | break; | |
443 | } | |
444 | qca->ibs_sent_wakes++; | |
445 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); | |
446 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); | |
447 | break; | |
448 | ||
449 | case HCI_IBS_TX_ASLEEP: | |
450 | case HCI_IBS_TX_AWAKE: | |
451 | /* Fall through */ | |
452 | ||
453 | default: | |
e059a465 | 454 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
0ff252c1 BYTK |
455 | break; |
456 | } | |
457 | ||
458 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
459 | ||
460 | if (retransmit) | |
461 | hci_uart_tx_wakeup(hu); | |
462 | } | |
463 | ||
464 | /* Initialize protocol */ | |
465 | static int qca_open(struct hci_uart *hu) | |
466 | { | |
05ba533c | 467 | struct qca_serdev *qcadev; |
0ff252c1 | 468 | struct qca_data *qca; |
fa9ad876 | 469 | int ret; |
0ff252c1 BYTK |
470 | |
471 | BT_DBG("hu %p qca_open", hu); | |
472 | ||
25a13e38 | 473 | qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); |
0ff252c1 BYTK |
474 | if (!qca) |
475 | return -ENOMEM; | |
476 | ||
477 | skb_queue_head_init(&qca->txq); | |
478 | skb_queue_head_init(&qca->tx_wait_q); | |
479 | spin_lock_init(&qca->hci_ibs_lock); | |
fac9a602 | 480 | qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); |
0ff252c1 BYTK |
481 | if (!qca->workqueue) { |
482 | BT_ERR("QCA Workqueue not initialized properly"); | |
483 | kfree(qca); | |
484 | return -ENOMEM; | |
485 | } | |
486 | ||
487 | INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); | |
488 | INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); | |
489 | INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); | |
490 | INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); | |
491 | ||
492 | qca->hu = hu; | |
493 | ||
494 | /* Assume we start with both sides asleep -- extra wakes OK */ | |
495 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; | |
496 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; | |
497 | ||
498 | /* clocks actually on, but we start votes off */ | |
499 | qca->tx_vote = false; | |
500 | qca->rx_vote = false; | |
501 | qca->flags = 0; | |
502 | ||
503 | qca->ibs_sent_wacks = 0; | |
504 | qca->ibs_sent_slps = 0; | |
505 | qca->ibs_sent_wakes = 0; | |
506 | qca->ibs_recv_wacks = 0; | |
507 | qca->ibs_recv_slps = 0; | |
508 | qca->ibs_recv_wakes = 0; | |
509 | qca->vote_last_jif = jiffies; | |
510 | qca->vote_on_ms = 0; | |
511 | qca->vote_off_ms = 0; | |
512 | qca->votes_on = 0; | |
513 | qca->votes_off = 0; | |
514 | qca->tx_votes_on = 0; | |
515 | qca->tx_votes_off = 0; | |
516 | qca->rx_votes_on = 0; | |
517 | qca->rx_votes_off = 0; | |
518 | ||
519 | hu->priv = qca; | |
520 | ||
05ba533c | 521 | if (hu->serdev) { |
05ba533c TE |
522 | |
523 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
523760b7 | 524 | if (!qca_is_wcn399x(qcadev->btsoc_type)) { |
fa9ad876 | 525 | gpiod_set_value_cansleep(qcadev->bt_en, 1); |
7f09d5a6 BG |
526 | /* Controller needs time to bootup. */ |
527 | msleep(150); | |
fa9ad876 BG |
528 | } else { |
529 | hu->init_speed = qcadev->init_speed; | |
530 | hu->oper_speed = qcadev->oper_speed; | |
531 | ret = qca_power_setup(hu, true); | |
532 | if (ret) { | |
533 | destroy_workqueue(qca->workqueue); | |
534 | kfree_skb(qca->rx_skb); | |
535 | hu->priv = NULL; | |
536 | kfree(qca); | |
537 | return ret; | |
538 | } | |
539 | } | |
05ba533c TE |
540 | } |
541 | ||
fa9ad876 BG |
542 | timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); |
543 | qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; | |
544 | ||
545 | timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); | |
546 | qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS; | |
547 | ||
0ff252c1 BYTK |
548 | BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", |
549 | qca->tx_idle_delay, qca->wake_retrans); | |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
554 | static void qca_debugfs_init(struct hci_dev *hdev) | |
555 | { | |
556 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
557 | struct qca_data *qca = hu->priv; | |
558 | struct dentry *ibs_dir; | |
559 | umode_t mode; | |
560 | ||
561 | if (!hdev->debugfs) | |
562 | return; | |
563 | ||
564 | ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); | |
565 | ||
566 | /* read only */ | |
567 | mode = S_IRUGO; | |
568 | debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); | |
569 | debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); | |
570 | debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, | |
571 | &qca->ibs_sent_slps); | |
572 | debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, | |
573 | &qca->ibs_sent_wakes); | |
574 | debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, | |
575 | &qca->ibs_sent_wacks); | |
576 | debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, | |
577 | &qca->ibs_recv_slps); | |
578 | debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, | |
579 | &qca->ibs_recv_wakes); | |
580 | debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, | |
581 | &qca->ibs_recv_wacks); | |
10be6c0f | 582 | debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); |
0ff252c1 BYTK |
583 | debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); |
584 | debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); | |
10be6c0f | 585 | debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); |
0ff252c1 BYTK |
586 | debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); |
587 | debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); | |
588 | debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); | |
589 | debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); | |
590 | debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); | |
591 | debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); | |
592 | ||
593 | /* read/write */ | |
594 | mode = S_IRUGO | S_IWUSR; | |
595 | debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); | |
596 | debugfs_create_u32("tx_idle_delay", mode, ibs_dir, | |
597 | &qca->tx_idle_delay); | |
598 | } | |
599 | ||
600 | /* Flush protocol data */ | |
601 | static int qca_flush(struct hci_uart *hu) | |
602 | { | |
603 | struct qca_data *qca = hu->priv; | |
604 | ||
605 | BT_DBG("hu %p qca flush", hu); | |
606 | ||
607 | skb_queue_purge(&qca->tx_wait_q); | |
608 | skb_queue_purge(&qca->txq); | |
609 | ||
610 | return 0; | |
611 | } | |
612 | ||
613 | /* Close protocol */ | |
614 | static int qca_close(struct hci_uart *hu) | |
615 | { | |
05ba533c | 616 | struct qca_serdev *qcadev; |
0ff252c1 BYTK |
617 | struct qca_data *qca = hu->priv; |
618 | ||
619 | BT_DBG("hu %p qca close", hu); | |
620 | ||
621 | serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); | |
622 | ||
623 | skb_queue_purge(&qca->tx_wait_q); | |
624 | skb_queue_purge(&qca->txq); | |
625 | del_timer(&qca->tx_idle_timer); | |
626 | del_timer(&qca->wake_retrans_timer); | |
627 | destroy_workqueue(qca->workqueue); | |
628 | qca->hu = NULL; | |
629 | ||
05ba533c | 630 | if (hu->serdev) { |
05ba533c | 631 | qcadev = serdev_device_get_drvdata(hu->serdev); |
523760b7 | 632 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
c2d78273 | 633 | qca_power_shutdown(hu); |
fa9ad876 BG |
634 | else |
635 | gpiod_set_value_cansleep(qcadev->bt_en, 0); | |
636 | ||
05ba533c TE |
637 | } |
638 | ||
0ff252c1 BYTK |
639 | kfree_skb(qca->rx_skb); |
640 | ||
641 | hu->priv = NULL; | |
642 | ||
643 | kfree(qca); | |
644 | ||
645 | return 0; | |
646 | } | |
647 | ||
648 | /* Called upon a wake-up-indication from the device. | |
649 | */ | |
650 | static void device_want_to_wakeup(struct hci_uart *hu) | |
651 | { | |
652 | unsigned long flags; | |
653 | struct qca_data *qca = hu->priv; | |
654 | ||
655 | BT_DBG("hu %p want to wake up", hu); | |
656 | ||
657 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
658 | ||
659 | qca->ibs_recv_wakes++; | |
660 | ||
661 | switch (qca->rx_ibs_state) { | |
662 | case HCI_IBS_RX_ASLEEP: | |
663 | /* Make sure clock is on - we may have turned clock off since | |
664 | * receiving the wake up indicator awake rx clock. | |
665 | */ | |
666 | queue_work(qca->workqueue, &qca->ws_awake_rx); | |
667 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
668 | return; | |
669 | ||
670 | case HCI_IBS_RX_AWAKE: | |
671 | /* Always acknowledge device wake up, | |
672 | * sending IBS message doesn't count as TX ON. | |
673 | */ | |
674 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { | |
675 | BT_ERR("Failed to acknowledge device wake up"); | |
676 | break; | |
677 | } | |
678 | qca->ibs_sent_wacks++; | |
679 | break; | |
680 | ||
681 | default: | |
682 | /* Any other state is illegal */ | |
683 | BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", | |
684 | qca->rx_ibs_state); | |
685 | break; | |
686 | } | |
687 | ||
688 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
689 | ||
690 | /* Actually send the packets */ | |
691 | hci_uart_tx_wakeup(hu); | |
692 | } | |
693 | ||
694 | /* Called upon a sleep-indication from the device. | |
695 | */ | |
696 | static void device_want_to_sleep(struct hci_uart *hu) | |
697 | { | |
698 | unsigned long flags; | |
699 | struct qca_data *qca = hu->priv; | |
700 | ||
701 | BT_DBG("hu %p want to sleep", hu); | |
702 | ||
703 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
704 | ||
705 | qca->ibs_recv_slps++; | |
706 | ||
707 | switch (qca->rx_ibs_state) { | |
708 | case HCI_IBS_RX_AWAKE: | |
709 | /* Update state */ | |
710 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; | |
711 | /* Vote off rx clock under workqueue */ | |
712 | queue_work(qca->workqueue, &qca->ws_rx_vote_off); | |
713 | break; | |
714 | ||
715 | case HCI_IBS_RX_ASLEEP: | |
716 | /* Fall through */ | |
717 | ||
718 | default: | |
719 | /* Any other state is illegal */ | |
720 | BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", | |
721 | qca->rx_ibs_state); | |
722 | break; | |
723 | } | |
724 | ||
725 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
726 | } | |
727 | ||
728 | /* Called upon wake-up-acknowledgement from the device | |
729 | */ | |
730 | static void device_woke_up(struct hci_uart *hu) | |
731 | { | |
732 | unsigned long flags, idle_delay; | |
733 | struct qca_data *qca = hu->priv; | |
734 | struct sk_buff *skb = NULL; | |
735 | ||
736 | BT_DBG("hu %p woke up", hu); | |
737 | ||
738 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
739 | ||
740 | qca->ibs_recv_wacks++; | |
741 | ||
742 | switch (qca->tx_ibs_state) { | |
743 | case HCI_IBS_TX_AWAKE: | |
744 | /* Expect one if we send 2 WAKEs */ | |
745 | BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", | |
746 | qca->tx_ibs_state); | |
747 | break; | |
748 | ||
749 | case HCI_IBS_TX_WAKING: | |
750 | /* Send pending packets */ | |
751 | while ((skb = skb_dequeue(&qca->tx_wait_q))) | |
752 | skb_queue_tail(&qca->txq, skb); | |
753 | ||
754 | /* Switch timers and change state to HCI_IBS_TX_AWAKE */ | |
755 | del_timer(&qca->wake_retrans_timer); | |
756 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); | |
757 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); | |
758 | qca->tx_ibs_state = HCI_IBS_TX_AWAKE; | |
759 | break; | |
760 | ||
761 | case HCI_IBS_TX_ASLEEP: | |
762 | /* Fall through */ | |
763 | ||
764 | default: | |
765 | BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", | |
766 | qca->tx_ibs_state); | |
767 | break; | |
768 | } | |
769 | ||
770 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
771 | ||
772 | /* Actually send the packets */ | |
773 | hci_uart_tx_wakeup(hu); | |
774 | } | |
775 | ||
776 | /* Enqueue frame for transmittion (padding, crc, etc) may be called from | |
777 | * two simultaneous tasklets. | |
778 | */ | |
779 | static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) | |
780 | { | |
781 | unsigned long flags = 0, idle_delay; | |
782 | struct qca_data *qca = hu->priv; | |
783 | ||
784 | BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, | |
785 | qca->tx_ibs_state); | |
786 | ||
787 | /* Prepend skb with frame type */ | |
618e8bc2 | 788 | memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); |
0ff252c1 | 789 | |
035a960e BG |
790 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
791 | ||
0ff252c1 BYTK |
792 | /* Don't go to sleep in middle of patch download or |
793 | * Out-Of-Band(GPIOs control) sleep is selected. | |
794 | */ | |
795 | if (!test_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags)) { | |
796 | skb_queue_tail(&qca->txq, skb); | |
035a960e | 797 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
798 | return 0; |
799 | } | |
800 | ||
0ff252c1 BYTK |
801 | /* Act according to current state */ |
802 | switch (qca->tx_ibs_state) { | |
803 | case HCI_IBS_TX_AWAKE: | |
804 | BT_DBG("Device awake, sending normally"); | |
805 | skb_queue_tail(&qca->txq, skb); | |
806 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); | |
807 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); | |
808 | break; | |
809 | ||
810 | case HCI_IBS_TX_ASLEEP: | |
811 | BT_DBG("Device asleep, waking up and queueing packet"); | |
812 | /* Save packet for later */ | |
813 | skb_queue_tail(&qca->tx_wait_q, skb); | |
814 | ||
815 | qca->tx_ibs_state = HCI_IBS_TX_WAKING; | |
816 | /* Schedule a work queue to wake up device */ | |
817 | queue_work(qca->workqueue, &qca->ws_awake_device); | |
818 | break; | |
819 | ||
820 | case HCI_IBS_TX_WAKING: | |
821 | BT_DBG("Device waking up, queueing packet"); | |
822 | /* Transient state; just keep packet for later */ | |
823 | skb_queue_tail(&qca->tx_wait_q, skb); | |
824 | break; | |
825 | ||
826 | default: | |
827 | BT_ERR("Illegal tx state: %d (losing packet)", | |
828 | qca->tx_ibs_state); | |
829 | kfree_skb(skb); | |
830 | break; | |
831 | } | |
832 | ||
833 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
834 | ||
835 | return 0; | |
836 | } | |
837 | ||
838 | static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) | |
839 | { | |
840 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
841 | ||
842 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); | |
843 | ||
844 | device_want_to_sleep(hu); | |
845 | ||
846 | kfree_skb(skb); | |
847 | return 0; | |
848 | } | |
849 | ||
850 | static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) | |
851 | { | |
852 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
853 | ||
854 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); | |
855 | ||
856 | device_want_to_wakeup(hu); | |
857 | ||
858 | kfree_skb(skb); | |
859 | return 0; | |
860 | } | |
861 | ||
862 | static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) | |
863 | { | |
864 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
865 | ||
866 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); | |
867 | ||
868 | device_woke_up(hu); | |
869 | ||
870 | kfree_skb(skb); | |
871 | return 0; | |
872 | } | |
873 | ||
c614ca3f BG |
874 | static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) |
875 | { | |
876 | /* We receive debug logs from chip as an ACL packets. | |
877 | * Instead of sending the data to ACL to decode the | |
878 | * received data, we are pushing them to the above layers | |
879 | * as a diagnostic packet. | |
880 | */ | |
881 | if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) | |
882 | return hci_recv_diag(hdev, skb); | |
883 | ||
884 | return hci_recv_frame(hdev, skb); | |
885 | } | |
886 | ||
0ff252c1 BYTK |
887 | #define QCA_IBS_SLEEP_IND_EVENT \ |
888 | .type = HCI_IBS_SLEEP_IND, \ | |
889 | .hlen = 0, \ | |
890 | .loff = 0, \ | |
891 | .lsize = 0, \ | |
892 | .maxlen = HCI_MAX_IBS_SIZE | |
893 | ||
894 | #define QCA_IBS_WAKE_IND_EVENT \ | |
895 | .type = HCI_IBS_WAKE_IND, \ | |
896 | .hlen = 0, \ | |
897 | .loff = 0, \ | |
898 | .lsize = 0, \ | |
899 | .maxlen = HCI_MAX_IBS_SIZE | |
900 | ||
901 | #define QCA_IBS_WAKE_ACK_EVENT \ | |
902 | .type = HCI_IBS_WAKE_ACK, \ | |
903 | .hlen = 0, \ | |
904 | .loff = 0, \ | |
905 | .lsize = 0, \ | |
906 | .maxlen = HCI_MAX_IBS_SIZE | |
907 | ||
908 | static const struct h4_recv_pkt qca_recv_pkts[] = { | |
c614ca3f | 909 | { H4_RECV_ACL, .recv = qca_recv_acl_data }, |
0ff252c1 BYTK |
910 | { H4_RECV_SCO, .recv = hci_recv_frame }, |
911 | { H4_RECV_EVENT, .recv = hci_recv_frame }, | |
912 | { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, | |
913 | { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, | |
914 | { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, | |
915 | }; | |
916 | ||
917 | static int qca_recv(struct hci_uart *hu, const void *data, int count) | |
918 | { | |
919 | struct qca_data *qca = hu->priv; | |
920 | ||
921 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) | |
922 | return -EUNATCH; | |
923 | ||
924 | qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, | |
925 | qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); | |
926 | if (IS_ERR(qca->rx_skb)) { | |
927 | int err = PTR_ERR(qca->rx_skb); | |
2064ee33 | 928 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
0ff252c1 BYTK |
929 | qca->rx_skb = NULL; |
930 | return err; | |
931 | } | |
932 | ||
933 | return count; | |
934 | } | |
935 | ||
936 | static struct sk_buff *qca_dequeue(struct hci_uart *hu) | |
937 | { | |
938 | struct qca_data *qca = hu->priv; | |
939 | ||
940 | return skb_dequeue(&qca->txq); | |
941 | } | |
942 | ||
943 | static uint8_t qca_get_baudrate_value(int speed) | |
944 | { | |
ce26d813 | 945 | switch (speed) { |
0ff252c1 BYTK |
946 | case 9600: |
947 | return QCA_BAUDRATE_9600; | |
948 | case 19200: | |
949 | return QCA_BAUDRATE_19200; | |
950 | case 38400: | |
951 | return QCA_BAUDRATE_38400; | |
952 | case 57600: | |
953 | return QCA_BAUDRATE_57600; | |
954 | case 115200: | |
955 | return QCA_BAUDRATE_115200; | |
956 | case 230400: | |
957 | return QCA_BAUDRATE_230400; | |
958 | case 460800: | |
959 | return QCA_BAUDRATE_460800; | |
960 | case 500000: | |
961 | return QCA_BAUDRATE_500000; | |
962 | case 921600: | |
963 | return QCA_BAUDRATE_921600; | |
964 | case 1000000: | |
965 | return QCA_BAUDRATE_1000000; | |
966 | case 2000000: | |
967 | return QCA_BAUDRATE_2000000; | |
968 | case 3000000: | |
969 | return QCA_BAUDRATE_3000000; | |
be93a497 BG |
970 | case 3200000: |
971 | return QCA_BAUDRATE_3200000; | |
0ff252c1 BYTK |
972 | case 3500000: |
973 | return QCA_BAUDRATE_3500000; | |
974 | default: | |
975 | return QCA_BAUDRATE_115200; | |
976 | } | |
977 | } | |
978 | ||
979 | static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) | |
980 | { | |
981 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
982 | struct qca_data *qca = hu->priv; | |
983 | struct sk_buff *skb; | |
984 | u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; | |
985 | ||
be93a497 | 986 | if (baudrate > QCA_BAUDRATE_3200000) |
0ff252c1 BYTK |
987 | return -EINVAL; |
988 | ||
989 | cmd[4] = baudrate; | |
990 | ||
25a13e38 | 991 | skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); |
0ff252c1 | 992 | if (!skb) { |
2064ee33 | 993 | bt_dev_err(hdev, "Failed to allocate baudrate packet"); |
0ff252c1 BYTK |
994 | return -ENOMEM; |
995 | } | |
996 | ||
997 | /* Assign commands to change baudrate and packet type. */ | |
59ae1d12 | 998 | skb_put_data(skb, cmd, sizeof(cmd)); |
618e8bc2 | 999 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
0ff252c1 BYTK |
1000 | |
1001 | skb_queue_tail(&qca->txq, skb); | |
1002 | hci_uart_tx_wakeup(hu); | |
1003 | ||
94d66714 MK |
1004 | /* Wait for the baudrate change request to be sent */ |
1005 | ||
1006 | while (!skb_queue_empty(&qca->txq)) | |
1007 | usleep_range(100, 200); | |
1008 | ||
ecf2b768 MK |
1009 | if (hu->serdev) |
1010 | serdev_device_wait_until_sent(hu->serdev, | |
94d66714 MK |
1011 | msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); |
1012 | ||
1013 | /* Give the controller time to process the request */ | |
523760b7 | 1014 | if (qca_is_wcn399x(qca_soc_type(hu))) |
94d66714 MK |
1015 | msleep(10); |
1016 | else | |
1017 | msleep(300); | |
0ff252c1 BYTK |
1018 | |
1019 | return 0; | |
1020 | } | |
1021 | ||
05ba533c TE |
1022 | static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) |
1023 | { | |
1024 | if (hu->serdev) | |
1025 | serdev_device_set_baudrate(hu->serdev, speed); | |
1026 | else | |
1027 | hci_uart_set_baudrate(hu, speed); | |
1028 | } | |
1029 | ||
9836b802 | 1030 | static int qca_send_power_pulse(struct hci_uart *hu, bool on) |
fa9ad876 | 1031 | { |
f9558270 | 1032 | int ret; |
94d66714 | 1033 | int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); |
9836b802 | 1034 | u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; |
fa9ad876 BG |
1035 | |
1036 | /* These power pulses are single byte command which are sent | |
1037 | * at required baudrate to wcn3990. On wcn3990, we have an external | |
1038 | * circuit at Tx pin which decodes the pulse sent at specific baudrate. | |
1039 | * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT | |
1040 | * and also we use the same power inputs to turn on and off for | |
1041 | * Wi-Fi/BT. Powering up the power sources will not enable BT, until | |
1042 | * we send a power on pulse at 115200 bps. This algorithm will help to | |
1043 | * save power. Disabling hardware flow control is mandatory while | |
1044 | * sending power pulses to SoC. | |
1045 | */ | |
f9558270 | 1046 | bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); |
fa9ad876 | 1047 | |
f9558270 | 1048 | serdev_device_write_flush(hu->serdev); |
fa9ad876 | 1049 | hci_uart_set_flow_control(hu, true); |
f9558270 BG |
1050 | ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); |
1051 | if (ret < 0) { | |
1052 | bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); | |
1053 | return ret; | |
1054 | } | |
fa9ad876 | 1055 | |
f9558270 | 1056 | serdev_device_wait_until_sent(hu->serdev, timeout); |
fa9ad876 BG |
1057 | hci_uart_set_flow_control(hu, false); |
1058 | ||
0ebcddd8 | 1059 | /* Give to controller time to boot/shutdown */ |
ad571d72 MK |
1060 | if (on) |
1061 | msleep(100); | |
0ebcddd8 MK |
1062 | else |
1063 | msleep(10); | |
ad571d72 | 1064 | |
fa9ad876 BG |
1065 | return 0; |
1066 | } | |
1067 | ||
83d9c5e5 BG |
1068 | static unsigned int qca_get_speed(struct hci_uart *hu, |
1069 | enum qca_speed_type speed_type) | |
1070 | { | |
1071 | unsigned int speed = 0; | |
1072 | ||
1073 | if (speed_type == QCA_INIT_SPEED) { | |
1074 | if (hu->init_speed) | |
1075 | speed = hu->init_speed; | |
1076 | else if (hu->proto->init_speed) | |
1077 | speed = hu->proto->init_speed; | |
1078 | } else { | |
1079 | if (hu->oper_speed) | |
1080 | speed = hu->oper_speed; | |
1081 | else if (hu->proto->oper_speed) | |
1082 | speed = hu->proto->oper_speed; | |
1083 | } | |
1084 | ||
1085 | return speed; | |
1086 | } | |
1087 | ||
1088 | static int qca_check_speeds(struct hci_uart *hu) | |
1089 | { | |
523760b7 | 1090 | if (qca_is_wcn399x(qca_soc_type(hu))) { |
fa9ad876 BG |
1091 | if (!qca_get_speed(hu, QCA_INIT_SPEED) && |
1092 | !qca_get_speed(hu, QCA_OPER_SPEED)) | |
1093 | return -EINVAL; | |
1094 | } else { | |
1095 | if (!qca_get_speed(hu, QCA_INIT_SPEED) || | |
1096 | !qca_get_speed(hu, QCA_OPER_SPEED)) | |
1097 | return -EINVAL; | |
1098 | } | |
83d9c5e5 BG |
1099 | |
1100 | return 0; | |
1101 | } | |
1102 | ||
1103 | static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) | |
1104 | { | |
1105 | unsigned int speed, qca_baudrate; | |
78e8fa29 | 1106 | int ret = 0; |
83d9c5e5 BG |
1107 | |
1108 | if (speed_type == QCA_INIT_SPEED) { | |
1109 | speed = qca_get_speed(hu, QCA_INIT_SPEED); | |
1110 | if (speed) | |
1111 | host_set_baudrate(hu, speed); | |
1112 | } else { | |
4fdd5a4f MK |
1113 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
1114 | ||
83d9c5e5 BG |
1115 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
1116 | if (!speed) | |
1117 | return 0; | |
1118 | ||
78e8fa29 BG |
1119 | /* Disable flow control for wcn3990 to deassert RTS while |
1120 | * changing the baudrate of chip and host. | |
1121 | */ | |
523760b7 | 1122 | if (qca_is_wcn399x(soc_type)) |
78e8fa29 BG |
1123 | hci_uart_set_flow_control(hu, true); |
1124 | ||
83d9c5e5 | 1125 | qca_baudrate = qca_get_baudrate_value(speed); |
fa9ad876 | 1126 | bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); |
83d9c5e5 BG |
1127 | ret = qca_set_baudrate(hu->hdev, qca_baudrate); |
1128 | if (ret) | |
78e8fa29 | 1129 | goto error; |
83d9c5e5 BG |
1130 | |
1131 | host_set_baudrate(hu, speed); | |
78e8fa29 BG |
1132 | |
1133 | error: | |
523760b7 | 1134 | if (qca_is_wcn399x(soc_type)) |
78e8fa29 | 1135 | hci_uart_set_flow_control(hu, false); |
83d9c5e5 BG |
1136 | } |
1137 | ||
78e8fa29 | 1138 | return ret; |
83d9c5e5 BG |
1139 | } |
1140 | ||
fa9ad876 BG |
1141 | static int qca_wcn3990_init(struct hci_uart *hu) |
1142 | { | |
3e4be65e | 1143 | struct qca_serdev *qcadev; |
fa9ad876 BG |
1144 | int ret; |
1145 | ||
3e4be65e BG |
1146 | /* Check for vregs status, may be hci down has turned |
1147 | * off the voltage regulator. | |
1148 | */ | |
1149 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
1150 | if (!qcadev->bt_power->vregs_on) { | |
1151 | serdev_device_close(hu->serdev); | |
1152 | ret = qca_power_setup(hu, true); | |
1153 | if (ret) | |
1154 | return ret; | |
1155 | ||
1156 | ret = serdev_device_open(hu->serdev); | |
1157 | if (ret) { | |
1158 | bt_dev_err(hu->hdev, "failed to open port"); | |
1159 | return ret; | |
1160 | } | |
1161 | } | |
1162 | ||
fa9ad876 BG |
1163 | /* Forcefully enable wcn3990 to enter in to boot mode. */ |
1164 | host_set_baudrate(hu, 2400); | |
9836b802 | 1165 | ret = qca_send_power_pulse(hu, false); |
fa9ad876 BG |
1166 | if (ret) |
1167 | return ret; | |
1168 | ||
1169 | qca_set_speed(hu, QCA_INIT_SPEED); | |
9836b802 | 1170 | ret = qca_send_power_pulse(hu, true); |
fa9ad876 BG |
1171 | if (ret) |
1172 | return ret; | |
1173 | ||
fa9ad876 BG |
1174 | /* Now the device is in ready state to communicate with host. |
1175 | * To sync host with device we need to reopen port. | |
1176 | * Without this, we will have RTS and CTS synchronization | |
1177 | * issues. | |
1178 | */ | |
1179 | serdev_device_close(hu->serdev); | |
1180 | ret = serdev_device_open(hu->serdev); | |
1181 | if (ret) { | |
1182 | bt_dev_err(hu->hdev, "failed to open port"); | |
1183 | return ret; | |
1184 | } | |
1185 | ||
1186 | hci_uart_set_flow_control(hu, false); | |
1187 | ||
1188 | return 0; | |
1189 | } | |
1190 | ||
0ff252c1 BYTK |
1191 | static int qca_setup(struct hci_uart *hu) |
1192 | { | |
1193 | struct hci_dev *hdev = hu->hdev; | |
1194 | struct qca_data *qca = hu->priv; | |
1195 | unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; | |
4fdd5a4f | 1196 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
0ff252c1 | 1197 | int ret; |
aadebac4 | 1198 | int soc_ver = 0; |
0ff252c1 | 1199 | |
83d9c5e5 BG |
1200 | ret = qca_check_speeds(hu); |
1201 | if (ret) | |
1202 | return ret; | |
1203 | ||
0ff252c1 BYTK |
1204 | /* Patch downloading has to be done without IBS mode */ |
1205 | clear_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags); | |
1206 | ||
523760b7 | 1207 | if (qca_is_wcn399x(soc_type)) { |
fa9ad876 | 1208 | bt_dev_info(hdev, "setting up wcn3990"); |
3e4be65e BG |
1209 | |
1210 | /* Enable NON_PERSISTENT_SETUP QUIRK to ensure to execute | |
1211 | * setup for every hci up. | |
1212 | */ | |
1213 | set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); | |
5971752d | 1214 | set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); |
3e4be65e | 1215 | hu->hdev->shutdown = qca_power_off; |
fa9ad876 BG |
1216 | ret = qca_wcn3990_init(hu); |
1217 | if (ret) | |
1218 | return ret; | |
1219 | ||
1220 | ret = qca_read_soc_version(hdev, &soc_ver); | |
1221 | if (ret) | |
1222 | return ret; | |
1223 | } else { | |
1224 | bt_dev_info(hdev, "ROME setup"); | |
1225 | qca_set_speed(hu, QCA_INIT_SPEED); | |
1226 | } | |
0ff252c1 BYTK |
1227 | |
1228 | /* Setup user speed if needed */ | |
83d9c5e5 | 1229 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
0ff252c1 | 1230 | if (speed) { |
83d9c5e5 BG |
1231 | ret = qca_set_speed(hu, QCA_OPER_SPEED); |
1232 | if (ret) | |
0ff252c1 | 1233 | return ret; |
83d9c5e5 BG |
1234 | |
1235 | qca_baudrate = qca_get_baudrate_value(speed); | |
0ff252c1 BYTK |
1236 | } |
1237 | ||
523760b7 | 1238 | if (!qca_is_wcn399x(soc_type)) { |
fa9ad876 BG |
1239 | /* Get QCA version information */ |
1240 | ret = qca_read_soc_version(hdev, &soc_ver); | |
1241 | if (ret) | |
1242 | return ret; | |
1243 | } | |
aadebac4 BG |
1244 | |
1245 | bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver); | |
0ff252c1 | 1246 | /* Setup patch / NVM configurations */ |
4fdd5a4f | 1247 | ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver); |
0ff252c1 BYTK |
1248 | if (!ret) { |
1249 | set_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags); | |
1250 | qca_debugfs_init(hdev); | |
ba8f3597 LP |
1251 | } else if (ret == -ENOENT) { |
1252 | /* No patch/nvm-config found, run with original fw/config */ | |
1253 | ret = 0; | |
7dc5fe08 AP |
1254 | } else if (ret == -EAGAIN) { |
1255 | /* | |
1256 | * Userspace firmware loader will return -EAGAIN in case no | |
1257 | * patch/nvm-config is found, so run with original fw/config. | |
1258 | */ | |
1259 | ret = 0; | |
0ff252c1 BYTK |
1260 | } |
1261 | ||
1262 | /* Setup bdaddr */ | |
523760b7 | 1263 | if (qca_is_wcn399x(soc_type)) |
5c0a1001 BG |
1264 | hu->hdev->set_bdaddr = qca_set_bdaddr; |
1265 | else | |
1266 | hu->hdev->set_bdaddr = qca_set_bdaddr_rome; | |
0ff252c1 BYTK |
1267 | |
1268 | return ret; | |
1269 | } | |
1270 | ||
1271 | static struct hci_uart_proto qca_proto = { | |
1272 | .id = HCI_UART_QCA, | |
1273 | .name = "QCA", | |
aee61f7a | 1274 | .manufacturer = 29, |
0ff252c1 BYTK |
1275 | .init_speed = 115200, |
1276 | .oper_speed = 3000000, | |
1277 | .open = qca_open, | |
1278 | .close = qca_close, | |
1279 | .flush = qca_flush, | |
1280 | .setup = qca_setup, | |
1281 | .recv = qca_recv, | |
1282 | .enqueue = qca_enqueue, | |
1283 | .dequeue = qca_dequeue, | |
1284 | }; | |
1285 | ||
523760b7 | 1286 | static const struct qca_vreg_data qca_soc_data_wcn3990 = { |
fa9ad876 BG |
1287 | .soc_type = QCA_WCN3990, |
1288 | .vregs = (struct qca_vreg []) { | |
1289 | { "vddio", 1800000, 1900000, 15000 }, | |
1290 | { "vddxo", 1800000, 1900000, 80000 }, | |
1291 | { "vddrf", 1300000, 1350000, 300000 }, | |
1292 | { "vddch0", 3300000, 3400000, 450000 }, | |
1293 | }, | |
1294 | .num_vregs = 4, | |
1295 | }; | |
1296 | ||
523760b7 HB |
1297 | static const struct qca_vreg_data qca_soc_data_wcn3998 = { |
1298 | .soc_type = QCA_WCN3998, | |
1299 | .vregs = (struct qca_vreg []) { | |
1300 | { "vddio", 1800000, 1900000, 10000 }, | |
1301 | { "vddxo", 1800000, 1900000, 80000 }, | |
1302 | { "vddrf", 1300000, 1352000, 300000 }, | |
1303 | { "vddch0", 3300000, 3300000, 450000 }, | |
1304 | }, | |
1305 | .num_vregs = 4, | |
1306 | }; | |
1307 | ||
c2d78273 | 1308 | static void qca_power_shutdown(struct hci_uart *hu) |
fa9ad876 | 1309 | { |
035a960e BG |
1310 | struct qca_data *qca = hu->priv; |
1311 | unsigned long flags; | |
1312 | ||
1313 | /* From this point we go into power off state. But serial port is | |
1314 | * still open, stop queueing the IBS data and flush all the buffered | |
1315 | * data in skb's. | |
1316 | */ | |
1317 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
1318 | clear_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags); | |
1319 | qca_flush(hu); | |
1320 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
1321 | ||
fa9ad876 | 1322 | host_set_baudrate(hu, 2400); |
9836b802 | 1323 | qca_send_power_pulse(hu, false); |
fa9ad876 BG |
1324 | qca_power_setup(hu, false); |
1325 | } | |
1326 | ||
3e4be65e BG |
1327 | static int qca_power_off(struct hci_dev *hdev) |
1328 | { | |
1329 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
1330 | ||
1331 | qca_power_shutdown(hu); | |
1332 | return 0; | |
1333 | } | |
1334 | ||
fa9ad876 BG |
1335 | static int qca_enable_regulator(struct qca_vreg vregs, |
1336 | struct regulator *regulator) | |
1337 | { | |
1338 | int ret; | |
1339 | ||
1340 | ret = regulator_set_voltage(regulator, vregs.min_uV, | |
1341 | vregs.max_uV); | |
1342 | if (ret) | |
1343 | return ret; | |
1344 | ||
1345 | if (vregs.load_uA) | |
1346 | ret = regulator_set_load(regulator, | |
1347 | vregs.load_uA); | |
1348 | ||
1349 | if (ret) | |
1350 | return ret; | |
1351 | ||
1352 | return regulator_enable(regulator); | |
1353 | ||
1354 | } | |
1355 | ||
1356 | static void qca_disable_regulator(struct qca_vreg vregs, | |
1357 | struct regulator *regulator) | |
1358 | { | |
1359 | regulator_disable(regulator); | |
1360 | regulator_set_voltage(regulator, 0, vregs.max_uV); | |
1361 | if (vregs.load_uA) | |
1362 | regulator_set_load(regulator, 0); | |
1363 | ||
1364 | } | |
1365 | ||
1366 | static int qca_power_setup(struct hci_uart *hu, bool on) | |
1367 | { | |
1368 | struct qca_vreg *vregs; | |
1369 | struct regulator_bulk_data *vreg_bulk; | |
1370 | struct qca_serdev *qcadev; | |
1371 | int i, num_vregs, ret = 0; | |
1372 | ||
1373 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
1374 | if (!qcadev || !qcadev->bt_power || !qcadev->bt_power->vreg_data || | |
1375 | !qcadev->bt_power->vreg_bulk) | |
1376 | return -EINVAL; | |
1377 | ||
1378 | vregs = qcadev->bt_power->vreg_data->vregs; | |
1379 | vreg_bulk = qcadev->bt_power->vreg_bulk; | |
1380 | num_vregs = qcadev->bt_power->vreg_data->num_vregs; | |
1381 | BT_DBG("on: %d", on); | |
1382 | if (on && !qcadev->bt_power->vregs_on) { | |
1383 | for (i = 0; i < num_vregs; i++) { | |
1384 | ret = qca_enable_regulator(vregs[i], | |
1385 | vreg_bulk[i].consumer); | |
1386 | if (ret) | |
1387 | break; | |
1388 | } | |
1389 | ||
1390 | if (ret) { | |
1391 | BT_ERR("failed to enable regulator:%s", vregs[i].name); | |
1392 | /* turn off regulators which are enabled */ | |
1393 | for (i = i - 1; i >= 0; i--) | |
1394 | qca_disable_regulator(vregs[i], | |
1395 | vreg_bulk[i].consumer); | |
1396 | } else { | |
1397 | qcadev->bt_power->vregs_on = true; | |
1398 | } | |
1399 | } else if (!on && qcadev->bt_power->vregs_on) { | |
1400 | /* turn off regulator in reverse order */ | |
1401 | i = qcadev->bt_power->vreg_data->num_vregs - 1; | |
1402 | for ( ; i >= 0; i--) | |
1403 | qca_disable_regulator(vregs[i], vreg_bulk[i].consumer); | |
1404 | ||
1405 | qcadev->bt_power->vregs_on = false; | |
1406 | } | |
1407 | ||
1408 | return ret; | |
1409 | } | |
1410 | ||
1411 | static int qca_init_regulators(struct qca_power *qca, | |
1412 | const struct qca_vreg *vregs, size_t num_vregs) | |
1413 | { | |
1414 | int i; | |
1415 | ||
329e0989 | 1416 | qca->vreg_bulk = devm_kcalloc(qca->dev, num_vregs, |
fa9ad876 BG |
1417 | sizeof(struct regulator_bulk_data), |
1418 | GFP_KERNEL); | |
1419 | if (!qca->vreg_bulk) | |
1420 | return -ENOMEM; | |
1421 | ||
1422 | for (i = 0; i < num_vregs; i++) | |
1423 | qca->vreg_bulk[i].supply = vregs[i].name; | |
1424 | ||
1425 | return devm_regulator_bulk_get(qca->dev, num_vregs, qca->vreg_bulk); | |
1426 | } | |
1427 | ||
05ba533c TE |
1428 | static int qca_serdev_probe(struct serdev_device *serdev) |
1429 | { | |
1430 | struct qca_serdev *qcadev; | |
fa9ad876 | 1431 | const struct qca_vreg_data *data; |
05ba533c TE |
1432 | int err; |
1433 | ||
1434 | qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); | |
1435 | if (!qcadev) | |
1436 | return -ENOMEM; | |
1437 | ||
1438 | qcadev->serdev_hu.serdev = serdev; | |
fa9ad876 | 1439 | data = of_device_get_match_data(&serdev->dev); |
05ba533c | 1440 | serdev_device_set_drvdata(serdev, qcadev); |
523760b7 HB |
1441 | if (data && qca_is_wcn399x(data->soc_type)) { |
1442 | qcadev->btsoc_type = data->soc_type; | |
fa9ad876 BG |
1443 | qcadev->bt_power = devm_kzalloc(&serdev->dev, |
1444 | sizeof(struct qca_power), | |
1445 | GFP_KERNEL); | |
1446 | if (!qcadev->bt_power) | |
1447 | return -ENOMEM; | |
1448 | ||
1449 | qcadev->bt_power->dev = &serdev->dev; | |
1450 | qcadev->bt_power->vreg_data = data; | |
1451 | err = qca_init_regulators(qcadev->bt_power, data->vregs, | |
1452 | data->num_vregs); | |
1453 | if (err) { | |
1454 | BT_ERR("Failed to init regulators:%d", err); | |
1455 | goto out; | |
1456 | } | |
05ba533c | 1457 | |
fa9ad876 | 1458 | qcadev->bt_power->vregs_on = false; |
05ba533c | 1459 | |
fa9ad876 BG |
1460 | device_property_read_u32(&serdev->dev, "max-speed", |
1461 | &qcadev->oper_speed); | |
1462 | if (!qcadev->oper_speed) | |
1463 | BT_DBG("UART will pick default operating speed"); | |
05ba533c | 1464 | |
fa9ad876 BG |
1465 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); |
1466 | if (err) { | |
1467 | BT_ERR("wcn3990 serdev registration failed"); | |
1468 | goto out; | |
1469 | } | |
1470 | } else { | |
1471 | qcadev->btsoc_type = QCA_ROME; | |
1472 | qcadev->bt_en = devm_gpiod_get(&serdev->dev, "enable", | |
1473 | GPIOD_OUT_LOW); | |
1474 | if (IS_ERR(qcadev->bt_en)) { | |
1475 | dev_err(&serdev->dev, "failed to acquire enable gpio\n"); | |
1476 | return PTR_ERR(qcadev->bt_en); | |
1477 | } | |
05ba533c | 1478 | |
fa9ad876 BG |
1479 | qcadev->susclk = devm_clk_get(&serdev->dev, NULL); |
1480 | if (IS_ERR(qcadev->susclk)) { | |
1481 | dev_err(&serdev->dev, "failed to acquire clk\n"); | |
1482 | return PTR_ERR(qcadev->susclk); | |
1483 | } | |
05ba533c | 1484 | |
fa9ad876 BG |
1485 | err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); |
1486 | if (err) | |
1487 | return err; | |
1488 | ||
1489 | err = clk_prepare_enable(qcadev->susclk); | |
1490 | if (err) | |
1491 | return err; | |
1492 | ||
1493 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); | |
1494 | if (err) | |
1495 | clk_disable_unprepare(qcadev->susclk); | |
1496 | } | |
1497 | ||
1498 | out: return err; | |
05ba533c | 1499 | |
05ba533c TE |
1500 | } |
1501 | ||
1502 | static void qca_serdev_remove(struct serdev_device *serdev) | |
1503 | { | |
1504 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); | |
1505 | ||
523760b7 | 1506 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
c2d78273 | 1507 | qca_power_shutdown(&qcadev->serdev_hu); |
fa9ad876 BG |
1508 | else |
1509 | clk_disable_unprepare(qcadev->susclk); | |
05ba533c | 1510 | |
fa9ad876 | 1511 | hci_uart_unregister_device(&qcadev->serdev_hu); |
05ba533c TE |
1512 | } |
1513 | ||
1514 | static const struct of_device_id qca_bluetooth_of_match[] = { | |
1515 | { .compatible = "qcom,qca6174-bt" }, | |
523760b7 HB |
1516 | { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, |
1517 | { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, | |
05ba533c TE |
1518 | { /* sentinel */ } |
1519 | }; | |
1520 | MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); | |
1521 | ||
1522 | static struct serdev_device_driver qca_serdev_driver = { | |
1523 | .probe = qca_serdev_probe, | |
1524 | .remove = qca_serdev_remove, | |
1525 | .driver = { | |
1526 | .name = "hci_uart_qca", | |
1527 | .of_match_table = qca_bluetooth_of_match, | |
1528 | }, | |
1529 | }; | |
1530 | ||
0ff252c1 BYTK |
1531 | int __init qca_init(void) |
1532 | { | |
05ba533c TE |
1533 | serdev_device_driver_register(&qca_serdev_driver); |
1534 | ||
0ff252c1 BYTK |
1535 | return hci_uart_register_proto(&qca_proto); |
1536 | } | |
1537 | ||
1538 | int __exit qca_deinit(void) | |
1539 | { | |
05ba533c TE |
1540 | serdev_device_driver_unregister(&qca_serdev_driver); |
1541 | ||
0ff252c1 BYTK |
1542 | return hci_uart_unregister_proto(&qca_proto); |
1543 | } |