Bluetooth: hci_bcm: Fix empty regulator supplies for Intel Macs
[linux-2.6-block.git] / drivers / bluetooth / hci_qca.c
CommitLineData
0ff252c1
BYTK
1/*
2 * Bluetooth Software UART Qualcomm protocol
3 *
4 * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management
5 * protocol extension to H4.
6 *
7 * Copyright (C) 2007 Texas Instruments, Inc.
fa9ad876 8 * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved.
0ff252c1
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9 *
10 * Acknowledgements:
11 * This file is based on hci_ll.c, which was...
12 * Written by Ohad Ben-Cohen <ohad@bencohen.org>
13 * which was in turn based on hci_h4.c, which was written
14 * by Maxim Krasnyansky and Marcel Holtmann.
15 *
16 * This program is free software; you can redistribute it and/or modify
17 * it under the terms of the GNU General Public License version 2
18 * as published by the Free Software Foundation
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
24 *
25 * You should have received a copy of the GNU General Public License
26 * along with this program; if not, write to the Free Software
27 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
28 *
29 */
30
31#include <linux/kernel.h>
05ba533c 32#include <linux/clk.h>
0ff252c1 33#include <linux/debugfs.h>
fa9ad876
BG
34#include <linux/delay.h>
35#include <linux/device.h>
05ba533c
TE
36#include <linux/gpio/consumer.h>
37#include <linux/mod_devicetable.h>
38#include <linux/module.h>
fa9ad876
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39#include <linux/of_device.h>
40#include <linux/platform_device.h>
41#include <linux/regulator/consumer.h>
05ba533c 42#include <linux/serdev.h>
c614ca3f 43#include <asm/unaligned.h>
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44
45#include <net/bluetooth/bluetooth.h>
46#include <net/bluetooth/hci_core.h>
47
48#include "hci_uart.h"
49#include "btqca.h"
50
51/* HCI_IBS protocol messages */
52#define HCI_IBS_SLEEP_IND 0xFE
53#define HCI_IBS_WAKE_IND 0xFD
54#define HCI_IBS_WAKE_ACK 0xFC
f81b001a 55#define HCI_MAX_IBS_SIZE 10
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56
57/* Controller states */
58#define STATE_IN_BAND_SLEEP_ENABLED 1
59
f81b001a
MH
60#define IBS_WAKE_RETRANS_TIMEOUT_MS 100
61#define IBS_TX_IDLE_TIMEOUT_MS 2000
94d66714 62#define CMD_TRANS_TIMEOUT_MS 100
0ff252c1 63
05ba533c
TE
64/* susclk rate */
65#define SUSCLK_RATE_32KHZ 32768
66
c614ca3f
BG
67/* Controller debug log header */
68#define QCA_DEBUG_HANDLE 0x2EDC
69
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70/* HCI_IBS transmit side sleep protocol states */
71enum tx_ibs_states {
72 HCI_IBS_TX_ASLEEP,
73 HCI_IBS_TX_WAKING,
74 HCI_IBS_TX_AWAKE,
75};
76
77/* HCI_IBS receive side sleep protocol states */
78enum rx_states {
79 HCI_IBS_RX_ASLEEP,
80 HCI_IBS_RX_AWAKE,
81};
82
83/* HCI_IBS transmit and receive side clock state vote */
84enum hci_ibs_clock_state_vote {
85 HCI_IBS_VOTE_STATS_UPDATE,
86 HCI_IBS_TX_VOTE_CLOCK_ON,
87 HCI_IBS_TX_VOTE_CLOCK_OFF,
88 HCI_IBS_RX_VOTE_CLOCK_ON,
89 HCI_IBS_RX_VOTE_CLOCK_OFF,
90};
91
92struct qca_data {
93 struct hci_uart *hu;
94 struct sk_buff *rx_skb;
95 struct sk_buff_head txq;
96 struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */
97 spinlock_t hci_ibs_lock; /* HCI_IBS state lock */
98 u8 tx_ibs_state; /* HCI_IBS transmit side power state*/
99 u8 rx_ibs_state; /* HCI_IBS receive side power state */
621a5f7a
VK
100 bool tx_vote; /* Clock must be on for TX */
101 bool rx_vote; /* Clock must be on for RX */
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102 struct timer_list tx_idle_timer;
103 u32 tx_idle_delay;
104 struct timer_list wake_retrans_timer;
105 u32 wake_retrans;
106 struct workqueue_struct *workqueue;
107 struct work_struct ws_awake_rx;
108 struct work_struct ws_awake_device;
109 struct work_struct ws_rx_vote_off;
110 struct work_struct ws_tx_vote_off;
111 unsigned long flags;
112
113 /* For debugging purpose */
114 u64 ibs_sent_wacks;
115 u64 ibs_sent_slps;
116 u64 ibs_sent_wakes;
117 u64 ibs_recv_wacks;
118 u64 ibs_recv_slps;
119 u64 ibs_recv_wakes;
120 u64 vote_last_jif;
121 u32 vote_on_ms;
122 u32 vote_off_ms;
123 u64 tx_votes_on;
124 u64 rx_votes_on;
125 u64 tx_votes_off;
126 u64 rx_votes_off;
127 u64 votes_on;
128 u64 votes_off;
129};
130
83d9c5e5
BG
131enum qca_speed_type {
132 QCA_INIT_SPEED = 1,
133 QCA_OPER_SPEED
134};
135
fa9ad876
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136/*
137 * Voltage regulator information required for configuring the
138 * QCA Bluetooth chipset
139 */
140struct qca_vreg {
141 const char *name;
142 unsigned int min_uV;
143 unsigned int max_uV;
144 unsigned int load_uA;
145};
146
147struct qca_vreg_data {
148 enum qca_btsoc_type soc_type;
149 struct qca_vreg *vregs;
150 size_t num_vregs;
151};
152
153/*
154 * Platform data for the QCA Bluetooth power driver.
155 */
156struct qca_power {
157 struct device *dev;
158 const struct qca_vreg_data *vreg_data;
159 struct regulator_bulk_data *vreg_bulk;
160 bool vregs_on;
161};
162
05ba533c
TE
163struct qca_serdev {
164 struct hci_uart serdev_hu;
165 struct gpio_desc *bt_en;
166 struct clk *susclk;
fa9ad876
BG
167 enum qca_btsoc_type btsoc_type;
168 struct qca_power *bt_power;
169 u32 init_speed;
170 u32 oper_speed;
05ba533c
TE
171};
172
fa9ad876 173static int qca_power_setup(struct hci_uart *hu, bool on);
c2d78273 174static void qca_power_shutdown(struct hci_uart *hu);
3e4be65e 175static int qca_power_off(struct hci_dev *hdev);
fa9ad876 176
4fdd5a4f
MK
177static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu)
178{
179 enum qca_btsoc_type soc_type;
180
181 if (hu->serdev) {
182 struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev);
183
184 soc_type = qsd->btsoc_type;
185 } else {
186 soc_type = QCA_ROME;
187 }
188
189 return soc_type;
190}
191
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192static void __serial_clock_on(struct tty_struct *tty)
193{
194 /* TODO: Some chipset requires to enable UART clock on client
195 * side to save power consumption or manual work is required.
196 * Please put your code to control UART clock here if needed
197 */
198}
199
200static void __serial_clock_off(struct tty_struct *tty)
201{
202 /* TODO: Some chipset requires to disable UART clock on client
203 * side to save power consumption or manual work is required.
204 * Please put your code to control UART clock off here if needed
205 */
206}
207
208/* serial_clock_vote needs to be called with the ibs lock held */
209static void serial_clock_vote(unsigned long vote, struct hci_uart *hu)
210{
211 struct qca_data *qca = hu->priv;
212 unsigned int diff;
213
214 bool old_vote = (qca->tx_vote | qca->rx_vote);
215 bool new_vote;
216
217 switch (vote) {
218 case HCI_IBS_VOTE_STATS_UPDATE:
219 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
220
221 if (old_vote)
222 qca->vote_off_ms += diff;
223 else
224 qca->vote_on_ms += diff;
225 return;
226
227 case HCI_IBS_TX_VOTE_CLOCK_ON:
228 qca->tx_vote = true;
229 qca->tx_votes_on++;
230 new_vote = true;
231 break;
232
233 case HCI_IBS_RX_VOTE_CLOCK_ON:
234 qca->rx_vote = true;
235 qca->rx_votes_on++;
236 new_vote = true;
237 break;
238
239 case HCI_IBS_TX_VOTE_CLOCK_OFF:
240 qca->tx_vote = false;
241 qca->tx_votes_off++;
242 new_vote = qca->rx_vote | qca->tx_vote;
243 break;
244
245 case HCI_IBS_RX_VOTE_CLOCK_OFF:
246 qca->rx_vote = false;
247 qca->rx_votes_off++;
248 new_vote = qca->rx_vote | qca->tx_vote;
249 break;
250
251 default:
252 BT_ERR("Voting irregularity");
253 return;
254 }
255
256 if (new_vote != old_vote) {
257 if (new_vote)
258 __serial_clock_on(hu->tty);
259 else
260 __serial_clock_off(hu->tty);
261
ce26d813
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262 BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false",
263 vote ? "true" : "false");
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264
265 diff = jiffies_to_msecs(jiffies - qca->vote_last_jif);
266
267 if (new_vote) {
268 qca->votes_on++;
269 qca->vote_off_ms += diff;
270 } else {
271 qca->votes_off++;
272 qca->vote_on_ms += diff;
273 }
274 qca->vote_last_jif = jiffies;
275 }
276}
277
278/* Builds and sends an HCI_IBS command packet.
279 * These are very simple packets with only 1 cmd byte.
280 */
281static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu)
282{
283 int err = 0;
284 struct sk_buff *skb = NULL;
285 struct qca_data *qca = hu->priv;
286
287 BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd);
288
289 skb = bt_skb_alloc(1, GFP_ATOMIC);
290 if (!skb) {
291 BT_ERR("Failed to allocate memory for HCI_IBS packet");
292 return -ENOMEM;
293 }
294
295 /* Assign HCI_IBS type */
634fef61 296 skb_put_u8(skb, cmd);
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297
298 skb_queue_tail(&qca->txq, skb);
299
300 return err;
301}
302
303static void qca_wq_awake_device(struct work_struct *work)
304{
305 struct qca_data *qca = container_of(work, struct qca_data,
306 ws_awake_device);
307 struct hci_uart *hu = qca->hu;
308 unsigned long retrans_delay;
309
310 BT_DBG("hu %p wq awake device", hu);
311
312 /* Vote for serial clock */
313 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu);
314
315 spin_lock(&qca->hci_ibs_lock);
316
317 /* Send wake indication to device */
318 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0)
319 BT_ERR("Failed to send WAKE to device");
320
321 qca->ibs_sent_wakes++;
322
323 /* Start retransmit timer */
324 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
325 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
326
327 spin_unlock(&qca->hci_ibs_lock);
328
329 /* Actually send the packets */
330 hci_uart_tx_wakeup(hu);
331}
332
333static void qca_wq_awake_rx(struct work_struct *work)
334{
335 struct qca_data *qca = container_of(work, struct qca_data,
336 ws_awake_rx);
337 struct hci_uart *hu = qca->hu;
338
339 BT_DBG("hu %p wq awake rx", hu);
340
341 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu);
342
343 spin_lock(&qca->hci_ibs_lock);
344 qca->rx_ibs_state = HCI_IBS_RX_AWAKE;
345
346 /* Always acknowledge device wake up,
347 * sending IBS message doesn't count as TX ON.
348 */
349 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0)
350 BT_ERR("Failed to acknowledge device wake up");
351
352 qca->ibs_sent_wacks++;
353
354 spin_unlock(&qca->hci_ibs_lock);
355
356 /* Actually send the packets */
357 hci_uart_tx_wakeup(hu);
358}
359
360static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work)
361{
362 struct qca_data *qca = container_of(work, struct qca_data,
363 ws_rx_vote_off);
364 struct hci_uart *hu = qca->hu;
365
366 BT_DBG("hu %p rx clock vote off", hu);
367
368 serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu);
369}
370
371static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work)
372{
373 struct qca_data *qca = container_of(work, struct qca_data,
374 ws_tx_vote_off);
375 struct hci_uart *hu = qca->hu;
376
377 BT_DBG("hu %p tx clock vote off", hu);
378
379 /* Run HCI tx handling unlocked */
380 hci_uart_tx_wakeup(hu);
381
382 /* Now that message queued to tty driver, vote for tty clocks off.
383 * It is up to the tty driver to pend the clocks off until tx done.
384 */
385 serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu);
386}
387
04356052 388static void hci_ibs_tx_idle_timeout(struct timer_list *t)
0ff252c1 389{
04356052
KC
390 struct qca_data *qca = from_timer(qca, t, tx_idle_timer);
391 struct hci_uart *hu = qca->hu;
0ff252c1
BYTK
392 unsigned long flags;
393
394 BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state);
395
396 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
397 flags, SINGLE_DEPTH_NESTING);
398
399 switch (qca->tx_ibs_state) {
400 case HCI_IBS_TX_AWAKE:
401 /* TX_IDLE, go to SLEEP */
402 if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) {
403 BT_ERR("Failed to send SLEEP to device");
404 break;
405 }
406 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
407 qca->ibs_sent_slps++;
408 queue_work(qca->workqueue, &qca->ws_tx_vote_off);
409 break;
410
411 case HCI_IBS_TX_ASLEEP:
412 case HCI_IBS_TX_WAKING:
413 /* Fall through */
414
415 default:
e059a465 416 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
0ff252c1
BYTK
417 break;
418 }
419
420 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
421}
422
04356052 423static void hci_ibs_wake_retrans_timeout(struct timer_list *t)
0ff252c1 424{
04356052
KC
425 struct qca_data *qca = from_timer(qca, t, wake_retrans_timer);
426 struct hci_uart *hu = qca->hu;
0ff252c1 427 unsigned long flags, retrans_delay;
a9137188 428 bool retransmit = false;
0ff252c1
BYTK
429
430 BT_DBG("hu %p wake retransmit timeout in %d state",
431 hu, qca->tx_ibs_state);
432
433 spin_lock_irqsave_nested(&qca->hci_ibs_lock,
434 flags, SINGLE_DEPTH_NESTING);
435
436 switch (qca->tx_ibs_state) {
437 case HCI_IBS_TX_WAKING:
438 /* No WAKE_ACK, retransmit WAKE */
a9137188 439 retransmit = true;
0ff252c1
BYTK
440 if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) {
441 BT_ERR("Failed to acknowledge device wake up");
442 break;
443 }
444 qca->ibs_sent_wakes++;
445 retrans_delay = msecs_to_jiffies(qca->wake_retrans);
446 mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay);
447 break;
448
449 case HCI_IBS_TX_ASLEEP:
450 case HCI_IBS_TX_AWAKE:
451 /* Fall through */
452
453 default:
e059a465 454 BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state);
0ff252c1
BYTK
455 break;
456 }
457
458 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
459
460 if (retransmit)
461 hci_uart_tx_wakeup(hu);
462}
463
464/* Initialize protocol */
465static int qca_open(struct hci_uart *hu)
466{
05ba533c 467 struct qca_serdev *qcadev;
0ff252c1 468 struct qca_data *qca;
fa9ad876 469 int ret;
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BYTK
470
471 BT_DBG("hu %p qca_open", hu);
472
25a13e38 473 qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL);
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BYTK
474 if (!qca)
475 return -ENOMEM;
476
477 skb_queue_head_init(&qca->txq);
478 skb_queue_head_init(&qca->tx_wait_q);
479 spin_lock_init(&qca->hci_ibs_lock);
fac9a602 480 qca->workqueue = alloc_ordered_workqueue("qca_wq", 0);
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BYTK
481 if (!qca->workqueue) {
482 BT_ERR("QCA Workqueue not initialized properly");
483 kfree(qca);
484 return -ENOMEM;
485 }
486
487 INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx);
488 INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device);
489 INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off);
490 INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off);
491
492 qca->hu = hu;
493
494 /* Assume we start with both sides asleep -- extra wakes OK */
495 qca->tx_ibs_state = HCI_IBS_TX_ASLEEP;
496 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
497
498 /* clocks actually on, but we start votes off */
499 qca->tx_vote = false;
500 qca->rx_vote = false;
501 qca->flags = 0;
502
503 qca->ibs_sent_wacks = 0;
504 qca->ibs_sent_slps = 0;
505 qca->ibs_sent_wakes = 0;
506 qca->ibs_recv_wacks = 0;
507 qca->ibs_recv_slps = 0;
508 qca->ibs_recv_wakes = 0;
509 qca->vote_last_jif = jiffies;
510 qca->vote_on_ms = 0;
511 qca->vote_off_ms = 0;
512 qca->votes_on = 0;
513 qca->votes_off = 0;
514 qca->tx_votes_on = 0;
515 qca->tx_votes_off = 0;
516 qca->rx_votes_on = 0;
517 qca->rx_votes_off = 0;
518
519 hu->priv = qca;
520
05ba533c 521 if (hu->serdev) {
05ba533c
TE
522
523 qcadev = serdev_device_get_drvdata(hu->serdev);
fa9ad876
BG
524 if (qcadev->btsoc_type != QCA_WCN3990) {
525 gpiod_set_value_cansleep(qcadev->bt_en, 1);
526 } else {
527 hu->init_speed = qcadev->init_speed;
528 hu->oper_speed = qcadev->oper_speed;
529 ret = qca_power_setup(hu, true);
530 if (ret) {
531 destroy_workqueue(qca->workqueue);
532 kfree_skb(qca->rx_skb);
533 hu->priv = NULL;
534 kfree(qca);
535 return ret;
536 }
537 }
05ba533c
TE
538 }
539
fa9ad876
BG
540 timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0);
541 qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS;
542
543 timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0);
544 qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS;
545
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546 BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u",
547 qca->tx_idle_delay, qca->wake_retrans);
548
549 return 0;
550}
551
552static void qca_debugfs_init(struct hci_dev *hdev)
553{
554 struct hci_uart *hu = hci_get_drvdata(hdev);
555 struct qca_data *qca = hu->priv;
556 struct dentry *ibs_dir;
557 umode_t mode;
558
559 if (!hdev->debugfs)
560 return;
561
562 ibs_dir = debugfs_create_dir("ibs", hdev->debugfs);
563
564 /* read only */
565 mode = S_IRUGO;
566 debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state);
567 debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state);
568 debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir,
569 &qca->ibs_sent_slps);
570 debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir,
571 &qca->ibs_sent_wakes);
572 debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir,
573 &qca->ibs_sent_wacks);
574 debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir,
575 &qca->ibs_recv_slps);
576 debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir,
577 &qca->ibs_recv_wakes);
578 debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir,
579 &qca->ibs_recv_wacks);
10be6c0f 580 debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote);
0ff252c1
BYTK
581 debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on);
582 debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off);
10be6c0f 583 debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote);
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BYTK
584 debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on);
585 debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off);
586 debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on);
587 debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off);
588 debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms);
589 debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms);
590
591 /* read/write */
592 mode = S_IRUGO | S_IWUSR;
593 debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans);
594 debugfs_create_u32("tx_idle_delay", mode, ibs_dir,
595 &qca->tx_idle_delay);
596}
597
598/* Flush protocol data */
599static int qca_flush(struct hci_uart *hu)
600{
601 struct qca_data *qca = hu->priv;
602
603 BT_DBG("hu %p qca flush", hu);
604
605 skb_queue_purge(&qca->tx_wait_q);
606 skb_queue_purge(&qca->txq);
607
608 return 0;
609}
610
611/* Close protocol */
612static int qca_close(struct hci_uart *hu)
613{
05ba533c 614 struct qca_serdev *qcadev;
0ff252c1
BYTK
615 struct qca_data *qca = hu->priv;
616
617 BT_DBG("hu %p qca close", hu);
618
619 serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu);
620
621 skb_queue_purge(&qca->tx_wait_q);
622 skb_queue_purge(&qca->txq);
623 del_timer(&qca->tx_idle_timer);
624 del_timer(&qca->wake_retrans_timer);
625 destroy_workqueue(qca->workqueue);
626 qca->hu = NULL;
627
05ba533c 628 if (hu->serdev) {
05ba533c 629 qcadev = serdev_device_get_drvdata(hu->serdev);
fa9ad876 630 if (qcadev->btsoc_type == QCA_WCN3990)
c2d78273 631 qca_power_shutdown(hu);
fa9ad876
BG
632 else
633 gpiod_set_value_cansleep(qcadev->bt_en, 0);
634
05ba533c
TE
635 }
636
0ff252c1
BYTK
637 kfree_skb(qca->rx_skb);
638
639 hu->priv = NULL;
640
641 kfree(qca);
642
643 return 0;
644}
645
646/* Called upon a wake-up-indication from the device.
647 */
648static void device_want_to_wakeup(struct hci_uart *hu)
649{
650 unsigned long flags;
651 struct qca_data *qca = hu->priv;
652
653 BT_DBG("hu %p want to wake up", hu);
654
655 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
656
657 qca->ibs_recv_wakes++;
658
659 switch (qca->rx_ibs_state) {
660 case HCI_IBS_RX_ASLEEP:
661 /* Make sure clock is on - we may have turned clock off since
662 * receiving the wake up indicator awake rx clock.
663 */
664 queue_work(qca->workqueue, &qca->ws_awake_rx);
665 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
666 return;
667
668 case HCI_IBS_RX_AWAKE:
669 /* Always acknowledge device wake up,
670 * sending IBS message doesn't count as TX ON.
671 */
672 if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) {
673 BT_ERR("Failed to acknowledge device wake up");
674 break;
675 }
676 qca->ibs_sent_wacks++;
677 break;
678
679 default:
680 /* Any other state is illegal */
681 BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d",
682 qca->rx_ibs_state);
683 break;
684 }
685
686 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
687
688 /* Actually send the packets */
689 hci_uart_tx_wakeup(hu);
690}
691
692/* Called upon a sleep-indication from the device.
693 */
694static void device_want_to_sleep(struct hci_uart *hu)
695{
696 unsigned long flags;
697 struct qca_data *qca = hu->priv;
698
699 BT_DBG("hu %p want to sleep", hu);
700
701 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
702
703 qca->ibs_recv_slps++;
704
705 switch (qca->rx_ibs_state) {
706 case HCI_IBS_RX_AWAKE:
707 /* Update state */
708 qca->rx_ibs_state = HCI_IBS_RX_ASLEEP;
709 /* Vote off rx clock under workqueue */
710 queue_work(qca->workqueue, &qca->ws_rx_vote_off);
711 break;
712
713 case HCI_IBS_RX_ASLEEP:
714 /* Fall through */
715
716 default:
717 /* Any other state is illegal */
718 BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d",
719 qca->rx_ibs_state);
720 break;
721 }
722
723 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
724}
725
726/* Called upon wake-up-acknowledgement from the device
727 */
728static void device_woke_up(struct hci_uart *hu)
729{
730 unsigned long flags, idle_delay;
731 struct qca_data *qca = hu->priv;
732 struct sk_buff *skb = NULL;
733
734 BT_DBG("hu %p woke up", hu);
735
736 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
737
738 qca->ibs_recv_wacks++;
739
740 switch (qca->tx_ibs_state) {
741 case HCI_IBS_TX_AWAKE:
742 /* Expect one if we send 2 WAKEs */
743 BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d",
744 qca->tx_ibs_state);
745 break;
746
747 case HCI_IBS_TX_WAKING:
748 /* Send pending packets */
749 while ((skb = skb_dequeue(&qca->tx_wait_q)))
750 skb_queue_tail(&qca->txq, skb);
751
752 /* Switch timers and change state to HCI_IBS_TX_AWAKE */
753 del_timer(&qca->wake_retrans_timer);
754 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
755 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
756 qca->tx_ibs_state = HCI_IBS_TX_AWAKE;
757 break;
758
759 case HCI_IBS_TX_ASLEEP:
760 /* Fall through */
761
762 default:
763 BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d",
764 qca->tx_ibs_state);
765 break;
766 }
767
768 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
769
770 /* Actually send the packets */
771 hci_uart_tx_wakeup(hu);
772}
773
774/* Enqueue frame for transmittion (padding, crc, etc) may be called from
775 * two simultaneous tasklets.
776 */
777static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb)
778{
779 unsigned long flags = 0, idle_delay;
780 struct qca_data *qca = hu->priv;
781
782 BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb,
783 qca->tx_ibs_state);
784
785 /* Prepend skb with frame type */
618e8bc2 786 memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1);
0ff252c1 787
035a960e
BG
788 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
789
0ff252c1
BYTK
790 /* Don't go to sleep in middle of patch download or
791 * Out-Of-Band(GPIOs control) sleep is selected.
792 */
793 if (!test_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags)) {
794 skb_queue_tail(&qca->txq, skb);
035a960e 795 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
0ff252c1
BYTK
796 return 0;
797 }
798
0ff252c1
BYTK
799 /* Act according to current state */
800 switch (qca->tx_ibs_state) {
801 case HCI_IBS_TX_AWAKE:
802 BT_DBG("Device awake, sending normally");
803 skb_queue_tail(&qca->txq, skb);
804 idle_delay = msecs_to_jiffies(qca->tx_idle_delay);
805 mod_timer(&qca->tx_idle_timer, jiffies + idle_delay);
806 break;
807
808 case HCI_IBS_TX_ASLEEP:
809 BT_DBG("Device asleep, waking up and queueing packet");
810 /* Save packet for later */
811 skb_queue_tail(&qca->tx_wait_q, skb);
812
813 qca->tx_ibs_state = HCI_IBS_TX_WAKING;
814 /* Schedule a work queue to wake up device */
815 queue_work(qca->workqueue, &qca->ws_awake_device);
816 break;
817
818 case HCI_IBS_TX_WAKING:
819 BT_DBG("Device waking up, queueing packet");
820 /* Transient state; just keep packet for later */
821 skb_queue_tail(&qca->tx_wait_q, skb);
822 break;
823
824 default:
825 BT_ERR("Illegal tx state: %d (losing packet)",
826 qca->tx_ibs_state);
827 kfree_skb(skb);
828 break;
829 }
830
831 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
832
833 return 0;
834}
835
836static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb)
837{
838 struct hci_uart *hu = hci_get_drvdata(hdev);
839
840 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND);
841
842 device_want_to_sleep(hu);
843
844 kfree_skb(skb);
845 return 0;
846}
847
848static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb)
849{
850 struct hci_uart *hu = hci_get_drvdata(hdev);
851
852 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND);
853
854 device_want_to_wakeup(hu);
855
856 kfree_skb(skb);
857 return 0;
858}
859
860static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb)
861{
862 struct hci_uart *hu = hci_get_drvdata(hdev);
863
864 BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK);
865
866 device_woke_up(hu);
867
868 kfree_skb(skb);
869 return 0;
870}
871
c614ca3f
BG
872static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb)
873{
874 /* We receive debug logs from chip as an ACL packets.
875 * Instead of sending the data to ACL to decode the
876 * received data, we are pushing them to the above layers
877 * as a diagnostic packet.
878 */
879 if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE)
880 return hci_recv_diag(hdev, skb);
881
882 return hci_recv_frame(hdev, skb);
883}
884
0ff252c1
BYTK
885#define QCA_IBS_SLEEP_IND_EVENT \
886 .type = HCI_IBS_SLEEP_IND, \
887 .hlen = 0, \
888 .loff = 0, \
889 .lsize = 0, \
890 .maxlen = HCI_MAX_IBS_SIZE
891
892#define QCA_IBS_WAKE_IND_EVENT \
893 .type = HCI_IBS_WAKE_IND, \
894 .hlen = 0, \
895 .loff = 0, \
896 .lsize = 0, \
897 .maxlen = HCI_MAX_IBS_SIZE
898
899#define QCA_IBS_WAKE_ACK_EVENT \
900 .type = HCI_IBS_WAKE_ACK, \
901 .hlen = 0, \
902 .loff = 0, \
903 .lsize = 0, \
904 .maxlen = HCI_MAX_IBS_SIZE
905
906static const struct h4_recv_pkt qca_recv_pkts[] = {
c614ca3f 907 { H4_RECV_ACL, .recv = qca_recv_acl_data },
0ff252c1
BYTK
908 { H4_RECV_SCO, .recv = hci_recv_frame },
909 { H4_RECV_EVENT, .recv = hci_recv_frame },
910 { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind },
911 { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack },
912 { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind },
913};
914
915static int qca_recv(struct hci_uart *hu, const void *data, int count)
916{
917 struct qca_data *qca = hu->priv;
918
919 if (!test_bit(HCI_UART_REGISTERED, &hu->flags))
920 return -EUNATCH;
921
922 qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count,
923 qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts));
924 if (IS_ERR(qca->rx_skb)) {
925 int err = PTR_ERR(qca->rx_skb);
2064ee33 926 bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err);
0ff252c1
BYTK
927 qca->rx_skb = NULL;
928 return err;
929 }
930
931 return count;
932}
933
934static struct sk_buff *qca_dequeue(struct hci_uart *hu)
935{
936 struct qca_data *qca = hu->priv;
937
938 return skb_dequeue(&qca->txq);
939}
940
941static uint8_t qca_get_baudrate_value(int speed)
942{
ce26d813 943 switch (speed) {
0ff252c1
BYTK
944 case 9600:
945 return QCA_BAUDRATE_9600;
946 case 19200:
947 return QCA_BAUDRATE_19200;
948 case 38400:
949 return QCA_BAUDRATE_38400;
950 case 57600:
951 return QCA_BAUDRATE_57600;
952 case 115200:
953 return QCA_BAUDRATE_115200;
954 case 230400:
955 return QCA_BAUDRATE_230400;
956 case 460800:
957 return QCA_BAUDRATE_460800;
958 case 500000:
959 return QCA_BAUDRATE_500000;
960 case 921600:
961 return QCA_BAUDRATE_921600;
962 case 1000000:
963 return QCA_BAUDRATE_1000000;
964 case 2000000:
965 return QCA_BAUDRATE_2000000;
966 case 3000000:
967 return QCA_BAUDRATE_3000000;
be93a497
BG
968 case 3200000:
969 return QCA_BAUDRATE_3200000;
0ff252c1
BYTK
970 case 3500000:
971 return QCA_BAUDRATE_3500000;
972 default:
973 return QCA_BAUDRATE_115200;
974 }
975}
976
977static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate)
978{
979 struct hci_uart *hu = hci_get_drvdata(hdev);
980 struct qca_data *qca = hu->priv;
981 struct sk_buff *skb;
982 u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 };
983
be93a497 984 if (baudrate > QCA_BAUDRATE_3200000)
0ff252c1
BYTK
985 return -EINVAL;
986
987 cmd[4] = baudrate;
988
25a13e38 989 skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL);
0ff252c1 990 if (!skb) {
2064ee33 991 bt_dev_err(hdev, "Failed to allocate baudrate packet");
0ff252c1
BYTK
992 return -ENOMEM;
993 }
994
995 /* Assign commands to change baudrate and packet type. */
59ae1d12 996 skb_put_data(skb, cmd, sizeof(cmd));
618e8bc2 997 hci_skb_pkt_type(skb) = HCI_COMMAND_PKT;
0ff252c1
BYTK
998
999 skb_queue_tail(&qca->txq, skb);
1000 hci_uart_tx_wakeup(hu);
1001
94d66714
MK
1002 /* Wait for the baudrate change request to be sent */
1003
1004 while (!skb_queue_empty(&qca->txq))
1005 usleep_range(100, 200);
1006
1007 serdev_device_wait_until_sent(hu->serdev,
1008 msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS));
1009
1010 /* Give the controller time to process the request */
4fdd5a4f 1011 if (qca_soc_type(hu) == QCA_WCN3990)
94d66714
MK
1012 msleep(10);
1013 else
1014 msleep(300);
0ff252c1
BYTK
1015
1016 return 0;
1017}
1018
05ba533c
TE
1019static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed)
1020{
1021 if (hu->serdev)
1022 serdev_device_set_baudrate(hu->serdev, speed);
1023 else
1024 hci_uart_set_baudrate(hu, speed);
1025}
1026
9836b802 1027static int qca_send_power_pulse(struct hci_uart *hu, bool on)
fa9ad876 1028{
f9558270 1029 int ret;
94d66714 1030 int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS);
9836b802 1031 u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE;
fa9ad876
BG
1032
1033 /* These power pulses are single byte command which are sent
1034 * at required baudrate to wcn3990. On wcn3990, we have an external
1035 * circuit at Tx pin which decodes the pulse sent at specific baudrate.
1036 * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT
1037 * and also we use the same power inputs to turn on and off for
1038 * Wi-Fi/BT. Powering up the power sources will not enable BT, until
1039 * we send a power on pulse at 115200 bps. This algorithm will help to
1040 * save power. Disabling hardware flow control is mandatory while
1041 * sending power pulses to SoC.
1042 */
f9558270 1043 bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd);
fa9ad876 1044
f9558270 1045 serdev_device_write_flush(hu->serdev);
fa9ad876 1046 hci_uart_set_flow_control(hu, true);
f9558270
BG
1047 ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd));
1048 if (ret < 0) {
1049 bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd);
1050 return ret;
1051 }
fa9ad876 1052
f9558270 1053 serdev_device_wait_until_sent(hu->serdev, timeout);
fa9ad876
BG
1054 hci_uart_set_flow_control(hu, false);
1055
0ebcddd8 1056 /* Give to controller time to boot/shutdown */
ad571d72
MK
1057 if (on)
1058 msleep(100);
0ebcddd8
MK
1059 else
1060 msleep(10);
ad571d72 1061
fa9ad876
BG
1062 return 0;
1063}
1064
83d9c5e5
BG
1065static unsigned int qca_get_speed(struct hci_uart *hu,
1066 enum qca_speed_type speed_type)
1067{
1068 unsigned int speed = 0;
1069
1070 if (speed_type == QCA_INIT_SPEED) {
1071 if (hu->init_speed)
1072 speed = hu->init_speed;
1073 else if (hu->proto->init_speed)
1074 speed = hu->proto->init_speed;
1075 } else {
1076 if (hu->oper_speed)
1077 speed = hu->oper_speed;
1078 else if (hu->proto->oper_speed)
1079 speed = hu->proto->oper_speed;
1080 }
1081
1082 return speed;
1083}
1084
1085static int qca_check_speeds(struct hci_uart *hu)
1086{
4fdd5a4f 1087 if (qca_soc_type(hu) == QCA_WCN3990) {
fa9ad876
BG
1088 if (!qca_get_speed(hu, QCA_INIT_SPEED) &&
1089 !qca_get_speed(hu, QCA_OPER_SPEED))
1090 return -EINVAL;
1091 } else {
1092 if (!qca_get_speed(hu, QCA_INIT_SPEED) ||
1093 !qca_get_speed(hu, QCA_OPER_SPEED))
1094 return -EINVAL;
1095 }
83d9c5e5
BG
1096
1097 return 0;
1098}
1099
1100static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type)
1101{
1102 unsigned int speed, qca_baudrate;
78e8fa29 1103 int ret = 0;
83d9c5e5
BG
1104
1105 if (speed_type == QCA_INIT_SPEED) {
1106 speed = qca_get_speed(hu, QCA_INIT_SPEED);
1107 if (speed)
1108 host_set_baudrate(hu, speed);
1109 } else {
4fdd5a4f
MK
1110 enum qca_btsoc_type soc_type = qca_soc_type(hu);
1111
83d9c5e5
BG
1112 speed = qca_get_speed(hu, QCA_OPER_SPEED);
1113 if (!speed)
1114 return 0;
1115
78e8fa29
BG
1116 /* Disable flow control for wcn3990 to deassert RTS while
1117 * changing the baudrate of chip and host.
1118 */
4fdd5a4f 1119 if (soc_type == QCA_WCN3990)
78e8fa29
BG
1120 hci_uart_set_flow_control(hu, true);
1121
83d9c5e5 1122 qca_baudrate = qca_get_baudrate_value(speed);
fa9ad876 1123 bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed);
83d9c5e5
BG
1124 ret = qca_set_baudrate(hu->hdev, qca_baudrate);
1125 if (ret)
78e8fa29 1126 goto error;
83d9c5e5
BG
1127
1128 host_set_baudrate(hu, speed);
78e8fa29
BG
1129
1130error:
4fdd5a4f 1131 if (soc_type == QCA_WCN3990)
78e8fa29 1132 hci_uart_set_flow_control(hu, false);
83d9c5e5
BG
1133 }
1134
78e8fa29 1135 return ret;
83d9c5e5
BG
1136}
1137
fa9ad876
BG
1138static int qca_wcn3990_init(struct hci_uart *hu)
1139{
3e4be65e 1140 struct qca_serdev *qcadev;
fa9ad876
BG
1141 int ret;
1142
3e4be65e
BG
1143 /* Check for vregs status, may be hci down has turned
1144 * off the voltage regulator.
1145 */
1146 qcadev = serdev_device_get_drvdata(hu->serdev);
1147 if (!qcadev->bt_power->vregs_on) {
1148 serdev_device_close(hu->serdev);
1149 ret = qca_power_setup(hu, true);
1150 if (ret)
1151 return ret;
1152
1153 ret = serdev_device_open(hu->serdev);
1154 if (ret) {
1155 bt_dev_err(hu->hdev, "failed to open port");
1156 return ret;
1157 }
1158 }
1159
fa9ad876
BG
1160 /* Forcefully enable wcn3990 to enter in to boot mode. */
1161 host_set_baudrate(hu, 2400);
9836b802 1162 ret = qca_send_power_pulse(hu, false);
fa9ad876
BG
1163 if (ret)
1164 return ret;
1165
1166 qca_set_speed(hu, QCA_INIT_SPEED);
9836b802 1167 ret = qca_send_power_pulse(hu, true);
fa9ad876
BG
1168 if (ret)
1169 return ret;
1170
fa9ad876
BG
1171 /* Now the device is in ready state to communicate with host.
1172 * To sync host with device we need to reopen port.
1173 * Without this, we will have RTS and CTS synchronization
1174 * issues.
1175 */
1176 serdev_device_close(hu->serdev);
1177 ret = serdev_device_open(hu->serdev);
1178 if (ret) {
1179 bt_dev_err(hu->hdev, "failed to open port");
1180 return ret;
1181 }
1182
1183 hci_uart_set_flow_control(hu, false);
1184
1185 return 0;
1186}
1187
0ff252c1
BYTK
1188static int qca_setup(struct hci_uart *hu)
1189{
1190 struct hci_dev *hdev = hu->hdev;
1191 struct qca_data *qca = hu->priv;
1192 unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200;
4fdd5a4f 1193 enum qca_btsoc_type soc_type = qca_soc_type(hu);
0ff252c1 1194 int ret;
aadebac4 1195 int soc_ver = 0;
0ff252c1 1196
83d9c5e5
BG
1197 ret = qca_check_speeds(hu);
1198 if (ret)
1199 return ret;
1200
0ff252c1
BYTK
1201 /* Patch downloading has to be done without IBS mode */
1202 clear_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags);
1203
4fdd5a4f 1204 if (soc_type == QCA_WCN3990) {
fa9ad876 1205 bt_dev_info(hdev, "setting up wcn3990");
3e4be65e
BG
1206
1207 /* Enable NON_PERSISTENT_SETUP QUIRK to ensure to execute
1208 * setup for every hci up.
1209 */
1210 set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks);
5971752d 1211 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
3e4be65e 1212 hu->hdev->shutdown = qca_power_off;
fa9ad876
BG
1213 ret = qca_wcn3990_init(hu);
1214 if (ret)
1215 return ret;
1216
1217 ret = qca_read_soc_version(hdev, &soc_ver);
1218 if (ret)
1219 return ret;
1220 } else {
1221 bt_dev_info(hdev, "ROME setup");
1222 qca_set_speed(hu, QCA_INIT_SPEED);
1223 }
0ff252c1
BYTK
1224
1225 /* Setup user speed if needed */
83d9c5e5 1226 speed = qca_get_speed(hu, QCA_OPER_SPEED);
0ff252c1 1227 if (speed) {
83d9c5e5
BG
1228 ret = qca_set_speed(hu, QCA_OPER_SPEED);
1229 if (ret)
0ff252c1 1230 return ret;
83d9c5e5
BG
1231
1232 qca_baudrate = qca_get_baudrate_value(speed);
0ff252c1
BYTK
1233 }
1234
4fdd5a4f 1235 if (soc_type != QCA_WCN3990) {
fa9ad876
BG
1236 /* Get QCA version information */
1237 ret = qca_read_soc_version(hdev, &soc_ver);
1238 if (ret)
1239 return ret;
1240 }
aadebac4
BG
1241
1242 bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver);
0ff252c1 1243 /* Setup patch / NVM configurations */
4fdd5a4f 1244 ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver);
0ff252c1
BYTK
1245 if (!ret) {
1246 set_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags);
1247 qca_debugfs_init(hdev);
ba8f3597
LP
1248 } else if (ret == -ENOENT) {
1249 /* No patch/nvm-config found, run with original fw/config */
1250 ret = 0;
7dc5fe08
AP
1251 } else if (ret == -EAGAIN) {
1252 /*
1253 * Userspace firmware loader will return -EAGAIN in case no
1254 * patch/nvm-config is found, so run with original fw/config.
1255 */
1256 ret = 0;
0ff252c1
BYTK
1257 }
1258
1259 /* Setup bdaddr */
4fdd5a4f 1260 if (soc_type == QCA_WCN3990)
5c0a1001
BG
1261 hu->hdev->set_bdaddr = qca_set_bdaddr;
1262 else
1263 hu->hdev->set_bdaddr = qca_set_bdaddr_rome;
0ff252c1
BYTK
1264
1265 return ret;
1266}
1267
1268static struct hci_uart_proto qca_proto = {
1269 .id = HCI_UART_QCA,
1270 .name = "QCA",
aee61f7a 1271 .manufacturer = 29,
0ff252c1
BYTK
1272 .init_speed = 115200,
1273 .oper_speed = 3000000,
1274 .open = qca_open,
1275 .close = qca_close,
1276 .flush = qca_flush,
1277 .setup = qca_setup,
1278 .recv = qca_recv,
1279 .enqueue = qca_enqueue,
1280 .dequeue = qca_dequeue,
1281};
1282
fa9ad876
BG
1283static const struct qca_vreg_data qca_soc_data = {
1284 .soc_type = QCA_WCN3990,
1285 .vregs = (struct qca_vreg []) {
1286 { "vddio", 1800000, 1900000, 15000 },
1287 { "vddxo", 1800000, 1900000, 80000 },
1288 { "vddrf", 1300000, 1350000, 300000 },
1289 { "vddch0", 3300000, 3400000, 450000 },
1290 },
1291 .num_vregs = 4,
1292};
1293
c2d78273 1294static void qca_power_shutdown(struct hci_uart *hu)
fa9ad876 1295{
035a960e
BG
1296 struct qca_data *qca = hu->priv;
1297 unsigned long flags;
1298
1299 /* From this point we go into power off state. But serial port is
1300 * still open, stop queueing the IBS data and flush all the buffered
1301 * data in skb's.
1302 */
1303 spin_lock_irqsave(&qca->hci_ibs_lock, flags);
1304 clear_bit(STATE_IN_BAND_SLEEP_ENABLED, &qca->flags);
1305 qca_flush(hu);
1306 spin_unlock_irqrestore(&qca->hci_ibs_lock, flags);
1307
fa9ad876 1308 host_set_baudrate(hu, 2400);
9836b802 1309 qca_send_power_pulse(hu, false);
fa9ad876
BG
1310 qca_power_setup(hu, false);
1311}
1312
3e4be65e
BG
1313static int qca_power_off(struct hci_dev *hdev)
1314{
1315 struct hci_uart *hu = hci_get_drvdata(hdev);
1316
1317 qca_power_shutdown(hu);
1318 return 0;
1319}
1320
fa9ad876
BG
1321static int qca_enable_regulator(struct qca_vreg vregs,
1322 struct regulator *regulator)
1323{
1324 int ret;
1325
1326 ret = regulator_set_voltage(regulator, vregs.min_uV,
1327 vregs.max_uV);
1328 if (ret)
1329 return ret;
1330
1331 if (vregs.load_uA)
1332 ret = regulator_set_load(regulator,
1333 vregs.load_uA);
1334
1335 if (ret)
1336 return ret;
1337
1338 return regulator_enable(regulator);
1339
1340}
1341
1342static void qca_disable_regulator(struct qca_vreg vregs,
1343 struct regulator *regulator)
1344{
1345 regulator_disable(regulator);
1346 regulator_set_voltage(regulator, 0, vregs.max_uV);
1347 if (vregs.load_uA)
1348 regulator_set_load(regulator, 0);
1349
1350}
1351
1352static int qca_power_setup(struct hci_uart *hu, bool on)
1353{
1354 struct qca_vreg *vregs;
1355 struct regulator_bulk_data *vreg_bulk;
1356 struct qca_serdev *qcadev;
1357 int i, num_vregs, ret = 0;
1358
1359 qcadev = serdev_device_get_drvdata(hu->serdev);
1360 if (!qcadev || !qcadev->bt_power || !qcadev->bt_power->vreg_data ||
1361 !qcadev->bt_power->vreg_bulk)
1362 return -EINVAL;
1363
1364 vregs = qcadev->bt_power->vreg_data->vregs;
1365 vreg_bulk = qcadev->bt_power->vreg_bulk;
1366 num_vregs = qcadev->bt_power->vreg_data->num_vregs;
1367 BT_DBG("on: %d", on);
1368 if (on && !qcadev->bt_power->vregs_on) {
1369 for (i = 0; i < num_vregs; i++) {
1370 ret = qca_enable_regulator(vregs[i],
1371 vreg_bulk[i].consumer);
1372 if (ret)
1373 break;
1374 }
1375
1376 if (ret) {
1377 BT_ERR("failed to enable regulator:%s", vregs[i].name);
1378 /* turn off regulators which are enabled */
1379 for (i = i - 1; i >= 0; i--)
1380 qca_disable_regulator(vregs[i],
1381 vreg_bulk[i].consumer);
1382 } else {
1383 qcadev->bt_power->vregs_on = true;
1384 }
1385 } else if (!on && qcadev->bt_power->vregs_on) {
1386 /* turn off regulator in reverse order */
1387 i = qcadev->bt_power->vreg_data->num_vregs - 1;
1388 for ( ; i >= 0; i--)
1389 qca_disable_regulator(vregs[i], vreg_bulk[i].consumer);
1390
1391 qcadev->bt_power->vregs_on = false;
1392 }
1393
1394 return ret;
1395}
1396
1397static int qca_init_regulators(struct qca_power *qca,
1398 const struct qca_vreg *vregs, size_t num_vregs)
1399{
1400 int i;
1401
329e0989 1402 qca->vreg_bulk = devm_kcalloc(qca->dev, num_vregs,
fa9ad876
BG
1403 sizeof(struct regulator_bulk_data),
1404 GFP_KERNEL);
1405 if (!qca->vreg_bulk)
1406 return -ENOMEM;
1407
1408 for (i = 0; i < num_vregs; i++)
1409 qca->vreg_bulk[i].supply = vregs[i].name;
1410
1411 return devm_regulator_bulk_get(qca->dev, num_vregs, qca->vreg_bulk);
1412}
1413
05ba533c
TE
1414static int qca_serdev_probe(struct serdev_device *serdev)
1415{
1416 struct qca_serdev *qcadev;
fa9ad876 1417 const struct qca_vreg_data *data;
05ba533c
TE
1418 int err;
1419
1420 qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL);
1421 if (!qcadev)
1422 return -ENOMEM;
1423
1424 qcadev->serdev_hu.serdev = serdev;
fa9ad876 1425 data = of_device_get_match_data(&serdev->dev);
05ba533c 1426 serdev_device_set_drvdata(serdev, qcadev);
fa9ad876
BG
1427 if (data && data->soc_type == QCA_WCN3990) {
1428 qcadev->btsoc_type = QCA_WCN3990;
1429 qcadev->bt_power = devm_kzalloc(&serdev->dev,
1430 sizeof(struct qca_power),
1431 GFP_KERNEL);
1432 if (!qcadev->bt_power)
1433 return -ENOMEM;
1434
1435 qcadev->bt_power->dev = &serdev->dev;
1436 qcadev->bt_power->vreg_data = data;
1437 err = qca_init_regulators(qcadev->bt_power, data->vregs,
1438 data->num_vregs);
1439 if (err) {
1440 BT_ERR("Failed to init regulators:%d", err);
1441 goto out;
1442 }
05ba533c 1443
fa9ad876 1444 qcadev->bt_power->vregs_on = false;
05ba533c 1445
fa9ad876
BG
1446 device_property_read_u32(&serdev->dev, "max-speed",
1447 &qcadev->oper_speed);
1448 if (!qcadev->oper_speed)
1449 BT_DBG("UART will pick default operating speed");
05ba533c 1450
fa9ad876
BG
1451 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
1452 if (err) {
1453 BT_ERR("wcn3990 serdev registration failed");
1454 goto out;
1455 }
1456 } else {
1457 qcadev->btsoc_type = QCA_ROME;
1458 qcadev->bt_en = devm_gpiod_get(&serdev->dev, "enable",
1459 GPIOD_OUT_LOW);
1460 if (IS_ERR(qcadev->bt_en)) {
1461 dev_err(&serdev->dev, "failed to acquire enable gpio\n");
1462 return PTR_ERR(qcadev->bt_en);
1463 }
05ba533c 1464
fa9ad876
BG
1465 qcadev->susclk = devm_clk_get(&serdev->dev, NULL);
1466 if (IS_ERR(qcadev->susclk)) {
1467 dev_err(&serdev->dev, "failed to acquire clk\n");
1468 return PTR_ERR(qcadev->susclk);
1469 }
05ba533c 1470
fa9ad876
BG
1471 err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ);
1472 if (err)
1473 return err;
1474
1475 err = clk_prepare_enable(qcadev->susclk);
1476 if (err)
1477 return err;
1478
1479 err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto);
1480 if (err)
1481 clk_disable_unprepare(qcadev->susclk);
1482 }
1483
1484out: return err;
05ba533c 1485
05ba533c
TE
1486}
1487
1488static void qca_serdev_remove(struct serdev_device *serdev)
1489{
1490 struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev);
1491
fa9ad876 1492 if (qcadev->btsoc_type == QCA_WCN3990)
c2d78273 1493 qca_power_shutdown(&qcadev->serdev_hu);
fa9ad876
BG
1494 else
1495 clk_disable_unprepare(qcadev->susclk);
05ba533c 1496
fa9ad876 1497 hci_uart_unregister_device(&qcadev->serdev_hu);
05ba533c
TE
1498}
1499
1500static const struct of_device_id qca_bluetooth_of_match[] = {
1501 { .compatible = "qcom,qca6174-bt" },
fa9ad876 1502 { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data},
05ba533c
TE
1503 { /* sentinel */ }
1504};
1505MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match);
1506
1507static struct serdev_device_driver qca_serdev_driver = {
1508 .probe = qca_serdev_probe,
1509 .remove = qca_serdev_remove,
1510 .driver = {
1511 .name = "hci_uart_qca",
1512 .of_match_table = qca_bluetooth_of_match,
1513 },
1514};
1515
0ff252c1
BYTK
1516int __init qca_init(void)
1517{
05ba533c
TE
1518 serdev_device_driver_register(&qca_serdev_driver);
1519
0ff252c1
BYTK
1520 return hci_uart_register_proto(&qca_proto);
1521}
1522
1523int __exit qca_deinit(void)
1524{
05ba533c
TE
1525 serdev_device_driver_unregister(&qca_serdev_driver);
1526
0ff252c1
BYTK
1527 return hci_uart_unregister_proto(&qca_proto);
1528}