Commit | Line | Data |
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0ff252c1 BYTK |
1 | /* |
2 | * Bluetooth Software UART Qualcomm protocol | |
3 | * | |
4 | * HCI_IBS (HCI In-Band Sleep) is Qualcomm's power management | |
5 | * protocol extension to H4. | |
6 | * | |
7 | * Copyright (C) 2007 Texas Instruments, Inc. | |
fa9ad876 | 8 | * Copyright (c) 2010, 2012, 2018 The Linux Foundation. All rights reserved. |
0ff252c1 BYTK |
9 | * |
10 | * Acknowledgements: | |
11 | * This file is based on hci_ll.c, which was... | |
12 | * Written by Ohad Ben-Cohen <ohad@bencohen.org> | |
13 | * which was in turn based on hci_h4.c, which was written | |
14 | * by Maxim Krasnyansky and Marcel Holtmann. | |
15 | * | |
16 | * This program is free software; you can redistribute it and/or modify | |
17 | * it under the terms of the GNU General Public License version 2 | |
18 | * as published by the Free Software Foundation | |
19 | * | |
20 | * This program is distributed in the hope that it will be useful, | |
21 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
22 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
23 | * GNU General Public License for more details. | |
24 | * | |
25 | * You should have received a copy of the GNU General Public License | |
26 | * along with this program; if not, write to the Free Software | |
27 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
28 | * | |
29 | */ | |
30 | ||
31 | #include <linux/kernel.h> | |
05ba533c | 32 | #include <linux/clk.h> |
0ff252c1 | 33 | #include <linux/debugfs.h> |
fa9ad876 BG |
34 | #include <linux/delay.h> |
35 | #include <linux/device.h> | |
05ba533c TE |
36 | #include <linux/gpio/consumer.h> |
37 | #include <linux/mod_devicetable.h> | |
38 | #include <linux/module.h> | |
fa9ad876 BG |
39 | #include <linux/of_device.h> |
40 | #include <linux/platform_device.h> | |
41 | #include <linux/regulator/consumer.h> | |
05ba533c | 42 | #include <linux/serdev.h> |
c614ca3f | 43 | #include <asm/unaligned.h> |
0ff252c1 BYTK |
44 | |
45 | #include <net/bluetooth/bluetooth.h> | |
46 | #include <net/bluetooth/hci_core.h> | |
47 | ||
48 | #include "hci_uart.h" | |
49 | #include "btqca.h" | |
50 | ||
51 | /* HCI_IBS protocol messages */ | |
52 | #define HCI_IBS_SLEEP_IND 0xFE | |
53 | #define HCI_IBS_WAKE_IND 0xFD | |
54 | #define HCI_IBS_WAKE_ACK 0xFC | |
f81b001a | 55 | #define HCI_MAX_IBS_SIZE 10 |
0ff252c1 | 56 | |
f81b001a MH |
57 | #define IBS_WAKE_RETRANS_TIMEOUT_MS 100 |
58 | #define IBS_TX_IDLE_TIMEOUT_MS 2000 | |
94d66714 | 59 | #define CMD_TRANS_TIMEOUT_MS 100 |
0ff252c1 | 60 | |
05ba533c TE |
61 | /* susclk rate */ |
62 | #define SUSCLK_RATE_32KHZ 32768 | |
63 | ||
c614ca3f BG |
64 | /* Controller debug log header */ |
65 | #define QCA_DEBUG_HANDLE 0x2EDC | |
66 | ||
62a91990 MK |
67 | enum qca_flags { |
68 | QCA_IBS_ENABLED, | |
69 | }; | |
70 | ||
0ff252c1 BYTK |
71 | /* HCI_IBS transmit side sleep protocol states */ |
72 | enum tx_ibs_states { | |
73 | HCI_IBS_TX_ASLEEP, | |
74 | HCI_IBS_TX_WAKING, | |
75 | HCI_IBS_TX_AWAKE, | |
76 | }; | |
77 | ||
78 | /* HCI_IBS receive side sleep protocol states */ | |
79 | enum rx_states { | |
80 | HCI_IBS_RX_ASLEEP, | |
81 | HCI_IBS_RX_AWAKE, | |
82 | }; | |
83 | ||
84 | /* HCI_IBS transmit and receive side clock state vote */ | |
85 | enum hci_ibs_clock_state_vote { | |
86 | HCI_IBS_VOTE_STATS_UPDATE, | |
87 | HCI_IBS_TX_VOTE_CLOCK_ON, | |
88 | HCI_IBS_TX_VOTE_CLOCK_OFF, | |
89 | HCI_IBS_RX_VOTE_CLOCK_ON, | |
90 | HCI_IBS_RX_VOTE_CLOCK_OFF, | |
91 | }; | |
92 | ||
93 | struct qca_data { | |
94 | struct hci_uart *hu; | |
95 | struct sk_buff *rx_skb; | |
96 | struct sk_buff_head txq; | |
97 | struct sk_buff_head tx_wait_q; /* HCI_IBS wait queue */ | |
98 | spinlock_t hci_ibs_lock; /* HCI_IBS state lock */ | |
99 | u8 tx_ibs_state; /* HCI_IBS transmit side power state*/ | |
100 | u8 rx_ibs_state; /* HCI_IBS receive side power state */ | |
621a5f7a VK |
101 | bool tx_vote; /* Clock must be on for TX */ |
102 | bool rx_vote; /* Clock must be on for RX */ | |
0ff252c1 BYTK |
103 | struct timer_list tx_idle_timer; |
104 | u32 tx_idle_delay; | |
105 | struct timer_list wake_retrans_timer; | |
106 | u32 wake_retrans; | |
107 | struct workqueue_struct *workqueue; | |
108 | struct work_struct ws_awake_rx; | |
109 | struct work_struct ws_awake_device; | |
110 | struct work_struct ws_rx_vote_off; | |
111 | struct work_struct ws_tx_vote_off; | |
112 | unsigned long flags; | |
113 | ||
114 | /* For debugging purpose */ | |
115 | u64 ibs_sent_wacks; | |
116 | u64 ibs_sent_slps; | |
117 | u64 ibs_sent_wakes; | |
118 | u64 ibs_recv_wacks; | |
119 | u64 ibs_recv_slps; | |
120 | u64 ibs_recv_wakes; | |
121 | u64 vote_last_jif; | |
122 | u32 vote_on_ms; | |
123 | u32 vote_off_ms; | |
124 | u64 tx_votes_on; | |
125 | u64 rx_votes_on; | |
126 | u64 tx_votes_off; | |
127 | u64 rx_votes_off; | |
128 | u64 votes_on; | |
129 | u64 votes_off; | |
130 | }; | |
131 | ||
83d9c5e5 BG |
132 | enum qca_speed_type { |
133 | QCA_INIT_SPEED = 1, | |
134 | QCA_OPER_SPEED | |
135 | }; | |
136 | ||
fa9ad876 BG |
137 | /* |
138 | * Voltage regulator information required for configuring the | |
139 | * QCA Bluetooth chipset | |
140 | */ | |
141 | struct qca_vreg { | |
142 | const char *name; | |
143 | unsigned int min_uV; | |
144 | unsigned int max_uV; | |
145 | unsigned int load_uA; | |
146 | }; | |
147 | ||
148 | struct qca_vreg_data { | |
149 | enum qca_btsoc_type soc_type; | |
150 | struct qca_vreg *vregs; | |
151 | size_t num_vregs; | |
152 | }; | |
153 | ||
154 | /* | |
155 | * Platform data for the QCA Bluetooth power driver. | |
156 | */ | |
157 | struct qca_power { | |
158 | struct device *dev; | |
159 | const struct qca_vreg_data *vreg_data; | |
160 | struct regulator_bulk_data *vreg_bulk; | |
161 | bool vregs_on; | |
162 | }; | |
163 | ||
05ba533c TE |
164 | struct qca_serdev { |
165 | struct hci_uart serdev_hu; | |
166 | struct gpio_desc *bt_en; | |
167 | struct clk *susclk; | |
fa9ad876 BG |
168 | enum qca_btsoc_type btsoc_type; |
169 | struct qca_power *bt_power; | |
170 | u32 init_speed; | |
171 | u32 oper_speed; | |
05ba533c TE |
172 | }; |
173 | ||
fa9ad876 | 174 | static int qca_power_setup(struct hci_uart *hu, bool on); |
c2d78273 | 175 | static void qca_power_shutdown(struct hci_uart *hu); |
3e4be65e | 176 | static int qca_power_off(struct hci_dev *hdev); |
fa9ad876 | 177 | |
4fdd5a4f MK |
178 | static enum qca_btsoc_type qca_soc_type(struct hci_uart *hu) |
179 | { | |
180 | enum qca_btsoc_type soc_type; | |
181 | ||
182 | if (hu->serdev) { | |
183 | struct qca_serdev *qsd = serdev_device_get_drvdata(hu->serdev); | |
184 | ||
185 | soc_type = qsd->btsoc_type; | |
186 | } else { | |
187 | soc_type = QCA_ROME; | |
188 | } | |
189 | ||
190 | return soc_type; | |
191 | } | |
192 | ||
0ff252c1 BYTK |
193 | static void __serial_clock_on(struct tty_struct *tty) |
194 | { | |
195 | /* TODO: Some chipset requires to enable UART clock on client | |
196 | * side to save power consumption or manual work is required. | |
197 | * Please put your code to control UART clock here if needed | |
198 | */ | |
199 | } | |
200 | ||
201 | static void __serial_clock_off(struct tty_struct *tty) | |
202 | { | |
203 | /* TODO: Some chipset requires to disable UART clock on client | |
204 | * side to save power consumption or manual work is required. | |
205 | * Please put your code to control UART clock off here if needed | |
206 | */ | |
207 | } | |
208 | ||
209 | /* serial_clock_vote needs to be called with the ibs lock held */ | |
210 | static void serial_clock_vote(unsigned long vote, struct hci_uart *hu) | |
211 | { | |
212 | struct qca_data *qca = hu->priv; | |
213 | unsigned int diff; | |
214 | ||
215 | bool old_vote = (qca->tx_vote | qca->rx_vote); | |
216 | bool new_vote; | |
217 | ||
218 | switch (vote) { | |
219 | case HCI_IBS_VOTE_STATS_UPDATE: | |
220 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); | |
221 | ||
222 | if (old_vote) | |
223 | qca->vote_off_ms += diff; | |
224 | else | |
225 | qca->vote_on_ms += diff; | |
226 | return; | |
227 | ||
228 | case HCI_IBS_TX_VOTE_CLOCK_ON: | |
229 | qca->tx_vote = true; | |
230 | qca->tx_votes_on++; | |
231 | new_vote = true; | |
232 | break; | |
233 | ||
234 | case HCI_IBS_RX_VOTE_CLOCK_ON: | |
235 | qca->rx_vote = true; | |
236 | qca->rx_votes_on++; | |
237 | new_vote = true; | |
238 | break; | |
239 | ||
240 | case HCI_IBS_TX_VOTE_CLOCK_OFF: | |
241 | qca->tx_vote = false; | |
242 | qca->tx_votes_off++; | |
243 | new_vote = qca->rx_vote | qca->tx_vote; | |
244 | break; | |
245 | ||
246 | case HCI_IBS_RX_VOTE_CLOCK_OFF: | |
247 | qca->rx_vote = false; | |
248 | qca->rx_votes_off++; | |
249 | new_vote = qca->rx_vote | qca->tx_vote; | |
250 | break; | |
251 | ||
252 | default: | |
253 | BT_ERR("Voting irregularity"); | |
254 | return; | |
255 | } | |
256 | ||
257 | if (new_vote != old_vote) { | |
258 | if (new_vote) | |
259 | __serial_clock_on(hu->tty); | |
260 | else | |
261 | __serial_clock_off(hu->tty); | |
262 | ||
ce26d813 PK |
263 | BT_DBG("Vote serial clock %s(%s)", new_vote ? "true" : "false", |
264 | vote ? "true" : "false"); | |
0ff252c1 BYTK |
265 | |
266 | diff = jiffies_to_msecs(jiffies - qca->vote_last_jif); | |
267 | ||
268 | if (new_vote) { | |
269 | qca->votes_on++; | |
270 | qca->vote_off_ms += diff; | |
271 | } else { | |
272 | qca->votes_off++; | |
273 | qca->vote_on_ms += diff; | |
274 | } | |
275 | qca->vote_last_jif = jiffies; | |
276 | } | |
277 | } | |
278 | ||
279 | /* Builds and sends an HCI_IBS command packet. | |
280 | * These are very simple packets with only 1 cmd byte. | |
281 | */ | |
282 | static int send_hci_ibs_cmd(u8 cmd, struct hci_uart *hu) | |
283 | { | |
284 | int err = 0; | |
285 | struct sk_buff *skb = NULL; | |
286 | struct qca_data *qca = hu->priv; | |
287 | ||
288 | BT_DBG("hu %p send hci ibs cmd 0x%x", hu, cmd); | |
289 | ||
290 | skb = bt_skb_alloc(1, GFP_ATOMIC); | |
291 | if (!skb) { | |
292 | BT_ERR("Failed to allocate memory for HCI_IBS packet"); | |
293 | return -ENOMEM; | |
294 | } | |
295 | ||
296 | /* Assign HCI_IBS type */ | |
634fef61 | 297 | skb_put_u8(skb, cmd); |
0ff252c1 BYTK |
298 | |
299 | skb_queue_tail(&qca->txq, skb); | |
300 | ||
301 | return err; | |
302 | } | |
303 | ||
304 | static void qca_wq_awake_device(struct work_struct *work) | |
305 | { | |
306 | struct qca_data *qca = container_of(work, struct qca_data, | |
307 | ws_awake_device); | |
308 | struct hci_uart *hu = qca->hu; | |
309 | unsigned long retrans_delay; | |
310 | ||
311 | BT_DBG("hu %p wq awake device", hu); | |
312 | ||
313 | /* Vote for serial clock */ | |
314 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_ON, hu); | |
315 | ||
316 | spin_lock(&qca->hci_ibs_lock); | |
317 | ||
318 | /* Send wake indication to device */ | |
319 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) | |
320 | BT_ERR("Failed to send WAKE to device"); | |
321 | ||
322 | qca->ibs_sent_wakes++; | |
323 | ||
324 | /* Start retransmit timer */ | |
325 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); | |
326 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); | |
327 | ||
328 | spin_unlock(&qca->hci_ibs_lock); | |
329 | ||
330 | /* Actually send the packets */ | |
331 | hci_uart_tx_wakeup(hu); | |
332 | } | |
333 | ||
334 | static void qca_wq_awake_rx(struct work_struct *work) | |
335 | { | |
336 | struct qca_data *qca = container_of(work, struct qca_data, | |
337 | ws_awake_rx); | |
338 | struct hci_uart *hu = qca->hu; | |
339 | ||
340 | BT_DBG("hu %p wq awake rx", hu); | |
341 | ||
342 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_ON, hu); | |
343 | ||
344 | spin_lock(&qca->hci_ibs_lock); | |
345 | qca->rx_ibs_state = HCI_IBS_RX_AWAKE; | |
346 | ||
347 | /* Always acknowledge device wake up, | |
348 | * sending IBS message doesn't count as TX ON. | |
349 | */ | |
350 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) | |
351 | BT_ERR("Failed to acknowledge device wake up"); | |
352 | ||
353 | qca->ibs_sent_wacks++; | |
354 | ||
355 | spin_unlock(&qca->hci_ibs_lock); | |
356 | ||
357 | /* Actually send the packets */ | |
358 | hci_uart_tx_wakeup(hu); | |
359 | } | |
360 | ||
361 | static void qca_wq_serial_rx_clock_vote_off(struct work_struct *work) | |
362 | { | |
363 | struct qca_data *qca = container_of(work, struct qca_data, | |
364 | ws_rx_vote_off); | |
365 | struct hci_uart *hu = qca->hu; | |
366 | ||
367 | BT_DBG("hu %p rx clock vote off", hu); | |
368 | ||
369 | serial_clock_vote(HCI_IBS_RX_VOTE_CLOCK_OFF, hu); | |
370 | } | |
371 | ||
372 | static void qca_wq_serial_tx_clock_vote_off(struct work_struct *work) | |
373 | { | |
374 | struct qca_data *qca = container_of(work, struct qca_data, | |
375 | ws_tx_vote_off); | |
376 | struct hci_uart *hu = qca->hu; | |
377 | ||
378 | BT_DBG("hu %p tx clock vote off", hu); | |
379 | ||
380 | /* Run HCI tx handling unlocked */ | |
381 | hci_uart_tx_wakeup(hu); | |
382 | ||
383 | /* Now that message queued to tty driver, vote for tty clocks off. | |
384 | * It is up to the tty driver to pend the clocks off until tx done. | |
385 | */ | |
386 | serial_clock_vote(HCI_IBS_TX_VOTE_CLOCK_OFF, hu); | |
387 | } | |
388 | ||
04356052 | 389 | static void hci_ibs_tx_idle_timeout(struct timer_list *t) |
0ff252c1 | 390 | { |
04356052 KC |
391 | struct qca_data *qca = from_timer(qca, t, tx_idle_timer); |
392 | struct hci_uart *hu = qca->hu; | |
0ff252c1 BYTK |
393 | unsigned long flags; |
394 | ||
395 | BT_DBG("hu %p idle timeout in %d state", hu, qca->tx_ibs_state); | |
396 | ||
397 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, | |
398 | flags, SINGLE_DEPTH_NESTING); | |
399 | ||
400 | switch (qca->tx_ibs_state) { | |
401 | case HCI_IBS_TX_AWAKE: | |
402 | /* TX_IDLE, go to SLEEP */ | |
403 | if (send_hci_ibs_cmd(HCI_IBS_SLEEP_IND, hu) < 0) { | |
404 | BT_ERR("Failed to send SLEEP to device"); | |
405 | break; | |
406 | } | |
407 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; | |
408 | qca->ibs_sent_slps++; | |
409 | queue_work(qca->workqueue, &qca->ws_tx_vote_off); | |
410 | break; | |
411 | ||
412 | case HCI_IBS_TX_ASLEEP: | |
413 | case HCI_IBS_TX_WAKING: | |
414 | /* Fall through */ | |
415 | ||
416 | default: | |
e059a465 | 417 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
0ff252c1 BYTK |
418 | break; |
419 | } | |
420 | ||
421 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
422 | } | |
423 | ||
04356052 | 424 | static void hci_ibs_wake_retrans_timeout(struct timer_list *t) |
0ff252c1 | 425 | { |
04356052 KC |
426 | struct qca_data *qca = from_timer(qca, t, wake_retrans_timer); |
427 | struct hci_uart *hu = qca->hu; | |
0ff252c1 | 428 | unsigned long flags, retrans_delay; |
a9137188 | 429 | bool retransmit = false; |
0ff252c1 BYTK |
430 | |
431 | BT_DBG("hu %p wake retransmit timeout in %d state", | |
432 | hu, qca->tx_ibs_state); | |
433 | ||
434 | spin_lock_irqsave_nested(&qca->hci_ibs_lock, | |
435 | flags, SINGLE_DEPTH_NESTING); | |
436 | ||
437 | switch (qca->tx_ibs_state) { | |
438 | case HCI_IBS_TX_WAKING: | |
439 | /* No WAKE_ACK, retransmit WAKE */ | |
a9137188 | 440 | retransmit = true; |
0ff252c1 BYTK |
441 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_IND, hu) < 0) { |
442 | BT_ERR("Failed to acknowledge device wake up"); | |
443 | break; | |
444 | } | |
445 | qca->ibs_sent_wakes++; | |
446 | retrans_delay = msecs_to_jiffies(qca->wake_retrans); | |
447 | mod_timer(&qca->wake_retrans_timer, jiffies + retrans_delay); | |
448 | break; | |
449 | ||
450 | case HCI_IBS_TX_ASLEEP: | |
451 | case HCI_IBS_TX_AWAKE: | |
452 | /* Fall through */ | |
453 | ||
454 | default: | |
e059a465 | 455 | BT_ERR("Spurious timeout tx state %d", qca->tx_ibs_state); |
0ff252c1 BYTK |
456 | break; |
457 | } | |
458 | ||
459 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
460 | ||
461 | if (retransmit) | |
462 | hci_uart_tx_wakeup(hu); | |
463 | } | |
464 | ||
465 | /* Initialize protocol */ | |
466 | static int qca_open(struct hci_uart *hu) | |
467 | { | |
05ba533c | 468 | struct qca_serdev *qcadev; |
0ff252c1 | 469 | struct qca_data *qca; |
fa9ad876 | 470 | int ret; |
0ff252c1 BYTK |
471 | |
472 | BT_DBG("hu %p qca_open", hu); | |
473 | ||
25a13e38 | 474 | qca = kzalloc(sizeof(struct qca_data), GFP_KERNEL); |
0ff252c1 BYTK |
475 | if (!qca) |
476 | return -ENOMEM; | |
477 | ||
478 | skb_queue_head_init(&qca->txq); | |
479 | skb_queue_head_init(&qca->tx_wait_q); | |
480 | spin_lock_init(&qca->hci_ibs_lock); | |
fac9a602 | 481 | qca->workqueue = alloc_ordered_workqueue("qca_wq", 0); |
0ff252c1 BYTK |
482 | if (!qca->workqueue) { |
483 | BT_ERR("QCA Workqueue not initialized properly"); | |
484 | kfree(qca); | |
485 | return -ENOMEM; | |
486 | } | |
487 | ||
488 | INIT_WORK(&qca->ws_awake_rx, qca_wq_awake_rx); | |
489 | INIT_WORK(&qca->ws_awake_device, qca_wq_awake_device); | |
490 | INIT_WORK(&qca->ws_rx_vote_off, qca_wq_serial_rx_clock_vote_off); | |
491 | INIT_WORK(&qca->ws_tx_vote_off, qca_wq_serial_tx_clock_vote_off); | |
492 | ||
493 | qca->hu = hu; | |
494 | ||
495 | /* Assume we start with both sides asleep -- extra wakes OK */ | |
496 | qca->tx_ibs_state = HCI_IBS_TX_ASLEEP; | |
497 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; | |
498 | ||
499 | /* clocks actually on, but we start votes off */ | |
500 | qca->tx_vote = false; | |
501 | qca->rx_vote = false; | |
502 | qca->flags = 0; | |
503 | ||
504 | qca->ibs_sent_wacks = 0; | |
505 | qca->ibs_sent_slps = 0; | |
506 | qca->ibs_sent_wakes = 0; | |
507 | qca->ibs_recv_wacks = 0; | |
508 | qca->ibs_recv_slps = 0; | |
509 | qca->ibs_recv_wakes = 0; | |
510 | qca->vote_last_jif = jiffies; | |
511 | qca->vote_on_ms = 0; | |
512 | qca->vote_off_ms = 0; | |
513 | qca->votes_on = 0; | |
514 | qca->votes_off = 0; | |
515 | qca->tx_votes_on = 0; | |
516 | qca->tx_votes_off = 0; | |
517 | qca->rx_votes_on = 0; | |
518 | qca->rx_votes_off = 0; | |
519 | ||
520 | hu->priv = qca; | |
521 | ||
05ba533c | 522 | if (hu->serdev) { |
05ba533c TE |
523 | |
524 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
523760b7 | 525 | if (!qca_is_wcn399x(qcadev->btsoc_type)) { |
fa9ad876 | 526 | gpiod_set_value_cansleep(qcadev->bt_en, 1); |
7f09d5a6 BG |
527 | /* Controller needs time to bootup. */ |
528 | msleep(150); | |
fa9ad876 BG |
529 | } else { |
530 | hu->init_speed = qcadev->init_speed; | |
531 | hu->oper_speed = qcadev->oper_speed; | |
532 | ret = qca_power_setup(hu, true); | |
533 | if (ret) { | |
534 | destroy_workqueue(qca->workqueue); | |
535 | kfree_skb(qca->rx_skb); | |
536 | hu->priv = NULL; | |
537 | kfree(qca); | |
538 | return ret; | |
539 | } | |
540 | } | |
05ba533c TE |
541 | } |
542 | ||
fa9ad876 BG |
543 | timer_setup(&qca->wake_retrans_timer, hci_ibs_wake_retrans_timeout, 0); |
544 | qca->wake_retrans = IBS_WAKE_RETRANS_TIMEOUT_MS; | |
545 | ||
546 | timer_setup(&qca->tx_idle_timer, hci_ibs_tx_idle_timeout, 0); | |
547 | qca->tx_idle_delay = IBS_TX_IDLE_TIMEOUT_MS; | |
548 | ||
0ff252c1 BYTK |
549 | BT_DBG("HCI_UART_QCA open, tx_idle_delay=%u, wake_retrans=%u", |
550 | qca->tx_idle_delay, qca->wake_retrans); | |
551 | ||
552 | return 0; | |
553 | } | |
554 | ||
555 | static void qca_debugfs_init(struct hci_dev *hdev) | |
556 | { | |
557 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
558 | struct qca_data *qca = hu->priv; | |
559 | struct dentry *ibs_dir; | |
560 | umode_t mode; | |
561 | ||
562 | if (!hdev->debugfs) | |
563 | return; | |
564 | ||
565 | ibs_dir = debugfs_create_dir("ibs", hdev->debugfs); | |
566 | ||
567 | /* read only */ | |
568 | mode = S_IRUGO; | |
569 | debugfs_create_u8("tx_ibs_state", mode, ibs_dir, &qca->tx_ibs_state); | |
570 | debugfs_create_u8("rx_ibs_state", mode, ibs_dir, &qca->rx_ibs_state); | |
571 | debugfs_create_u64("ibs_sent_sleeps", mode, ibs_dir, | |
572 | &qca->ibs_sent_slps); | |
573 | debugfs_create_u64("ibs_sent_wakes", mode, ibs_dir, | |
574 | &qca->ibs_sent_wakes); | |
575 | debugfs_create_u64("ibs_sent_wake_acks", mode, ibs_dir, | |
576 | &qca->ibs_sent_wacks); | |
577 | debugfs_create_u64("ibs_recv_sleeps", mode, ibs_dir, | |
578 | &qca->ibs_recv_slps); | |
579 | debugfs_create_u64("ibs_recv_wakes", mode, ibs_dir, | |
580 | &qca->ibs_recv_wakes); | |
581 | debugfs_create_u64("ibs_recv_wake_acks", mode, ibs_dir, | |
582 | &qca->ibs_recv_wacks); | |
10be6c0f | 583 | debugfs_create_bool("tx_vote", mode, ibs_dir, &qca->tx_vote); |
0ff252c1 BYTK |
584 | debugfs_create_u64("tx_votes_on", mode, ibs_dir, &qca->tx_votes_on); |
585 | debugfs_create_u64("tx_votes_off", mode, ibs_dir, &qca->tx_votes_off); | |
10be6c0f | 586 | debugfs_create_bool("rx_vote", mode, ibs_dir, &qca->rx_vote); |
0ff252c1 BYTK |
587 | debugfs_create_u64("rx_votes_on", mode, ibs_dir, &qca->rx_votes_on); |
588 | debugfs_create_u64("rx_votes_off", mode, ibs_dir, &qca->rx_votes_off); | |
589 | debugfs_create_u64("votes_on", mode, ibs_dir, &qca->votes_on); | |
590 | debugfs_create_u64("votes_off", mode, ibs_dir, &qca->votes_off); | |
591 | debugfs_create_u32("vote_on_ms", mode, ibs_dir, &qca->vote_on_ms); | |
592 | debugfs_create_u32("vote_off_ms", mode, ibs_dir, &qca->vote_off_ms); | |
593 | ||
594 | /* read/write */ | |
595 | mode = S_IRUGO | S_IWUSR; | |
596 | debugfs_create_u32("wake_retrans", mode, ibs_dir, &qca->wake_retrans); | |
597 | debugfs_create_u32("tx_idle_delay", mode, ibs_dir, | |
598 | &qca->tx_idle_delay); | |
599 | } | |
600 | ||
601 | /* Flush protocol data */ | |
602 | static int qca_flush(struct hci_uart *hu) | |
603 | { | |
604 | struct qca_data *qca = hu->priv; | |
605 | ||
606 | BT_DBG("hu %p qca flush", hu); | |
607 | ||
608 | skb_queue_purge(&qca->tx_wait_q); | |
609 | skb_queue_purge(&qca->txq); | |
610 | ||
611 | return 0; | |
612 | } | |
613 | ||
614 | /* Close protocol */ | |
615 | static int qca_close(struct hci_uart *hu) | |
616 | { | |
05ba533c | 617 | struct qca_serdev *qcadev; |
0ff252c1 BYTK |
618 | struct qca_data *qca = hu->priv; |
619 | ||
620 | BT_DBG("hu %p qca close", hu); | |
621 | ||
622 | serial_clock_vote(HCI_IBS_VOTE_STATS_UPDATE, hu); | |
623 | ||
624 | skb_queue_purge(&qca->tx_wait_q); | |
625 | skb_queue_purge(&qca->txq); | |
626 | del_timer(&qca->tx_idle_timer); | |
627 | del_timer(&qca->wake_retrans_timer); | |
628 | destroy_workqueue(qca->workqueue); | |
629 | qca->hu = NULL; | |
630 | ||
05ba533c | 631 | if (hu->serdev) { |
05ba533c | 632 | qcadev = serdev_device_get_drvdata(hu->serdev); |
523760b7 | 633 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
c2d78273 | 634 | qca_power_shutdown(hu); |
fa9ad876 BG |
635 | else |
636 | gpiod_set_value_cansleep(qcadev->bt_en, 0); | |
637 | ||
05ba533c TE |
638 | } |
639 | ||
0ff252c1 BYTK |
640 | kfree_skb(qca->rx_skb); |
641 | ||
642 | hu->priv = NULL; | |
643 | ||
644 | kfree(qca); | |
645 | ||
646 | return 0; | |
647 | } | |
648 | ||
649 | /* Called upon a wake-up-indication from the device. | |
650 | */ | |
651 | static void device_want_to_wakeup(struct hci_uart *hu) | |
652 | { | |
653 | unsigned long flags; | |
654 | struct qca_data *qca = hu->priv; | |
655 | ||
656 | BT_DBG("hu %p want to wake up", hu); | |
657 | ||
658 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
659 | ||
660 | qca->ibs_recv_wakes++; | |
661 | ||
662 | switch (qca->rx_ibs_state) { | |
663 | case HCI_IBS_RX_ASLEEP: | |
664 | /* Make sure clock is on - we may have turned clock off since | |
665 | * receiving the wake up indicator awake rx clock. | |
666 | */ | |
667 | queue_work(qca->workqueue, &qca->ws_awake_rx); | |
668 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
669 | return; | |
670 | ||
671 | case HCI_IBS_RX_AWAKE: | |
672 | /* Always acknowledge device wake up, | |
673 | * sending IBS message doesn't count as TX ON. | |
674 | */ | |
675 | if (send_hci_ibs_cmd(HCI_IBS_WAKE_ACK, hu) < 0) { | |
676 | BT_ERR("Failed to acknowledge device wake up"); | |
677 | break; | |
678 | } | |
679 | qca->ibs_sent_wacks++; | |
680 | break; | |
681 | ||
682 | default: | |
683 | /* Any other state is illegal */ | |
684 | BT_ERR("Received HCI_IBS_WAKE_IND in rx state %d", | |
685 | qca->rx_ibs_state); | |
686 | break; | |
687 | } | |
688 | ||
689 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
690 | ||
691 | /* Actually send the packets */ | |
692 | hci_uart_tx_wakeup(hu); | |
693 | } | |
694 | ||
695 | /* Called upon a sleep-indication from the device. | |
696 | */ | |
697 | static void device_want_to_sleep(struct hci_uart *hu) | |
698 | { | |
699 | unsigned long flags; | |
700 | struct qca_data *qca = hu->priv; | |
701 | ||
702 | BT_DBG("hu %p want to sleep", hu); | |
703 | ||
704 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
705 | ||
706 | qca->ibs_recv_slps++; | |
707 | ||
708 | switch (qca->rx_ibs_state) { | |
709 | case HCI_IBS_RX_AWAKE: | |
710 | /* Update state */ | |
711 | qca->rx_ibs_state = HCI_IBS_RX_ASLEEP; | |
712 | /* Vote off rx clock under workqueue */ | |
713 | queue_work(qca->workqueue, &qca->ws_rx_vote_off); | |
714 | break; | |
715 | ||
716 | case HCI_IBS_RX_ASLEEP: | |
717 | /* Fall through */ | |
718 | ||
719 | default: | |
720 | /* Any other state is illegal */ | |
721 | BT_ERR("Received HCI_IBS_SLEEP_IND in rx state %d", | |
722 | qca->rx_ibs_state); | |
723 | break; | |
724 | } | |
725 | ||
726 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
727 | } | |
728 | ||
729 | /* Called upon wake-up-acknowledgement from the device | |
730 | */ | |
731 | static void device_woke_up(struct hci_uart *hu) | |
732 | { | |
733 | unsigned long flags, idle_delay; | |
734 | struct qca_data *qca = hu->priv; | |
735 | struct sk_buff *skb = NULL; | |
736 | ||
737 | BT_DBG("hu %p woke up", hu); | |
738 | ||
739 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
740 | ||
741 | qca->ibs_recv_wacks++; | |
742 | ||
743 | switch (qca->tx_ibs_state) { | |
744 | case HCI_IBS_TX_AWAKE: | |
745 | /* Expect one if we send 2 WAKEs */ | |
746 | BT_DBG("Received HCI_IBS_WAKE_ACK in tx state %d", | |
747 | qca->tx_ibs_state); | |
748 | break; | |
749 | ||
750 | case HCI_IBS_TX_WAKING: | |
751 | /* Send pending packets */ | |
752 | while ((skb = skb_dequeue(&qca->tx_wait_q))) | |
753 | skb_queue_tail(&qca->txq, skb); | |
754 | ||
755 | /* Switch timers and change state to HCI_IBS_TX_AWAKE */ | |
756 | del_timer(&qca->wake_retrans_timer); | |
757 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); | |
758 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); | |
759 | qca->tx_ibs_state = HCI_IBS_TX_AWAKE; | |
760 | break; | |
761 | ||
762 | case HCI_IBS_TX_ASLEEP: | |
763 | /* Fall through */ | |
764 | ||
765 | default: | |
766 | BT_ERR("Received HCI_IBS_WAKE_ACK in tx state %d", | |
767 | qca->tx_ibs_state); | |
768 | break; | |
769 | } | |
770 | ||
771 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
772 | ||
773 | /* Actually send the packets */ | |
774 | hci_uart_tx_wakeup(hu); | |
775 | } | |
776 | ||
777 | /* Enqueue frame for transmittion (padding, crc, etc) may be called from | |
778 | * two simultaneous tasklets. | |
779 | */ | |
780 | static int qca_enqueue(struct hci_uart *hu, struct sk_buff *skb) | |
781 | { | |
782 | unsigned long flags = 0, idle_delay; | |
783 | struct qca_data *qca = hu->priv; | |
784 | ||
785 | BT_DBG("hu %p qca enq skb %p tx_ibs_state %d", hu, skb, | |
786 | qca->tx_ibs_state); | |
787 | ||
788 | /* Prepend skb with frame type */ | |
618e8bc2 | 789 | memcpy(skb_push(skb, 1), &hci_skb_pkt_type(skb), 1); |
0ff252c1 | 790 | |
035a960e BG |
791 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); |
792 | ||
0ff252c1 BYTK |
793 | /* Don't go to sleep in middle of patch download or |
794 | * Out-Of-Band(GPIOs control) sleep is selected. | |
795 | */ | |
62a91990 | 796 | if (!test_bit(QCA_IBS_ENABLED, &qca->flags)) { |
0ff252c1 | 797 | skb_queue_tail(&qca->txq, skb); |
035a960e | 798 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); |
0ff252c1 BYTK |
799 | return 0; |
800 | } | |
801 | ||
0ff252c1 BYTK |
802 | /* Act according to current state */ |
803 | switch (qca->tx_ibs_state) { | |
804 | case HCI_IBS_TX_AWAKE: | |
805 | BT_DBG("Device awake, sending normally"); | |
806 | skb_queue_tail(&qca->txq, skb); | |
807 | idle_delay = msecs_to_jiffies(qca->tx_idle_delay); | |
808 | mod_timer(&qca->tx_idle_timer, jiffies + idle_delay); | |
809 | break; | |
810 | ||
811 | case HCI_IBS_TX_ASLEEP: | |
812 | BT_DBG("Device asleep, waking up and queueing packet"); | |
813 | /* Save packet for later */ | |
814 | skb_queue_tail(&qca->tx_wait_q, skb); | |
815 | ||
816 | qca->tx_ibs_state = HCI_IBS_TX_WAKING; | |
817 | /* Schedule a work queue to wake up device */ | |
818 | queue_work(qca->workqueue, &qca->ws_awake_device); | |
819 | break; | |
820 | ||
821 | case HCI_IBS_TX_WAKING: | |
822 | BT_DBG("Device waking up, queueing packet"); | |
823 | /* Transient state; just keep packet for later */ | |
824 | skb_queue_tail(&qca->tx_wait_q, skb); | |
825 | break; | |
826 | ||
827 | default: | |
828 | BT_ERR("Illegal tx state: %d (losing packet)", | |
829 | qca->tx_ibs_state); | |
830 | kfree_skb(skb); | |
831 | break; | |
832 | } | |
833 | ||
834 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
835 | ||
836 | return 0; | |
837 | } | |
838 | ||
839 | static int qca_ibs_sleep_ind(struct hci_dev *hdev, struct sk_buff *skb) | |
840 | { | |
841 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
842 | ||
843 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_SLEEP_IND); | |
844 | ||
845 | device_want_to_sleep(hu); | |
846 | ||
847 | kfree_skb(skb); | |
848 | return 0; | |
849 | } | |
850 | ||
851 | static int qca_ibs_wake_ind(struct hci_dev *hdev, struct sk_buff *skb) | |
852 | { | |
853 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
854 | ||
855 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_IND); | |
856 | ||
857 | device_want_to_wakeup(hu); | |
858 | ||
859 | kfree_skb(skb); | |
860 | return 0; | |
861 | } | |
862 | ||
863 | static int qca_ibs_wake_ack(struct hci_dev *hdev, struct sk_buff *skb) | |
864 | { | |
865 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
866 | ||
867 | BT_DBG("hu %p recv hci ibs cmd 0x%x", hu, HCI_IBS_WAKE_ACK); | |
868 | ||
869 | device_woke_up(hu); | |
870 | ||
871 | kfree_skb(skb); | |
872 | return 0; | |
873 | } | |
874 | ||
c614ca3f BG |
875 | static int qca_recv_acl_data(struct hci_dev *hdev, struct sk_buff *skb) |
876 | { | |
877 | /* We receive debug logs from chip as an ACL packets. | |
878 | * Instead of sending the data to ACL to decode the | |
879 | * received data, we are pushing them to the above layers | |
880 | * as a diagnostic packet. | |
881 | */ | |
882 | if (get_unaligned_le16(skb->data) == QCA_DEBUG_HANDLE) | |
883 | return hci_recv_diag(hdev, skb); | |
884 | ||
885 | return hci_recv_frame(hdev, skb); | |
886 | } | |
887 | ||
0ff252c1 BYTK |
888 | #define QCA_IBS_SLEEP_IND_EVENT \ |
889 | .type = HCI_IBS_SLEEP_IND, \ | |
890 | .hlen = 0, \ | |
891 | .loff = 0, \ | |
892 | .lsize = 0, \ | |
893 | .maxlen = HCI_MAX_IBS_SIZE | |
894 | ||
895 | #define QCA_IBS_WAKE_IND_EVENT \ | |
896 | .type = HCI_IBS_WAKE_IND, \ | |
897 | .hlen = 0, \ | |
898 | .loff = 0, \ | |
899 | .lsize = 0, \ | |
900 | .maxlen = HCI_MAX_IBS_SIZE | |
901 | ||
902 | #define QCA_IBS_WAKE_ACK_EVENT \ | |
903 | .type = HCI_IBS_WAKE_ACK, \ | |
904 | .hlen = 0, \ | |
905 | .loff = 0, \ | |
906 | .lsize = 0, \ | |
907 | .maxlen = HCI_MAX_IBS_SIZE | |
908 | ||
909 | static const struct h4_recv_pkt qca_recv_pkts[] = { | |
c614ca3f | 910 | { H4_RECV_ACL, .recv = qca_recv_acl_data }, |
0ff252c1 BYTK |
911 | { H4_RECV_SCO, .recv = hci_recv_frame }, |
912 | { H4_RECV_EVENT, .recv = hci_recv_frame }, | |
913 | { QCA_IBS_WAKE_IND_EVENT, .recv = qca_ibs_wake_ind }, | |
914 | { QCA_IBS_WAKE_ACK_EVENT, .recv = qca_ibs_wake_ack }, | |
915 | { QCA_IBS_SLEEP_IND_EVENT, .recv = qca_ibs_sleep_ind }, | |
916 | }; | |
917 | ||
918 | static int qca_recv(struct hci_uart *hu, const void *data, int count) | |
919 | { | |
920 | struct qca_data *qca = hu->priv; | |
921 | ||
922 | if (!test_bit(HCI_UART_REGISTERED, &hu->flags)) | |
923 | return -EUNATCH; | |
924 | ||
925 | qca->rx_skb = h4_recv_buf(hu->hdev, qca->rx_skb, data, count, | |
926 | qca_recv_pkts, ARRAY_SIZE(qca_recv_pkts)); | |
927 | if (IS_ERR(qca->rx_skb)) { | |
928 | int err = PTR_ERR(qca->rx_skb); | |
2064ee33 | 929 | bt_dev_err(hu->hdev, "Frame reassembly failed (%d)", err); |
0ff252c1 BYTK |
930 | qca->rx_skb = NULL; |
931 | return err; | |
932 | } | |
933 | ||
934 | return count; | |
935 | } | |
936 | ||
937 | static struct sk_buff *qca_dequeue(struct hci_uart *hu) | |
938 | { | |
939 | struct qca_data *qca = hu->priv; | |
940 | ||
941 | return skb_dequeue(&qca->txq); | |
942 | } | |
943 | ||
944 | static uint8_t qca_get_baudrate_value(int speed) | |
945 | { | |
ce26d813 | 946 | switch (speed) { |
0ff252c1 BYTK |
947 | case 9600: |
948 | return QCA_BAUDRATE_9600; | |
949 | case 19200: | |
950 | return QCA_BAUDRATE_19200; | |
951 | case 38400: | |
952 | return QCA_BAUDRATE_38400; | |
953 | case 57600: | |
954 | return QCA_BAUDRATE_57600; | |
955 | case 115200: | |
956 | return QCA_BAUDRATE_115200; | |
957 | case 230400: | |
958 | return QCA_BAUDRATE_230400; | |
959 | case 460800: | |
960 | return QCA_BAUDRATE_460800; | |
961 | case 500000: | |
962 | return QCA_BAUDRATE_500000; | |
963 | case 921600: | |
964 | return QCA_BAUDRATE_921600; | |
965 | case 1000000: | |
966 | return QCA_BAUDRATE_1000000; | |
967 | case 2000000: | |
968 | return QCA_BAUDRATE_2000000; | |
969 | case 3000000: | |
970 | return QCA_BAUDRATE_3000000; | |
be93a497 BG |
971 | case 3200000: |
972 | return QCA_BAUDRATE_3200000; | |
0ff252c1 BYTK |
973 | case 3500000: |
974 | return QCA_BAUDRATE_3500000; | |
975 | default: | |
976 | return QCA_BAUDRATE_115200; | |
977 | } | |
978 | } | |
979 | ||
980 | static int qca_set_baudrate(struct hci_dev *hdev, uint8_t baudrate) | |
981 | { | |
982 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
983 | struct qca_data *qca = hu->priv; | |
984 | struct sk_buff *skb; | |
985 | u8 cmd[] = { 0x01, 0x48, 0xFC, 0x01, 0x00 }; | |
986 | ||
be93a497 | 987 | if (baudrate > QCA_BAUDRATE_3200000) |
0ff252c1 BYTK |
988 | return -EINVAL; |
989 | ||
990 | cmd[4] = baudrate; | |
991 | ||
25a13e38 | 992 | skb = bt_skb_alloc(sizeof(cmd), GFP_KERNEL); |
0ff252c1 | 993 | if (!skb) { |
2064ee33 | 994 | bt_dev_err(hdev, "Failed to allocate baudrate packet"); |
0ff252c1 BYTK |
995 | return -ENOMEM; |
996 | } | |
997 | ||
998 | /* Assign commands to change baudrate and packet type. */ | |
59ae1d12 | 999 | skb_put_data(skb, cmd, sizeof(cmd)); |
618e8bc2 | 1000 | hci_skb_pkt_type(skb) = HCI_COMMAND_PKT; |
0ff252c1 BYTK |
1001 | |
1002 | skb_queue_tail(&qca->txq, skb); | |
1003 | hci_uart_tx_wakeup(hu); | |
1004 | ||
94d66714 MK |
1005 | /* Wait for the baudrate change request to be sent */ |
1006 | ||
1007 | while (!skb_queue_empty(&qca->txq)) | |
1008 | usleep_range(100, 200); | |
1009 | ||
ecf2b768 MK |
1010 | if (hu->serdev) |
1011 | serdev_device_wait_until_sent(hu->serdev, | |
94d66714 MK |
1012 | msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS)); |
1013 | ||
1014 | /* Give the controller time to process the request */ | |
523760b7 | 1015 | if (qca_is_wcn399x(qca_soc_type(hu))) |
94d66714 MK |
1016 | msleep(10); |
1017 | else | |
1018 | msleep(300); | |
0ff252c1 BYTK |
1019 | |
1020 | return 0; | |
1021 | } | |
1022 | ||
05ba533c TE |
1023 | static inline void host_set_baudrate(struct hci_uart *hu, unsigned int speed) |
1024 | { | |
1025 | if (hu->serdev) | |
1026 | serdev_device_set_baudrate(hu->serdev, speed); | |
1027 | else | |
1028 | hci_uart_set_baudrate(hu, speed); | |
1029 | } | |
1030 | ||
9836b802 | 1031 | static int qca_send_power_pulse(struct hci_uart *hu, bool on) |
fa9ad876 | 1032 | { |
f9558270 | 1033 | int ret; |
94d66714 | 1034 | int timeout = msecs_to_jiffies(CMD_TRANS_TIMEOUT_MS); |
9836b802 | 1035 | u8 cmd = on ? QCA_WCN3990_POWERON_PULSE : QCA_WCN3990_POWEROFF_PULSE; |
fa9ad876 BG |
1036 | |
1037 | /* These power pulses are single byte command which are sent | |
1038 | * at required baudrate to wcn3990. On wcn3990, we have an external | |
1039 | * circuit at Tx pin which decodes the pulse sent at specific baudrate. | |
1040 | * For example, wcn3990 supports RF COEX antenna for both Wi-Fi/BT | |
1041 | * and also we use the same power inputs to turn on and off for | |
1042 | * Wi-Fi/BT. Powering up the power sources will not enable BT, until | |
1043 | * we send a power on pulse at 115200 bps. This algorithm will help to | |
1044 | * save power. Disabling hardware flow control is mandatory while | |
1045 | * sending power pulses to SoC. | |
1046 | */ | |
f9558270 | 1047 | bt_dev_dbg(hu->hdev, "sending power pulse %02x to controller", cmd); |
fa9ad876 | 1048 | |
f9558270 | 1049 | serdev_device_write_flush(hu->serdev); |
fa9ad876 | 1050 | hci_uart_set_flow_control(hu, true); |
f9558270 BG |
1051 | ret = serdev_device_write_buf(hu->serdev, &cmd, sizeof(cmd)); |
1052 | if (ret < 0) { | |
1053 | bt_dev_err(hu->hdev, "failed to send power pulse %02x", cmd); | |
1054 | return ret; | |
1055 | } | |
fa9ad876 | 1056 | |
f9558270 | 1057 | serdev_device_wait_until_sent(hu->serdev, timeout); |
fa9ad876 BG |
1058 | hci_uart_set_flow_control(hu, false); |
1059 | ||
0ebcddd8 | 1060 | /* Give to controller time to boot/shutdown */ |
ad571d72 MK |
1061 | if (on) |
1062 | msleep(100); | |
0ebcddd8 MK |
1063 | else |
1064 | msleep(10); | |
ad571d72 | 1065 | |
fa9ad876 BG |
1066 | return 0; |
1067 | } | |
1068 | ||
83d9c5e5 BG |
1069 | static unsigned int qca_get_speed(struct hci_uart *hu, |
1070 | enum qca_speed_type speed_type) | |
1071 | { | |
1072 | unsigned int speed = 0; | |
1073 | ||
1074 | if (speed_type == QCA_INIT_SPEED) { | |
1075 | if (hu->init_speed) | |
1076 | speed = hu->init_speed; | |
1077 | else if (hu->proto->init_speed) | |
1078 | speed = hu->proto->init_speed; | |
1079 | } else { | |
1080 | if (hu->oper_speed) | |
1081 | speed = hu->oper_speed; | |
1082 | else if (hu->proto->oper_speed) | |
1083 | speed = hu->proto->oper_speed; | |
1084 | } | |
1085 | ||
1086 | return speed; | |
1087 | } | |
1088 | ||
1089 | static int qca_check_speeds(struct hci_uart *hu) | |
1090 | { | |
523760b7 | 1091 | if (qca_is_wcn399x(qca_soc_type(hu))) { |
fa9ad876 BG |
1092 | if (!qca_get_speed(hu, QCA_INIT_SPEED) && |
1093 | !qca_get_speed(hu, QCA_OPER_SPEED)) | |
1094 | return -EINVAL; | |
1095 | } else { | |
1096 | if (!qca_get_speed(hu, QCA_INIT_SPEED) || | |
1097 | !qca_get_speed(hu, QCA_OPER_SPEED)) | |
1098 | return -EINVAL; | |
1099 | } | |
83d9c5e5 BG |
1100 | |
1101 | return 0; | |
1102 | } | |
1103 | ||
1104 | static int qca_set_speed(struct hci_uart *hu, enum qca_speed_type speed_type) | |
1105 | { | |
1106 | unsigned int speed, qca_baudrate; | |
78e8fa29 | 1107 | int ret = 0; |
83d9c5e5 BG |
1108 | |
1109 | if (speed_type == QCA_INIT_SPEED) { | |
1110 | speed = qca_get_speed(hu, QCA_INIT_SPEED); | |
1111 | if (speed) | |
1112 | host_set_baudrate(hu, speed); | |
1113 | } else { | |
4fdd5a4f MK |
1114 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
1115 | ||
83d9c5e5 BG |
1116 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
1117 | if (!speed) | |
1118 | return 0; | |
1119 | ||
78e8fa29 BG |
1120 | /* Disable flow control for wcn3990 to deassert RTS while |
1121 | * changing the baudrate of chip and host. | |
1122 | */ | |
523760b7 | 1123 | if (qca_is_wcn399x(soc_type)) |
78e8fa29 BG |
1124 | hci_uart_set_flow_control(hu, true); |
1125 | ||
83d9c5e5 | 1126 | qca_baudrate = qca_get_baudrate_value(speed); |
fa9ad876 | 1127 | bt_dev_dbg(hu->hdev, "Set UART speed to %d", speed); |
83d9c5e5 BG |
1128 | ret = qca_set_baudrate(hu->hdev, qca_baudrate); |
1129 | if (ret) | |
78e8fa29 | 1130 | goto error; |
83d9c5e5 BG |
1131 | |
1132 | host_set_baudrate(hu, speed); | |
78e8fa29 BG |
1133 | |
1134 | error: | |
523760b7 | 1135 | if (qca_is_wcn399x(soc_type)) |
78e8fa29 | 1136 | hci_uart_set_flow_control(hu, false); |
83d9c5e5 BG |
1137 | } |
1138 | ||
78e8fa29 | 1139 | return ret; |
83d9c5e5 BG |
1140 | } |
1141 | ||
fa9ad876 BG |
1142 | static int qca_wcn3990_init(struct hci_uart *hu) |
1143 | { | |
3e4be65e | 1144 | struct qca_serdev *qcadev; |
fa9ad876 BG |
1145 | int ret; |
1146 | ||
3e4be65e BG |
1147 | /* Check for vregs status, may be hci down has turned |
1148 | * off the voltage regulator. | |
1149 | */ | |
1150 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
1151 | if (!qcadev->bt_power->vregs_on) { | |
1152 | serdev_device_close(hu->serdev); | |
1153 | ret = qca_power_setup(hu, true); | |
1154 | if (ret) | |
1155 | return ret; | |
1156 | ||
1157 | ret = serdev_device_open(hu->serdev); | |
1158 | if (ret) { | |
1159 | bt_dev_err(hu->hdev, "failed to open port"); | |
1160 | return ret; | |
1161 | } | |
1162 | } | |
1163 | ||
fa9ad876 BG |
1164 | /* Forcefully enable wcn3990 to enter in to boot mode. */ |
1165 | host_set_baudrate(hu, 2400); | |
9836b802 | 1166 | ret = qca_send_power_pulse(hu, false); |
fa9ad876 BG |
1167 | if (ret) |
1168 | return ret; | |
1169 | ||
1170 | qca_set_speed(hu, QCA_INIT_SPEED); | |
9836b802 | 1171 | ret = qca_send_power_pulse(hu, true); |
fa9ad876 BG |
1172 | if (ret) |
1173 | return ret; | |
1174 | ||
fa9ad876 BG |
1175 | /* Now the device is in ready state to communicate with host. |
1176 | * To sync host with device we need to reopen port. | |
1177 | * Without this, we will have RTS and CTS synchronization | |
1178 | * issues. | |
1179 | */ | |
1180 | serdev_device_close(hu->serdev); | |
1181 | ret = serdev_device_open(hu->serdev); | |
1182 | if (ret) { | |
1183 | bt_dev_err(hu->hdev, "failed to open port"); | |
1184 | return ret; | |
1185 | } | |
1186 | ||
1187 | hci_uart_set_flow_control(hu, false); | |
1188 | ||
1189 | return 0; | |
1190 | } | |
1191 | ||
0ff252c1 BYTK |
1192 | static int qca_setup(struct hci_uart *hu) |
1193 | { | |
1194 | struct hci_dev *hdev = hu->hdev; | |
1195 | struct qca_data *qca = hu->priv; | |
1196 | unsigned int speed, qca_baudrate = QCA_BAUDRATE_115200; | |
4fdd5a4f | 1197 | enum qca_btsoc_type soc_type = qca_soc_type(hu); |
0ff252c1 | 1198 | int ret; |
aadebac4 | 1199 | int soc_ver = 0; |
0ff252c1 | 1200 | |
83d9c5e5 BG |
1201 | ret = qca_check_speeds(hu); |
1202 | if (ret) | |
1203 | return ret; | |
1204 | ||
0ff252c1 | 1205 | /* Patch downloading has to be done without IBS mode */ |
62a91990 | 1206 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
0ff252c1 | 1207 | |
523760b7 | 1208 | if (qca_is_wcn399x(soc_type)) { |
fa9ad876 | 1209 | bt_dev_info(hdev, "setting up wcn3990"); |
3e4be65e BG |
1210 | |
1211 | /* Enable NON_PERSISTENT_SETUP QUIRK to ensure to execute | |
1212 | * setup for every hci up. | |
1213 | */ | |
1214 | set_bit(HCI_QUIRK_NON_PERSISTENT_SETUP, &hdev->quirks); | |
5971752d | 1215 | set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks); |
3e4be65e | 1216 | hu->hdev->shutdown = qca_power_off; |
fa9ad876 BG |
1217 | ret = qca_wcn3990_init(hu); |
1218 | if (ret) | |
1219 | return ret; | |
1220 | ||
1221 | ret = qca_read_soc_version(hdev, &soc_ver); | |
1222 | if (ret) | |
1223 | return ret; | |
1224 | } else { | |
1225 | bt_dev_info(hdev, "ROME setup"); | |
1226 | qca_set_speed(hu, QCA_INIT_SPEED); | |
1227 | } | |
0ff252c1 BYTK |
1228 | |
1229 | /* Setup user speed if needed */ | |
83d9c5e5 | 1230 | speed = qca_get_speed(hu, QCA_OPER_SPEED); |
0ff252c1 | 1231 | if (speed) { |
83d9c5e5 BG |
1232 | ret = qca_set_speed(hu, QCA_OPER_SPEED); |
1233 | if (ret) | |
0ff252c1 | 1234 | return ret; |
83d9c5e5 BG |
1235 | |
1236 | qca_baudrate = qca_get_baudrate_value(speed); | |
0ff252c1 BYTK |
1237 | } |
1238 | ||
523760b7 | 1239 | if (!qca_is_wcn399x(soc_type)) { |
fa9ad876 BG |
1240 | /* Get QCA version information */ |
1241 | ret = qca_read_soc_version(hdev, &soc_ver); | |
1242 | if (ret) | |
1243 | return ret; | |
1244 | } | |
aadebac4 BG |
1245 | |
1246 | bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver); | |
0ff252c1 | 1247 | /* Setup patch / NVM configurations */ |
4fdd5a4f | 1248 | ret = qca_uart_setup(hdev, qca_baudrate, soc_type, soc_ver); |
0ff252c1 | 1249 | if (!ret) { |
62a91990 | 1250 | set_bit(QCA_IBS_ENABLED, &qca->flags); |
0ff252c1 | 1251 | qca_debugfs_init(hdev); |
ba8f3597 LP |
1252 | } else if (ret == -ENOENT) { |
1253 | /* No patch/nvm-config found, run with original fw/config */ | |
1254 | ret = 0; | |
7dc5fe08 AP |
1255 | } else if (ret == -EAGAIN) { |
1256 | /* | |
1257 | * Userspace firmware loader will return -EAGAIN in case no | |
1258 | * patch/nvm-config is found, so run with original fw/config. | |
1259 | */ | |
1260 | ret = 0; | |
0ff252c1 BYTK |
1261 | } |
1262 | ||
1263 | /* Setup bdaddr */ | |
523760b7 | 1264 | if (qca_is_wcn399x(soc_type)) |
5c0a1001 BG |
1265 | hu->hdev->set_bdaddr = qca_set_bdaddr; |
1266 | else | |
1267 | hu->hdev->set_bdaddr = qca_set_bdaddr_rome; | |
0ff252c1 BYTK |
1268 | |
1269 | return ret; | |
1270 | } | |
1271 | ||
1272 | static struct hci_uart_proto qca_proto = { | |
1273 | .id = HCI_UART_QCA, | |
1274 | .name = "QCA", | |
aee61f7a | 1275 | .manufacturer = 29, |
0ff252c1 BYTK |
1276 | .init_speed = 115200, |
1277 | .oper_speed = 3000000, | |
1278 | .open = qca_open, | |
1279 | .close = qca_close, | |
1280 | .flush = qca_flush, | |
1281 | .setup = qca_setup, | |
1282 | .recv = qca_recv, | |
1283 | .enqueue = qca_enqueue, | |
1284 | .dequeue = qca_dequeue, | |
1285 | }; | |
1286 | ||
523760b7 | 1287 | static const struct qca_vreg_data qca_soc_data_wcn3990 = { |
fa9ad876 BG |
1288 | .soc_type = QCA_WCN3990, |
1289 | .vregs = (struct qca_vreg []) { | |
1290 | { "vddio", 1800000, 1900000, 15000 }, | |
1291 | { "vddxo", 1800000, 1900000, 80000 }, | |
1292 | { "vddrf", 1300000, 1350000, 300000 }, | |
1293 | { "vddch0", 3300000, 3400000, 450000 }, | |
1294 | }, | |
1295 | .num_vregs = 4, | |
1296 | }; | |
1297 | ||
523760b7 HB |
1298 | static const struct qca_vreg_data qca_soc_data_wcn3998 = { |
1299 | .soc_type = QCA_WCN3998, | |
1300 | .vregs = (struct qca_vreg []) { | |
1301 | { "vddio", 1800000, 1900000, 10000 }, | |
1302 | { "vddxo", 1800000, 1900000, 80000 }, | |
1303 | { "vddrf", 1300000, 1352000, 300000 }, | |
1304 | { "vddch0", 3300000, 3300000, 450000 }, | |
1305 | }, | |
1306 | .num_vregs = 4, | |
1307 | }; | |
1308 | ||
c2d78273 | 1309 | static void qca_power_shutdown(struct hci_uart *hu) |
fa9ad876 | 1310 | { |
035a960e BG |
1311 | struct qca_data *qca = hu->priv; |
1312 | unsigned long flags; | |
1313 | ||
1314 | /* From this point we go into power off state. But serial port is | |
1315 | * still open, stop queueing the IBS data and flush all the buffered | |
1316 | * data in skb's. | |
1317 | */ | |
1318 | spin_lock_irqsave(&qca->hci_ibs_lock, flags); | |
62a91990 | 1319 | clear_bit(QCA_IBS_ENABLED, &qca->flags); |
035a960e BG |
1320 | qca_flush(hu); |
1321 | spin_unlock_irqrestore(&qca->hci_ibs_lock, flags); | |
1322 | ||
fa9ad876 | 1323 | host_set_baudrate(hu, 2400); |
9836b802 | 1324 | qca_send_power_pulse(hu, false); |
fa9ad876 BG |
1325 | qca_power_setup(hu, false); |
1326 | } | |
1327 | ||
3e4be65e BG |
1328 | static int qca_power_off(struct hci_dev *hdev) |
1329 | { | |
1330 | struct hci_uart *hu = hci_get_drvdata(hdev); | |
1331 | ||
1332 | qca_power_shutdown(hu); | |
1333 | return 0; | |
1334 | } | |
1335 | ||
fa9ad876 BG |
1336 | static int qca_enable_regulator(struct qca_vreg vregs, |
1337 | struct regulator *regulator) | |
1338 | { | |
1339 | int ret; | |
1340 | ||
1341 | ret = regulator_set_voltage(regulator, vregs.min_uV, | |
1342 | vregs.max_uV); | |
1343 | if (ret) | |
1344 | return ret; | |
1345 | ||
1346 | if (vregs.load_uA) | |
1347 | ret = regulator_set_load(regulator, | |
1348 | vregs.load_uA); | |
1349 | ||
1350 | if (ret) | |
1351 | return ret; | |
1352 | ||
1353 | return regulator_enable(regulator); | |
1354 | ||
1355 | } | |
1356 | ||
1357 | static void qca_disable_regulator(struct qca_vreg vregs, | |
1358 | struct regulator *regulator) | |
1359 | { | |
1360 | regulator_disable(regulator); | |
1361 | regulator_set_voltage(regulator, 0, vregs.max_uV); | |
1362 | if (vregs.load_uA) | |
1363 | regulator_set_load(regulator, 0); | |
1364 | ||
1365 | } | |
1366 | ||
1367 | static int qca_power_setup(struct hci_uart *hu, bool on) | |
1368 | { | |
1369 | struct qca_vreg *vregs; | |
1370 | struct regulator_bulk_data *vreg_bulk; | |
1371 | struct qca_serdev *qcadev; | |
1372 | int i, num_vregs, ret = 0; | |
1373 | ||
1374 | qcadev = serdev_device_get_drvdata(hu->serdev); | |
1375 | if (!qcadev || !qcadev->bt_power || !qcadev->bt_power->vreg_data || | |
1376 | !qcadev->bt_power->vreg_bulk) | |
1377 | return -EINVAL; | |
1378 | ||
1379 | vregs = qcadev->bt_power->vreg_data->vregs; | |
1380 | vreg_bulk = qcadev->bt_power->vreg_bulk; | |
1381 | num_vregs = qcadev->bt_power->vreg_data->num_vregs; | |
1382 | BT_DBG("on: %d", on); | |
1383 | if (on && !qcadev->bt_power->vregs_on) { | |
1384 | for (i = 0; i < num_vregs; i++) { | |
1385 | ret = qca_enable_regulator(vregs[i], | |
1386 | vreg_bulk[i].consumer); | |
1387 | if (ret) | |
1388 | break; | |
1389 | } | |
1390 | ||
1391 | if (ret) { | |
1392 | BT_ERR("failed to enable regulator:%s", vregs[i].name); | |
1393 | /* turn off regulators which are enabled */ | |
1394 | for (i = i - 1; i >= 0; i--) | |
1395 | qca_disable_regulator(vregs[i], | |
1396 | vreg_bulk[i].consumer); | |
1397 | } else { | |
1398 | qcadev->bt_power->vregs_on = true; | |
1399 | } | |
1400 | } else if (!on && qcadev->bt_power->vregs_on) { | |
1401 | /* turn off regulator in reverse order */ | |
1402 | i = qcadev->bt_power->vreg_data->num_vregs - 1; | |
1403 | for ( ; i >= 0; i--) | |
1404 | qca_disable_regulator(vregs[i], vreg_bulk[i].consumer); | |
1405 | ||
1406 | qcadev->bt_power->vregs_on = false; | |
1407 | } | |
1408 | ||
1409 | return ret; | |
1410 | } | |
1411 | ||
1412 | static int qca_init_regulators(struct qca_power *qca, | |
1413 | const struct qca_vreg *vregs, size_t num_vregs) | |
1414 | { | |
1415 | int i; | |
1416 | ||
329e0989 | 1417 | qca->vreg_bulk = devm_kcalloc(qca->dev, num_vregs, |
fa9ad876 BG |
1418 | sizeof(struct regulator_bulk_data), |
1419 | GFP_KERNEL); | |
1420 | if (!qca->vreg_bulk) | |
1421 | return -ENOMEM; | |
1422 | ||
1423 | for (i = 0; i < num_vregs; i++) | |
1424 | qca->vreg_bulk[i].supply = vregs[i].name; | |
1425 | ||
1426 | return devm_regulator_bulk_get(qca->dev, num_vregs, qca->vreg_bulk); | |
1427 | } | |
1428 | ||
05ba533c TE |
1429 | static int qca_serdev_probe(struct serdev_device *serdev) |
1430 | { | |
1431 | struct qca_serdev *qcadev; | |
fa9ad876 | 1432 | const struct qca_vreg_data *data; |
05ba533c TE |
1433 | int err; |
1434 | ||
1435 | qcadev = devm_kzalloc(&serdev->dev, sizeof(*qcadev), GFP_KERNEL); | |
1436 | if (!qcadev) | |
1437 | return -ENOMEM; | |
1438 | ||
1439 | qcadev->serdev_hu.serdev = serdev; | |
fa9ad876 | 1440 | data = of_device_get_match_data(&serdev->dev); |
05ba533c | 1441 | serdev_device_set_drvdata(serdev, qcadev); |
523760b7 HB |
1442 | if (data && qca_is_wcn399x(data->soc_type)) { |
1443 | qcadev->btsoc_type = data->soc_type; | |
fa9ad876 BG |
1444 | qcadev->bt_power = devm_kzalloc(&serdev->dev, |
1445 | sizeof(struct qca_power), | |
1446 | GFP_KERNEL); | |
1447 | if (!qcadev->bt_power) | |
1448 | return -ENOMEM; | |
1449 | ||
1450 | qcadev->bt_power->dev = &serdev->dev; | |
1451 | qcadev->bt_power->vreg_data = data; | |
1452 | err = qca_init_regulators(qcadev->bt_power, data->vregs, | |
1453 | data->num_vregs); | |
1454 | if (err) { | |
1455 | BT_ERR("Failed to init regulators:%d", err); | |
1456 | goto out; | |
1457 | } | |
05ba533c | 1458 | |
fa9ad876 | 1459 | qcadev->bt_power->vregs_on = false; |
05ba533c | 1460 | |
fa9ad876 BG |
1461 | device_property_read_u32(&serdev->dev, "max-speed", |
1462 | &qcadev->oper_speed); | |
1463 | if (!qcadev->oper_speed) | |
1464 | BT_DBG("UART will pick default operating speed"); | |
05ba533c | 1465 | |
fa9ad876 BG |
1466 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); |
1467 | if (err) { | |
1468 | BT_ERR("wcn3990 serdev registration failed"); | |
1469 | goto out; | |
1470 | } | |
1471 | } else { | |
1472 | qcadev->btsoc_type = QCA_ROME; | |
1473 | qcadev->bt_en = devm_gpiod_get(&serdev->dev, "enable", | |
1474 | GPIOD_OUT_LOW); | |
1475 | if (IS_ERR(qcadev->bt_en)) { | |
1476 | dev_err(&serdev->dev, "failed to acquire enable gpio\n"); | |
1477 | return PTR_ERR(qcadev->bt_en); | |
1478 | } | |
05ba533c | 1479 | |
fa9ad876 BG |
1480 | qcadev->susclk = devm_clk_get(&serdev->dev, NULL); |
1481 | if (IS_ERR(qcadev->susclk)) { | |
1482 | dev_err(&serdev->dev, "failed to acquire clk\n"); | |
1483 | return PTR_ERR(qcadev->susclk); | |
1484 | } | |
05ba533c | 1485 | |
fa9ad876 BG |
1486 | err = clk_set_rate(qcadev->susclk, SUSCLK_RATE_32KHZ); |
1487 | if (err) | |
1488 | return err; | |
1489 | ||
1490 | err = clk_prepare_enable(qcadev->susclk); | |
1491 | if (err) | |
1492 | return err; | |
1493 | ||
1494 | err = hci_uart_register_device(&qcadev->serdev_hu, &qca_proto); | |
1495 | if (err) | |
1496 | clk_disable_unprepare(qcadev->susclk); | |
1497 | } | |
1498 | ||
1499 | out: return err; | |
05ba533c | 1500 | |
05ba533c TE |
1501 | } |
1502 | ||
1503 | static void qca_serdev_remove(struct serdev_device *serdev) | |
1504 | { | |
1505 | struct qca_serdev *qcadev = serdev_device_get_drvdata(serdev); | |
1506 | ||
523760b7 | 1507 | if (qca_is_wcn399x(qcadev->btsoc_type)) |
c2d78273 | 1508 | qca_power_shutdown(&qcadev->serdev_hu); |
fa9ad876 BG |
1509 | else |
1510 | clk_disable_unprepare(qcadev->susclk); | |
05ba533c | 1511 | |
fa9ad876 | 1512 | hci_uart_unregister_device(&qcadev->serdev_hu); |
05ba533c TE |
1513 | } |
1514 | ||
1515 | static const struct of_device_id qca_bluetooth_of_match[] = { | |
1516 | { .compatible = "qcom,qca6174-bt" }, | |
523760b7 HB |
1517 | { .compatible = "qcom,wcn3990-bt", .data = &qca_soc_data_wcn3990}, |
1518 | { .compatible = "qcom,wcn3998-bt", .data = &qca_soc_data_wcn3998}, | |
05ba533c TE |
1519 | { /* sentinel */ } |
1520 | }; | |
1521 | MODULE_DEVICE_TABLE(of, qca_bluetooth_of_match); | |
1522 | ||
1523 | static struct serdev_device_driver qca_serdev_driver = { | |
1524 | .probe = qca_serdev_probe, | |
1525 | .remove = qca_serdev_remove, | |
1526 | .driver = { | |
1527 | .name = "hci_uart_qca", | |
1528 | .of_match_table = qca_bluetooth_of_match, | |
1529 | }, | |
1530 | }; | |
1531 | ||
0ff252c1 BYTK |
1532 | int __init qca_init(void) |
1533 | { | |
05ba533c TE |
1534 | serdev_device_driver_register(&qca_serdev_driver); |
1535 | ||
0ff252c1 BYTK |
1536 | return hci_uart_register_proto(&qca_proto); |
1537 | } | |
1538 | ||
1539 | int __exit qca_deinit(void) | |
1540 | { | |
05ba533c TE |
1541 | serdev_device_driver_unregister(&qca_serdev_driver); |
1542 | ||
0ff252c1 BYTK |
1543 | return hci_uart_unregister_proto(&qca_proto); |
1544 | } |