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Bluetooth: qca: Support downloading board id specific NVM for WCN7850
[linux-2.6-block.git] / drivers / bluetooth / btqca.c
CommitLineData
45051539 1// SPDX-License-Identifier: GPL-2.0-only
83e81961
BYTK		 2/*
3 * Bluetooth supports for Qualcomm Atheros chips
4 *
5 * Copyright (c) 2015 The Linux Foundation. All rights reserved.
83e81961
BYTK		 6 */
7#include <linux/module.h>
8#include <linux/firmware.h>
b6459415 9#include <linux/vmalloc.h>
83e81961
BYTK		 10
11#include <net/bluetooth/bluetooth.h>
12#include <net/bluetooth/hci_core.h>
13
14#include "btqca.h"
15
16#define VERSION "0.1"
17
059924fd 18int qca_read_soc_version(struct hci_dev *hdev, struct qca_btsoc_version *ver,
7d250a06 19 enum qca_btsoc_type soc_type)
83e81961
BYTK		 20{
21 struct sk_buff *skb;
22 struct edl_event_hdr *edl;
83e81961
BYTK		 23 char cmd;
24 int err = 0;
7d250a06
BG		 25 u8 event_type = HCI_EV_VENDOR;
26 u8 rlen = sizeof(*edl) + sizeof(*ver);
27 u8 rtype = EDL_APP_VER_RES_EVT;
83e81961 28
ba493d4f 29 bt_dev_dbg(hdev, "QCA Version Request");
83e81961 30
7d250a06
BG		 31 /* Unlike other SoC's sending version command response as payload to
32 * VSE event. WCN3991 sends version command response as a payload to
33 * command complete event.
34 */
e5d6468f 35 if (soc_type >= QCA_WCN3991) {
7d250a06
BG		 36 event_type = 0;
37 rlen += 1;
38 rtype = EDL_PATCH_VER_REQ_CMD;
39 }
40
83e81961
BYTK		 41 cmd = EDL_PATCH_VER_REQ_CMD;
42 skb = __hci_cmd_sync_ev(hdev, EDL_PATCH_CMD_OPCODE, EDL_PATCH_CMD_LEN,
7d250a06 43 &cmd, event_type, HCI_INIT_TIMEOUT);
83e81961
BYTK		 44 if (IS_ERR(skb)) {
45 err = PTR_ERR(skb);
ba493d4f
BG		 46 bt_dev_err(hdev, "Reading QCA version information failed (%d)",
47 err);
83e81961
BYTK		 48 return err;
49 }
50
7d250a06 51 if (skb->len != rlen) {
ba493d4f 52 bt_dev_err(hdev, "QCA Version size mismatch len %d", skb->len);
83e81961
BYTK		 53 err = -EILSEQ;
54 goto out;
55 }
56
57 edl = (struct edl_event_hdr *)(skb->data);
0676cab4 58 if (!edl) {
ba493d4f 59 bt_dev_err(hdev, "QCA TLV with no header");
83e81961
BYTK		 60 err = -EILSEQ;
61 goto out;
62 }
63
64 if (edl->cresp != EDL_CMD_REQ_RES_EVT ||
7d250a06 65 edl->rtype != rtype) {
ba493d4f
BG		 66 bt_dev_err(hdev, "QCA Wrong packet received %d %d", edl->cresp,
67 edl->rtype);
83e81961
BYTK		 68 err = -EIO;
69 goto out;
70 }
71
e5d6468f 72 if (soc_type >= QCA_WCN3991)
059924fd
VLNG		 73 memcpy(ver, edl->data + 1, sizeof(*ver));
74 else
75 memcpy(ver, &edl->data, sizeof(*ver));
83e81961 76
4942857b
ZH		 77 bt_dev_info(hdev, "QCA Product ID :0x%08x",
78 le32_to_cpu(ver->product_id));
79 bt_dev_info(hdev, "QCA SOC Version :0x%08x",
80 le32_to_cpu(ver->soc_id));
81 bt_dev_info(hdev, "QCA ROM Version :0x%08x",
82 le16_to_cpu(ver->rom_ver));
83 bt_dev_info(hdev, "QCA Patch Version:0x%08x",
84 le16_to_cpu(ver->patch_ver));
83e81961 85
059924fd 86 if (ver->soc_id == 0 || ver->rom_ver == 0)
aadebac4 87 err = -EILSEQ;
83e81961
BYTK		 88
89out:
90 kfree_skb(skb);
aadebac4
BG		 91 if (err)
92 bt_dev_err(hdev, "QCA Failed to get version (%d)", err);
83e81961
BYTK		 93
94 return err;
95}
ba493d4f 96EXPORT_SYMBOL_GPL(qca_read_soc_version);
83e81961 97
c0187b0b
VLNG		 98static int qca_read_fw_build_info(struct hci_dev *hdev)
99{
100 struct sk_buff *skb;
101 struct edl_event_hdr *edl;
cda0d6a1
JH		 102 char *build_label;
103 char cmd;
c0187b0b
VLNG		 104 int build_lbl_len, err = 0;
105
106 bt_dev_dbg(hdev, "QCA read fw build info");
107
108 cmd = EDL_GET_BUILD_INFO_CMD;
109 skb = __hci_cmd_sync_ev(hdev, EDL_PATCH_CMD_OPCODE, EDL_PATCH_CMD_LEN,
110 &cmd, 0, HCI_INIT_TIMEOUT);
111 if (IS_ERR(skb)) {
112 err = PTR_ERR(skb);
113 bt_dev_err(hdev, "Reading QCA fw build info failed (%d)",
114 err);
115 return err;
116 }
117
cda0d6a1
JH		 118 if (skb->len < sizeof(*edl)) {
119 err = -EILSEQ;
120 goto out;
121 }
122
c0187b0b
VLNG		 123 edl = (struct edl_event_hdr *)(skb->data);
124 if (!edl) {
125 bt_dev_err(hdev, "QCA read fw build info with no header");
126 err = -EILSEQ;
127 goto out;
128 }
129
130 if (edl->cresp != EDL_CMD_REQ_RES_EVT ||
131 edl->rtype != EDL_GET_BUILD_INFO_CMD) {
132 bt_dev_err(hdev, "QCA Wrong packet received %d %d", edl->cresp,
133 edl->rtype);
134 err = -EIO;
135 goto out;
136 }
137
cda0d6a1
JH		 138 if (skb->len < sizeof(*edl) + 1) {
139 err = -EILSEQ;
140 goto out;
141 }
142
c0187b0b 143 build_lbl_len = edl->data[0];
cda0d6a1
JH		 144
145 if (skb->len < sizeof(*edl) + 1 + build_lbl_len) {
146 err = -EILSEQ;
147 goto out;
c0187b0b
VLNG		 148 }
149
cda0d6a1
JH		 150 build_label = kstrndup(&edl->data[1], build_lbl_len, GFP_KERNEL);
151 if (!build_label)
152 goto out;
153
c0187b0b
VLNG		 154 hci_set_fw_info(hdev, "%s", build_label);
155
cda0d6a1 156 kfree(build_label);
c0187b0b
VLNG		 157out:
158 kfree_skb(skb);
159 return err;
160}
161
4fac8a7a
STA		 162static int qca_send_patch_config_cmd(struct hci_dev *hdev)
163{
164 const u8 cmd[] = { EDL_PATCH_CONFIG_CMD, 0x01, 0, 0, 0 };
165 struct sk_buff *skb;
166 struct edl_event_hdr *edl;
167 int err;
168
169 bt_dev_dbg(hdev, "QCA Patch config");
170
171 skb = __hci_cmd_sync_ev(hdev, EDL_PATCH_CMD_OPCODE, sizeof(cmd),
c0dbc560 172 cmd, 0, HCI_INIT_TIMEOUT);
4fac8a7a
STA		 173 if (IS_ERR(skb)) {
174 err = PTR_ERR(skb);
175 bt_dev_err(hdev, "Sending QCA Patch config failed (%d)", err);
176 return err;
177 }
178
179 if (skb->len != 2) {
180 bt_dev_err(hdev, "QCA Patch config cmd size mismatch len %d", skb->len);
181 err = -EILSEQ;
182 goto out;
183 }
184
185 edl = (struct edl_event_hdr *)(skb->data);
186 if (!edl) {
187 bt_dev_err(hdev, "QCA Patch config with no header");
188 err = -EILSEQ;
189 goto out;
190 }
191
192 if (edl->cresp != EDL_PATCH_CONFIG_RES_EVT || edl->rtype != EDL_PATCH_CONFIG_CMD) {
193 bt_dev_err(hdev, "QCA Wrong packet received %d %d", edl->cresp,
194 edl->rtype);
195 err = -EIO;
196 goto out;
197 }
198
199 err = 0;
200
201out:
202 kfree_skb(skb);
203 return err;
204}
205
ba493d4f 206static int qca_send_reset(struct hci_dev *hdev)
83e81961
BYTK		 207{
208 struct sk_buff *skb;
209 int err;
210
ba493d4f 211 bt_dev_dbg(hdev, "QCA HCI_RESET");
83e81961
BYTK		 212
213 skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT);
214 if (IS_ERR(skb)) {
215 err = PTR_ERR(skb);
ba493d4f 216 bt_dev_err(hdev, "QCA Reset failed (%d)", err);
83e81961
BYTK		 217 return err;
218 }
219
220 kfree_skb(skb);
221
222 return 0;
223}
224
a7f8dedb
TJ		 225static int qca_read_fw_board_id(struct hci_dev *hdev, u16 *bid)
226{
227 u8 cmd;
228 struct sk_buff *skb;
229 struct edl_event_hdr *edl;
230 int err = 0;
231
232 cmd = EDL_GET_BID_REQ_CMD;
233 skb = __hci_cmd_sync_ev(hdev, EDL_PATCH_CMD_OPCODE, EDL_PATCH_CMD_LEN,
234 &cmd, 0, HCI_INIT_TIMEOUT);
235 if (IS_ERR(skb)) {
236 err = PTR_ERR(skb);
237 bt_dev_err(hdev, "Reading QCA board ID failed (%d)", err);
238 return err;
239 }
240
241 edl = skb_pull_data(skb, sizeof(*edl));
242 if (!edl) {
243 bt_dev_err(hdev, "QCA read board ID with no header");
244 err = -EILSEQ;
245 goto out;
246 }
247
248 if (edl->cresp != EDL_CMD_REQ_RES_EVT ||
249 edl->rtype != EDL_GET_BID_REQ_CMD) {
250 bt_dev_err(hdev, "QCA Wrong packet: %d %d", edl->cresp, edl->rtype);
251 err = -EIO;
252 goto out;
253 }
254
0adcf6be
JH		 255 if (skb->len < 3) {
256 err = -EILSEQ;
257 goto out;
258 }
259
a7f8dedb
TJ		 260 *bid = (edl->data[1] << 8) + edl->data[2];
261 bt_dev_dbg(hdev, "%s: bid = %x", __func__, *bid);
262
263out:
264 kfree_skb(skb);
265 return err;
266}
267
a2780889
HB		 268int qca_send_pre_shutdown_cmd(struct hci_dev *hdev)
269{
270 struct sk_buff *skb;
271 int err;
272
273 bt_dev_dbg(hdev, "QCA pre shutdown cmd");
274
010376ab
HB		 275 skb = __hci_cmd_sync_ev(hdev, QCA_PRE_SHUTDOWN_CMD, 0,
276 NULL, HCI_EV_CMD_COMPLETE, HCI_INIT_TIMEOUT);
277
a2780889
HB		 278 if (IS_ERR(skb)) {
279 err = PTR_ERR(skb);
280 bt_dev_err(hdev, "QCA preshutdown_cmd failed (%d)", err);
281 return err;
282 }
283
284 kfree_skb(skb);
285
286 return 0;
287}
288EXPORT_SYMBOL_GPL(qca_send_pre_shutdown_cmd);
289
2e4edfa1 290static int qca_tlv_check_data(struct hci_dev *hdev,
ecf6b2d9 291 struct qca_fw_config *config,
2e4edfa1
JH		 292 u8 *fw_data, size_t fw_size,
293 enum qca_btsoc_type soc_type)
83e81961
BYTK		 294{
295 const u8 *data;
296 u32 type_len;
297 u16 tag_id, tag_len;
298 int idx, length;
299 struct tlv_type_hdr *tlv;
300 struct tlv_type_patch *tlv_patch;
301 struct tlv_type_nvm *tlv_nvm;
b6388254 302 uint8_t nvm_baud_rate = config->user_baud_rate;
a112d3c7 303 u8 type;
83e81961 304
e303d124
BG		 305 config->dnld_mode = QCA_SKIP_EVT_NONE;
306 config->dnld_type = QCA_SKIP_EVT_NONE;
6e03126a 307
83e81961 308 switch (config->type) {
ecf6b2d9 309 case ELF_TYPE_PATCH:
2e4edfa1
JH		 310 if (fw_size < 7)
311 return -EINVAL;
312
ecf6b2d9
VLNG		 313 config->dnld_mode = QCA_SKIP_EVT_VSE_CC;
314 config->dnld_type = QCA_SKIP_EVT_VSE_CC;
315
316 bt_dev_dbg(hdev, "File Class : 0x%x", fw_data[4]);
317 bt_dev_dbg(hdev, "Data Encoding : 0x%x", fw_data[5]);
318 bt_dev_dbg(hdev, "File version : 0x%x", fw_data[6]);
319 break;
83e81961 320 case TLV_TYPE_PATCH:
2e4edfa1
JH		 321 if (fw_size < sizeof(struct tlv_type_hdr) + sizeof(struct tlv_type_patch))
322 return -EINVAL;
323
ecf6b2d9
VLNG		 324 tlv = (struct tlv_type_hdr *)fw_data;
325 type_len = le32_to_cpu(tlv->type_len);
83e81961 326 tlv_patch = (struct tlv_type_patch *)tlv->data;
6e03126a
LP		 327
328 /* For Rome version 1.1 to 3.1, all segment commands
329 * are acked by a vendor specific event (VSE).
330 * For Rome >= 3.2, the download mode field indicates
331 * if VSE is skipped by the controller.
332 * In case VSE is skipped, only the last segment is acked.
333 */
334 config->dnld_mode = tlv_patch->download_mode;
32646db8 335 config->dnld_type = config->dnld_mode;
6e03126a 336
ecf6b2d9 337 BT_DBG("TLV Type\t\t : 0x%x", type_len & 0x000000ff);
6e03126a 338 BT_DBG("Total Length : %d bytes",
83e81961 339 le32_to_cpu(tlv_patch->total_size));
6e03126a 340 BT_DBG("Patch Data Length : %d bytes",
83e81961
BYTK		 341 le32_to_cpu(tlv_patch->data_length));
342 BT_DBG("Signing Format Version : 0x%x",
343 tlv_patch->format_version);
6e03126a 344 BT_DBG("Signature Algorithm : 0x%x",
83e81961 345 tlv_patch->signature);
6e03126a
LP		 346 BT_DBG("Download mode : 0x%x",
347 tlv_patch->download_mode);
348 BT_DBG("Reserved : 0x%x",
349 tlv_patch->reserved1);
350 BT_DBG("Product ID : 0x%04x",
83e81961 351 le16_to_cpu(tlv_patch->product_id));
6e03126a 352 BT_DBG("Rom Build Version : 0x%04x",
83e81961 353 le16_to_cpu(tlv_patch->rom_build));
6e03126a 354 BT_DBG("Patch Version : 0x%04x",
83e81961 355 le16_to_cpu(tlv_patch->patch_version));
6e03126a 356 BT_DBG("Reserved : 0x%x",
83e81961 357 le16_to_cpu(tlv_patch->reserved2));
6e03126a 358 BT_DBG("Patch Entry Address : 0x%x",
83e81961
BYTK		 359 le32_to_cpu(tlv_patch->entry));
360 break;
361
362 case TLV_TYPE_NVM:
2e4edfa1
JH		 363 if (fw_size < sizeof(struct tlv_type_hdr))
364 return -EINVAL;
365
ecf6b2d9
VLNG		 366 tlv = (struct tlv_type_hdr *)fw_data;
367
368 type_len = le32_to_cpu(tlv->type_len);
a112d3c7
JH		 369 length = type_len >> 8;
370 type = type_len & 0xff;
ecf6b2d9 371
a112d3c7
JH		 372 /* Some NVM files have more than one set of tags, only parse
373 * the first set when it has type 2 for now. When there is
374 * more than one set there is an enclosing header of type 4.
375 */
376 if (type == 4) {
377 if (fw_size < 2 * sizeof(struct tlv_type_hdr))
378 return -EINVAL;
379
380 tlv++;
381
382 type_len = le32_to_cpu(tlv->type_len);
383 length = type_len >> 8;
384 type = type_len & 0xff;
385 }
386
387 BT_DBG("TLV Type\t\t : 0x%x", type);
ecf6b2d9
VLNG		 388 BT_DBG("Length\t\t : %d bytes", length);
389
a112d3c7
JH		 390 if (type != 2)
391 break;
392
2e4edfa1
JH		 393 if (fw_size < length + (tlv->data - fw_data))
394 return -EINVAL;
395
83e81961
BYTK		 396 idx = 0;
397 data = tlv->data;
2e4edfa1 398 while (idx < length - sizeof(struct tlv_type_nvm)) {
83e81961
BYTK		 399 tlv_nvm = (struct tlv_type_nvm *)(data + idx);
400
401 tag_id = le16_to_cpu(tlv_nvm->tag_id);
402 tag_len = le16_to_cpu(tlv_nvm->tag_len);
403
2e4edfa1
JH		 404 if (length < idx + sizeof(struct tlv_type_nvm) + tag_len)
405 return -EINVAL;
406
83e81961
BYTK		 407 /* Update NVM tags as needed */
408 switch (tag_id) {
dd336649
JH		 409 case EDL_TAG_ID_BD_ADDR:
410 if (tag_len != sizeof(bdaddr_t))
411 return -EINVAL;
412
413 memcpy(&config->bdaddr, tlv_nvm->data, sizeof(bdaddr_t));
414
415 break;
416
83e81961 417 case EDL_TAG_ID_HCI:
2e4edfa1
JH		 418 if (tag_len < 3)
419 return -EINVAL;
420
83e81961
BYTK		 421 /* HCI transport layer parameters
422 * enabling software inband sleep
423 * onto controller side.
424 */
425 tlv_nvm->data[0] |= 0x80;
426
427 /* UART Baud Rate */
e5d6468f 428 if (soc_type >= QCA_WCN3991)
b6388254
RL		 429 tlv_nvm->data[1] = nvm_baud_rate;
430 else
431 tlv_nvm->data[2] = nvm_baud_rate;
83e81961
BYTK		 432
433 break;
434
435 case EDL_TAG_ID_DEEP_SLEEP:
2e4edfa1
JH		 436 if (tag_len < 1)
437 return -EINVAL;
438
83e81961
BYTK		 439 /* Sleep enable mask
440 * enabling deep sleep feature on controller.
441 */
442 tlv_nvm->data[0] |= 0x01;
443
444 break;
445 }
446
2e4edfa1 447 idx += sizeof(struct tlv_type_nvm) + tag_len;
83e81961
BYTK		 448 }
449 break;
450
451 default:
452 BT_ERR("Unknown TLV type %d", config->type);
2e4edfa1 453 return -EINVAL;
83e81961 454 }
2e4edfa1
JH		 455
456 return 0;
83e81961
BYTK		 457}
458
ba493d4f 459static int qca_tlv_send_segment(struct hci_dev *hdev, int seg_size,
7d250a06
BG		 460 const u8 *data, enum qca_tlv_dnld_mode mode,
461 enum qca_btsoc_type soc_type)
83e81961
BYTK		 462{
463 struct sk_buff *skb;
464 struct edl_event_hdr *edl;
465 struct tlv_seg_resp *tlv_resp;
466 u8 cmd[MAX_SIZE_PER_TLV_SEGMENT + 2];
467 int err = 0;
7d250a06
BG		 468 u8 event_type = HCI_EV_VENDOR;
469 u8 rlen = (sizeof(*edl) + sizeof(*tlv_resp));
470 u8 rtype = EDL_TVL_DNLD_RES_EVT;
83e81961 471
83e81961
BYTK		 472 cmd[0] = EDL_PATCH_TLV_REQ_CMD;
473 cmd[1] = seg_size;
474 memcpy(cmd + 2, data, seg_size);
475
e303d124 476 if (mode == QCA_SKIP_EVT_VSE_CC || mode == QCA_SKIP_EVT_VSE)
6e03126a
LP		 477 return __hci_cmd_send(hdev, EDL_PATCH_CMD_OPCODE, seg_size + 2,
478 cmd);
479
7d250a06
BG		 480 /* Unlike other SoC's sending version command response as payload to
481 * VSE event. WCN3991 sends version command response as a payload to
482 * command complete event.
483 */
e5d6468f 484 if (soc_type >= QCA_WCN3991) {
7d250a06
BG		 485 event_type = 0;
486 rlen = sizeof(*edl);
487 rtype = EDL_PATCH_TLV_REQ_CMD;
488 }
489
83e81961 490 skb = __hci_cmd_sync_ev(hdev, EDL_PATCH_CMD_OPCODE, seg_size + 2, cmd,
7d250a06 491 event_type, HCI_INIT_TIMEOUT);
83e81961
BYTK		 492 if (IS_ERR(skb)) {
493 err = PTR_ERR(skb);
ba493d4f 494 bt_dev_err(hdev, "QCA Failed to send TLV segment (%d)", err);
83e81961
BYTK		 495 return err;
496 }
497
7d250a06 498 if (skb->len != rlen) {
ba493d4f 499 bt_dev_err(hdev, "QCA TLV response size mismatch");
83e81961
BYTK		 500 err = -EILSEQ;
501 goto out;
502 }
503
504 edl = (struct edl_event_hdr *)(skb->data);
0676cab4 505 if (!edl) {
ba493d4f 506 bt_dev_err(hdev, "TLV with no header");
83e81961
BYTK		 507 err = -EILSEQ;
508 goto out;
509 }
510
7d250a06
BG		 511 if (edl->cresp != EDL_CMD_REQ_RES_EVT || edl->rtype != rtype) {
512 bt_dev_err(hdev, "QCA TLV with error stat 0x%x rtype 0x%x",
513 edl->cresp, edl->rtype);
514 err = -EIO;
515 }
83e81961 516
e5d6468f 517 if (soc_type >= QCA_WCN3991)
7d250a06
BG		 518 goto out;
519
520 tlv_resp = (struct tlv_seg_resp *)(edl->data);
521 if (tlv_resp->result) {
ba493d4f
BG		 522 bt_dev_err(hdev, "QCA TLV with error stat 0x%x rtype 0x%x (0x%x)",
523 edl->cresp, edl->rtype, tlv_resp->result);
83e81961
BYTK		 524 }
525
526out:
527 kfree_skb(skb);
528
529 return err;
530}
531
32646db8
BG		 532static int qca_inject_cmd_complete_event(struct hci_dev *hdev)
533{
534 struct hci_event_hdr *hdr;
535 struct hci_ev_cmd_complete *evt;
536 struct sk_buff *skb;
537
538 skb = bt_skb_alloc(sizeof(*hdr) + sizeof(*evt) + 1, GFP_KERNEL);
539 if (!skb)
540 return -ENOMEM;
541
542 hdr = skb_put(skb, sizeof(*hdr));
543 hdr->evt = HCI_EV_CMD_COMPLETE;
544 hdr->plen = sizeof(*evt) + 1;
545
546 evt = skb_put(skb, sizeof(*evt));
547 evt->ncmd = 1;
2fde6afb 548 evt->opcode = cpu_to_le16(QCA_HCI_CC_OPCODE);
32646db8
BG		 549
550 skb_put_u8(skb, QCA_HCI_CC_SUCCESS);
551
552 hci_skb_pkt_type(skb) = HCI_EVENT_PKT;
553
554 return hci_recv_frame(hdev, skb);
555}
556
ba493d4f 557static int qca_download_firmware(struct hci_dev *hdev,
7d250a06 558 struct qca_fw_config *config,
ecf6b2d9
VLNG		 559 enum qca_btsoc_type soc_type,
560 u8 rom_ver)
83e81961
BYTK		 561{
562 const struct firmware *fw;
b43ca511 563 u8 *data;
6e03126a 564 const u8 *segment;
b43ca511 565 int ret, size, remain, i = 0;
83e81961 566
ba493d4f 567 bt_dev_info(hdev, "QCA Downloading %s", config->fwname);
83e81961
BYTK		 568
569 ret = request_firmware(&fw, config->fwname, &hdev->dev);
570 if (ret) {
ecf6b2d9
VLNG		 571 /* For WCN6750, if mbn file is not present then check for
572 * tlv file.
573 */
574 if (soc_type == QCA_WCN6750 && config->type == ELF_TYPE_PATCH) {
575 bt_dev_dbg(hdev, "QCA Failed to request file: %s (%d)",
576 config->fwname, ret);
577 config->type = TLV_TYPE_PATCH;
578 snprintf(config->fwname, sizeof(config->fwname),
579 "qca/msbtfw%02x.tlv", rom_ver);
580 bt_dev_info(hdev, "QCA Downloading %s", config->fwname);
581 ret = request_firmware(&fw, config->fwname, &hdev->dev);
582 if (ret) {
583 bt_dev_err(hdev, "QCA Failed to request file: %s (%d)",
584 config->fwname, ret);
585 return ret;
586 }
587 } else {
588 bt_dev_err(hdev, "QCA Failed to request file: %s (%d)",
589 config->fwname, ret);
590 return ret;
591 }
83e81961
BYTK		 592 }
593
b43ca511
CA		 594 size = fw->size;
595 data = vmalloc(fw->size);
596 if (!data) {
597 bt_dev_err(hdev, "QCA Failed to allocate memory for file: %s",
598 config->fwname);
599 release_firmware(fw);
600 return -ENOMEM;
601 }
602
603 memcpy(data, fw->data, size);
604 release_firmware(fw);
605
2e4edfa1
JH		 606 ret = qca_tlv_check_data(hdev, config, data, size, soc_type);
607 if (ret)
40d442f9 608 goto out;
83e81961 609
b43ca511
CA		 610 segment = data;
611 remain = size;
6e03126a
LP		 612 while (remain > 0) {
613 int segsize = min(MAX_SIZE_PER_TLV_SEGMENT, remain);
614
615 bt_dev_dbg(hdev, "Send segment %d, size %d", i++, segsize);
616
617 remain -= segsize;
618 /* The last segment is always acked regardless download mode */
619 if (!remain || segsize < MAX_SIZE_PER_TLV_SEGMENT)
e303d124 620 config->dnld_mode = QCA_SKIP_EVT_NONE;
6e03126a 621
ba493d4f 622 ret = qca_tlv_send_segment(hdev, segsize, segment,
7d250a06 623 config->dnld_mode, soc_type);
6e03126a 624 if (ret)
32646db8 625 goto out;
6e03126a
LP		 626
627 segment += segsize;
83e81961
BYTK		 628 }
629
32646db8
BG		 630 /* Latest qualcomm chipsets are not sending a command complete event
631 * for every fw packet sent. They only respond with a vendor specific
632 * event for the last packet. This optimization in the chip will
633 * decrease the BT in initialization time. Here we will inject a command
634 * complete event to avoid a command timeout error message.
635 */
e303d124
BG		 636 if (config->dnld_type == QCA_SKIP_EVT_VSE_CC ||
637 config->dnld_type == QCA_SKIP_EVT_VSE)
c7c5ae29 638 ret = qca_inject_cmd_complete_event(hdev);
32646db8
BG		 639
640out:
b43ca511 641 vfree(data);
83e81961
BYTK		 642
643 return ret;
644}
645
590deccf
BG		 646static int qca_disable_soc_logging(struct hci_dev *hdev)
647{
648 struct sk_buff *skb;
649 u8 cmd[2];
650 int err;
651
652 cmd[0] = QCA_DISABLE_LOGGING_SUB_OP;
653 cmd[1] = 0x00;
654 skb = __hci_cmd_sync_ev(hdev, QCA_DISABLE_LOGGING, sizeof(cmd), cmd,
655 HCI_EV_CMD_COMPLETE, HCI_INIT_TIMEOUT);
656 if (IS_ERR(skb)) {
657 err = PTR_ERR(skb);
658 bt_dev_err(hdev, "QCA Failed to disable soc logging(%d)", err);
659 return err;
660 }
661
662 kfree_skb(skb);
663
664 return 0;
665}
666
83e81961
BYTK		 667int qca_set_bdaddr_rome(struct hci_dev *hdev, const bdaddr_t *bdaddr)
668{
669 struct sk_buff *skb;
670 u8 cmd[9];
671 int err;
672
673 cmd[0] = EDL_NVM_ACCESS_SET_REQ_CMD;
674 cmd[1] = 0x02; /* TAG ID */
675 cmd[2] = sizeof(bdaddr_t); /* size */
676 memcpy(cmd + 3, bdaddr, sizeof(bdaddr_t));
677 skb = __hci_cmd_sync_ev(hdev, EDL_NVM_ACCESS_OPCODE, sizeof(cmd), cmd,
e4cc5a18 678 HCI_EV_VENDOR, HCI_INIT_TIMEOUT);
83e81961
BYTK		 679 if (IS_ERR(skb)) {
680 err = PTR_ERR(skb);
ba493d4f 681 bt_dev_err(hdev, "QCA Change address command failed (%d)", err);
83e81961
BYTK		 682 return err;
683 }
684
685 kfree_skb(skb);
686
687 return 0;
688}
689EXPORT_SYMBOL_GPL(qca_set_bdaddr_rome);
690
dd336649 691static int qca_check_bdaddr(struct hci_dev *hdev, const struct qca_fw_config *config)
32868e12
JH		 692{
693 struct hci_rp_read_bd_addr *bda;
694 struct sk_buff *skb;
695 int err;
696
697 if (bacmp(&hdev->public_addr, BDADDR_ANY))
698 return 0;
699
700 skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL,
701 HCI_INIT_TIMEOUT);
702 if (IS_ERR(skb)) {
703 err = PTR_ERR(skb);
704 bt_dev_err(hdev, "Failed to read device address (%d)", err);
705 return err;
706 }
707
708 if (skb->len != sizeof(*bda)) {
709 bt_dev_err(hdev, "Device address length mismatch");
710 kfree_skb(skb);
711 return -EIO;
712 }
713
714 bda = (struct hci_rp_read_bd_addr *)skb->data;
dd336649 715 if (!bacmp(&bda->bdaddr, &config->bdaddr))
32868e12
JH		 716 set_bit(HCI_QUIRK_USE_BDADDR_PROPERTY, &hdev->quirks);
717
718 kfree_skb(skb);
719
720 return 0;
721}
722
a7f8dedb
TJ		 723static void qca_generate_hsp_nvm_name(char *fwname, size_t max_size,
724 struct qca_btsoc_version ver, u8 rom_ver, u16 bid)
725{
726 const char *variant;
727
728 /* hsp gf chip */
729 if ((le32_to_cpu(ver.soc_id) & QCA_HSP_GF_SOC_MASK) == QCA_HSP_GF_SOC_ID)
730 variant = "g";
731 else
732 variant = "";
733
734 if (bid == 0x0)
735 snprintf(fwname, max_size, "qca/hpnv%02x%s.bin", rom_ver, variant);
736 else
737 snprintf(fwname, max_size, "qca/hpnv%02x%s.%x", rom_ver, variant, bid);
738}
739
e41137d8
ZH		 740static inline void qca_get_nvm_name_generic(struct qca_fw_config *cfg,
741 const char *stem, u8 rom_ver, u16 bid)
742{
743 if (bid == 0x0)
744 snprintf(cfg->fwname, sizeof(cfg->fwname), "qca/%snv%02x.bin", stem, rom_ver);
745 else if (bid & 0xff00)
746 snprintf(cfg->fwname, sizeof(cfg->fwname),
747 "qca/%snv%02x.b%x", stem, rom_ver, bid);
748 else
749 snprintf(cfg->fwname, sizeof(cfg->fwname),
750 "qca/%snv%02x.b%02x", stem, rom_ver, bid);
751}
752
aadebac4 753int qca_uart_setup(struct hci_dev *hdev, uint8_t baudrate,
059924fd 754 enum qca_btsoc_type soc_type, struct qca_btsoc_version ver,
99c905c6 755 const char *firmware_name)
83e81961 756{
dd336649 757 struct qca_fw_config config = {};
83e81961 758 int err;
523760b7 759 u8 rom_ver = 0;
059924fd 760 u32 soc_ver;
a7f8dedb 761 u16 boardid = 0;
83e81961 762
ba493d4f 763 bt_dev_dbg(hdev, "QCA setup on UART");
83e81961 764
059924fd
VLNG		 765 soc_ver = get_soc_ver(ver.soc_id, ver.rom_ver);
766
767 bt_dev_info(hdev, "QCA controller version 0x%08x", soc_ver);
768
83e81961
BYTK		 769 config.user_baud_rate = baudrate;
770
99fba8e3
VLNG		 771 /* Firmware files to download are based on ROM version.
772 * ROM version is derived from last two bytes of soc_ver.
773 */
f904feef
LW		 774 if (soc_type == QCA_WCN3988)
775 rom_ver = ((soc_ver & 0x00000f00) >> 0x05) | (soc_ver & 0x0000000f);
776 else
777 rom_ver = ((soc_ver & 0x00000f00) >> 0x04) | (soc_ver & 0x0000000f);
99fba8e3 778
4fac8a7a
STA		 779 if (soc_type == QCA_WCN6750)
780 qca_send_patch_config_cmd(hdev);
781
83e81961
BYTK		 782 /* Download rampatch file */
783 config.type = TLV_TYPE_PATCH;
691d54d0
NA		 784 switch (soc_type) {
785 case QCA_WCN3990:
786 case QCA_WCN3991:
787 case QCA_WCN3998:
4219d468
BG		 788 snprintf(config.fwname, sizeof(config.fwname),
789 "qca/crbtfw%02x.tlv", rom_ver);
691d54d0
NA		 790 break;
791 case QCA_WCN3988:
792 snprintf(config.fwname, sizeof(config.fwname),
793 "qca/apbtfw%02x.tlv", rom_ver);
794 break;
a7f8dedb
TJ		 795 case QCA_QCA2066:
796 snprintf(config.fwname, sizeof(config.fwname),
797 "qca/hpbtfw%02x.tlv", rom_ver);
798 break;
691d54d0 799 case QCA_QCA6390:
e5d6468f
RL		 800 snprintf(config.fwname, sizeof(config.fwname),
801 "qca/htbtfw%02x.tlv", rom_ver);
691d54d0
NA		 802 break;
803 case QCA_WCN6750:
ecf6b2d9
VLNG		 804 /* Choose mbn file by default.If mbn file is not found
805 * then choose tlv file
806 */
807 config.type = ELF_TYPE_PATCH;
d8f97da1 808 snprintf(config.fwname, sizeof(config.fwname),
ecf6b2d9 809 "qca/msbtfw%02x.mbn", rom_ver);
691d54d0
NA		 810 break;
811 case QCA_WCN6855:
095327fe
SK		 812 snprintf(config.fwname, sizeof(config.fwname),
813 "qca/hpbtfw%02x.tlv", rom_ver);
691d54d0 814 break;
e0c1278a
NA		 815 case QCA_WCN7850:
816 snprintf(config.fwname, sizeof(config.fwname),
817 "qca/hmtbtfw%02x.tlv", rom_ver);
818 break;
691d54d0 819 default:
4219d468
BG		 820 snprintf(config.fwname, sizeof(config.fwname),
821 "qca/rampatch_%08x.bin", soc_ver);
822 }
823
ecf6b2d9 824 err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
83e81961 825 if (err < 0) {
ba493d4f 826 bt_dev_err(hdev, "QCA Failed to download patch (%d)", err);
83e81961
BYTK		 827 return err;
828 }
829
8059ba0b
MK		 830 /* Give the controller some time to get ready to receive the NVM */
831 msleep(10);
832
e41137d8 833 if (soc_type == QCA_QCA2066 || soc_type == QCA_WCN7850)
a7f8dedb
TJ		 834 qca_read_fw_board_id(hdev, &boardid);
835
83e81961
BYTK		 836 /* Download NVM configuration */
837 config.type = TLV_TYPE_NVM;
691d54d0 838 if (firmware_name) {
99c905c6
RL		 839 snprintf(config.fwname, sizeof(config.fwname),
840 "qca/%s", firmware_name);
691d54d0
NA		 841 } else {
842 switch (soc_type) {
843 case QCA_WCN3990:
844 case QCA_WCN3991:
845 case QCA_WCN3998:
846 if (le32_to_cpu(ver.soc_id) == QCA_WCN3991_SOC_ID) {
847 snprintf(config.fwname, sizeof(config.fwname),
848 "qca/crnv%02xu.bin", rom_ver);
849 } else {
850 snprintf(config.fwname, sizeof(config.fwname),
851 "qca/crnv%02x.bin", rom_ver);
852 }
853 break;
854 case QCA_WCN3988:
059924fd 855 snprintf(config.fwname, sizeof(config.fwname),
691d54d0
NA		 856 "qca/apnv%02x.bin", rom_ver);
857 break;
a7f8dedb
TJ		 858 case QCA_QCA2066:
859 qca_generate_hsp_nvm_name(config.fwname,
860 sizeof(config.fwname), ver, rom_ver, boardid);
861 break;
691d54d0
NA		 862 case QCA_QCA6390:
863 snprintf(config.fwname, sizeof(config.fwname),
864 "qca/htnv%02x.bin", rom_ver);
865 break;
866 case QCA_WCN6750:
059924fd 867 snprintf(config.fwname, sizeof(config.fwname),
691d54d0
NA		 868 "qca/msnv%02x.bin", rom_ver);
869 break;
870 case QCA_WCN6855:
871 snprintf(config.fwname, sizeof(config.fwname),
872 "qca/hpnv%02x.bin", rom_ver);
873 break;
e0c1278a 874 case QCA_WCN7850:
e41137d8 875 qca_get_nvm_name_generic(&config, "hmt", rom_ver, boardid);
e0c1278a 876 break;
691d54d0
NA		 877
878 default:
879 snprintf(config.fwname, sizeof(config.fwname),
880 "qca/nvm_%08x.bin", soc_ver);
059924fd
VLNG		 881 }
882 }
4219d468 883
ecf6b2d9 884 err = qca_download_firmware(hdev, &config, soc_type, rom_ver);
83e81961 885 if (err < 0) {
ba493d4f 886 bt_dev_err(hdev, "QCA Failed to download NVM (%d)", err);
83e81961
BYTK		 887 return err;
888 }
889
691d54d0
NA		 890 switch (soc_type) {
891 case QCA_WCN3991:
a7f8dedb 892 case QCA_QCA2066:
691d54d0
NA		 893 case QCA_QCA6390:
894 case QCA_WCN6750:
895 case QCA_WCN6855:
e0c1278a 896 case QCA_WCN7850:
590deccf
BG		 897 err = qca_disable_soc_logging(hdev);
898 if (err < 0)
899 return err;
691d54d0
NA		 900 break;
901 default:
902 break;
590deccf
BG		 903 }
904
d8f97da1 905 /* WCN399x and WCN6750 supports the Microsoft vendor extension with 0xFD70 as the
eaf19b0c
MC		 906 * VsMsftOpCode.
907 */
908 switch (soc_type) {
691d54d0 909 case QCA_WCN3988:
eaf19b0c
MC		 910 case QCA_WCN3990:
911 case QCA_WCN3991:
912 case QCA_WCN3998:
d8f97da1 913 case QCA_WCN6750:
eaf19b0c
MC		 914 hci_set_msft_opcode(hdev, 0xFD70);
915 break;
916 default:
917 break;
918 }
919
83e81961 920 /* Perform HCI reset */
ba493d4f 921 err = qca_send_reset(hdev);
83e81961 922 if (err < 0) {
ba493d4f 923 bt_dev_err(hdev, "QCA Failed to run HCI_RESET (%d)", err);
83e81961
BYTK		 924 return err;
925 }
926
095327fe
SK		 927 switch (soc_type) {
928 case QCA_WCN3991:
929 case QCA_WCN6750:
930 case QCA_WCN6855:
e0c1278a 931 case QCA_WCN7850:
c0187b0b
VLNG		 932 /* get fw build info */
933 err = qca_read_fw_build_info(hdev);
934 if (err < 0)
935 return err;
095327fe
SK		 936 break;
937 default:
938 break;
c0187b0b
VLNG		 939 }
940
dd336649 941 err = qca_check_bdaddr(hdev, &config);
32868e12
JH		 942 if (err)
943 return err;
944
ba493d4f 945 bt_dev_info(hdev, "QCA setup on UART is completed");
83e81961
BYTK		 946
947 return 0;
948}
ba493d4f 949EXPORT_SYMBOL_GPL(qca_uart_setup);
83e81961 950
5c0a1001
BG		 951int qca_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
952{
77f45cca 953 bdaddr_t bdaddr_swapped;
5c0a1001
BG		 954 struct sk_buff *skb;
955 int err;
956
77f45cca
JH		 957 baswap(&bdaddr_swapped, bdaddr);
958
959 skb = __hci_cmd_sync_ev(hdev, EDL_WRITE_BD_ADDR_OPCODE, 6,
960 &bdaddr_swapped, HCI_EV_VENDOR,
961 HCI_INIT_TIMEOUT);
5c0a1001
BG		 962 if (IS_ERR(skb)) {
963 err = PTR_ERR(skb);
964 bt_dev_err(hdev, "QCA Change address cmd failed (%d)", err);
965 return err;
966 }
967
968 kfree_skb(skb);
969
970 return 0;
971}
972EXPORT_SYMBOL_GPL(qca_set_bdaddr);
973
523760b7 974
83e81961
BYTK		 975MODULE_AUTHOR("Ben Young Tae Kim <ytkim@qca.qualcomm.com>");
976MODULE_DESCRIPTION("Bluetooth support for Qualcomm Atheros family ver " VERSION);
977MODULE_VERSION(VERSION);
978MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)