[linux-block.git] / drivers / bluetooth / btintel.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 *
 *  Bluetooth support for Intel devices
 *
 *  Copyright (C) 2015  Intel Corporation
 */

/* List of tlv type */
enum {
	INTEL_TLV_CNVI_TOP = 0x10,
	INTEL_TLV_CNVR_TOP,
	INTEL_TLV_CNVI_BT,
	INTEL_TLV_CNVR_BT,
	INTEL_TLV_CNVI_OTP,
	INTEL_TLV_CNVR_OTP,
	INTEL_TLV_DEV_REV_ID,
	INTEL_TLV_USB_VENDOR_ID,
	INTEL_TLV_USB_PRODUCT_ID,
	INTEL_TLV_PCIE_VENDOR_ID,
	INTEL_TLV_PCIE_DEVICE_ID,
	INTEL_TLV_PCIE_SUBSYSTEM_ID,
	INTEL_TLV_IMAGE_TYPE,
	INTEL_TLV_TIME_STAMP,
	INTEL_TLV_BUILD_TYPE,
	INTEL_TLV_BUILD_NUM,
	INTEL_TLV_FW_BUILD_PRODUCT,
	INTEL_TLV_FW_BUILD_HW,
	INTEL_TLV_FW_STEP,
	INTEL_TLV_BT_SPEC,
	INTEL_TLV_MFG_NAME,
	INTEL_TLV_HCI_REV,
	INTEL_TLV_LMP_SUBVER,
	INTEL_TLV_OTP_PATCH_VER,
	INTEL_TLV_SECURE_BOOT,
	INTEL_TLV_KEY_FROM_HDR,
	INTEL_TLV_OTP_LOCK,
	INTEL_TLV_API_LOCK,
	INTEL_TLV_DEBUG_LOCK,
	INTEL_TLV_MIN_FW,
	INTEL_TLV_LIMITED_CCE,
	INTEL_TLV_SBE_TYPE,
	INTEL_TLV_OTP_BDADDR,
	INTEL_TLV_UNLOCKED_STATE
};

struct intel_tlv {
	u8 type;
	u8 len;
	u8 val[];
} __packed;

struct intel_version_tlv {
	u32	cnvi_top;
	u32	cnvr_top;
	u32	cnvi_bt;
	u32	cnvr_bt;
	u16	dev_rev_id;
	u8	img_type;
	u16	timestamp;
	u8	build_type;
	u32	build_num;
	u8	secure_boot;
	u8	otp_lock;
	u8	api_lock;
	u8	debug_lock;
	u8	min_fw_build_nn;
	u8	min_fw_build_cw;
	u8	min_fw_build_yy;
	u8	limited_cce;
	u8	sbe_type;
	bdaddr_t otp_bd_addr;
};

struct intel_version {
	u8 status;
	u8 hw_platform;
	u8 hw_variant;
	u8 hw_revision;
	u8 fw_variant;
	u8 fw_revision;
	u8 fw_build_num;
	u8 fw_build_ww;
	u8 fw_build_yy;
	u8 fw_patch_num;
} __packed;

struct intel_boot_params {
	__u8     status;
	__u8     otp_format;
	__u8     otp_content;
	__u8     otp_patch;
	__le16   dev_revid;
	__u8     secure_boot;
	__u8     key_from_hdr;
	__u8     key_type;
	__u8     otp_lock;
	__u8     api_lock;
	__u8     debug_lock;
	bdaddr_t otp_bdaddr;
	__u8     min_fw_build_nn;
	__u8     min_fw_build_cw;
	__u8     min_fw_build_yy;
	__u8     limited_cce;
	__u8     unlocked_state;
} __packed;

struct intel_bootup {
	__u8     zero;
	__u8     num_cmds;
	__u8     source;
	__u8     reset_type;
	__u8     reset_reason;
	__u8     ddc_status;
} __packed;

struct intel_secure_send_result {
	__u8     result;
	__le16   opcode;
	__u8     status;
} __packed;

struct intel_reset {
	__u8     reset_type;
	__u8     patch_enable;
	__u8     ddc_reload;
	__u8     boot_option;
	__le32   boot_param;
} __packed;

struct intel_debug_features {
	__u8    page1[16];
} __packed;

struct intel_offload_use_cases {
	__u8	status;
	__u8	preset[8];
} __packed;

#define INTEL_HW_PLATFORM(cnvx_bt)	((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
#define INTEL_HW_VARIANT(cnvx_bt)	((u8)(((cnvx_bt) & 0x003f0000) >> 16))
#define INTEL_CNVX_TOP_TYPE(cnvx_top)	((cnvx_top) & 0x00000fff)
#define INTEL_CNVX_TOP_STEP(cnvx_top)	(((cnvx_top) & 0x0f000000) >> 24)
#define INTEL_CNVX_TOP_PACK_SWAB(t, s)	__swab16(((__u16)(((t) << 4) | (s))))

enum {
	INTEL_BOOTLOADER,
	INTEL_DOWNLOADING,
	INTEL_FIRMWARE_LOADED,
	INTEL_FIRMWARE_FAILED,
	INTEL_BOOTING,
	INTEL_BROKEN_INITIAL_NCMD,
	INTEL_BROKEN_SHUTDOWN_LED,
	INTEL_ROM_LEGACY,
	INTEL_ROM_LEGACY_NO_WBS_SUPPORT,

	__INTEL_NUM_FLAGS,
};

struct btintel_data {
	DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
};

#define btintel_set_flag(hdev, nr)					\
	do {								\
		struct btintel_data *intel = hci_get_priv((hdev));	\
		set_bit((nr), intel->flags);				\
	} while (0)

#define btintel_clear_flag(hdev, nr)					\
	do {								\
		struct btintel_data *intel = hci_get_priv((hdev));	\
		clear_bit((nr), intel->flags);				\
	} while (0)

#define btintel_wake_up_flag(hdev, nr)					\
	do {								\
		struct btintel_data *intel = hci_get_priv((hdev));	\
		wake_up_bit(intel->flags, (nr));			\
	} while (0)

#define btintel_get_flag(hdev)						\
	(((struct btintel_data *)hci_get_priv(hdev))->flags)

#define btintel_test_flag(hdev, nr)	test_bit((nr), btintel_get_flag(hdev))
#define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev))
#define btintel_wait_on_flag_timeout(hdev, nr, m, to)			\
		wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)

#if IS_ENABLED(CONFIG_BT_INTEL)

int btintel_check_bdaddr(struct hci_dev *hdev);
int btintel_enter_mfg(struct hci_dev *hdev);
int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr);
int btintel_set_diag(struct hci_dev *hdev, bool enable);

int btintel_version_info(struct hci_dev *hdev, struct intel_version *ver);
int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name);
int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
int btintel_read_version(struct hci_dev *hdev, struct intel_version *ver);
struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
				   u16 opcode_write);
int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
int btintel_read_boot_params(struct hci_dev *hdev,
			     struct intel_boot_params *params);
int btintel_download_firmware(struct hci_dev *dev, struct intel_version *ver,
			      const struct firmware *fw, u32 *boot_param);
int btintel_configure_setup(struct hci_dev *hdev);
void btintel_bootup(struct hci_dev *hdev, const void *ptr, unsigned int len);
void btintel_secure_send_result(struct hci_dev *hdev,
				const void *ptr, unsigned int len);
int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
#else

static inline int btintel_check_bdaddr(struct hci_dev *hdev)
{
	return -EOPNOTSUPP;
}

static inline int btintel_enter_mfg(struct hci_dev *hdev)
{
	return -EOPNOTSUPP;
}

static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
{
	return -EOPNOTSUPP;
}

static inline int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
{
	return -EOPNOTSUPP;
}

static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
{
	return -EOPNOTSUPP;
}

static inline int btintel_version_info(struct hci_dev *hdev,
				       struct intel_version *ver)
{
	return -EOPNOTSUPP;
}

static inline int btintel_load_ddc_config(struct hci_dev *hdev,
					  const char *ddc_name)
{
	return -EOPNOTSUPP;
}

static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
{
	return -EOPNOTSUPP;
}

static inline int btintel_read_version(struct hci_dev *hdev,
				       struct intel_version *ver)
{
	return -EOPNOTSUPP;
}

static inline struct regmap *btintel_regmap_init(struct hci_dev *hdev,
						 u16 opcode_read,
						 u16 opcode_write)
{
	return ERR_PTR(-EINVAL);
}

static inline int btintel_send_intel_reset(struct hci_dev *hdev,
					   u32 reset_param)
{
	return -EOPNOTSUPP;
}

static inline int btintel_read_boot_params(struct hci_dev *hdev,
					   struct intel_boot_params *params)
{
	return -EOPNOTSUPP;
}

static inline int btintel_download_firmware(struct hci_dev *dev,
					    const struct firmware *fw,
					    u32 *boot_param)
{
	return -EOPNOTSUPP;
}

static inline int btintel_configure_setup(struct hci_dev *hdev)
{
	return -ENODEV;
}

static inline void btintel_bootup(struct hci_dev *hdev,
				  const void *ptr, unsigned int len)
{
}

static inline void btintel_secure_send_result(struct hci_dev *hdev,
				const void *ptr, unsigned int len)
{
}

static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
{
	return -ENODEV;
}
#endif
Commit	Line	Data
1a59d1b8	1	/* SPDX-License-Identifier: GPL-2.0-or-later */
48f0ed1b MH	2	/*
	3	*
	4	* Bluetooth support for Intel devices
	5	*
	6	* Copyright (C) 2015 Intel Corporation
48f0ed1b MH	7	*/
48f0ed1b MH	8
57375bee K	9	/* List of tlv type */
	10	enum {
	11	INTEL_TLV_CNVI_TOP = 0x10,
	12	INTEL_TLV_CNVR_TOP,
	13	INTEL_TLV_CNVI_BT,
	14	INTEL_TLV_CNVR_BT,
	15	INTEL_TLV_CNVI_OTP,
	16	INTEL_TLV_CNVR_OTP,
	17	INTEL_TLV_DEV_REV_ID,
	18	INTEL_TLV_USB_VENDOR_ID,
	19	INTEL_TLV_USB_PRODUCT_ID,
	20	INTEL_TLV_PCIE_VENDOR_ID,
	21	INTEL_TLV_PCIE_DEVICE_ID,
	22	INTEL_TLV_PCIE_SUBSYSTEM_ID,
	23	INTEL_TLV_IMAGE_TYPE,
	24	INTEL_TLV_TIME_STAMP,
	25	INTEL_TLV_BUILD_TYPE,
	26	INTEL_TLV_BUILD_NUM,
	27	INTEL_TLV_FW_BUILD_PRODUCT,
	28	INTEL_TLV_FW_BUILD_HW,
	29	INTEL_TLV_FW_STEP,
	30	INTEL_TLV_BT_SPEC,
	31	INTEL_TLV_MFG_NAME,
	32	INTEL_TLV_HCI_REV,
	33	INTEL_TLV_LMP_SUBVER,
	34	INTEL_TLV_OTP_PATCH_VER,
	35	INTEL_TLV_SECURE_BOOT,
	36	INTEL_TLV_KEY_FROM_HDR,
	37	INTEL_TLV_OTP_LOCK,
	38	INTEL_TLV_API_LOCK,
	39	INTEL_TLV_DEBUG_LOCK,
	40	INTEL_TLV_MIN_FW,
	41	INTEL_TLV_LIMITED_CCE,
	42	INTEL_TLV_SBE_TYPE,
	43	INTEL_TLV_OTP_BDADDR,
	44	INTEL_TLV_UNLOCKED_STATE
	45	};
	46
	47	struct intel_tlv {
	48	u8 type;
	49	u8 len;
4acbf554	50	u8 val[];
57375bee K	51	} __packed;
	52
	53	struct intel_version_tlv {
	54	u32 cnvi_top;
	55	u32 cnvr_top;
	56	u32 cnvi_bt;
	57	u32 cnvr_bt;
	58	u16 dev_rev_id;
	59	u8 img_type;
	60	u16 timestamp;
	61	u8 build_type;
	62	u32 build_num;
	63	u8 secure_boot;
	64	u8 otp_lock;
	65	u8 api_lock;
	66	u8 debug_lock;
	67	u8 min_fw_build_nn;
	68	u8 min_fw_build_cw;
	69	u8 min_fw_build_yy;
	70	u8 limited_cce;
	71	u8 sbe_type;
	72	bdaddr_t otp_bd_addr;
	73	};
	74
59a077c4 MH	75	struct intel_version {
	76	u8 status;
	77	u8 hw_platform;
	78	u8 hw_variant;
	79	u8 hw_revision;
	80	u8 fw_variant;
	81	u8 fw_revision;
	82	u8 fw_build_num;
	83	u8 fw_build_ww;
	84	u8 fw_build_yy;
	85	u8 fw_patch_num;
	86	} __packed;
	87
	88	struct intel_boot_params {
	89	__u8 status;
	90	__u8 otp_format;
	91	__u8 otp_content;
	92	__u8 otp_patch;
	93	__le16 dev_revid;
	94	__u8 secure_boot;
	95	__u8 key_from_hdr;
	96	__u8 key_type;
	97	__u8 otp_lock;
	98	__u8 api_lock;
	99	__u8 debug_lock;
	100	bdaddr_t otp_bdaddr;
	101	__u8 min_fw_build_nn;
	102	__u8 min_fw_build_cw;
	103	__u8 min_fw_build_yy;
	104	__u8 limited_cce;
	105	__u8 unlocked_state;
	106	} __packed;
	107
ccd6da2a MH	108	struct intel_bootup {
	109	__u8 zero;
	110	__u8 num_cmds;
	111	__u8 source;
	112	__u8 reset_type;
	113	__u8 reset_reason;
	114	__u8 ddc_status;
	115	} __packed;
	116
	117	struct intel_secure_send_result {
	118	__u8 result;
	119	__le16 opcode;
	120	__u8 status;
	121	} __packed;
	122
e5889af6 THJA	123	struct intel_reset {
	124	__u8 reset_type;
	125	__u8 patch_enable;
	126	__u8 ddc_reload;
	127	__u8 boot_option;
	128	__le32 boot_param;
	129	} __packed;
	130
d74abe21 C	131	struct intel_debug_features {
	132	__u8 page1[16];
	133	} __packed;
	134
a358ef86 K	135	struct intel_offload_use_cases {
	136	__u8 status;
	137	__u8 preset[8];
	138	} __packed;
	139
9a93b8b8 K	140	#define INTEL_HW_PLATFORM(cnvx_bt) ((u8)(((cnvx_bt) & 0x0000ff00) >> 8))
	141	#define INTEL_HW_VARIANT(cnvx_bt) ((u8)(((cnvx_bt) & 0x003f0000) >> 16))
	142	#define INTEL_CNVX_TOP_TYPE(cnvx_top) ((cnvx_top) & 0x00000fff)
	143	#define INTEL_CNVX_TOP_STEP(cnvx_top) (((cnvx_top) & 0x0f000000) >> 24)
	144	#define INTEL_CNVX_TOP_PACK_SWAB(t, s) __swab16(((__u16)(((t) << 4) \| (s))))
	145
53492a66 THJA	146	enum {
	147	INTEL_BOOTLOADER,
	148	INTEL_DOWNLOADING,
	149	INTEL_FIRMWARE_LOADED,
	150	INTEL_FIRMWARE_FAILED,
	151	INTEL_BOOTING,
ea7c4c0e	152	INTEL_BROKEN_INITIAL_NCMD,
95655456	153	INTEL_BROKEN_SHUTDOWN_LED,
55380714	154	INTEL_ROM_LEGACY,
55235304	155	INTEL_ROM_LEGACY_NO_WBS_SUPPORT,
53492a66 THJA	156
	157	__INTEL_NUM_FLAGS,
	158	};
	159
	160	struct btintel_data {
	161	DECLARE_BITMAP(flags, __INTEL_NUM_FLAGS);
	162	};
	163
	164	#define btintel_set_flag(hdev, nr) \
	165	do { \
	166	struct btintel_data *intel = hci_get_priv((hdev)); \
	167	set_bit((nr), intel->flags); \
	168	} while (0)
	169
	170	#define btintel_clear_flag(hdev, nr) \
	171	do { \
	172	struct btintel_data *intel = hci_get_priv((hdev)); \
	173	clear_bit((nr), intel->flags); \
	174	} while (0)
	175
	176	#define btintel_wake_up_flag(hdev, nr) \
	177	do { \
	178	struct btintel_data *intel = hci_get_priv((hdev)); \
	179	wake_up_bit(intel->flags, (nr)); \
	180	} while (0)
	181
	182	#define btintel_get_flag(hdev) \
	183	(((struct btintel_data *)hci_get_priv(hdev))->flags)
	184
	185	#define btintel_test_flag(hdev, nr) test_bit((nr), btintel_get_flag(hdev))
	186	#define btintel_test_and_clear_flag(hdev, nr) test_and_clear_bit((nr), btintel_get_flag(hdev))
	187	#define btintel_wait_on_flag_timeout(hdev, nr, m, to) \
	188	wait_on_bit_timeout(btintel_get_flag(hdev), (nr), m, to)
	189
48f0ed1b MH	190	#if IS_ENABLED(CONFIG_BT_INTEL)
	191
	192	int btintel_check_bdaddr(struct hci_dev *hdev);
28dc4b92 LP	193	int btintel_enter_mfg(struct hci_dev *hdev);
28dc4b92 LP	194	int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched);
48f0ed1b	195	int btintel_set_bdaddr(struct hci_dev hdev, const bdaddr_t bdaddr);
6d2e50d2	196	int btintel_set_diag(struct hci_dev *hdev, bool enable);
48f0ed1b	197
d68903da	198	int btintel_version_info(struct hci_dev hdev, struct intel_version ver);
145f2368	199	int btintel_load_ddc_config(struct hci_dev hdev, const char ddc_name);
213445b2	200	int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug);
6c483de1	201	int btintel_read_version(struct hci_dev hdev, struct intel_version ver);
d06f107b LP	202	struct regmap btintel_regmap_init(struct hci_dev hdev, u16 opcode_read,
d06f107b LP	203	u16 opcode_write);
e5889af6	204	int btintel_send_intel_reset(struct hci_dev *hdev, u32 boot_param);
faf174d2 THJA	205	int btintel_read_boot_params(struct hci_dev *hdev,
faf174d2 THJA	206	struct intel_boot_params *params);
ac056546 LAD	207	int btintel_download_firmware(struct hci_dev dev, struct intel_version ver,
ac056546 LAD	208	const struct firmware fw, u32 boot_param);
ca5425e1	209	int btintel_configure_setup(struct hci_dev *hdev);
019a1caa THJA	210	void btintel_bootup(struct hci_dev hdev, const void ptr, unsigned int len);
	211	void btintel_secure_send_result(struct hci_dev *hdev,
	212	const void *ptr, unsigned int len);
927ac8da	213	int btintel_set_quality_report(struct hci_dev *hdev, bool enable);
48f0ed1b MH	214	#else
	215
	216	static inline int btintel_check_bdaddr(struct hci_dev *hdev)
	217	{
	218	return -EOPNOTSUPP;
	219	}
	220
28dc4b92 LP	221	static inline int btintel_enter_mfg(struct hci_dev *hdev)
	222	{
	223	return -EOPNOTSUPP;
	224	}
	225
	226	static inline int btintel_exit_mfg(struct hci_dev *hdev, bool reset, bool patched)
	227	{
	228	return -EOPNOTSUPP;
	229	}
	230
48f0ed1b MH	231	static inline int btintel_set_bdaddr(struct hci_dev hdev, const bdaddr_t bdaddr)
	232	{
	233	return -EOPNOTSUPP;
	234	}
	235
6d2e50d2 MH	236	static inline int btintel_set_diag(struct hci_dev *hdev, bool enable)
	237	{
	238	return -EOPNOTSUPP;
	239	}
	240
d68903da LAD	241	static inline int btintel_version_info(struct hci_dev *hdev,
d68903da LAD	242	struct intel_version *ver)
7feb99e1	243	{
d68903da	244	return -EOPNOTSUPP;
7feb99e1 MH	245	}
7feb99e1 MH	246
145f2368 LP	247	static inline int btintel_load_ddc_config(struct hci_dev *hdev,
	248	const char *ddc_name)
	249	{
	250	return -EOPNOTSUPP;
	251	}
	252
213445b2 MH	253	static inline int btintel_set_event_mask_mfg(struct hci_dev *hdev, bool debug)
	254	{
	255	return -EOPNOTSUPP;
	256	}
	257
6c483de1 LP	258	static inline int btintel_read_version(struct hci_dev *hdev,
	259	struct intel_version *ver)
	260	{
	261	return -EOPNOTSUPP;
	262	}
	263
d06f107b LP	264	static inline struct regmap btintel_regmap_init(struct hci_dev hdev,
	265	u16 opcode_read,
	266	u16 opcode_write)
	267	{
	268	return ERR_PTR(-EINVAL);
	269	}
e5889af6 THJA	270
	271	static inline int btintel_send_intel_reset(struct hci_dev *hdev,
	272	u32 reset_param)
	273	{
	274	return -EOPNOTSUPP;
	275	}
faf174d2 THJA	276
	277	static inline int btintel_read_boot_params(struct hci_dev *hdev,
	278	struct intel_boot_params *params)
	279	{
	280	return -EOPNOTSUPP;
	281	}
fbbe83c5 THJA	282
	283	static inline int btintel_download_firmware(struct hci_dev *dev,
	284	const struct firmware *fw,
	285	u32 *boot_param)
	286	{
	287	return -EOPNOTSUPP;
	288	}
b9a2562f	289
ca5425e1 THJA	290	static inline int btintel_configure_setup(struct hci_dev *hdev)
	291	{
	292	return -ENODEV;
	293	}
	294
019a1caa THJA	295	static inline void btintel_bootup(struct hci_dev *hdev,
	296	const void *ptr, unsigned int len)
	297	{
	298	}
	299
	300	static inline void btintel_secure_send_result(struct hci_dev *hdev,
	301	const void *ptr, unsigned int len)
	302	{
	303	}
927ac8da JH	304
	305	static inline int btintel_set_quality_report(struct hci_dev *hdev, bool enable)
	306	{
	307	return -ENODEV;
	308	}
48f0ed1b	309	#endif