[linux-2.6-block.git] / drivers / bluetooth / btintel.c

/*
 *
 *  Bluetooth support for Intel devices
 *
 *  Copyright (C) 2015  Intel Corporation
 *
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 *
 *  You should have received a copy of the GNU General Public License
 *  along with this program; if not, write to the Free Software
 *  Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
 *
 */

#include <linux/module.h>
#include <linux/firmware.h>
#include <linux/regmap.h>

#include <net/bluetooth/bluetooth.h>
#include <net/bluetooth/hci_core.h>

#include "btintel.h"

#define VERSION "0.1"

#define BDADDR_INTEL (&(bdaddr_t) {{0x00, 0x8b, 0x9e, 0x19, 0x03, 0x00}})

int btintel_check_bdaddr(struct hci_dev *hdev)
{
	struct hci_rp_read_bd_addr *bda;
	struct sk_buff *skb;

	skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL,
			     HCI_INIT_TIMEOUT);
	if (IS_ERR(skb)) {
		int err = PTR_ERR(skb);
		BT_ERR("%s: Reading Intel device address failed (%d)",
		       hdev->name, err);
		return err;
	}

	if (skb->len != sizeof(*bda)) {
		BT_ERR("%s: Intel device address length mismatch", hdev->name);
		kfree_skb(skb);
		return -EIO;
	}

	bda = (struct hci_rp_read_bd_addr *)skb->data;

	/* For some Intel based controllers, the default Bluetooth device
	 * address 00:03:19:9E:8B:00 can be found. These controllers are
	 * fully operational, but have the danger of duplicate addresses
	 * and that in turn can cause problems with Bluetooth operation.
	 */
	if (!bacmp(&bda->bdaddr, BDADDR_INTEL)) {
		BT_ERR("%s: Found Intel default device address (%pMR)",
		       hdev->name, &bda->bdaddr);
		set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
	}

	kfree_skb(skb);

	return 0;
}
EXPORT_SYMBOL_GPL(btintel_check_bdaddr);

int btintel_set_bdaddr(struct hci_dev *hdev, const bdaddr_t *bdaddr)
{
	struct sk_buff *skb;
	int err;

	skb = __hci_cmd_sync(hdev, 0xfc31, 6, bdaddr, HCI_INIT_TIMEOUT);
	if (IS_ERR(skb)) {
		err = PTR_ERR(skb);
		BT_ERR("%s: Changing Intel device address failed (%d)",
		       hdev->name, err);
		return err;
	}
	kfree_skb(skb);

	return 0;
}
EXPORT_SYMBOL_GPL(btintel_set_bdaddr);

void btintel_hw_error(struct hci_dev *hdev, u8 code)
{
	struct sk_buff *skb;
	u8 type = 0x00;

	BT_ERR("%s: Hardware error 0x%2.2x", hdev->name, code);

	skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT);
	if (IS_ERR(skb)) {
		BT_ERR("%s: Reset after hardware error failed (%ld)",
		       hdev->name, PTR_ERR(skb));
		return;
	}
	kfree_skb(skb);

	skb = __hci_cmd_sync(hdev, 0xfc22, 1, &type, HCI_INIT_TIMEOUT);
	if (IS_ERR(skb)) {
		BT_ERR("%s: Retrieving Intel exception info failed (%ld)",
		       hdev->name, PTR_ERR(skb));
		return;
	}

	if (skb->len != 13) {
		BT_ERR("%s: Exception info size mismatch", hdev->name);
		kfree_skb(skb);
		return;
	}

	BT_ERR("%s: Exception info %s", hdev->name, (char *)(skb->data + 1));

	kfree_skb(skb);
}
EXPORT_SYMBOL_GPL(btintel_hw_error);

void btintel_version_info(struct hci_dev *hdev, struct intel_version *ver)
{
	const char *variant;

	switch (ver->fw_variant) {
	case 0x06:
		variant = "Bootloader";
		break;
	case 0x23:
		variant = "Firmware";
		break;
	default:
		return;
	}

	BT_INFO("%s: %s revision %u.%u build %u week %u %u", hdev->name,
		variant, ver->fw_revision >> 4, ver->fw_revision & 0x0f,
		ver->fw_build_num, ver->fw_build_ww, 2000 + ver->fw_build_yy);
}
EXPORT_SYMBOL_GPL(btintel_version_info);

int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type, u32 plen,
			const void *param)
{
	while (plen > 0) {
		struct sk_buff *skb;
		u8 cmd_param[253], fragment_len = (plen > 252) ? 252 : plen;

		cmd_param[0] = fragment_type;
		memcpy(cmd_param + 1, param, fragment_len);

		skb = __hci_cmd_sync(hdev, 0xfc09, fragment_len + 1,
				     cmd_param, HCI_INIT_TIMEOUT);
		if (IS_ERR(skb))
			return PTR_ERR(skb);

		kfree_skb(skb);

		plen -= fragment_len;
		param += fragment_len;
	}

	return 0;
}
EXPORT_SYMBOL_GPL(btintel_secure_send);

int btintel_load_ddc_config(struct hci_dev *hdev, const char *ddc_name)
{
	const struct firmware *fw;
	struct sk_buff *skb;
	const u8 *fw_ptr;
	int err;

	err = request_firmware_direct(&fw, ddc_name, &hdev->dev);
	if (err < 0) {
		bt_dev_err(hdev, "Failed to load Intel DDC file %s (%d)",
			   ddc_name, err);
		return err;
	}

	bt_dev_info(hdev, "Found Intel DDC parameters: %s", ddc_name);

	fw_ptr = fw->data;

	/* DDC file contains one or more DDC structure which has
	 * Length (1 byte), DDC ID (2 bytes), and DDC value (Length - 2).
	 */
	while (fw->size > fw_ptr - fw->data) {
		u8 cmd_plen = fw_ptr[0] + sizeof(u8);

		skb = __hci_cmd_sync(hdev, 0xfc8b, cmd_plen, fw_ptr,
				     HCI_INIT_TIMEOUT);
		if (IS_ERR(skb)) {
			bt_dev_err(hdev, "Failed to send Intel_Write_DDC (%ld)",
				   PTR_ERR(skb));
			release_firmware(fw);
			return PTR_ERR(skb);
		}

		fw_ptr += cmd_plen;
		kfree_skb(skb);
	}

	release_firmware(fw);

	bt_dev_info(hdev, "Applying Intel DDC parameters completed");

	return 0;
}
EXPORT_SYMBOL_GPL(btintel_load_ddc_config);

/* ------- REGMAP IBT SUPPORT ------- */

#define IBT_REG_MODE_8BIT  0x00
#define IBT_REG_MODE_16BIT 0x01
#define IBT_REG_MODE_32BIT 0x02

struct regmap_ibt_context {
	struct hci_dev *hdev;
	__u16 op_write;
	__u16 op_read;
};

struct ibt_cp_reg_access {
	__le32  addr;
	__u8    mode;
	__u8    len;
	__u8    data[0];
} __packed;

struct ibt_rp_reg_access {
	__u8    status;
	__le32  addr;
	__u8    data[0];
} __packed;

static int regmap_ibt_read(void *context, const void *addr, size_t reg_size,
			   void *val, size_t val_size)
{
	struct regmap_ibt_context *ctx = context;
	struct ibt_cp_reg_access cp;
	struct ibt_rp_reg_access *rp;
	struct sk_buff *skb;
	int err = 0;

	if (reg_size != sizeof(__le32))
		return -EINVAL;

	switch (val_size) {
	case 1:
		cp.mode = IBT_REG_MODE_8BIT;
		break;
	case 2:
		cp.mode = IBT_REG_MODE_16BIT;
		break;
	case 4:
		cp.mode = IBT_REG_MODE_32BIT;
		break;
	default:
		return -EINVAL;
	}

	/* regmap provides a little-endian formatted addr */
	cp.addr = *(__le32 *)addr;
	cp.len = val_size;

	bt_dev_dbg(ctx->hdev, "Register (0x%x) read", le32_to_cpu(cp.addr));

	skb = hci_cmd_sync(ctx->hdev, ctx->op_read, sizeof(cp), &cp,
			   HCI_CMD_TIMEOUT);
	if (IS_ERR(skb)) {
		err = PTR_ERR(skb);
		bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error (%d)",
			   le32_to_cpu(cp.addr), err);
		return err;
	}

	if (skb->len != sizeof(*rp) + val_size) {
		bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad len",
			   le32_to_cpu(cp.addr));
		err = -EINVAL;
		goto done;
	}

	rp = (struct ibt_rp_reg_access *)skb->data;

	if (rp->addr != cp.addr) {
		bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad addr",
			   le32_to_cpu(rp->addr));
		err = -EINVAL;
		goto done;
	}

	memcpy(val, rp->data, val_size);

done:
	kfree_skb(skb);
	return err;
}

static int regmap_ibt_gather_write(void *context,
				   const void *addr, size_t reg_size,
				   const void *val, size_t val_size)
{
	struct regmap_ibt_context *ctx = context;
	struct ibt_cp_reg_access *cp;
	struct sk_buff *skb;
	int plen = sizeof(*cp) + val_size;
	u8 mode;
	int err = 0;

	if (reg_size != sizeof(__le32))
		return -EINVAL;

	switch (val_size) {
	case 1:
		mode = IBT_REG_MODE_8BIT;
		break;
	case 2:
		mode = IBT_REG_MODE_16BIT;
		break;
	case 4:
		mode = IBT_REG_MODE_32BIT;
		break;
	default:
		return -EINVAL;
	}

	cp = kmalloc(plen, GFP_KERNEL);
	if (!cp)
		return -ENOMEM;

	/* regmap provides a little-endian formatted addr/value */
	cp->addr = *(__le32 *)addr;
	cp->mode = mode;
	cp->len = val_size;
	memcpy(&cp->data, val, val_size);

	bt_dev_dbg(ctx->hdev, "Register (0x%x) write", le32_to_cpu(cp->addr));

	skb = hci_cmd_sync(ctx->hdev, ctx->op_write, plen, cp, HCI_CMD_TIMEOUT);
	if (IS_ERR(skb)) {
		err = PTR_ERR(skb);
		bt_dev_err(ctx->hdev, "regmap: Register (0x%x) write error (%d)",
			   le32_to_cpu(cp->addr), err);
		goto done;
	}
	kfree_skb(skb);

done:
	kfree(cp);
	return err;
}

static int regmap_ibt_write(void *context, const void *data, size_t count)
{
	/* data contains register+value, since we only support 32bit addr,
	 * minimum data size is 4 bytes.
	 */
	if (WARN_ONCE(count < 4, "Invalid register access"))
		return -EINVAL;

	return regmap_ibt_gather_write(context, data, 4, data + 4, count - 4);
}

static void regmap_ibt_free_context(void *context)
{
	kfree(context);
}

static struct regmap_bus regmap_ibt = {
	.read = regmap_ibt_read,
	.write = regmap_ibt_write,
	.gather_write = regmap_ibt_gather_write,
	.free_context = regmap_ibt_free_context,
	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,
};

/* Config is the same for all register regions */
static const struct regmap_config regmap_ibt_cfg = {
	.name      = "btintel_regmap",
	.reg_bits  = 32,
	.val_bits  = 32,
};

struct regmap *btintel_regmap_init(struct hci_dev *hdev, u16 opcode_read,
				   u16 opcode_write)
{
	struct regmap_ibt_context *ctx;

	bt_dev_info(hdev, "regmap: Init R%x-W%x region", opcode_read,
		    opcode_write);

	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
	if (!ctx)
		return ERR_PTR(-ENOMEM);

	ctx->op_read = opcode_read;
	ctx->op_write = opcode_write;
	ctx->hdev = hdev;

	return regmap_init(&hdev->dev, &regmap_ibt, ctx, &regmap_ibt_cfg);
}
EXPORT_SYMBOL_GPL(btintel_regmap_init);

MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
MODULE_DESCRIPTION("Bluetooth support for Intel devices ver " VERSION);
MODULE_VERSION(VERSION);
MODULE_LICENSE("GPL");
MODULE_FIRMWARE("intel/ibt-11-5.sfi");
MODULE_FIRMWARE("intel/ibt-11-5.ddc");
Commit	Line	Data
48f0ed1b MH	1	/*
	2	*
	3	* Bluetooth support for Intel devices
	4	*
	5	* Copyright (C) 2015 Intel Corporation
	6	*
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License as published by
	10	* the Free Software Foundation; either version 2 of the License, or
	11	* (at your option) any later version.
	12	*
	13	* This program is distributed in the hope that it will be useful,
	14	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	15	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	16	* GNU General Public License for more details.
	17	*
	18	* You should have received a copy of the GNU General Public License
	19	* along with this program; if not, write to the Free Software
	20	* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
	21	*
	22	*/
	23
	24	#include <linux/module.h>
145f2368	25	#include <linux/firmware.h>
d06f107b	26	#include <linux/regmap.h>
48f0ed1b MH	27
	28	#include <net/bluetooth/bluetooth.h>
	29	#include <net/bluetooth/hci_core.h>
	30
	31	#include "btintel.h"
	32
	33	#define VERSION "0.1"
	34
	35	#define BDADDR_INTEL (&(bdaddr_t) {{0x00, 0x8b, 0x9e, 0x19, 0x03, 0x00}})
	36
	37	int btintel_check_bdaddr(struct hci_dev *hdev)
	38	{
	39	struct hci_rp_read_bd_addr *bda;
	40	struct sk_buff *skb;
	41
	42	skb = __hci_cmd_sync(hdev, HCI_OP_READ_BD_ADDR, 0, NULL,
	43	HCI_INIT_TIMEOUT);
	44	if (IS_ERR(skb)) {
	45	int err = PTR_ERR(skb);
	46	BT_ERR("%s: Reading Intel device address failed (%d)",
	47	hdev->name, err);
	48	return err;
	49	}
	50
	51	if (skb->len != sizeof(*bda)) {
	52	BT_ERR("%s: Intel device address length mismatch", hdev->name);
	53	kfree_skb(skb);
	54	return -EIO;
	55	}
	56
	57	bda = (struct hci_rp_read_bd_addr *)skb->data;
48f0ed1b MH	58
	59	/* For some Intel based controllers, the default Bluetooth device
	60	* address 00:03:19:9E:8B:00 can be found. These controllers are
	61	* fully operational, but have the danger of duplicate addresses
	62	* and that in turn can cause problems with Bluetooth operation.
	63	*/
	64	if (!bacmp(&bda->bdaddr, BDADDR_INTEL)) {
	65	BT_ERR("%s: Found Intel default device address (%pMR)",
	66	hdev->name, &bda->bdaddr);
	67	set_bit(HCI_QUIRK_INVALID_BDADDR, &hdev->quirks);
	68	}
	69
	70	kfree_skb(skb);
	71
	72	return 0;
	73	}
	74	EXPORT_SYMBOL_GPL(btintel_check_bdaddr);
	75
	76	int btintel_set_bdaddr(struct hci_dev hdev, const bdaddr_t bdaddr)
	77	{
	78	struct sk_buff *skb;
	79	int err;
	80
	81	skb = __hci_cmd_sync(hdev, 0xfc31, 6, bdaddr, HCI_INIT_TIMEOUT);
	82	if (IS_ERR(skb)) {
	83	err = PTR_ERR(skb);
	84	BT_ERR("%s: Changing Intel device address failed (%d)",
	85	hdev->name, err);
	86	return err;
	87	}
	88	kfree_skb(skb);
	89
	90	return 0;
	91	}
	92	EXPORT_SYMBOL_GPL(btintel_set_bdaddr);
	93
973bb97e MH	94	void btintel_hw_error(struct hci_dev *hdev, u8 code)
	95	{
	96	struct sk_buff *skb;
	97	u8 type = 0x00;
	98
	99	BT_ERR("%s: Hardware error 0x%2.2x", hdev->name, code);
	100
	101	skb = __hci_cmd_sync(hdev, HCI_OP_RESET, 0, NULL, HCI_INIT_TIMEOUT);
	102	if (IS_ERR(skb)) {
	103	BT_ERR("%s: Reset after hardware error failed (%ld)",
	104	hdev->name, PTR_ERR(skb));
	105	return;
	106	}
	107	kfree_skb(skb);
	108
	109	skb = __hci_cmd_sync(hdev, 0xfc22, 1, &type, HCI_INIT_TIMEOUT);
	110	if (IS_ERR(skb)) {
	111	BT_ERR("%s: Retrieving Intel exception info failed (%ld)",
	112	hdev->name, PTR_ERR(skb));
	113	return;
	114	}
	115
	116	if (skb->len != 13) {
	117	BT_ERR("%s: Exception info size mismatch", hdev->name);
	118	kfree_skb(skb);
	119	return;
	120	}
	121
	122	BT_ERR("%s: Exception info %s", hdev->name, (char *)(skb->data + 1));
	123
	124	kfree_skb(skb);
	125	}
	126	EXPORT_SYMBOL_GPL(btintel_hw_error);
	127
7feb99e1 MH	128	void btintel_version_info(struct hci_dev hdev, struct intel_version ver)
	129	{
	130	const char *variant;
	131
	132	switch (ver->fw_variant) {
	133	case 0x06:
	134	variant = "Bootloader";
	135	break;
	136	case 0x23:
	137	variant = "Firmware";
	138	break;
	139	default:
	140	return;
	141	}
	142
	143	BT_INFO("%s: %s revision %u.%u build %u week %u %u", hdev->name,
	144	variant, ver->fw_revision >> 4, ver->fw_revision & 0x0f,
	145	ver->fw_build_num, ver->fw_build_ww, 2000 + ver->fw_build_yy);
	146	}
	147	EXPORT_SYMBOL_GPL(btintel_version_info);
	148
09df123d MH	149	int btintel_secure_send(struct hci_dev *hdev, u8 fragment_type, u32 plen,
	150	const void *param)
	151	{
	152	while (plen > 0) {
	153	struct sk_buff *skb;
	154	u8 cmd_param[253], fragment_len = (plen > 252) ? 252 : plen;
	155
	156	cmd_param[0] = fragment_type;
	157	memcpy(cmd_param + 1, param, fragment_len);
	158
	159	skb = __hci_cmd_sync(hdev, 0xfc09, fragment_len + 1,
	160	cmd_param, HCI_INIT_TIMEOUT);
	161	if (IS_ERR(skb))
	162	return PTR_ERR(skb);
	163
	164	kfree_skb(skb);
	165
	166	plen -= fragment_len;
	167	param += fragment_len;
	168	}
	169
	170	return 0;
	171	}
	172	EXPORT_SYMBOL_GPL(btintel_secure_send);
	173
145f2368 LP	174	int btintel_load_ddc_config(struct hci_dev hdev, const char ddc_name)
	175	{
	176	const struct firmware *fw;
	177	struct sk_buff *skb;
	178	const u8 *fw_ptr;
	179	int err;
	180
	181	err = request_firmware_direct(&fw, ddc_name, &hdev->dev);
	182	if (err < 0) {
	183	bt_dev_err(hdev, "Failed to load Intel DDC file %s (%d)",
	184	ddc_name, err);
	185	return err;
	186	}
	187
	188	bt_dev_info(hdev, "Found Intel DDC parameters: %s", ddc_name);
	189
	190	fw_ptr = fw->data;
	191
	192	/* DDC file contains one or more DDC structure which has
	193	* Length (1 byte), DDC ID (2 bytes), and DDC value (Length - 2).
	194	*/
	195	while (fw->size > fw_ptr - fw->data) {
	196	u8 cmd_plen = fw_ptr[0] + sizeof(u8);
	197
	198	skb = __hci_cmd_sync(hdev, 0xfc8b, cmd_plen, fw_ptr,
	199	HCI_INIT_TIMEOUT);
	200	if (IS_ERR(skb)) {
	201	bt_dev_err(hdev, "Failed to send Intel_Write_DDC (%ld)",
	202	PTR_ERR(skb));
	203	release_firmware(fw);
	204	return PTR_ERR(skb);
	205	}
	206
	207	fw_ptr += cmd_plen;
	208	kfree_skb(skb);
	209	}
	210
	211	release_firmware(fw);
	212
	213	bt_dev_info(hdev, "Applying Intel DDC parameters completed");
	214
	215	return 0;
	216	}
	217	EXPORT_SYMBOL_GPL(btintel_load_ddc_config);
	218
d06f107b LP	219	/* ------- REGMAP IBT SUPPORT ------- */
	220
	221	#define IBT_REG_MODE_8BIT 0x00
	222	#define IBT_REG_MODE_16BIT 0x01
	223	#define IBT_REG_MODE_32BIT 0x02
	224
	225	struct regmap_ibt_context {
	226	struct hci_dev *hdev;
	227	__u16 op_write;
	228	__u16 op_read;
	229	};
	230
	231	struct ibt_cp_reg_access {
	232	__le32 addr;
	233	__u8 mode;
	234	__u8 len;
	235	__u8 data[0];
	236	} __packed;
	237
	238	struct ibt_rp_reg_access {
	239	__u8 status;
	240	__le32 addr;
	241	__u8 data[0];
	242	} __packed;
	243
	244	static int regmap_ibt_read(void context, const void addr, size_t reg_size,
	245	void *val, size_t val_size)
	246	{
	247	struct regmap_ibt_context *ctx = context;
	248	struct ibt_cp_reg_access cp;
	249	struct ibt_rp_reg_access *rp;
	250	struct sk_buff *skb;
	251	int err = 0;
	252
	253	if (reg_size != sizeof(__le32))
	254	return -EINVAL;
	255
	256	switch (val_size) {
	257	case 1:
	258	cp.mode = IBT_REG_MODE_8BIT;
	259	break;
	260	case 2:
	261	cp.mode = IBT_REG_MODE_16BIT;
	262	break;
	263	case 4:
	264	cp.mode = IBT_REG_MODE_32BIT;
	265	break;
	266	default:
	267	return -EINVAL;
	268	}
	269
	270	/* regmap provides a little-endian formatted addr */
	271	cp.addr = (__le32 )addr;
	272	cp.len = val_size;
	273
	274	bt_dev_dbg(ctx->hdev, "Register (0x%x) read", le32_to_cpu(cp.addr));
	275
	276	skb = hci_cmd_sync(ctx->hdev, ctx->op_read, sizeof(cp), &cp,
	277	HCI_CMD_TIMEOUT);
	278	if (IS_ERR(skb)) {
	279	err = PTR_ERR(skb);
	280	bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error (%d)",
	281	le32_to_cpu(cp.addr), err);
	282	return err;
283	}
284
285	if (skb->len != sizeof(*rp) + val_size) {
286	bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad len",
287	le32_to_cpu(cp.addr));
288	err = -EINVAL;
289	goto done;
290	}
291
292	rp = (struct ibt_rp_reg_access *)skb->data;
293
294	if (rp->addr != cp.addr) {
295	bt_dev_err(ctx->hdev, "regmap: Register (0x%x) read error, bad addr",
296	le32_to_cpu(rp->addr));
297	err = -EINVAL;
298	goto done;
299	}
300
301	memcpy(val, rp->data, val_size);
302
303	done:
304	kfree_skb(skb);
305	return err;
306	}
307
308	static int regmap_ibt_gather_write(void *context,
309	const void *addr, size_t reg_size,
310	const void *val, size_t val_size)
311	{
312	struct regmap_ibt_context *ctx = context;
313	struct ibt_cp_reg_access *cp;
314	struct sk_buff *skb;
315	int plen = sizeof(*cp) + val_size;
316	u8 mode;
317	int err = 0;
318
319	if (reg_size != sizeof(__le32))
320	return -EINVAL;
321
322	switch (val_size) {
323	case 1:
324	mode = IBT_REG_MODE_8BIT;
325	break;
326	case 2:
327	mode = IBT_REG_MODE_16BIT;
328	break;
329	case 4:
330	mode = IBT_REG_MODE_32BIT;
331	break;
332	default:
333	return -EINVAL;
334	}
335
336	cp = kmalloc(plen, GFP_KERNEL);
337	if (!cp)
338	return -ENOMEM;
339
340	/* regmap provides a little-endian formatted addr/value */
341	cp->addr = (__le32 )addr;
342	cp->mode = mode;
343	cp->len = val_size;
344	memcpy(&cp->data, val, val_size);
345
346	bt_dev_dbg(ctx->hdev, "Register (0x%x) write", le32_to_cpu(cp->addr));
347
348	skb = hci_cmd_sync(ctx->hdev, ctx->op_write, plen, cp, HCI_CMD_TIMEOUT);
349	if (IS_ERR(skb)) {
350	err = PTR_ERR(skb);
351	bt_dev_err(ctx->hdev, "regmap: Register (0x%x) write error (%d)",
352	le32_to_cpu(cp->addr), err);
353	goto done;
354	}
355	kfree_skb(skb);
356
357	done:
358	kfree(cp);
359	return err;
360	}
361
362	static int regmap_ibt_write(void context, const void data, size_t count)
363	{
364	/* data contains register+value, since we only support 32bit addr,
365	* minimum data size is 4 bytes.
366	*/
367	if (WARN_ONCE(count < 4, "Invalid register access"))
368	return -EINVAL;
369
370	return regmap_ibt_gather_write(context, data, 4, data + 4, count - 4);
371	}
372
373	static void regmap_ibt_free_context(void *context)
374	{
375	kfree(context);
376	}
377
378	static struct regmap_bus regmap_ibt = {
379	.read = regmap_ibt_read,
380	.write = regmap_ibt_write,
381	.gather_write = regmap_ibt_gather_write,
382	.free_context = regmap_ibt_free_context,
383	.reg_format_endian_default = REGMAP_ENDIAN_LITTLE,
384	.val_format_endian_default = REGMAP_ENDIAN_LITTLE,
385	};
386
387	/* Config is the same for all register regions */
388	static const struct regmap_config regmap_ibt_cfg = {
389	.name = "btintel_regmap",
390	.reg_bits = 32,
391	.val_bits = 32,
392	};
393
394	struct regmap btintel_regmap_init(struct hci_dev hdev, u16 opcode_read,
395	u16 opcode_write)
396	{
397	struct regmap_ibt_context *ctx;
398
399	bt_dev_info(hdev, "regmap: Init R%x-W%x region", opcode_read,
400	opcode_write);
401
402	ctx = kzalloc(sizeof(*ctx), GFP_KERNEL);
403	if (!ctx)
404	return ERR_PTR(-ENOMEM);
405
406	ctx->op_read = opcode_read;
407	ctx->op_write = opcode_write;
408	ctx->hdev = hdev;
409
410	return regmap_init(&hdev->dev, &regmap_ibt, ctx, &regmap_ibt_cfg);
411	}
412	EXPORT_SYMBOL_GPL(btintel_regmap_init);
413
48f0ed1b MH	414	MODULE_AUTHOR("Marcel Holtmann <marcel@holtmann.org>");
	415	MODULE_DESCRIPTION("Bluetooth support for Intel devices ver " VERSION);
	416	MODULE_VERSION(VERSION);
	417	MODULE_LICENSE("GPL");
0ed97e82 MH	418	MODULE_FIRMWARE("intel/ibt-11-5.sfi");
0ed97e82 MH	419	MODULE_FIRMWARE("intel/ibt-11-5.ddc");