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Merge tag 'wireless-drivers-next-for-davem-2019-02-22' of git://git.kernel.org/pub...
[linux-2.6-block.git] / drivers / block / skd_main.c
CommitLineData
bec9e8ac
BVA		 1/*
2 * Driver for sTec s1120 PCIe SSDs. sTec was acquired in 2013 by HGST and HGST
3 * was acquired by Western Digital in 2012.
e67f86b3 4 *
bec9e8ac
BVA		 5 * Copyright 2012 sTec, Inc.
6 * Copyright (c) 2017 Western Digital Corporation or its affiliates.
7 *
8 * This file is part of the Linux kernel, and is made available under
9 * the terms of the GNU General Public License version 2.
e67f86b3
AB		 10 */
11
12#include <linux/kernel.h>
13#include <linux/module.h>
14#include <linux/init.h>
15#include <linux/pci.h>
16#include <linux/slab.h>
17#include <linux/spinlock.h>
18#include <linux/blkdev.h>
f18c17c8 19#include <linux/blk-mq.h>
e67f86b3
AB		 20#include <linux/sched.h>
21#include <linux/interrupt.h>
22#include <linux/compiler.h>
23#include <linux/workqueue.h>
e67f86b3
AB		 24#include <linux/delay.h>
25#include <linux/time.h>
26#include <linux/hdreg.h>
27#include <linux/dma-mapping.h>
28#include <linux/completion.h>
29#include <linux/scatterlist.h>
30#include <linux/version.h>
31#include <linux/err.h>
e67f86b3 32#include <linux/aer.h>
e67f86b3 33#include <linux/wait.h>
2da7b403 34#include <linux/stringify.h>
e67f86b3 35#include <scsi/scsi.h>
e67f86b3
AB		 36#include <scsi/sg.h>
37#include <linux/io.h>
38#include <linux/uaccess.h>
4ca90b53 39#include <asm/unaligned.h>
e67f86b3
AB		 40
41#include "skd_s1120.h"
42
43static int skd_dbg_level;
44static int skd_isr_comp_limit = 4;
45
e67f86b3
AB		 46#define SKD_ASSERT(expr) \
47 do { \
48 if (unlikely(!(expr))) { \
49 pr_err("Assertion failed! %s,%s,%s,line=%d\n", \
50 # expr, __FILE__, __func__, __LINE__); \
51 } \
52 } while (0)
53
e67f86b3 54#define DRV_NAME "skd"
e67f86b3 55#define PFX DRV_NAME ": "
e67f86b3 56
bec9e8ac 57MODULE_LICENSE("GPL");
e67f86b3 58
bb9f7dd3 59MODULE_DESCRIPTION("STEC s1120 PCIe SSD block driver");
e67f86b3
AB		 60
61#define PCI_VENDOR_ID_STEC 0x1B39
62#define PCI_DEVICE_ID_S1120 0x0001
63
64#define SKD_FUA_NV (1 << 1)
65#define SKD_MINORS_PER_DEVICE 16
66
67#define SKD_MAX_QUEUE_DEPTH 200u
68
69#define SKD_PAUSE_TIMEOUT (5 * 1000)
70
71#define SKD_N_FITMSG_BYTES (512u)
2da7b403 72#define SKD_MAX_REQ_PER_MSG 14
e67f86b3 73
e67f86b3
AB		 74#define SKD_N_SPECIAL_FITMSG_BYTES (128u)
75
76/* SG elements are 32 bytes, so we can make this 4096 and still be under the
77 * 128KB limit. That allows 4096*4K = 16M xfer size
78 */
79#define SKD_N_SG_PER_REQ_DEFAULT 256u
e67f86b3
AB		 80
81#define SKD_N_COMPLETION_ENTRY 256u
82#define SKD_N_READ_CAP_BYTES (8u)
83
84#define SKD_N_INTERNAL_BYTES (512u)
85
6f7c7675
BVA		 86#define SKD_SKCOMP_SIZE \
87 ((sizeof(struct fit_completion_entry_v1) + \
88 sizeof(struct fit_comp_error_info)) * SKD_N_COMPLETION_ENTRY)
89
e67f86b3 90/* 5 bits of uniqifier, 0xF800 */
e67f86b3
AB		 91#define SKD_ID_TABLE_MASK (3u << 8u)
92#define SKD_ID_RW_REQUEST (0u << 8u)
93#define SKD_ID_INTERNAL (1u << 8u)
e67f86b3
AB		 94#define SKD_ID_FIT_MSG (3u << 8u)
95#define SKD_ID_SLOT_MASK 0x00FFu
96#define SKD_ID_SLOT_AND_TABLE_MASK 0x03FFu
97
e67f86b3
AB		 98#define SKD_N_MAX_SECTORS 2048u
99
100#define SKD_MAX_RETRIES 2u
101
102#define SKD_TIMER_SECONDS(seconds) (seconds)
103#define SKD_TIMER_MINUTES(minutes) ((minutes) * (60))
104
105#define INQ_STD_NBYTES 36
e67f86b3
AB		 106
107enum skd_drvr_state {
108 SKD_DRVR_STATE_LOAD,
109 SKD_DRVR_STATE_IDLE,
110 SKD_DRVR_STATE_BUSY,
111 SKD_DRVR_STATE_STARTING,
112 SKD_DRVR_STATE_ONLINE,
113 SKD_DRVR_STATE_PAUSING,
114 SKD_DRVR_STATE_PAUSED,
e67f86b3
AB		 115 SKD_DRVR_STATE_RESTARTING,
116 SKD_DRVR_STATE_RESUMING,
117 SKD_DRVR_STATE_STOPPING,
118 SKD_DRVR_STATE_FAULT,
119 SKD_DRVR_STATE_DISAPPEARED,
120 SKD_DRVR_STATE_PROTOCOL_MISMATCH,
121 SKD_DRVR_STATE_BUSY_ERASE,
122 SKD_DRVR_STATE_BUSY_SANITIZE,
123 SKD_DRVR_STATE_BUSY_IMMINENT,
124 SKD_DRVR_STATE_WAIT_BOOT,
125 SKD_DRVR_STATE_SYNCING,
126};
127
128#define SKD_WAIT_BOOT_TIMO SKD_TIMER_SECONDS(90u)
129#define SKD_STARTING_TIMO SKD_TIMER_SECONDS(8u)
130#define SKD_RESTARTING_TIMO SKD_TIMER_MINUTES(4u)
e67f86b3
AB		 131#define SKD_BUSY_TIMO SKD_TIMER_MINUTES(20u)
132#define SKD_STARTED_BUSY_TIMO SKD_TIMER_SECONDS(60u)
133#define SKD_START_WAIT_SECONDS 90u
134
135enum skd_req_state {
136 SKD_REQ_STATE_IDLE,
137 SKD_REQ_STATE_SETUP,
138 SKD_REQ_STATE_BUSY,
139 SKD_REQ_STATE_COMPLETED,
140 SKD_REQ_STATE_TIMEOUT,
e67f86b3
AB		 141};
142
e67f86b3
AB		 143enum skd_check_status_action {
144 SKD_CHECK_STATUS_REPORT_GOOD,
145 SKD_CHECK_STATUS_REPORT_SMART_ALERT,
146 SKD_CHECK_STATUS_REQUEUE_REQUEST,
147 SKD_CHECK_STATUS_REPORT_ERROR,
148 SKD_CHECK_STATUS_BUSY_IMMINENT,
149};
150
d891fe60
BVA		 151struct skd_msg_buf {
152 struct fit_msg_hdr fmh;
153 struct skd_scsi_request scsi[SKD_MAX_REQ_PER_MSG];
154};
155
e67f86b3 156struct skd_fitmsg_context {
e67f86b3 157 u32 id;
e67f86b3
AB		 158
159 u32 length;
e67f86b3 160
d891fe60 161 struct skd_msg_buf *msg_buf;
e67f86b3
AB		 162 dma_addr_t mb_dma_address;
163};
164
165struct skd_request_context {
166 enum skd_req_state state;
167
e67f86b3
AB		 168 u16 id;
169 u32 fitmsg_id;
170
e67f86b3 171 u8 flush_cmd;
e67f86b3 172
b1824eef 173 enum dma_data_direction data_dir;
e67f86b3
AB		 174 struct scatterlist *sg;
175 u32 n_sg;
176 u32 sg_byte_count;
177
178 struct fit_sg_descriptor *sksg_list;
179 dma_addr_t sksg_dma_address;
180
181 struct fit_completion_entry_v1 completion;
182
183 struct fit_comp_error_info err_info;
1bee4243 184 int retries;
e67f86b3 185
f2fe4459 186 blk_status_t status;
e67f86b3 187};
e67f86b3
AB		 188
189struct skd_special_context {
190 struct skd_request_context req;
191
e67f86b3
AB		 192 void *data_buf;
193 dma_addr_t db_dma_address;
194
d891fe60 195 struct skd_msg_buf *msg_buf;
e67f86b3
AB		 196 dma_addr_t mb_dma_address;
197};
198
e67f86b3
AB		 199typedef enum skd_irq_type {
200 SKD_IRQ_LEGACY,
201 SKD_IRQ_MSI,
202 SKD_IRQ_MSIX
203} skd_irq_type_t;
204
205#define SKD_MAX_BARS 2
206
207struct skd_device {
85e34112 208 void __iomem *mem_map[SKD_MAX_BARS];
e67f86b3
AB		 209 resource_size_t mem_phys[SKD_MAX_BARS];
210 u32 mem_size[SKD_MAX_BARS];
211
e67f86b3
AB		 212 struct skd_msix_entry *msix_entries;
213
214 struct pci_dev *pdev;
215 int pcie_error_reporting_is_enabled;
216
217 spinlock_t lock;
218 struct gendisk *disk;
ca33dd92 219 struct blk_mq_tag_set tag_set;
e67f86b3 220 struct request_queue *queue;
91f85da4 221 struct skd_fitmsg_context *skmsg;
e67f86b3
AB		 222 struct device *class_dev;
223 int gendisk_on;
224 int sync_done;
225
e67f86b3
AB		 226 u32 devno;
227 u32 major;
e67f86b3
AB		 228 char isr_name[30];
229
230 enum skd_drvr_state state;
231 u32 drive_state;
232
e67f86b3
AB		 233 u32 cur_max_queue_depth;
234 u32 queue_low_water_mark;
235 u32 dev_max_queue_depth;
236
237 u32 num_fitmsg_context;
238 u32 num_req_context;
239
e67f86b3
AB		 240 struct skd_fitmsg_context *skmsg_table;
241
e67f86b3
AB		 242 struct skd_special_context internal_skspcl;
243 u32 read_cap_blocksize;
244 u32 read_cap_last_lba;
245 int read_cap_is_valid;
246 int inquiry_is_valid;
247 u8 inq_serial_num[13]; /*12 chars plus null term */
e67f86b3
AB		 248
249 u8 skcomp_cycle;
250 u32 skcomp_ix;
a3db102d
BVA		 251 struct kmem_cache *msgbuf_cache;
252 struct kmem_cache *sglist_cache;
253 struct kmem_cache *databuf_cache;
e67f86b3
AB		 254 struct fit_completion_entry_v1 *skcomp_table;
255 struct fit_comp_error_info *skerr_table;
256 dma_addr_t cq_dma_address;
257
258 wait_queue_head_t waitq;
259
260 struct timer_list timer;
261 u32 timer_countdown;
262 u32 timer_substate;
263
e67f86b3
AB		 264 int sgs_per_request;
265 u32 last_mtd;
266
267 u32 proto_ver;
268
269 int dbg_level;
270 u32 connect_time_stamp;
271 int connect_retries;
272#define SKD_MAX_CONNECT_RETRIES 16
273 u32 drive_jiffies;
274
275 u32 timo_slot;
276
ca33dd92 277 struct work_struct start_queue;
38d4a1bb 278 struct work_struct completion_worker;
e67f86b3
AB		 279};
280
281#define SKD_WRITEL(DEV, VAL, OFF) skd_reg_write32(DEV, VAL, OFF)
282#define SKD_READL(DEV, OFF) skd_reg_read32(DEV, OFF)
283#define SKD_WRITEQ(DEV, VAL, OFF) skd_reg_write64(DEV, VAL, OFF)
284
285static inline u32 skd_reg_read32(struct skd_device *skdev, u32 offset)
286{
14262a4b 287 u32 val = readl(skdev->mem_map[1] + offset);
e67f86b3 288
14262a4b 289 if (unlikely(skdev->dbg_level >= 2))
f98806d6 290 dev_dbg(&skdev->pdev->dev, "offset %x = %x\n", offset, val);
14262a4b 291 return val;
e67f86b3
AB		 292}
293
294static inline void skd_reg_write32(struct skd_device *skdev, u32 val,
295 u32 offset)
296{
14262a4b
BVA		 297 writel(val, skdev->mem_map[1] + offset);
298 if (unlikely(skdev->dbg_level >= 2))
f98806d6 299 dev_dbg(&skdev->pdev->dev, "offset %x = %x\n", offset, val);
e67f86b3
AB		 300}
301
302static inline void skd_reg_write64(struct skd_device *skdev, u64 val,
303 u32 offset)
304{
14262a4b
BVA		 305 writeq(val, skdev->mem_map[1] + offset);
306 if (unlikely(skdev->dbg_level >= 2))
f98806d6
BVA		 307 dev_dbg(&skdev->pdev->dev, "offset %x = %016llx\n", offset,
308 val);
e67f86b3
AB		 309}
310
311
744353b6 312#define SKD_IRQ_DEFAULT SKD_IRQ_MSIX
e67f86b3
AB		 313static int skd_isr_type = SKD_IRQ_DEFAULT;
314
315module_param(skd_isr_type, int, 0444);
316MODULE_PARM_DESC(skd_isr_type, "Interrupt type capability."
317 " (0==legacy, 1==MSI, 2==MSI-X, default==1)");
318
319#define SKD_MAX_REQ_PER_MSG_DEFAULT 1
320static int skd_max_req_per_msg = SKD_MAX_REQ_PER_MSG_DEFAULT;
321
322module_param(skd_max_req_per_msg, int, 0444);
323MODULE_PARM_DESC(skd_max_req_per_msg,
324 "Maximum SCSI requests packed in a single message."
2da7b403 325 " (1-" __stringify(SKD_MAX_REQ_PER_MSG) ", default==1)");
e67f86b3
AB		 326
327#define SKD_MAX_QUEUE_DEPTH_DEFAULT 64
328#define SKD_MAX_QUEUE_DEPTH_DEFAULT_STR "64"
329static int skd_max_queue_depth = SKD_MAX_QUEUE_DEPTH_DEFAULT;
330
331module_param(skd_max_queue_depth, int, 0444);
332MODULE_PARM_DESC(skd_max_queue_depth,
333 "Maximum SCSI requests issued to s1120."
334 " (1-200, default==" SKD_MAX_QUEUE_DEPTH_DEFAULT_STR ")");
335
336static int skd_sgs_per_request = SKD_N_SG_PER_REQ_DEFAULT;
337module_param(skd_sgs_per_request, int, 0444);
338MODULE_PARM_DESC(skd_sgs_per_request,
339 "Maximum SG elements per block request."
340 " (1-4096, default==256)");
341
63214121 342static int skd_max_pass_thru = 1;
e67f86b3
AB		 343module_param(skd_max_pass_thru, int, 0444);
344MODULE_PARM_DESC(skd_max_pass_thru,
63214121 345 "Maximum SCSI pass-thru at a time. IGNORED");
e67f86b3
AB		 346
347module_param(skd_dbg_level, int, 0444);
348MODULE_PARM_DESC(skd_dbg_level, "s1120 debug level (0,1,2)");
349
350module_param(skd_isr_comp_limit, int, 0444);
351MODULE_PARM_DESC(skd_isr_comp_limit, "s1120 isr comp limit (0=none) default=4");
352
e67f86b3
AB		 353/* Major device number dynamically assigned. */
354static u32 skd_major;
355
e67f86b3
AB		 356static void skd_destruct(struct skd_device *skdev);
357static const struct block_device_operations skd_blockdev_ops;
358static void skd_send_fitmsg(struct skd_device *skdev,
359 struct skd_fitmsg_context *skmsg);
360static void skd_send_special_fitmsg(struct skd_device *skdev,
361 struct skd_special_context *skspcl);
2a842aca 362static bool skd_preop_sg_list(struct skd_device *skdev,
e67f86b3
AB		 363 struct skd_request_context *skreq);
364static void skd_postop_sg_list(struct skd_device *skdev,
365 struct skd_request_context *skreq);
366
367static void skd_restart_device(struct skd_device *skdev);
368static int skd_quiesce_dev(struct skd_device *skdev);
369static int skd_unquiesce_dev(struct skd_device *skdev);
e67f86b3
AB		 370static void skd_disable_interrupts(struct skd_device *skdev);
371static void skd_isr_fwstate(struct skd_device *skdev);
79ce12a8 372static void skd_recover_requests(struct skd_device *skdev);
e67f86b3
AB		 373static void skd_soft_reset(struct skd_device *skdev);
374
e67f86b3
AB		 375const char *skd_drive_state_to_str(int state);
376const char *skd_skdev_state_to_str(enum skd_drvr_state state);
377static void skd_log_skdev(struct skd_device *skdev, const char *event);
e67f86b3
AB		 378static void skd_log_skreq(struct skd_device *skdev,
379 struct skd_request_context *skreq, const char *event);
380
e67f86b3
AB		 381/*
382 *****************************************************************************
383 * READ/WRITE REQUESTS
384 *****************************************************************************
385 */
7baa8572 386static bool skd_inc_in_flight(struct request *rq, void *data, bool reserved)
d4d0f5fc
BVA		 387{
388 int *count = data;
389
390 count++;
7baa8572 391 return true;
d4d0f5fc
BVA		 392}
393
394static int skd_in_flight(struct skd_device *skdev)
395{
396 int count = 0;
397
398 blk_mq_tagset_busy_iter(&skdev->tag_set, skd_inc_in_flight, &count);
399
400 return count;
401}
402
e67f86b3
AB		 403static void
404skd_prep_rw_cdb(struct skd_scsi_request *scsi_req,
405 int data_dir, unsigned lba,
406 unsigned count)
407{
408 if (data_dir == READ)
fb4844b8 409 scsi_req->cdb[0] = READ_10;
e67f86b3 410 else
fb4844b8 411 scsi_req->cdb[0] = WRITE_10;
e67f86b3
AB		 412
413 scsi_req->cdb[1] = 0;
414 scsi_req->cdb[2] = (lba & 0xff000000) >> 24;
415 scsi_req->cdb[3] = (lba & 0xff0000) >> 16;
416 scsi_req->cdb[4] = (lba & 0xff00) >> 8;
417 scsi_req->cdb[5] = (lba & 0xff);
418 scsi_req->cdb[6] = 0;
419 scsi_req->cdb[7] = (count & 0xff00) >> 8;
420 scsi_req->cdb[8] = count & 0xff;
421 scsi_req->cdb[9] = 0;
422}
423
424static void
425skd_prep_zerosize_flush_cdb(struct skd_scsi_request *scsi_req,
38d4a1bb 426 struct skd_request_context *skreq)
e67f86b3
AB		 427{
428 skreq->flush_cmd = 1;
429
fb4844b8 430 scsi_req->cdb[0] = SYNCHRONIZE_CACHE;
e67f86b3
AB		 431 scsi_req->cdb[1] = 0;
432 scsi_req->cdb[2] = 0;
433 scsi_req->cdb[3] = 0;
434 scsi_req->cdb[4] = 0;
435 scsi_req->cdb[5] = 0;
436 scsi_req->cdb[6] = 0;
437 scsi_req->cdb[7] = 0;
438 scsi_req->cdb[8] = 0;
439 scsi_req->cdb[9] = 0;
440}
441
3d17a679
BVA		 442/*
443 * Return true if and only if all pending requests should be failed.
444 */
445static bool skd_fail_all(struct request_queue *q)
cb6981b9
BVA		 446{
447 struct skd_device *skdev = q->queuedata;
448
449 SKD_ASSERT(skdev->state != SKD_DRVR_STATE_ONLINE);
450
451 skd_log_skdev(skdev, "req_not_online");
452 switch (skdev->state) {
453 case SKD_DRVR_STATE_PAUSING:
454 case SKD_DRVR_STATE_PAUSED:
455 case SKD_DRVR_STATE_STARTING:
456 case SKD_DRVR_STATE_RESTARTING:
457 case SKD_DRVR_STATE_WAIT_BOOT:
458 /* In case of starting, we haven't started the queue,
459 * so we can't get here... but requests are
460 * possibly hanging out waiting for us because we
461 * reported the dev/skd0 already. They'll wait
462 * forever if connect doesn't complete.
463 * What to do??? delay dev/skd0 ??
464 */
465 case SKD_DRVR_STATE_BUSY:
466 case SKD_DRVR_STATE_BUSY_IMMINENT:
467 case SKD_DRVR_STATE_BUSY_ERASE:
3d17a679 468 return false;
cb6981b9
BVA		 469
470 case SKD_DRVR_STATE_BUSY_SANITIZE:
471 case SKD_DRVR_STATE_STOPPING:
472 case SKD_DRVR_STATE_SYNCING:
473 case SKD_DRVR_STATE_FAULT:
474 case SKD_DRVR_STATE_DISAPPEARED:
475 default:
3d17a679 476 return true;
cb6981b9 477 }
cb6981b9 478}
e67f86b3 479
c39c6c77
BVA		 480static blk_status_t skd_mq_queue_rq(struct blk_mq_hw_ctx *hctx,
481 const struct blk_mq_queue_data *mqd)
e67f86b3 482{
c39c6c77 483 struct request *const req = mqd->rq;
91f85da4 484 struct request_queue *const q = req->q;
e67f86b3 485 struct skd_device *skdev = q->queuedata;
91f85da4
BVA		 486 struct skd_fitmsg_context *skmsg;
487 struct fit_msg_hdr *fmh;
488 const u32 tag = blk_mq_unique_tag(req);
e7278a8b 489 struct skd_request_context *const skreq = blk_mq_rq_to_pdu(req);
e67f86b3 490 struct skd_scsi_request *scsi_req;
74c74282 491 unsigned long flags = 0;
e2bb5548
BVA		 492 const u32 lba = blk_rq_pos(req);
493 const u32 count = blk_rq_sectors(req);
494 const int data_dir = rq_data_dir(req);
91f85da4 495
c39c6c77
BVA		 496 if (unlikely(skdev->state != SKD_DRVR_STATE_ONLINE))
497 return skd_fail_all(q) ? BLK_STS_IOERR : BLK_STS_RESOURCE;
498
1bee4243
CH		 499 if (!(req->rq_flags & RQF_DONTPREP)) {
500 skreq->retries = 0;
501 req->rq_flags |= RQF_DONTPREP;
502 }
503
c39c6c77
BVA		 504 blk_mq_start_request(req);
505
91f85da4
BVA		 506 WARN_ONCE(tag >= skd_max_queue_depth, "%#x > %#x (nr_requests = %lu)\n",
507 tag, skd_max_queue_depth, q->nr_requests);
508
509 SKD_ASSERT(skreq->state == SKD_REQ_STATE_IDLE);
510
91f85da4
BVA		 511 dev_dbg(&skdev->pdev->dev,
512 "new req=%p lba=%u(0x%x) count=%u(0x%x) dir=%d\n", req, lba,
513 lba, count, count, data_dir);
514
515 skreq->id = tag + SKD_ID_RW_REQUEST;
516 skreq->flush_cmd = 0;
517 skreq->n_sg = 0;
518 skreq->sg_byte_count = 0;
519
91f85da4
BVA		 520 skreq->fitmsg_id = 0;
521
522 skreq->data_dir = data_dir == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
523
524 if (req->bio && !skd_preop_sg_list(skdev, skreq)) {
525 dev_dbg(&skdev->pdev->dev, "error Out\n");
795bc1b5
BVA		 526 skreq->status = BLK_STS_RESOURCE;
527 blk_mq_complete_request(req);
c39c6c77 528 return BLK_STS_OK;
91f85da4
BVA		 529 }
530
a3db102d
BVA		 531 dma_sync_single_for_device(&skdev->pdev->dev, skreq->sksg_dma_address,
532 skreq->n_sg *
533 sizeof(struct fit_sg_descriptor),
534 DMA_TO_DEVICE);
535
91f85da4 536 /* Either a FIT msg is in progress or we have to start one. */
74c74282
BVA		 537 if (skd_max_req_per_msg == 1) {
538 skmsg = NULL;
539 } else {
540 spin_lock_irqsave(&skdev->lock, flags);
541 skmsg = skdev->skmsg;
542 }
91f85da4
BVA		 543 if (!skmsg) {
544 skmsg = &skdev->skmsg_table[tag];
545 skdev->skmsg = skmsg;
546
547 /* Initialize the FIT msg header */
548 fmh = &skmsg->msg_buf->fmh;
549 memset(fmh, 0, sizeof(*fmh));
550 fmh->protocol_id = FIT_PROTOCOL_ID_SOFIT;
551 skmsg->length = sizeof(*fmh);
552 } else {
553 fmh = &skmsg->msg_buf->fmh;
554 }
555
556 skreq->fitmsg_id = skmsg->id;
557
558 scsi_req = &skmsg->msg_buf->scsi[fmh->num_protocol_cmds_coalesced];
559 memset(scsi_req, 0, sizeof(*scsi_req));
560
91f85da4 561 scsi_req->hdr.tag = skreq->id;
e2bb5548
BVA		 562 scsi_req->hdr.sg_list_dma_address =
563 cpu_to_be64(skreq->sksg_dma_address);
91f85da4 564
e2bb5548 565 if (req_op(req) == REQ_OP_FLUSH) {
91f85da4
BVA		 566 skd_prep_zerosize_flush_cdb(scsi_req, skreq);
567 SKD_ASSERT(skreq->flush_cmd == 1);
568 } else {
569 skd_prep_rw_cdb(scsi_req, data_dir, lba, count);
570 }
571
e2bb5548 572 if (req->cmd_flags & REQ_FUA)
91f85da4
BVA		 573 scsi_req->cdb[1] |= SKD_FUA_NV;
574
575 scsi_req->hdr.sg_list_len_bytes = cpu_to_be32(skreq->sg_byte_count);
576
577 /* Complete resource allocations. */
578 skreq->state = SKD_REQ_STATE_BUSY;
579
580 skmsg->length += sizeof(struct skd_scsi_request);
581 fmh->num_protocol_cmds_coalesced++;
582
91f85da4 583 dev_dbg(&skdev->pdev->dev, "req=0x%x busy=%d\n", skreq->id,
d4d0f5fc 584 skd_in_flight(skdev));
91f85da4
BVA		 585
586 /*
587 * If the FIT msg buffer is full send it.
588 */
74c74282 589 if (skd_max_req_per_msg == 1) {
91f85da4 590 skd_send_fitmsg(skdev, skmsg);
74c74282 591 } else {
c39c6c77 592 if (mqd->last ||
74c74282
BVA		 593 fmh->num_protocol_cmds_coalesced >= skd_max_req_per_msg) {
594 skd_send_fitmsg(skdev, skmsg);
595 skdev->skmsg = NULL;
596 }
597 spin_unlock_irqrestore(&skdev->lock, flags);
91f85da4 598 }
e67f86b3 599
ca33dd92 600 return BLK_STS_OK;
e67f86b3
AB		 601}
602
f2fe4459
BVA		 603static enum blk_eh_timer_return skd_timed_out(struct request *req,
604 bool reserved)
a74d5b76
BVA		 605{
606 struct skd_device *skdev = req->q->queuedata;
607
608 dev_err(&skdev->pdev->dev, "request with tag %#x timed out\n",
609 blk_mq_unique_tag(req));
610
f2fe4459 611 return BLK_EH_RESET_TIMER;
a74d5b76
BVA		 612}
613
296cb94c 614static void skd_complete_rq(struct request *req)
a74d5b76 615{
a74d5b76 616 struct skd_request_context *skreq = blk_mq_rq_to_pdu(req);
a74d5b76 617
f2fe4459 618 blk_mq_end_request(req, skreq->status);
a74d5b76
BVA		 619}
620
2a842aca 621static bool skd_preop_sg_list(struct skd_device *skdev,
38d4a1bb 622 struct skd_request_context *skreq)
e67f86b3 623{
e7278a8b 624 struct request *req = blk_mq_rq_from_pdu(skreq);
06f824c4 625 struct scatterlist *sgl = &skreq->sg[0], *sg;
e67f86b3
AB		 626 int n_sg;
627 int i;
628
629 skreq->sg_byte_count = 0;
630
b1824eef
BVA		 631 WARN_ON_ONCE(skreq->data_dir != DMA_TO_DEVICE &&
632 skreq->data_dir != DMA_FROM_DEVICE);
e67f86b3 633
06f824c4 634 n_sg = blk_rq_map_sg(skdev->queue, req, sgl);
e67f86b3 635 if (n_sg <= 0)
2a842aca 636 return false;
e67f86b3
AB		 637
638 /*
639 * Map scatterlist to PCI bus addresses.
640 * Note PCI might change the number of entries.
641 */
13812621 642 n_sg = dma_map_sg(&skdev->pdev->dev, sgl, n_sg, skreq->data_dir);
e67f86b3 643 if (n_sg <= 0)
2a842aca 644 return false;
e67f86b3
AB		 645
646 SKD_ASSERT(n_sg <= skdev->sgs_per_request);
647
648 skreq->n_sg = n_sg;
649
06f824c4 650 for_each_sg(sgl, sg, n_sg, i) {
e67f86b3 651 struct fit_sg_descriptor *sgd = &skreq->sksg_list[i];
06f824c4
BVA		 652 u32 cnt = sg_dma_len(sg);
653 uint64_t dma_addr = sg_dma_address(sg);
e67f86b3
AB		 654
655 sgd->control = FIT_SGD_CONTROL_NOT_LAST;
656 sgd->byte_count = cnt;
657 skreq->sg_byte_count += cnt;
658 sgd->host_side_addr = dma_addr;
659 sgd->dev_side_addr = 0;
660 }
661
662 skreq->sksg_list[n_sg - 1].next_desc_ptr = 0LL;
663 skreq->sksg_list[n_sg - 1].control = FIT_SGD_CONTROL_LAST;
664
665 if (unlikely(skdev->dbg_level > 1)) {
f98806d6 666 dev_dbg(&skdev->pdev->dev,
ea870bb2
HD		 667 "skreq=%x sksg_list=%p sksg_dma=%pad\n",
668 skreq->id, skreq->sksg_list, &skreq->sksg_dma_address);
e67f86b3
AB		 669 for (i = 0; i < n_sg; i++) {
670 struct fit_sg_descriptor *sgd = &skreq->sksg_list[i];
f98806d6
BVA		 671
672 dev_dbg(&skdev->pdev->dev,
673 " sg[%d] count=%u ctrl=0x%x addr=0x%llx next=0x%llx\n",
674 i, sgd->byte_count, sgd->control,
675 sgd->host_side_addr, sgd->next_desc_ptr);
e67f86b3
AB		 676 }
677 }
678
2a842aca 679 return true;
e67f86b3
AB		 680}
681
fcd37eb3 682static void skd_postop_sg_list(struct skd_device *skdev,
38d4a1bb 683 struct skd_request_context *skreq)
e67f86b3 684{
e67f86b3
AB		 685 /*
686 * restore the next ptr for next IO request so we
687 * don't have to set it every time.
688 */
689 skreq->sksg_list[skreq->n_sg - 1].next_desc_ptr =
690 skreq->sksg_dma_address +
691 ((skreq->n_sg) * sizeof(struct fit_sg_descriptor));
13812621
CH		 692 dma_unmap_sg(&skdev->pdev->dev, &skreq->sg[0], skreq->n_sg,
693 skreq->data_dir);
e67f86b3
AB		 694}
695
e67f86b3
AB		 696/*
697 *****************************************************************************
698 * TIMER
699 *****************************************************************************
700 */
701
702static void skd_timer_tick_not_online(struct skd_device *skdev);
703
ca33dd92
BVA		 704static void skd_start_queue(struct work_struct *work)
705{
706 struct skd_device *skdev = container_of(work, typeof(*skdev),
707 start_queue);
708
709 /*
710 * Although it is safe to call blk_start_queue() from interrupt
711 * context, blk_mq_start_hw_queues() must not be called from
712 * interrupt context.
713 */
714 blk_mq_start_hw_queues(skdev->queue);
715}
716
e99e88a9 717static void skd_timer_tick(struct timer_list *t)
e67f86b3 718{
e99e88a9 719 struct skd_device *skdev = from_timer(skdev, t, timer);
e67f86b3
AB		 720 unsigned long reqflags;
721 u32 state;
722
723 if (skdev->state == SKD_DRVR_STATE_FAULT)
724 /* The driver has declared fault, and we want it to
725 * stay that way until driver is reloaded.
726 */
727 return;
728
729 spin_lock_irqsave(&skdev->lock, reqflags);
730
731 state = SKD_READL(skdev, FIT_STATUS);
732 state &= FIT_SR_DRIVE_STATE_MASK;
733 if (state != skdev->drive_state)
734 skd_isr_fwstate(skdev);
735
a74d5b76 736 if (skdev->state != SKD_DRVR_STATE_ONLINE)
e67f86b3 737 skd_timer_tick_not_online(skdev);
e67f86b3 738
e67f86b3
AB		 739 mod_timer(&skdev->timer, (jiffies + HZ));
740
741 spin_unlock_irqrestore(&skdev->lock, reqflags);
742}
743
744static void skd_timer_tick_not_online(struct skd_device *skdev)
745{
746 switch (skdev->state) {
747 case SKD_DRVR_STATE_IDLE:
748 case SKD_DRVR_STATE_LOAD:
749 break;
750 case SKD_DRVR_STATE_BUSY_SANITIZE:
f98806d6
BVA		 751 dev_dbg(&skdev->pdev->dev,
752 "drive busy sanitize[%x], driver[%x]\n",
753 skdev->drive_state, skdev->state);
e67f86b3
AB		 754 /* If we've been in sanitize for 3 seconds, we figure we're not
755 * going to get anymore completions, so recover requests now
756 */
757 if (skdev->timer_countdown > 0) {
758 skdev->timer_countdown--;
759 return;
760 }
79ce12a8 761 skd_recover_requests(skdev);
e67f86b3
AB		 762 break;
763
764 case SKD_DRVR_STATE_BUSY:
765 case SKD_DRVR_STATE_BUSY_IMMINENT:
766 case SKD_DRVR_STATE_BUSY_ERASE:
f98806d6
BVA		 767 dev_dbg(&skdev->pdev->dev, "busy[%x], countdown=%d\n",
768 skdev->state, skdev->timer_countdown);
e67f86b3
AB		 769 if (skdev->timer_countdown > 0) {
770 skdev->timer_countdown--;
771 return;
772 }
f98806d6
BVA		 773 dev_dbg(&skdev->pdev->dev,
774 "busy[%x], timedout=%d, restarting device.",
775 skdev->state, skdev->timer_countdown);
e67f86b3
AB		 776 skd_restart_device(skdev);
777 break;
778
779 case SKD_DRVR_STATE_WAIT_BOOT:
780 case SKD_DRVR_STATE_STARTING:
781 if (skdev->timer_countdown > 0) {
782 skdev->timer_countdown--;
783 return;
784 }
785 /* For now, we fault the drive. Could attempt resets to
786 * revcover at some point. */
787 skdev->state = SKD_DRVR_STATE_FAULT;
788
f98806d6
BVA		 789 dev_err(&skdev->pdev->dev, "DriveFault Connect Timeout (%x)\n",
790 skdev->drive_state);
e67f86b3
AB		 791
792 /*start the queue so we can respond with error to requests */
793 /* wakeup anyone waiting for startup complete */
ca33dd92 794 schedule_work(&skdev->start_queue);
e67f86b3
AB		 795 skdev->gendisk_on = -1;
796 wake_up_interruptible(&skdev->waitq);
797 break;
798
799 case SKD_DRVR_STATE_ONLINE:
800 /* shouldn't get here. */
801 break;
802
803 case SKD_DRVR_STATE_PAUSING:
804 case SKD_DRVR_STATE_PAUSED:
805 break;
806
e67f86b3
AB		 807 case SKD_DRVR_STATE_RESTARTING:
808 if (skdev->timer_countdown > 0) {
809 skdev->timer_countdown--;
810 return;
811 }
812 /* For now, we fault the drive. Could attempt resets to
813 * revcover at some point. */
814 skdev->state = SKD_DRVR_STATE_FAULT;
f98806d6
BVA		 815 dev_err(&skdev->pdev->dev,
816 "DriveFault Reconnect Timeout (%x)\n",
817 skdev->drive_state);
e67f86b3
AB		 818
819 /*
820 * Recovering does two things:
821 * 1. completes IO with error
822 * 2. reclaims dma resources
823 * When is it safe to recover requests?
824 * - if the drive state is faulted
825 * - if the state is still soft reset after out timeout
826 * - if the drive registers are dead (state = FF)
827 * If it is "unsafe", we still need to recover, so we will
828 * disable pci bus mastering and disable our interrupts.
829 */
830
831 if ((skdev->drive_state == FIT_SR_DRIVE_SOFT_RESET) ||
832 (skdev->drive_state == FIT_SR_DRIVE_FAULT) ||
833 (skdev->drive_state == FIT_SR_DRIVE_STATE_MASK))
834 /* It never came out of soft reset. Try to
835 * recover the requests and then let them
836 * fail. This is to mitigate hung processes. */
79ce12a8 837 skd_recover_requests(skdev);
e67f86b3 838 else {
f98806d6
BVA		 839 dev_err(&skdev->pdev->dev, "Disable BusMaster (%x)\n",
840 skdev->drive_state);
e67f86b3
AB		 841 pci_disable_device(skdev->pdev);
842 skd_disable_interrupts(skdev);
79ce12a8 843 skd_recover_requests(skdev);
e67f86b3
AB		 844 }
845
846 /*start the queue so we can respond with error to requests */
847 /* wakeup anyone waiting for startup complete */
ca33dd92 848 schedule_work(&skdev->start_queue);
e67f86b3
AB		 849 skdev->gendisk_on = -1;
850 wake_up_interruptible(&skdev->waitq);
851 break;
852
853 case SKD_DRVR_STATE_RESUMING:
854 case SKD_DRVR_STATE_STOPPING:
855 case SKD_DRVR_STATE_SYNCING:
856 case SKD_DRVR_STATE_FAULT:
857 case SKD_DRVR_STATE_DISAPPEARED:
858 default:
859 break;
860 }
861}
862
863static int skd_start_timer(struct skd_device *skdev)
864{
865 int rc;
866
e99e88a9 867 timer_setup(&skdev->timer, skd_timer_tick, 0);
e67f86b3
AB		 868
869 rc = mod_timer(&skdev->timer, (jiffies + HZ));
870 if (rc)
f98806d6 871 dev_err(&skdev->pdev->dev, "failed to start timer %d\n", rc);
e67f86b3
AB		 872 return rc;
873}
874
875static void skd_kill_timer(struct skd_device *skdev)
876{
877 del_timer_sync(&skdev->timer);
878}
879
e67f86b3
AB		 880/*
881 *****************************************************************************
882 * INTERNAL REQUESTS -- generated by driver itself
883 *****************************************************************************
884 */
885
886static int skd_format_internal_skspcl(struct skd_device *skdev)
887{
888 struct skd_special_context *skspcl = &skdev->internal_skspcl;
889 struct fit_sg_descriptor *sgd = &skspcl->req.sksg_list[0];
890 struct fit_msg_hdr *fmh;
891 uint64_t dma_address;
892 struct skd_scsi_request *scsi;
893
d891fe60 894 fmh = &skspcl->msg_buf->fmh;
e67f86b3
AB		 895 fmh->protocol_id = FIT_PROTOCOL_ID_SOFIT;
896 fmh->num_protocol_cmds_coalesced = 1;
897
d891fe60 898 scsi = &skspcl->msg_buf->scsi[0];
e67f86b3
AB		 899 memset(scsi, 0, sizeof(*scsi));
900 dma_address = skspcl->req.sksg_dma_address;
901 scsi->hdr.sg_list_dma_address = cpu_to_be64(dma_address);
32494df9 902 skspcl->req.n_sg = 1;
e67f86b3
AB		 903 sgd->control = FIT_SGD_CONTROL_LAST;
904 sgd->byte_count = 0;
905 sgd->host_side_addr = skspcl->db_dma_address;
906 sgd->dev_side_addr = 0;
907 sgd->next_desc_ptr = 0LL;
908
909 return 1;
910}
911
912#define WR_BUF_SIZE SKD_N_INTERNAL_BYTES
913
914static void skd_send_internal_skspcl(struct skd_device *skdev,
915 struct skd_special_context *skspcl,
916 u8 opcode)
917{
918 struct fit_sg_descriptor *sgd = &skspcl->req.sksg_list[0];
919 struct skd_scsi_request *scsi;
920 unsigned char *buf = skspcl->data_buf;
921 int i;
922
923 if (skspcl->req.state != SKD_REQ_STATE_IDLE)
924 /*
925 * A refresh is already in progress.
926 * Just wait for it to finish.
927 */
928 return;
929
e67f86b3 930 skspcl->req.state = SKD_REQ_STATE_BUSY;
e67f86b3 931
d891fe60 932 scsi = &skspcl->msg_buf->scsi[0];
e67f86b3
AB		 933 scsi->hdr.tag = skspcl->req.id;
934
935 memset(scsi->cdb, 0, sizeof(scsi->cdb));
936
937 switch (opcode) {
938 case TEST_UNIT_READY:
939 scsi->cdb[0] = TEST_UNIT_READY;
940 sgd->byte_count = 0;
941 scsi->hdr.sg_list_len_bytes = 0;
942 break;
943
944 case READ_CAPACITY:
945 scsi->cdb[0] = READ_CAPACITY;
946 sgd->byte_count = SKD_N_READ_CAP_BYTES;
947 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
948 break;
949
950 case INQUIRY:
951 scsi->cdb[0] = INQUIRY;
952 scsi->cdb[1] = 0x01; /* evpd */
953 scsi->cdb[2] = 0x80; /* serial number page */
954 scsi->cdb[4] = 0x10;
955 sgd->byte_count = 16;
956 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
957 break;
958
959 case SYNCHRONIZE_CACHE:
960 scsi->cdb[0] = SYNCHRONIZE_CACHE;
961 sgd->byte_count = 0;
962 scsi->hdr.sg_list_len_bytes = 0;
963 break;
964
965 case WRITE_BUFFER:
966 scsi->cdb[0] = WRITE_BUFFER;
967 scsi->cdb[1] = 0x02;
968 scsi->cdb[7] = (WR_BUF_SIZE & 0xFF00) >> 8;
969 scsi->cdb[8] = WR_BUF_SIZE & 0xFF;
970 sgd->byte_count = WR_BUF_SIZE;
971 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
972 /* fill incrementing byte pattern */
973 for (i = 0; i < sgd->byte_count; i++)
974 buf[i] = i & 0xFF;
975 break;
976
977 case READ_BUFFER:
978 scsi->cdb[0] = READ_BUFFER;
979 scsi->cdb[1] = 0x02;
980 scsi->cdb[7] = (WR_BUF_SIZE & 0xFF00) >> 8;
981 scsi->cdb[8] = WR_BUF_SIZE & 0xFF;
982 sgd->byte_count = WR_BUF_SIZE;
983 scsi->hdr.sg_list_len_bytes = cpu_to_be32(sgd->byte_count);
984 memset(skspcl->data_buf, 0, sgd->byte_count);
985 break;
986
987 default:
988 SKD_ASSERT("Don't know what to send");
989 return;
990
991 }
992 skd_send_special_fitmsg(skdev, skspcl);
993}
994
995static void skd_refresh_device_data(struct skd_device *skdev)
996{
997 struct skd_special_context *skspcl = &skdev->internal_skspcl;
998
999 skd_send_internal_skspcl(skdev, skspcl, TEST_UNIT_READY);
1000}
1001
1002static int skd_chk_read_buf(struct skd_device *skdev,
1003 struct skd_special_context *skspcl)
1004{
1005 unsigned char *buf = skspcl->data_buf;
1006 int i;
1007
1008 /* check for incrementing byte pattern */
1009 for (i = 0; i < WR_BUF_SIZE; i++)
1010 if (buf[i] != (i & 0xFF))
1011 return 1;
1012
1013 return 0;
1014}
1015
1016static void skd_log_check_status(struct skd_device *skdev, u8 status, u8 key,
1017 u8 code, u8 qual, u8 fruc)
1018{
1019 /* If the check condition is of special interest, log a message */
1020 if ((status == SAM_STAT_CHECK_CONDITION) && (key == 0x02)
1021 && (code == 0x04) && (qual == 0x06)) {
f98806d6
BVA		 1022 dev_err(&skdev->pdev->dev,
1023 "*** LOST_WRITE_DATA ERROR *** key/asc/ascq/fruc %02x/%02x/%02x/%02x\n",
1024 key, code, qual, fruc);
e67f86b3
AB		 1025 }
1026}
1027
1028static void skd_complete_internal(struct skd_device *skdev,
85e34112
BVA		 1029 struct fit_completion_entry_v1 *skcomp,
1030 struct fit_comp_error_info *skerr,
e67f86b3
AB		 1031 struct skd_special_context *skspcl)
1032{
1033 u8 *buf = skspcl->data_buf;
1034 u8 status;
1035 int i;
d891fe60 1036 struct skd_scsi_request *scsi = &skspcl->msg_buf->scsi[0];
e67f86b3 1037
760b48ca
BVA		 1038 lockdep_assert_held(&skdev->lock);
1039
e67f86b3
AB		 1040 SKD_ASSERT(skspcl == &skdev->internal_skspcl);
1041
f98806d6 1042 dev_dbg(&skdev->pdev->dev, "complete internal %x\n", scsi->cdb[0]);
e67f86b3 1043
a3db102d
BVA		 1044 dma_sync_single_for_cpu(&skdev->pdev->dev,
1045 skspcl->db_dma_address,
1046 skspcl->req.sksg_list[0].byte_count,
1047 DMA_BIDIRECTIONAL);
1048
e67f86b3
AB		 1049 skspcl->req.completion = *skcomp;
1050 skspcl->req.state = SKD_REQ_STATE_IDLE;
e67f86b3
AB		 1051
1052 status = skspcl->req.completion.status;
1053
1054 skd_log_check_status(skdev, status, skerr->key, skerr->code,
1055 skerr->qual, skerr->fruc);
1056
1057 switch (scsi->cdb[0]) {
1058 case TEST_UNIT_READY:
1059 if (status == SAM_STAT_GOOD)
1060 skd_send_internal_skspcl(skdev, skspcl, WRITE_BUFFER);
1061 else if ((status == SAM_STAT_CHECK_CONDITION) &&
1062 (skerr->key == MEDIUM_ERROR))
1063 skd_send_internal_skspcl(skdev, skspcl, WRITE_BUFFER);
1064 else {
1065 if (skdev->state == SKD_DRVR_STATE_STOPPING) {
f98806d6
BVA		 1066 dev_dbg(&skdev->pdev->dev,
1067 "TUR failed, don't send anymore state 0x%x\n",
1068 skdev->state);
e67f86b3
AB		 1069 return;
1070 }
f98806d6
BVA		 1071 dev_dbg(&skdev->pdev->dev,
1072 "**** TUR failed, retry skerr\n");
fb4844b8
BVA		 1073 skd_send_internal_skspcl(skdev, skspcl,
1074 TEST_UNIT_READY);
e67f86b3
AB		 1075 }
1076 break;
1077
1078 case WRITE_BUFFER:
1079 if (status == SAM_STAT_GOOD)
1080 skd_send_internal_skspcl(skdev, skspcl, READ_BUFFER);
1081 else {
1082 if (skdev->state == SKD_DRVR_STATE_STOPPING) {
f98806d6
BVA		 1083 dev_dbg(&skdev->pdev->dev,
1084 "write buffer failed, don't send anymore state 0x%x\n",
1085 skdev->state);
e67f86b3
AB		 1086 return;
1087 }
f98806d6
BVA		 1088 dev_dbg(&skdev->pdev->dev,
1089 "**** write buffer failed, retry skerr\n");
fb4844b8
BVA		 1090 skd_send_internal_skspcl(skdev, skspcl,
1091 TEST_UNIT_READY);
e67f86b3
AB		 1092 }
1093 break;
1094
1095 case READ_BUFFER:
1096 if (status == SAM_STAT_GOOD) {
1097 if (skd_chk_read_buf(skdev, skspcl) == 0)
1098 skd_send_internal_skspcl(skdev, skspcl,
1099 READ_CAPACITY);
1100 else {
f98806d6
BVA		 1101 dev_err(&skdev->pdev->dev,
1102 "*** W/R Buffer mismatch %d ***\n",
1103 skdev->connect_retries);
e67f86b3
AB		 1104 if (skdev->connect_retries <
1105 SKD_MAX_CONNECT_RETRIES) {
1106 skdev->connect_retries++;
1107 skd_soft_reset(skdev);
1108 } else {
f98806d6
BVA		 1109 dev_err(&skdev->pdev->dev,
1110 "W/R Buffer Connect Error\n");
e67f86b3
AB		 1111 return;
1112 }
1113 }
1114
1115 } else {
1116 if (skdev->state == SKD_DRVR_STATE_STOPPING) {
f98806d6
BVA		 1117 dev_dbg(&skdev->pdev->dev,
1118 "read buffer failed, don't send anymore state 0x%x\n",
1119 skdev->state);
e67f86b3
AB		 1120 return;
1121 }
f98806d6
BVA		 1122 dev_dbg(&skdev->pdev->dev,
1123 "**** read buffer failed, retry skerr\n");
fb4844b8
BVA		 1124 skd_send_internal_skspcl(skdev, skspcl,
1125 TEST_UNIT_READY);
e67f86b3
AB		 1126 }
1127 break;
1128
1129 case READ_CAPACITY:
1130 skdev->read_cap_is_valid = 0;
1131 if (status == SAM_STAT_GOOD) {
1132 skdev->read_cap_last_lba =
1133 (buf[0] << 24) | (buf[1] << 16) |
1134 (buf[2] << 8) | buf[3];
1135 skdev->read_cap_blocksize =
1136 (buf[4] << 24) | (buf[5] << 16) |
1137 (buf[6] << 8) | buf[7];
1138
f98806d6
BVA		 1139 dev_dbg(&skdev->pdev->dev, "last lba %d, bs %d\n",
1140 skdev->read_cap_last_lba,
1141 skdev->read_cap_blocksize);
e67f86b3
AB		 1142
1143 set_capacity(skdev->disk, skdev->read_cap_last_lba + 1);
1144
1145 skdev->read_cap_is_valid = 1;
1146
1147 skd_send_internal_skspcl(skdev, skspcl, INQUIRY);
1148 } else if ((status == SAM_STAT_CHECK_CONDITION) &&
1149 (skerr->key == MEDIUM_ERROR)) {
1150 skdev->read_cap_last_lba = ~0;
1151 set_capacity(skdev->disk, skdev->read_cap_last_lba + 1);
f98806d6 1152 dev_dbg(&skdev->pdev->dev, "**** MEDIUM ERROR caused READCAP to fail, ignore failure and continue to inquiry\n");
e67f86b3
AB		 1153 skd_send_internal_skspcl(skdev, skspcl, INQUIRY);
1154 } else {
f98806d6 1155 dev_dbg(&skdev->pdev->dev, "**** READCAP failed, retry TUR\n");
e67f86b3
AB		 1156 skd_send_internal_skspcl(skdev, skspcl,
1157 TEST_UNIT_READY);
1158 }
1159 break;
1160
1161 case INQUIRY:
1162 skdev->inquiry_is_valid = 0;
1163 if (status == SAM_STAT_GOOD) {
1164 skdev->inquiry_is_valid = 1;
1165
1166 for (i = 0; i < 12; i++)
1167 skdev->inq_serial_num[i] = buf[i + 4];
1168 skdev->inq_serial_num[12] = 0;
1169 }
1170
1171 if (skd_unquiesce_dev(skdev) < 0)
f98806d6 1172 dev_dbg(&skdev->pdev->dev, "**** failed, to ONLINE device\n");
e67f86b3
AB		 1173 /* connection is complete */
1174 skdev->connect_retries = 0;
1175 break;
1176
1177 case SYNCHRONIZE_CACHE:
1178 if (status == SAM_STAT_GOOD)
1179 skdev->sync_done = 1;
1180 else
1181 skdev->sync_done = -1;
1182 wake_up_interruptible(&skdev->waitq);
1183 break;
1184
1185 default:
1186 SKD_ASSERT("we didn't send this");
1187 }
1188}
1189
1190/*
1191 *****************************************************************************
1192 * FIT MESSAGES
1193 *****************************************************************************
1194 */
1195
1196static void skd_send_fitmsg(struct skd_device *skdev,
1197 struct skd_fitmsg_context *skmsg)
1198{
1199 u64 qcmd;
e67f86b3 1200
ea870bb2
HD		 1201 dev_dbg(&skdev->pdev->dev, "dma address %pad, busy=%d\n",
1202 &skmsg->mb_dma_address, skd_in_flight(skdev));
6507f436 1203 dev_dbg(&skdev->pdev->dev, "msg_buf %p\n", skmsg->msg_buf);
e67f86b3
AB		 1204
1205 qcmd = skmsg->mb_dma_address;
1206 qcmd |= FIT_QCMD_QID_NORMAL;
1207
e67f86b3
AB		 1208 if (unlikely(skdev->dbg_level > 1)) {
1209 u8 *bp = (u8 *)skmsg->msg_buf;
1210 int i;
1211 for (i = 0; i < skmsg->length; i += 8) {
f98806d6
BVA		 1212 dev_dbg(&skdev->pdev->dev, "msg[%2d] %8ph\n", i,
1213 &bp[i]);
e67f86b3
AB		 1214 if (i == 0)
1215 i = 64 - 8;
1216 }
1217 }
1218
1219 if (skmsg->length > 256)
1220 qcmd |= FIT_QCMD_MSGSIZE_512;
1221 else if (skmsg->length > 128)
1222 qcmd |= FIT_QCMD_MSGSIZE_256;
1223 else if (skmsg->length > 64)
1224 qcmd |= FIT_QCMD_MSGSIZE_128;
1225 else
1226 /*
1227 * This makes no sense because the FIT msg header is
1228 * 64 bytes. If the msg is only 64 bytes long it has
1229 * no payload.
1230 */
1231 qcmd |= FIT_QCMD_MSGSIZE_64;
1232
a3db102d
BVA		 1233 dma_sync_single_for_device(&skdev->pdev->dev, skmsg->mb_dma_address,
1234 skmsg->length, DMA_TO_DEVICE);
1235
5fbd545c
BVA		 1236 /* Make sure skd_msg_buf is written before the doorbell is triggered. */
1237 smp_wmb();
1238
e67f86b3 1239 SKD_WRITEQ(skdev, qcmd, FIT_Q_COMMAND);
e67f86b3
AB		 1240}
1241
1242static void skd_send_special_fitmsg(struct skd_device *skdev,
1243 struct skd_special_context *skspcl)
1244{
1245 u64 qcmd;
1246
a3db102d
BVA		 1247 WARN_ON_ONCE(skspcl->req.n_sg != 1);
1248
e67f86b3
AB		 1249 if (unlikely(skdev->dbg_level > 1)) {
1250 u8 *bp = (u8 *)skspcl->msg_buf;
1251 int i;
1252
1253 for (i = 0; i < SKD_N_SPECIAL_FITMSG_BYTES; i += 8) {
f98806d6
BVA		 1254 dev_dbg(&skdev->pdev->dev, " spcl[%2d] %8ph\n", i,
1255 &bp[i]);
e67f86b3
AB		 1256 if (i == 0)
1257 i = 64 - 8;
1258 }
1259
f98806d6 1260 dev_dbg(&skdev->pdev->dev,
ea870bb2 1261 "skspcl=%p id=%04x sksg_list=%p sksg_dma=%pad\n",
f98806d6 1262 skspcl, skspcl->req.id, skspcl->req.sksg_list,
ea870bb2 1263 &skspcl->req.sksg_dma_address);
e67f86b3
AB		 1264 for (i = 0; i < skspcl->req.n_sg; i++) {
1265 struct fit_sg_descriptor *sgd =
1266 &skspcl->req.sksg_list[i];
1267
f98806d6
BVA		 1268 dev_dbg(&skdev->pdev->dev,
1269 " sg[%d] count=%u ctrl=0x%x addr=0x%llx next=0x%llx\n",
1270 i, sgd->byte_count, sgd->control,
1271 sgd->host_side_addr, sgd->next_desc_ptr);
e67f86b3
AB		 1272 }
1273 }
1274
1275 /*
1276 * Special FIT msgs are always 128 bytes: a 64-byte FIT hdr
1277 * and one 64-byte SSDI command.
1278 */
1279 qcmd = skspcl->mb_dma_address;
1280 qcmd |= FIT_QCMD_QID_NORMAL + FIT_QCMD_MSGSIZE_128;
1281
a3db102d
BVA		 1282 dma_sync_single_for_device(&skdev->pdev->dev, skspcl->mb_dma_address,
1283 SKD_N_SPECIAL_FITMSG_BYTES, DMA_TO_DEVICE);
1284 dma_sync_single_for_device(&skdev->pdev->dev,
1285 skspcl->req.sksg_dma_address,
1286 1 * sizeof(struct fit_sg_descriptor),
1287 DMA_TO_DEVICE);
1288 dma_sync_single_for_device(&skdev->pdev->dev,
1289 skspcl->db_dma_address,
1290 skspcl->req.sksg_list[0].byte_count,
1291 DMA_BIDIRECTIONAL);
1292
5fbd545c
BVA		 1293 /* Make sure skd_msg_buf is written before the doorbell is triggered. */
1294 smp_wmb();
1295
e67f86b3
AB		 1296 SKD_WRITEQ(skdev, qcmd, FIT_Q_COMMAND);
1297}
1298
1299/*
1300 *****************************************************************************
1301 * COMPLETION QUEUE
1302 *****************************************************************************
1303 */
1304
1305static void skd_complete_other(struct skd_device *skdev,
85e34112
BVA		 1306 struct fit_completion_entry_v1 *skcomp,
1307 struct fit_comp_error_info *skerr);
e67f86b3 1308
e67f86b3
AB		 1309struct sns_info {
1310 u8 type;
1311 u8 stat;
1312 u8 key;
1313 u8 asc;
1314 u8 ascq;
1315 u8 mask;
1316 enum skd_check_status_action action;
1317};
1318
1319static struct sns_info skd_chkstat_table[] = {
1320 /* Good */
1321 { 0x70, 0x02, RECOVERED_ERROR, 0, 0, 0x1c,
1322 SKD_CHECK_STATUS_REPORT_GOOD },
1323
1324 /* Smart alerts */
1325 { 0x70, 0x02, NO_SENSE, 0x0B, 0x00, 0x1E, /* warnings */
1326 SKD_CHECK_STATUS_REPORT_SMART_ALERT },
1327 { 0x70, 0x02, NO_SENSE, 0x5D, 0x00, 0x1E, /* thresholds */
1328 SKD_CHECK_STATUS_REPORT_SMART_ALERT },
1329 { 0x70, 0x02, RECOVERED_ERROR, 0x0B, 0x01, 0x1F, /* temperature over trigger */
1330 SKD_CHECK_STATUS_REPORT_SMART_ALERT },
1331
1332 /* Retry (with limits) */
1333 { 0x70, 0x02, 0x0B, 0, 0, 0x1C, /* This one is for DMA ERROR */
1334 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1335 { 0x70, 0x02, 0x06, 0x0B, 0x00, 0x1E, /* warnings */
1336 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1337 { 0x70, 0x02, 0x06, 0x5D, 0x00, 0x1E, /* thresholds */
1338 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1339 { 0x70, 0x02, 0x06, 0x80, 0x30, 0x1F, /* backup power */
1340 SKD_CHECK_STATUS_REQUEUE_REQUEST },
1341
1342 /* Busy (or about to be) */
1343 { 0x70, 0x02, 0x06, 0x3f, 0x01, 0x1F, /* fw changed */
1344 SKD_CHECK_STATUS_BUSY_IMMINENT },
1345};
1346
1347/*
1348 * Look up status and sense data to decide how to handle the error
1349 * from the device.
1350 * mask says which fields must match e.g., mask=0x18 means check
1351 * type and stat, ignore key, asc, ascq.
1352 */
1353
38d4a1bb
MS		 1354static enum skd_check_status_action
1355skd_check_status(struct skd_device *skdev,
85e34112 1356 u8 cmp_status, struct fit_comp_error_info *skerr)
e67f86b3 1357{
0b2e0c07 1358 int i;
e67f86b3 1359
f98806d6
BVA		 1360 dev_err(&skdev->pdev->dev, "key/asc/ascq/fruc %02x/%02x/%02x/%02x\n",
1361 skerr->key, skerr->code, skerr->qual, skerr->fruc);
e67f86b3 1362
f98806d6
BVA		 1363 dev_dbg(&skdev->pdev->dev,
1364 "stat: t=%02x stat=%02x k=%02x c=%02x q=%02x fruc=%02x\n",
1365 skerr->type, cmp_status, skerr->key, skerr->code, skerr->qual,
1366 skerr->fruc);
e67f86b3
AB		 1367
1368 /* Does the info match an entry in the good category? */
0b2e0c07 1369 for (i = 0; i < ARRAY_SIZE(skd_chkstat_table); i++) {
e67f86b3
AB		 1370 struct sns_info *sns = &skd_chkstat_table[i];
1371
1372 if (sns->mask & 0x10)
1373 if (skerr->type != sns->type)
1374 continue;
1375
1376 if (sns->mask & 0x08)
1377 if (cmp_status != sns->stat)
1378 continue;
1379
1380 if (sns->mask & 0x04)
1381 if (skerr->key != sns->key)
1382 continue;
1383
1384 if (sns->mask & 0x02)
1385 if (skerr->code != sns->asc)
1386 continue;
1387
1388 if (sns->mask & 0x01)
1389 if (skerr->qual != sns->ascq)
1390 continue;
1391
1392 if (sns->action == SKD_CHECK_STATUS_REPORT_SMART_ALERT) {
f98806d6
BVA		 1393 dev_err(&skdev->pdev->dev,
1394 "SMART Alert: sense key/asc/ascq %02x/%02x/%02x\n",
1395 skerr->key, skerr->code, skerr->qual);
e67f86b3
AB		 1396 }
1397 return sns->action;
1398 }
1399
1400 /* No other match, so nonzero status means error,
1401 * zero status means good
1402 */
1403 if (cmp_status) {
f98806d6 1404 dev_dbg(&skdev->pdev->dev, "status check: error\n");
e67f86b3
AB		 1405 return SKD_CHECK_STATUS_REPORT_ERROR;
1406 }
1407
f98806d6 1408 dev_dbg(&skdev->pdev->dev, "status check good default\n");
e67f86b3
AB		 1409 return SKD_CHECK_STATUS_REPORT_GOOD;
1410}
1411
1412static void skd_resolve_req_exception(struct skd_device *skdev,
f18c17c8
BVA		 1413 struct skd_request_context *skreq,
1414 struct request *req)
e67f86b3
AB		 1415{
1416 u8 cmp_status = skreq->completion.status;
1417
1418 switch (skd_check_status(skdev, cmp_status, &skreq->err_info)) {
1419 case SKD_CHECK_STATUS_REPORT_GOOD:
1420 case SKD_CHECK_STATUS_REPORT_SMART_ALERT:
795bc1b5
BVA		 1421 skreq->status = BLK_STS_OK;
1422 blk_mq_complete_request(req);
e67f86b3
AB		 1423 break;
1424
1425 case SKD_CHECK_STATUS_BUSY_IMMINENT:
1426 skd_log_skreq(skdev, skreq, "retry(busy)");
6d1f9dfd 1427 blk_mq_requeue_request(req, true);
f98806d6 1428 dev_info(&skdev->pdev->dev, "drive BUSY imminent\n");
e67f86b3
AB		 1429 skdev->state = SKD_DRVR_STATE_BUSY_IMMINENT;
1430 skdev->timer_countdown = SKD_TIMER_MINUTES(20);
1431 skd_quiesce_dev(skdev);
1432 break;
1433
1434 case SKD_CHECK_STATUS_REQUEUE_REQUEST:
1bee4243 1435 if (++skreq->retries < SKD_MAX_RETRIES) {
fcd37eb3 1436 skd_log_skreq(skdev, skreq, "retry");
6d1f9dfd 1437 blk_mq_requeue_request(req, true);
fcd37eb3 1438 break;
e67f86b3 1439 }
ce6882ba 1440 /* fall through */
e67f86b3
AB		 1441
1442 case SKD_CHECK_STATUS_REPORT_ERROR:
1443 default:
795bc1b5
BVA		 1444 skreq->status = BLK_STS_IOERR;
1445 blk_mq_complete_request(req);
e67f86b3
AB		 1446 break;
1447 }
1448}
1449
e67f86b3
AB		 1450static void skd_release_skreq(struct skd_device *skdev,
1451 struct skd_request_context *skreq)
1452{
e67f86b3
AB		 1453 /*
1454 * Reclaim the skd_request_context
1455 */
1456 skreq->state = SKD_REQ_STATE_IDLE;
f18c17c8
BVA		 1457}
1458
e67f86b3
AB		 1459static int skd_isr_completion_posted(struct skd_device *skdev,
1460 int limit, int *enqueued)
1461{
85e34112
BVA		 1462 struct fit_completion_entry_v1 *skcmp;
1463 struct fit_comp_error_info *skerr;
e67f86b3 1464 u16 req_id;
f18c17c8 1465 u32 tag;
ca33dd92 1466 u16 hwq = 0;
f18c17c8 1467 struct request *rq;
e67f86b3 1468 struct skd_request_context *skreq;
c830da8c
BVA		 1469 u16 cmp_cntxt;
1470 u8 cmp_status;
1471 u8 cmp_cycle;
1472 u32 cmp_bytes;
c0b3dda7 1473 int rc = 0;
e67f86b3 1474 int processed = 0;
e67f86b3 1475
760b48ca
BVA		 1476 lockdep_assert_held(&skdev->lock);
1477
e67f86b3
AB		 1478 for (;; ) {
1479 SKD_ASSERT(skdev->skcomp_ix < SKD_N_COMPLETION_ENTRY);
1480
1481 skcmp = &skdev->skcomp_table[skdev->skcomp_ix];
1482 cmp_cycle = skcmp->cycle;
1483 cmp_cntxt = skcmp->tag;
1484 cmp_status = skcmp->status;
1485 cmp_bytes = be32_to_cpu(skcmp->num_returned_bytes);
1486
1487 skerr = &skdev->skerr_table[skdev->skcomp_ix];
1488
f98806d6
BVA		 1489 dev_dbg(&skdev->pdev->dev,
1490 "cycle=%d ix=%d got cycle=%d cmdctxt=0x%x stat=%d busy=%d rbytes=0x%x proto=%d\n",
1491 skdev->skcomp_cycle, skdev->skcomp_ix, cmp_cycle,
d4d0f5fc 1492 cmp_cntxt, cmp_status, skd_in_flight(skdev),
6fbb2de5 1493 cmp_bytes, skdev->proto_ver);
e67f86b3
AB		 1494
1495 if (cmp_cycle != skdev->skcomp_cycle) {
f98806d6 1496 dev_dbg(&skdev->pdev->dev, "end of completions\n");
e67f86b3
AB		 1497 break;
1498 }
1499 /*
1500 * Update the completion queue head index and possibly
1501 * the completion cycle count. 8-bit wrap-around.
1502 */
1503 skdev->skcomp_ix++;
1504 if (skdev->skcomp_ix >= SKD_N_COMPLETION_ENTRY) {
1505 skdev->skcomp_ix = 0;
1506 skdev->skcomp_cycle++;
1507 }
1508
1509 /*
1510 * The command context is a unique 32-bit ID. The low order
1511 * bits help locate the request. The request is usually a
1512 * r/w request (see skd_start() above) or a special request.
1513 */
1514 req_id = cmp_cntxt;
f18c17c8 1515 tag = req_id & SKD_ID_SLOT_AND_TABLE_MASK;
e67f86b3
AB		 1516
1517 /* Is this other than a r/w request? */
f18c17c8 1518 if (tag >= skdev->num_req_context) {
e67f86b3
AB		 1519 /*
1520 * This is not a completion for a r/w request.
1521 */
ca33dd92
BVA		 1522 WARN_ON_ONCE(blk_mq_tag_to_rq(skdev->tag_set.tags[hwq],
1523 tag));
e67f86b3
AB		 1524 skd_complete_other(skdev, skcmp, skerr);
1525 continue;
1526 }
1527
ca33dd92 1528 rq = blk_mq_tag_to_rq(skdev->tag_set.tags[hwq], tag);
f18c17c8
BVA		 1529 if (WARN(!rq, "No request for tag %#x -> %#x\n", cmp_cntxt,
1530 tag))
1531 continue;
e7278a8b 1532 skreq = blk_mq_rq_to_pdu(rq);
e67f86b3
AB		 1533
1534 /*
1535 * Make sure the request ID for the slot matches.
1536 */
1537 if (skreq->id != req_id) {
49f16e2f
BVA		 1538 dev_err(&skdev->pdev->dev,
1539 "Completion mismatch comp_id=0x%04x skreq=0x%04x new=0x%04x\n",
1540 req_id, skreq->id, cmp_cntxt);
e67f86b3 1541
49f16e2f 1542 continue;
e67f86b3
AB		 1543 }
1544
1545 SKD_ASSERT(skreq->state == SKD_REQ_STATE_BUSY);
1546
e67f86b3
AB		 1547 skreq->completion = *skcmp;
1548 if (unlikely(cmp_status == SAM_STAT_CHECK_CONDITION)) {
1549 skreq->err_info = *skerr;
1550 skd_log_check_status(skdev, cmp_status, skerr->key,
1551 skerr->code, skerr->qual,
1552 skerr->fruc);
1553 }
1554 /* Release DMA resources for the request. */
1555 if (skreq->n_sg > 0)
1556 skd_postop_sg_list(skdev, skreq);
1557
f18c17c8 1558 skd_release_skreq(skdev, skreq);
e67f86b3
AB		 1559
1560 /*
f18c17c8 1561 * Capture the outcome and post it back to the native request.
e67f86b3 1562 */
795bc1b5
BVA		 1563 if (likely(cmp_status == SAM_STAT_GOOD)) {
1564 skreq->status = BLK_STS_OK;
1565 blk_mq_complete_request(rq);
1566 } else {
f18c17c8 1567 skd_resolve_req_exception(skdev, skreq, rq);
795bc1b5 1568 }
e67f86b3
AB		 1569
1570 /* skd_isr_comp_limit equal zero means no limit */
1571 if (limit) {
1572 if (++processed >= limit) {
1573 rc = 1;
1574 break;
1575 }
1576 }
1577 }
1578
6fbb2de5 1579 if (skdev->state == SKD_DRVR_STATE_PAUSING &&
d4d0f5fc 1580 skd_in_flight(skdev) == 0) {
e67f86b3
AB		 1581 skdev->state = SKD_DRVR_STATE_PAUSED;
1582 wake_up_interruptible(&skdev->waitq);
1583 }
1584
1585 return rc;
1586}
1587
1588static void skd_complete_other(struct skd_device *skdev,
85e34112
BVA		 1589 struct fit_completion_entry_v1 *skcomp,
1590 struct fit_comp_error_info *skerr)
e67f86b3
AB		 1591{
1592 u32 req_id = 0;
1593 u32 req_table;
1594 u32 req_slot;
1595 struct skd_special_context *skspcl;
1596
760b48ca
BVA		 1597 lockdep_assert_held(&skdev->lock);
1598
e67f86b3
AB		 1599 req_id = skcomp->tag;
1600 req_table = req_id & SKD_ID_TABLE_MASK;
1601 req_slot = req_id & SKD_ID_SLOT_MASK;
1602
f98806d6
BVA		 1603 dev_dbg(&skdev->pdev->dev, "table=0x%x id=0x%x slot=%d\n", req_table,
1604 req_id, req_slot);
e67f86b3
AB		 1605
1606 /*
1607 * Based on the request id, determine how to dispatch this completion.
1608 * This swich/case is finding the good cases and forwarding the
1609 * completion entry. Errors are reported below the switch.
1610 */
1611 switch (req_table) {
1612 case SKD_ID_RW_REQUEST:
1613 /*
e1d06f2d 1614 * The caller, skd_isr_completion_posted() above,
e67f86b3
AB		 1615 * handles r/w requests. The only way we get here
1616 * is if the req_slot is out of bounds.
1617 */
1618 break;
1619
e67f86b3
AB		 1620 case SKD_ID_INTERNAL:
1621 if (req_slot == 0) {
1622 skspcl = &skdev->internal_skspcl;
1623 if (skspcl->req.id == req_id &&
1624 skspcl->req.state == SKD_REQ_STATE_BUSY) {
1625 skd_complete_internal(skdev,
1626 skcomp, skerr, skspcl);
1627 return;
1628 }
1629 }
1630 break;
1631
1632 case SKD_ID_FIT_MSG:
1633 /*
1634 * These id's should never appear in a completion record.
1635 */
1636 break;
1637
1638 default:
1639 /*
1640 * These id's should never appear anywhere;
1641 */
1642 break;
1643 }
1644
1645 /*
1646 * If we get here it is a bad or stale id.
1647 */
1648}
1649
e67f86b3
AB		 1650static void skd_reset_skcomp(struct skd_device *skdev)
1651{
6f7c7675 1652 memset(skdev->skcomp_table, 0, SKD_SKCOMP_SIZE);
e67f86b3
AB		 1653
1654 skdev->skcomp_ix = 0;
1655 skdev->skcomp_cycle = 1;
1656}
1657
1658/*
1659 *****************************************************************************
1660 * INTERRUPTS
1661 *****************************************************************************
1662 */
1663static void skd_completion_worker(struct work_struct *work)
1664{
1665 struct skd_device *skdev =
1666 container_of(work, struct skd_device, completion_worker);
1667 unsigned long flags;
1668 int flush_enqueued = 0;
1669
1670 spin_lock_irqsave(&skdev->lock, flags);
1671
1672 /*
1673 * pass in limit=0, which means no limit..
1674 * process everything in compq
1675 */
1676 skd_isr_completion_posted(skdev, 0, &flush_enqueued);
ca33dd92 1677 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1678
1679 spin_unlock_irqrestore(&skdev->lock, flags);
1680}
1681
1682static void skd_isr_msg_from_dev(struct skd_device *skdev);
1683
41c9499b
AB		 1684static irqreturn_t
1685skd_isr(int irq, void *ptr)
e67f86b3 1686{
1cd3c1ab 1687 struct skd_device *skdev = ptr;
e67f86b3
AB		 1688 u32 intstat;
1689 u32 ack;
1690 int rc = 0;
1691 int deferred = 0;
1692 int flush_enqueued = 0;
1693
e67f86b3
AB		 1694 spin_lock(&skdev->lock);
1695
1696 for (;; ) {
1697 intstat = SKD_READL(skdev, FIT_INT_STATUS_HOST);
1698
1699 ack = FIT_INT_DEF_MASK;
1700 ack &= intstat;
1701
f98806d6
BVA		 1702 dev_dbg(&skdev->pdev->dev, "intstat=0x%x ack=0x%x\n", intstat,
1703 ack);
e67f86b3
AB		 1704
1705 /* As long as there is an int pending on device, keep
1706 * running loop. When none, get out, but if we've never
1707 * done any processing, call completion handler?
1708 */
1709 if (ack == 0) {
1710 /* No interrupts on device, but run the completion
1711 * processor anyway?
1712 */
1713 if (rc == 0)
1714 if (likely (skdev->state
1715 == SKD_DRVR_STATE_ONLINE))
1716 deferred = 1;
1717 break;
1718 }
1719
1720 rc = IRQ_HANDLED;
1721
1722 SKD_WRITEL(skdev, ack, FIT_INT_STATUS_HOST);
1723
1724 if (likely((skdev->state != SKD_DRVR_STATE_LOAD) &&
1725 (skdev->state != SKD_DRVR_STATE_STOPPING))) {
1726 if (intstat & FIT_ISH_COMPLETION_POSTED) {
1727 /*
1728 * If we have already deferred completion
1729 * processing, don't bother running it again
1730 */
1731 if (deferred == 0)
1732 deferred =
1733 skd_isr_completion_posted(skdev,
1734 skd_isr_comp_limit, &flush_enqueued);
1735 }
1736
1737 if (intstat & FIT_ISH_FW_STATE_CHANGE) {
1738 skd_isr_fwstate(skdev);
1739 if (skdev->state == SKD_DRVR_STATE_FAULT ||
1740 skdev->state ==
1741 SKD_DRVR_STATE_DISAPPEARED) {
1742 spin_unlock(&skdev->lock);
1743 return rc;
1744 }
1745 }
1746
1747 if (intstat & FIT_ISH_MSG_FROM_DEV)
1748 skd_isr_msg_from_dev(skdev);
1749 }
1750 }
1751
1752 if (unlikely(flush_enqueued))
ca33dd92 1753 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1754
1755 if (deferred)
1756 schedule_work(&skdev->completion_worker);
1757 else if (!flush_enqueued)
ca33dd92 1758 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1759
1760 spin_unlock(&skdev->lock);
1761
1762 return rc;
1763}
1764
e67f86b3
AB		 1765static void skd_drive_fault(struct skd_device *skdev)
1766{
1767 skdev->state = SKD_DRVR_STATE_FAULT;
f98806d6 1768 dev_err(&skdev->pdev->dev, "Drive FAULT\n");
e67f86b3
AB		 1769}
1770
1771static void skd_drive_disappeared(struct skd_device *skdev)
1772{
1773 skdev->state = SKD_DRVR_STATE_DISAPPEARED;
f98806d6 1774 dev_err(&skdev->pdev->dev, "Drive DISAPPEARED\n");
e67f86b3
AB		 1775}
1776
1777static void skd_isr_fwstate(struct skd_device *skdev)
1778{
1779 u32 sense;
1780 u32 state;
1781 u32 mtd;
1782 int prev_driver_state = skdev->state;
1783
1784 sense = SKD_READL(skdev, FIT_STATUS);
1785 state = sense & FIT_SR_DRIVE_STATE_MASK;
1786
f98806d6
BVA		 1787 dev_err(&skdev->pdev->dev, "s1120 state %s(%d)=>%s(%d)\n",
1788 skd_drive_state_to_str(skdev->drive_state), skdev->drive_state,
1789 skd_drive_state_to_str(state), state);
e67f86b3
AB		 1790
1791 skdev->drive_state = state;
1792
1793 switch (skdev->drive_state) {
1794 case FIT_SR_DRIVE_INIT:
1795 if (skdev->state == SKD_DRVR_STATE_PROTOCOL_MISMATCH) {
1796 skd_disable_interrupts(skdev);
1797 break;
1798 }
1799 if (skdev->state == SKD_DRVR_STATE_RESTARTING)
79ce12a8 1800 skd_recover_requests(skdev);
e67f86b3
AB		 1801 if (skdev->state == SKD_DRVR_STATE_WAIT_BOOT) {
1802 skdev->timer_countdown = SKD_STARTING_TIMO;
1803 skdev->state = SKD_DRVR_STATE_STARTING;
1804 skd_soft_reset(skdev);
1805 break;
1806 }
1807 mtd = FIT_MXD_CONS(FIT_MTD_FITFW_INIT, 0, 0);
1808 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1809 skdev->last_mtd = mtd;
1810 break;
1811
1812 case FIT_SR_DRIVE_ONLINE:
1813 skdev->cur_max_queue_depth = skd_max_queue_depth;
1814 if (skdev->cur_max_queue_depth > skdev->dev_max_queue_depth)
1815 skdev->cur_max_queue_depth = skdev->dev_max_queue_depth;
1816
1817 skdev->queue_low_water_mark =
1818 skdev->cur_max_queue_depth * 2 / 3 + 1;
1819 if (skdev->queue_low_water_mark < 1)
1820 skdev->queue_low_water_mark = 1;
f98806d6
BVA		 1821 dev_info(&skdev->pdev->dev,
1822 "Queue depth limit=%d dev=%d lowat=%d\n",
1823 skdev->cur_max_queue_depth,
1824 skdev->dev_max_queue_depth,
1825 skdev->queue_low_water_mark);
e67f86b3
AB		 1826
1827 skd_refresh_device_data(skdev);
1828 break;
1829
1830 case FIT_SR_DRIVE_BUSY:
1831 skdev->state = SKD_DRVR_STATE_BUSY;
1832 skdev->timer_countdown = SKD_BUSY_TIMO;
1833 skd_quiesce_dev(skdev);
1834 break;
1835 case FIT_SR_DRIVE_BUSY_SANITIZE:
1836 /* set timer for 3 seconds, we'll abort any unfinished
1837 * commands after that expires
1838 */
1839 skdev->state = SKD_DRVR_STATE_BUSY_SANITIZE;
1840 skdev->timer_countdown = SKD_TIMER_SECONDS(3);
ca33dd92 1841 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1842 break;
1843 case FIT_SR_DRIVE_BUSY_ERASE:
1844 skdev->state = SKD_DRVR_STATE_BUSY_ERASE;
1845 skdev->timer_countdown = SKD_BUSY_TIMO;
1846 break;
1847 case FIT_SR_DRIVE_OFFLINE:
1848 skdev->state = SKD_DRVR_STATE_IDLE;
1849 break;
1850 case FIT_SR_DRIVE_SOFT_RESET:
1851 switch (skdev->state) {
1852 case SKD_DRVR_STATE_STARTING:
1853 case SKD_DRVR_STATE_RESTARTING:
1854 /* Expected by a caller of skd_soft_reset() */
1855 break;
1856 default:
1857 skdev->state = SKD_DRVR_STATE_RESTARTING;
1858 break;
1859 }
1860 break;
1861 case FIT_SR_DRIVE_FW_BOOTING:
f98806d6 1862 dev_dbg(&skdev->pdev->dev, "ISR FIT_SR_DRIVE_FW_BOOTING\n");
e67f86b3
AB		 1863 skdev->state = SKD_DRVR_STATE_WAIT_BOOT;
1864 skdev->timer_countdown = SKD_WAIT_BOOT_TIMO;
1865 break;
1866
1867 case FIT_SR_DRIVE_DEGRADED:
1868 case FIT_SR_PCIE_LINK_DOWN:
1869 case FIT_SR_DRIVE_NEED_FW_DOWNLOAD:
1870 break;
1871
1872 case FIT_SR_DRIVE_FAULT:
1873 skd_drive_fault(skdev);
79ce12a8 1874 skd_recover_requests(skdev);
ca33dd92 1875 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1876 break;
1877
1878 /* PCIe bus returned all Fs? */
1879 case 0xFF:
f98806d6
BVA		 1880 dev_info(&skdev->pdev->dev, "state=0x%x sense=0x%x\n", state,
1881 sense);
e67f86b3 1882 skd_drive_disappeared(skdev);
79ce12a8 1883 skd_recover_requests(skdev);
ca33dd92 1884 schedule_work(&skdev->start_queue);
e67f86b3
AB		 1885 break;
1886 default:
1887 /*
1888 * Uknown FW State. Wait for a state we recognize.
1889 */
1890 break;
1891 }
f98806d6
BVA		 1892 dev_err(&skdev->pdev->dev, "Driver state %s(%d)=>%s(%d)\n",
1893 skd_skdev_state_to_str(prev_driver_state), prev_driver_state,
1894 skd_skdev_state_to_str(skdev->state), skdev->state);
e67f86b3
AB		 1895}
1896
7baa8572 1897static bool skd_recover_request(struct request *req, void *data, bool reserved)
e67f86b3 1898{
ca33dd92
BVA		 1899 struct skd_device *const skdev = data;
1900 struct skd_request_context *skreq = blk_mq_rq_to_pdu(req);
e67f86b3 1901
4e54b849 1902 if (skreq->state != SKD_REQ_STATE_BUSY)
7baa8572 1903 return true;
e67f86b3 1904
4e54b849 1905 skd_log_skreq(skdev, skreq, "recover");
e67f86b3 1906
4e54b849
BVA		 1907 /* Release DMA resources for the request. */
1908 if (skreq->n_sg > 0)
1909 skd_postop_sg_list(skdev, skreq);
e67f86b3 1910
4e54b849 1911 skreq->state = SKD_REQ_STATE_IDLE;
795bc1b5
BVA		 1912 skreq->status = BLK_STS_IOERR;
1913 blk_mq_complete_request(req);
7baa8572 1914 return true;
4e54b849 1915}
e67f86b3 1916
4e54b849
BVA		 1917static void skd_recover_requests(struct skd_device *skdev)
1918{
ca33dd92 1919 blk_mq_tagset_busy_iter(&skdev->tag_set, skd_recover_request, skdev);
e67f86b3
AB		 1920}
1921
1922static void skd_isr_msg_from_dev(struct skd_device *skdev)
1923{
1924 u32 mfd;
1925 u32 mtd;
1926 u32 data;
1927
1928 mfd = SKD_READL(skdev, FIT_MSG_FROM_DEVICE);
1929
f98806d6
BVA		 1930 dev_dbg(&skdev->pdev->dev, "mfd=0x%x last_mtd=0x%x\n", mfd,
1931 skdev->last_mtd);
e67f86b3
AB		 1932
1933 /* ignore any mtd that is an ack for something we didn't send */
1934 if (FIT_MXD_TYPE(mfd) != FIT_MXD_TYPE(skdev->last_mtd))
1935 return;
1936
1937 switch (FIT_MXD_TYPE(mfd)) {
1938 case FIT_MTD_FITFW_INIT:
1939 skdev->proto_ver = FIT_PROTOCOL_MAJOR_VER(mfd);
1940
1941 if (skdev->proto_ver != FIT_PROTOCOL_VERSION_1) {
f98806d6
BVA		 1942 dev_err(&skdev->pdev->dev, "protocol mismatch\n");
1943 dev_err(&skdev->pdev->dev, " got=%d support=%d\n",
1944 skdev->proto_ver, FIT_PROTOCOL_VERSION_1);
1945 dev_err(&skdev->pdev->dev, " please upgrade driver\n");
e67f86b3
AB		 1946 skdev->state = SKD_DRVR_STATE_PROTOCOL_MISMATCH;
1947 skd_soft_reset(skdev);
1948 break;
1949 }
1950 mtd = FIT_MXD_CONS(FIT_MTD_GET_CMDQ_DEPTH, 0, 0);
1951 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1952 skdev->last_mtd = mtd;
1953 break;
1954
1955 case FIT_MTD_GET_CMDQ_DEPTH:
1956 skdev->dev_max_queue_depth = FIT_MXD_DATA(mfd);
1957 mtd = FIT_MXD_CONS(FIT_MTD_SET_COMPQ_DEPTH, 0,
1958 SKD_N_COMPLETION_ENTRY);
1959 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1960 skdev->last_mtd = mtd;
1961 break;
1962
1963 case FIT_MTD_SET_COMPQ_DEPTH:
1964 SKD_WRITEQ(skdev, skdev->cq_dma_address, FIT_MSG_TO_DEVICE_ARG);
1965 mtd = FIT_MXD_CONS(FIT_MTD_SET_COMPQ_ADDR, 0, 0);
1966 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1967 skdev->last_mtd = mtd;
1968 break;
1969
1970 case FIT_MTD_SET_COMPQ_ADDR:
1971 skd_reset_skcomp(skdev);
1972 mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_HOST_ID, 0, skdev->devno);
1973 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1974 skdev->last_mtd = mtd;
1975 break;
1976
1977 case FIT_MTD_CMD_LOG_HOST_ID:
474f5da2
AB		 1978 /* hardware interface overflows in y2106 */
1979 skdev->connect_time_stamp = (u32)ktime_get_real_seconds();
e67f86b3
AB		 1980 data = skdev->connect_time_stamp & 0xFFFF;
1981 mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_TIME_STAMP_LO, 0, data);
1982 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1983 skdev->last_mtd = mtd;
1984 break;
1985
1986 case FIT_MTD_CMD_LOG_TIME_STAMP_LO:
1987 skdev->drive_jiffies = FIT_MXD_DATA(mfd);
1988 data = (skdev->connect_time_stamp >> 16) & 0xFFFF;
1989 mtd = FIT_MXD_CONS(FIT_MTD_CMD_LOG_TIME_STAMP_HI, 0, data);
1990 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1991 skdev->last_mtd = mtd;
1992 break;
1993
1994 case FIT_MTD_CMD_LOG_TIME_STAMP_HI:
1995 skdev->drive_jiffies |= (FIT_MXD_DATA(mfd) << 16);
1996 mtd = FIT_MXD_CONS(FIT_MTD_ARM_QUEUE, 0, 0);
1997 SKD_WRITEL(skdev, mtd, FIT_MSG_TO_DEVICE);
1998 skdev->last_mtd = mtd;
1999
f98806d6
BVA		 2000 dev_err(&skdev->pdev->dev, "Time sync driver=0x%x device=0x%x\n",
2001 skdev->connect_time_stamp, skdev->drive_jiffies);
e67f86b3
AB		 2002 break;
2003
2004 case FIT_MTD_ARM_QUEUE:
2005 skdev->last_mtd = 0;
2006 /*
2007 * State should be, or soon will be, FIT_SR_DRIVE_ONLINE.
2008 */
2009 break;
2010
2011 default:
2012 break;
2013 }
2014}
2015
2016static void skd_disable_interrupts(struct skd_device *skdev)
2017{
2018 u32 sense;
2019
2020 sense = SKD_READL(skdev, FIT_CONTROL);
2021 sense &= ~FIT_CR_ENABLE_INTERRUPTS;
2022 SKD_WRITEL(skdev, sense, FIT_CONTROL);
f98806d6 2023 dev_dbg(&skdev->pdev->dev, "sense 0x%x\n", sense);
e67f86b3
AB		 2024
2025 /* Note that the 1s is written. A 1-bit means
2026 * disable, a 0 means enable.
2027 */
2028 SKD_WRITEL(skdev, ~0, FIT_INT_MASK_HOST);
2029}
2030
2031static void skd_enable_interrupts(struct skd_device *skdev)
2032{
2033 u32 val;
2034
2035 /* unmask interrupts first */
2036 val = FIT_ISH_FW_STATE_CHANGE +
2037 FIT_ISH_COMPLETION_POSTED + FIT_ISH_MSG_FROM_DEV;
2038
2039 /* Note that the compliment of mask is written. A 1-bit means
2040 * disable, a 0 means enable. */
2041 SKD_WRITEL(skdev, ~val, FIT_INT_MASK_HOST);
f98806d6 2042 dev_dbg(&skdev->pdev->dev, "interrupt mask=0x%x\n", ~val);
e67f86b3
AB		 2043
2044 val = SKD_READL(skdev, FIT_CONTROL);
2045 val |= FIT_CR_ENABLE_INTERRUPTS;
f98806d6 2046 dev_dbg(&skdev->pdev->dev, "control=0x%x\n", val);
e67f86b3
AB		 2047 SKD_WRITEL(skdev, val, FIT_CONTROL);
2048}
2049
2050/*
2051 *****************************************************************************
2052 * START, STOP, RESTART, QUIESCE, UNQUIESCE
2053 *****************************************************************************
2054 */
2055
2056static void skd_soft_reset(struct skd_device *skdev)
2057{
2058 u32 val;
2059
2060 val = SKD_READL(skdev, FIT_CONTROL);
2061 val |= (FIT_CR_SOFT_RESET);
f98806d6 2062 dev_dbg(&skdev->pdev->dev, "control=0x%x\n", val);
e67f86b3
AB		 2063 SKD_WRITEL(skdev, val, FIT_CONTROL);
2064}
2065
2066static void skd_start_device(struct skd_device *skdev)
2067{
2068 unsigned long flags;
2069 u32 sense;
2070 u32 state;
2071
2072 spin_lock_irqsave(&skdev->lock, flags);
2073
2074 /* ack all ghost interrupts */
2075 SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST);
2076
2077 sense = SKD_READL(skdev, FIT_STATUS);
2078
f98806d6 2079 dev_dbg(&skdev->pdev->dev, "initial status=0x%x\n", sense);
e67f86b3
AB		 2080
2081 state = sense & FIT_SR_DRIVE_STATE_MASK;
2082 skdev->drive_state = state;
2083 skdev->last_mtd = 0;
2084
2085 skdev->state = SKD_DRVR_STATE_STARTING;
2086 skdev->timer_countdown = SKD_STARTING_TIMO;
2087
2088 skd_enable_interrupts(skdev);
2089
2090 switch (skdev->drive_state) {
2091 case FIT_SR_DRIVE_OFFLINE:
f98806d6 2092 dev_err(&skdev->pdev->dev, "Drive offline...\n");
e67f86b3
AB		 2093 break;
2094
2095 case FIT_SR_DRIVE_FW_BOOTING:
f98806d6 2096 dev_dbg(&skdev->pdev->dev, "FIT_SR_DRIVE_FW_BOOTING\n");
e67f86b3
AB		 2097 skdev->state = SKD_DRVR_STATE_WAIT_BOOT;
2098 skdev->timer_countdown = SKD_WAIT_BOOT_TIMO;
2099 break;
2100
2101 case FIT_SR_DRIVE_BUSY_SANITIZE:
f98806d6 2102 dev_info(&skdev->pdev->dev, "Start: BUSY_SANITIZE\n");
e67f86b3
AB		 2103 skdev->state = SKD_DRVR_STATE_BUSY_SANITIZE;
2104 skdev->timer_countdown = SKD_STARTED_BUSY_TIMO;
2105 break;
2106
2107 case FIT_SR_DRIVE_BUSY_ERASE:
f98806d6 2108 dev_info(&skdev->pdev->dev, "Start: BUSY_ERASE\n");
e67f86b3
AB		 2109 skdev->state = SKD_DRVR_STATE_BUSY_ERASE;
2110 skdev->timer_countdown = SKD_STARTED_BUSY_TIMO;
2111 break;
2112
2113 case FIT_SR_DRIVE_INIT:
2114 case FIT_SR_DRIVE_ONLINE:
2115 skd_soft_reset(skdev);
2116 break;
2117
2118 case FIT_SR_DRIVE_BUSY:
f98806d6 2119 dev_err(&skdev->pdev->dev, "Drive Busy...\n");
e67f86b3
AB		 2120 skdev->state = SKD_DRVR_STATE_BUSY;
2121 skdev->timer_countdown = SKD_STARTED_BUSY_TIMO;
2122 break;
2123
2124 case FIT_SR_DRIVE_SOFT_RESET:
f98806d6 2125 dev_err(&skdev->pdev->dev, "drive soft reset in prog\n");
e67f86b3
AB		 2126 break;
2127
2128 case FIT_SR_DRIVE_FAULT:
2129 /* Fault state is bad...soft reset won't do it...
2130 * Hard reset, maybe, but does it work on device?
2131 * For now, just fault so the system doesn't hang.
2132 */
2133 skd_drive_fault(skdev);
2134 /*start the queue so we can respond with error to requests */
f98806d6 2135 dev_dbg(&skdev->pdev->dev, "starting queue\n");
ca33dd92 2136 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2137 skdev->gendisk_on = -1;
2138 wake_up_interruptible(&skdev->waitq);
2139 break;
2140
2141 case 0xFF:
2142 /* Most likely the device isn't there or isn't responding
2143 * to the BAR1 addresses. */
2144 skd_drive_disappeared(skdev);
2145 /*start the queue so we can respond with error to requests */
f98806d6
BVA		 2146 dev_dbg(&skdev->pdev->dev,
2147 "starting queue to error-out reqs\n");
ca33dd92 2148 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2149 skdev->gendisk_on = -1;
2150 wake_up_interruptible(&skdev->waitq);
2151 break;
2152
2153 default:
f98806d6
BVA		 2154 dev_err(&skdev->pdev->dev, "Start: unknown state %x\n",
2155 skdev->drive_state);
e67f86b3
AB		 2156 break;
2157 }
2158
2159 state = SKD_READL(skdev, FIT_CONTROL);
f98806d6 2160 dev_dbg(&skdev->pdev->dev, "FIT Control Status=0x%x\n", state);
e67f86b3
AB		 2161
2162 state = SKD_READL(skdev, FIT_INT_STATUS_HOST);
f98806d6 2163 dev_dbg(&skdev->pdev->dev, "Intr Status=0x%x\n", state);
e67f86b3
AB		 2164
2165 state = SKD_READL(skdev, FIT_INT_MASK_HOST);
f98806d6 2166 dev_dbg(&skdev->pdev->dev, "Intr Mask=0x%x\n", state);
e67f86b3
AB		 2167
2168 state = SKD_READL(skdev, FIT_MSG_FROM_DEVICE);
f98806d6 2169 dev_dbg(&skdev->pdev->dev, "Msg from Dev=0x%x\n", state);
e67f86b3
AB		 2170
2171 state = SKD_READL(skdev, FIT_HW_VERSION);
f98806d6 2172 dev_dbg(&skdev->pdev->dev, "HW version=0x%x\n", state);
e67f86b3
AB		 2173
2174 spin_unlock_irqrestore(&skdev->lock, flags);
2175}
2176
2177static void skd_stop_device(struct skd_device *skdev)
2178{
2179 unsigned long flags;
2180 struct skd_special_context *skspcl = &skdev->internal_skspcl;
2181 u32 dev_state;
2182 int i;
2183
2184 spin_lock_irqsave(&skdev->lock, flags);
2185
2186 if (skdev->state != SKD_DRVR_STATE_ONLINE) {
f98806d6 2187 dev_err(&skdev->pdev->dev, "%s not online no sync\n", __func__);
e67f86b3
AB		 2188 goto stop_out;
2189 }
2190
2191 if (skspcl->req.state != SKD_REQ_STATE_IDLE) {
f98806d6 2192 dev_err(&skdev->pdev->dev, "%s no special\n", __func__);
e67f86b3
AB		 2193 goto stop_out;
2194 }
2195
2196 skdev->state = SKD_DRVR_STATE_SYNCING;
2197 skdev->sync_done = 0;
2198
2199 skd_send_internal_skspcl(skdev, skspcl, SYNCHRONIZE_CACHE);
2200
2201 spin_unlock_irqrestore(&skdev->lock, flags);
2202
2203 wait_event_interruptible_timeout(skdev->waitq,
2204 (skdev->sync_done), (10 * HZ));
2205
2206 spin_lock_irqsave(&skdev->lock, flags);
2207
2208 switch (skdev->sync_done) {
2209 case 0:
f98806d6 2210 dev_err(&skdev->pdev->dev, "%s no sync\n", __func__);
e67f86b3
AB		 2211 break;
2212 case 1:
f98806d6 2213 dev_err(&skdev->pdev->dev, "%s sync done\n", __func__);
e67f86b3
AB		 2214 break;
2215 default:
f98806d6 2216 dev_err(&skdev->pdev->dev, "%s sync error\n", __func__);
e67f86b3
AB		 2217 }
2218
2219stop_out:
2220 skdev->state = SKD_DRVR_STATE_STOPPING;
2221 spin_unlock_irqrestore(&skdev->lock, flags);
2222
2223 skd_kill_timer(skdev);
2224
2225 spin_lock_irqsave(&skdev->lock, flags);
2226 skd_disable_interrupts(skdev);
2227
2228 /* ensure all ints on device are cleared */
2229 /* soft reset the device to unload with a clean slate */
2230 SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST);
2231 SKD_WRITEL(skdev, FIT_CR_SOFT_RESET, FIT_CONTROL);
2232
2233 spin_unlock_irqrestore(&skdev->lock, flags);
2234
2235 /* poll every 100ms, 1 second timeout */
2236 for (i = 0; i < 10; i++) {
2237 dev_state =
2238 SKD_READL(skdev, FIT_STATUS) & FIT_SR_DRIVE_STATE_MASK;
2239 if (dev_state == FIT_SR_DRIVE_INIT)
2240 break;
2241 set_current_state(TASK_INTERRUPTIBLE);
2242 schedule_timeout(msecs_to_jiffies(100));
2243 }
2244
2245 if (dev_state != FIT_SR_DRIVE_INIT)
f98806d6
BVA		 2246 dev_err(&skdev->pdev->dev, "%s state error 0x%02x\n", __func__,
2247 dev_state);
e67f86b3
AB		 2248}
2249
2250/* assume spinlock is held */
2251static void skd_restart_device(struct skd_device *skdev)
2252{
2253 u32 state;
2254
2255 /* ack all ghost interrupts */
2256 SKD_WRITEL(skdev, FIT_INT_DEF_MASK, FIT_INT_STATUS_HOST);
2257
2258 state = SKD_READL(skdev, FIT_STATUS);
2259
f98806d6 2260 dev_dbg(&skdev->pdev->dev, "drive status=0x%x\n", state);
e67f86b3
AB		 2261
2262 state &= FIT_SR_DRIVE_STATE_MASK;
2263 skdev->drive_state = state;
2264 skdev->last_mtd = 0;
2265
2266 skdev->state = SKD_DRVR_STATE_RESTARTING;
2267 skdev->timer_countdown = SKD_RESTARTING_TIMO;
2268
2269 skd_soft_reset(skdev);
2270}
2271
2272/* assume spinlock is held */
2273static int skd_quiesce_dev(struct skd_device *skdev)
2274{
2275 int rc = 0;
2276
2277 switch (skdev->state) {
2278 case SKD_DRVR_STATE_BUSY:
2279 case SKD_DRVR_STATE_BUSY_IMMINENT:
f98806d6 2280 dev_dbg(&skdev->pdev->dev, "stopping queue\n");
ca33dd92 2281 blk_mq_stop_hw_queues(skdev->queue);
e67f86b3
AB		 2282 break;
2283 case SKD_DRVR_STATE_ONLINE:
2284 case SKD_DRVR_STATE_STOPPING:
2285 case SKD_DRVR_STATE_SYNCING:
2286 case SKD_DRVR_STATE_PAUSING:
2287 case SKD_DRVR_STATE_PAUSED:
2288 case SKD_DRVR_STATE_STARTING:
2289 case SKD_DRVR_STATE_RESTARTING:
2290 case SKD_DRVR_STATE_RESUMING:
2291 default:
2292 rc = -EINVAL;
f98806d6
BVA		 2293 dev_dbg(&skdev->pdev->dev, "state [%d] not implemented\n",
2294 skdev->state);
e67f86b3
AB		 2295 }
2296 return rc;
2297}
2298
2299/* assume spinlock is held */
2300static int skd_unquiesce_dev(struct skd_device *skdev)
2301{
2302 int prev_driver_state = skdev->state;
2303
2304 skd_log_skdev(skdev, "unquiesce");
2305 if (skdev->state == SKD_DRVR_STATE_ONLINE) {
f98806d6 2306 dev_dbg(&skdev->pdev->dev, "**** device already ONLINE\n");
e67f86b3
AB		 2307 return 0;
2308 }
2309 if (skdev->drive_state != FIT_SR_DRIVE_ONLINE) {
2310 /*
2311 * If there has been an state change to other than
2312 * ONLINE, we will rely on controller state change
2313 * to come back online and restart the queue.
2314 * The BUSY state means that driver is ready to
2315 * continue normal processing but waiting for controller
2316 * to become available.
2317 */
2318 skdev->state = SKD_DRVR_STATE_BUSY;
f98806d6 2319 dev_dbg(&skdev->pdev->dev, "drive BUSY state\n");
e67f86b3
AB		 2320 return 0;
2321 }
2322
2323 /*
2324 * Drive has just come online, driver is either in startup,
2325 * paused performing a task, or bust waiting for hardware.
2326 */
2327 switch (skdev->state) {
2328 case SKD_DRVR_STATE_PAUSED:
2329 case SKD_DRVR_STATE_BUSY:
2330 case SKD_DRVR_STATE_BUSY_IMMINENT:
2331 case SKD_DRVR_STATE_BUSY_ERASE:
2332 case SKD_DRVR_STATE_STARTING:
2333 case SKD_DRVR_STATE_RESTARTING:
2334 case SKD_DRVR_STATE_FAULT:
2335 case SKD_DRVR_STATE_IDLE:
2336 case SKD_DRVR_STATE_LOAD:
2337 skdev->state = SKD_DRVR_STATE_ONLINE;
f98806d6
BVA		 2338 dev_err(&skdev->pdev->dev, "Driver state %s(%d)=>%s(%d)\n",
2339 skd_skdev_state_to_str(prev_driver_state),
2340 prev_driver_state, skd_skdev_state_to_str(skdev->state),
2341 skdev->state);
2342 dev_dbg(&skdev->pdev->dev,
2343 "**** device ONLINE...starting block queue\n");
2344 dev_dbg(&skdev->pdev->dev, "starting queue\n");
2345 dev_info(&skdev->pdev->dev, "STEC s1120 ONLINE\n");
ca33dd92 2346 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2347 skdev->gendisk_on = 1;
2348 wake_up_interruptible(&skdev->waitq);
2349 break;
2350
2351 case SKD_DRVR_STATE_DISAPPEARED:
2352 default:
f98806d6
BVA		 2353 dev_dbg(&skdev->pdev->dev,
2354 "**** driver state %d, not implemented\n",
2355 skdev->state);
e67f86b3
AB		 2356 return -EBUSY;
2357 }
2358 return 0;
2359}
2360
2361/*
2362 *****************************************************************************
2363 * PCIe MSI/MSI-X INTERRUPT HANDLERS
2364 *****************************************************************************
2365 */
2366
2367static irqreturn_t skd_reserved_isr(int irq, void *skd_host_data)
2368{
2369 struct skd_device *skdev = skd_host_data;
2370 unsigned long flags;
2371
2372 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2373 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2374 SKD_READL(skdev, FIT_INT_STATUS_HOST));
2375 dev_err(&skdev->pdev->dev, "MSIX reserved irq %d = 0x%x\n", irq,
2376 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2377 SKD_WRITEL(skdev, FIT_INT_RESERVED_MASK, FIT_INT_STATUS_HOST);
2378 spin_unlock_irqrestore(&skdev->lock, flags);
2379 return IRQ_HANDLED;
2380}
2381
2382static irqreturn_t skd_statec_isr(int irq, void *skd_host_data)
2383{
2384 struct skd_device *skdev = skd_host_data;
2385 unsigned long flags;
2386
2387 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2388 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2389 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2390 SKD_WRITEL(skdev, FIT_ISH_FW_STATE_CHANGE, FIT_INT_STATUS_HOST);
2391 skd_isr_fwstate(skdev);
2392 spin_unlock_irqrestore(&skdev->lock, flags);
2393 return IRQ_HANDLED;
2394}
2395
2396static irqreturn_t skd_comp_q(int irq, void *skd_host_data)
2397{
2398 struct skd_device *skdev = skd_host_data;
2399 unsigned long flags;
2400 int flush_enqueued = 0;
2401 int deferred;
2402
2403 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2404 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2405 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2406 SKD_WRITEL(skdev, FIT_ISH_COMPLETION_POSTED, FIT_INT_STATUS_HOST);
2407 deferred = skd_isr_completion_posted(skdev, skd_isr_comp_limit,
2408 &flush_enqueued);
e67f86b3 2409 if (flush_enqueued)
ca33dd92 2410 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2411
2412 if (deferred)
2413 schedule_work(&skdev->completion_worker);
2414 else if (!flush_enqueued)
ca33dd92 2415 schedule_work(&skdev->start_queue);
e67f86b3
AB		 2416
2417 spin_unlock_irqrestore(&skdev->lock, flags);
2418
2419 return IRQ_HANDLED;
2420}
2421
2422static irqreturn_t skd_msg_isr(int irq, void *skd_host_data)
2423{
2424 struct skd_device *skdev = skd_host_data;
2425 unsigned long flags;
2426
2427 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2428 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2429 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2430 SKD_WRITEL(skdev, FIT_ISH_MSG_FROM_DEV, FIT_INT_STATUS_HOST);
2431 skd_isr_msg_from_dev(skdev);
2432 spin_unlock_irqrestore(&skdev->lock, flags);
2433 return IRQ_HANDLED;
2434}
2435
2436static irqreturn_t skd_qfull_isr(int irq, void *skd_host_data)
2437{
2438 struct skd_device *skdev = skd_host_data;
2439 unsigned long flags;
2440
2441 spin_lock_irqsave(&skdev->lock, flags);
f98806d6
BVA		 2442 dev_dbg(&skdev->pdev->dev, "MSIX = 0x%x\n",
2443 SKD_READL(skdev, FIT_INT_STATUS_HOST));
e67f86b3
AB		 2444 SKD_WRITEL(skdev, FIT_INT_QUEUE_FULL, FIT_INT_STATUS_HOST);
2445 spin_unlock_irqrestore(&skdev->lock, flags);
2446 return IRQ_HANDLED;
2447}
2448
2449/*
2450 *****************************************************************************
2451 * PCIe MSI/MSI-X SETUP
2452 *****************************************************************************
2453 */
2454
2455struct skd_msix_entry {
e67f86b3
AB		 2456 char isr_name[30];
2457};
2458
2459struct skd_init_msix_entry {
2460 const char *name;
2461 irq_handler_t handler;
2462};
2463
2464#define SKD_MAX_MSIX_COUNT 13
2465#define SKD_MIN_MSIX_COUNT 7
2466#define SKD_BASE_MSIX_IRQ 4
2467
2468static struct skd_init_msix_entry msix_entries[SKD_MAX_MSIX_COUNT] = {
2469 { "(DMA 0)", skd_reserved_isr },
2470 { "(DMA 1)", skd_reserved_isr },
2471 { "(DMA 2)", skd_reserved_isr },
2472 { "(DMA 3)", skd_reserved_isr },
2473 { "(State Change)", skd_statec_isr },
2474 { "(COMPL_Q)", skd_comp_q },
2475 { "(MSG)", skd_msg_isr },
2476 { "(Reserved)", skd_reserved_isr },
2477 { "(Reserved)", skd_reserved_isr },
2478 { "(Queue Full 0)", skd_qfull_isr },
2479 { "(Queue Full 1)", skd_qfull_isr },
2480 { "(Queue Full 2)", skd_qfull_isr },
2481 { "(Queue Full 3)", skd_qfull_isr },
2482};
2483
e67f86b3
AB		 2484static int skd_acquire_msix(struct skd_device *skdev)
2485{
a9df8625 2486 int i, rc;
46817769 2487 struct pci_dev *pdev = skdev->pdev;
e67f86b3 2488
180b0ae7
CH		 2489 rc = pci_alloc_irq_vectors(pdev, SKD_MAX_MSIX_COUNT, SKD_MAX_MSIX_COUNT,
2490 PCI_IRQ_MSIX);
2491 if (rc < 0) {
f98806d6 2492 dev_err(&skdev->pdev->dev, "failed to enable MSI-X %d\n", rc);
3bc8492f 2493 goto out;
e67f86b3 2494 }
46817769 2495
180b0ae7
CH		 2496 skdev->msix_entries = kcalloc(SKD_MAX_MSIX_COUNT,
2497 sizeof(struct skd_msix_entry), GFP_KERNEL);
e67f86b3
AB		 2498 if (!skdev->msix_entries) {
2499 rc = -ENOMEM;
f98806d6 2500 dev_err(&skdev->pdev->dev, "msix table allocation error\n");
3bc8492f 2501 goto out;
e67f86b3
AB		 2502 }
2503
e67f86b3 2504 /* Enable MSI-X vectors for the base queue */
180b0ae7
CH		 2505 for (i = 0; i < SKD_MAX_MSIX_COUNT; i++) {
2506 struct skd_msix_entry *qentry = &skdev->msix_entries[i];
2507
e67f86b3
AB		 2508 snprintf(qentry->isr_name, sizeof(qentry->isr_name),
2509 "%s%d-msix %s", DRV_NAME, skdev->devno,
2510 msix_entries[i].name);
180b0ae7
CH		 2511
2512 rc = devm_request_irq(&skdev->pdev->dev,
2513 pci_irq_vector(skdev->pdev, i),
2514 msix_entries[i].handler, 0,
2515 qentry->isr_name, skdev);
e67f86b3 2516 if (rc) {
f98806d6
BVA		 2517 dev_err(&skdev->pdev->dev,
2518 "Unable to register(%d) MSI-X handler %d: %s\n",
2519 rc, i, qentry->isr_name);
e67f86b3 2520 goto msix_out;
e67f86b3
AB		 2521 }
2522 }
180b0ae7 2523
f98806d6
BVA		 2524 dev_dbg(&skdev->pdev->dev, "%d msix irq(s) enabled\n",
2525 SKD_MAX_MSIX_COUNT);
e67f86b3
AB		 2526 return 0;
2527
2528msix_out:
180b0ae7
CH		 2529 while (--i >= 0)
2530 devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i), skdev);
3bc8492f 2531out:
180b0ae7
CH		 2532 kfree(skdev->msix_entries);
2533 skdev->msix_entries = NULL;
e67f86b3
AB		 2534 return rc;
2535}
2536
2537static int skd_acquire_irq(struct skd_device *skdev)
2538{
180b0ae7
CH		 2539 struct pci_dev *pdev = skdev->pdev;
2540 unsigned int irq_flag = PCI_IRQ_LEGACY;
e67f86b3 2541 int rc;
e67f86b3 2542
180b0ae7 2543 if (skd_isr_type == SKD_IRQ_MSIX) {
e67f86b3
AB		 2544 rc = skd_acquire_msix(skdev);
2545 if (!rc)
180b0ae7
CH		 2546 return 0;
2547
f98806d6
BVA		 2548 dev_err(&skdev->pdev->dev,
2549 "failed to enable MSI-X, re-trying with MSI %d\n", rc);
e67f86b3 2550 }
180b0ae7
CH		 2551
2552 snprintf(skdev->isr_name, sizeof(skdev->isr_name), "%s%d", DRV_NAME,
2553 skdev->devno);
2554
2555 if (skd_isr_type != SKD_IRQ_LEGACY)
2556 irq_flag |= PCI_IRQ_MSI;
2557 rc = pci_alloc_irq_vectors(pdev, 1, 1, irq_flag);
2558 if (rc < 0) {
f98806d6
BVA		 2559 dev_err(&skdev->pdev->dev,
2560 "failed to allocate the MSI interrupt %d\n", rc);
180b0ae7
CH		 2561 return rc;
2562 }
2563
2564 rc = devm_request_irq(&pdev->dev, pdev->irq, skd_isr,
2565 pdev->msi_enabled ? 0 : IRQF_SHARED,
2566 skdev->isr_name, skdev);
2567 if (rc) {
2568 pci_free_irq_vectors(pdev);
f98806d6
BVA		 2569 dev_err(&skdev->pdev->dev, "failed to allocate interrupt %d\n",
2570 rc);
180b0ae7
CH		 2571 return rc;
2572 }
2573
2574 return 0;
e67f86b3
AB		 2575}
2576
2577static void skd_release_irq(struct skd_device *skdev)
2578{
180b0ae7
CH		 2579 struct pci_dev *pdev = skdev->pdev;
2580
2581 if (skdev->msix_entries) {
2582 int i;
2583
2584 for (i = 0; i < SKD_MAX_MSIX_COUNT; i++) {
2585 devm_free_irq(&pdev->dev, pci_irq_vector(pdev, i),
2586 skdev);
2587 }
2588
2589 kfree(skdev->msix_entries);
2590 skdev->msix_entries = NULL;
2591 } else {
2592 devm_free_irq(&pdev->dev, pdev->irq, skdev);
e67f86b3 2593 }
180b0ae7
CH		 2594
2595 pci_free_irq_vectors(pdev);
e67f86b3
AB		 2596}
2597
2598/*
2599 *****************************************************************************
2600 * CONSTRUCT
2601 *****************************************************************************
2602 */
2603
a3db102d
BVA		 2604static void *skd_alloc_dma(struct skd_device *skdev, struct kmem_cache *s,
2605 dma_addr_t *dma_handle, gfp_t gfp,
2606 enum dma_data_direction dir)
2607{
2608 struct device *dev = &skdev->pdev->dev;
2609 void *buf;
2610
2611 buf = kmem_cache_alloc(s, gfp);
2612 if (!buf)
2613 return NULL;
1d518775
AB		 2614 *dma_handle = dma_map_single(dev, buf,
2615 kmem_cache_size(s), dir);
a3db102d 2616 if (dma_mapping_error(dev, *dma_handle)) {
09aa97c7 2617 kmem_cache_free(s, buf);
a3db102d
BVA		 2618 buf = NULL;
2619 }
2620 return buf;
2621}
2622
2623static void skd_free_dma(struct skd_device *skdev, struct kmem_cache *s,
2624 void *vaddr, dma_addr_t dma_handle,
2625 enum dma_data_direction dir)
2626{
2627 if (!vaddr)
2628 return;
2629
1d518775
AB		 2630 dma_unmap_single(&skdev->pdev->dev, dma_handle,
2631 kmem_cache_size(s), dir);
a3db102d
BVA		 2632 kmem_cache_free(s, vaddr);
2633}
2634
e67f86b3
AB		 2635static int skd_cons_skcomp(struct skd_device *skdev)
2636{
2637 int rc = 0;
2638 struct fit_completion_entry_v1 *skcomp;
e67f86b3 2639
f98806d6 2640 dev_dbg(&skdev->pdev->dev,
6f7c7675
BVA		 2641 "comp pci_alloc, total bytes %zd entries %d\n",
2642 SKD_SKCOMP_SIZE, SKD_N_COMPLETION_ENTRY);
e67f86b3 2643
750afb08
LC		 2644 skcomp = dma_alloc_coherent(&skdev->pdev->dev, SKD_SKCOMP_SIZE,
2645 &skdev->cq_dma_address, GFP_KERNEL);
e67f86b3
AB		 2646
2647 if (skcomp == NULL) {
2648 rc = -ENOMEM;
2649 goto err_out;
2650 }
2651
e67f86b3
AB		 2652 skdev->skcomp_table = skcomp;
2653 skdev->skerr_table = (struct fit_comp_error_info *)((char *)skcomp +
2654 sizeof(*skcomp) *
2655 SKD_N_COMPLETION_ENTRY);
2656
2657err_out:
2658 return rc;
2659}
2660
2661static int skd_cons_skmsg(struct skd_device *skdev)
2662{
2663 int rc = 0;
2664 u32 i;
2665
f98806d6 2666 dev_dbg(&skdev->pdev->dev,
01433d0d 2667 "skmsg_table kcalloc, struct %lu, count %u total %lu\n",
f98806d6
BVA		 2668 sizeof(struct skd_fitmsg_context), skdev->num_fitmsg_context,
2669 sizeof(struct skd_fitmsg_context) * skdev->num_fitmsg_context);
e67f86b3 2670
01433d0d
BVA		 2671 skdev->skmsg_table = kcalloc(skdev->num_fitmsg_context,
2672 sizeof(struct skd_fitmsg_context),
2673 GFP_KERNEL);
e67f86b3
AB		 2674 if (skdev->skmsg_table == NULL) {
2675 rc = -ENOMEM;
2676 goto err_out;
2677 }
2678
2679 for (i = 0; i < skdev->num_fitmsg_context; i++) {
2680 struct skd_fitmsg_context *skmsg;
2681
2682 skmsg = &skdev->skmsg_table[i];
2683
2684 skmsg->id = i + SKD_ID_FIT_MSG;
2685
13812621
CH		 2686 skmsg->msg_buf = dma_alloc_coherent(&skdev->pdev->dev,
2687 SKD_N_FITMSG_BYTES,
2688 &skmsg->mb_dma_address,
2689 GFP_KERNEL);
e67f86b3
AB		 2690 if (skmsg->msg_buf == NULL) {
2691 rc = -ENOMEM;
2692 goto err_out;
2693 }
2694
6507f436
BVA		 2695 WARN(((uintptr_t)skmsg->msg_buf | skmsg->mb_dma_address) &
2696 (FIT_QCMD_ALIGN - 1),
ea870bb2
HD		 2697 "not aligned: msg_buf %p mb_dma_address %pad\n",
2698 skmsg->msg_buf, &skmsg->mb_dma_address);
e67f86b3 2699 memset(skmsg->msg_buf, 0, SKD_N_FITMSG_BYTES);
e67f86b3
AB		 2700 }
2701
e67f86b3
AB		 2702err_out:
2703 return rc;
2704}
2705
542d7b00
BZ		 2706static struct fit_sg_descriptor *skd_cons_sg_list(struct skd_device *skdev,
2707 u32 n_sg,
2708 dma_addr_t *ret_dma_addr)
2709{
2710 struct fit_sg_descriptor *sg_list;
542d7b00 2711
a3db102d
BVA		 2712 sg_list = skd_alloc_dma(skdev, skdev->sglist_cache, ret_dma_addr,
2713 GFP_DMA | __GFP_ZERO, DMA_TO_DEVICE);
542d7b00
BZ		 2714
2715 if (sg_list != NULL) {
2716 uint64_t dma_address = *ret_dma_addr;
2717 u32 i;
2718
542d7b00
BZ		 2719 for (i = 0; i < n_sg - 1; i++) {
2720 uint64_t ndp_off;
2721 ndp_off = (i + 1) * sizeof(struct fit_sg_descriptor);
2722
2723 sg_list[i].next_desc_ptr = dma_address + ndp_off;
2724 }
2725 sg_list[i].next_desc_ptr = 0LL;
2726 }
2727
2728 return sg_list;
2729}
2730
5d003240 2731static void skd_free_sg_list(struct skd_device *skdev,
a3db102d 2732 struct fit_sg_descriptor *sg_list,
5d003240
BVA		 2733 dma_addr_t dma_addr)
2734{
5d003240
BVA		 2735 if (WARN_ON_ONCE(!sg_list))
2736 return;
2737
a3db102d
BVA		 2738 skd_free_dma(skdev, skdev->sglist_cache, sg_list, dma_addr,
2739 DMA_TO_DEVICE);
5d003240
BVA		 2740}
2741
ca33dd92
BVA		 2742static int skd_init_request(struct blk_mq_tag_set *set, struct request *rq,
2743 unsigned int hctx_idx, unsigned int numa_node)
e67f86b3 2744{
ca33dd92 2745 struct skd_device *skdev = set->driver_data;
e7278a8b 2746 struct skd_request_context *skreq = blk_mq_rq_to_pdu(rq);
e67f86b3 2747
e7278a8b
BVA		 2748 skreq->state = SKD_REQ_STATE_IDLE;
2749 skreq->sg = (void *)(skreq + 1);
2750 sg_init_table(skreq->sg, skd_sgs_per_request);
2751 skreq->sksg_list = skd_cons_sg_list(skdev, skd_sgs_per_request,
2752 &skreq->sksg_dma_address);
e67f86b3 2753
e7278a8b
BVA		 2754 return skreq->sksg_list ? 0 : -ENOMEM;
2755}
e67f86b3 2756
ca33dd92
BVA		 2757static void skd_exit_request(struct blk_mq_tag_set *set, struct request *rq,
2758 unsigned int hctx_idx)
e7278a8b 2759{
ca33dd92 2760 struct skd_device *skdev = set->driver_data;
e7278a8b 2761 struct skd_request_context *skreq = blk_mq_rq_to_pdu(rq);
e67f86b3 2762
a3db102d 2763 skd_free_sg_list(skdev, skreq->sksg_list, skreq->sksg_dma_address);
e67f86b3
AB		 2764}
2765
e67f86b3
AB		 2766static int skd_cons_sksb(struct skd_device *skdev)
2767{
2768 int rc = 0;
2769 struct skd_special_context *skspcl;
e67f86b3
AB		 2770
2771 skspcl = &skdev->internal_skspcl;
2772
2773 skspcl->req.id = 0 + SKD_ID_INTERNAL;
2774 skspcl->req.state = SKD_REQ_STATE_IDLE;
2775
a3db102d
BVA		 2776 skspcl->data_buf = skd_alloc_dma(skdev, skdev->databuf_cache,
2777 &skspcl->db_dma_address,
2778 GFP_DMA | __GFP_ZERO,
2779 DMA_BIDIRECTIONAL);
e67f86b3
AB		 2780 if (skspcl->data_buf == NULL) {
2781 rc = -ENOMEM;
2782 goto err_out;
2783 }
2784
a3db102d
BVA		 2785 skspcl->msg_buf = skd_alloc_dma(skdev, skdev->msgbuf_cache,
2786 &skspcl->mb_dma_address,
2787 GFP_DMA | __GFP_ZERO, DMA_TO_DEVICE);
e67f86b3
AB		 2788 if (skspcl->msg_buf == NULL) {
2789 rc = -ENOMEM;
2790 goto err_out;
2791 }
2792
e67f86b3
AB		 2793 skspcl->req.sksg_list = skd_cons_sg_list(skdev, 1,
2794 &skspcl->req.sksg_dma_address);
2795 if (skspcl->req.sksg_list == NULL) {
2796 rc = -ENOMEM;
2797 goto err_out;
2798 }
2799
2800 if (!skd_format_internal_skspcl(skdev)) {
2801 rc = -EINVAL;
2802 goto err_out;
2803 }
2804
2805err_out:
2806 return rc;
2807}
2808
ca33dd92
BVA		 2809static const struct blk_mq_ops skd_mq_ops = {
2810 .queue_rq = skd_mq_queue_rq,
296cb94c 2811 .complete = skd_complete_rq,
f2fe4459 2812 .timeout = skd_timed_out,
ca33dd92
BVA		 2813 .init_request = skd_init_request,
2814 .exit_request = skd_exit_request,
2815};
2816
e67f86b3
AB		 2817static int skd_cons_disk(struct skd_device *skdev)
2818{
2819 int rc = 0;
2820 struct gendisk *disk;
2821 struct request_queue *q;
2822 unsigned long flags;
2823
2824 disk = alloc_disk(SKD_MINORS_PER_DEVICE);
2825 if (!disk) {
2826 rc = -ENOMEM;
2827 goto err_out;
2828 }
2829
2830 skdev->disk = disk;
2831 sprintf(disk->disk_name, DRV_NAME "%u", skdev->devno);
2832
2833 disk->major = skdev->major;
2834 disk->first_minor = skdev->devno * SKD_MINORS_PER_DEVICE;
2835 disk->fops = &skd_blockdev_ops;
2836 disk->private_data = skdev;
2837
ca33dd92
BVA		 2838 memset(&skdev->tag_set, 0, sizeof(skdev->tag_set));
2839 skdev->tag_set.ops = &skd_mq_ops;
2840 skdev->tag_set.nr_hw_queues = 1;
2841 skdev->tag_set.queue_depth = skd_max_queue_depth;
2842 skdev->tag_set.cmd_size = sizeof(struct skd_request_context) +
2843 skdev->sgs_per_request * sizeof(struct scatterlist);
2844 skdev->tag_set.numa_node = NUMA_NO_NODE;
2845 skdev->tag_set.flags = BLK_MQ_F_SHOULD_MERGE |
2846 BLK_MQ_F_SG_MERGE |
2847 BLK_ALLOC_POLICY_TO_MQ_FLAG(BLK_TAG_ALLOC_FIFO);
2848 skdev->tag_set.driver_data = skdev;
92d499d4
DC		 2849 rc = blk_mq_alloc_tag_set(&skdev->tag_set);
2850 if (rc)
2851 goto err_out;
2852 q = blk_mq_init_queue(&skdev->tag_set);
2853 if (IS_ERR(q)) {
2854 blk_mq_free_tag_set(&skdev->tag_set);
2855 rc = PTR_ERR(q);
e67f86b3
AB		 2856 goto err_out;
2857 }
e7278a8b 2858 q->queuedata = skdev;
e67f86b3
AB		 2859
2860 skdev->queue = q;
2861 disk->queue = q;
e67f86b3 2862
6975f732 2863 blk_queue_write_cache(q, true, true);
e67f86b3
AB		 2864 blk_queue_max_segments(q, skdev->sgs_per_request);
2865 blk_queue_max_hw_sectors(q, SKD_N_MAX_SECTORS);
2866
a5c5b392 2867 /* set optimal I/O size to 8KB */
e67f86b3
AB		 2868 blk_queue_io_opt(q, 8192);
2869
8b904b5b
BVA		 2870 blk_queue_flag_set(QUEUE_FLAG_NONROT, q);
2871 blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, q);
e67f86b3 2872
a74d5b76 2873 blk_queue_rq_timeout(q, 8 * HZ);
a74d5b76 2874
e67f86b3 2875 spin_lock_irqsave(&skdev->lock, flags);
f98806d6 2876 dev_dbg(&skdev->pdev->dev, "stopping queue\n");
ca33dd92 2877 blk_mq_stop_hw_queues(skdev->queue);
e67f86b3
AB		 2878 spin_unlock_irqrestore(&skdev->lock, flags);
2879
2880err_out:
2881 return rc;
2882}
2883
542d7b00
BZ		 2884#define SKD_N_DEV_TABLE 16u
2885static u32 skd_next_devno;
e67f86b3 2886
542d7b00 2887static struct skd_device *skd_construct(struct pci_dev *pdev)
e67f86b3 2888{
542d7b00
BZ		 2889 struct skd_device *skdev;
2890 int blk_major = skd_major;
a3db102d 2891 size_t size;
542d7b00 2892 int rc;
e67f86b3 2893
542d7b00 2894 skdev = kzalloc(sizeof(*skdev), GFP_KERNEL);
e67f86b3 2895
542d7b00 2896 if (!skdev) {
f98806d6 2897 dev_err(&pdev->dev, "memory alloc failure\n");
542d7b00
BZ		 2898 return NULL;
2899 }
e67f86b3 2900
542d7b00
BZ		 2901 skdev->state = SKD_DRVR_STATE_LOAD;
2902 skdev->pdev = pdev;
2903 skdev->devno = skd_next_devno++;
2904 skdev->major = blk_major;
542d7b00 2905 skdev->dev_max_queue_depth = 0;
e67f86b3 2906
542d7b00
BZ		 2907 skdev->num_req_context = skd_max_queue_depth;
2908 skdev->num_fitmsg_context = skd_max_queue_depth;
542d7b00
BZ		 2909 skdev->cur_max_queue_depth = 1;
2910 skdev->queue_low_water_mark = 1;
2911 skdev->proto_ver = 99;
2912 skdev->sgs_per_request = skd_sgs_per_request;
2913 skdev->dbg_level = skd_dbg_level;
e67f86b3 2914
542d7b00
BZ		 2915 spin_lock_init(&skdev->lock);
2916
ca33dd92 2917 INIT_WORK(&skdev->start_queue, skd_start_queue);
542d7b00 2918 INIT_WORK(&skdev->completion_worker, skd_completion_worker);
e67f86b3 2919
a3db102d
BVA		 2920 size = max(SKD_N_FITMSG_BYTES, SKD_N_SPECIAL_FITMSG_BYTES);
2921 skdev->msgbuf_cache = kmem_cache_create("skd-msgbuf", size, 0,
2922 SLAB_HWCACHE_ALIGN, NULL);
2923 if (!skdev->msgbuf_cache)
2924 goto err_out;
2925 WARN_ONCE(kmem_cache_size(skdev->msgbuf_cache) < size,
2926 "skd-msgbuf: %d < %zd\n",
2927 kmem_cache_size(skdev->msgbuf_cache), size);
2928 size = skd_sgs_per_request * sizeof(struct fit_sg_descriptor);
2929 skdev->sglist_cache = kmem_cache_create("skd-sglist", size, 0,
2930 SLAB_HWCACHE_ALIGN, NULL);
2931 if (!skdev->sglist_cache)
2932 goto err_out;
2933 WARN_ONCE(kmem_cache_size(skdev->sglist_cache) < size,
2934 "skd-sglist: %d < %zd\n",
2935 kmem_cache_size(skdev->sglist_cache), size);
2936 size = SKD_N_INTERNAL_BYTES;
2937 skdev->databuf_cache = kmem_cache_create("skd-databuf", size, 0,
2938 SLAB_HWCACHE_ALIGN, NULL);
2939 if (!skdev->databuf_cache)
2940 goto err_out;
2941 WARN_ONCE(kmem_cache_size(skdev->databuf_cache) < size,
2942 "skd-databuf: %d < %zd\n",
2943 kmem_cache_size(skdev->databuf_cache), size);
2944
f98806d6 2945 dev_dbg(&skdev->pdev->dev, "skcomp\n");
542d7b00
BZ		 2946 rc = skd_cons_skcomp(skdev);
2947 if (rc < 0)
2948 goto err_out;
e67f86b3 2949
f98806d6 2950 dev_dbg(&skdev->pdev->dev, "skmsg\n");
542d7b00
BZ		 2951 rc = skd_cons_skmsg(skdev);
2952 if (rc < 0)
2953 goto err_out;
2954
f98806d6 2955 dev_dbg(&skdev->pdev->dev, "sksb\n");
542d7b00
BZ		 2956 rc = skd_cons_sksb(skdev);
2957 if (rc < 0)
2958 goto err_out;
2959
f98806d6 2960 dev_dbg(&skdev->pdev->dev, "disk\n");
542d7b00
BZ		 2961 rc = skd_cons_disk(skdev);
2962 if (rc < 0)
2963 goto err_out;
2964
f98806d6 2965 dev_dbg(&skdev->pdev->dev, "VICTORY\n");
542d7b00
BZ		 2966 return skdev;
2967
2968err_out:
f98806d6 2969 dev_dbg(&skdev->pdev->dev, "construct failed\n");
542d7b00
BZ		 2970 skd_destruct(skdev);
2971 return NULL;
e67f86b3
AB		 2972}
2973
542d7b00
BZ		 2974/*
2975 *****************************************************************************
2976 * DESTRUCT (FREE)
2977 *****************************************************************************
2978 */
2979
e67f86b3
AB		 2980static void skd_free_skcomp(struct skd_device *skdev)
2981{
7f13bdad 2982 if (skdev->skcomp_table)
13812621
CH		 2983 dma_free_coherent(&skdev->pdev->dev, SKD_SKCOMP_SIZE,
2984 skdev->skcomp_table, skdev->cq_dma_address);
e67f86b3
AB		 2985
2986 skdev->skcomp_table = NULL;
2987 skdev->cq_dma_address = 0;
2988}
2989
2990static void skd_free_skmsg(struct skd_device *skdev)
2991{
2992 u32 i;
2993
2994 if (skdev->skmsg_table == NULL)
2995 return;
2996
2997 for (i = 0; i < skdev->num_fitmsg_context; i++) {
2998 struct skd_fitmsg_context *skmsg;
2999
3000 skmsg = &skdev->skmsg_table[i];
3001
3002 if (skmsg->msg_buf != NULL) {
13812621
CH		 3003 dma_free_coherent(&skdev->pdev->dev, SKD_N_FITMSG_BYTES,
3004 skmsg->msg_buf,
e67f86b3
AB		 3005 skmsg->mb_dma_address);
3006 }
3007 skmsg->msg_buf = NULL;
3008 skmsg->mb_dma_address = 0;
3009 }
3010
3011 kfree(skdev->skmsg_table);
3012 skdev->skmsg_table = NULL;
3013}
3014
e67f86b3
AB		 3015static void skd_free_sksb(struct skd_device *skdev)
3016{
a3db102d 3017 struct skd_special_context *skspcl = &skdev->internal_skspcl;
e67f86b3 3018
a3db102d
BVA		 3019 skd_free_dma(skdev, skdev->databuf_cache, skspcl->data_buf,
3020 skspcl->db_dma_address, DMA_BIDIRECTIONAL);
e67f86b3
AB		 3021
3022 skspcl->data_buf = NULL;
3023 skspcl->db_dma_address = 0;
3024
a3db102d
BVA		 3025 skd_free_dma(skdev, skdev->msgbuf_cache, skspcl->msg_buf,
3026 skspcl->mb_dma_address, DMA_TO_DEVICE);
e67f86b3
AB		 3027
3028 skspcl->msg_buf = NULL;
3029 skspcl->mb_dma_address = 0;
3030
a3db102d 3031 skd_free_sg_list(skdev, skspcl->req.sksg_list,
e67f86b3
AB		 3032 skspcl->req.sksg_dma_address);
3033
3034 skspcl->req.sksg_list = NULL;
3035 skspcl->req.sksg_dma_address = 0;
3036}
3037
e67f86b3
AB		 3038static void skd_free_disk(struct skd_device *skdev)
3039{
3040 struct gendisk *disk = skdev->disk;
3041
7277cc67
BVA		 3042 if (disk && (disk->flags & GENHD_FL_UP))
3043 del_gendisk(disk);
3044
3045 if (skdev->queue) {
3046 blk_cleanup_queue(skdev->queue);
3047 skdev->queue = NULL;
4633504c
BVA		 3048 if (disk)
3049 disk->queue = NULL;
e67f86b3 3050 }
7277cc67 3051
ca33dd92
BVA		 3052 if (skdev->tag_set.tags)
3053 blk_mq_free_tag_set(&skdev->tag_set);
3054
7277cc67 3055 put_disk(disk);
e67f86b3
AB		 3056 skdev->disk = NULL;
3057}
3058
542d7b00
BZ		 3059static void skd_destruct(struct skd_device *skdev)
3060{
3061 if (skdev == NULL)
3062 return;
3063
ca33dd92
BVA		 3064 cancel_work_sync(&skdev->start_queue);
3065
f98806d6 3066 dev_dbg(&skdev->pdev->dev, "disk\n");
542d7b00
BZ		 3067 skd_free_disk(skdev);
3068
f98806d6 3069 dev_dbg(&skdev->pdev->dev, "sksb\n");
542d7b00
BZ		 3070 skd_free_sksb(skdev);
3071
f98806d6 3072 dev_dbg(&skdev->pdev->dev, "skmsg\n");
542d7b00 3073 skd_free_skmsg(skdev);
e67f86b3 3074
f98806d6 3075 dev_dbg(&skdev->pdev->dev, "skcomp\n");
542d7b00
BZ		 3076 skd_free_skcomp(skdev);
3077
a3db102d
BVA		 3078 kmem_cache_destroy(skdev->databuf_cache);
3079 kmem_cache_destroy(skdev->sglist_cache);
3080 kmem_cache_destroy(skdev->msgbuf_cache);
3081
f98806d6 3082 dev_dbg(&skdev->pdev->dev, "skdev\n");
542d7b00
BZ		 3083 kfree(skdev);
3084}
e67f86b3
AB		 3085
3086/*
3087 *****************************************************************************
3088 * BLOCK DEVICE (BDEV) GLUE
3089 *****************************************************************************
3090 */
3091
3092static int skd_bdev_getgeo(struct block_device *bdev, struct hd_geometry *geo)
3093{
3094 struct skd_device *skdev;
3095 u64 capacity;
3096
3097 skdev = bdev->bd_disk->private_data;
3098
f98806d6
BVA		 3099 dev_dbg(&skdev->pdev->dev, "%s: CMD[%s] getgeo device\n",
3100 bdev->bd_disk->disk_name, current->comm);
e67f86b3
AB		 3101
3102 if (skdev->read_cap_is_valid) {
3103 capacity = get_capacity(skdev->disk);
3104 geo->heads = 64;
3105 geo->sectors = 255;
3106 geo->cylinders = (capacity) / (255 * 64);
3107
3108 return 0;
3109 }
3110 return -EIO;
3111}
3112
0d52c756 3113static int skd_bdev_attach(struct device *parent, struct skd_device *skdev)
e67f86b3 3114{
f98806d6 3115 dev_dbg(&skdev->pdev->dev, "add_disk\n");
fef912bf 3116 device_add_disk(parent, skdev->disk, NULL);
e67f86b3
AB		 3117 return 0;
3118}
3119
3120static const struct block_device_operations skd_blockdev_ops = {
3121 .owner = THIS_MODULE,
e67f86b3
AB		 3122 .getgeo = skd_bdev_getgeo,
3123};
3124
e67f86b3
AB		 3125/*
3126 *****************************************************************************
3127 * PCIe DRIVER GLUE
3128 *****************************************************************************
3129 */
3130
9baa3c34 3131static const struct pci_device_id skd_pci_tbl[] = {
e67f86b3
AB		 3132 { PCI_VENDOR_ID_STEC, PCI_DEVICE_ID_S1120,
3133 PCI_ANY_ID, PCI_ANY_ID, 0, 0, },
3134 { 0 } /* terminate list */
3135};
3136
3137MODULE_DEVICE_TABLE(pci, skd_pci_tbl);
3138
3139static char *skd_pci_info(struct skd_device *skdev, char *str)
3140{
3141 int pcie_reg;
3142
3143 strcpy(str, "PCIe (");
3144 pcie_reg = pci_find_capability(skdev->pdev, PCI_CAP_ID_EXP);
3145
3146 if (pcie_reg) {
3147
3148 char lwstr[6];
3149 uint16_t pcie_lstat, lspeed, lwidth;
3150
3151 pcie_reg += 0x12;
3152 pci_read_config_word(skdev->pdev, pcie_reg, &pcie_lstat);
3153 lspeed = pcie_lstat & (0xF);
3154 lwidth = (pcie_lstat & 0x3F0) >> 4;
3155
3156 if (lspeed == 1)
3157 strcat(str, "2.5GT/s ");
3158 else if (lspeed == 2)
3159 strcat(str, "5.0GT/s ");
3160 else
3161 strcat(str, "<unknown> ");
3162 snprintf(lwstr, sizeof(lwstr), "%dX)", lwidth);
3163 strcat(str, lwstr);
3164 }
3165 return str;
3166}
3167
3168static int skd_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
3169{
3170 int i;
3171 int rc = 0;
3172 char pci_str[32];
3173 struct skd_device *skdev;
3174
bb9f7dd3
BVA		 3175 dev_dbg(&pdev->dev, "vendor=%04X device=%04x\n", pdev->vendor,
3176 pdev->device);
e67f86b3
AB		 3177
3178 rc = pci_enable_device(pdev);
3179 if (rc)
3180 return rc;
3181 rc = pci_request_regions(pdev, DRV_NAME);
3182 if (rc)
3183 goto err_out;
13812621
CH		 3184 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3185 if (rc)
d91dc172 3186 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
13812621
CH		 3187 if (rc) {
3188 dev_err(&pdev->dev, "DMA mask error %d\n", rc);
3189 goto err_out_regions;
e67f86b3
AB		 3190 }
3191
b8df6647
BZ		 3192 if (!skd_major) {
3193 rc = register_blkdev(0, DRV_NAME);
3194 if (rc < 0)
3195 goto err_out_regions;
3196 BUG_ON(!rc);
3197 skd_major = rc;
3198 }
3199
e67f86b3 3200 skdev = skd_construct(pdev);
1762b57f
WY		 3201 if (skdev == NULL) {
3202 rc = -ENOMEM;
e67f86b3 3203 goto err_out_regions;
1762b57f 3204 }
e67f86b3
AB		 3205
3206 skd_pci_info(skdev, pci_str);
f98806d6 3207 dev_info(&pdev->dev, "%s 64bit\n", pci_str);
e67f86b3
AB		 3208
3209 pci_set_master(pdev);
3210 rc = pci_enable_pcie_error_reporting(pdev);
3211 if (rc) {
f98806d6
BVA		 3212 dev_err(&pdev->dev,
3213 "bad enable of PCIe error reporting rc=%d\n", rc);
e67f86b3
AB		 3214 skdev->pcie_error_reporting_is_enabled = 0;
3215 } else
3216 skdev->pcie_error_reporting_is_enabled = 1;
3217
e67f86b3 3218 pci_set_drvdata(pdev, skdev);
ebedd16d 3219
e67f86b3
AB		 3220 for (i = 0; i < SKD_MAX_BARS; i++) {
3221 skdev->mem_phys[i] = pci_resource_start(pdev, i);
3222 skdev->mem_size[i] = (u32)pci_resource_len(pdev, i);
3223 skdev->mem_map[i] = ioremap(skdev->mem_phys[i],
3224 skdev->mem_size[i]);
3225 if (!skdev->mem_map[i]) {
f98806d6
BVA		 3226 dev_err(&pdev->dev,
3227 "Unable to map adapter memory!\n");
e67f86b3
AB		 3228 rc = -ENODEV;
3229 goto err_out_iounmap;
3230 }
f98806d6
BVA		 3231 dev_dbg(&pdev->dev, "mem_map=%p, phyd=%016llx, size=%d\n",
3232 skdev->mem_map[i], (uint64_t)skdev->mem_phys[i],
3233 skdev->mem_size[i]);
e67f86b3
AB		 3234 }
3235
3236 rc = skd_acquire_irq(skdev);
3237 if (rc) {
f98806d6 3238 dev_err(&pdev->dev, "interrupt resource error %d\n", rc);
e67f86b3
AB		 3239 goto err_out_iounmap;
3240 }
3241
3242 rc = skd_start_timer(skdev);
3243 if (rc)
3244 goto err_out_timer;
3245
3246 init_waitqueue_head(&skdev->waitq);
3247
3248 skd_start_device(skdev);
3249
3250 rc = wait_event_interruptible_timeout(skdev->waitq,
3251 (skdev->gendisk_on),
3252 (SKD_START_WAIT_SECONDS * HZ));
3253 if (skdev->gendisk_on > 0) {
3254 /* device came on-line after reset */
0d52c756 3255 skd_bdev_attach(&pdev->dev, skdev);
e67f86b3
AB		 3256 rc = 0;
3257 } else {
3258 /* we timed out, something is wrong with the device,
3259 don't add the disk structure */
f98806d6
BVA		 3260 dev_err(&pdev->dev, "error: waiting for s1120 timed out %d!\n",
3261 rc);
e67f86b3
AB		 3262 /* in case of no error; we timeout with ENXIO */
3263 if (!rc)
3264 rc = -ENXIO;
3265 goto err_out_timer;
3266 }
3267
e67f86b3
AB		 3268 return rc;
3269
3270err_out_timer:
3271 skd_stop_device(skdev);
3272 skd_release_irq(skdev);
3273
3274err_out_iounmap:
3275 for (i = 0; i < SKD_MAX_BARS; i++)
3276 if (skdev->mem_map[i])
3277 iounmap(skdev->mem_map[i]);
3278
3279 if (skdev->pcie_error_reporting_is_enabled)
3280 pci_disable_pcie_error_reporting(pdev);
3281
3282 skd_destruct(skdev);
3283
3284err_out_regions:
3285 pci_release_regions(pdev);
3286
3287err_out:
3288 pci_disable_device(pdev);
3289 pci_set_drvdata(pdev, NULL);
3290 return rc;
3291}
3292
3293static void skd_pci_remove(struct pci_dev *pdev)
3294{
3295 int i;
3296 struct skd_device *skdev;
3297
3298 skdev = pci_get_drvdata(pdev);
3299 if (!skdev) {
f98806d6 3300 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3301 return;
3302 }
3303 skd_stop_device(skdev);
3304 skd_release_irq(skdev);
3305
3306 for (i = 0; i < SKD_MAX_BARS; i++)
3307 if (skdev->mem_map[i])
4854afe3 3308 iounmap(skdev->mem_map[i]);
e67f86b3
AB		 3309
3310 if (skdev->pcie_error_reporting_is_enabled)
3311 pci_disable_pcie_error_reporting(pdev);
3312
3313 skd_destruct(skdev);
3314
3315 pci_release_regions(pdev);
3316 pci_disable_device(pdev);
3317 pci_set_drvdata(pdev, NULL);
3318
3319 return;
3320}
3321
3322static int skd_pci_suspend(struct pci_dev *pdev, pm_message_t state)
3323{
3324 int i;
3325 struct skd_device *skdev;
3326
3327 skdev = pci_get_drvdata(pdev);
3328 if (!skdev) {
f98806d6 3329 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3330 return -EIO;
3331 }
3332
3333 skd_stop_device(skdev);
3334
3335 skd_release_irq(skdev);
3336
3337 for (i = 0; i < SKD_MAX_BARS; i++)
3338 if (skdev->mem_map[i])
4854afe3 3339 iounmap(skdev->mem_map[i]);
e67f86b3
AB		 3340
3341 if (skdev->pcie_error_reporting_is_enabled)
3342 pci_disable_pcie_error_reporting(pdev);
3343
3344 pci_release_regions(pdev);
3345 pci_save_state(pdev);
3346 pci_disable_device(pdev);
3347 pci_set_power_state(pdev, pci_choose_state(pdev, state));
3348 return 0;
3349}
3350
3351static int skd_pci_resume(struct pci_dev *pdev)
3352{
3353 int i;
3354 int rc = 0;
3355 struct skd_device *skdev;
3356
3357 skdev = pci_get_drvdata(pdev);
3358 if (!skdev) {
f98806d6 3359 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3360 return -1;
3361 }
3362
3363 pci_set_power_state(pdev, PCI_D0);
3364 pci_enable_wake(pdev, PCI_D0, 0);
3365 pci_restore_state(pdev);
3366
3367 rc = pci_enable_device(pdev);
3368 if (rc)
3369 return rc;
3370 rc = pci_request_regions(pdev, DRV_NAME);
3371 if (rc)
3372 goto err_out;
13812621
CH		 3373 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3374 if (rc)
d91dc172 3375 rc = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
13812621
CH		 3376 if (rc) {
3377 dev_err(&pdev->dev, "DMA mask error %d\n", rc);
3378 goto err_out_regions;
e67f86b3
AB		 3379 }
3380
3381 pci_set_master(pdev);
3382 rc = pci_enable_pcie_error_reporting(pdev);
3383 if (rc) {
f98806d6
BVA		 3384 dev_err(&pdev->dev,
3385 "bad enable of PCIe error reporting rc=%d\n", rc);
e67f86b3
AB		 3386 skdev->pcie_error_reporting_is_enabled = 0;
3387 } else
3388 skdev->pcie_error_reporting_is_enabled = 1;
3389
3390 for (i = 0; i < SKD_MAX_BARS; i++) {
3391
3392 skdev->mem_phys[i] = pci_resource_start(pdev, i);
3393 skdev->mem_size[i] = (u32)pci_resource_len(pdev, i);
3394 skdev->mem_map[i] = ioremap(skdev->mem_phys[i],
3395 skdev->mem_size[i]);
3396 if (!skdev->mem_map[i]) {
f98806d6 3397 dev_err(&pdev->dev, "Unable to map adapter memory!\n");
e67f86b3
AB		 3398 rc = -ENODEV;
3399 goto err_out_iounmap;
3400 }
f98806d6
BVA		 3401 dev_dbg(&pdev->dev, "mem_map=%p, phyd=%016llx, size=%d\n",
3402 skdev->mem_map[i], (uint64_t)skdev->mem_phys[i],
3403 skdev->mem_size[i]);
e67f86b3
AB		 3404 }
3405 rc = skd_acquire_irq(skdev);
3406 if (rc) {
f98806d6 3407 dev_err(&pdev->dev, "interrupt resource error %d\n", rc);
e67f86b3
AB		 3408 goto err_out_iounmap;
3409 }
3410
3411 rc = skd_start_timer(skdev);
3412 if (rc)
3413 goto err_out_timer;
3414
3415 init_waitqueue_head(&skdev->waitq);
3416
3417 skd_start_device(skdev);
3418
3419 return rc;
3420
3421err_out_timer:
3422 skd_stop_device(skdev);
3423 skd_release_irq(skdev);
3424
3425err_out_iounmap:
3426 for (i = 0; i < SKD_MAX_BARS; i++)
3427 if (skdev->mem_map[i])
3428 iounmap(skdev->mem_map[i]);
3429
3430 if (skdev->pcie_error_reporting_is_enabled)
3431 pci_disable_pcie_error_reporting(pdev);
3432
3433err_out_regions:
3434 pci_release_regions(pdev);
3435
3436err_out:
3437 pci_disable_device(pdev);
3438 return rc;
3439}
3440
3441static void skd_pci_shutdown(struct pci_dev *pdev)
3442{
3443 struct skd_device *skdev;
3444
f98806d6 3445 dev_err(&pdev->dev, "%s called\n", __func__);
e67f86b3
AB		 3446
3447 skdev = pci_get_drvdata(pdev);
3448 if (!skdev) {
f98806d6 3449 dev_err(&pdev->dev, "no device data for PCI\n");
e67f86b3
AB		 3450 return;
3451 }
3452
f98806d6 3453 dev_err(&pdev->dev, "calling stop\n");
e67f86b3
AB		 3454 skd_stop_device(skdev);
3455}
3456
3457static struct pci_driver skd_driver = {
3458 .name = DRV_NAME,
3459 .id_table = skd_pci_tbl,
3460 .probe = skd_pci_probe,
3461 .remove = skd_pci_remove,
3462 .suspend = skd_pci_suspend,
3463 .resume = skd_pci_resume,
3464 .shutdown = skd_pci_shutdown,
3465};
3466
3467/*
3468 *****************************************************************************
3469 * LOGGING SUPPORT
3470 *****************************************************************************
3471 */
3472
e67f86b3
AB		 3473const char *skd_drive_state_to_str(int state)
3474{
3475 switch (state) {
3476 case FIT_SR_DRIVE_OFFLINE:
3477 return "OFFLINE";
3478 case FIT_SR_DRIVE_INIT:
3479 return "INIT";
3480 case FIT_SR_DRIVE_ONLINE:
3481 return "ONLINE";
3482 case FIT_SR_DRIVE_BUSY:
3483 return "BUSY";
3484 case FIT_SR_DRIVE_FAULT:
3485 return "FAULT";
3486 case FIT_SR_DRIVE_DEGRADED:
3487 return "DEGRADED";
3488 case FIT_SR_PCIE_LINK_DOWN:
3489 return "INK_DOWN";
3490 case FIT_SR_DRIVE_SOFT_RESET:
3491 return "SOFT_RESET";
3492 case FIT_SR_DRIVE_NEED_FW_DOWNLOAD:
3493 return "NEED_FW";
3494 case FIT_SR_DRIVE_INIT_FAULT:
3495 return "INIT_FAULT";
3496 case FIT_SR_DRIVE_BUSY_SANITIZE:
3497 return "BUSY_SANITIZE";
3498 case FIT_SR_DRIVE_BUSY_ERASE:
3499 return "BUSY_ERASE";
3500 case FIT_SR_DRIVE_FW_BOOTING:
3501 return "FW_BOOTING";
3502 default:
3503 return "???";
3504 }
3505}
3506
3507const char *skd_skdev_state_to_str(enum skd_drvr_state state)
3508{
3509 switch (state) {
3510 case SKD_DRVR_STATE_LOAD:
3511 return "LOAD";
3512 case SKD_DRVR_STATE_IDLE:
3513 return "IDLE";
3514 case SKD_DRVR_STATE_BUSY:
3515 return "BUSY";
3516 case SKD_DRVR_STATE_STARTING:
3517 return "STARTING";
3518 case SKD_DRVR_STATE_ONLINE:
3519 return "ONLINE";
3520 case SKD_DRVR_STATE_PAUSING:
3521 return "PAUSING";
3522 case SKD_DRVR_STATE_PAUSED:
3523 return "PAUSED";
e67f86b3
AB		 3524 case SKD_DRVR_STATE_RESTARTING:
3525 return "RESTARTING";
3526 case SKD_DRVR_STATE_RESUMING:
3527 return "RESUMING";
3528 case SKD_DRVR_STATE_STOPPING:
3529 return "STOPPING";
3530 case SKD_DRVR_STATE_SYNCING:
3531 return "SYNCING";
3532 case SKD_DRVR_STATE_FAULT:
3533 return "FAULT";
3534 case SKD_DRVR_STATE_DISAPPEARED:
3535 return "DISAPPEARED";
3536 case SKD_DRVR_STATE_BUSY_ERASE:
3537 return "BUSY_ERASE";
3538 case SKD_DRVR_STATE_BUSY_SANITIZE:
3539 return "BUSY_SANITIZE";
3540 case SKD_DRVR_STATE_BUSY_IMMINENT:
3541 return "BUSY_IMMINENT";
3542 case SKD_DRVR_STATE_WAIT_BOOT:
3543 return "WAIT_BOOT";
3544
3545 default:
3546 return "???";
3547 }
3548}
3549
a26ba7fa 3550static const char *skd_skreq_state_to_str(enum skd_req_state state)
e67f86b3
AB		 3551{
3552 switch (state) {
3553 case SKD_REQ_STATE_IDLE:
3554 return "IDLE";
3555 case SKD_REQ_STATE_SETUP:
3556 return "SETUP";
3557 case SKD_REQ_STATE_BUSY:
3558 return "BUSY";
3559 case SKD_REQ_STATE_COMPLETED:
3560 return "COMPLETED";
3561 case SKD_REQ_STATE_TIMEOUT:
3562 return "TIMEOUT";
e67f86b3
AB		 3563 default:
3564 return "???";
3565 }
3566}
3567
3568static void skd_log_skdev(struct skd_device *skdev, const char *event)
3569{
f98806d6
BVA		 3570 dev_dbg(&skdev->pdev->dev, "skdev=%p event='%s'\n", skdev, event);
3571 dev_dbg(&skdev->pdev->dev, " drive_state=%s(%d) driver_state=%s(%d)\n",
3572 skd_drive_state_to_str(skdev->drive_state), skdev->drive_state,
3573 skd_skdev_state_to_str(skdev->state), skdev->state);
3574 dev_dbg(&skdev->pdev->dev, " busy=%d limit=%d dev=%d lowat=%d\n",
d4d0f5fc 3575 skd_in_flight(skdev), skdev->cur_max_queue_depth,
f98806d6 3576 skdev->dev_max_queue_depth, skdev->queue_low_water_mark);
a74d5b76
BVA		 3577 dev_dbg(&skdev->pdev->dev, " cycle=%d cycle_ix=%d\n",
3578 skdev->skcomp_cycle, skdev->skcomp_ix);
e67f86b3
AB		 3579}
3580
e67f86b3
AB		 3581static void skd_log_skreq(struct skd_device *skdev,
3582 struct skd_request_context *skreq, const char *event)
3583{
e7278a8b
BVA		 3584 struct request *req = blk_mq_rq_from_pdu(skreq);
3585 u32 lba = blk_rq_pos(req);
3586 u32 count = blk_rq_sectors(req);
3587
f98806d6
BVA		 3588 dev_dbg(&skdev->pdev->dev, "skreq=%p event='%s'\n", skreq, event);
3589 dev_dbg(&skdev->pdev->dev, " state=%s(%d) id=0x%04x fitmsg=0x%04x\n",
3590 skd_skreq_state_to_str(skreq->state), skreq->state, skreq->id,
3591 skreq->fitmsg_id);
a74d5b76
BVA		 3592 dev_dbg(&skdev->pdev->dev, " sg_dir=%d n_sg=%d\n",
3593 skreq->data_dir, skreq->n_sg);
ca33dd92 3594
e7278a8b
BVA		 3595 dev_dbg(&skdev->pdev->dev,
3596 "req=%p lba=%u(0x%x) count=%u(0x%x) dir=%d\n", req, lba, lba,
3597 count, count, (int)rq_data_dir(req));
e67f86b3
AB		 3598}
3599
3600/*
3601 *****************************************************************************
3602 * MODULE GLUE
3603 *****************************************************************************
3604 */
3605
3606static int __init skd_init(void)
3607{
16a70534
BVA		 3608 BUILD_BUG_ON(sizeof(struct fit_completion_entry_v1) != 8);
3609 BUILD_BUG_ON(sizeof(struct fit_comp_error_info) != 32);
3610 BUILD_BUG_ON(sizeof(struct skd_command_header) != 16);
3611 BUILD_BUG_ON(sizeof(struct skd_scsi_request) != 32);
3612 BUILD_BUG_ON(sizeof(struct driver_inquiry_data) != 44);
d891fe60
BVA		 3613 BUILD_BUG_ON(offsetof(struct skd_msg_buf, fmh) != 0);
3614 BUILD_BUG_ON(offsetof(struct skd_msg_buf, scsi) != 64);
3615 BUILD_BUG_ON(sizeof(struct skd_msg_buf) != SKD_N_FITMSG_BYTES);
2da7b403 3616
e67f86b3
AB		 3617 switch (skd_isr_type) {
3618 case SKD_IRQ_LEGACY:
3619 case SKD_IRQ_MSI:
3620 case SKD_IRQ_MSIX:
3621 break;
3622 default:
fbed149a 3623 pr_err(PFX "skd_isr_type %d invalid, re-set to %d\n",
e67f86b3
AB		 3624 skd_isr_type, SKD_IRQ_DEFAULT);
3625 skd_isr_type = SKD_IRQ_DEFAULT;
3626 }
3627
fbed149a
BZ		 3628 if (skd_max_queue_depth < 1 ||
3629 skd_max_queue_depth > SKD_MAX_QUEUE_DEPTH) {
3630 pr_err(PFX "skd_max_queue_depth %d invalid, re-set to %d\n",
e67f86b3
AB		 3631 skd_max_queue_depth, SKD_MAX_QUEUE_DEPTH_DEFAULT);
3632 skd_max_queue_depth = SKD_MAX_QUEUE_DEPTH_DEFAULT;
3633 }
3634
2da7b403
BVA		 3635 if (skd_max_req_per_msg < 1 ||
3636 skd_max_req_per_msg > SKD_MAX_REQ_PER_MSG) {
fbed149a 3637 pr_err(PFX "skd_max_req_per_msg %d invalid, re-set to %d\n",
e67f86b3
AB		 3638 skd_max_req_per_msg, SKD_MAX_REQ_PER_MSG_DEFAULT);
3639 skd_max_req_per_msg = SKD_MAX_REQ_PER_MSG_DEFAULT;
3640 }
3641
3642 if (skd_sgs_per_request < 1 || skd_sgs_per_request > 4096) {
fbed149a 3643 pr_err(PFX "skd_sg_per_request %d invalid, re-set to %d\n",
e67f86b3
AB		 3644 skd_sgs_per_request, SKD_N_SG_PER_REQ_DEFAULT);
3645 skd_sgs_per_request = SKD_N_SG_PER_REQ_DEFAULT;
3646 }
3647
3648 if (skd_dbg_level < 0 || skd_dbg_level > 2) {
fbed149a 3649 pr_err(PFX "skd_dbg_level %d invalid, re-set to %d\n",
e67f86b3
AB		 3650 skd_dbg_level, 0);
3651 skd_dbg_level = 0;
3652 }
3653
3654 if (skd_isr_comp_limit < 0) {
fbed149a 3655 pr_err(PFX "skd_isr_comp_limit %d invalid, set to %d\n",
e67f86b3
AB		 3656 skd_isr_comp_limit, 0);
3657 skd_isr_comp_limit = 0;
3658 }
3659
b8df6647 3660 return pci_register_driver(&skd_driver);
e67f86b3
AB		 3661}
3662
3663static void __exit skd_exit(void)
3664{
e67f86b3 3665 pci_unregister_driver(&skd_driver);
b8df6647
BZ		 3666
3667 if (skd_major)
3668 unregister_blkdev(skd_major, DRV_NAME);
e67f86b3
AB		 3669}
3670
e67f86b3
AB		 3671module_init(skd_init);
3672module_exit(skd_exit);
Linux 6.x block layer and io_uring tree(s)