Commit | Line | Data |
---|---|---|
8722ff8c | 1 | /* |
2 | * Filename: core.c | |
3 | * | |
4 | * | |
5 | * Authors: Joshua Morris <josh.h.morris@us.ibm.com> | |
6 | * Philip Kelleher <pjk1939@linux.vnet.ibm.com> | |
7 | * | |
8 | * (C) Copyright 2013 IBM Corporation | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or | |
11 | * modify it under the terms of the GNU General Public License as | |
12 | * published by the Free Software Foundation; either version 2 of the | |
13 | * License, or (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, but | |
16 | * WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | |
18 | * General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software Foundation, | |
22 | * Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #include <linux/kernel.h> | |
26 | #include <linux/init.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/module.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/reboot.h> | |
31 | #include <linux/slab.h> | |
32 | #include <linux/bitops.h> | |
c95246c3 | 33 | #include <linux/delay.h> |
8722ff8c | 34 | |
35 | #include <linux/genhd.h> | |
36 | #include <linux/idr.h> | |
37 | ||
38 | #include "rsxx_priv.h" | |
39 | #include "rsxx_cfg.h" | |
40 | ||
41 | #define NO_LEGACY 0 | |
fb065cd9 | 42 | #define SYNC_START_TIMEOUT (10 * 60) /* 10 minutes */ |
8722ff8c | 43 | |
f730e3dc | 44 | MODULE_DESCRIPTION("IBM Flash Adapter 900GB Full Height Device Driver"); |
9bb3c446 | 45 | MODULE_AUTHOR("Joshua Morris/Philip Kelleher, IBM"); |
8722ff8c | 46 | MODULE_LICENSE("GPL"); |
47 | MODULE_VERSION(DRIVER_VERSION); | |
48 | ||
49 | static unsigned int force_legacy = NO_LEGACY; | |
50 | module_param(force_legacy, uint, 0444); | |
51 | MODULE_PARM_DESC(force_legacy, "Force the use of legacy type PCI interrupts"); | |
52 | ||
fb065cd9 PK |
53 | static unsigned int sync_start = 1; |
54 | module_param(sync_start, uint, 0444); | |
55 | MODULE_PARM_DESC(sync_start, "On by Default: Driver load will not complete " | |
56 | "until the card startup has completed."); | |
57 | ||
8722ff8c | 58 | static DEFINE_IDA(rsxx_disk_ida); |
59 | static DEFINE_SPINLOCK(rsxx_ida_lock); | |
60 | ||
61 | /*----------------- Interrupt Control & Handling -------------------*/ | |
c95246c3 PK |
62 | |
63 | static void rsxx_mask_interrupts(struct rsxx_cardinfo *card) | |
64 | { | |
65 | card->isr_mask = 0; | |
66 | card->ier_mask = 0; | |
67 | } | |
68 | ||
8722ff8c | 69 | static void __enable_intr(unsigned int *mask, unsigned int intr) |
70 | { | |
71 | *mask |= intr; | |
72 | } | |
73 | ||
74 | static void __disable_intr(unsigned int *mask, unsigned int intr) | |
75 | { | |
76 | *mask &= ~intr; | |
77 | } | |
78 | ||
79 | /* | |
80 | * NOTE: Disabling the IER will disable the hardware interrupt. | |
81 | * Disabling the ISR will disable the software handling of the ISR bit. | |
82 | * | |
83 | * Enable/Disable interrupt functions assume the card->irq_lock | |
84 | * is held by the caller. | |
85 | */ | |
86 | void rsxx_enable_ier(struct rsxx_cardinfo *card, unsigned int intr) | |
87 | { | |
c95246c3 PK |
88 | if (unlikely(card->halt) || |
89 | unlikely(card->eeh_state)) | |
8722ff8c | 90 | return; |
91 | ||
92 | __enable_intr(&card->ier_mask, intr); | |
93 | iowrite32(card->ier_mask, card->regmap + IER); | |
94 | } | |
95 | ||
96 | void rsxx_disable_ier(struct rsxx_cardinfo *card, unsigned int intr) | |
97 | { | |
c95246c3 PK |
98 | if (unlikely(card->eeh_state)) |
99 | return; | |
100 | ||
8722ff8c | 101 | __disable_intr(&card->ier_mask, intr); |
102 | iowrite32(card->ier_mask, card->regmap + IER); | |
103 | } | |
104 | ||
105 | void rsxx_enable_ier_and_isr(struct rsxx_cardinfo *card, | |
106 | unsigned int intr) | |
107 | { | |
c95246c3 PK |
108 | if (unlikely(card->halt) || |
109 | unlikely(card->eeh_state)) | |
8722ff8c | 110 | return; |
111 | ||
112 | __enable_intr(&card->isr_mask, intr); | |
113 | __enable_intr(&card->ier_mask, intr); | |
114 | iowrite32(card->ier_mask, card->regmap + IER); | |
115 | } | |
116 | void rsxx_disable_ier_and_isr(struct rsxx_cardinfo *card, | |
117 | unsigned int intr) | |
118 | { | |
c95246c3 PK |
119 | if (unlikely(card->eeh_state)) |
120 | return; | |
121 | ||
8722ff8c | 122 | __disable_intr(&card->isr_mask, intr); |
123 | __disable_intr(&card->ier_mask, intr); | |
124 | iowrite32(card->ier_mask, card->regmap + IER); | |
125 | } | |
126 | ||
c206c709 | 127 | static irqreturn_t rsxx_isr(int irq, void *pdata) |
8722ff8c | 128 | { |
c206c709 | 129 | struct rsxx_cardinfo *card = pdata; |
8722ff8c | 130 | unsigned int isr; |
131 | int handled = 0; | |
132 | int reread_isr; | |
133 | int i; | |
134 | ||
135 | spin_lock(&card->irq_lock); | |
136 | ||
137 | do { | |
138 | reread_isr = 0; | |
139 | ||
c95246c3 PK |
140 | if (unlikely(card->eeh_state)) |
141 | break; | |
142 | ||
8722ff8c | 143 | isr = ioread32(card->regmap + ISR); |
144 | if (isr == 0xffffffff) { | |
145 | /* | |
146 | * A few systems seem to have an intermittent issue | |
147 | * where PCI reads return all Fs, but retrying the read | |
148 | * a little later will return as expected. | |
149 | */ | |
150 | dev_info(CARD_TO_DEV(card), | |
151 | "ISR = 0xFFFFFFFF, retrying later\n"); | |
152 | break; | |
153 | } | |
154 | ||
155 | isr &= card->isr_mask; | |
156 | if (!isr) | |
157 | break; | |
158 | ||
159 | for (i = 0; i < card->n_targets; i++) { | |
160 | if (isr & CR_INTR_DMA(i)) { | |
161 | if (card->ier_mask & CR_INTR_DMA(i)) { | |
162 | rsxx_disable_ier(card, CR_INTR_DMA(i)); | |
163 | reread_isr = 1; | |
164 | } | |
165 | queue_work(card->ctrl[i].done_wq, | |
166 | &card->ctrl[i].dma_done_work); | |
167 | handled++; | |
168 | } | |
169 | } | |
170 | ||
171 | if (isr & CR_INTR_CREG) { | |
a3299ab1 PK |
172 | queue_work(card->creg_ctrl.creg_wq, |
173 | &card->creg_ctrl.done_work); | |
8722ff8c | 174 | handled++; |
175 | } | |
176 | ||
177 | if (isr & CR_INTR_EVENT) { | |
a3299ab1 | 178 | queue_work(card->event_wq, &card->event_work); |
8722ff8c | 179 | rsxx_disable_ier_and_isr(card, CR_INTR_EVENT); |
180 | handled++; | |
181 | } | |
182 | } while (reread_isr); | |
183 | ||
184 | spin_unlock(&card->irq_lock); | |
185 | ||
186 | return handled ? IRQ_HANDLED : IRQ_NONE; | |
187 | } | |
188 | ||
189 | /*----------------- Card Event Handler -------------------*/ | |
f3791203 | 190 | static const char * const rsxx_card_state_to_str(unsigned int state) |
c206c709 | 191 | { |
f3791203 | 192 | static const char * const state_strings[] = { |
c206c709 PK |
193 | "Unknown", "Shutdown", "Starting", "Formatting", |
194 | "Uninitialized", "Good", "Shutting Down", | |
195 | "Fault", "Read Only Fault", "dStroying" | |
196 | }; | |
197 | ||
198 | return state_strings[ffs(state)]; | |
199 | } | |
200 | ||
8722ff8c | 201 | static void card_state_change(struct rsxx_cardinfo *card, |
202 | unsigned int new_state) | |
203 | { | |
204 | int st; | |
205 | ||
206 | dev_info(CARD_TO_DEV(card), | |
207 | "card state change detected.(%s -> %s)\n", | |
208 | rsxx_card_state_to_str(card->state), | |
209 | rsxx_card_state_to_str(new_state)); | |
210 | ||
211 | card->state = new_state; | |
212 | ||
213 | /* Don't attach DMA interfaces if the card has an invalid config */ | |
214 | if (!card->config_valid) | |
215 | return; | |
216 | ||
217 | switch (new_state) { | |
218 | case CARD_STATE_RD_ONLY_FAULT: | |
219 | dev_crit(CARD_TO_DEV(card), | |
220 | "Hardware has entered read-only mode!\n"); | |
221 | /* | |
222 | * Fall through so the DMA devices can be attached and | |
223 | * the user can attempt to pull off their data. | |
224 | */ | |
225 | case CARD_STATE_GOOD: | |
226 | st = rsxx_get_card_size8(card, &card->size8); | |
227 | if (st) | |
228 | dev_err(CARD_TO_DEV(card), | |
229 | "Failed attaching DMA devices\n"); | |
230 | ||
231 | if (card->config_valid) | |
232 | set_capacity(card->gendisk, card->size8 >> 9); | |
233 | break; | |
234 | ||
235 | case CARD_STATE_FAULT: | |
236 | dev_crit(CARD_TO_DEV(card), | |
237 | "Hardware Fault reported!\n"); | |
238 | /* Fall through. */ | |
239 | ||
240 | /* Everything else, detach DMA interface if it's attached. */ | |
241 | case CARD_STATE_SHUTDOWN: | |
242 | case CARD_STATE_STARTING: | |
243 | case CARD_STATE_FORMATTING: | |
244 | case CARD_STATE_UNINITIALIZED: | |
245 | case CARD_STATE_SHUTTING_DOWN: | |
246 | /* | |
247 | * dStroy is a term coined by marketing to represent the low level | |
248 | * secure erase. | |
249 | */ | |
250 | case CARD_STATE_DSTROYING: | |
251 | set_capacity(card->gendisk, 0); | |
252 | break; | |
253 | } | |
254 | } | |
255 | ||
256 | static void card_event_handler(struct work_struct *work) | |
257 | { | |
258 | struct rsxx_cardinfo *card; | |
259 | unsigned int state; | |
260 | unsigned long flags; | |
261 | int st; | |
262 | ||
263 | card = container_of(work, struct rsxx_cardinfo, event_work); | |
264 | ||
265 | if (unlikely(card->halt)) | |
266 | return; | |
267 | ||
268 | /* | |
269 | * Enable the interrupt now to avoid any weird race conditions where a | |
270 | * state change might occur while rsxx_get_card_state() is | |
271 | * processing a returned creg cmd. | |
272 | */ | |
273 | spin_lock_irqsave(&card->irq_lock, flags); | |
274 | rsxx_enable_ier_and_isr(card, CR_INTR_EVENT); | |
275 | spin_unlock_irqrestore(&card->irq_lock, flags); | |
276 | ||
277 | st = rsxx_get_card_state(card, &state); | |
278 | if (st) { | |
279 | dev_info(CARD_TO_DEV(card), | |
280 | "Failed reading state after event.\n"); | |
281 | return; | |
282 | } | |
283 | ||
284 | if (card->state != state) | |
285 | card_state_change(card, state); | |
286 | ||
287 | if (card->creg_ctrl.creg_stats.stat & CREG_STAT_LOG_PENDING) | |
288 | rsxx_read_hw_log(card); | |
289 | } | |
290 | ||
8722ff8c | 291 | /*----------------- Card Operations -------------------*/ |
292 | static int card_shutdown(struct rsxx_cardinfo *card) | |
293 | { | |
294 | unsigned int state; | |
295 | signed long start; | |
296 | const int timeout = msecs_to_jiffies(120000); | |
297 | int st; | |
298 | ||
299 | /* We can't issue a shutdown if the card is in a transition state */ | |
300 | start = jiffies; | |
301 | do { | |
302 | st = rsxx_get_card_state(card, &state); | |
303 | if (st) | |
304 | return st; | |
305 | } while (state == CARD_STATE_STARTING && | |
306 | (jiffies - start < timeout)); | |
307 | ||
308 | if (state == CARD_STATE_STARTING) | |
309 | return -ETIMEDOUT; | |
310 | ||
311 | /* Only issue a shutdown if we need to */ | |
312 | if ((state != CARD_STATE_SHUTTING_DOWN) && | |
313 | (state != CARD_STATE_SHUTDOWN)) { | |
314 | st = rsxx_issue_card_cmd(card, CARD_CMD_SHUTDOWN); | |
315 | if (st) | |
316 | return st; | |
317 | } | |
318 | ||
319 | start = jiffies; | |
320 | do { | |
321 | st = rsxx_get_card_state(card, &state); | |
322 | if (st) | |
323 | return st; | |
324 | } while (state != CARD_STATE_SHUTDOWN && | |
325 | (jiffies - start < timeout)); | |
326 | ||
327 | if (state != CARD_STATE_SHUTDOWN) | |
328 | return -ETIMEDOUT; | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
4dcaf472 | 333 | static int rsxx_eeh_frozen(struct pci_dev *dev) |
c95246c3 PK |
334 | { |
335 | struct rsxx_cardinfo *card = pci_get_drvdata(dev); | |
336 | int i; | |
4dcaf472 | 337 | int st; |
c95246c3 | 338 | |
f730e3dc | 339 | dev_warn(&dev->dev, "IBM Flash Adapter PCI: preparing for slot reset.\n"); |
c95246c3 PK |
340 | |
341 | card->eeh_state = 1; | |
342 | rsxx_mask_interrupts(card); | |
343 | ||
344 | /* | |
345 | * We need to guarantee that the write for eeh_state and masking | |
346 | * interrupts does not become reordered. This will prevent a possible | |
347 | * race condition with the EEH code. | |
348 | */ | |
349 | wmb(); | |
350 | ||
351 | pci_disable_device(dev); | |
352 | ||
4dcaf472 PK |
353 | st = rsxx_eeh_save_issued_dmas(card); |
354 | if (st) | |
355 | return st; | |
c95246c3 PK |
356 | |
357 | rsxx_eeh_save_issued_creg(card); | |
358 | ||
359 | for (i = 0; i < card->n_targets; i++) { | |
360 | if (card->ctrl[i].status.buf) | |
361 | pci_free_consistent(card->dev, STATUS_BUFFER_SIZE8, | |
362 | card->ctrl[i].status.buf, | |
363 | card->ctrl[i].status.dma_addr); | |
364 | if (card->ctrl[i].cmd.buf) | |
365 | pci_free_consistent(card->dev, COMMAND_BUFFER_SIZE8, | |
366 | card->ctrl[i].cmd.buf, | |
367 | card->ctrl[i].cmd.dma_addr); | |
368 | } | |
4dcaf472 PK |
369 | |
370 | return 0; | |
c95246c3 PK |
371 | } |
372 | ||
373 | static void rsxx_eeh_failure(struct pci_dev *dev) | |
374 | { | |
375 | struct rsxx_cardinfo *card = pci_get_drvdata(dev); | |
376 | int i; | |
0ab4743e | 377 | int cnt = 0; |
c95246c3 | 378 | |
f730e3dc | 379 | dev_err(&dev->dev, "IBM Flash Adapter PCI: disabling failed card.\n"); |
c95246c3 PK |
380 | |
381 | card->eeh_state = 1; | |
0ab4743e | 382 | card->halt = 1; |
c95246c3 | 383 | |
0ab4743e PK |
384 | for (i = 0; i < card->n_targets; i++) { |
385 | spin_lock_bh(&card->ctrl[i].queue_lock); | |
386 | cnt = rsxx_cleanup_dma_queue(&card->ctrl[i], | |
387 | &card->ctrl[i].queue); | |
388 | spin_unlock_bh(&card->ctrl[i].queue_lock); | |
389 | ||
390 | cnt += rsxx_dma_cancel(&card->ctrl[i]); | |
c95246c3 | 391 | |
0ab4743e PK |
392 | if (cnt) |
393 | dev_info(CARD_TO_DEV(card), | |
394 | "Freed %d queued DMAs on channel %d\n", | |
395 | cnt, card->ctrl[i].id); | |
396 | } | |
c95246c3 PK |
397 | } |
398 | ||
399 | static int rsxx_eeh_fifo_flush_poll(struct rsxx_cardinfo *card) | |
400 | { | |
401 | unsigned int status; | |
402 | int iter = 0; | |
403 | ||
404 | /* We need to wait for the hardware to reset */ | |
405 | while (iter++ < 10) { | |
406 | status = ioread32(card->regmap + PCI_RECONFIG); | |
407 | ||
408 | if (status & RSXX_FLUSH_BUSY) { | |
409 | ssleep(1); | |
410 | continue; | |
411 | } | |
412 | ||
413 | if (status & RSXX_FLUSH_TIMEOUT) | |
414 | dev_warn(CARD_TO_DEV(card), "HW: flash controller timeout\n"); | |
415 | return 0; | |
416 | } | |
417 | ||
418 | /* Hardware failed resetting itself. */ | |
419 | return -1; | |
420 | } | |
421 | ||
422 | static pci_ers_result_t rsxx_error_detected(struct pci_dev *dev, | |
423 | enum pci_channel_state error) | |
424 | { | |
4dcaf472 PK |
425 | int st; |
426 | ||
c95246c3 PK |
427 | if (dev->revision < RSXX_EEH_SUPPORT) |
428 | return PCI_ERS_RESULT_NONE; | |
429 | ||
430 | if (error == pci_channel_io_perm_failure) { | |
431 | rsxx_eeh_failure(dev); | |
432 | return PCI_ERS_RESULT_DISCONNECT; | |
433 | } | |
434 | ||
4dcaf472 PK |
435 | st = rsxx_eeh_frozen(dev); |
436 | if (st) { | |
437 | dev_err(&dev->dev, "Slot reset setup failed\n"); | |
438 | rsxx_eeh_failure(dev); | |
439 | return PCI_ERS_RESULT_DISCONNECT; | |
440 | } | |
441 | ||
c95246c3 PK |
442 | return PCI_ERS_RESULT_NEED_RESET; |
443 | } | |
444 | ||
445 | static pci_ers_result_t rsxx_slot_reset(struct pci_dev *dev) | |
446 | { | |
447 | struct rsxx_cardinfo *card = pci_get_drvdata(dev); | |
448 | unsigned long flags; | |
449 | int i; | |
450 | int st; | |
451 | ||
452 | dev_warn(&dev->dev, | |
f730e3dc | 453 | "IBM Flash Adapter PCI: recovering from slot reset.\n"); |
c95246c3 PK |
454 | |
455 | st = pci_enable_device(dev); | |
456 | if (st) | |
457 | goto failed_hw_setup; | |
458 | ||
459 | pci_set_master(dev); | |
460 | ||
461 | st = rsxx_eeh_fifo_flush_poll(card); | |
462 | if (st) | |
463 | goto failed_hw_setup; | |
464 | ||
465 | rsxx_dma_queue_reset(card); | |
466 | ||
467 | for (i = 0; i < card->n_targets; i++) { | |
468 | st = rsxx_hw_buffers_init(dev, &card->ctrl[i]); | |
469 | if (st) | |
470 | goto failed_hw_buffers_init; | |
471 | } | |
472 | ||
473 | if (card->config_valid) | |
474 | rsxx_dma_configure(card); | |
475 | ||
476 | /* Clears the ISR register from spurious interrupts */ | |
477 | st = ioread32(card->regmap + ISR); | |
478 | ||
479 | card->eeh_state = 0; | |
480 | ||
481 | st = rsxx_eeh_remap_dmas(card); | |
482 | if (st) | |
483 | goto failed_remap_dmas; | |
484 | ||
485 | spin_lock_irqsave(&card->irq_lock, flags); | |
486 | if (card->n_targets & RSXX_MAX_TARGETS) | |
487 | rsxx_enable_ier_and_isr(card, CR_INTR_ALL_G); | |
488 | else | |
489 | rsxx_enable_ier_and_isr(card, CR_INTR_ALL_C); | |
490 | spin_unlock_irqrestore(&card->irq_lock, flags); | |
491 | ||
492 | rsxx_kick_creg_queue(card); | |
493 | ||
494 | for (i = 0; i < card->n_targets; i++) { | |
495 | spin_lock(&card->ctrl[i].queue_lock); | |
496 | if (list_empty(&card->ctrl[i].queue)) { | |
497 | spin_unlock(&card->ctrl[i].queue_lock); | |
498 | continue; | |
499 | } | |
500 | spin_unlock(&card->ctrl[i].queue_lock); | |
501 | ||
502 | queue_work(card->ctrl[i].issue_wq, | |
503 | &card->ctrl[i].issue_dma_work); | |
504 | } | |
505 | ||
f730e3dc | 506 | dev_info(&dev->dev, "IBM Flash Adapter PCI: recovery complete.\n"); |
c95246c3 PK |
507 | |
508 | return PCI_ERS_RESULT_RECOVERED; | |
509 | ||
510 | failed_hw_buffers_init: | |
511 | failed_remap_dmas: | |
512 | for (i = 0; i < card->n_targets; i++) { | |
513 | if (card->ctrl[i].status.buf) | |
514 | pci_free_consistent(card->dev, | |
515 | STATUS_BUFFER_SIZE8, | |
516 | card->ctrl[i].status.buf, | |
517 | card->ctrl[i].status.dma_addr); | |
518 | if (card->ctrl[i].cmd.buf) | |
519 | pci_free_consistent(card->dev, | |
520 | COMMAND_BUFFER_SIZE8, | |
521 | card->ctrl[i].cmd.buf, | |
522 | card->ctrl[i].cmd.dma_addr); | |
523 | } | |
524 | failed_hw_setup: | |
525 | rsxx_eeh_failure(dev); | |
526 | return PCI_ERS_RESULT_DISCONNECT; | |
527 | ||
528 | } | |
529 | ||
8722ff8c | 530 | /*----------------- Driver Initialization & Setup -------------------*/ |
531 | /* Returns: 0 if the driver is compatible with the device | |
532 | -1 if the driver is NOT compatible with the device */ | |
533 | static int rsxx_compatibility_check(struct rsxx_cardinfo *card) | |
534 | { | |
535 | unsigned char pci_rev; | |
536 | ||
537 | pci_read_config_byte(card->dev, PCI_REVISION_ID, &pci_rev); | |
538 | ||
539 | if (pci_rev > RS70_PCI_REV_SUPPORTED) | |
540 | return -1; | |
541 | return 0; | |
542 | } | |
543 | ||
82bed4d5 | 544 | static int rsxx_pci_probe(struct pci_dev *dev, |
8722ff8c | 545 | const struct pci_device_id *id) |
546 | { | |
547 | struct rsxx_cardinfo *card; | |
8722ff8c | 548 | int st; |
fb065cd9 | 549 | unsigned int sync_timeout; |
8722ff8c | 550 | |
551 | dev_info(&dev->dev, "PCI-Flash SSD discovered\n"); | |
552 | ||
553 | card = kzalloc(sizeof(*card), GFP_KERNEL); | |
554 | if (!card) | |
555 | return -ENOMEM; | |
556 | ||
557 | card->dev = dev; | |
558 | pci_set_drvdata(dev, card); | |
559 | ||
560 | do { | |
561 | if (!ida_pre_get(&rsxx_disk_ida, GFP_KERNEL)) { | |
562 | st = -ENOMEM; | |
563 | goto failed_ida_get; | |
564 | } | |
565 | ||
566 | spin_lock(&rsxx_ida_lock); | |
567 | st = ida_get_new(&rsxx_disk_ida, &card->disk_id); | |
568 | spin_unlock(&rsxx_ida_lock); | |
569 | } while (st == -EAGAIN); | |
570 | ||
571 | if (st) | |
572 | goto failed_ida_get; | |
573 | ||
574 | st = pci_enable_device(dev); | |
575 | if (st) | |
576 | goto failed_enable; | |
577 | ||
578 | pci_set_master(dev); | |
579 | pci_set_dma_max_seg_size(dev, RSXX_HW_BLK_SIZE); | |
580 | ||
581 | st = pci_set_dma_mask(dev, DMA_BIT_MASK(64)); | |
582 | if (st) { | |
583 | dev_err(CARD_TO_DEV(card), | |
584 | "No usable DMA configuration,aborting\n"); | |
585 | goto failed_dma_mask; | |
586 | } | |
587 | ||
588 | st = pci_request_regions(dev, DRIVER_NAME); | |
589 | if (st) { | |
590 | dev_err(CARD_TO_DEV(card), | |
591 | "Failed to request memory region\n"); | |
592 | goto failed_request_regions; | |
593 | } | |
594 | ||
595 | if (pci_resource_len(dev, 0) == 0) { | |
596 | dev_err(CARD_TO_DEV(card), "BAR0 has length 0!\n"); | |
597 | st = -ENOMEM; | |
598 | goto failed_iomap; | |
599 | } | |
600 | ||
601 | card->regmap = pci_iomap(dev, 0, 0); | |
602 | if (!card->regmap) { | |
603 | dev_err(CARD_TO_DEV(card), "Failed to map BAR0\n"); | |
604 | st = -ENOMEM; | |
605 | goto failed_iomap; | |
606 | } | |
607 | ||
608 | spin_lock_init(&card->irq_lock); | |
609 | card->halt = 0; | |
c95246c3 | 610 | card->eeh_state = 0; |
8722ff8c | 611 | |
c206c709 | 612 | spin_lock_irq(&card->irq_lock); |
8722ff8c | 613 | rsxx_disable_ier_and_isr(card, CR_INTR_ALL); |
c206c709 | 614 | spin_unlock_irq(&card->irq_lock); |
8722ff8c | 615 | |
616 | if (!force_legacy) { | |
617 | st = pci_enable_msi(dev); | |
618 | if (st) | |
619 | dev_warn(CARD_TO_DEV(card), | |
620 | "Failed to enable MSI\n"); | |
621 | } | |
622 | ||
623 | st = request_irq(dev->irq, rsxx_isr, IRQF_DISABLED | IRQF_SHARED, | |
624 | DRIVER_NAME, card); | |
625 | if (st) { | |
626 | dev_err(CARD_TO_DEV(card), | |
627 | "Failed requesting IRQ%d\n", dev->irq); | |
628 | goto failed_irq; | |
629 | } | |
630 | ||
631 | /************* Setup Processor Command Interface *************/ | |
a3299ab1 PK |
632 | st = rsxx_creg_setup(card); |
633 | if (st) { | |
634 | dev_err(CARD_TO_DEV(card), "Failed to setup creg interface.\n"); | |
635 | goto failed_creg_setup; | |
636 | } | |
8722ff8c | 637 | |
c206c709 | 638 | spin_lock_irq(&card->irq_lock); |
8722ff8c | 639 | rsxx_enable_ier_and_isr(card, CR_INTR_CREG); |
c206c709 | 640 | spin_unlock_irq(&card->irq_lock); |
8722ff8c | 641 | |
642 | st = rsxx_compatibility_check(card); | |
643 | if (st) { | |
644 | dev_warn(CARD_TO_DEV(card), | |
645 | "Incompatible driver detected. Please update the driver.\n"); | |
646 | st = -EINVAL; | |
647 | goto failed_compatiblity_check; | |
648 | } | |
649 | ||
650 | /************* Load Card Config *************/ | |
651 | st = rsxx_load_config(card); | |
652 | if (st) | |
653 | dev_err(CARD_TO_DEV(card), | |
654 | "Failed loading card config\n"); | |
655 | ||
656 | /************* Setup DMA Engine *************/ | |
657 | st = rsxx_get_num_targets(card, &card->n_targets); | |
658 | if (st) | |
659 | dev_info(CARD_TO_DEV(card), | |
660 | "Failed reading the number of DMA targets\n"); | |
661 | ||
662 | card->ctrl = kzalloc(card->n_targets * sizeof(*card->ctrl), GFP_KERNEL); | |
663 | if (!card->ctrl) { | |
664 | st = -ENOMEM; | |
665 | goto failed_dma_setup; | |
666 | } | |
667 | ||
668 | st = rsxx_dma_setup(card); | |
669 | if (st) { | |
670 | dev_info(CARD_TO_DEV(card), | |
671 | "Failed to setup DMA engine\n"); | |
672 | goto failed_dma_setup; | |
673 | } | |
674 | ||
675 | /************* Setup Card Event Handler *************/ | |
a3299ab1 PK |
676 | card->event_wq = create_singlethread_workqueue(DRIVER_NAME"_event"); |
677 | if (!card->event_wq) { | |
678 | dev_err(CARD_TO_DEV(card), "Failed card event setup.\n"); | |
679 | goto failed_event_handler; | |
680 | } | |
681 | ||
8722ff8c | 682 | INIT_WORK(&card->event_work, card_event_handler); |
683 | ||
684 | st = rsxx_setup_dev(card); | |
685 | if (st) | |
686 | goto failed_create_dev; | |
687 | ||
688 | rsxx_get_card_state(card, &card->state); | |
689 | ||
690 | dev_info(CARD_TO_DEV(card), | |
691 | "card state: %s\n", | |
692 | rsxx_card_state_to_str(card->state)); | |
693 | ||
694 | /* | |
695 | * Now that the DMA Engine and devices have been setup, | |
696 | * we can enable the event interrupt(it kicks off actions in | |
697 | * those layers so we couldn't enable it right away.) | |
698 | */ | |
c206c709 | 699 | spin_lock_irq(&card->irq_lock); |
8722ff8c | 700 | rsxx_enable_ier_and_isr(card, CR_INTR_EVENT); |
c206c709 | 701 | spin_unlock_irq(&card->irq_lock); |
8722ff8c | 702 | |
703 | if (card->state == CARD_STATE_SHUTDOWN) { | |
704 | st = rsxx_issue_card_cmd(card, CARD_CMD_STARTUP); | |
705 | if (st) | |
706 | dev_crit(CARD_TO_DEV(card), | |
707 | "Failed issuing card startup\n"); | |
fb065cd9 PK |
708 | if (sync_start) { |
709 | sync_timeout = SYNC_START_TIMEOUT; | |
710 | ||
711 | dev_info(CARD_TO_DEV(card), | |
712 | "Waiting for card to startup\n"); | |
713 | ||
714 | do { | |
715 | ssleep(1); | |
716 | sync_timeout--; | |
717 | ||
718 | rsxx_get_card_state(card, &card->state); | |
719 | } while (sync_timeout && | |
720 | (card->state == CARD_STATE_STARTING)); | |
721 | ||
722 | if (card->state == CARD_STATE_STARTING) { | |
723 | dev_warn(CARD_TO_DEV(card), | |
724 | "Card startup timed out\n"); | |
725 | card->size8 = 0; | |
726 | } else { | |
727 | dev_info(CARD_TO_DEV(card), | |
728 | "card state: %s\n", | |
729 | rsxx_card_state_to_str(card->state)); | |
730 | st = rsxx_get_card_size8(card, &card->size8); | |
731 | if (st) | |
732 | card->size8 = 0; | |
733 | } | |
734 | } | |
8722ff8c | 735 | } else if (card->state == CARD_STATE_GOOD || |
736 | card->state == CARD_STATE_RD_ONLY_FAULT) { | |
737 | st = rsxx_get_card_size8(card, &card->size8); | |
738 | if (st) | |
739 | card->size8 = 0; | |
740 | } | |
741 | ||
742 | rsxx_attach_dev(card); | |
743 | ||
744 | return 0; | |
745 | ||
746 | failed_create_dev: | |
a3299ab1 PK |
747 | destroy_workqueue(card->event_wq); |
748 | card->event_wq = NULL; | |
749 | failed_event_handler: | |
8722ff8c | 750 | rsxx_dma_destroy(card); |
751 | failed_dma_setup: | |
752 | failed_compatiblity_check: | |
a3299ab1 PK |
753 | destroy_workqueue(card->creg_ctrl.creg_wq); |
754 | card->creg_ctrl.creg_wq = NULL; | |
755 | failed_creg_setup: | |
c206c709 | 756 | spin_lock_irq(&card->irq_lock); |
8722ff8c | 757 | rsxx_disable_ier_and_isr(card, CR_INTR_ALL); |
c206c709 | 758 | spin_unlock_irq(&card->irq_lock); |
8722ff8c | 759 | free_irq(dev->irq, card); |
760 | if (!force_legacy) | |
761 | pci_disable_msi(dev); | |
762 | failed_irq: | |
763 | pci_iounmap(dev, card->regmap); | |
764 | failed_iomap: | |
765 | pci_release_regions(dev); | |
766 | failed_request_regions: | |
767 | failed_dma_mask: | |
768 | pci_disable_device(dev); | |
769 | failed_enable: | |
770 | spin_lock(&rsxx_ida_lock); | |
771 | ida_remove(&rsxx_disk_ida, card->disk_id); | |
772 | spin_unlock(&rsxx_ida_lock); | |
773 | failed_ida_get: | |
774 | kfree(card); | |
775 | ||
776 | return st; | |
777 | } | |
778 | ||
82bed4d5 | 779 | static void rsxx_pci_remove(struct pci_dev *dev) |
8722ff8c | 780 | { |
781 | struct rsxx_cardinfo *card = pci_get_drvdata(dev); | |
782 | unsigned long flags; | |
783 | int st; | |
784 | int i; | |
785 | ||
786 | if (!card) | |
787 | return; | |
788 | ||
789 | dev_info(CARD_TO_DEV(card), | |
790 | "Removing PCI-Flash SSD.\n"); | |
791 | ||
792 | rsxx_detach_dev(card); | |
793 | ||
794 | for (i = 0; i < card->n_targets; i++) { | |
795 | spin_lock_irqsave(&card->irq_lock, flags); | |
796 | rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i)); | |
797 | spin_unlock_irqrestore(&card->irq_lock, flags); | |
798 | } | |
799 | ||
800 | st = card_shutdown(card); | |
801 | if (st) | |
802 | dev_crit(CARD_TO_DEV(card), "Shutdown failed!\n"); | |
803 | ||
804 | /* Sync outstanding event handlers. */ | |
805 | spin_lock_irqsave(&card->irq_lock, flags); | |
806 | rsxx_disable_ier_and_isr(card, CR_INTR_EVENT); | |
807 | spin_unlock_irqrestore(&card->irq_lock, flags); | |
808 | ||
8722ff8c | 809 | cancel_work_sync(&card->event_work); |
810 | ||
811 | rsxx_destroy_dev(card); | |
812 | rsxx_dma_destroy(card); | |
813 | ||
814 | spin_lock_irqsave(&card->irq_lock, flags); | |
815 | rsxx_disable_ier_and_isr(card, CR_INTR_ALL); | |
816 | spin_unlock_irqrestore(&card->irq_lock, flags); | |
1ebfd109 PK |
817 | |
818 | /* Prevent work_structs from re-queuing themselves. */ | |
819 | card->halt = 1; | |
820 | ||
8722ff8c | 821 | free_irq(dev->irq, card); |
822 | ||
823 | if (!force_legacy) | |
824 | pci_disable_msi(dev); | |
825 | ||
826 | rsxx_creg_destroy(card); | |
827 | ||
828 | pci_iounmap(dev, card->regmap); | |
829 | ||
830 | pci_disable_device(dev); | |
831 | pci_release_regions(dev); | |
832 | ||
833 | kfree(card); | |
834 | } | |
835 | ||
836 | static int rsxx_pci_suspend(struct pci_dev *dev, pm_message_t state) | |
837 | { | |
838 | /* We don't support suspend at this time. */ | |
839 | return -ENOSYS; | |
840 | } | |
841 | ||
842 | static void rsxx_pci_shutdown(struct pci_dev *dev) | |
843 | { | |
844 | struct rsxx_cardinfo *card = pci_get_drvdata(dev); | |
845 | unsigned long flags; | |
846 | int i; | |
847 | ||
848 | if (!card) | |
849 | return; | |
850 | ||
851 | dev_info(CARD_TO_DEV(card), "Shutting down PCI-Flash SSD.\n"); | |
852 | ||
853 | rsxx_detach_dev(card); | |
854 | ||
855 | for (i = 0; i < card->n_targets; i++) { | |
856 | spin_lock_irqsave(&card->irq_lock, flags); | |
857 | rsxx_disable_ier_and_isr(card, CR_INTR_DMA(i)); | |
858 | spin_unlock_irqrestore(&card->irq_lock, flags); | |
859 | } | |
860 | ||
861 | card_shutdown(card); | |
862 | } | |
863 | ||
c95246c3 PK |
864 | static const struct pci_error_handlers rsxx_err_handler = { |
865 | .error_detected = rsxx_error_detected, | |
866 | .slot_reset = rsxx_slot_reset, | |
867 | }; | |
868 | ||
8722ff8c | 869 | static DEFINE_PCI_DEVICE_TABLE(rsxx_pci_ids) = { |
9bb3c446 PK |
870 | {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS70_FLASH)}, |
871 | {PCI_DEVICE(PCI_VENDOR_ID_IBM, PCI_DEVICE_ID_FS80_FLASH)}, | |
8722ff8c | 872 | {0,}, |
873 | }; | |
874 | ||
875 | MODULE_DEVICE_TABLE(pci, rsxx_pci_ids); | |
876 | ||
877 | static struct pci_driver rsxx_pci_driver = { | |
878 | .name = DRIVER_NAME, | |
879 | .id_table = rsxx_pci_ids, | |
880 | .probe = rsxx_pci_probe, | |
82bed4d5 | 881 | .remove = rsxx_pci_remove, |
8722ff8c | 882 | .suspend = rsxx_pci_suspend, |
883 | .shutdown = rsxx_pci_shutdown, | |
c95246c3 | 884 | .err_handler = &rsxx_err_handler, |
8722ff8c | 885 | }; |
886 | ||
887 | static int __init rsxx_core_init(void) | |
888 | { | |
889 | int st; | |
890 | ||
891 | st = rsxx_dev_init(); | |
892 | if (st) | |
893 | return st; | |
894 | ||
895 | st = rsxx_dma_init(); | |
896 | if (st) | |
897 | goto dma_init_failed; | |
898 | ||
899 | st = rsxx_creg_init(); | |
900 | if (st) | |
901 | goto creg_init_failed; | |
902 | ||
903 | return pci_register_driver(&rsxx_pci_driver); | |
904 | ||
905 | creg_init_failed: | |
906 | rsxx_dma_cleanup(); | |
907 | dma_init_failed: | |
908 | rsxx_dev_cleanup(); | |
909 | ||
910 | return st; | |
911 | } | |
912 | ||
913 | static void __exit rsxx_core_cleanup(void) | |
914 | { | |
915 | pci_unregister_driver(&rsxx_pci_driver); | |
916 | rsxx_creg_cleanup(); | |
917 | rsxx_dma_cleanup(); | |
918 | rsxx_dev_cleanup(); | |
919 | } | |
920 | ||
921 | module_init(rsxx_core_init); | |
922 | module_exit(rsxx_core_cleanup); |