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88523a61 SB |
1 | /* |
2 | * mtip32xx.h - Header file for the P320 SSD Block Driver | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #ifndef __MTIP32XX_H__ | |
22 | #define __MTIP32XX_H__ | |
23 | ||
24 | #include <linux/spinlock.h> | |
25 | #include <linux/rwsem.h> | |
26 | #include <linux/ata.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/genhd.h> | |
88523a61 SB |
29 | |
30 | /* Offset of Subsystem Device ID in pci confoguration space */ | |
31 | #define PCI_SUBSYSTEM_DEVICEID 0x2E | |
32 | ||
33 | /* offset of Device Control register in PCIe extended capabilites space */ | |
34 | #define PCIE_CONFIG_EXT_DEVICE_CONTROL_OFFSET 0x48 | |
35 | ||
4453bc88 | 36 | /* check for erase mode support during secure erase */ |
4b9e8845 | 37 | #define MTIP_SEC_ERASE_MODE 0x2 |
4453bc88 | 38 | |
c74b0f58 AT |
39 | /* # of times to retry timed out/failed IOs */ |
40 | #define MTIP_MAX_RETRIES 2 | |
88523a61 SB |
41 | |
42 | /* Various timeout values in ms */ | |
9b204fbf AT |
43 | #define MTIP_NCQ_CMD_TIMEOUT_MS 15000 |
44 | #define MTIP_IOCTL_CMD_TIMEOUT_MS 5000 | |
45 | #define MTIP_INT_CMD_TIMEOUT_MS 5000 | |
46 | #define MTIP_QUIESCE_IO_TIMEOUT_MS (MTIP_NCQ_CMD_TIMEOUT_MS * \ | |
47 | (MTIP_MAX_RETRIES + 1)) | |
88523a61 SB |
48 | |
49 | /* check for timeouts every 500ms */ | |
50 | #define MTIP_TIMEOUT_CHECK_PERIOD 500 | |
51 | ||
52 | /* ftl rebuild */ | |
53 | #define MTIP_FTL_REBUILD_OFFSET 142 | |
60ec0eec | 54 | #define MTIP_FTL_REBUILD_MAGIC 0xED51 |
88523a61 SB |
55 | #define MTIP_FTL_REBUILD_TIMEOUT_MS 2400000 |
56 | ||
2077d947 | 57 | /* unaligned IO handling */ |
5a98268e | 58 | #define MTIP_MAX_UNALIGNED_SLOTS 2 |
2077d947 | 59 | |
88523a61 | 60 | /* Macro to extract the tag bit number from a tag value. */ |
60ec0eec | 61 | #define MTIP_TAG_BIT(tag) (tag & 0x1F) |
88523a61 SB |
62 | |
63 | /* | |
64 | * Macro to extract the tag index from a tag value. The index | |
65 | * is used to access the correct s_active/Command Issue register based | |
66 | * on the tag value. | |
67 | */ | |
68 | #define MTIP_TAG_INDEX(tag) (tag >> 5) | |
69 | ||
70 | /* | |
71 | * Maximum number of scatter gather entries | |
72 | * a single command may have. | |
73 | */ | |
188b9f49 | 74 | #define MTIP_MAX_SG 504 |
88523a61 SB |
75 | |
76 | /* | |
77 | * Maximum number of slot groups (Command Issue & s_active registers) | |
78 | * NOTE: This is the driver maximum; check dd->slot_groups for actual value. | |
79 | */ | |
80 | #define MTIP_MAX_SLOT_GROUPS 8 | |
81 | ||
82 | /* Internal command tag. */ | |
83 | #define MTIP_TAG_INTERNAL 0 | |
84 | ||
85 | /* Micron Vendor ID & P320x SSD Device ID */ | |
86 | #define PCI_VENDOR_ID_MICRON 0x1344 | |
1a131458 AT |
87 | #define P320H_DEVICE_ID 0x5150 |
88 | #define P320M_DEVICE_ID 0x5151 | |
89 | #define P320S_DEVICE_ID 0x5152 | |
90 | #define P325M_DEVICE_ID 0x5153 | |
91 | #define P420H_DEVICE_ID 0x5160 | |
92 | #define P420M_DEVICE_ID 0x5161 | |
93 | #define P425M_DEVICE_ID 0x5163 | |
88523a61 SB |
94 | |
95 | /* Driver name and version strings */ | |
96 | #define MTIP_DRV_NAME "mtip32xx" | |
5eb9291c | 97 | #define MTIP_DRV_VERSION "1.3.1" |
88523a61 SB |
98 | |
99 | /* Maximum number of minor device numbers per device. */ | |
100 | #define MTIP_MAX_MINORS 16 | |
101 | ||
102 | /* Maximum number of supported command slots. */ | |
103 | #define MTIP_MAX_COMMAND_SLOTS (MTIP_MAX_SLOT_GROUPS * 32) | |
104 | ||
105 | /* | |
106 | * Per-tag bitfield size in longs. | |
107 | * Linux bit manipulation functions | |
108 | * (i.e. test_and_set_bit, find_next_zero_bit) | |
109 | * manipulate memory in longs, so we try to make the math work. | |
110 | * take the slot groups and find the number of longs, rounding up. | |
111 | * Careful! i386 and x86_64 use different size longs! | |
112 | */ | |
113 | #define U32_PER_LONG (sizeof(long) / sizeof(u32)) | |
114 | #define SLOTBITS_IN_LONGS ((MTIP_MAX_SLOT_GROUPS + \ | |
115 | (U32_PER_LONG-1))/U32_PER_LONG) | |
116 | ||
117 | /* BAR number used to access the HBA registers. */ | |
118 | #define MTIP_ABAR 5 | |
119 | ||
88523a61 SB |
120 | #ifdef DEBUG |
121 | #define dbg_printk(format, arg...) \ | |
122 | printk(pr_fmt(format), ##arg); | |
123 | #else | |
124 | #define dbg_printk(format, arg...) | |
125 | #endif | |
126 | ||
7b421d24 AT |
127 | #define MTIP_DFS_MAX_BUF_SIZE 1024 |
128 | ||
60ec0eec AT |
129 | #define __force_bit2int (unsigned int __force) |
130 | ||
8ce80093 AT |
131 | enum { |
132 | /* below are bit numbers in 'flags' defined in mtip_port */ | |
133 | MTIP_PF_IC_ACTIVE_BIT = 0, /* pio/ioctl */ | |
134 | MTIP_PF_EH_ACTIVE_BIT = 1, /* error handling */ | |
135 | MTIP_PF_SE_ACTIVE_BIT = 2, /* secure erase */ | |
136 | MTIP_PF_DM_ACTIVE_BIT = 3, /* download microcde */ | |
0caff003 AT |
137 | MTIP_PF_PAUSE_IO = ((1 << MTIP_PF_IC_ACTIVE_BIT) | |
138 | (1 << MTIP_PF_EH_ACTIVE_BIT) | | |
139 | (1 << MTIP_PF_SE_ACTIVE_BIT) | | |
8ce80093 AT |
140 | (1 << MTIP_PF_DM_ACTIVE_BIT)), |
141 | ||
142 | MTIP_PF_SVC_THD_ACTIVE_BIT = 4, | |
143 | MTIP_PF_ISSUE_CMDS_BIT = 5, | |
144 | MTIP_PF_REBUILD_BIT = 6, | |
145 | MTIP_PF_SVC_THD_STOP_BIT = 8, | |
146 | ||
147 | /* below are bit numbers in 'dd_flag' defined in driver_data */ | |
12a166c9 | 148 | MTIP_DDF_SEC_LOCK_BIT = 0, |
8ce80093 AT |
149 | MTIP_DDF_REMOVE_PENDING_BIT = 1, |
150 | MTIP_DDF_OVER_TEMP_BIT = 2, | |
151 | MTIP_DDF_WRITE_PROTECT_BIT = 3, | |
8ce80093 AT |
152 | MTIP_DDF_CLEANUP_BIT = 5, |
153 | MTIP_DDF_RESUME_BIT = 6, | |
154 | MTIP_DDF_INIT_DONE_BIT = 7, | |
155 | MTIP_DDF_REBUILD_FAILED_BIT = 8, | |
8f8b8995 AT |
156 | |
157 | MTIP_DDF_STOP_IO = ((1 << MTIP_DDF_REMOVE_PENDING_BIT) | | |
158 | (1 << MTIP_DDF_SEC_LOCK_BIT) | | |
159 | (1 << MTIP_DDF_OVER_TEMP_BIT) | | |
160 | (1 << MTIP_DDF_WRITE_PROTECT_BIT) | | |
161 | (1 << MTIP_DDF_REBUILD_FAILED_BIT)), | |
162 | ||
8ce80093 | 163 | }; |
f6587217 | 164 | |
836413e8 | 165 | struct smart_attr { |
f6587217 AT |
166 | u8 attr_id; |
167 | u16 flags; | |
168 | u8 cur; | |
169 | u8 worst; | |
170 | u32 data; | |
171 | u8 res[3]; | |
836413e8 | 172 | } __packed; |
f6587217 | 173 | |
16c906e5 AT |
174 | struct mtip_work { |
175 | struct work_struct work; | |
176 | void *port; | |
177 | int cpu_binding; | |
178 | u32 completed; | |
179 | } ____cacheline_aligned_in_smp; | |
180 | ||
181 | #define DEFINE_HANDLER(group) \ | |
182 | void mtip_workq_sdbf##group(struct work_struct *work) \ | |
183 | { \ | |
184 | struct mtip_work *w = (struct mtip_work *) work; \ | |
185 | mtip_workq_sdbfx(w->port, group, w->completed); \ | |
186 | } | |
187 | ||
15283469 AT |
188 | #define MTIP_TRIM_TIMEOUT_MS 240000 |
189 | #define MTIP_MAX_TRIM_ENTRIES 8 | |
0caff003 | 190 | #define MTIP_MAX_TRIM_ENTRY_LEN 0xfff8 |
15283469 AT |
191 | |
192 | struct mtip_trim_entry { | |
193 | u32 lba; /* starting lba of region */ | |
194 | u16 rsvd; /* unused */ | |
195 | u16 range; /* # of 512b blocks to trim */ | |
196 | } __packed; | |
197 | ||
198 | struct mtip_trim { | |
199 | /* Array of regions to trim */ | |
200 | struct mtip_trim_entry entry[MTIP_MAX_TRIM_ENTRIES]; | |
201 | } __packed; | |
202 | ||
88523a61 SB |
203 | /* Register Frame Information Structure (FIS), host to device. */ |
204 | struct host_to_dev_fis { | |
205 | /* | |
206 | * FIS type. | |
207 | * - 27h Register FIS, host to device. | |
208 | * - 34h Register FIS, device to host. | |
209 | * - 39h DMA Activate FIS, device to host. | |
210 | * - 41h DMA Setup FIS, bi-directional. | |
211 | * - 46h Data FIS, bi-directional. | |
212 | * - 58h BIST Activate FIS, bi-directional. | |
213 | * - 5Fh PIO Setup FIS, device to host. | |
214 | * - A1h Set Device Bits FIS, device to host. | |
215 | */ | |
216 | unsigned char type; | |
217 | unsigned char opts; | |
218 | unsigned char command; | |
219 | unsigned char features; | |
220 | ||
221 | union { | |
222 | unsigned char lba_low; | |
223 | unsigned char sector; | |
224 | }; | |
225 | union { | |
226 | unsigned char lba_mid; | |
227 | unsigned char cyl_low; | |
228 | }; | |
229 | union { | |
230 | unsigned char lba_hi; | |
231 | unsigned char cyl_hi; | |
232 | }; | |
233 | union { | |
234 | unsigned char device; | |
235 | unsigned char head; | |
236 | }; | |
237 | ||
238 | union { | |
239 | unsigned char lba_low_ex; | |
240 | unsigned char sector_ex; | |
241 | }; | |
242 | union { | |
243 | unsigned char lba_mid_ex; | |
244 | unsigned char cyl_low_ex; | |
245 | }; | |
246 | union { | |
247 | unsigned char lba_hi_ex; | |
248 | unsigned char cyl_hi_ex; | |
249 | }; | |
250 | unsigned char features_ex; | |
251 | ||
252 | unsigned char sect_count; | |
253 | unsigned char sect_cnt_ex; | |
254 | unsigned char res2; | |
255 | unsigned char control; | |
256 | ||
257 | unsigned int res3; | |
258 | }; | |
259 | ||
260 | /* Command header structure. */ | |
261 | struct mtip_cmd_hdr { | |
262 | /* | |
263 | * Command options. | |
264 | * - Bits 31:16 Number of PRD entries. | |
265 | * - Bits 15:8 Unused in this implementation. | |
266 | * - Bit 7 Prefetch bit, informs the drive to prefetch PRD entries. | |
267 | * - Bit 6 Write bit, should be set when writing data to the device. | |
268 | * - Bit 5 Unused in this implementation. | |
269 | * - Bits 4:0 Length of the command FIS in DWords (DWord = 4 bytes). | |
270 | */ | |
271 | unsigned int opts; | |
272 | /* This field is unsed when using NCQ. */ | |
273 | union { | |
274 | unsigned int byte_count; | |
275 | unsigned int status; | |
276 | }; | |
277 | /* | |
278 | * Lower 32 bits of the command table address associated with this | |
279 | * header. The command table addresses must be 128 byte aligned. | |
280 | */ | |
281 | unsigned int ctba; | |
282 | /* | |
283 | * If 64 bit addressing is used this field is the upper 32 bits | |
284 | * of the command table address associated with this command. | |
285 | */ | |
286 | unsigned int ctbau; | |
287 | /* Reserved and unused. */ | |
288 | unsigned int res[4]; | |
289 | }; | |
290 | ||
291 | /* Command scatter gather structure (PRD). */ | |
292 | struct mtip_cmd_sg { | |
293 | /* | |
294 | * Low 32 bits of the data buffer address. For P320 this | |
295 | * address must be 8 byte aligned signified by bits 2:0 being | |
296 | * set to 0. | |
297 | */ | |
298 | unsigned int dba; | |
299 | /* | |
300 | * When 64 bit addressing is used this field is the upper | |
301 | * 32 bits of the data buffer address. | |
302 | */ | |
303 | unsigned int dba_upper; | |
304 | /* Unused. */ | |
305 | unsigned int reserved; | |
306 | /* | |
307 | * Bit 31: interrupt when this data block has been transferred. | |
308 | * Bits 30..22: reserved | |
309 | * Bits 21..0: byte count (minus 1). For P320 the byte count must be | |
310 | * 8 byte aligned signified by bits 2:0 being set to 1. | |
311 | */ | |
312 | unsigned int info; | |
313 | }; | |
314 | struct mtip_port; | |
315 | ||
316 | /* Structure used to describe a command. */ | |
317 | struct mtip_cmd { | |
318 | ||
319 | struct mtip_cmd_hdr *command_header; /* ptr to command header entry */ | |
320 | ||
321 | dma_addr_t command_header_dma; /* corresponding physical address */ | |
322 | ||
323 | void *command; /* ptr to command table entry */ | |
324 | ||
325 | dma_addr_t command_dma; /* corresponding physical address */ | |
326 | ||
327 | void *comp_data; /* data passed to completion function comp_func() */ | |
328 | /* | |
329 | * Completion function called by the ISR upon completion of | |
330 | * a command. | |
331 | */ | |
332 | void (*comp_func)(struct mtip_port *port, | |
333 | int tag, | |
ffc771b3 | 334 | struct mtip_cmd *cmd, |
88523a61 | 335 | int status); |
88523a61 SB |
336 | |
337 | int scatter_ents; /* Number of scatter list entries used */ | |
338 | ||
2077d947 AT |
339 | int unaligned; /* command is unaligned on 4k boundary */ |
340 | ||
88523a61 SB |
341 | struct scatterlist sg[MTIP_MAX_SG]; /* Scatter list entries */ |
342 | ||
343 | int retries; /* The number of retries left for this command. */ | |
344 | ||
345 | int direction; /* Data transfer direction */ | |
88523a61 SB |
346 | }; |
347 | ||
348 | /* Structure used to describe a port. */ | |
349 | struct mtip_port { | |
350 | /* Pointer back to the driver data for this port. */ | |
351 | struct driver_data *dd; | |
352 | /* | |
353 | * Used to determine if the data pointed to by the | |
354 | * identify field is valid. | |
355 | */ | |
356 | unsigned long identify_valid; | |
357 | /* Base address of the memory mapped IO for the port. */ | |
358 | void __iomem *mmio; | |
359 | /* Array of pointers to the memory mapped s_active registers. */ | |
360 | void __iomem *s_active[MTIP_MAX_SLOT_GROUPS]; | |
60ec0eec | 361 | /* Array of pointers to the memory mapped completed registers. */ |
88523a61 SB |
362 | void __iomem *completed[MTIP_MAX_SLOT_GROUPS]; |
363 | /* Array of pointers to the memory mapped Command Issue registers. */ | |
364 | void __iomem *cmd_issue[MTIP_MAX_SLOT_GROUPS]; | |
365 | /* | |
366 | * Pointer to the beginning of the command header memory as used | |
367 | * by the driver. | |
368 | */ | |
369 | void *command_list; | |
370 | /* | |
371 | * Pointer to the beginning of the command header memory as used | |
372 | * by the DMA. | |
373 | */ | |
374 | dma_addr_t command_list_dma; | |
375 | /* | |
376 | * Pointer to the beginning of the RX FIS memory as used | |
377 | * by the driver. | |
378 | */ | |
379 | void *rxfis; | |
380 | /* | |
381 | * Pointer to the beginning of the RX FIS memory as used | |
382 | * by the DMA. | |
383 | */ | |
384 | dma_addr_t rxfis_dma; | |
385 | /* | |
188b9f49 | 386 | * Pointer to the DMA region for RX Fis, Identify, RLE10, and SMART |
88523a61 | 387 | */ |
188b9f49 | 388 | void *block1; |
88523a61 | 389 | /* |
188b9f49 | 390 | * DMA address of region for RX Fis, Identify, RLE10, and SMART |
88523a61 | 391 | */ |
188b9f49 | 392 | dma_addr_t block1_dma; |
88523a61 SB |
393 | /* |
394 | * Pointer to the beginning of the identify data memory as used | |
395 | * by the driver. | |
396 | */ | |
397 | u16 *identify; | |
398 | /* | |
399 | * Pointer to the beginning of the identify data memory as used | |
400 | * by the DMA. | |
401 | */ | |
402 | dma_addr_t identify_dma; | |
403 | /* | |
404 | * Pointer to the beginning of a sector buffer that is used | |
405 | * by the driver when issuing internal commands. | |
406 | */ | |
407 | u16 *sector_buffer; | |
408 | /* | |
409 | * Pointer to the beginning of a sector buffer that is used | |
410 | * by the DMA when the driver issues internal commands. | |
411 | */ | |
412 | dma_addr_t sector_buffer_dma; | |
a7806fad | 413 | |
f6587217 AT |
414 | u16 *log_buf; |
415 | dma_addr_t log_buf_dma; | |
416 | ||
417 | u8 *smart_buf; | |
418 | dma_addr_t smart_buf_dma; | |
419 | ||
60ec0eec AT |
420 | /* |
421 | * used to queue commands when an internal command is in progress | |
422 | * or error handling is active | |
423 | */ | |
424 | unsigned long cmds_to_issue[SLOTBITS_IN_LONGS]; | |
60ec0eec AT |
425 | /* Used by mtip_service_thread to wait for an event */ |
426 | wait_queue_head_t svc_wait; | |
427 | /* | |
428 | * indicates the state of the port. Also, helps the service thread | |
429 | * to determine its action on wake up. | |
430 | */ | |
431 | unsigned long flags; | |
88523a61 SB |
432 | /* |
433 | * Timer used to complete commands that have been active for too long. | |
434 | */ | |
c74b0f58 | 435 | unsigned long ic_pause_timer; |
2077d947 AT |
436 | |
437 | /* Semaphore to control queue depth of unaligned IOs */ | |
438 | struct semaphore cmd_slot_unal; | |
439 | ||
88523a61 | 440 | /* Spinlock for working around command-issue bug. */ |
16c906e5 | 441 | spinlock_t cmd_issue_lock[MTIP_MAX_SLOT_GROUPS]; |
88523a61 SB |
442 | }; |
443 | ||
444 | /* | |
445 | * Driver private data structure. | |
446 | * | |
447 | * One structure is allocated per probed device. | |
448 | */ | |
449 | struct driver_data { | |
450 | void __iomem *mmio; /* Base address of the HBA registers. */ | |
451 | ||
452 | int major; /* Major device number. */ | |
453 | ||
454 | int instance; /* Instance number. First device probed is 0, ... */ | |
455 | ||
88523a61 SB |
456 | struct gendisk *disk; /* Pointer to our gendisk structure. */ |
457 | ||
458 | struct pci_dev *pdev; /* Pointer to the PCI device structure. */ | |
459 | ||
460 | struct request_queue *queue; /* Our request queue. */ | |
88523a61 | 461 | |
ffc771b3 JA |
462 | struct blk_mq_tag_set tags; /* blk_mq tags */ |
463 | ||
88523a61 SB |
464 | struct mtip_port *port; /* Pointer to the port data structure. */ |
465 | ||
88523a61 SB |
466 | unsigned product_type; /* magic value declaring the product type */ |
467 | ||
468 | unsigned slot_groups; /* number of slot groups the product supports */ | |
469 | ||
88523a61 SB |
470 | unsigned long index; /* Index to determine the disk name */ |
471 | ||
45038367 | 472 | unsigned long dd_flag; /* NOTE: use atomic bit operations on this */ |
88523a61 | 473 | |
60ec0eec | 474 | struct task_struct *mtip_svc_handler; /* task_struct of svc thd */ |
7b421d24 AT |
475 | |
476 | struct dentry *dfs_node; | |
16c906e5 | 477 | |
15283469 AT |
478 | bool trim_supp; /* flag indicating trim support */ |
479 | ||
8f8b8995 AT |
480 | bool sr; |
481 | ||
16c906e5 AT |
482 | int numa_node; /* NUMA support */ |
483 | ||
484 | char workq_name[32]; | |
485 | ||
486 | struct workqueue_struct *isr_workq; | |
487 | ||
16c906e5 AT |
488 | atomic_t irq_workers_active; |
489 | ||
f45c40a9 SB |
490 | struct mtip_work work[MTIP_MAX_SLOT_GROUPS]; |
491 | ||
16c906e5 | 492 | int isr_binding; |
0caff003 | 493 | |
8f8b8995 AT |
494 | struct block_device *bdev; |
495 | ||
0caff003 AT |
496 | struct list_head online_list; /* linkage for online list */ |
497 | ||
498 | struct list_head remove_list; /* linkage for removing list */ | |
f45c40a9 SB |
499 | |
500 | int unal_qdepth; /* qdepth of unaligned IO queue */ | |
88523a61 SB |
501 | }; |
502 | ||
88523a61 | 503 | #endif |