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mtip32xx: remove the device_status debugfs file
[linux-block.git] / drivers / block / mtip32xx / mtip32xx.c
CommitLineData
c942fddf 1// SPDX-License-Identifier: GPL-2.0-or-later
88523a61
SB		 2/*
3 * Driver for the Micron P320 SSD
4 * Copyright (C) 2011 Micron Technology, Inc.
5 *
6 * Portions of this code were derived from works subjected to the
7 * following copyright:
8 * Copyright (C) 2009 Integrated Device Technology, Inc.
88523a61
SB		 9 */
10
11#include <linux/pci.h>
12#include <linux/interrupt.h>
13#include <linux/ata.h>
14#include <linux/delay.h>
15#include <linux/hdreg.h>
16#include <linux/uaccess.h>
17#include <linux/random.h>
18#include <linux/smp.h>
19#include <linux/compat.h>
20#include <linux/fs.h>
0e838c62 21#include <linux/module.h>
88523a61 22#include <linux/blkdev.h>
ffc771b3 23#include <linux/blk-mq.h>
88523a61
SB		 24#include <linux/bio.h>
25#include <linux/dma-mapping.h>
26#include <linux/idr.h>
60ec0eec 27#include <linux/kthread.h>
88523a61 28#include <../drivers/ata/ahci.h>
45038367 29#include <linux/export.h>
7b421d24 30#include <linux/debugfs.h>
f45c40a9 31#include <linux/prefetch.h>
98fa15f3 32#include <linux/numa.h>
88523a61
SB		 33#include "mtip32xx.h"
34
35#define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
188b9f49
SB		 36
37/* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
38#define AHCI_RX_FIS_SZ 0x100
39#define AHCI_RX_FIS_OFFSET 0x0
40#define AHCI_IDFY_SZ ATA_SECT_SIZE
41#define AHCI_IDFY_OFFSET 0x400
42#define AHCI_SECTBUF_SZ ATA_SECT_SIZE
43#define AHCI_SECTBUF_OFFSET 0x800
44#define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
45#define AHCI_SMARTBUF_OFFSET 0xC00
46/* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
47#define BLOCK_DMA_ALLOC_SZ 4096
48
49/* DMA region containing command table (should be 8192 bytes) */
50#define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
51#define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
52#define AHCI_CMD_TBL_OFFSET 0x0
53
54/* DMA region per command (contains header and SGL) */
55#define AHCI_CMD_TBL_HDR_SZ 0x80
56#define AHCI_CMD_TBL_HDR_OFFSET 0x0
57#define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
58#define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
59#define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
60
88523a61 61
45038367 62#define HOST_CAP_NZDMA (1 << 19)
88523a61
SB		 63#define HOST_HSORG 0xFC
64#define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
65#define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
66#define HSORG_HWREV 0xFF00
67#define HSORG_STYLE 0x8
68#define HSORG_SLOTGROUPS 0x7
69
70#define PORT_COMMAND_ISSUE 0x38
71#define PORT_SDBV 0x7C
72
73#define PORT_OFFSET 0x100
74#define PORT_MEM_SIZE 0x80
75
76#define PORT_IRQ_ERR \
77 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
78 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
79 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
80 PORT_IRQ_OVERFLOW)
81#define PORT_IRQ_LEGACY \
82 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
83#define PORT_IRQ_HANDLED \
84 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
85 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
86 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
87#define DEF_PORT_IRQ \
88 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
89
90/* product numbers */
91#define MTIP_PRODUCT_UNKNOWN 0x00
92#define MTIP_PRODUCT_ASICFPGA 0x11
93
94/* Device instance number, incremented each time a device is probed. */
95static int instance;
96
97/*
98 * Global variable used to hold the major block device number
99 * allocated in mtip_init().
100 */
3ff147d3 101static int mtip_major;
7b421d24 102static struct dentry *dfs_parent;
88523a61 103
16c906e5
AT		 104static u32 cpu_use[NR_CPUS];
105
88523a61
SB		 106static DEFINE_IDA(rssd_index_ida);
107
62ee8c13
AT		 108static int mtip_block_initialize(struct driver_data *dd);
109
16d02c04 110#ifdef CONFIG_COMPAT
88523a61
SB		 111struct mtip_compat_ide_task_request_s {
112 __u8 io_ports[8];
113 __u8 hob_ports[8];
114 ide_reg_valid_t out_flags;
115 ide_reg_valid_t in_flags;
116 int data_phase;
117 int req_cmd;
118 compat_ulong_t out_size;
119 compat_ulong_t in_size;
120};
16d02c04 121#endif
88523a61 122
6316668f
JA		 123/*
124 * This function check_for_surprise_removal is called
125 * while card is removed from the system and it will
a4414aed 126 * read the vendor id from the configuration space
6316668f
JA		 127 *
128 * @pdev Pointer to the pci_dev structure.
129 *
130 * return value
131 * true if device removed, else false
132 */
9e541f14 133static bool mtip_check_surprise_removal(struct driver_data *dd)
6316668f
JA		 134{
135 u16 vendor_id = 0;
8f8b8995
AT		 136
137 if (dd->sr)
138 return true;
6316668f
JA		 139
140 /* Read the vendorID from the configuration space */
9e541f14 141 pci_read_config_word(dd->pdev, 0x00, &vendor_id);
8f8b8995
AT		 142 if (vendor_id == 0xFFFF) {
143 dd->sr = true;
144 if (dd->queue)
4e699cb9 145 blk_queue_flag_set(QUEUE_FLAG_DEAD, dd->queue);
8f8b8995
AT		 146 else
147 dev_warn(&dd->pdev->dev,
148 "%s: dd->queue is NULL\n", __func__);
6316668f 149 return true; /* device removed */
6316668f
JA		 150 }
151
8f8b8995 152 return false; /* device present */
6316668f
JA		 153}
154
ffc771b3
JA		 155static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
156 unsigned int tag)
88523a61 157{
de0328d3 158 return blk_mq_rq_to_pdu(blk_mq_tag_to_rq(dd->tags.tags[0], tag));
8f8b8995
AT		 159}
160
88523a61 161/*
6316668f 162 * Reset the HBA (without sleeping)
88523a61 163 *
6316668f 164 * @dd Pointer to the driver data structure.
88523a61
SB		 165 *
166 * return value
6316668f
JA		 167 * 0 The reset was successful.
168 * -1 The HBA Reset bit did not clear.
88523a61 169 */
d0d096b1 170static int mtip_hba_reset(struct driver_data *dd)
88523a61 171{
6316668f 172 unsigned long timeout;
88523a61 173
6316668f
JA		 174 /* Set the reset bit */
175 writel(HOST_RESET, dd->mmio + HOST_CTL);
88523a61 176
6316668f
JA		 177 /* Flush */
178 readl(dd->mmio + HOST_CTL);
88523a61 179
2f17d71d
ATS		 180 /*
181 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
182 * is 1 sec but in LUN failure conditions, up to 10 secs are required
183 */
184 timeout = jiffies + msecs_to_jiffies(10000);
d0d096b1
AT		 185 do {
186 mdelay(10);
187 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
188 return -1;
88523a61 189
d0d096b1
AT		 190 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
191 && time_before(jiffies, timeout));
45038367 192
6316668f
JA		 193 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
194 return -1;
88523a61 195
6316668f 196 return 0;
88523a61
SB		 197}
198
199/*
6316668f 200 * Issue a command to the hardware.
88523a61 201 *
6316668f
JA		 202 * Set the appropriate bit in the s_active and Command Issue hardware
203 * registers, causing hardware command processing to begin.
88523a61 204 *
6316668f
JA		 205 * @port Pointer to the port structure.
206 * @tag The tag of the command to be issued.
88523a61
SB		 207 *
208 * return value
6316668f 209 * None
88523a61 210 */
6316668f 211static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
88523a61 212{
16c906e5 213 int group = tag >> 5;
88523a61 214
16c906e5
AT		 215 /* guard SACT and CI registers */
216 spin_lock(&port->cmd_issue_lock[group]);
6316668f
JA		 217 writel((1 << MTIP_TAG_BIT(tag)),
218 port->s_active[MTIP_TAG_INDEX(tag)]);
219 writel((1 << MTIP_TAG_BIT(tag)),
220 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
16c906e5 221 spin_unlock(&port->cmd_issue_lock[group]);
88523a61
SB		 222}
223
224/*
225 * Enable/disable the reception of FIS
226 *
227 * @port Pointer to the port data structure
228 * @enable 1 to enable, 0 to disable
229 *
230 * return value
231 * Previous state: 1 enabled, 0 disabled
232 */
233static int mtip_enable_fis(struct mtip_port *port, int enable)
234{
235 u32 tmp;
236
237 /* enable FIS reception */
238 tmp = readl(port->mmio + PORT_CMD);
239 if (enable)
240 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
241 else
242 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
243
244 /* Flush */
245 readl(port->mmio + PORT_CMD);
246
247 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
248}
249
250/*
251 * Enable/disable the DMA engine
252 *
253 * @port Pointer to the port data structure
254 * @enable 1 to enable, 0 to disable
255 *
256 * return value
257 * Previous state: 1 enabled, 0 disabled.
258 */
259static int mtip_enable_engine(struct mtip_port *port, int enable)
260{
261 u32 tmp;
262
263 /* enable FIS reception */
264 tmp = readl(port->mmio + PORT_CMD);
265 if (enable)
266 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
267 else
268 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
269
270 readl(port->mmio + PORT_CMD);
271 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
272}
273
274/*
275 * Enables the port DMA engine and FIS reception.
276 *
277 * return value
278 * None
279 */
280static inline void mtip_start_port(struct mtip_port *port)
281{
282 /* Enable FIS reception */
283 mtip_enable_fis(port, 1);
284
285 /* Enable the DMA engine */
286 mtip_enable_engine(port, 1);
287}
288
289/*
290 * Deinitialize a port by disabling port interrupts, the DMA engine,
291 * and FIS reception.
292 *
293 * @port Pointer to the port structure
294 *
295 * return value
296 * None
297 */
298static inline void mtip_deinit_port(struct mtip_port *port)
299{
300 /* Disable interrupts on this port */
301 writel(0, port->mmio + PORT_IRQ_MASK);
302
303 /* Disable the DMA engine */
304 mtip_enable_engine(port, 0);
305
306 /* Disable FIS reception */
307 mtip_enable_fis(port, 0);
308}
309
310/*
311 * Initialize a port.
312 *
313 * This function deinitializes the port by calling mtip_deinit_port() and
314 * then initializes it by setting the command header and RX FIS addresses,
315 * clearing the SError register and any pending port interrupts before
316 * re-enabling the default set of port interrupts.
317 *
318 * @port Pointer to the port structure.
319 *
320 * return value
321 * None
322 */
323static void mtip_init_port(struct mtip_port *port)
324{
325 int i;
326 mtip_deinit_port(port);
327
328 /* Program the command list base and FIS base addresses */
329 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
330 writel((port->command_list_dma >> 16) >> 16,
331 port->mmio + PORT_LST_ADDR_HI);
332 writel((port->rxfis_dma >> 16) >> 16,
333 port->mmio + PORT_FIS_ADDR_HI);
8a05aa4c 334 set_bit(MTIP_PF_HOST_CAP_64, &port->flags);
88523a61
SB		 335 }
336
60ec0eec 337 writel(port->command_list_dma & 0xFFFFFFFF,
88523a61 338 port->mmio + PORT_LST_ADDR);
60ec0eec 339 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
88523a61
SB		 340
341 /* Clear SError */
342 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
343
6316668f
JA		 344 /* reset the completed registers.*/
345 for (i = 0; i < port->dd->slot_groups; i++)
346 writel(0xFFFFFFFF, port->completed[i]);
88523a61 347
6316668f 348 /* Clear any pending interrupts for this port */
6bb688c0 349 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
88523a61 350
22be2e6e
AT		 351 /* Clear any pending interrupts on the HBA. */
352 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
353 port->dd->mmio + HOST_IRQ_STAT);
354
6316668f
JA		 355 /* Enable port interrupts */
356 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
88523a61
SB		 357}
358
359/*
360 * Restart a port
361 *
362 * @port Pointer to the port data structure.
363 *
364 * return value
365 * None
366 */
6316668f 367static void mtip_restart_port(struct mtip_port *port)
88523a61
SB		 368{
369 unsigned long timeout;
370
371 /* Disable the DMA engine */
372 mtip_enable_engine(port, 0);
373
374 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
375 timeout = jiffies + msecs_to_jiffies(500);
376 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
377 && time_before(jiffies, timeout))
378 ;
379
8a857a88 380 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 381 return;
382
88523a61
SB		 383 /*
384 * Chip quirk: escalate to hba reset if
385 * PxCMD.CR not clear after 500 ms
386 */
387 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
388 dev_warn(&port->dd->pdev->dev,
389 "PxCMD.CR not clear, escalating reset\n");
390
d0d096b1 391 if (mtip_hba_reset(port->dd))
88523a61
SB		 392 dev_err(&port->dd->pdev->dev,
393 "HBA reset escalation failed.\n");
394
395 /* 30 ms delay before com reset to quiesce chip */
396 mdelay(30);
397 }
398
399 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
400
401 /* Set PxSCTL.DET */
402 writel(readl(port->mmio + PORT_SCR_CTL) |
403 1, port->mmio + PORT_SCR_CTL);
404 readl(port->mmio + PORT_SCR_CTL);
405
406 /* Wait 1 ms to quiesce chip function */
407 timeout = jiffies + msecs_to_jiffies(1);
408 while (time_before(jiffies, timeout))
409 ;
410
8a857a88 411 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 412 return;
413
88523a61
SB		 414 /* Clear PxSCTL.DET */
415 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
416 port->mmio + PORT_SCR_CTL);
417 readl(port->mmio + PORT_SCR_CTL);
418
419 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
420 timeout = jiffies + msecs_to_jiffies(500);
421 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
422 && time_before(jiffies, timeout))
423 ;
424
8a857a88 425 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 426 return;
427
88523a61
SB		 428 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
429 dev_warn(&port->dd->pdev->dev,
430 "COM reset failed\n");
431
22be2e6e
AT		 432 mtip_init_port(port);
433 mtip_start_port(port);
88523a61 434
88523a61
SB		 435}
436
d0d096b1
AT		 437static int mtip_device_reset(struct driver_data *dd)
438{
439 int rv = 0;
440
9e541f14 441 if (mtip_check_surprise_removal(dd))
d0d096b1
AT		 442 return 0;
443
444 if (mtip_hba_reset(dd) < 0)
445 rv = -EFAULT;
446
447 mdelay(1);
448 mtip_init_port(dd->port);
449 mtip_start_port(dd->port);
450
451 /* Enable interrupts on the HBA. */
452 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
453 dd->mmio + HOST_CTL);
454 return rv;
455}
456
95fea2f1
AT		 457/*
458 * Helper function for tag logging
459 */
460static void print_tags(struct driver_data *dd,
461 char *msg,
462 unsigned long *tagbits,
463 int cnt)
464{
465 unsigned char tagmap[128];
466 int group, tagmap_len = 0;
467
468 memset(tagmap, 0, sizeof(tagmap));
469 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
ffc771b3 470 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
95fea2f1
AT		 471 tagbits[group-1]);
472 dev_warn(&dd->pdev->dev,
473 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
474}
475
f6587217
AT		 476static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
477 dma_addr_t buffer_dma, unsigned int sectors);
478static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
479 struct smart_attr *attrib);
6f63503c 480
2a842aca 481static void mtip_complete_command(struct mtip_cmd *cmd, blk_status_t status)
6f63503c
JA		 482{
483 struct request *req = blk_mq_rq_from_pdu(cmd);
484
485 cmd->status = status;
15f73f5b
CH		 486 if (likely(!blk_should_fake_timeout(req->q)))
487 blk_mq_complete_request(req);
6f63503c
JA		 488}
489
88523a61
SB		 490/*
491 * Handle an error.
492 *
493 * @dd Pointer to the DRIVER_DATA structure.
494 *
495 * return value
496 * None
497 */
498static void mtip_handle_tfe(struct driver_data *dd)
499{
f6587217 500 int group, tag, bit, reissue, rv;
88523a61 501 struct mtip_port *port;
f6587217 502 struct mtip_cmd *cmd;
88523a61
SB		 503 u32 completed;
504 struct host_to_dev_fis *fis;
505 unsigned long tagaccum[SLOTBITS_IN_LONGS];
95fea2f1 506 unsigned int cmd_cnt = 0;
f6587217
AT		 507 unsigned char *buf;
508 char *fail_reason = NULL;
509 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
88523a61
SB		 510
511 dev_warn(&dd->pdev->dev, "Taskfile error\n");
512
513 port = dd->port;
514
a7806fad 515 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
ffc771b3 516 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
d02e1f0a 517 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
2a842aca 518 mtip_complete_command(cmd, BLK_STS_IOERR);
e35b9473 519 return;
d02e1f0a 520 }
88523a61 521
95fea2f1
AT		 522 /* clear the tag accumulator */
523 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
524
88523a61
SB		 525 /* Loop through all the groups */
526 for (group = 0; group < dd->slot_groups; group++) {
527 completed = readl(port->completed[group]);
528
ffc771b3
JA		 529 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
530
88523a61
SB		 531 /* clear completed status register in the hardware.*/
532 writel(completed, port->completed[group]);
533
88523a61
SB		 534 /* Process successfully completed commands */
535 for (bit = 0; bit < 32 && completed; bit++) {
536 if (!(completed & (1<<bit)))
537 continue;
538 tag = (group << 5) + bit;
539
540 /* Skip the internal command slot */
541 if (tag == MTIP_TAG_INTERNAL)
542 continue;
543
ffc771b3 544 cmd = mtip_cmd_from_tag(dd, tag);
6f63503c
JA		 545 mtip_complete_command(cmd, 0);
546 set_bit(tag, tagaccum);
547 cmd_cnt++;
88523a61
SB		 548 }
549 }
95fea2f1
AT		 550
551 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
88523a61
SB		 552
553 /* Restart the port */
554 mdelay(20);
555 mtip_restart_port(port);
556
f6587217
AT		 557 /* Trying to determine the cause of the error */
558 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
559 dd->port->log_buf,
560 dd->port->log_buf_dma, 1);
561 if (rv) {
562 dev_warn(&dd->pdev->dev,
563 "Error in READ LOG EXT (10h) command\n");
564 /* non-critical error, don't fail the load */
565 } else {
566 buf = (unsigned char *)dd->port->log_buf;
567 if (buf[259] & 0x1) {
568 dev_info(&dd->pdev->dev,
569 "Write protect bit is set.\n");
8a857a88 570 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
f6587217
AT		 571 fail_all_ncq_write = 1;
572 fail_reason = "write protect";
573 }
574 if (buf[288] == 0xF7) {
575 dev_info(&dd->pdev->dev,
576 "Exceeded Tmax, drive in thermal shutdown.\n");
8a857a88 577 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
f6587217
AT		 578 fail_all_ncq_cmds = 1;
579 fail_reason = "thermal shutdown";
580 }
581 if (buf[288] == 0xBF) {
aae4a033 582 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
f6587217 583 dev_info(&dd->pdev->dev,
26d58057 584 "Drive indicates rebuild has failed. Secure erase required.\n");
f6587217
AT		 585 fail_all_ncq_cmds = 1;
586 fail_reason = "rebuild failed";
587 }
588 }
589
88523a61
SB		 590 /* clear the tag accumulator */
591 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
592
593 /* Loop through all the groups */
594 for (group = 0; group < dd->slot_groups; group++) {
595 for (bit = 0; bit < 32; bit++) {
596 reissue = 1;
597 tag = (group << 5) + bit;
ffc771b3 598 cmd = mtip_cmd_from_tag(dd, tag);
88523a61 599
f6587217 600 fis = (struct host_to_dev_fis *)cmd->command;
88523a61
SB		 601
602 /* Should re-issue? */
603 if (tag == MTIP_TAG_INTERNAL ||
604 fis->command == ATA_CMD_SET_FEATURES)
605 reissue = 0;
f6587217
AT		 606 else {
607 if (fail_all_ncq_cmds ||
608 (fail_all_ncq_write &&
609 fis->command == ATA_CMD_FPDMA_WRITE)) {
610 dev_warn(&dd->pdev->dev,
611 " Fail: %s w/tag %d [%s].\n",
612 fis->command == ATA_CMD_FPDMA_WRITE ?
613 "write" : "read",
614 tag,
615 fail_reason != NULL ?
616 fail_reason : "unknown");
2a842aca 617 mtip_complete_command(cmd, BLK_STS_MEDIUM);
f6587217
AT		 618 continue;
619 }
620 }
88523a61
SB		 621
622 /*
623 * First check if this command has
624 * exceeded its retries.
625 */
f6587217 626 if (reissue && (cmd->retries-- > 0)) {
88523a61
SB		 627
628 set_bit(tag, tagaccum);
629
88523a61
SB		 630 /* Re-issue the command. */
631 mtip_issue_ncq_command(port, tag);
632
633 continue;
634 }
635
636 /* Retire a command that will not be reissued */
637 dev_warn(&port->dd->pdev->dev,
638 "retiring tag %d\n", tag);
88523a61 639
2a842aca 640 mtip_complete_command(cmd, BLK_STS_IOERR);
88523a61
SB		 641 }
642 }
95fea2f1 643 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
88523a61
SB		 644}
645
646/*
647 * Handle a set device bits interrupt
648 */
16c906e5
AT		 649static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
650 u32 completed)
88523a61 651{
16c906e5
AT		 652 struct driver_data *dd = port->dd;
653 int tag, bit;
88523a61
SB		 654 struct mtip_cmd *command;
655
16c906e5
AT		 656 if (!completed) {
657 WARN_ON_ONCE(!completed);
658 return;
659 }
660 /* clear completed status register in the hardware.*/
661 writel(completed, port->completed[group]);
88523a61 662
16c906e5
AT		 663 /* Process completed commands. */
664 for (bit = 0; (bit < 32) && completed; bit++) {
665 if (completed & 0x01) {
666 tag = (group << 5) | bit;
88523a61 667
16c906e5
AT		 668 /* skip internal command slot. */
669 if (unlikely(tag == MTIP_TAG_INTERNAL))
670 continue;
88523a61 671
ffc771b3 672 command = mtip_cmd_from_tag(dd, tag);
6f63503c 673 mtip_complete_command(command, 0);
88523a61 674 }
16c906e5 675 completed >>= 1;
88523a61 676 }
16c906e5
AT		 677
678 /* If last, re-enable interrupts */
679 if (atomic_dec_return(&dd->irq_workers_active) == 0)
680 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
88523a61
SB		 681}
682
683/*
684 * Process legacy pio and d2h interrupts
685 */
686static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
687{
688 struct mtip_port *port = dd->port;
ffc771b3 689 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
88523a61 690
994ff079
JA		 691 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && cmd) {
692 int group = MTIP_TAG_INDEX(MTIP_TAG_INTERNAL);
693 int status = readl(port->cmd_issue[group]);
694
6f63503c
JA		 695 if (!(status & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))))
696 mtip_complete_command(cmd, 0);
88523a61 697 }
88523a61
SB		 698}
699
700/*
701 * Demux and handle errors
702 */
703static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
704{
88523a61
SB		 705 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
706 dev_warn(&dd->pdev->dev,
707 "Clearing PxSERR.DIAG.x\n");
708 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
709 }
710
711 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
712 dev_warn(&dd->pdev->dev,
713 "Clearing PxSERR.DIAG.n\n");
714 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
715 }
716
717 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
718 dev_warn(&dd->pdev->dev,
719 "Port stat errors %x unhandled\n",
720 (port_stat & ~PORT_IRQ_HANDLED));
9e541f14 721 if (mtip_check_surprise_removal(dd))
9b204fbf
AT		 722 return;
723 }
724 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
725 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
726 wake_up_interruptible(&dd->port->svc_wait);
88523a61
SB		 727 }
728}
729
730static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
731{
732 struct driver_data *dd = (struct driver_data *) data;
733 struct mtip_port *port = dd->port;
734 u32 hba_stat, port_stat;
735 int rv = IRQ_NONE;
16c906e5
AT		 736 int do_irq_enable = 1, i, workers;
737 struct mtip_work *twork;
88523a61
SB		 738
739 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
740 if (hba_stat) {
741 rv = IRQ_HANDLED;
742
743 /* Acknowledge the interrupt status on the port.*/
744 port_stat = readl(port->mmio + PORT_IRQ_STAT);
2132a544 745 if (unlikely(port_stat == 0xFFFFFFFF)) {
9e541f14 746 mtip_check_surprise_removal(dd);
2132a544
ATS		 747 return IRQ_HANDLED;
748 }
88523a61
SB		 749 writel(port_stat, port->mmio + PORT_IRQ_STAT);
750
751 /* Demux port status */
16c906e5
AT		 752 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
753 do_irq_enable = 0;
754 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
755
756 /* Start at 1: group zero is always local? */
757 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
758 i++) {
759 twork = &dd->work[i];
760 twork->completed = readl(port->completed[i]);
761 if (twork->completed)
762 workers++;
763 }
764
765 atomic_set(&dd->irq_workers_active, workers);
766 if (workers) {
767 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
768 twork = &dd->work[i];
769 if (twork->completed)
770 queue_work_on(
771 twork->cpu_binding,
772 dd->isr_workq,
773 &twork->work);
774 }
775
776 if (likely(dd->work[0].completed))
777 mtip_workq_sdbfx(port, 0,
778 dd->work[0].completed);
779
780 } else {
781 /*
782 * Chip quirk: SDB interrupt but nothing
783 * to complete
784 */
785 do_irq_enable = 1;
786 }
787 }
88523a61
SB		 788
789 if (unlikely(port_stat & PORT_IRQ_ERR)) {
9e541f14 790 if (unlikely(mtip_check_surprise_removal(dd))) {
88523a61
SB		 791 /* don't proceed further */
792 return IRQ_HANDLED;
793 }
8a857a88 794 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367
AT		 795 &dd->dd_flag))
796 return rv;
88523a61
SB		 797
798 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
799 }
800
801 if (unlikely(port_stat & PORT_IRQ_LEGACY))
802 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
803 }
804
805 /* acknowledge interrupt */
16c906e5
AT		 806 if (unlikely(do_irq_enable))
807 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
88523a61
SB		 808
809 return rv;
810}
811
88523a61
SB		 812/*
813 * HBA interrupt subroutine.
814 *
815 * @irq IRQ number.
816 * @instance Pointer to the driver data structure.
817 *
818 * return value
819 * IRQ_HANDLED A HBA interrupt was pending and handled.
820 * IRQ_NONE This interrupt was not for the HBA.
821 */
822static irqreturn_t mtip_irq_handler(int irq, void *instance)
823{
824 struct driver_data *dd = instance;
16c906e5
AT		 825
826 return mtip_handle_irq(dd);
88523a61
SB		 827}
828
829static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
830{
6f63503c 831 writel(1 << MTIP_TAG_BIT(tag), port->cmd_issue[MTIP_TAG_INDEX(tag)]);
88523a61
SB		 832}
833
c74b0f58
AT		 834static bool mtip_pause_ncq(struct mtip_port *port,
835 struct host_to_dev_fis *fis)
836{
c74b0f58
AT		 837 unsigned long task_file_data;
838
c74b0f58 839 task_file_data = readl(port->mmio+PORT_TFDATA);
12a166c9 840 if ((task_file_data & 1))
c74b0f58
AT		 841 return false;
842
843 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
c74b0f58
AT		 844 port->ic_pause_timer = jiffies;
845 return true;
846 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
847 (fis->features == 0x03)) {
848 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
849 port->ic_pause_timer = jiffies;
850 return true;
851 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
852 ((fis->command == 0xFC) &&
853 (fis->features == 0x27 || fis->features == 0x72 ||
854 fis->features == 0x62 || fis->features == 0x26))) {
ee04bed6 855 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
aae4a033 856 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
c74b0f58
AT		 857 /* Com reset after secure erase or lowlevel format */
858 mtip_restart_port(port);
686d8e0b 859 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
c74b0f58
AT		 860 return false;
861 }
862
863 return false;
864}
865
baed548a
JA		 866static bool mtip_commands_active(struct mtip_port *port)
867{
868 unsigned int active;
869 unsigned int n;
870
871 /*
872 * Ignore s_active bit 0 of array element 0.
873 * This bit will always be set
874 */
875 active = readl(port->s_active[0]) & 0xFFFFFFFE;
876 for (n = 1; n < port->dd->slot_groups; n++)
877 active |= readl(port->s_active[n]);
878
879 return active != 0;
880}
881
88523a61
SB		 882/*
883 * Wait for port to quiesce
884 *
885 * @port Pointer to port data structure
886 * @timeout Max duration to wait (ms)
887 *
888 * return value
889 * 0 Success
890 * -EBUSY Commands still active
891 */
8afdd94c 892static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
88523a61
SB		 893{
894 unsigned long to;
baed548a 895 bool active = true;
88523a61 896
436c15ab 897 blk_mq_quiesce_queue(port->dd->queue);
9acf03cf 898
88523a61
SB		 899 to = jiffies + msecs_to_jiffies(timeout);
900 do {
8a857a88 901 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
8afdd94c 902 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
60ec0eec
AT		 903 msleep(20);
904 continue; /* svc thd is actively issuing commands */
905 }
9b204fbf 906
8afdd94c 907 msleep(100);
008e56d2 908
9e541f14 909 if (mtip_check_surprise_removal(port->dd))
9b204fbf 910 goto err_fault;
9b204fbf 911
baed548a 912 active = mtip_commands_active(port);
88523a61
SB		 913 if (!active)
914 break;
88523a61
SB		 915 } while (time_before(jiffies, to));
916
436c15ab 917 blk_mq_unquiesce_queue(port->dd->queue);
88523a61 918 return active ? -EBUSY : 0;
9acf03cf 919err_fault:
436c15ab 920 blk_mq_unquiesce_queue(port->dd->queue);
9acf03cf 921 return -EFAULT;
88523a61
SB		 922}
923
3f5e6a35
JA		 924struct mtip_int_cmd {
925 int fis_len;
926 dma_addr_t buffer;
927 int buf_len;
928 u32 opts;
929};
930
88523a61
SB		 931/*
932 * Execute an internal command and wait for the completion.
933 *
934 * @port Pointer to the port data structure.
935 * @fis Pointer to the FIS that describes the command.
60ec0eec 936 * @fis_len Length in WORDS of the FIS.
88523a61 937 * @buffer DMA accessible for command data.
60ec0eec 938 * @buf_len Length, in bytes, of the data buffer.
88523a61
SB		 939 * @opts Command header options, excluding the FIS length
940 * and the number of PRD entries.
941 * @timeout Time in ms to wait for the command to complete.
942 *
943 * return value
944 * 0 Command completed successfully.
945 * -EFAULT The buffer address is not correctly aligned.
946 * -EBUSY Internal command or other IO in progress.
947 * -EAGAIN Time out waiting for command to complete.
948 */
949static int mtip_exec_internal_command(struct mtip_port *port,
8182b495 950 struct host_to_dev_fis *fis,
60ec0eec 951 int fis_len,
88523a61 952 dma_addr_t buffer,
60ec0eec 953 int buf_len,
88523a61 954 u32 opts,
88523a61
SB		 955 unsigned long timeout)
956{
ffc771b3 957 struct mtip_cmd *int_cmd;
d0d096b1 958 struct driver_data *dd = port->dd;
3f5e6a35
JA		 959 struct request *rq;
960 struct mtip_int_cmd icmd = {
961 .fis_len = fis_len,
962 .buffer = buffer,
963 .buf_len = buf_len,
964 .opts = opts
965 };
ffc771b3 966 int rv = 0;
88523a61
SB		 967
968 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
969 if (buffer & 0x00000007) {
d0d096b1 970 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
88523a61
SB		 971 return -EFAULT;
972 }
973
9e541f14 974 if (mtip_check_surprise_removal(dd))
55c7bc37
CH		 975 return -EFAULT;
976
977 rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED);
978 if (IS_ERR(rq)) {
008e56d2
ATS		 979 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
980 return -EFAULT;
981 }
55c7bc37 982
8a857a88 983 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
c74b0f58 984
686d8e0b
ATS		 985 if (fis->command == ATA_CMD_SEC_ERASE_PREP)
986 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
987
d0d096b1 988 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
88523a61 989
0f6422a2
JA		 990 if (fis->command != ATA_CMD_STANDBYNOW1) {
991 /* wait for io to complete if non atomic */
8afdd94c 992 if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
0f6422a2 993 dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n");
6f63503c 994 blk_mq_free_request(rq);
0f6422a2
JA		 995 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
996 wake_up_interruptible(&port->svc_wait);
997 return -EBUSY;
88523a61 998 }
88523a61
SB		 999 }
1000
1001 /* Copy the command to the command table */
55c7bc37 1002 int_cmd = blk_mq_rq_to_pdu(rq);
d85cb204 1003 int_cmd->icmd = &icmd;
60ec0eec 1004 memcpy(int_cmd->command, fis, fis_len*4);
88523a61 1005
3f5e6a35 1006 rq->timeout = timeout;
5b7e0a8a 1007
3f5e6a35 1008 /* insert request and run queue */
b84ba30b 1009 blk_execute_rq(rq, true);
3f5e6a35 1010
8c66ac6a
JA		 1011 if (int_cmd->status) {
1012 dev_err(&dd->pdev->dev, "Internal command [%02X] failed %d\n",
1013 fis->command, int_cmd->status);
1014 rv = -EIO;
d0d096b1 1015
9e541f14 1016 if (mtip_check_surprise_removal(dd) ||
0f6422a2
JA		 1017 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1018 &dd->dd_flag)) {
1019 dev_err(&dd->pdev->dev,
1020 "Internal command [%02X] wait returned due to SR\n",
1021 fis->command);
1022 rv = -ENXIO;
1023 goto exec_ic_exit;
45038367 1024 }
0f6422a2
JA		 1025 mtip_device_reset(dd); /* recover from timeout issue */
1026 rv = -EAGAIN;
1027 goto exec_ic_exit;
d02e1f0a 1028 }
88523a61 1029
994ff079
JA		 1030 if (readl(port->cmd_issue[MTIP_TAG_INDEX(MTIP_TAG_INTERNAL)])
1031 & (1 << MTIP_TAG_BIT(MTIP_TAG_INTERNAL))) {
d02e1f0a 1032 rv = -ENXIO;
d0d096b1
AT		 1033 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1034 mtip_device_reset(dd);
88523a61
SB		 1035 rv = -EAGAIN;
1036 }
1037 }
45038367 1038exec_ic_exit:
88523a61 1039 /* Clear the allocated and active bits for the internal command. */
6f63503c 1040 blk_mq_free_request(rq);
686d8e0b 1041 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
c74b0f58
AT		 1042 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1043 /* NCQ paused */
1044 return rv;
1045 }
60ec0eec 1046 wake_up_interruptible(&port->svc_wait);
88523a61
SB		 1047
1048 return rv;
1049}
1050
1051/*
1052 * Byte-swap ATA ID strings.
1053 *
1054 * ATA identify data contains strings in byte-swapped 16-bit words.
1055 * They must be swapped (on all architectures) to be usable as C strings.
1056 * This function swaps bytes in-place.
1057 *
1058 * @buf The buffer location of the string
1059 * @len The number of bytes to swap
1060 *
1061 * return value
1062 * None
1063 */
1064static inline void ata_swap_string(u16 *buf, unsigned int len)
1065{
1066 int i;
1067 for (i = 0; i < (len/2); i++)
1068 be16_to_cpus(&buf[i]);
1069}
1070
670a6414
AT		 1071static void mtip_set_timeout(struct driver_data *dd,
1072 struct host_to_dev_fis *fis,
1073 unsigned int *timeout, u8 erasemode)
1074{
1075 switch (fis->command) {
1076 case ATA_CMD_DOWNLOAD_MICRO:
1077 *timeout = 120000; /* 2 minutes */
1078 break;
1079 case ATA_CMD_SEC_ERASE_UNIT:
1080 case 0xFC:
1081 if (erasemode)
1082 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1083 else
1084 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1085 break;
1086 case ATA_CMD_STANDBYNOW1:
1087 *timeout = 120000; /* 2 minutes */
1088 break;
1089 case 0xF7:
1090 case 0xFA:
1091 *timeout = 60000; /* 60 seconds */
1092 break;
1093 case ATA_CMD_SMART:
1094 *timeout = 15000; /* 15 seconds */
1095 break;
1096 default:
9b204fbf 1097 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
670a6414
AT		 1098 break;
1099 }
1100}
1101
88523a61
SB		 1102/*
1103 * Request the device identity information.
1104 *
1105 * If a user space buffer is not specified, i.e. is NULL, the
1106 * identify information is still read from the drive and placed
1107 * into the identify data buffer (@e port->identify) in the
1108 * port data structure.
1109 * When the identify buffer contains valid identify information @e
1110 * port->identify_valid is non-zero.
1111 *
1112 * @port Pointer to the port structure.
1113 * @user_buffer A user space buffer where the identify data should be
1114 * copied.
1115 *
1116 * return value
1117 * 0 Command completed successfully.
1118 * -EFAULT An error occurred while coping data to the user buffer.
1119 * -1 Command failed.
1120 */
1121static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1122{
1123 int rv = 0;
1124 struct host_to_dev_fis fis;
1125
8a857a88 1126 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 1127 return -EFAULT;
1128
88523a61
SB		 1129 /* Build the FIS. */
1130 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1131 fis.type = 0x27;
1132 fis.opts = 1 << 7;
1133 fis.command = ATA_CMD_ID_ATA;
1134
1135 /* Set the identify information as invalid. */
1136 port->identify_valid = 0;
1137
1138 /* Clear the identify information. */
1139 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1140
1141 /* Execute the command. */
1142 if (mtip_exec_internal_command(port,
1143 &fis,
1144 5,
1145 port->identify_dma,
1146 sizeof(u16) * ATA_ID_WORDS,
1147 0,
9b204fbf 1148 MTIP_INT_CMD_TIMEOUT_MS)
88523a61
SB		 1149 < 0) {
1150 rv = -1;
1151 goto out;
1152 }
1153
1154 /*
1155 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1156 * perform field-sensitive swapping on the string fields.
1157 * See the kernel use of ata_id_string() for proof of this.
1158 */
1159#ifdef __LITTLE_ENDIAN
1160 ata_swap_string(port->identify + 27, 40); /* model string*/
1161 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1162 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1163#else
1164 {
1165 int i;
1166 for (i = 0; i < ATA_ID_WORDS; i++)
1167 port->identify[i] = le16_to_cpu(port->identify[i]);
1168 }
1169#endif
1170
26d58057
SB		 1171 /* Check security locked state */
1172 if (port->identify[128] & 0x4)
1173 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1174 else
1175 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1176
88523a61
SB		 1177 /* Set the identify buffer as valid. */
1178 port->identify_valid = 1;
1179
1180 if (user_buffer) {
1181 if (copy_to_user(
1182 user_buffer,
1183 port->identify,
1184 ATA_ID_WORDS * sizeof(u16))) {
1185 rv = -EFAULT;
1186 goto out;
1187 }
1188 }
1189
1190out:
88523a61
SB		 1191 return rv;
1192}
1193
1194/*
1195 * Issue a standby immediate command to the device.
1196 *
1197 * @port Pointer to the port structure.
1198 *
1199 * return value
1200 * 0 Command was executed successfully.
1201 * -1 An error occurred while executing the command.
1202 */
1203static int mtip_standby_immediate(struct mtip_port *port)
1204{
1205 int rv;
1206 struct host_to_dev_fis fis;
d0e0cb97 1207 unsigned long __maybe_unused start;
670a6414 1208 unsigned int timeout;
88523a61 1209
88523a61
SB		 1210 /* Build the FIS. */
1211 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1212 fis.type = 0x27;
1213 fis.opts = 1 << 7;
1214 fis.command = ATA_CMD_STANDBYNOW1;
1215
670a6414
AT		 1216 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1217
f6587217 1218 start = jiffies;
88523a61
SB		 1219 rv = mtip_exec_internal_command(port,
1220 &fis,
1221 5,
1222 0,
1223 0,
1224 0,
670a6414 1225 timeout);
f6587217
AT		 1226 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1227 jiffies_to_msecs(jiffies - start));
1228 if (rv)
1229 dev_warn(&port->dd->pdev->dev,
1230 "STANDBY IMMEDIATE command failed.\n");
1231
1232 return rv;
1233}
1234
1235/*
1236 * Issue a READ LOG EXT command to the device.
1237 *
1238 * @port pointer to the port structure.
1239 * @page page number to fetch
1240 * @buffer pointer to buffer
1241 * @buffer_dma dma address corresponding to @buffer
1242 * @sectors page length to fetch, in sectors
1243 *
1244 * return value
1245 * @rv return value from mtip_exec_internal_command()
1246 */
1247static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1248 dma_addr_t buffer_dma, unsigned int sectors)
1249{
1250 struct host_to_dev_fis fis;
1251
1252 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1253 fis.type = 0x27;
1254 fis.opts = 1 << 7;
1255 fis.command = ATA_CMD_READ_LOG_EXT;
1256 fis.sect_count = sectors & 0xFF;
1257 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1258 fis.lba_low = page;
1259 fis.lba_mid = 0;
1260 fis.device = ATA_DEVICE_OBS;
1261
1262 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1263
1264 return mtip_exec_internal_command(port,
1265 &fis,
1266 5,
1267 buffer_dma,
1268 sectors * ATA_SECT_SIZE,
1269 0,
9b204fbf 1270 MTIP_INT_CMD_TIMEOUT_MS);
f6587217
AT		 1271}
1272
1273/*
1274 * Issue a SMART READ DATA command to the device.
1275 *
1276 * @port pointer to the port structure.
1277 * @buffer pointer to buffer
1278 * @buffer_dma dma address corresponding to @buffer
1279 *
1280 * return value
1281 * @rv return value from mtip_exec_internal_command()
1282 */
1283static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1284 dma_addr_t buffer_dma)
1285{
1286 struct host_to_dev_fis fis;
1287
1288 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1289 fis.type = 0x27;
1290 fis.opts = 1 << 7;
1291 fis.command = ATA_CMD_SMART;
1292 fis.features = 0xD0;
1293 fis.sect_count = 1;
1294 fis.lba_mid = 0x4F;
1295 fis.lba_hi = 0xC2;
1296 fis.device = ATA_DEVICE_OBS;
1297
1298 return mtip_exec_internal_command(port,
1299 &fis,
1300 5,
1301 buffer_dma,
1302 ATA_SECT_SIZE,
1303 0,
88523a61 1304 15000);
f6587217
AT		 1305}
1306
1307/*
1308 * Get the value of a smart attribute
1309 *
1310 * @port pointer to the port structure
1311 * @id attribute number
1312 * @attrib pointer to return attrib information corresponding to @id
1313 *
1314 * return value
1315 * -EINVAL NULL buffer passed or unsupported attribute @id.
1316 * -EPERM Identify data not valid, SMART not supported or not enabled
1317 */
1318static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1319 struct smart_attr *attrib)
1320{
1321 int rv, i;
1322 struct smart_attr *pattr;
1323
1324 if (!attrib)
1325 return -EINVAL;
1326
1327 if (!port->identify_valid) {
1328 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1329 return -EPERM;
1330 }
1331 if (!(port->identify[82] & 0x1)) {
1332 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1333 return -EPERM;
1334 }
1335 if (!(port->identify[85] & 0x1)) {
1336 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1337 return -EPERM;
1338 }
1339
1340 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1341 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1342 if (rv) {
1343 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1344 return rv;
1345 }
1346
1347 pattr = (struct smart_attr *)(port->smart_buf + 2);
1348 for (i = 0; i < 29; i++, pattr++)
1349 if (pattr->attr_id == id) {
1350 memcpy(attrib, pattr, sizeof(struct smart_attr));
1351 break;
1352 }
1353
1354 if (i == 29) {
1355 dev_warn(&port->dd->pdev->dev,
1356 "Query for invalid SMART attribute ID\n");
1357 rv = -EINVAL;
1358 }
88523a61 1359
88523a61
SB		 1360 return rv;
1361}
1362
1363/*
1364 * Get the drive capacity.
1365 *
1366 * @dd Pointer to the device data structure.
1367 * @sectors Pointer to the variable that will receive the sector count.
1368 *
1369 * return value
1370 * 1 Capacity was returned successfully.
1371 * 0 The identify information is invalid.
1372 */
6316668f 1373static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
88523a61
SB		 1374{
1375 struct mtip_port *port = dd->port;
1376 u64 total, raw0, raw1, raw2, raw3;
1377 raw0 = port->identify[100];
1378 raw1 = port->identify[101];
1379 raw2 = port->identify[102];
1380 raw3 = port->identify[103];
1381 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1382 *sectors = total;
1383 return (bool) !!port->identify_valid;
1384}
1385
88523a61
SB		 1386/*
1387 * Display the identify command data.
1388 *
1389 * @port Pointer to the port data structure.
1390 *
1391 * return value
1392 * None
1393 */
1394static void mtip_dump_identify(struct mtip_port *port)
1395{
1396 sector_t sectors;
1397 unsigned short revid;
1398 char cbuf[42];
1399
1400 if (!port->identify_valid)
1401 return;
1402
1403 strlcpy(cbuf, (char *)(port->identify+10), 21);
1404 dev_info(&port->dd->pdev->dev,
1405 "Serial No.: %s\n", cbuf);
1406
1407 strlcpy(cbuf, (char *)(port->identify+23), 9);
1408 dev_info(&port->dd->pdev->dev,
1409 "Firmware Ver.: %s\n", cbuf);
1410
1411 strlcpy(cbuf, (char *)(port->identify+27), 41);
1412 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1413
26d58057
SB		 1414 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1415 port->identify[128],
1416 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1417
88523a61
SB		 1418 if (mtip_hw_get_capacity(port->dd, &sectors))
1419 dev_info(&port->dd->pdev->dev,
1420 "Capacity: %llu sectors (%llu MB)\n",
1421 (u64)sectors,
1422 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1423
1424 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
60ec0eec 1425 switch (revid & 0xFF) {
88523a61
SB		 1426 case 0x1:
1427 strlcpy(cbuf, "A0", 3);
1428 break;
1429 case 0x3:
1430 strlcpy(cbuf, "A2", 3);
1431 break;
1432 default:
1433 strlcpy(cbuf, "?", 2);
1434 break;
1435 }
1436 dev_info(&port->dd->pdev->dev,
1437 "Card Type: %s\n", cbuf);
1438}
1439
1440/*
1441 * Map the commands scatter list into the command table.
1442 *
1443 * @command Pointer to the command.
1444 * @nents Number of scatter list entries.
1445 *
1446 * return value
1447 * None
1448 */
1449static inline void fill_command_sg(struct driver_data *dd,
1450 struct mtip_cmd *command,
1451 int nents)
1452{
1453 int n;
1454 unsigned int dma_len;
1455 struct mtip_cmd_sg *command_sg;
27d420bc 1456 struct scatterlist *sg;
88523a61
SB		 1457
1458 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1459
27d420bc 1460 for_each_sg(command->sg, sg, nents, n) {
88523a61
SB		 1461 dma_len = sg_dma_len(sg);
1462 if (dma_len > 0x400000)
1463 dev_err(&dd->pdev->dev,
1464 "DMA segment length truncated\n");
449a15d9
CH		 1465 command_sg->info = cpu_to_le32((dma_len-1) & 0x3FFFFF);
1466 command_sg->dba = cpu_to_le32(sg_dma_address(sg));
1467 command_sg->dba_upper =
60ec0eec 1468 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
88523a61 1469 command_sg++;
88523a61
SB		 1470 }
1471}
1472
1473/*
1474 * @brief Execute a drive command.
1475 *
1476 * return value 0 The command completed successfully.
1477 * return value -1 An error occurred while executing the command.
1478 */
6316668f 1479static int exec_drive_task(struct mtip_port *port, u8 *command)
88523a61
SB		 1480{
1481 struct host_to_dev_fis fis;
1482 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
9b204fbf 1483 unsigned int to;
88523a61 1484
88523a61
SB		 1485 /* Build the FIS. */
1486 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1487 fis.type = 0x27;
1488 fis.opts = 1 << 7;
1489 fis.command = command[0];
1490 fis.features = command[1];
1491 fis.sect_count = command[2];
1492 fis.sector = command[3];
1493 fis.cyl_low = command[4];
1494 fis.cyl_hi = command[5];
1495 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1496
9b204fbf
AT		 1497 mtip_set_timeout(port->dd, &fis, &to, 0);
1498
c74b0f58 1499 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
88523a61
SB		 1500 __func__,
1501 command[0],
1502 command[1],
1503 command[2],
1504 command[3],
1505 command[4],
1506 command[5],
1507 command[6]);
1508
1509 /* Execute the command. */
1510 if (mtip_exec_internal_command(port,
1511 &fis,
1512 5,
1513 0,
1514 0,
1515 0,
9b204fbf 1516 to) < 0) {
88523a61
SB		 1517 return -1;
1518 }
1519
1520 command[0] = reply->command; /* Status*/
1521 command[1] = reply->features; /* Error*/
1522 command[4] = reply->cyl_low;
1523 command[5] = reply->cyl_hi;
1524
c74b0f58 1525 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
88523a61
SB		 1526 __func__,
1527 command[0],
1528 command[1],
1529 command[4],
1530 command[5]);
1531
88523a61
SB		 1532 return 0;
1533}
1534
1535/*
1536 * @brief Execute a drive command.
1537 *
1538 * @param port Pointer to the port data structure.
1539 * @param command Pointer to the user specified command parameters.
1540 * @param user_buffer Pointer to the user space buffer where read sector
1541 * data should be copied.
1542 *
1543 * return value 0 The command completed successfully.
1544 * return value -EFAULT An error occurred while copying the completion
1545 * data to the user space buffer.
1546 * return value -1 An error occurred while executing the command.
1547 */
6316668f
JA		 1548static int exec_drive_command(struct mtip_port *port, u8 *command,
1549 void __user *user_buffer)
88523a61
SB		 1550{
1551 struct host_to_dev_fis fis;
e602878f
AT		 1552 struct host_to_dev_fis *reply;
1553 u8 *buf = NULL;
1554 dma_addr_t dma_addr = 0;
1555 int rv = 0, xfer_sz = command[3];
9b204fbf 1556 unsigned int to;
e602878f
AT		 1557
1558 if (xfer_sz) {
97651ea6 1559 if (!user_buffer)
e602878f
AT		 1560 return -EFAULT;
1561
22cb4e68 1562 buf = dma_alloc_coherent(&port->dd->pdev->dev,
e602878f
AT		 1563 ATA_SECT_SIZE * xfer_sz,
1564 &dma_addr,
1565 GFP_KERNEL);
1566 if (!buf) {
1567 dev_err(&port->dd->pdev->dev,
1568 "Memory allocation failed (%d bytes)\n",
1569 ATA_SECT_SIZE * xfer_sz);
1570 return -ENOMEM;
1571 }
e602878f 1572 }
88523a61 1573
88523a61
SB		 1574 /* Build the FIS. */
1575 memset(&fis, 0, sizeof(struct host_to_dev_fis));
e602878f
AT		 1576 fis.type = 0x27;
1577 fis.opts = 1 << 7;
1578 fis.command = command[0];
88523a61
SB		 1579 fis.features = command[2];
1580 fis.sect_count = command[3];
1581 if (fis.command == ATA_CMD_SMART) {
1582 fis.sector = command[1];
60ec0eec
AT		 1583 fis.cyl_low = 0x4F;
1584 fis.cyl_hi = 0xC2;
88523a61
SB		 1585 }
1586
9b204fbf
AT		 1587 mtip_set_timeout(port->dd, &fis, &to, 0);
1588
e602878f
AT		 1589 if (xfer_sz)
1590 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1591 else
1592 reply = (port->rxfis + RX_FIS_D2H_REG);
1593
88523a61 1594 dbg_printk(MTIP_DRV_NAME
c74b0f58 1595 " %s: User Command: cmd %x, sect %x, "
88523a61
SB		 1596 "feat %x, sectcnt %x\n",
1597 __func__,
1598 command[0],
1599 command[1],
1600 command[2],
1601 command[3]);
1602
88523a61
SB		 1603 /* Execute the command. */
1604 if (mtip_exec_internal_command(port,
1605 &fis,
1606 5,
e602878f
AT		 1607 (xfer_sz ? dma_addr : 0),
1608 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
88523a61 1609 0,
9b204fbf 1610 to)
88523a61 1611 < 0) {
e602878f
AT		 1612 rv = -EFAULT;
1613 goto exit_drive_command;
88523a61
SB		 1614 }
1615
1616 /* Collect the completion status. */
1617 command[0] = reply->command; /* Status*/
1618 command[1] = reply->features; /* Error*/
e602878f 1619 command[2] = reply->sect_count;
88523a61
SB		 1620
1621 dbg_printk(MTIP_DRV_NAME
c74b0f58 1622 " %s: Completion Status: stat %x, "
e602878f 1623 "err %x, nsect %x\n",
88523a61
SB		 1624 __func__,
1625 command[0],
1626 command[1],
1627 command[2]);
1628
e602878f 1629 if (xfer_sz) {
88523a61 1630 if (copy_to_user(user_buffer,
e602878f 1631 buf,
88523a61 1632 ATA_SECT_SIZE * command[3])) {
e602878f
AT		 1633 rv = -EFAULT;
1634 goto exit_drive_command;
88523a61
SB		 1635 }
1636 }
e602878f
AT		 1637exit_drive_command:
1638 if (buf)
22cb4e68 1639 dma_free_coherent(&port->dd->pdev->dev,
e602878f
AT		 1640 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1641 return rv;
88523a61
SB		 1642}
1643
1644/*
1645 * Indicates whether a command has a single sector payload.
1646 *
1647 * @command passed to the device to perform the certain event.
1648 * @features passed to the device to perform the certain event.
1649 *
1650 * return value
1651 * 1 command is one that always has a single sector payload,
1652 * regardless of the value in the Sector Count field.
1653 * 0 otherwise
1654 *
1655 */
1656static unsigned int implicit_sector(unsigned char command,
1657 unsigned char features)
1658{
1659 unsigned int rv = 0;
1660
1661 /* list of commands that have an implicit sector count of 1 */
1662 switch (command) {
60ec0eec
AT		 1663 case ATA_CMD_SEC_SET_PASS:
1664 case ATA_CMD_SEC_UNLOCK:
1665 case ATA_CMD_SEC_ERASE_PREP:
1666 case ATA_CMD_SEC_ERASE_UNIT:
1667 case ATA_CMD_SEC_FREEZE_LOCK:
1668 case ATA_CMD_SEC_DISABLE_PASS:
1669 case ATA_CMD_PMP_READ:
1670 case ATA_CMD_PMP_WRITE:
88523a61
SB		 1671 rv = 1;
1672 break;
60ec0eec
AT		 1673 case ATA_CMD_SET_MAX:
1674 if (features == ATA_SET_MAX_UNLOCK)
88523a61
SB		 1675 rv = 1;
1676 break;
60ec0eec
AT		 1677 case ATA_CMD_SMART:
1678 if ((features == ATA_SMART_READ_VALUES) ||
1679 (features == ATA_SMART_READ_THRESHOLDS))
88523a61
SB		 1680 rv = 1;
1681 break;
60ec0eec
AT		 1682 case ATA_CMD_CONF_OVERLAY:
1683 if ((features == ATA_DCO_IDENTIFY) ||
1684 (features == ATA_DCO_SET))
88523a61
SB		 1685 rv = 1;
1686 break;
1687 }
1688 return rv;
1689}
2df7aa96 1690
88523a61
SB		 1691/*
1692 * Executes a taskfile
1693 * See ide_taskfile_ioctl() for derivation
1694 */
1695static int exec_drive_taskfile(struct driver_data *dd,
ef0f1587
JA		 1696 void __user *buf,
1697 ide_task_request_t *req_task,
1698 int outtotal)
88523a61
SB		 1699{
1700 struct host_to_dev_fis fis;
1701 struct host_to_dev_fis *reply;
88523a61
SB		 1702 u8 *outbuf = NULL;
1703 u8 *inbuf = NULL;
16d02c04
JA		 1704 dma_addr_t outbuf_dma = 0;
1705 dma_addr_t inbuf_dma = 0;
1706 dma_addr_t dma_buffer = 0;
88523a61 1707 int err = 0;
88523a61
SB		 1708 unsigned int taskin = 0;
1709 unsigned int taskout = 0;
1710 u8 nsect = 0;
2df7aa96 1711 unsigned int timeout;
88523a61
SB		 1712 unsigned int force_single_sector;
1713 unsigned int transfer_size;
1714 unsigned long task_file_data;
ef0f1587 1715 int intotal = outtotal + req_task->out_size;
4453bc88 1716 int erasemode = 0;
88523a61
SB		 1717
1718 taskout = req_task->out_size;
1719 taskin = req_task->in_size;
1720 /* 130560 = 512 * 0xFF*/
b425b020
SS		 1721 if (taskin > 130560 || taskout > 130560)
1722 return -EINVAL;
88523a61
SB		 1723
1724 if (taskout) {
8ed6010d 1725 outbuf = memdup_user(buf + outtotal, taskout);
b425b020
SS		 1726 if (IS_ERR(outbuf))
1727 return PTR_ERR(outbuf);
1728
ee75fa2a
CH		 1729 outbuf_dma = dma_map_single(&dd->pdev->dev, outbuf,
1730 taskout, DMA_TO_DEVICE);
1731 if (dma_mapping_error(&dd->pdev->dev, outbuf_dma)) {
88523a61
SB		 1732 err = -ENOMEM;
1733 goto abort;
1734 }
1735 dma_buffer = outbuf_dma;
1736 }
1737
1738 if (taskin) {
8ed6010d
AV		 1739 inbuf = memdup_user(buf + intotal, taskin);
1740 if (IS_ERR(inbuf)) {
1741 err = PTR_ERR(inbuf);
1742 inbuf = NULL;
88523a61
SB		 1743 goto abort;
1744 }
ee75fa2a
CH		 1745 inbuf_dma = dma_map_single(&dd->pdev->dev, inbuf,
1746 taskin, DMA_FROM_DEVICE);
1747 if (dma_mapping_error(&dd->pdev->dev, inbuf_dma)) {
88523a61
SB		 1748 err = -ENOMEM;
1749 goto abort;
1750 }
1751 dma_buffer = inbuf_dma;
1752 }
1753
1754 /* only supports PIO and non-data commands from this ioctl. */
1755 switch (req_task->data_phase) {
1756 case TASKFILE_OUT:
1757 nsect = taskout / ATA_SECT_SIZE;
1758 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1759 break;
1760 case TASKFILE_IN:
1761 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
1762 break;
1763 case TASKFILE_NO_DATA:
1764 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
1765 break;
1766 default:
1767 err = -EINVAL;
1768 goto abort;
1769 }
1770
88523a61
SB		 1771 /* Build the FIS. */
1772 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1773
1774 fis.type = 0x27;
1775 fis.opts = 1 << 7;
1776 fis.command = req_task->io_ports[7];
1777 fis.features = req_task->io_ports[1];
1778 fis.sect_count = req_task->io_ports[2];
1779 fis.lba_low = req_task->io_ports[3];
1780 fis.lba_mid = req_task->io_ports[4];
1781 fis.lba_hi = req_task->io_ports[5];
1782 /* Clear the dev bit*/
1783 fis.device = req_task->io_ports[6] & ~0x10;
1784
1785 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
1786 req_task->in_flags.all =
1787 IDE_TASKFILE_STD_IN_FLAGS |
1788 (IDE_HOB_STD_IN_FLAGS << 8);
1789 fis.lba_low_ex = req_task->hob_ports[3];
1790 fis.lba_mid_ex = req_task->hob_ports[4];
1791 fis.lba_hi_ex = req_task->hob_ports[5];
1792 fis.features_ex = req_task->hob_ports[1];
1793 fis.sect_cnt_ex = req_task->hob_ports[2];
1794
1795 } else {
1796 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
1797 }
1798
1799 force_single_sector = implicit_sector(fis.command, fis.features);
1800
1801 if ((taskin || taskout) && (!fis.sect_count)) {
1802 if (nsect)
1803 fis.sect_count = nsect;
1804 else {
1805 if (!force_single_sector) {
1806 dev_warn(&dd->pdev->dev,
1807 "data movement but "
1808 "sect_count is 0\n");
698b53b3
CIK		 1809 err = -EINVAL;
1810 goto abort;
88523a61
SB		 1811 }
1812 }
1813 }
1814
1815 dbg_printk(MTIP_DRV_NAME
c74b0f58 1816 " %s: cmd %x, feat %x, nsect %x,"
88523a61
SB		 1817 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
1818 " head/dev %x\n",
c74b0f58 1819 __func__,
88523a61
SB		 1820 fis.command,
1821 fis.features,
1822 fis.sect_count,
1823 fis.lba_low,
1824 fis.lba_mid,
1825 fis.lba_hi,
1826 fis.device);
1827
4453bc88 1828 /* check for erase mode support during secure erase.*/
3208795e
SM		 1829 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
1830 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
4453bc88
SM		 1831 erasemode = 1;
1832 }
1833
1834 mtip_set_timeout(dd, &fis, &timeout, erasemode);
88523a61
SB		 1835
1836 /* Determine the correct transfer size.*/
1837 if (force_single_sector)
1838 transfer_size = ATA_SECT_SIZE;
1839 else
1840 transfer_size = ATA_SECT_SIZE * fis.sect_count;
1841
1842 /* Execute the command.*/
1843 if (mtip_exec_internal_command(dd->port,
1844 &fis,
1845 5,
1846 dma_buffer,
1847 transfer_size,
1848 0,
88523a61 1849 timeout) < 0) {
88523a61
SB		 1850 err = -EIO;
1851 goto abort;
1852 }
1853
1854 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
1855
1856 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
1857 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
1858 req_task->io_ports[7] = reply->control;
1859 } else {
1860 reply = dd->port->rxfis + RX_FIS_D2H_REG;
1861 req_task->io_ports[7] = reply->command;
1862 }
1863
1864 /* reclaim the DMA buffers.*/
1865 if (inbuf_dma)
ee75fa2a
CH		 1866 dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
1867 DMA_FROM_DEVICE);
88523a61 1868 if (outbuf_dma)
ee75fa2a
CH		 1869 dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
1870 DMA_TO_DEVICE);
16d02c04
JA		 1871 inbuf_dma = 0;
1872 outbuf_dma = 0;
88523a61
SB		 1873
1874 /* return the ATA registers to the caller.*/
1875 req_task->io_ports[1] = reply->features;
1876 req_task->io_ports[2] = reply->sect_count;
1877 req_task->io_ports[3] = reply->lba_low;
1878 req_task->io_ports[4] = reply->lba_mid;
1879 req_task->io_ports[5] = reply->lba_hi;
1880 req_task->io_ports[6] = reply->device;
1881
1882 if (req_task->out_flags.all & 1) {
1883
1884 req_task->hob_ports[3] = reply->lba_low_ex;
1885 req_task->hob_ports[4] = reply->lba_mid_ex;
1886 req_task->hob_ports[5] = reply->lba_hi_ex;
1887 req_task->hob_ports[1] = reply->features_ex;
1888 req_task->hob_ports[2] = reply->sect_cnt_ex;
1889 }
88523a61 1890 dbg_printk(MTIP_DRV_NAME
c74b0f58 1891 " %s: Completion: stat %x,"
88523a61
SB		 1892 "err %x, sect_cnt %x, lbalo %x,"
1893 "lbamid %x, lbahi %x, dev %x\n",
1894 __func__,
1895 req_task->io_ports[7],
1896 req_task->io_ports[1],
1897 req_task->io_ports[2],
1898 req_task->io_ports[3],
1899 req_task->io_ports[4],
1900 req_task->io_ports[5],
1901 req_task->io_ports[6]);
1902
88523a61
SB		 1903 if (taskout) {
1904 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
1905 err = -EFAULT;
1906 goto abort;
1907 }
1908 }
1909 if (taskin) {
1910 if (copy_to_user(buf + intotal, inbuf, taskin)) {
1911 err = -EFAULT;
1912 goto abort;
1913 }
1914 }
1915abort:
1916 if (inbuf_dma)
ee75fa2a
CH		 1917 dma_unmap_single(&dd->pdev->dev, inbuf_dma, taskin,
1918 DMA_FROM_DEVICE);
88523a61 1919 if (outbuf_dma)
ee75fa2a
CH		 1920 dma_unmap_single(&dd->pdev->dev, outbuf_dma, taskout,
1921 DMA_TO_DEVICE);
88523a61
SB		 1922 kfree(outbuf);
1923 kfree(inbuf);
1924
1925 return err;
1926}
1927
1928/*
1929 * Handle IOCTL calls from the Block Layer.
1930 *
1931 * This function is called by the Block Layer when it receives an IOCTL
1932 * command that it does not understand. If the IOCTL command is not supported
1933 * this function returns -ENOTTY.
1934 *
1935 * @dd Pointer to the driver data structure.
1936 * @cmd IOCTL command passed from the Block Layer.
1937 * @arg IOCTL argument passed from the Block Layer.
1938 *
1939 * return value
1940 * 0 The IOCTL completed successfully.
1941 * -ENOTTY The specified command is not supported.
1942 * -EFAULT An error occurred copying data to a user space buffer.
1943 * -EIO An error occurred while executing the command.
1944 */
ef0f1587
JA		 1945static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
1946 unsigned long arg)
88523a61
SB		 1947{
1948 switch (cmd) {
1949 case HDIO_GET_IDENTITY:
971890f2
AT		 1950 {
1951 if (copy_to_user((void __user *)arg, dd->port->identify,
1952 sizeof(u16) * ATA_ID_WORDS))
1953 return -EFAULT;
88523a61 1954 break;
971890f2 1955 }
88523a61
SB		 1956 case HDIO_DRIVE_CMD:
1957 {
1958 u8 drive_command[4];
1959
1960 /* Copy the user command info to our buffer. */
1961 if (copy_from_user(drive_command,
1962 (void __user *) arg,
1963 sizeof(drive_command)))
1964 return -EFAULT;
1965
1966 /* Execute the drive command. */
1967 if (exec_drive_command(dd->port,
1968 drive_command,
1969 (void __user *) (arg+4)))
1970 return -EIO;
1971
1972 /* Copy the status back to the users buffer. */
1973 if (copy_to_user((void __user *) arg,
1974 drive_command,
1975 sizeof(drive_command)))
1976 return -EFAULT;
1977
1978 break;
1979 }
1980 case HDIO_DRIVE_TASK:
1981 {
1982 u8 drive_command[7];
1983
1984 /* Copy the user command info to our buffer. */
1985 if (copy_from_user(drive_command,
1986 (void __user *) arg,
1987 sizeof(drive_command)))
1988 return -EFAULT;
1989
1990 /* Execute the drive command. */
1991 if (exec_drive_task(dd->port, drive_command))
1992 return -EIO;
1993
1994 /* Copy the status back to the users buffer. */
1995 if (copy_to_user((void __user *) arg,
1996 drive_command,
1997 sizeof(drive_command)))
1998 return -EFAULT;
1999
2000 break;
2001 }
ef0f1587
JA		 2002 case HDIO_DRIVE_TASKFILE: {
2003 ide_task_request_t req_task;
2004 int ret, outtotal;
2005
2006 if (copy_from_user(&req_task, (void __user *) arg,
2007 sizeof(req_task)))
2008 return -EFAULT;
2009
2010 outtotal = sizeof(req_task);
2011
2012 ret = exec_drive_taskfile(dd, (void __user *) arg,
2013 &req_task, outtotal);
2014
60ec0eec
AT		 2015 if (copy_to_user((void __user *) arg, &req_task,
2016 sizeof(req_task)))
ef0f1587
JA		 2017 return -EFAULT;
2018
2019 return ret;
2020 }
88523a61
SB		 2021
2022 default:
2023 return -EINVAL;
2024 }
2025 return 0;
2026}
2027
2028/*
2029 * Submit an IO to the hw
2030 *
2031 * This function is called by the block layer to issue an io
2032 * to the device. Upon completion, the callback function will
2033 * be called with the data parameter passed as the callback data.
2034 *
2035 * @dd Pointer to the driver data structure.
2036 * @start First sector to read.
2037 * @nsect Number of sectors to read.
88523a61
SB		 2038 * @tag The tag of this read command.
2039 * @callback Pointer to the function that should be called
2040 * when the read completes.
2041 * @data Callback data passed to the callback function
2042 * when the read completes.
88523a61
SB		 2043 * @dir Direction (read or write)
2044 *
2045 * return value
2046 * None
2047 */
ffc771b3 2048static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
b5fa0e9e 2049 struct mtip_cmd *command,
ffc771b3 2050 struct blk_mq_hw_ctx *hctx)
88523a61 2051{
7bbf118f
CH		 2052 struct mtip_cmd_hdr *hdr =
2053 dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag;
88523a61
SB		 2054 struct host_to_dev_fis *fis;
2055 struct mtip_port *port = dd->port;
ffc771b3
JA		 2056 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2057 u64 start = blk_rq_pos(rq);
2058 unsigned int nsect = blk_rq_sectors(rq);
b5fa0e9e 2059 unsigned int nents;
88523a61
SB		 2060
2061 /* Map the scatter list for DMA access */
b5fa0e9e 2062 nents = blk_rq_map_sg(hctx->queue, rq, command->sg);
45038367 2063 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
88523a61 2064
f45c40a9
SB		 2065 prefetch(&port->flags);
2066
88523a61
SB		 2067 command->scatter_ents = nents;
2068
2069 /*
2070 * The number of retries for this command before it is
2071 * reported as a failure to the upper layers.
2072 */
2073 command->retries = MTIP_MAX_RETRIES;
2074
2075 /* Fill out fis */
2076 fis = command->command;
2077 fis->type = 0x27;
2078 fis->opts = 1 << 7;
f45c40a9 2079 if (dma_dir == DMA_FROM_DEVICE)
ffc771b3
JA		 2080 fis->command = ATA_CMD_FPDMA_READ;
2081 else
2082 fis->command = ATA_CMD_FPDMA_WRITE;
eda45314
SM		 2083 fis->lba_low = start & 0xFF;
2084 fis->lba_mid = (start >> 8) & 0xFF;
2085 fis->lba_hi = (start >> 16) & 0xFF;
2086 fis->lba_low_ex = (start >> 24) & 0xFF;
2087 fis->lba_mid_ex = (start >> 32) & 0xFF;
2088 fis->lba_hi_ex = (start >> 40) & 0xFF;
88523a61 2089 fis->device = 1 << 6;
60ec0eec
AT		 2090 fis->features = nsect & 0xFF;
2091 fis->features_ex = (nsect >> 8) & 0xFF;
ffc771b3 2092 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
88523a61
SB		 2093 fis->sect_cnt_ex = 0;
2094 fis->control = 0;
2095 fis->res2 = 0;
2096 fis->res3 = 0;
2097 fill_command_sg(dd, command, nents);
2098
f45c40a9 2099 if (unlikely(command->unaligned))
2077d947
AT		 2100 fis->device |= 1 << 7;
2101
88523a61 2102 /* Populate the command header */
7bbf118f
CH		 2103 hdr->ctba = cpu_to_le32(command->command_dma & 0xFFFFFFFF);
2104 if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
2105 hdr->ctbau = cpu_to_le32((command->command_dma >> 16) >> 16);
2106 hdr->opts = cpu_to_le32((nents << 16) | 5 | AHCI_CMD_PREFETCH);
2107 hdr->byte_count = 0;
88523a61 2108
45038367 2109 command->direction = dma_dir;
88523a61 2110
88523a61 2111 /*
60ec0eec
AT		 2112 * To prevent this command from being issued
2113 * if an internal command is in progress or error handling is active.
88523a61 2114 */
f45c40a9 2115 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
ffc771b3 2116 set_bit(rq->tag, port->cmds_to_issue);
8a857a88 2117 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
60ec0eec
AT		 2118 return;
2119 }
88523a61
SB		 2120
2121 /* Issue the command to the hardware */
ffc771b3 2122 mtip_issue_ncq_command(port, rq->tag);
88523a61
SB		 2123}
2124
2125/*
7412ff13 2126 * Sysfs status dump.
88523a61
SB		 2127 *
2128 * @dev Pointer to the device structure, passed by the kernrel.
2129 * @attr Pointer to the device_attribute structure passed by the kernel.
2130 * @buf Pointer to the char buffer that will receive the stats info.
2131 *
2132 * return value
2133 * The size, in bytes, of the data copied into buf.
2134 */
f6587217
AT		 2135static ssize_t mtip_hw_show_status(struct device *dev,
2136 struct device_attribute *attr,
2137 char *buf)
2138{
2139 struct driver_data *dd = dev_to_disk(dev)->private_data;
2140 int size = 0;
2141
8a857a88 2142 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
f6587217 2143 size += sprintf(buf, "%s", "thermal_shutdown\n");
8a857a88 2144 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
f6587217
AT		 2145 size += sprintf(buf, "%s", "write_protect\n");
2146 else
2147 size += sprintf(buf, "%s", "online\n");
2148
2149 return size;
2150}
2151
5657a819 2152static DEVICE_ATTR(status, 0444, mtip_hw_show_status, NULL);
88523a61 2153
d2efa81d
CH		 2154static struct attribute *mtip_disk_attrs[] = {
2155 &dev_attr_status.attr,
2156 NULL,
2157};
2158
2159static const struct attribute_group mtip_disk_attr_group = {
2160 .attrs = mtip_disk_attrs,
2161};
2162
2163static const struct attribute_group *mtip_disk_attr_groups[] = {
2164 &mtip_disk_attr_group,
2165 NULL,
2166};
2167
7b421d24
AT		 2168static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2169 size_t len, loff_t *offset)
2170{
2171 struct driver_data *dd = (struct driver_data *)f->private_data;
c8afd0dc 2172 char *buf;
7b421d24
AT		 2173 u32 group_allocated;
2174 int size = *offset;
c8afd0dc 2175 int n, rv = 0;
7b421d24
AT		 2176
2177 if (!len || size)
2178 return 0;
2179
c8afd0dc 2180 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
ce9a8ca6 2181 if (!buf)
c8afd0dc 2182 return -ENOMEM;
c8afd0dc 2183
7b421d24
AT		 2184 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2185
2186 for (n = dd->slot_groups-1; n >= 0; n--)
2187 size += sprintf(&buf[size], "%08X ",
2188 readl(dd->port->s_active[n]));
2189
2190 size += sprintf(&buf[size], "]\n");
2191 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2192
2193 for (n = dd->slot_groups-1; n >= 0; n--)
2194 size += sprintf(&buf[size], "%08X ",
2195 readl(dd->port->cmd_issue[n]));
2196
2197 size += sprintf(&buf[size], "]\n");
2198 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2199
2200 for (n = dd->slot_groups-1; n >= 0; n--)
2201 size += sprintf(&buf[size], "%08X ",
2202 readl(dd->port->completed[n]));
2203
2204 size += sprintf(&buf[size], "]\n");
2205 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2206 readl(dd->port->mmio + PORT_IRQ_STAT));
2207 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2208 readl(dd->mmio + HOST_IRQ_STAT));
2209 size += sprintf(&buf[size], "\n");
2210
7b421d24
AT		 2211 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2212
2213 for (n = dd->slot_groups-1; n >= 0; n--) {
2214 if (sizeof(long) > sizeof(u32))
2215 group_allocated =
2216 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2217 else
2218 group_allocated = dd->port->cmds_to_issue[n];
2219 size += sprintf(&buf[size], "%08X ", group_allocated);
2220 }
2221 size += sprintf(&buf[size], "]\n");
2222
2223 *offset = size <= len ? size : len;
2224 size = copy_to_user(ubuf, buf, *offset);
2225 if (size)
c8afd0dc 2226 rv = -EFAULT;
7b421d24 2227
c8afd0dc
DM		 2228 kfree(buf);
2229 return rv ? rv : *offset;
7b421d24
AT		 2230}
2231
2232static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2233 size_t len, loff_t *offset)
2234{
2235 struct driver_data *dd = (struct driver_data *)f->private_data;
c8afd0dc 2236 char *buf;
7b421d24 2237 int size = *offset;
c8afd0dc 2238 int rv = 0;
7b421d24
AT		 2239
2240 if (!len || size)
2241 return 0;
2242
c8afd0dc 2243 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
ce9a8ca6 2244 if (!buf)
c8afd0dc 2245 return -ENOMEM;
c8afd0dc 2246
7b421d24
AT		 2247 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2248 dd->port->flags);
2249 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2250 dd->dd_flag);
2251
2252 *offset = size <= len ? size : len;
2253 size = copy_to_user(ubuf, buf, *offset);
2254 if (size)
c8afd0dc 2255 rv = -EFAULT;
7b421d24 2256
c8afd0dc
DM		 2257 kfree(buf);
2258 return rv ? rv : *offset;
7b421d24
AT		 2259}
2260
2261static const struct file_operations mtip_regs_fops = {
2262 .owner = THIS_MODULE,
2263 .open = simple_open,
2264 .read = mtip_hw_read_registers,
2265 .llseek = no_llseek,
2266};
2267
2268static const struct file_operations mtip_flags_fops = {
2269 .owner = THIS_MODULE,
2270 .open = simple_open,
2271 .read = mtip_hw_read_flags,
2272 .llseek = no_llseek,
2273};
2274
7b421d24
AT		 2275static int mtip_hw_debugfs_init(struct driver_data *dd)
2276{
2277 if (!dfs_parent)
2278 return -1;
2279
2280 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2281 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2282 dev_warn(&dd->pdev->dev,
2283 "Error creating node %s under debugfs\n",
2284 dd->disk->disk_name);
2285 dd->dfs_node = NULL;
2286 return -1;
2287 }
2288
5657a819
JP		 2289 debugfs_create_file("flags", 0444, dd->dfs_node, dd, &mtip_flags_fops);
2290 debugfs_create_file("registers", 0444, dd->dfs_node, dd,
2291 &mtip_regs_fops);
7b421d24
AT		 2292
2293 return 0;
2294}
2295
2296static void mtip_hw_debugfs_exit(struct driver_data *dd)
2297{
d5fcc4e4 2298 debugfs_remove_recursive(dd->dfs_node);
7b421d24
AT		 2299}
2300
88523a61
SB		 2301/*
2302 * Perform any init/resume time hardware setup
2303 *
2304 * @dd Pointer to the driver data structure.
2305 *
2306 * return value
2307 * None
2308 */
2309static inline void hba_setup(struct driver_data *dd)
2310{
2311 u32 hwdata;
2312 hwdata = readl(dd->mmio + HOST_HSORG);
2313
2314 /* interrupt bug workaround: use only 1 IS bit.*/
2315 writel(hwdata |
2316 HSORG_DISABLE_SLOTGRP_INTR |
2317 HSORG_DISABLE_SLOTGRP_PXIS,
2318 dd->mmio + HOST_HSORG);
2319}
2320
2077d947
AT		 2321static int mtip_device_unaligned_constrained(struct driver_data *dd)
2322{
2323 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2324}
2325
88523a61
SB		 2326/*
2327 * Detect the details of the product, and store anything needed
2328 * into the driver data structure. This includes product type and
2329 * version and number of slot groups.
2330 *
2331 * @dd Pointer to the driver data structure.
2332 *
2333 * return value
2334 * None
2335 */
2336static void mtip_detect_product(struct driver_data *dd)
2337{
2338 u32 hwdata;
2339 unsigned int rev, slotgroups;
2340
2341 /*
2342 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2343 * info register:
2344 * [15:8] hardware/software interface rev#
2345 * [ 3] asic-style interface
2346 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2347 */
2348 hwdata = readl(dd->mmio + HOST_HSORG);
2349
2350 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2351 dd->slot_groups = 1;
2352
2353 if (hwdata & 0x8) {
2354 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2355 rev = (hwdata & HSORG_HWREV) >> 8;
2356 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2357 dev_info(&dd->pdev->dev,
2358 "ASIC-FPGA design, HS rev 0x%x, "
2359 "%i slot groups [%i slots]\n",
2360 rev,
2361 slotgroups,
2362 slotgroups * 32);
2363
2364 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2365 dev_warn(&dd->pdev->dev,
2366 "Warning: driver only supports "
2367 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2368 slotgroups = MTIP_MAX_SLOT_GROUPS;
2369 }
2370 dd->slot_groups = slotgroups;
2371 return;
2372 }
2373
2374 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2375}
2376
2377/*
2378 * Blocking wait for FTL rebuild to complete
2379 *
2380 * @dd Pointer to the DRIVER_DATA structure.
2381 *
2382 * return value
2383 * 0 FTL rebuild completed successfully
2384 * -EFAULT FTL rebuild error/timeout/interruption
2385 */
2386static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2387{
2388 unsigned long timeout, cnt = 0, start;
2389
2390 dev_warn(&dd->pdev->dev,
2391 "FTL rebuild in progress. Polling for completion.\n");
2392
2393 start = jiffies;
88523a61
SB		 2394 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2395
2396 do {
8a857a88 2397 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367
AT		 2398 &dd->dd_flag)))
2399 return -EFAULT;
9e541f14 2400 if (mtip_check_surprise_removal(dd))
88523a61 2401 return -EFAULT;
60ec0eec 2402
88523a61
SB		 2403 if (mtip_get_identify(dd->port, NULL) < 0)
2404 return -EFAULT;
2405
2406 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2407 MTIP_FTL_REBUILD_MAGIC) {
2408 ssleep(1);
2409 /* Print message every 3 minutes */
2410 if (cnt++ >= 180) {
2411 dev_warn(&dd->pdev->dev,
2412 "FTL rebuild in progress (%d secs).\n",
2413 jiffies_to_msecs(jiffies - start) / 1000);
2414 cnt = 0;
2415 }
2416 } else {
2417 dev_warn(&dd->pdev->dev,
2418 "FTL rebuild complete (%d secs).\n",
2419 jiffies_to_msecs(jiffies - start) / 1000);
62ee8c13 2420 mtip_block_initialize(dd);
45038367 2421 return 0;
88523a61 2422 }
88523a61
SB		 2423 } while (time_before(jiffies, timeout));
2424
2425 /* Check for timeout */
45038367 2426 dev_err(&dd->pdev->dev,
88523a61
SB		 2427 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2428 jiffies_to_msecs(jiffies - start) / 1000);
45038367 2429 return -EFAULT;
88523a61
SB		 2430}
2431
abb0ccd1
ATS		 2432static void mtip_softirq_done_fn(struct request *rq)
2433{
2434 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2435 struct driver_data *dd = rq->q->queuedata;
2436
2437 /* Unmap the DMA scatter list entries */
2438 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2439 cmd->direction);
2440
2441 if (unlikely(cmd->unaligned))
e4025e46 2442 atomic_inc(&dd->port->cmd_slot_unal);
abb0ccd1 2443
4dda4735 2444 blk_mq_end_request(rq, cmd->status);
abb0ccd1
ATS		 2445}
2446
7baa8572 2447static bool mtip_abort_cmd(struct request *req, void *data, bool reserved)
abb0ccd1 2448{
4dda4735 2449 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
abb0ccd1
ATS		 2450 struct driver_data *dd = data;
2451
2452 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2453
2454 clear_bit(req->tag, dd->port->cmds_to_issue);
2a842aca 2455 cmd->status = BLK_STS_IOERR;
abb0ccd1 2456 mtip_softirq_done_fn(req);
7baa8572 2457 return true;
abb0ccd1
ATS		 2458}
2459
7baa8572 2460static bool mtip_queue_cmd(struct request *req, void *data, bool reserved)
abb0ccd1
ATS		 2461{
2462 struct driver_data *dd = data;
2463
2464 set_bit(req->tag, dd->port->cmds_to_issue);
2465 blk_abort_request(req);
7baa8572 2466 return true;
abb0ccd1
ATS		 2467}
2468
60ec0eec
AT		 2469/*
2470 * service thread to issue queued commands
2471 *
2472 * @data Pointer to the driver data structure.
2473 *
2474 * return value
2475 * 0
2476 */
2477
2478static int mtip_service_thread(void *data)
2479{
2480 struct driver_data *dd = (struct driver_data *)data;
abb0ccd1 2481 unsigned long slot, slot_start, slot_wrap, to;
60ec0eec
AT		 2482 unsigned int num_cmd_slots = dd->slot_groups * 32;
2483 struct mtip_port *port = dd->port;
2484
2485 while (1) {
9b204fbf
AT		 2486 if (kthread_should_stop() ||
2487 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2488 goto st_out;
2489 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2490
60ec0eec
AT		 2491 /*
2492 * the condition is to check neither an internal command is
2493 * is in progress nor error handling is active
2494 */
2495 wait_event_interruptible(port->svc_wait, (port->flags) &&
cfc05bd3 2496 (port->flags & MTIP_PF_SVC_THD_WORK));
8f8b8995 2497
9b204fbf
AT		 2498 if (kthread_should_stop() ||
2499 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2500 goto st_out;
2501
8a857a88 2502 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367 2503 &dd->dd_flag)))
8f8b8995 2504 goto st_out;
c74b0f58 2505
cfc05bd3
ATS		 2506 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2507
9b204fbf
AT		 2508restart_eh:
2509 /* Demux bits: start with error handling */
2510 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2511 mtip_handle_tfe(dd);
2512 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2513 }
2514
2515 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2516 goto restart_eh;
2517
abb0ccd1
ATS		 2518 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2519 to = jiffies + msecs_to_jiffies(5000);
2520
2521 do {
2522 mdelay(100);
2523 } while (atomic_read(&dd->irq_workers_active) != 0 &&
2524 time_before(jiffies, to));
2525
2526 if (atomic_read(&dd->irq_workers_active) != 0)
2527 dev_warn(&dd->pdev->dev,
2528 "Completion workers still active!");
2529
436c15ab
SG		 2530 blk_mq_quiesce_queue(dd->queue);
2531
39795d65 2532 blk_mq_tagset_busy_iter(&dd->tags, mtip_queue_cmd, dd);
abb0ccd1
ATS		 2533
2534 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
2535
2536 if (mtip_device_reset(dd))
6d125de4 2537 blk_mq_tagset_busy_iter(&dd->tags,
abb0ccd1
ATS		 2538 mtip_abort_cmd, dd);
2539
2540 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
436c15ab
SG		 2541
2542 blk_mq_unquiesce_queue(dd->queue);
abb0ccd1
ATS		 2543 }
2544
8a857a88 2545 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
60ec0eec
AT		 2546 slot = 1;
2547 /* used to restrict the loop to one iteration */
2548 slot_start = num_cmd_slots;
2549 slot_wrap = 0;
2550 while (1) {
2551 slot = find_next_bit(port->cmds_to_issue,
2552 num_cmd_slots, slot);
2553 if (slot_wrap == 1) {
2554 if ((slot_start >= slot) ||
2555 (slot >= num_cmd_slots))
2556 break;
2557 }
2558 if (unlikely(slot_start == num_cmd_slots))
2559 slot_start = slot;
2560
2561 if (unlikely(slot == num_cmd_slots)) {
2562 slot = 1;
2563 slot_wrap = 1;
2564 continue;
2565 }
2566
2567 /* Issue the command to the hardware */
2568 mtip_issue_ncq_command(port, slot);
2569
60ec0eec
AT		 2570 clear_bit(slot, port->cmds_to_issue);
2571 }
2572
8a857a88 2573 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
9b204fbf
AT		 2574 }
2575
2576 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
59cf70e2
ATS		 2577 if (mtip_ftl_rebuild_poll(dd) == 0)
2578 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
60ec0eec 2579 }
8f8b8995
AT		 2580 }
2581
8f8b8995 2582st_out:
60ec0eec
AT		 2583 return 0;
2584}
2585
188b9f49
SB		 2586/*
2587 * DMA region teardown
2588 *
2589 * @dd Pointer to driver_data structure
2590 *
2591 * return value
2592 * None
2593 */
2594static void mtip_dma_free(struct driver_data *dd)
2595{
188b9f49
SB		 2596 struct mtip_port *port = dd->port;
2597
2598 if (port->block1)
22cb4e68 2599 dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
188b9f49
SB		 2600 port->block1, port->block1_dma);
2601
2602 if (port->command_list) {
22cb4e68 2603 dma_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
188b9f49
SB		 2604 port->command_list, port->command_list_dma);
2605 }
188b9f49
SB		 2606}
2607
2608/*
2609 * DMA region setup
2610 *
2611 * @dd Pointer to driver_data structure
2612 *
2613 * return value
2614 * -ENOMEM Not enough free DMA region space to initialize driver
2615 */
2616static int mtip_dma_alloc(struct driver_data *dd)
2617{
2618 struct mtip_port *port = dd->port;
188b9f49 2619
537b9f2b 2620 /* Allocate dma memory for RX Fis, Identify, and Sector Buffer */
188b9f49 2621 port->block1 =
22cb4e68 2622 dma_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
188b9f49
SB		 2623 &port->block1_dma, GFP_KERNEL);
2624 if (!port->block1)
2625 return -ENOMEM;
188b9f49
SB		 2626
2627 /* Allocate dma memory for command list */
2628 port->command_list =
22cb4e68 2629 dma_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
188b9f49
SB		 2630 &port->command_list_dma, GFP_KERNEL);
2631 if (!port->command_list) {
22cb4e68 2632 dma_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
188b9f49
SB		 2633 port->block1, port->block1_dma);
2634 port->block1 = NULL;
2635 port->block1_dma = 0;
2636 return -ENOMEM;
2637 }
188b9f49
SB		 2638
2639 /* Setup all pointers into first DMA region */
2640 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
2641 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
2642 port->identify = port->block1 + AHCI_IDFY_OFFSET;
2643 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
2644 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
2645 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
2646 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
2647 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
2648
ffc771b3
JA		 2649 return 0;
2650}
188b9f49 2651
ffc771b3
JA		 2652static int mtip_hw_get_identify(struct driver_data *dd)
2653{
2654 struct smart_attr attr242;
2655 unsigned char *buf;
2656 int rv;
188b9f49 2657
ffc771b3
JA		 2658 if (mtip_get_identify(dd->port, NULL) < 0)
2659 return -EFAULT;
188b9f49 2660
ffc771b3
JA		 2661 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2662 MTIP_FTL_REBUILD_MAGIC) {
2663 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
2664 return MTIP_FTL_REBUILD_MAGIC;
2665 }
2666 mtip_dump_identify(dd->port);
188b9f49 2667
ffc771b3
JA		 2668 /* check write protect, over temp and rebuild statuses */
2669 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
2670 dd->port->log_buf,
2671 dd->port->log_buf_dma, 1);
2672 if (rv) {
2673 dev_warn(&dd->pdev->dev,
2674 "Error in READ LOG EXT (10h) command\n");
2675 /* non-critical error, don't fail the load */
2676 } else {
2677 buf = (unsigned char *)dd->port->log_buf;
2678 if (buf[259] & 0x1) {
2679 dev_info(&dd->pdev->dev,
2680 "Write protect bit is set.\n");
2681 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
2682 }
2683 if (buf[288] == 0xF7) {
2684 dev_info(&dd->pdev->dev,
2685 "Exceeded Tmax, drive in thermal shutdown.\n");
2686 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
2687 }
2688 if (buf[288] == 0xBF) {
2689 dev_info(&dd->pdev->dev,
2690 "Drive indicates rebuild has failed.\n");
aae4a033 2691 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
ffc771b3 2692 }
188b9f49 2693 }
ffc771b3
JA		 2694
2695 /* get write protect progess */
2696 memset(&attr242, 0, sizeof(struct smart_attr));
2697 if (mtip_get_smart_attr(dd->port, 242, &attr242))
2698 dev_warn(&dd->pdev->dev,
2699 "Unable to check write protect progress\n");
2700 else
2701 dev_info(&dd->pdev->dev,
2702 "Write protect progress: %u%% (%u blocks)\n",
2703 attr242.cur, le32_to_cpu(attr242.data));
2704
2705 return rv;
188b9f49
SB		 2706}
2707
88523a61
SB		 2708/*
2709 * Called once for each card.
2710 *
2711 * @dd Pointer to the driver data structure.
2712 *
2713 * return value
2714 * 0 on success, else an error code.
2715 */
6316668f 2716static int mtip_hw_init(struct driver_data *dd)
88523a61
SB		 2717{
2718 int i;
2719 int rv;
45038367 2720 unsigned long timeout, timetaken;
88523a61
SB		 2721
2722 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
2723
2724 mtip_detect_product(dd);
2725 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
2726 rv = -EIO;
2727 goto out1;
2728 }
88523a61
SB		 2729
2730 hba_setup(dd);
2731
16c906e5
AT		 2732 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
2733 dd->numa_node);
ce9a8ca6 2734 if (!dd->port)
88523a61 2735 return -ENOMEM;
88523a61 2736
16c906e5
AT		 2737 /* Continue workqueue setup */
2738 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
2739 dd->work[i].port = dd->port;
2740
2077d947
AT		 2741 /* Enable unaligned IO constraints for some devices */
2742 if (mtip_device_unaligned_constrained(dd))
2743 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
2744 else
2745 dd->unal_qdepth = 0;
2746
e4025e46 2747 atomic_set(&dd->port->cmd_slot_unal, dd->unal_qdepth);
88523a61
SB		 2748
2749 /* Spinlock to prevent concurrent issue */
16c906e5
AT		 2750 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
2751 spin_lock_init(&dd->port->cmd_issue_lock[i]);
88523a61
SB		 2752
2753 /* Set the port mmio base address. */
2754 dd->port->mmio = dd->mmio + PORT_OFFSET;
2755 dd->port->dd = dd;
2756
188b9f49
SB		 2757 /* DMA allocations */
2758 rv = mtip_dma_alloc(dd);
2759 if (rv < 0)
88523a61 2760 goto out1;
88523a61
SB		 2761
2762 /* Setup the pointers to the extended s_active and CI registers. */
2763 for (i = 0; i < dd->slot_groups; i++) {
2764 dd->port->s_active[i] =
2765 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
2766 dd->port->cmd_issue[i] =
2767 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
2768 dd->port->completed[i] =
2769 dd->port->mmio + i*0x80 + PORT_SDBV;
2770 }
2771
45038367
AT		 2772 timetaken = jiffies;
2773 timeout = jiffies + msecs_to_jiffies(30000);
2774 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
2775 time_before(jiffies, timeout)) {
2776 mdelay(100);
2777 }
9e541f14 2778 if (unlikely(mtip_check_surprise_removal(dd))) {
45038367
AT		 2779 timetaken = jiffies - timetaken;
2780 dev_warn(&dd->pdev->dev,
2781 "Surprise removal detected at %u ms\n",
2782 jiffies_to_msecs(timetaken));
2783 rv = -ENODEV;
2784 goto out2 ;
2785 }
8a857a88 2786 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
45038367
AT		 2787 timetaken = jiffies - timetaken;
2788 dev_warn(&dd->pdev->dev,
2789 "Removal detected at %u ms\n",
2790 jiffies_to_msecs(timetaken));
2791 rv = -EFAULT;
88523a61
SB		 2792 goto out2;
2793 }
2794
45038367
AT		 2795 /* Conditionally reset the HBA. */
2796 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
2797 if (mtip_hba_reset(dd) < 0) {
2798 dev_err(&dd->pdev->dev,
2799 "Card did not reset within timeout\n");
2800 rv = -EIO;
2801 goto out2;
2802 }
2803 } else {
2804 /* Clear any pending interrupts on the HBA */
2805 writel(readl(dd->mmio + HOST_IRQ_STAT),
2806 dd->mmio + HOST_IRQ_STAT);
2807 }
2808
88523a61
SB		 2809 mtip_init_port(dd->port);
2810 mtip_start_port(dd->port);
2811
2812 /* Setup the ISR and enable interrupts. */
22cb4e68
CH		 2813 rv = request_irq(dd->pdev->irq, mtip_irq_handler, IRQF_SHARED,
2814 dev_driver_string(&dd->pdev->dev), dd);
88523a61
SB		 2815 if (rv) {
2816 dev_err(&dd->pdev->dev,
2817 "Unable to allocate IRQ %d\n", dd->pdev->irq);
2818 goto out2;
2819 }
16c906e5 2820 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
88523a61
SB		 2821
2822 /* Enable interrupts on the HBA. */
2823 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
2824 dd->mmio + HOST_CTL);
2825
60ec0eec
AT		 2826 init_waitqueue_head(&dd->port->svc_wait);
2827
8a857a88 2828 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
45038367
AT		 2829 rv = -EFAULT;
2830 goto out3;
2831 }
2832
88523a61
SB		 2833 return rv;
2834
2835out3:
88523a61
SB		 2836 /* Disable interrupts on the HBA. */
2837 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
2838 dd->mmio + HOST_CTL);
2839
16c906e5
AT		 2840 /* Release the IRQ. */
2841 irq_set_affinity_hint(dd->pdev->irq, NULL);
22cb4e68 2842 free_irq(dd->pdev->irq, dd);
88523a61
SB		 2843
2844out2:
2845 mtip_deinit_port(dd->port);
188b9f49 2846 mtip_dma_free(dd);
88523a61 2847
88523a61
SB		 2848out1:
2849 /* Free the memory allocated for the for structure. */
2850 kfree(dd->port);
2851
2852 return rv;
2853}
2854
d8a18d2d 2855static int mtip_standby_drive(struct driver_data *dd)
ffc771b3 2856{
d8a18d2d 2857 int rv = 0;
ffc771b3 2858
d8a18d2d
ATS		 2859 if (dd->sr || !dd->port)
2860 return -ENODEV;
ffc771b3
JA		 2861 /*
2862 * Send standby immediate (E0h) to the drive so that it
2863 * saves its state.
2864 */
2865 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
d8a18d2d
ATS		 2866 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
2867 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
2868 rv = mtip_standby_immediate(dd->port);
2869 if (rv)
ffc771b3
JA		 2870 dev_warn(&dd->pdev->dev,
2871 "STANDBY IMMEDIATE failed\n");
d8a18d2d
ATS		 2872 }
2873 return rv;
ffc771b3
JA		 2874}
2875
88523a61
SB		 2876/*
2877 * Called to deinitialize an interface.
2878 *
2879 * @dd Pointer to the driver data structure.
2880 *
2881 * return value
2882 * 0
2883 */
6316668f 2884static int mtip_hw_exit(struct driver_data *dd)
88523a61 2885{
8f8b8995 2886 if (!dd->sr) {
88523a61
SB		 2887 /* de-initialize the port. */
2888 mtip_deinit_port(dd->port);
2889
2890 /* Disable interrupts on the HBA. */
2891 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
2892 dd->mmio + HOST_CTL);
2893 }
2894
88523a61 2895 /* Release the IRQ. */
16c906e5 2896 irq_set_affinity_hint(dd->pdev->irq, NULL);
22cb4e68 2897 free_irq(dd->pdev->irq, dd);
2132a544 2898 msleep(1000);
88523a61 2899
188b9f49
SB		 2900 /* Free dma regions */
2901 mtip_dma_free(dd);
2902
88523a61
SB		 2903 /* Free the memory allocated for the for structure. */
2904 kfree(dd->port);
8f8b8995 2905 dd->port = NULL;
88523a61
SB		 2906
2907 return 0;
2908}
2909
2910/*
2911 * Issue a Standby Immediate command to the device.
2912 *
2913 * This function is called by the Block Layer just before the
2914 * system powers off during a shutdown.
2915 *
2916 * @dd Pointer to the driver data structure.
2917 *
2918 * return value
2919 * 0
2920 */
6316668f 2921static int mtip_hw_shutdown(struct driver_data *dd)
88523a61
SB		 2922{
2923 /*
2924 * Send standby immediate (E0h) to the drive so that it
2925 * saves its state.
2926 */
d8a18d2d 2927 mtip_standby_drive(dd);
88523a61
SB		 2928
2929 return 0;
2930}
2931
2932/*
2933 * Suspend function
2934 *
2935 * This function is called by the Block Layer just before the
2936 * system hibernates.
2937 *
2938 * @dd Pointer to the driver data structure.
2939 *
2940 * return value
2941 * 0 Suspend was successful
2942 * -EFAULT Suspend was not successful
2943 */
6316668f 2944static int mtip_hw_suspend(struct driver_data *dd)
88523a61
SB		 2945{
2946 /*
2947 * Send standby immediate (E0h) to the drive
2948 * so that it saves its state.
2949 */
d8a18d2d 2950 if (mtip_standby_drive(dd) != 0) {
88523a61
SB		 2951 dev_err(&dd->pdev->dev,
2952 "Failed standby-immediate command\n");
2953 return -EFAULT;
2954 }
2955
2956 /* Disable interrupts on the HBA.*/
2957 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
2958 dd->mmio + HOST_CTL);
2959 mtip_deinit_port(dd->port);
2960
2961 return 0;
2962}
2963
2964/*
2965 * Resume function
2966 *
2967 * This function is called by the Block Layer as the
2968 * system resumes.
2969 *
2970 * @dd Pointer to the driver data structure.
2971 *
2972 * return value
2973 * 0 Resume was successful
2974 * -EFAULT Resume was not successful
2975 */
6316668f 2976static int mtip_hw_resume(struct driver_data *dd)
88523a61
SB		 2977{
2978 /* Perform any needed hardware setup steps */
2979 hba_setup(dd);
2980
2981 /* Reset the HBA */
2982 if (mtip_hba_reset(dd) != 0) {
2983 dev_err(&dd->pdev->dev,
2984 "Unable to reset the HBA\n");
2985 return -EFAULT;
2986 }
2987
2988 /*
2989 * Enable the port, DMA engine, and FIS reception specific
2990 * h/w in controller.
2991 */
2992 mtip_init_port(dd->port);
2993 mtip_start_port(dd->port);
2994
2995 /* Enable interrupts on the HBA.*/
2996 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
2997 dd->mmio + HOST_CTL);
2998
2999 return 0;
3000}
3001
88523a61
SB		 3002/*
3003 * Helper function for reusing disk name
3004 * upon hot insertion.
3005 */
3006static int rssd_disk_name_format(char *prefix,
3007 int index,
3008 char *buf,
3009 int buflen)
3010{
3011 const int base = 'z' - 'a' + 1;
3012 char *begin = buf + strlen(prefix);
3013 char *end = buf + buflen;
3014 char *p;
3015 int unit;
3016
3017 p = end - 1;
3018 *p = '\0';
3019 unit = base;
3020 do {
3021 if (p == begin)
3022 return -EINVAL;
3023 *--p = 'a' + (index % unit);
3024 index = (index / unit) - 1;
3025 } while (index >= 0);
3026
3027 memmove(begin, p, end - p);
3028 memcpy(buf, prefix, strlen(prefix));
3029
3030 return 0;
3031}
3032
3033/*
3034 * Block layer IOCTL handler.
3035 *
3036 * @dev Pointer to the block_device structure.
3037 * @mode ignored
3038 * @cmd IOCTL command passed from the user application.
3039 * @arg Argument passed from the user application.
3040 *
3041 * return value
3042 * 0 IOCTL completed successfully.
3043 * -ENOTTY IOCTL not supported or invalid driver data
3044 * structure pointer.
3045 */
3046static int mtip_block_ioctl(struct block_device *dev,
3047 fmode_t mode,
3048 unsigned cmd,
3049 unsigned long arg)
3050{
3051 struct driver_data *dd = dev->bd_disk->private_data;
3052
3053 if (!capable(CAP_SYS_ADMIN))
3054 return -EACCES;
3055
3056 if (!dd)
3057 return -ENOTTY;
3058
8a857a88 3059 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
45038367
AT		 3060 return -ENOTTY;
3061
88523a61
SB		 3062 switch (cmd) {
3063 case BLKFLSBUF:
60ec0eec 3064 return -ENOTTY;
88523a61 3065 default:
ef0f1587 3066 return mtip_hw_ioctl(dd, cmd, arg);
88523a61
SB		 3067 }
3068}
3069
16d02c04 3070#ifdef CONFIG_COMPAT
88523a61
SB		 3071/*
3072 * Block layer compat IOCTL handler.
3073 *
3074 * @dev Pointer to the block_device structure.
3075 * @mode ignored
3076 * @cmd IOCTL command passed from the user application.
3077 * @arg Argument passed from the user application.
3078 *
3079 * return value
3080 * 0 IOCTL completed successfully.
3081 * -ENOTTY IOCTL not supported or invalid driver data
3082 * structure pointer.
3083 */
3084static int mtip_block_compat_ioctl(struct block_device *dev,
3085 fmode_t mode,
3086 unsigned cmd,
3087 unsigned long arg)
3088{
3089 struct driver_data *dd = dev->bd_disk->private_data;
3090
3091 if (!capable(CAP_SYS_ADMIN))
3092 return -EACCES;
3093
3094 if (!dd)
3095 return -ENOTTY;
3096
8a857a88 3097 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
45038367
AT		 3098 return -ENOTTY;
3099
88523a61
SB		 3100 switch (cmd) {
3101 case BLKFLSBUF:
60ec0eec 3102 return -ENOTTY;
ef0f1587 3103 case HDIO_DRIVE_TASKFILE: {
60ec0eec 3104 struct mtip_compat_ide_task_request_s __user *compat_req_task;
ef0f1587
JA		 3105 ide_task_request_t req_task;
3106 int compat_tasksize, outtotal, ret;
3107
60ec0eec
AT		 3108 compat_tasksize =
3109 sizeof(struct mtip_compat_ide_task_request_s);
ef0f1587
JA		 3110
3111 compat_req_task =
3112 (struct mtip_compat_ide_task_request_s __user *) arg;
3113
3114 if (copy_from_user(&req_task, (void __user *) arg,
60ec0eec 3115 compat_tasksize - (2 * sizeof(compat_long_t))))
ef0f1587
JA		 3116 return -EFAULT;
3117
3118 if (get_user(req_task.out_size, &compat_req_task->out_size))
3119 return -EFAULT;
3120
3121 if (get_user(req_task.in_size, &compat_req_task->in_size))
3122 return -EFAULT;
3123
3124 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3125
3126 ret = exec_drive_taskfile(dd, (void __user *) arg,
3127 &req_task, outtotal);
3128
3129 if (copy_to_user((void __user *) arg, &req_task,
3130 compat_tasksize -
3131 (2 * sizeof(compat_long_t))))
3132 return -EFAULT;
3133
3134 if (put_user(req_task.out_size, &compat_req_task->out_size))
3135 return -EFAULT;
3136
3137 if (put_user(req_task.in_size, &compat_req_task->in_size))
3138 return -EFAULT;
3139
3140 return ret;
3141 }
88523a61 3142 default:
ef0f1587 3143 return mtip_hw_ioctl(dd, cmd, arg);
88523a61
SB		 3144 }
3145}
16d02c04 3146#endif
88523a61
SB		 3147
3148/*
3149 * Obtain the geometry of the device.
3150 *
3151 * You may think that this function is obsolete, but some applications,
3152 * fdisk for example still used CHS values. This function describes the
3153 * device as having 224 heads and 56 sectors per cylinder. These values are
3154 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3155 * partition is described in terms of a start and end cylinder this means
3156 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3157 * affects performance.
3158 *
3159 * @dev Pointer to the block_device strucutre.
3160 * @geo Pointer to a hd_geometry structure.
3161 *
3162 * return value
3163 * 0 Operation completed successfully.
3164 * -ENOTTY An error occurred while reading the drive capacity.
3165 */
3166static int mtip_block_getgeo(struct block_device *dev,
3167 struct hd_geometry *geo)
3168{
3169 struct driver_data *dd = dev->bd_disk->private_data;
3170 sector_t capacity;
3171
3172 if (!dd)
3173 return -ENOTTY;
3174
3175 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3176 dev_warn(&dd->pdev->dev,
3177 "Could not get drive capacity.\n");
3178 return -ENOTTY;
3179 }
3180
3181 geo->heads = 224;
3182 geo->sectors = 56;
60ec0eec 3183 sector_div(capacity, (geo->heads * geo->sectors));
88523a61 3184 geo->cylinders = capacity;
88523a61
SB		 3185 return 0;
3186}
3187
51c6570e
ATS		 3188static int mtip_block_open(struct block_device *dev, fmode_t mode)
3189{
3190 struct driver_data *dd;
3191
3192 if (dev && dev->bd_disk) {
3193 dd = (struct driver_data *) dev->bd_disk->private_data;
3194
3195 if (dd) {
3196 if (test_bit(MTIP_DDF_REMOVAL_BIT,
3197 &dd->dd_flag)) {
3198 return -ENODEV;
3199 }
3200 return 0;
3201 }
3202 }
3203 return -ENODEV;
3204}
3205
99e6b87e 3206static void mtip_block_release(struct gendisk *disk, fmode_t mode)
51c6570e
ATS		 3207{
3208}
3209
88523a61
SB		 3210/*
3211 * Block device operation function.
3212 *
3213 * This structure contains pointers to the functions required by the block
3214 * layer.
3215 */
3216static const struct block_device_operations mtip_block_ops = {
51c6570e
ATS		 3217 .open = mtip_block_open,
3218 .release = mtip_block_release,
88523a61 3219 .ioctl = mtip_block_ioctl,
16d02c04 3220#ifdef CONFIG_COMPAT
88523a61 3221 .compat_ioctl = mtip_block_compat_ioctl,
16d02c04 3222#endif
88523a61
SB		 3223 .getgeo = mtip_block_getgeo,
3224 .owner = THIS_MODULE
3225};
3226
686d8e0b
ATS		 3227static inline bool is_se_active(struct driver_data *dd)
3228{
3229 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3230 if (dd->port->ic_pause_timer) {
3231 unsigned long to = dd->port->ic_pause_timer +
3232 msecs_to_jiffies(1000);
3233 if (time_after(jiffies, to)) {
3234 clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3235 &dd->port->flags);
3236 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3237 dd->port->ic_pause_timer = 0;
3238 wake_up_interruptible(&dd->port->svc_wait);
3239 return false;
3240 }
3241 }
3242 return true;
3243 }
3244 return false;
3245}
3246
10966fa1 3247static inline bool is_stopped(struct driver_data *dd, struct request *rq)
88523a61 3248{
10966fa1
CH		 3249 if (likely(!(dd->dd_flag & MTIP_DDF_STOP_IO)))
3250 return false;
15283469 3251
10966fa1
CH		 3252 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
3253 return true;
3254 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
3255 return true;
3256 if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag) &&
3257 rq_data_dir(rq))
3258 return true;
3259 if (test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))
3260 return true;
3261 if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag))
3262 return true;
88523a61 3263
10966fa1 3264 return false;
ffc771b3
JA		 3265}
3266
3267static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3268 struct request *rq)
3269{
3270 struct driver_data *dd = hctx->queue->queuedata;
3271 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3272
f45c40a9 3273 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
ffc771b3
JA		 3274 return false;
3275
3276 /*
3277 * If unaligned depth must be limited on this controller, mark it
3278 * as unaligned if the IO isn't on a 4k boundary (start of length).
3279 */
3280 if (blk_rq_sectors(rq) <= 64) {
3281 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3282 cmd->unaligned = 1;
2077d947
AT		 3283 }
3284
e4025e46 3285 if (cmd->unaligned && atomic_dec_if_positive(&dd->port->cmd_slot_unal) >= 0)
ffc771b3 3286 return true;
88523a61 3287
ffc771b3
JA		 3288 return false;
3289}
88523a61 3290
fc17b653
CH		 3291static blk_status_t mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx,
3292 struct request *rq)
3f5e6a35
JA		 3293{
3294 struct driver_data *dd = hctx->queue->queuedata;
3f5e6a35 3295 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
d85cb204 3296 struct mtip_int_cmd *icmd = cmd->icmd;
7bbf118f
CH		 3297 struct mtip_cmd_hdr *hdr =
3298 dd->port->command_list + sizeof(struct mtip_cmd_hdr) * rq->tag;
3f5e6a35
JA		 3299 struct mtip_cmd_sg *command_sg;
3300
3301 if (mtip_commands_active(dd->port))
4ba09f69 3302 return BLK_STS_DEV_RESOURCE;
3f5e6a35 3303
7bbf118f
CH		 3304 hdr->ctba = cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
3305 if (test_bit(MTIP_PF_HOST_CAP_64, &dd->port->flags))
3306 hdr->ctbau = cpu_to_le32((cmd->command_dma >> 16) >> 16);
3f5e6a35 3307 /* Populate the SG list */
7bbf118f 3308 hdr->opts = cpu_to_le32(icmd->opts | icmd->fis_len);
3f5e6a35
JA		 3309 if (icmd->buf_len) {
3310 command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ;
3311
449a15d9
CH		 3312 command_sg->info = cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF);
3313 command_sg->dba = cpu_to_le32(icmd->buffer & 0xFFFFFFFF);
3f5e6a35 3314 command_sg->dba_upper =
449a15d9 3315 cpu_to_le32((icmd->buffer >> 16) >> 16);
3f5e6a35 3316
7bbf118f 3317 hdr->opts |= cpu_to_le32((1 << 16));
3f5e6a35
JA		 3318 }
3319
3320 /* Populate the command header */
7bbf118f 3321 hdr->byte_count = 0;
3f5e6a35
JA		 3322
3323 blk_mq_start_request(rq);
3324 mtip_issue_non_ncq_command(dd->port, rq->tag);
fc17b653 3325 return 0;
3f5e6a35
JA		 3326}
3327
fc17b653 3328static blk_status_t mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
74c45052 3329 const struct blk_mq_queue_data *bd)
ffc771b3 3330{
10966fa1 3331 struct driver_data *dd = hctx->queue->queuedata;
74c45052 3332 struct request *rq = bd->rq;
10966fa1 3333 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
88523a61 3334
3f5e6a35
JA		 3335 if (blk_rq_is_passthrough(rq))
3336 return mtip_issue_reserved_cmd(hctx, rq);
3337
f45c40a9 3338 if (unlikely(mtip_check_unal_depth(hctx, rq)))
4ba09f69 3339 return BLK_STS_DEV_RESOURCE;
ffc771b3 3340
10966fa1
CH		 3341 if (is_se_active(dd) || is_stopped(dd, rq))
3342 return BLK_STS_IOERR;
3343
e2490073
CH		 3344 blk_mq_start_request(rq);
3345
81e66174 3346 mtip_hw_submit_io(dd, rq, cmd, hctx);
10966fa1 3347 return BLK_STS_OK;
88523a61
SB		 3348}
3349
d6296d39
CH		 3350static void mtip_free_cmd(struct blk_mq_tag_set *set, struct request *rq,
3351 unsigned int hctx_idx)
ffc771b3 3352{
d6296d39 3353 struct driver_data *dd = set->driver_data;
ffc771b3
JA		 3354 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3355
3356 if (!cmd->command)
3357 return;
3358
22cb4e68
CH		 3359 dma_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, cmd->command,
3360 cmd->command_dma);
ffc771b3
JA		 3361}
3362
d6296d39
CH		 3363static int mtip_init_cmd(struct blk_mq_tag_set *set, struct request *rq,
3364 unsigned int hctx_idx, unsigned int numa_node)
ffc771b3 3365{
d6296d39 3366 struct driver_data *dd = set->driver_data;
ffc771b3 3367 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
ffc771b3 3368
22cb4e68 3369 cmd->command = dma_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
ffc771b3
JA		 3370 &cmd->command_dma, GFP_KERNEL);
3371 if (!cmd->command)
3372 return -ENOMEM;
3373
ffc771b3
JA		 3374 sg_init_table(cmd->sg, MTIP_MAX_SG);
3375 return 0;
3376}
3377
abb0ccd1
ATS		 3378static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3379 bool reserved)
3380{
3381 struct driver_data *dd = req->q->queuedata;
abb0ccd1 3382
3f5e6a35
JA		 3383 if (reserved) {
3384 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
3385
2a842aca 3386 cmd->status = BLK_STS_TIMEOUT;
c5fb85b7
CH		 3387 blk_mq_complete_request(req);
3388 return BLK_EH_DONE;
3f5e6a35 3389 }
abb0ccd1
ATS		 3390
3391 if (test_bit(req->tag, dd->port->cmds_to_issue))
3392 goto exit_handler;
3393
3394 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3395 goto exit_handler;
3396
3397 wake_up_interruptible(&dd->port->svc_wait);
3398exit_handler:
90beb2e7 3399 return BLK_EH_RESET_TIMER;
abb0ccd1
ATS		 3400}
3401
f363b089 3402static const struct blk_mq_ops mtip_mq_ops = {
ffc771b3 3403 .queue_rq = mtip_queue_rq,
ffc771b3
JA		 3404 .init_request = mtip_init_cmd,
3405 .exit_request = mtip_free_cmd,
abb0ccd1
ATS		 3406 .complete = mtip_softirq_done_fn,
3407 .timeout = mtip_cmd_timeout,
ffc771b3
JA		 3408};
3409
88523a61
SB		 3410/*
3411 * Block layer initialization function.
3412 *
3413 * This function is called once by the PCI layer for each P320
3414 * device that is connected to the system.
3415 *
3416 * @dd Pointer to the driver data structure.
3417 *
3418 * return value
3419 * 0 on success else an error code.
3420 */
6316668f 3421static int mtip_block_initialize(struct driver_data *dd)
88523a61 3422{
62ee8c13 3423 int rv = 0, wait_for_rebuild = 0;
88523a61
SB		 3424 sector_t capacity;
3425 unsigned int index = 0;
88523a61 3426
62ee8c13
AT		 3427 if (dd->disk)
3428 goto skip_create_disk; /* hw init done, before rebuild */
3429
ffc771b3 3430 if (mtip_hw_init(dd)) {
88523a61
SB		 3431 rv = -EINVAL;
3432 goto protocol_init_error;
3433 }
3434
ffc771b3
JA		 3435 memset(&dd->tags, 0, sizeof(dd->tags));
3436 dd->tags.ops = &mtip_mq_ops;
3437 dd->tags.nr_hw_queues = 1;
3438 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3439 dd->tags.reserved_tags = 1;
3440 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3441 dd->tags.numa_node = dd->numa_node;
a800ce8b 3442 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
ffc771b3 3443 dd->tags.driver_data = dd;
abb0ccd1 3444 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
ffc771b3
JA		 3445
3446 rv = blk_mq_alloc_tag_set(&dd->tags);
3447 if (rv) {
3448 dev_err(&dd->pdev->dev,
3449 "Unable to allocate request queue\n");
008e56d2 3450 goto block_queue_alloc_tag_error;
ffc771b3
JA		 3451 }
3452
cc25592c
CH		 3453 dd->disk = blk_mq_alloc_disk(&dd->tags, dd);
3454 if (IS_ERR(dd->disk)) {
62ee8c13
AT		 3455 dev_err(&dd->pdev->dev,
3456 "Unable to allocate request queue\n");
3457 rv = -ENOMEM;
3458 goto block_queue_alloc_init_error;
3459 }
cc25592c 3460 dd->queue = dd->disk->queue;
62ee8c13 3461
cc25592c
CH		 3462 rv = ida_alloc(&rssd_index_ida, GFP_KERNEL);
3463 if (rv < 0)
3464 goto ida_get_error;
3465 index = rv;
3466
3467 rv = rssd_disk_name_format("rssd",
3468 index,
3469 dd->disk->disk_name,
3470 DISK_NAME_LEN);
3471 if (rv)
3472 goto disk_index_error;
3473
3474 dd->disk->major = dd->major;
3475 dd->disk->first_minor = index * MTIP_MAX_MINORS;
3476 dd->disk->minors = MTIP_MAX_MINORS;
3477 dd->disk->fops = &mtip_block_ops;
3478 dd->disk->private_data = dd;
3479 dd->index = index;
3480
3481 mtip_hw_debugfs_init(dd);
62ee8c13 3482
59cf70e2 3483skip_create_disk:
ffc771b3
JA		 3484 /* Initialize the protocol layer. */
3485 wait_for_rebuild = mtip_hw_get_identify(dd);
3486 if (wait_for_rebuild < 0) {
3487 dev_err(&dd->pdev->dev,
3488 "Protocol layer initialization failed\n");
3489 rv = -EINVAL;
3490 goto init_hw_cmds_error;
3491 }
3492
3493 /*
3494 * if rebuild pending, start the service thread, and delay the block
0d52c756 3495 * queue creation and device_add_disk()
ffc771b3
JA		 3496 */
3497 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3498 goto start_service_thread;
3499
62ee8c13 3500 /* Set device limits. */
4e699cb9
BVA		 3501 blk_queue_flag_set(QUEUE_FLAG_NONROT, dd->queue);
3502 blk_queue_flag_clear(QUEUE_FLAG_ADD_RANDOM, dd->queue);
62ee8c13
AT		 3503 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
3504 blk_queue_physical_block_size(dd->queue, 4096);
6c8ab698
AT		 3505 blk_queue_max_hw_sectors(dd->queue, 0xffff);
3506 blk_queue_max_segment_size(dd->queue, 0x400000);
bb6f59af 3507 dma_set_max_seg_size(&dd->pdev->dev, 0x400000);
62ee8c13 3508 blk_queue_io_min(dd->queue, 4096);
6c8ab698 3509
88523a61
SB		 3510 /* Set the capacity of the device in 512 byte sectors. */
3511 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3512 dev_warn(&dd->pdev->dev,
3513 "Could not read drive capacity\n");
3514 rv = -EIO;
3515 goto read_capacity_error;
3516 }
3517 set_capacity(dd->disk, capacity);
3518
3519 /* Enable the block device and add it to /dev */
4a32e1cd
LC		 3520 rv = device_add_disk(&dd->pdev->dev, dd->disk, mtip_disk_attr_groups);
3521 if (rv)
3522 goto read_capacity_error;
88523a61 3523
45038367 3524 if (dd->mtip_svc_handler) {
8a857a88 3525 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
62ee8c13 3526 return rv; /* service thread created for handling rebuild */
45038367 3527 }
62ee8c13
AT		 3528
3529start_service_thread:
16c906e5 3530 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
8aeea031
RV		 3531 dd, dd->numa_node,
3532 "mtip_svc_thd_%02d", index);
60ec0eec
AT		 3533
3534 if (IS_ERR(dd->mtip_svc_handler)) {
c74b0f58 3535 dev_err(&dd->pdev->dev, "service thread failed to start\n");
60ec0eec
AT		 3536 dd->mtip_svc_handler = NULL;
3537 rv = -EFAULT;
62ee8c13 3538 goto kthread_run_error;
60ec0eec 3539 }
16c906e5 3540 wake_up_process(dd->mtip_svc_handler);
45038367
AT		 3541 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
3542 rv = wait_for_rebuild;
3543
88523a61
SB		 3544 return rv;
3545
62ee8c13
AT		 3546kthread_run_error:
3547 /* Delete our gendisk. This also removes the device from /dev */
88523a61 3548 del_gendisk(dd->disk);
62ee8c13 3549read_capacity_error:
ffc771b3 3550init_hw_cmds_error:
8f8b8995 3551 mtip_hw_debugfs_exit(dd);
88523a61 3552disk_index_error:
3aed4bc1 3553 ida_free(&rssd_index_ida, index);
88523a61 3554ida_get_error:
cc25592c
CH		 3555 blk_cleanup_disk(dd->disk);
3556block_queue_alloc_init_error:
3557 blk_mq_free_tag_set(&dd->tags);
3558block_queue_alloc_tag_error:
62ee8c13 3559 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
88523a61
SB		 3560protocol_init_error:
3561 return rv;
3562}
3563
7baa8572 3564static bool mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
008e56d2 3565{
6f63503c 3566 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
008e56d2 3567
2a842aca 3568 cmd->status = BLK_STS_IOERR;
6f63503c 3569 blk_mq_complete_request(rq);
7baa8572 3570 return true;
008e56d2
ATS		 3571}
3572
88523a61
SB		 3573/*
3574 * Block layer deinitialization function.
3575 *
3576 * Called by the PCI layer as each P320 device is removed.
3577 *
3578 * @dd Pointer to the driver data structure.
3579 *
3580 * return value
3581 * 0
3582 */
6316668f 3583static int mtip_block_remove(struct driver_data *dd)
88523a61 3584{
2132a544 3585 mtip_hw_debugfs_exit(dd);
60ec0eec 3586
2132a544
ATS		 3587 if (dd->mtip_svc_handler) {
3588 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
3589 wake_up_interruptible(&dd->port->svc_wait);
3590 kthread_stop(dd->mtip_svc_handler);
3591 }
88523a61 3592
008e56d2
ATS		 3593 if (!dd->sr) {
3594 /*
3595 * Explicitly wait here for IOs to quiesce,
3596 * as mtip_standby_drive usually won't wait for IOs.
3597 */
8afdd94c 3598 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS))
008e56d2
ATS		 3599 mtip_standby_drive(dd);
3600 }
2132a544 3601 else
8f8b8995
AT		 3602 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
3603 dd->disk->disk_name);
2132a544 3604
1671d522 3605 blk_freeze_queue_start(dd->queue);
436c15ab 3606 blk_mq_quiesce_queue(dd->queue);
6d125de4 3607 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
436c15ab 3608 blk_mq_unquiesce_queue(dd->queue);
008e56d2 3609
2132a544 3610 if (dd->disk) {
59cf70e2
ATS		 3611 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3612 del_gendisk(dd->disk);
2132a544
ATS		 3613 if (dd->disk->queue) {
3614 blk_cleanup_queue(dd->queue);
3615 blk_mq_free_tag_set(&dd->tags);
3616 dd->queue = NULL;
3617 }
3618 put_disk(dd->disk);
8f8b8995 3619 }
2132a544
ATS		 3620 dd->disk = NULL;
3621
3aed4bc1 3622 ida_free(&rssd_index_ida, dd->index);
88523a61
SB		 3623
3624 /* De-initialize the protocol layer. */
3625 mtip_hw_exit(dd);
3626
3627 return 0;
3628}
3629
3630/*
3631 * Function called by the PCI layer when just before the
3632 * machine shuts down.
3633 *
3634 * If a protocol layer shutdown function is present it will be called
3635 * by this function.
3636 *
3637 * @dd Pointer to the driver data structure.
3638 *
3639 * return value
3640 * 0
3641 */
6316668f 3642static int mtip_block_shutdown(struct driver_data *dd)
88523a61 3643{
ffc771b3
JA		 3644 mtip_hw_shutdown(dd);
3645
88523a61 3646 /* Delete our gendisk structure, and cleanup the blk queue. */
58c49df3 3647 if (dd->disk) {
5a79e1ac
AT		 3648 dev_info(&dd->pdev->dev,
3649 "Shutting down %s ...\n", dd->disk->disk_name);
3650
59cf70e2
ATS		 3651 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
3652 del_gendisk(dd->disk);
5a79e1ac 3653 if (dd->disk->queue) {
5a79e1ac 3654 blk_cleanup_queue(dd->queue);
ffc771b3 3655 blk_mq_free_tag_set(&dd->tags);
02b48265
ATS		 3656 }
3657 put_disk(dd->disk);
5a79e1ac
AT		 3658 dd->disk = NULL;
3659 dd->queue = NULL;
58c49df3
AT		 3660 }
3661
3aed4bc1 3662 ida_free(&rssd_index_ida, dd->index);
88523a61
SB		 3663 return 0;
3664}
3665
6316668f 3666static int mtip_block_suspend(struct driver_data *dd)
88523a61
SB		 3667{
3668 dev_info(&dd->pdev->dev,
3669 "Suspending %s ...\n", dd->disk->disk_name);
3670 mtip_hw_suspend(dd);
3671 return 0;
3672}
3673
6316668f 3674static int mtip_block_resume(struct driver_data *dd)
88523a61
SB		 3675{
3676 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
3677 dd->disk->disk_name);
3678 mtip_hw_resume(dd);
3679 return 0;
3680}
3681
16c906e5
AT		 3682static void drop_cpu(int cpu)
3683{
3684 cpu_use[cpu]--;
3685}
3686
3687static int get_least_used_cpu_on_node(int node)
3688{
3689 int cpu, least_used_cpu, least_cnt;
3690 const struct cpumask *node_mask;
3691
3692 node_mask = cpumask_of_node(node);
3693 least_used_cpu = cpumask_first(node_mask);
3694 least_cnt = cpu_use[least_used_cpu];
3695 cpu = least_used_cpu;
3696
3697 for_each_cpu(cpu, node_mask) {
3698 if (cpu_use[cpu] < least_cnt) {
3699 least_used_cpu = cpu;
3700 least_cnt = cpu_use[cpu];
3701 }
3702 }
3703 cpu_use[least_used_cpu]++;
3704 return least_used_cpu;
3705}
3706
3707/* Helper for selecting a node in round robin mode */
3708static inline int mtip_get_next_rr_node(void)
3709{
98fa15f3 3710 static int next_node = NUMA_NO_NODE;
16c906e5 3711
98fa15f3 3712 if (next_node == NUMA_NO_NODE) {
16c906e5
AT		 3713 next_node = first_online_node;
3714 return next_node;
3715 }
3716
3717 next_node = next_online_node(next_node);
3718 if (next_node == MAX_NUMNODES)
3719 next_node = first_online_node;
3720 return next_node;
3721}
3722
25bac122
FW		 3723static DEFINE_HANDLER(0);
3724static DEFINE_HANDLER(1);
3725static DEFINE_HANDLER(2);
3726static DEFINE_HANDLER(3);
3727static DEFINE_HANDLER(4);
3728static DEFINE_HANDLER(5);
3729static DEFINE_HANDLER(6);
3730static DEFINE_HANDLER(7);
16c906e5 3731
d1e714db
AT		 3732static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
3733{
d1e714db
AT		 3734 unsigned short pcie_dev_ctrl;
3735
21269791
BH		 3736 if (pci_is_pcie(pdev)) {
3737 pcie_capability_read_word(pdev, PCI_EXP_DEVCTL, &pcie_dev_ctrl);
416c0547
BH		 3738 if (pcie_dev_ctrl & PCI_EXP_DEVCTL_NOSNOOP_EN ||
3739 pcie_dev_ctrl & PCI_EXP_DEVCTL_RELAX_EN) {
d1e714db
AT		 3740 dev_info(&dd->pdev->dev,
3741 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
3742 pdev->vendor, pdev->device);
3743 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
3744 PCI_EXP_DEVCTL_RELAX_EN);
21269791 3745 pcie_capability_write_word(pdev, PCI_EXP_DEVCTL,
d1e714db
AT		 3746 pcie_dev_ctrl);
3747 }
3748 }
3749}
3750
3751static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
3752{
3753 /*
3754 * This workaround is specific to AMD/ATI chipset with a PCI upstream
3755 * device with device id 0x5aXX
3756 */
3757 if (pdev->bus && pdev->bus->self) {
3758 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
3759 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
3760 mtip_disable_link_opts(dd, pdev->bus->self);
3761 } else {
3762 /* Check further up the topology */
3763 struct pci_dev *parent_dev = pdev->bus->self;
3764 if (parent_dev->bus &&
3765 parent_dev->bus->parent &&
3766 parent_dev->bus->parent->self &&
3767 parent_dev->bus->parent->self->vendor ==
3768 PCI_VENDOR_ID_ATI &&
3769 (parent_dev->bus->parent->self->device &
3770 0xff00) == 0x5a00) {
3771 mtip_disable_link_opts(dd,
3772 parent_dev->bus->parent->self);
3773 }
3774 }
3775 }
3776}
3777
88523a61
SB		 3778/*
3779 * Called for each supported PCI device detected.
3780 *
3781 * This function allocates the private data structure, enables the
3782 * PCI device and then calls the block layer initialization function.
3783 *
3784 * return value
3785 * 0 on success else an error code.
3786 */
3787static int mtip_pci_probe(struct pci_dev *pdev,
3788 const struct pci_device_id *ent)
3789{
3790 int rv = 0;
3791 struct driver_data *dd = NULL;
16c906e5
AT		 3792 char cpu_list[256];
3793 const struct cpumask *node_mask;
3794 int cpu, i = 0, j = 0;
3795 int my_node = NUMA_NO_NODE;
88523a61
SB		 3796
3797 /* Allocate memory for this devices private data. */
16c906e5
AT		 3798 my_node = pcibus_to_node(pdev->bus);
3799 if (my_node != NUMA_NO_NODE) {
3800 if (!node_online(my_node))
3801 my_node = mtip_get_next_rr_node();
3802 } else {
3803 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
3804 my_node = mtip_get_next_rr_node();
3805 }
3806 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
3807 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
7f328908 3808 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
16c906e5
AT		 3809
3810 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
ce9a8ca6 3811 if (!dd)
88523a61 3812 return -ENOMEM;
88523a61 3813
88523a61
SB		 3814 /* Attach the private data to this PCI device. */
3815 pci_set_drvdata(pdev, dd);
3816
3817 rv = pcim_enable_device(pdev);
3818 if (rv < 0) {
3819 dev_err(&pdev->dev, "Unable to enable device\n");
3820 goto iomap_err;
3821 }
3822
3823 /* Map BAR5 to memory. */
3824 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
3825 if (rv < 0) {
3826 dev_err(&pdev->dev, "Unable to map regions\n");
3827 goto iomap_err;
3828 }
3829
ee75fa2a
CH		 3830 rv = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64));
3831 if (rv) {
3832 dev_warn(&pdev->dev, "64-bit DMA enable failed\n");
3833 goto setmask_err;
88523a61
SB		 3834 }
3835
16c906e5
AT		 3836 /* Copy the info we may need later into the private data structure. */
3837 dd->major = mtip_major;
3838 dd->instance = instance;
3839 dd->pdev = pdev;
3840 dd->numa_node = my_node;
3841
3842 memset(dd->workq_name, 0, 32);
3843 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
88523a61 3844
16c906e5
AT		 3845 dd->isr_workq = create_workqueue(dd->workq_name);
3846 if (!dd->isr_workq) {
3847 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
d137c830 3848 rv = -ENOMEM;
8e3c283f 3849 goto setmask_err;
16c906e5
AT		 3850 }
3851
3852 memset(cpu_list, 0, sizeof(cpu_list));
3853
3854 node_mask = cpumask_of_node(dd->numa_node);
3855 if (!cpumask_empty(node_mask)) {
3856 for_each_cpu(cpu, node_mask)
3857 {
3858 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
3859 j = strlen(cpu_list);
3860 }
3861
3862 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
3863 dd->numa_node,
3864 topology_physical_package_id(cpumask_first(node_mask)),
3865 nr_cpus_node(dd->numa_node),
3866 cpu_list);
3867 } else
3868 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
3869
3870 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
3871 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
3872 cpu_to_node(dd->isr_binding), dd->isr_binding);
3873
3874 /* first worker context always runs in ISR */
3875 dd->work[0].cpu_binding = dd->isr_binding;
3876 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
3877 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
3878 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
3879 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
3880 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
3881 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
3882 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
3883
3884 /* Log the bindings */
3885 for_each_present_cpu(cpu) {
3886 memset(cpu_list, 0, sizeof(cpu_list));
3887 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
3888 if (dd->work[i].cpu_binding == cpu) {
3889 snprintf(&cpu_list[j], 256 - j, "%d ", i);
3890 j = strlen(cpu_list);
3891 }
3892 }
3893 if (j)
3894 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
3895 }
3896
3897 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
3898 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
3899 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
3900 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
3901 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
3902 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
3903 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
3904 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
3905
3906 pci_set_master(pdev);
d137c830
WY		 3907 rv = pci_enable_msi(pdev);
3908 if (rv) {
88523a61
SB		 3909 dev_warn(&pdev->dev,
3910 "Unable to enable MSI interrupt.\n");
cf91f39b 3911 goto msi_initialize_err;
88523a61
SB		 3912 }
3913
d1e714db
AT		 3914 mtip_fix_ero_nosnoop(dd, pdev);
3915
88523a61
SB		 3916 /* Initialize the block layer. */
3917 rv = mtip_block_initialize(dd);
3918 if (rv < 0) {
3919 dev_err(&pdev->dev,
3920 "Unable to initialize block layer\n");
3921 goto block_initialize_err;
3922 }
3923
3924 /*
3925 * Increment the instance count so that each device has a unique
3926 * instance number.
3927 */
3928 instance++;
45038367 3929 if (rv != MTIP_FTL_REBUILD_MAGIC)
8a857a88 3930 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
6b06d35f
AT		 3931 else
3932 rv = 0; /* device in rebuild state, return 0 from probe */
0caff003 3933
88523a61
SB		 3934 goto done;
3935
3936block_initialize_err:
3937 pci_disable_msi(pdev);
cf91f39b
AG		 3938
3939msi_initialize_err:
16c906e5 3940 if (dd->isr_workq) {
16c906e5
AT		 3941 destroy_workqueue(dd->isr_workq);
3942 drop_cpu(dd->work[0].cpu_binding);
3943 drop_cpu(dd->work[1].cpu_binding);
3944 drop_cpu(dd->work[2].cpu_binding);
3945 }
88523a61
SB		 3946setmask_err:
3947 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
3948
3949iomap_err:
3950 kfree(dd);
3951 pci_set_drvdata(pdev, NULL);
3952 return rv;
3953done:
88523a61
SB		 3954 return rv;
3955}
3956
3957/*
3958 * Called for each probed device when the device is removed or the
3959 * driver is unloaded.
3960 *
3961 * return value
3962 * None
3963 */
3964static void mtip_pci_remove(struct pci_dev *pdev)
3965{
3966 struct driver_data *dd = pci_get_drvdata(pdev);
ec5263f4 3967 unsigned long to;
88523a61 3968
51c6570e 3969 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
45038367 3970
9e541f14 3971 mtip_check_surprise_removal(dd);
8f8b8995
AT		 3972 synchronize_irq(dd->pdev->irq);
3973
3974 /* Spin until workers are done */
3975 to = jiffies + msecs_to_jiffies(4000);
3976 do {
3977 msleep(20);
3978 } while (atomic_read(&dd->irq_workers_active) != 0 &&
3979 time_before(jiffies, to));
3980
3981 if (atomic_read(&dd->irq_workers_active) != 0) {
3982 dev_warn(&dd->pdev->dev,
3983 "Completion workers still active!\n");
88523a61 3984 }
88523a61 3985
7a5428dc 3986 blk_mark_disk_dead(dd->disk);
51c6570e
ATS		 3987 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
3988
88523a61
SB		 3989 /* Clean up the block layer. */
3990 mtip_block_remove(dd);
3991
16c906e5 3992 if (dd->isr_workq) {
16c906e5
AT		 3993 destroy_workqueue(dd->isr_workq);
3994 drop_cpu(dd->work[0].cpu_binding);
3995 drop_cpu(dd->work[1].cpu_binding);
3996 drop_cpu(dd->work[2].cpu_binding);
3997 }
3998
88523a61
SB		 3999 pci_disable_msi(pdev);
4000
2132a544 4001 kfree(dd);
8f8b8995 4002
88523a61 4003 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
8f8b8995 4004 pci_set_drvdata(pdev, NULL);
88523a61
SB		 4005}
4006
4007/*
4008 * Called for each probed device when the device is suspended.
4009 *
4010 * return value
4011 * 0 Success
4012 * <0 Error
4013 */
cd97b7e0 4014static int __maybe_unused mtip_pci_suspend(struct device *dev)
88523a61
SB		 4015{
4016 int rv = 0;
cd97b7e0 4017 struct driver_data *dd = dev_get_drvdata(dev);
88523a61 4018
8a857a88 4019 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
88523a61
SB		 4020
4021 /* Disable ports & interrupts then send standby immediate */
4022 rv = mtip_block_suspend(dd);
cd97b7e0
VG		 4023 if (rv < 0)
4024 dev_err(dev, "Failed to suspend controller\n");
88523a61
SB		 4025
4026 return rv;
4027}
4028
4029/*
4030 * Called for each probed device when the device is resumed.
4031 *
4032 * return value
4033 * 0 Success
4034 * <0 Error
4035 */
cd97b7e0 4036static int __maybe_unused mtip_pci_resume(struct device *dev)
88523a61
SB		 4037{
4038 int rv = 0;
cd97b7e0 4039 struct driver_data *dd = dev_get_drvdata(dev);
88523a61
SB		 4040
4041 /*
4042 * Calls hbaReset, initPort, & startPort function
4043 * then enables interrupts
4044 */
4045 rv = mtip_block_resume(dd);
4046 if (rv < 0)
cd97b7e0 4047 dev_err(dev, "Unable to resume\n");
88523a61 4048
8a857a88 4049 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
88523a61
SB		 4050
4051 return rv;
4052}
4053
4054/*
4055 * Shutdown routine
4056 *
4057 * return value
4058 * None
4059 */
4060static void mtip_pci_shutdown(struct pci_dev *pdev)
4061{
4062 struct driver_data *dd = pci_get_drvdata(pdev);
4063 if (dd)
4064 mtip_block_shutdown(dd);
4065}
4066
88523a61 4067/* Table of device ids supported by this driver. */
9baa3c34 4068static const struct pci_device_id mtip_pci_tbl[] = {
1a131458
AT		 4069 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4070 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4071 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4072 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4073 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4074 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4075 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
88523a61
SB		 4076 { 0 }
4077};
4078
cd97b7e0
VG		 4079static SIMPLE_DEV_PM_OPS(mtip_pci_pm_ops, mtip_pci_suspend, mtip_pci_resume);
4080
88523a61 4081/* Structure that describes the PCI driver functions. */
3ff147d3 4082static struct pci_driver mtip_pci_driver = {
88523a61
SB		 4083 .name = MTIP_DRV_NAME,
4084 .id_table = mtip_pci_tbl,
4085 .probe = mtip_pci_probe,
4086 .remove = mtip_pci_remove,
cd97b7e0 4087 .driver.pm = &mtip_pci_pm_ops,
88523a61
SB		 4088 .shutdown = mtip_pci_shutdown,
4089};
4090
4091MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4092
4093/*
4094 * Module initialization function.
4095 *
4096 * Called once when the module is loaded. This function allocates a major
4097 * block device number to the Cyclone devices and registers the PCI layer
4098 * of the driver.
4099 *
4100 * Return value
4101 * 0 on success else error code.
4102 */
4103static int __init mtip_init(void)
4104{
6d27f09a
RS		 4105 int error;
4106
45422e74 4107 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
88523a61
SB		 4108
4109 /* Allocate a major block device number to use with this driver. */
6d27f09a
RS		 4110 error = register_blkdev(0, MTIP_DRV_NAME);
4111 if (error <= 0) {
45422e74 4112 pr_err("Unable to register block device (%d)\n",
6d27f09a 4113 error);
88523a61
SB		 4114 return -EBUSY;
4115 }
6d27f09a 4116 mtip_major = error;
88523a61 4117
0caff003
AT		 4118 dfs_parent = debugfs_create_dir("rssd", NULL);
4119 if (IS_ERR_OR_NULL(dfs_parent)) {
4120 pr_warn("Error creating debugfs parent\n");
4121 dfs_parent = NULL;
4122 }
7b421d24 4123
88523a61 4124 /* Register our PCI operations. */
6d27f09a 4125 error = pci_register_driver(&mtip_pci_driver);
7b421d24
AT		 4126 if (error) {
4127 debugfs_remove(dfs_parent);
6d27f09a 4128 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
7b421d24 4129 }
6d27f09a
RS		 4130
4131 return error;
88523a61
SB		 4132}
4133
4134/*
4135 * Module de-initialization function.
4136 *
4137 * Called once when the module is unloaded. This function deallocates
4138 * the major block device number allocated by mtip_init() and
4139 * unregisters the PCI layer of the driver.
4140 *
4141 * Return value
4142 * none
4143 */
4144static void __exit mtip_exit(void)
4145{
4146 /* Release the allocated major block device number. */
4147 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4148
4149 /* Unregister the PCI driver. */
4150 pci_unregister_driver(&mtip_pci_driver);
af5ded8c
AT		 4151
4152 debugfs_remove_recursive(dfs_parent);
88523a61
SB		 4153}
4154
4155MODULE_AUTHOR("Micron Technology, Inc");
4156MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4157MODULE_LICENSE("GPL");
4158MODULE_VERSION(MTIP_DRV_VERSION);
4159
4160module_init(mtip_init);
4161module_exit(mtip_exit);
Linux 6.x block layer and io_uring tree(s)