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Revert "mtip32xx: pass BLK_MQ_F_NO_SCHED"
[linux-2.6-block.git] / drivers / block / mtip32xx / mtip32xx.c
CommitLineData
88523a61
SB		 1/*
2 * Driver for the Micron P320 SSD
3 * Copyright (C) 2011 Micron Technology, Inc.
4 *
5 * Portions of this code were derived from works subjected to the
6 * following copyright:
7 * Copyright (C) 2009 Integrated Device Technology, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 */
20
21#include <linux/pci.h>
22#include <linux/interrupt.h>
23#include <linux/ata.h>
24#include <linux/delay.h>
25#include <linux/hdreg.h>
26#include <linux/uaccess.h>
27#include <linux/random.h>
28#include <linux/smp.h>
29#include <linux/compat.h>
30#include <linux/fs.h>
0e838c62 31#include <linux/module.h>
88523a61
SB		 32#include <linux/genhd.h>
33#include <linux/blkdev.h>
ffc771b3 34#include <linux/blk-mq.h>
88523a61
SB		 35#include <linux/bio.h>
36#include <linux/dma-mapping.h>
37#include <linux/idr.h>
60ec0eec 38#include <linux/kthread.h>
88523a61 39#include <../drivers/ata/ahci.h>
45038367 40#include <linux/export.h>
7b421d24 41#include <linux/debugfs.h>
f45c40a9 42#include <linux/prefetch.h>
88523a61
SB		 43#include "mtip32xx.h"
44
45#define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32)
188b9f49
SB		 46
47/* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */
48#define AHCI_RX_FIS_SZ 0x100
49#define AHCI_RX_FIS_OFFSET 0x0
50#define AHCI_IDFY_SZ ATA_SECT_SIZE
51#define AHCI_IDFY_OFFSET 0x400
52#define AHCI_SECTBUF_SZ ATA_SECT_SIZE
53#define AHCI_SECTBUF_OFFSET 0x800
54#define AHCI_SMARTBUF_SZ ATA_SECT_SIZE
55#define AHCI_SMARTBUF_OFFSET 0xC00
56/* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */
57#define BLOCK_DMA_ALLOC_SZ 4096
58
59/* DMA region containing command table (should be 8192 bytes) */
60#define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr)
61#define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ)
62#define AHCI_CMD_TBL_OFFSET 0x0
63
64/* DMA region per command (contains header and SGL) */
65#define AHCI_CMD_TBL_HDR_SZ 0x80
66#define AHCI_CMD_TBL_HDR_OFFSET 0x0
67#define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg))
68#define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ
69#define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ)
70
88523a61 71
45038367 72#define HOST_CAP_NZDMA (1 << 19)
88523a61
SB		 73#define HOST_HSORG 0xFC
74#define HSORG_DISABLE_SLOTGRP_INTR (1<<24)
75#define HSORG_DISABLE_SLOTGRP_PXIS (1<<16)
76#define HSORG_HWREV 0xFF00
77#define HSORG_STYLE 0x8
78#define HSORG_SLOTGROUPS 0x7
79
80#define PORT_COMMAND_ISSUE 0x38
81#define PORT_SDBV 0x7C
82
83#define PORT_OFFSET 0x100
84#define PORT_MEM_SIZE 0x80
85
86#define PORT_IRQ_ERR \
87 (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \
88 PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \
89 PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \
90 PORT_IRQ_OVERFLOW)
91#define PORT_IRQ_LEGACY \
92 (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS)
93#define PORT_IRQ_HANDLED \
94 (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \
95 PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \
96 PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY)
97#define DEF_PORT_IRQ \
98 (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS)
99
100/* product numbers */
101#define MTIP_PRODUCT_UNKNOWN 0x00
102#define MTIP_PRODUCT_ASICFPGA 0x11
103
104/* Device instance number, incremented each time a device is probed. */
105static int instance;
106
9e35fdcb
ZY		 107static struct list_head online_list;
108static struct list_head removing_list;
109static spinlock_t dev_lock;
0caff003 110
88523a61
SB		 111/*
112 * Global variable used to hold the major block device number
113 * allocated in mtip_init().
114 */
3ff147d3 115static int mtip_major;
7b421d24 116static struct dentry *dfs_parent;
0caff003 117static struct dentry *dfs_device_status;
88523a61 118
16c906e5
AT		 119static u32 cpu_use[NR_CPUS];
120
88523a61
SB		 121static DEFINE_SPINLOCK(rssd_index_lock);
122static DEFINE_IDA(rssd_index_ida);
123
62ee8c13
AT		 124static int mtip_block_initialize(struct driver_data *dd);
125
16d02c04 126#ifdef CONFIG_COMPAT
88523a61
SB		 127struct mtip_compat_ide_task_request_s {
128 __u8 io_ports[8];
129 __u8 hob_ports[8];
130 ide_reg_valid_t out_flags;
131 ide_reg_valid_t in_flags;
132 int data_phase;
133 int req_cmd;
134 compat_ulong_t out_size;
135 compat_ulong_t in_size;
136};
16d02c04 137#endif
88523a61 138
6316668f
JA		 139/*
140 * This function check_for_surprise_removal is called
141 * while card is removed from the system and it will
142 * read the vendor id from the configration space
143 *
144 * @pdev Pointer to the pci_dev structure.
145 *
146 * return value
147 * true if device removed, else false
148 */
149static bool mtip_check_surprise_removal(struct pci_dev *pdev)
150{
151 u16 vendor_id = 0;
8f8b8995
AT		 152 struct driver_data *dd = pci_get_drvdata(pdev);
153
154 if (dd->sr)
155 return true;
6316668f
JA		 156
157 /* Read the vendorID from the configuration space */
158 pci_read_config_word(pdev, 0x00, &vendor_id);
8f8b8995
AT		 159 if (vendor_id == 0xFFFF) {
160 dd->sr = true;
161 if (dd->queue)
162 set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags);
163 else
164 dev_warn(&dd->pdev->dev,
165 "%s: dd->queue is NULL\n", __func__);
6316668f 166 return true; /* device removed */
6316668f
JA		 167 }
168
8f8b8995 169 return false; /* device present */
6316668f
JA		 170}
171
a4e84aae
ML		 172/* we have to use runtime tag to setup command header */
173static void mtip_init_cmd_header(struct request *rq)
174{
175 struct driver_data *dd = rq->q->queuedata;
176 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
177 u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64;
178
179 /* Point the command headers at the command tables. */
180 cmd->command_header = dd->port->command_list +
181 (sizeof(struct mtip_cmd_hdr) * rq->tag);
182 cmd->command_header_dma = dd->port->command_list_dma +
183 (sizeof(struct mtip_cmd_hdr) * rq->tag);
184
185 if (host_cap_64)
186 cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16);
187
188 cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF);
189}
190
ffc771b3 191static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd)
88523a61 192{
ffc771b3 193 struct request *rq;
88523a61 194
008e56d2
ATS		 195 if (mtip_check_surprise_removal(dd->pdev))
196 return NULL;
197
3f5e6a35 198 rq = blk_mq_alloc_request(dd->queue, REQ_OP_DRV_IN, BLK_MQ_REQ_RESERVED);
008e56d2
ATS		 199 if (IS_ERR(rq))
200 return NULL;
201
a4e84aae
ML		 202 /* Internal cmd isn't submitted via .queue_rq */
203 mtip_init_cmd_header(rq);
204
ffc771b3
JA		 205 return blk_mq_rq_to_pdu(rq);
206}
88523a61 207
ffc771b3
JA		 208static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd)
209{
210 blk_put_request(blk_mq_rq_from_pdu(cmd));
88523a61
SB		 211}
212
213/*
ffc771b3 214 * Once we add support for one hctx per mtip group, this will change a bit
88523a61 215 */
ffc771b3
JA		 216static struct request *mtip_rq_from_tag(struct driver_data *dd,
217 unsigned int tag)
218{
0e62f51f
JA		 219 struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0];
220
221 return blk_mq_tag_to_rq(hctx->tags, tag);
ffc771b3
JA		 222}
223
224static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd,
225 unsigned int tag)
88523a61 226{
ffc771b3
JA		 227 struct request *rq = mtip_rq_from_tag(dd, tag);
228
229 return blk_mq_rq_to_pdu(rq);
88523a61
SB		 230}
231
8f8b8995
AT		 232/*
233 * IO completion function.
234 *
235 * This completion function is called by the driver ISR when a
236 * command that was issued by the kernel completes. It first calls the
237 * asynchronous completion function which normally calls back into the block
238 * layer passing the asynchronous callback data, then unmaps the
239 * scatter list associated with the completed command, and finally
240 * clears the allocated bit associated with the completed command.
241 *
242 * @port Pointer to the port data structure.
243 * @tag Tag of the command.
244 * @data Pointer to driver_data.
245 * @status Completion status.
246 *
247 * return value
248 * None
249 */
250static void mtip_async_complete(struct mtip_port *port,
ffc771b3 251 int tag, struct mtip_cmd *cmd, int status)
8f8b8995 252{
ffc771b3
JA		 253 struct driver_data *dd = port->dd;
254 struct request *rq;
8f8b8995
AT		 255
256 if (unlikely(!dd) || unlikely(!port))
257 return;
258
8f8b8995
AT		 259 if (unlikely(status == PORT_IRQ_TF_ERR)) {
260 dev_warn(&port->dd->pdev->dev,
261 "Command tag %d failed due to TFE\n", tag);
262 }
263
ffc771b3 264 rq = mtip_rq_from_tag(dd, tag);
8f8b8995 265
4dda4735 266 cmd->status = status;
08e0029a 267 blk_mq_complete_request(rq);
8f8b8995
AT		 268}
269
88523a61 270/*
6316668f 271 * Reset the HBA (without sleeping)
88523a61 272 *
6316668f 273 * @dd Pointer to the driver data structure.
88523a61
SB		 274 *
275 * return value
6316668f
JA		 276 * 0 The reset was successful.
277 * -1 The HBA Reset bit did not clear.
88523a61 278 */
d0d096b1 279static int mtip_hba_reset(struct driver_data *dd)
88523a61 280{
6316668f 281 unsigned long timeout;
88523a61 282
6316668f
JA		 283 /* Set the reset bit */
284 writel(HOST_RESET, dd->mmio + HOST_CTL);
88523a61 285
6316668f
JA		 286 /* Flush */
287 readl(dd->mmio + HOST_CTL);
88523a61 288
2f17d71d
ATS		 289 /*
290 * Spin for up to 10 seconds waiting for reset acknowledgement. Spec
291 * is 1 sec but in LUN failure conditions, up to 10 secs are required
292 */
293 timeout = jiffies + msecs_to_jiffies(10000);
d0d096b1
AT		 294 do {
295 mdelay(10);
296 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))
297 return -1;
88523a61 298
d0d096b1
AT		 299 } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET)
300 && time_before(jiffies, timeout));
45038367 301
6316668f
JA		 302 if (readl(dd->mmio + HOST_CTL) & HOST_RESET)
303 return -1;
88523a61 304
6316668f 305 return 0;
88523a61
SB		 306}
307
308/*
6316668f 309 * Issue a command to the hardware.
88523a61 310 *
6316668f
JA		 311 * Set the appropriate bit in the s_active and Command Issue hardware
312 * registers, causing hardware command processing to begin.
88523a61 313 *
6316668f
JA		 314 * @port Pointer to the port structure.
315 * @tag The tag of the command to be issued.
88523a61
SB		 316 *
317 * return value
6316668f 318 * None
88523a61 319 */
6316668f 320static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag)
88523a61 321{
16c906e5 322 int group = tag >> 5;
88523a61 323
16c906e5
AT		 324 /* guard SACT and CI registers */
325 spin_lock(&port->cmd_issue_lock[group]);
6316668f
JA		 326 writel((1 << MTIP_TAG_BIT(tag)),
327 port->s_active[MTIP_TAG_INDEX(tag)]);
328 writel((1 << MTIP_TAG_BIT(tag)),
329 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
16c906e5 330 spin_unlock(&port->cmd_issue_lock[group]);
88523a61
SB		 331}
332
333/*
334 * Enable/disable the reception of FIS
335 *
336 * @port Pointer to the port data structure
337 * @enable 1 to enable, 0 to disable
338 *
339 * return value
340 * Previous state: 1 enabled, 0 disabled
341 */
342static int mtip_enable_fis(struct mtip_port *port, int enable)
343{
344 u32 tmp;
345
346 /* enable FIS reception */
347 tmp = readl(port->mmio + PORT_CMD);
348 if (enable)
349 writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
350 else
351 writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD);
352
353 /* Flush */
354 readl(port->mmio + PORT_CMD);
355
356 return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX));
357}
358
359/*
360 * Enable/disable the DMA engine
361 *
362 * @port Pointer to the port data structure
363 * @enable 1 to enable, 0 to disable
364 *
365 * return value
366 * Previous state: 1 enabled, 0 disabled.
367 */
368static int mtip_enable_engine(struct mtip_port *port, int enable)
369{
370 u32 tmp;
371
372 /* enable FIS reception */
373 tmp = readl(port->mmio + PORT_CMD);
374 if (enable)
375 writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD);
376 else
377 writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD);
378
379 readl(port->mmio + PORT_CMD);
380 return (((tmp & PORT_CMD_START) == PORT_CMD_START));
381}
382
383/*
384 * Enables the port DMA engine and FIS reception.
385 *
386 * return value
387 * None
388 */
389static inline void mtip_start_port(struct mtip_port *port)
390{
391 /* Enable FIS reception */
392 mtip_enable_fis(port, 1);
393
394 /* Enable the DMA engine */
395 mtip_enable_engine(port, 1);
396}
397
398/*
399 * Deinitialize a port by disabling port interrupts, the DMA engine,
400 * and FIS reception.
401 *
402 * @port Pointer to the port structure
403 *
404 * return value
405 * None
406 */
407static inline void mtip_deinit_port(struct mtip_port *port)
408{
409 /* Disable interrupts on this port */
410 writel(0, port->mmio + PORT_IRQ_MASK);
411
412 /* Disable the DMA engine */
413 mtip_enable_engine(port, 0);
414
415 /* Disable FIS reception */
416 mtip_enable_fis(port, 0);
417}
418
419/*
420 * Initialize a port.
421 *
422 * This function deinitializes the port by calling mtip_deinit_port() and
423 * then initializes it by setting the command header and RX FIS addresses,
424 * clearing the SError register and any pending port interrupts before
425 * re-enabling the default set of port interrupts.
426 *
427 * @port Pointer to the port structure.
428 *
429 * return value
430 * None
431 */
432static void mtip_init_port(struct mtip_port *port)
433{
434 int i;
435 mtip_deinit_port(port);
436
437 /* Program the command list base and FIS base addresses */
438 if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) {
439 writel((port->command_list_dma >> 16) >> 16,
440 port->mmio + PORT_LST_ADDR_HI);
441 writel((port->rxfis_dma >> 16) >> 16,
442 port->mmio + PORT_FIS_ADDR_HI);
443 }
444
60ec0eec 445 writel(port->command_list_dma & 0xFFFFFFFF,
88523a61 446 port->mmio + PORT_LST_ADDR);
60ec0eec 447 writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR);
88523a61
SB		 448
449 /* Clear SError */
450 writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR);
451
6316668f
JA		 452 /* reset the completed registers.*/
453 for (i = 0; i < port->dd->slot_groups; i++)
454 writel(0xFFFFFFFF, port->completed[i]);
88523a61 455
6316668f 456 /* Clear any pending interrupts for this port */
6bb688c0 457 writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT);
88523a61 458
22be2e6e
AT		 459 /* Clear any pending interrupts on the HBA. */
460 writel(readl(port->dd->mmio + HOST_IRQ_STAT),
461 port->dd->mmio + HOST_IRQ_STAT);
462
6316668f
JA		 463 /* Enable port interrupts */
464 writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK);
88523a61
SB		 465}
466
467/*
468 * Restart a port
469 *
470 * @port Pointer to the port data structure.
471 *
472 * return value
473 * None
474 */
6316668f 475static void mtip_restart_port(struct mtip_port *port)
88523a61
SB		 476{
477 unsigned long timeout;
478
479 /* Disable the DMA engine */
480 mtip_enable_engine(port, 0);
481
482 /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */
483 timeout = jiffies + msecs_to_jiffies(500);
484 while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON)
485 && time_before(jiffies, timeout))
486 ;
487
8a857a88 488 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 489 return;
490
88523a61
SB		 491 /*
492 * Chip quirk: escalate to hba reset if
493 * PxCMD.CR not clear after 500 ms
494 */
495 if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) {
496 dev_warn(&port->dd->pdev->dev,
497 "PxCMD.CR not clear, escalating reset\n");
498
d0d096b1 499 if (mtip_hba_reset(port->dd))
88523a61
SB		 500 dev_err(&port->dd->pdev->dev,
501 "HBA reset escalation failed.\n");
502
503 /* 30 ms delay before com reset to quiesce chip */
504 mdelay(30);
505 }
506
507 dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n");
508
509 /* Set PxSCTL.DET */
510 writel(readl(port->mmio + PORT_SCR_CTL) |
511 1, port->mmio + PORT_SCR_CTL);
512 readl(port->mmio + PORT_SCR_CTL);
513
514 /* Wait 1 ms to quiesce chip function */
515 timeout = jiffies + msecs_to_jiffies(1);
516 while (time_before(jiffies, timeout))
517 ;
518
8a857a88 519 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 520 return;
521
88523a61
SB		 522 /* Clear PxSCTL.DET */
523 writel(readl(port->mmio + PORT_SCR_CTL) & ~1,
524 port->mmio + PORT_SCR_CTL);
525 readl(port->mmio + PORT_SCR_CTL);
526
527 /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */
528 timeout = jiffies + msecs_to_jiffies(500);
529 while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
530 && time_before(jiffies, timeout))
531 ;
532
8a857a88 533 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 534 return;
535
88523a61
SB		 536 if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0)
537 dev_warn(&port->dd->pdev->dev,
538 "COM reset failed\n");
539
22be2e6e
AT		 540 mtip_init_port(port);
541 mtip_start_port(port);
88523a61 542
88523a61
SB		 543}
544
d0d096b1
AT		 545static int mtip_device_reset(struct driver_data *dd)
546{
547 int rv = 0;
548
549 if (mtip_check_surprise_removal(dd->pdev))
550 return 0;
551
552 if (mtip_hba_reset(dd) < 0)
553 rv = -EFAULT;
554
555 mdelay(1);
556 mtip_init_port(dd->port);
557 mtip_start_port(dd->port);
558
559 /* Enable interrupts on the HBA. */
560 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
561 dd->mmio + HOST_CTL);
562 return rv;
563}
564
95fea2f1
AT		 565/*
566 * Helper function for tag logging
567 */
568static void print_tags(struct driver_data *dd,
569 char *msg,
570 unsigned long *tagbits,
571 int cnt)
572{
573 unsigned char tagmap[128];
574 int group, tagmap_len = 0;
575
576 memset(tagmap, 0, sizeof(tagmap));
577 for (group = SLOTBITS_IN_LONGS; group > 0; group--)
ffc771b3 578 tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ",
95fea2f1
AT		 579 tagbits[group-1]);
580 dev_warn(&dd->pdev->dev,
581 "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap);
582}
583
6316668f
JA		 584/*
585 * Internal command completion callback function.
586 *
587 * This function is normally called by the driver ISR when an internal
588 * command completed. This function signals the command completion by
589 * calling complete().
590 *
591 * @port Pointer to the port data structure.
592 * @tag Tag of the command that has completed.
593 * @data Pointer to a completion structure.
594 * @status Completion status.
595 *
596 * return value
597 * None
598 */
599static void mtip_completion(struct mtip_port *port,
ffc771b3 600 int tag, struct mtip_cmd *command, int status)
6316668f 601{
ffc771b3 602 struct completion *waiting = command->comp_data;
6316668f
JA		 603 if (unlikely(status == PORT_IRQ_TF_ERR))
604 dev_warn(&port->dd->pdev->dev,
605 "Internal command %d completed with TFE\n", tag);
606
008e56d2
ATS		 607 command->comp_func = NULL;
608 command->comp_data = NULL;
6316668f
JA		 609 complete(waiting);
610}
611
f6587217
AT		 612static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
613 dma_addr_t buffer_dma, unsigned int sectors);
614static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
615 struct smart_attr *attrib);
88523a61
SB		 616/*
617 * Handle an error.
618 *
619 * @dd Pointer to the DRIVER_DATA structure.
620 *
621 * return value
622 * None
623 */
624static void mtip_handle_tfe(struct driver_data *dd)
625{
f6587217 626 int group, tag, bit, reissue, rv;
88523a61 627 struct mtip_port *port;
f6587217 628 struct mtip_cmd *cmd;
88523a61
SB		 629 u32 completed;
630 struct host_to_dev_fis *fis;
631 unsigned long tagaccum[SLOTBITS_IN_LONGS];
95fea2f1 632 unsigned int cmd_cnt = 0;
f6587217
AT		 633 unsigned char *buf;
634 char *fail_reason = NULL;
635 int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0;
88523a61
SB		 636
637 dev_warn(&dd->pdev->dev, "Taskfile error\n");
638
639 port = dd->port;
640
a7806fad 641 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) {
ffc771b3 642 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
d02e1f0a
AT		 643 dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n");
644
d02e1f0a
AT		 645 if (cmd->comp_data && cmd->comp_func) {
646 cmd->comp_func(port, MTIP_TAG_INTERNAL,
ffc771b3 647 cmd, PORT_IRQ_TF_ERR);
d02e1f0a 648 }
e35b9473 649 return;
d02e1f0a 650 }
88523a61 651
95fea2f1
AT		 652 /* clear the tag accumulator */
653 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
654
88523a61
SB		 655 /* Loop through all the groups */
656 for (group = 0; group < dd->slot_groups; group++) {
657 completed = readl(port->completed[group]);
658
ffc771b3
JA		 659 dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed);
660
88523a61
SB		 661 /* clear completed status register in the hardware.*/
662 writel(completed, port->completed[group]);
663
88523a61
SB		 664 /* Process successfully completed commands */
665 for (bit = 0; bit < 32 && completed; bit++) {
666 if (!(completed & (1<<bit)))
667 continue;
668 tag = (group << 5) + bit;
669
670 /* Skip the internal command slot */
671 if (tag == MTIP_TAG_INTERNAL)
672 continue;
673
ffc771b3 674 cmd = mtip_cmd_from_tag(dd, tag);
f6587217 675 if (likely(cmd->comp_func)) {
88523a61 676 set_bit(tag, tagaccum);
95fea2f1 677 cmd_cnt++;
ffc771b3 678 cmd->comp_func(port, tag, cmd, 0);
88523a61
SB		 679 } else {
680 dev_err(&port->dd->pdev->dev,
681 "Missing completion func for tag %d",
682 tag);
683 if (mtip_check_surprise_removal(dd->pdev)) {
88523a61
SB		 684 /* don't proceed further */
685 return;
686 }
687 }
688 }
689 }
95fea2f1
AT		 690
691 print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt);
88523a61
SB		 692
693 /* Restart the port */
694 mdelay(20);
695 mtip_restart_port(port);
696
f6587217
AT		 697 /* Trying to determine the cause of the error */
698 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
699 dd->port->log_buf,
700 dd->port->log_buf_dma, 1);
701 if (rv) {
702 dev_warn(&dd->pdev->dev,
703 "Error in READ LOG EXT (10h) command\n");
704 /* non-critical error, don't fail the load */
705 } else {
706 buf = (unsigned char *)dd->port->log_buf;
707 if (buf[259] & 0x1) {
708 dev_info(&dd->pdev->dev,
709 "Write protect bit is set.\n");
8a857a88 710 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
f6587217
AT		 711 fail_all_ncq_write = 1;
712 fail_reason = "write protect";
713 }
714 if (buf[288] == 0xF7) {
715 dev_info(&dd->pdev->dev,
716 "Exceeded Tmax, drive in thermal shutdown.\n");
8a857a88 717 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
f6587217
AT		 718 fail_all_ncq_cmds = 1;
719 fail_reason = "thermal shutdown";
720 }
721 if (buf[288] == 0xBF) {
aae4a033 722 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
f6587217 723 dev_info(&dd->pdev->dev,
26d58057 724 "Drive indicates rebuild has failed. Secure erase required.\n");
f6587217
AT		 725 fail_all_ncq_cmds = 1;
726 fail_reason = "rebuild failed";
727 }
728 }
729
88523a61
SB		 730 /* clear the tag accumulator */
731 memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long));
732
733 /* Loop through all the groups */
734 for (group = 0; group < dd->slot_groups; group++) {
735 for (bit = 0; bit < 32; bit++) {
736 reissue = 1;
737 tag = (group << 5) + bit;
ffc771b3 738 cmd = mtip_cmd_from_tag(dd, tag);
88523a61 739
f6587217 740 fis = (struct host_to_dev_fis *)cmd->command;
88523a61
SB		 741
742 /* Should re-issue? */
743 if (tag == MTIP_TAG_INTERNAL ||
744 fis->command == ATA_CMD_SET_FEATURES)
745 reissue = 0;
f6587217
AT		 746 else {
747 if (fail_all_ncq_cmds ||
748 (fail_all_ncq_write &&
749 fis->command == ATA_CMD_FPDMA_WRITE)) {
750 dev_warn(&dd->pdev->dev,
751 " Fail: %s w/tag %d [%s].\n",
752 fis->command == ATA_CMD_FPDMA_WRITE ?
753 "write" : "read",
754 tag,
755 fail_reason != NULL ?
756 fail_reason : "unknown");
f6587217
AT		 757 if (cmd->comp_func) {
758 cmd->comp_func(port, tag,
ffc771b3 759 cmd, -ENODATA);
f6587217
AT		 760 }
761 continue;
762 }
763 }
88523a61
SB		 764
765 /*
766 * First check if this command has
767 * exceeded its retries.
768 */
f6587217 769 if (reissue && (cmd->retries-- > 0)) {
88523a61
SB		 770
771 set_bit(tag, tagaccum);
772
88523a61
SB		 773 /* Re-issue the command. */
774 mtip_issue_ncq_command(port, tag);
775
776 continue;
777 }
778
779 /* Retire a command that will not be reissued */
780 dev_warn(&port->dd->pdev->dev,
781 "retiring tag %d\n", tag);
88523a61 782
f6587217 783 if (cmd->comp_func)
ffc771b3 784 cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR);
88523a61
SB		 785 else
786 dev_warn(&port->dd->pdev->dev,
787 "Bad completion for tag %d\n",
788 tag);
789 }
790 }
95fea2f1 791 print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt);
88523a61
SB		 792}
793
794/*
795 * Handle a set device bits interrupt
796 */
16c906e5
AT		 797static inline void mtip_workq_sdbfx(struct mtip_port *port, int group,
798 u32 completed)
88523a61 799{
16c906e5
AT		 800 struct driver_data *dd = port->dd;
801 int tag, bit;
88523a61
SB		 802 struct mtip_cmd *command;
803
16c906e5
AT		 804 if (!completed) {
805 WARN_ON_ONCE(!completed);
806 return;
807 }
808 /* clear completed status register in the hardware.*/
809 writel(completed, port->completed[group]);
88523a61 810
16c906e5
AT		 811 /* Process completed commands. */
812 for (bit = 0; (bit < 32) && completed; bit++) {
813 if (completed & 0x01) {
814 tag = (group << 5) | bit;
88523a61 815
16c906e5
AT		 816 /* skip internal command slot. */
817 if (unlikely(tag == MTIP_TAG_INTERNAL))
818 continue;
88523a61 819
ffc771b3
JA		 820 command = mtip_cmd_from_tag(dd, tag);
821 if (likely(command->comp_func))
822 command->comp_func(port, tag, command, 0);
823 else {
8f8b8995
AT		 824 dev_dbg(&dd->pdev->dev,
825 "Null completion for tag %d",
16c906e5 826 tag);
88523a61 827
16c906e5
AT		 828 if (mtip_check_surprise_removal(
829 dd->pdev)) {
16c906e5 830 return;
88523a61
SB		 831 }
832 }
833 }
16c906e5 834 completed >>= 1;
88523a61 835 }
16c906e5
AT		 836
837 /* If last, re-enable interrupts */
838 if (atomic_dec_return(&dd->irq_workers_active) == 0)
839 writel(0xffffffff, dd->mmio + HOST_IRQ_STAT);
88523a61
SB		 840}
841
842/*
843 * Process legacy pio and d2h interrupts
844 */
845static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat)
846{
847 struct mtip_port *port = dd->port;
ffc771b3 848 struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
88523a61 849
8a857a88 850 if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) &&
60ec0eec 851 (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL])
88523a61
SB		 852 & (1 << MTIP_TAG_INTERNAL))) {
853 if (cmd->comp_func) {
ffc771b3 854 cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0);
88523a61
SB		 855 return;
856 }
857 }
858
88523a61
SB		 859 return;
860}
861
862/*
863 * Demux and handle errors
864 */
865static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat)
866{
88523a61
SB		 867
868 if (unlikely(port_stat & PORT_IRQ_CONNECT)) {
869 dev_warn(&dd->pdev->dev,
870 "Clearing PxSERR.DIAG.x\n");
871 writel((1 << 26), dd->port->mmio + PORT_SCR_ERR);
872 }
873
874 if (unlikely(port_stat & PORT_IRQ_PHYRDY)) {
875 dev_warn(&dd->pdev->dev,
876 "Clearing PxSERR.DIAG.n\n");
877 writel((1 << 16), dd->port->mmio + PORT_SCR_ERR);
878 }
879
880 if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) {
881 dev_warn(&dd->pdev->dev,
882 "Port stat errors %x unhandled\n",
883 (port_stat & ~PORT_IRQ_HANDLED));
9b204fbf
AT		 884 if (mtip_check_surprise_removal(dd->pdev))
885 return;
886 }
887 if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) {
888 set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags);
889 wake_up_interruptible(&dd->port->svc_wait);
88523a61
SB		 890 }
891}
892
893static inline irqreturn_t mtip_handle_irq(struct driver_data *data)
894{
895 struct driver_data *dd = (struct driver_data *) data;
896 struct mtip_port *port = dd->port;
897 u32 hba_stat, port_stat;
898 int rv = IRQ_NONE;
16c906e5
AT		 899 int do_irq_enable = 1, i, workers;
900 struct mtip_work *twork;
88523a61
SB		 901
902 hba_stat = readl(dd->mmio + HOST_IRQ_STAT);
903 if (hba_stat) {
904 rv = IRQ_HANDLED;
905
906 /* Acknowledge the interrupt status on the port.*/
907 port_stat = readl(port->mmio + PORT_IRQ_STAT);
2132a544
ATS		 908 if (unlikely(port_stat == 0xFFFFFFFF)) {
909 mtip_check_surprise_removal(dd->pdev);
910 return IRQ_HANDLED;
911 }
88523a61
SB		 912 writel(port_stat, port->mmio + PORT_IRQ_STAT);
913
914 /* Demux port status */
16c906e5
AT		 915 if (likely(port_stat & PORT_IRQ_SDB_FIS)) {
916 do_irq_enable = 0;
917 WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0);
918
919 /* Start at 1: group zero is always local? */
920 for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS;
921 i++) {
922 twork = &dd->work[i];
923 twork->completed = readl(port->completed[i]);
924 if (twork->completed)
925 workers++;
926 }
927
928 atomic_set(&dd->irq_workers_active, workers);
929 if (workers) {
930 for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) {
931 twork = &dd->work[i];
932 if (twork->completed)
933 queue_work_on(
934 twork->cpu_binding,
935 dd->isr_workq,
936 &twork->work);
937 }
938
939 if (likely(dd->work[0].completed))
940 mtip_workq_sdbfx(port, 0,
941 dd->work[0].completed);
942
943 } else {
944 /*
945 * Chip quirk: SDB interrupt but nothing
946 * to complete
947 */
948 do_irq_enable = 1;
949 }
950 }
88523a61
SB		 951
952 if (unlikely(port_stat & PORT_IRQ_ERR)) {
953 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
88523a61
SB		 954 /* don't proceed further */
955 return IRQ_HANDLED;
956 }
8a857a88 957 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367
AT		 958 &dd->dd_flag))
959 return rv;
88523a61
SB		 960
961 mtip_process_errors(dd, port_stat & PORT_IRQ_ERR);
962 }
963
964 if (unlikely(port_stat & PORT_IRQ_LEGACY))
965 mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY);
966 }
967
968 /* acknowledge interrupt */
16c906e5
AT		 969 if (unlikely(do_irq_enable))
970 writel(hba_stat, dd->mmio + HOST_IRQ_STAT);
88523a61
SB		 971
972 return rv;
973}
974
88523a61
SB		 975/*
976 * HBA interrupt subroutine.
977 *
978 * @irq IRQ number.
979 * @instance Pointer to the driver data structure.
980 *
981 * return value
982 * IRQ_HANDLED A HBA interrupt was pending and handled.
983 * IRQ_NONE This interrupt was not for the HBA.
984 */
985static irqreturn_t mtip_irq_handler(int irq, void *instance)
986{
987 struct driver_data *dd = instance;
16c906e5
AT		 988
989 return mtip_handle_irq(dd);
88523a61
SB		 990}
991
992static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag)
993{
88523a61
SB		 994 writel(1 << MTIP_TAG_BIT(tag),
995 port->cmd_issue[MTIP_TAG_INDEX(tag)]);
996}
997
c74b0f58
AT		 998static bool mtip_pause_ncq(struct mtip_port *port,
999 struct host_to_dev_fis *fis)
1000{
1001 struct host_to_dev_fis *reply;
1002 unsigned long task_file_data;
1003
1004 reply = port->rxfis + RX_FIS_D2H_REG;
1005 task_file_data = readl(port->mmio+PORT_TFDATA);
1006
12a166c9 1007 if ((task_file_data & 1))
c74b0f58
AT		 1008 return false;
1009
1010 if (fis->command == ATA_CMD_SEC_ERASE_PREP) {
c74b0f58
AT		 1011 port->ic_pause_timer = jiffies;
1012 return true;
1013 } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) &&
1014 (fis->features == 0x03)) {
1015 set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
1016 port->ic_pause_timer = jiffies;
1017 return true;
1018 } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) ||
1019 ((fis->command == 0xFC) &&
1020 (fis->features == 0x27 || fis->features == 0x72 ||
1021 fis->features == 0x62 || fis->features == 0x26))) {
ee04bed6 1022 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
aae4a033 1023 clear_bit(MTIP_DDF_REBUILD_FAILED_BIT, &port->dd->dd_flag);
c74b0f58
AT		 1024 /* Com reset after secure erase or lowlevel format */
1025 mtip_restart_port(port);
686d8e0b 1026 clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
c74b0f58
AT		 1027 return false;
1028 }
1029
1030 return false;
1031}
1032
baed548a
JA		 1033static bool mtip_commands_active(struct mtip_port *port)
1034{
1035 unsigned int active;
1036 unsigned int n;
1037
1038 /*
1039 * Ignore s_active bit 0 of array element 0.
1040 * This bit will always be set
1041 */
1042 active = readl(port->s_active[0]) & 0xFFFFFFFE;
1043 for (n = 1; n < port->dd->slot_groups; n++)
1044 active |= readl(port->s_active[n]);
1045
1046 return active != 0;
1047}
1048
88523a61
SB		 1049/*
1050 * Wait for port to quiesce
1051 *
1052 * @port Pointer to port data structure
1053 * @timeout Max duration to wait (ms)
1054 *
1055 * return value
1056 * 0 Success
1057 * -EBUSY Commands still active
1058 */
8afdd94c 1059static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout)
88523a61
SB		 1060{
1061 unsigned long to;
baed548a 1062 bool active = true;
88523a61 1063
9acf03cf
JA		 1064 blk_mq_stop_hw_queues(port->dd->queue);
1065
88523a61
SB		 1066 to = jiffies + msecs_to_jiffies(timeout);
1067 do {
8a857a88 1068 if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) &&
8afdd94c 1069 test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
60ec0eec
AT		 1070 msleep(20);
1071 continue; /* svc thd is actively issuing commands */
1072 }
9b204fbf 1073
8afdd94c 1074 msleep(100);
008e56d2 1075
9b204fbf
AT		 1076 if (mtip_check_surprise_removal(port->dd->pdev))
1077 goto err_fault;
9b204fbf 1078
baed548a 1079 active = mtip_commands_active(port);
88523a61
SB		 1080 if (!active)
1081 break;
88523a61
SB		 1082 } while (time_before(jiffies, to));
1083
9acf03cf 1084 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
88523a61 1085 return active ? -EBUSY : 0;
9acf03cf
JA		 1086err_fault:
1087 blk_mq_start_stopped_hw_queues(port->dd->queue, true);
1088 return -EFAULT;
88523a61
SB		 1089}
1090
3f5e6a35
JA		 1091struct mtip_int_cmd {
1092 int fis_len;
1093 dma_addr_t buffer;
1094 int buf_len;
1095 u32 opts;
1096};
1097
88523a61
SB		 1098/*
1099 * Execute an internal command and wait for the completion.
1100 *
1101 * @port Pointer to the port data structure.
1102 * @fis Pointer to the FIS that describes the command.
60ec0eec 1103 * @fis_len Length in WORDS of the FIS.
88523a61 1104 * @buffer DMA accessible for command data.
60ec0eec 1105 * @buf_len Length, in bytes, of the data buffer.
88523a61
SB		 1106 * @opts Command header options, excluding the FIS length
1107 * and the number of PRD entries.
1108 * @timeout Time in ms to wait for the command to complete.
1109 *
1110 * return value
1111 * 0 Command completed successfully.
1112 * -EFAULT The buffer address is not correctly aligned.
1113 * -EBUSY Internal command or other IO in progress.
1114 * -EAGAIN Time out waiting for command to complete.
1115 */
1116static int mtip_exec_internal_command(struct mtip_port *port,
8182b495 1117 struct host_to_dev_fis *fis,
60ec0eec 1118 int fis_len,
88523a61 1119 dma_addr_t buffer,
60ec0eec 1120 int buf_len,
88523a61 1121 u32 opts,
88523a61
SB		 1122 unsigned long timeout)
1123{
88523a61 1124 DECLARE_COMPLETION_ONSTACK(wait);
ffc771b3 1125 struct mtip_cmd *int_cmd;
d0d096b1 1126 struct driver_data *dd = port->dd;
3f5e6a35
JA		 1127 struct request *rq;
1128 struct mtip_int_cmd icmd = {
1129 .fis_len = fis_len,
1130 .buffer = buffer,
1131 .buf_len = buf_len,
1132 .opts = opts
1133 };
ffc771b3 1134 int rv = 0;
5b7e0a8a 1135 unsigned long start;
88523a61
SB		 1136
1137 /* Make sure the buffer is 8 byte aligned. This is asic specific. */
1138 if (buffer & 0x00000007) {
d0d096b1 1139 dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n");
88523a61
SB		 1140 return -EFAULT;
1141 }
1142
ffc771b3 1143 int_cmd = mtip_get_int_command(dd);
008e56d2
ATS		 1144 if (!int_cmd) {
1145 dbg_printk(MTIP_DRV_NAME "Unable to allocate tag for PIO cmd\n");
1146 return -EFAULT;
1147 }
3f5e6a35
JA		 1148 rq = blk_mq_rq_from_pdu(int_cmd);
1149 rq->end_io_data = &icmd;
ffc771b3 1150
8a857a88 1151 set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
c74b0f58 1152
686d8e0b
ATS		 1153 if (fis->command == ATA_CMD_SEC_ERASE_PREP)
1154 set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags);
1155
d0d096b1 1156 clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags);
88523a61 1157
0f6422a2
JA		 1158 if (fis->command != ATA_CMD_STANDBYNOW1) {
1159 /* wait for io to complete if non atomic */
8afdd94c 1160 if (mtip_quiesce_io(port, MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) {
0f6422a2
JA		 1161 dev_warn(&dd->pdev->dev, "Failed to quiesce IO\n");
1162 mtip_put_int_command(dd, int_cmd);
1163 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
1164 wake_up_interruptible(&port->svc_wait);
1165 return -EBUSY;
88523a61 1166 }
88523a61
SB		 1167 }
1168
0f6422a2
JA		 1169 /* Set the completion function and data for the command. */
1170 int_cmd->comp_data = &wait;
1171 int_cmd->comp_func = mtip_completion;
1172
88523a61 1173 /* Copy the command to the command table */
60ec0eec 1174 memcpy(int_cmd->command, fis, fis_len*4);
88523a61 1175
5b7e0a8a 1176 start = jiffies;
3f5e6a35 1177 rq->timeout = timeout;
5b7e0a8a 1178
3f5e6a35
JA		 1179 /* insert request and run queue */
1180 blk_execute_rq_nowait(rq->q, NULL, rq, true, NULL);
1181
1182 wait_for_completion(&wait);
1183 rv = int_cmd->status;
88523a61 1184
3f5e6a35 1185 if (rv < 0) {
0f6422a2
JA		 1186 if (rv == -ERESTARTSYS) { /* interrupted */
1187 dev_err(&dd->pdev->dev,
1188 "Internal command [%02X] was interrupted after %u ms\n",
1189 fis->command,
1190 jiffies_to_msecs(jiffies - start));
1191 rv = -EINTR;
d0d096b1 1192 goto exec_ic_exit;
0f6422a2
JA		 1193 } else if (rv == 0) /* timeout */
1194 dev_err(&dd->pdev->dev,
1195 "Internal command did not complete [%02X] within timeout of %lu ms\n",
1196 fis->command, timeout);
1197 else
1198 dev_err(&dd->pdev->dev,
1199 "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n",
1200 fis->command, rv, timeout);
d0d096b1 1201
0f6422a2
JA		 1202 if (mtip_check_surprise_removal(dd->pdev) ||
1203 test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
1204 &dd->dd_flag)) {
1205 dev_err(&dd->pdev->dev,
1206 "Internal command [%02X] wait returned due to SR\n",
1207 fis->command);
1208 rv = -ENXIO;
1209 goto exec_ic_exit;
45038367 1210 }
0f6422a2
JA		 1211 mtip_device_reset(dd); /* recover from timeout issue */
1212 rv = -EAGAIN;
1213 goto exec_ic_exit;
d02e1f0a 1214 }
88523a61 1215
d02e1f0a 1216 if (readl(port->cmd_issue[MTIP_TAG_INTERNAL])
88523a61 1217 & (1 << MTIP_TAG_INTERNAL)) {
d02e1f0a 1218 rv = -ENXIO;
d0d096b1
AT		 1219 if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
1220 mtip_device_reset(dd);
88523a61
SB		 1221 rv = -EAGAIN;
1222 }
1223 }
45038367 1224exec_ic_exit:
88523a61 1225 /* Clear the allocated and active bits for the internal command. */
ffc771b3 1226 mtip_put_int_command(dd, int_cmd);
686d8e0b 1227 clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags);
c74b0f58
AT		 1228 if (rv >= 0 && mtip_pause_ncq(port, fis)) {
1229 /* NCQ paused */
1230 return rv;
1231 }
60ec0eec 1232 wake_up_interruptible(&port->svc_wait);
88523a61
SB		 1233
1234 return rv;
1235}
1236
1237/*
1238 * Byte-swap ATA ID strings.
1239 *
1240 * ATA identify data contains strings in byte-swapped 16-bit words.
1241 * They must be swapped (on all architectures) to be usable as C strings.
1242 * This function swaps bytes in-place.
1243 *
1244 * @buf The buffer location of the string
1245 * @len The number of bytes to swap
1246 *
1247 * return value
1248 * None
1249 */
1250static inline void ata_swap_string(u16 *buf, unsigned int len)
1251{
1252 int i;
1253 for (i = 0; i < (len/2); i++)
1254 be16_to_cpus(&buf[i]);
1255}
1256
670a6414
AT		 1257static void mtip_set_timeout(struct driver_data *dd,
1258 struct host_to_dev_fis *fis,
1259 unsigned int *timeout, u8 erasemode)
1260{
1261 switch (fis->command) {
1262 case ATA_CMD_DOWNLOAD_MICRO:
1263 *timeout = 120000; /* 2 minutes */
1264 break;
1265 case ATA_CMD_SEC_ERASE_UNIT:
1266 case 0xFC:
1267 if (erasemode)
1268 *timeout = ((*(dd->port->identify + 90) * 2) * 60000);
1269 else
1270 *timeout = ((*(dd->port->identify + 89) * 2) * 60000);
1271 break;
1272 case ATA_CMD_STANDBYNOW1:
1273 *timeout = 120000; /* 2 minutes */
1274 break;
1275 case 0xF7:
1276 case 0xFA:
1277 *timeout = 60000; /* 60 seconds */
1278 break;
1279 case ATA_CMD_SMART:
1280 *timeout = 15000; /* 15 seconds */
1281 break;
1282 default:
9b204fbf 1283 *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS;
670a6414
AT		 1284 break;
1285 }
1286}
1287
88523a61
SB		 1288/*
1289 * Request the device identity information.
1290 *
1291 * If a user space buffer is not specified, i.e. is NULL, the
1292 * identify information is still read from the drive and placed
1293 * into the identify data buffer (@e port->identify) in the
1294 * port data structure.
1295 * When the identify buffer contains valid identify information @e
1296 * port->identify_valid is non-zero.
1297 *
1298 * @port Pointer to the port structure.
1299 * @user_buffer A user space buffer where the identify data should be
1300 * copied.
1301 *
1302 * return value
1303 * 0 Command completed successfully.
1304 * -EFAULT An error occurred while coping data to the user buffer.
1305 * -1 Command failed.
1306 */
1307static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer)
1308{
1309 int rv = 0;
1310 struct host_to_dev_fis fis;
1311
8a857a88 1312 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag))
45038367
AT		 1313 return -EFAULT;
1314
88523a61
SB		 1315 /* Build the FIS. */
1316 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1317 fis.type = 0x27;
1318 fis.opts = 1 << 7;
1319 fis.command = ATA_CMD_ID_ATA;
1320
1321 /* Set the identify information as invalid. */
1322 port->identify_valid = 0;
1323
1324 /* Clear the identify information. */
1325 memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS);
1326
1327 /* Execute the command. */
1328 if (mtip_exec_internal_command(port,
1329 &fis,
1330 5,
1331 port->identify_dma,
1332 sizeof(u16) * ATA_ID_WORDS,
1333 0,
9b204fbf 1334 MTIP_INT_CMD_TIMEOUT_MS)
88523a61
SB		 1335 < 0) {
1336 rv = -1;
1337 goto out;
1338 }
1339
1340 /*
1341 * Perform any necessary byte-swapping. Yes, the kernel does in fact
1342 * perform field-sensitive swapping on the string fields.
1343 * See the kernel use of ata_id_string() for proof of this.
1344 */
1345#ifdef __LITTLE_ENDIAN
1346 ata_swap_string(port->identify + 27, 40); /* model string*/
1347 ata_swap_string(port->identify + 23, 8); /* firmware string*/
1348 ata_swap_string(port->identify + 10, 20); /* serial# string*/
1349#else
1350 {
1351 int i;
1352 for (i = 0; i < ATA_ID_WORDS; i++)
1353 port->identify[i] = le16_to_cpu(port->identify[i]);
1354 }
1355#endif
1356
26d58057
SB		 1357 /* Check security locked state */
1358 if (port->identify[128] & 0x4)
1359 set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1360 else
1361 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag);
1362
68466cbf 1363#ifdef MTIP_TRIM /* Disabling TRIM support temporarily */
15283469
AT		 1364 /* Demux ID.DRAT & ID.RZAT to determine trim support */
1365 if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5))
1366 port->dd->trim_supp = true;
1367 else
68466cbf 1368#endif
15283469
AT		 1369 port->dd->trim_supp = false;
1370
88523a61
SB		 1371 /* Set the identify buffer as valid. */
1372 port->identify_valid = 1;
1373
1374 if (user_buffer) {
1375 if (copy_to_user(
1376 user_buffer,
1377 port->identify,
1378 ATA_ID_WORDS * sizeof(u16))) {
1379 rv = -EFAULT;
1380 goto out;
1381 }
1382 }
1383
1384out:
88523a61
SB		 1385 return rv;
1386}
1387
1388/*
1389 * Issue a standby immediate command to the device.
1390 *
1391 * @port Pointer to the port structure.
1392 *
1393 * return value
1394 * 0 Command was executed successfully.
1395 * -1 An error occurred while executing the command.
1396 */
1397static int mtip_standby_immediate(struct mtip_port *port)
1398{
1399 int rv;
1400 struct host_to_dev_fis fis;
f6587217 1401 unsigned long start;
670a6414 1402 unsigned int timeout;
88523a61 1403
88523a61
SB		 1404 /* Build the FIS. */
1405 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1406 fis.type = 0x27;
1407 fis.opts = 1 << 7;
1408 fis.command = ATA_CMD_STANDBYNOW1;
1409
670a6414
AT		 1410 mtip_set_timeout(port->dd, &fis, &timeout, 0);
1411
f6587217 1412 start = jiffies;
88523a61
SB		 1413 rv = mtip_exec_internal_command(port,
1414 &fis,
1415 5,
1416 0,
1417 0,
1418 0,
670a6414 1419 timeout);
f6587217
AT		 1420 dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n",
1421 jiffies_to_msecs(jiffies - start));
1422 if (rv)
1423 dev_warn(&port->dd->pdev->dev,
1424 "STANDBY IMMEDIATE command failed.\n");
1425
1426 return rv;
1427}
1428
1429/*
1430 * Issue a READ LOG EXT command to the device.
1431 *
1432 * @port pointer to the port structure.
1433 * @page page number to fetch
1434 * @buffer pointer to buffer
1435 * @buffer_dma dma address corresponding to @buffer
1436 * @sectors page length to fetch, in sectors
1437 *
1438 * return value
1439 * @rv return value from mtip_exec_internal_command()
1440 */
1441static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer,
1442 dma_addr_t buffer_dma, unsigned int sectors)
1443{
1444 struct host_to_dev_fis fis;
1445
1446 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1447 fis.type = 0x27;
1448 fis.opts = 1 << 7;
1449 fis.command = ATA_CMD_READ_LOG_EXT;
1450 fis.sect_count = sectors & 0xFF;
1451 fis.sect_cnt_ex = (sectors >> 8) & 0xFF;
1452 fis.lba_low = page;
1453 fis.lba_mid = 0;
1454 fis.device = ATA_DEVICE_OBS;
1455
1456 memset(buffer, 0, sectors * ATA_SECT_SIZE);
1457
1458 return mtip_exec_internal_command(port,
1459 &fis,
1460 5,
1461 buffer_dma,
1462 sectors * ATA_SECT_SIZE,
1463 0,
9b204fbf 1464 MTIP_INT_CMD_TIMEOUT_MS);
f6587217
AT		 1465}
1466
1467/*
1468 * Issue a SMART READ DATA command to the device.
1469 *
1470 * @port pointer to the port structure.
1471 * @buffer pointer to buffer
1472 * @buffer_dma dma address corresponding to @buffer
1473 *
1474 * return value
1475 * @rv return value from mtip_exec_internal_command()
1476 */
1477static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer,
1478 dma_addr_t buffer_dma)
1479{
1480 struct host_to_dev_fis fis;
1481
1482 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1483 fis.type = 0x27;
1484 fis.opts = 1 << 7;
1485 fis.command = ATA_CMD_SMART;
1486 fis.features = 0xD0;
1487 fis.sect_count = 1;
1488 fis.lba_mid = 0x4F;
1489 fis.lba_hi = 0xC2;
1490 fis.device = ATA_DEVICE_OBS;
1491
1492 return mtip_exec_internal_command(port,
1493 &fis,
1494 5,
1495 buffer_dma,
1496 ATA_SECT_SIZE,
1497 0,
88523a61 1498 15000);
f6587217
AT		 1499}
1500
1501/*
1502 * Get the value of a smart attribute
1503 *
1504 * @port pointer to the port structure
1505 * @id attribute number
1506 * @attrib pointer to return attrib information corresponding to @id
1507 *
1508 * return value
1509 * -EINVAL NULL buffer passed or unsupported attribute @id.
1510 * -EPERM Identify data not valid, SMART not supported or not enabled
1511 */
1512static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id,
1513 struct smart_attr *attrib)
1514{
1515 int rv, i;
1516 struct smart_attr *pattr;
1517
1518 if (!attrib)
1519 return -EINVAL;
1520
1521 if (!port->identify_valid) {
1522 dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n");
1523 return -EPERM;
1524 }
1525 if (!(port->identify[82] & 0x1)) {
1526 dev_warn(&port->dd->pdev->dev, "SMART not supported\n");
1527 return -EPERM;
1528 }
1529 if (!(port->identify[85] & 0x1)) {
1530 dev_warn(&port->dd->pdev->dev, "SMART not enabled\n");
1531 return -EPERM;
1532 }
1533
1534 memset(port->smart_buf, 0, ATA_SECT_SIZE);
1535 rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma);
1536 if (rv) {
1537 dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n");
1538 return rv;
1539 }
1540
1541 pattr = (struct smart_attr *)(port->smart_buf + 2);
1542 for (i = 0; i < 29; i++, pattr++)
1543 if (pattr->attr_id == id) {
1544 memcpy(attrib, pattr, sizeof(struct smart_attr));
1545 break;
1546 }
1547
1548 if (i == 29) {
1549 dev_warn(&port->dd->pdev->dev,
1550 "Query for invalid SMART attribute ID\n");
1551 rv = -EINVAL;
1552 }
88523a61 1553
88523a61
SB		 1554 return rv;
1555}
1556
15283469
AT		 1557/*
1558 * Trim unused sectors
1559 *
1560 * @dd pointer to driver_data structure
1561 * @lba starting lba
1562 * @len # of 512b sectors to trim
1563 *
1564 * return value
1565 * -ENOMEM Out of dma memory
1566 * -EINVAL Invalid parameters passed in, trim not supported
1567 * -EIO Error submitting trim request to hw
1568 */
d0d096b1
AT		 1569static int mtip_send_trim(struct driver_data *dd, unsigned int lba,
1570 unsigned int len)
15283469
AT		 1571{
1572 int i, rv = 0;
1573 u64 tlba, tlen, sect_left;
1574 struct mtip_trim_entry *buf;
1575 dma_addr_t dma_addr;
1576 struct host_to_dev_fis fis;
1577
1578 if (!len || dd->trim_supp == false)
1579 return -EINVAL;
1580
1581 /* Trim request too big */
1582 WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES));
1583
1584 /* Trim request not aligned on 4k boundary */
1585 WARN_ON(len % 8 != 0);
1586
1587 /* Warn if vu_trim structure is too big */
1588 WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE);
1589
1590 /* Allocate a DMA buffer for the trim structure */
1591 buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr,
1592 GFP_KERNEL);
1593 if (!buf)
1594 return -ENOMEM;
1595 memset(buf, 0, ATA_SECT_SIZE);
1596
1597 for (i = 0, sect_left = len, tlba = lba;
1598 i < MTIP_MAX_TRIM_ENTRIES && sect_left;
1599 i++) {
1600 tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ?
1601 MTIP_MAX_TRIM_ENTRY_LEN :
1602 sect_left);
1603 buf[i].lba = __force_bit2int cpu_to_le32(tlba);
1604 buf[i].range = __force_bit2int cpu_to_le16(tlen);
1605 tlba += tlen;
1606 sect_left -= tlen;
1607 }
1608 WARN_ON(sect_left != 0);
1609
1610 /* Build the fis */
1611 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1612 fis.type = 0x27;
1613 fis.opts = 1 << 7;
1614 fis.command = 0xfb;
1615 fis.features = 0x60;
1616 fis.sect_count = 1;
1617 fis.device = ATA_DEVICE_OBS;
1618
1619 if (mtip_exec_internal_command(dd->port,
1620 &fis,
1621 5,
1622 dma_addr,
1623 ATA_SECT_SIZE,
1624 0,
15283469
AT		 1625 MTIP_TRIM_TIMEOUT_MS) < 0)
1626 rv = -EIO;
1627
1628 dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr);
1629 return rv;
1630}
1631
88523a61
SB		 1632/*
1633 * Get the drive capacity.
1634 *
1635 * @dd Pointer to the device data structure.
1636 * @sectors Pointer to the variable that will receive the sector count.
1637 *
1638 * return value
1639 * 1 Capacity was returned successfully.
1640 * 0 The identify information is invalid.
1641 */
6316668f 1642static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors)
88523a61
SB		 1643{
1644 struct mtip_port *port = dd->port;
1645 u64 total, raw0, raw1, raw2, raw3;
1646 raw0 = port->identify[100];
1647 raw1 = port->identify[101];
1648 raw2 = port->identify[102];
1649 raw3 = port->identify[103];
1650 total = raw0 | raw1<<16 | raw2<<32 | raw3<<48;
1651 *sectors = total;
1652 return (bool) !!port->identify_valid;
1653}
1654
88523a61
SB		 1655/*
1656 * Display the identify command data.
1657 *
1658 * @port Pointer to the port data structure.
1659 *
1660 * return value
1661 * None
1662 */
1663static void mtip_dump_identify(struct mtip_port *port)
1664{
1665 sector_t sectors;
1666 unsigned short revid;
1667 char cbuf[42];
1668
1669 if (!port->identify_valid)
1670 return;
1671
1672 strlcpy(cbuf, (char *)(port->identify+10), 21);
1673 dev_info(&port->dd->pdev->dev,
1674 "Serial No.: %s\n", cbuf);
1675
1676 strlcpy(cbuf, (char *)(port->identify+23), 9);
1677 dev_info(&port->dd->pdev->dev,
1678 "Firmware Ver.: %s\n", cbuf);
1679
1680 strlcpy(cbuf, (char *)(port->identify+27), 41);
1681 dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf);
1682
26d58057
SB		 1683 dev_info(&port->dd->pdev->dev, "Security: %04x %s\n",
1684 port->identify[128],
1685 port->identify[128] & 0x4 ? "(LOCKED)" : "");
1686
88523a61
SB		 1687 if (mtip_hw_get_capacity(port->dd, &sectors))
1688 dev_info(&port->dd->pdev->dev,
1689 "Capacity: %llu sectors (%llu MB)\n",
1690 (u64)sectors,
1691 ((u64)sectors) * ATA_SECT_SIZE >> 20);
1692
1693 pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid);
60ec0eec 1694 switch (revid & 0xFF) {
88523a61
SB		 1695 case 0x1:
1696 strlcpy(cbuf, "A0", 3);
1697 break;
1698 case 0x3:
1699 strlcpy(cbuf, "A2", 3);
1700 break;
1701 default:
1702 strlcpy(cbuf, "?", 2);
1703 break;
1704 }
1705 dev_info(&port->dd->pdev->dev,
1706 "Card Type: %s\n", cbuf);
1707}
1708
1709/*
1710 * Map the commands scatter list into the command table.
1711 *
1712 * @command Pointer to the command.
1713 * @nents Number of scatter list entries.
1714 *
1715 * return value
1716 * None
1717 */
1718static inline void fill_command_sg(struct driver_data *dd,
1719 struct mtip_cmd *command,
1720 int nents)
1721{
1722 int n;
1723 unsigned int dma_len;
1724 struct mtip_cmd_sg *command_sg;
1725 struct scatterlist *sg = command->sg;
1726
1727 command_sg = command->command + AHCI_CMD_TBL_HDR_SZ;
1728
1729 for (n = 0; n < nents; n++) {
1730 dma_len = sg_dma_len(sg);
1731 if (dma_len > 0x400000)
1732 dev_err(&dd->pdev->dev,
1733 "DMA segment length truncated\n");
60ec0eec
AT		 1734 command_sg->info = __force_bit2int
1735 cpu_to_le32((dma_len-1) & 0x3FFFFF);
1736 command_sg->dba = __force_bit2int
1737 cpu_to_le32(sg_dma_address(sg));
1738 command_sg->dba_upper = __force_bit2int
1739 cpu_to_le32((sg_dma_address(sg) >> 16) >> 16);
88523a61
SB		 1740 command_sg++;
1741 sg++;
1742 }
1743}
1744
1745/*
1746 * @brief Execute a drive command.
1747 *
1748 * return value 0 The command completed successfully.
1749 * return value -1 An error occurred while executing the command.
1750 */
6316668f 1751static int exec_drive_task(struct mtip_port *port, u8 *command)
88523a61
SB		 1752{
1753 struct host_to_dev_fis fis;
1754 struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG);
9b204fbf 1755 unsigned int to;
88523a61 1756
88523a61
SB		 1757 /* Build the FIS. */
1758 memset(&fis, 0, sizeof(struct host_to_dev_fis));
1759 fis.type = 0x27;
1760 fis.opts = 1 << 7;
1761 fis.command = command[0];
1762 fis.features = command[1];
1763 fis.sect_count = command[2];
1764 fis.sector = command[3];
1765 fis.cyl_low = command[4];
1766 fis.cyl_hi = command[5];
1767 fis.device = command[6] & ~0x10; /* Clear the dev bit*/
1768
9b204fbf
AT		 1769 mtip_set_timeout(port->dd, &fis, &to, 0);
1770
c74b0f58 1771 dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n",
88523a61
SB		 1772 __func__,
1773 command[0],
1774 command[1],
1775 command[2],
1776 command[3],
1777 command[4],
1778 command[5],
1779 command[6]);
1780
1781 /* Execute the command. */
1782 if (mtip_exec_internal_command(port,
1783 &fis,
1784 5,
1785 0,
1786 0,
1787 0,
9b204fbf 1788 to) < 0) {
88523a61
SB		 1789 return -1;
1790 }
1791
1792 command[0] = reply->command; /* Status*/
1793 command[1] = reply->features; /* Error*/
1794 command[4] = reply->cyl_low;
1795 command[5] = reply->cyl_hi;
1796
c74b0f58 1797 dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n",
88523a61
SB		 1798 __func__,
1799 command[0],
1800 command[1],
1801 command[4],
1802 command[5]);
1803
88523a61
SB		 1804 return 0;
1805}
1806
1807/*
1808 * @brief Execute a drive command.
1809 *
1810 * @param port Pointer to the port data structure.
1811 * @param command Pointer to the user specified command parameters.
1812 * @param user_buffer Pointer to the user space buffer where read sector
1813 * data should be copied.
1814 *
1815 * return value 0 The command completed successfully.
1816 * return value -EFAULT An error occurred while copying the completion
1817 * data to the user space buffer.
1818 * return value -1 An error occurred while executing the command.
1819 */
6316668f
JA		 1820static int exec_drive_command(struct mtip_port *port, u8 *command,
1821 void __user *user_buffer)
88523a61
SB		 1822{
1823 struct host_to_dev_fis fis;
e602878f
AT		 1824 struct host_to_dev_fis *reply;
1825 u8 *buf = NULL;
1826 dma_addr_t dma_addr = 0;
1827 int rv = 0, xfer_sz = command[3];
9b204fbf 1828 unsigned int to;
e602878f
AT		 1829
1830 if (xfer_sz) {
97651ea6 1831 if (!user_buffer)
e602878f
AT		 1832 return -EFAULT;
1833
1834 buf = dmam_alloc_coherent(&port->dd->pdev->dev,
1835 ATA_SECT_SIZE * xfer_sz,
1836 &dma_addr,
1837 GFP_KERNEL);
1838 if (!buf) {
1839 dev_err(&port->dd->pdev->dev,
1840 "Memory allocation failed (%d bytes)\n",
1841 ATA_SECT_SIZE * xfer_sz);
1842 return -ENOMEM;
1843 }
1844 memset(buf, 0, ATA_SECT_SIZE * xfer_sz);
1845 }
88523a61 1846
88523a61
SB		 1847 /* Build the FIS. */
1848 memset(&fis, 0, sizeof(struct host_to_dev_fis));
e602878f
AT		 1849 fis.type = 0x27;
1850 fis.opts = 1 << 7;
1851 fis.command = command[0];
88523a61
SB		 1852 fis.features = command[2];
1853 fis.sect_count = command[3];
1854 if (fis.command == ATA_CMD_SMART) {
1855 fis.sector = command[1];
60ec0eec
AT		 1856 fis.cyl_low = 0x4F;
1857 fis.cyl_hi = 0xC2;
88523a61
SB		 1858 }
1859
9b204fbf
AT		 1860 mtip_set_timeout(port->dd, &fis, &to, 0);
1861
e602878f
AT		 1862 if (xfer_sz)
1863 reply = (port->rxfis + RX_FIS_PIO_SETUP);
1864 else
1865 reply = (port->rxfis + RX_FIS_D2H_REG);
1866
88523a61 1867 dbg_printk(MTIP_DRV_NAME
c74b0f58 1868 " %s: User Command: cmd %x, sect %x, "
88523a61
SB		 1869 "feat %x, sectcnt %x\n",
1870 __func__,
1871 command[0],
1872 command[1],
1873 command[2],
1874 command[3]);
1875
88523a61
SB		 1876 /* Execute the command. */
1877 if (mtip_exec_internal_command(port,
1878 &fis,
1879 5,
e602878f
AT		 1880 (xfer_sz ? dma_addr : 0),
1881 (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0),
88523a61 1882 0,
9b204fbf 1883 to)
88523a61 1884 < 0) {
e602878f
AT		 1885 rv = -EFAULT;
1886 goto exit_drive_command;
88523a61
SB		 1887 }
1888
1889 /* Collect the completion status. */
1890 command[0] = reply->command; /* Status*/
1891 command[1] = reply->features; /* Error*/
e602878f 1892 command[2] = reply->sect_count;
88523a61
SB		 1893
1894 dbg_printk(MTIP_DRV_NAME
c74b0f58 1895 " %s: Completion Status: stat %x, "
e602878f 1896 "err %x, nsect %x\n",
88523a61
SB		 1897 __func__,
1898 command[0],
1899 command[1],
1900 command[2]);
1901
e602878f 1902 if (xfer_sz) {
88523a61 1903 if (copy_to_user(user_buffer,
e602878f 1904 buf,
88523a61 1905 ATA_SECT_SIZE * command[3])) {
e602878f
AT		 1906 rv = -EFAULT;
1907 goto exit_drive_command;
88523a61
SB		 1908 }
1909 }
e602878f
AT		 1910exit_drive_command:
1911 if (buf)
1912 dmam_free_coherent(&port->dd->pdev->dev,
1913 ATA_SECT_SIZE * xfer_sz, buf, dma_addr);
1914 return rv;
88523a61
SB		 1915}
1916
1917/*
1918 * Indicates whether a command has a single sector payload.
1919 *
1920 * @command passed to the device to perform the certain event.
1921 * @features passed to the device to perform the certain event.
1922 *
1923 * return value
1924 * 1 command is one that always has a single sector payload,
1925 * regardless of the value in the Sector Count field.
1926 * 0 otherwise
1927 *
1928 */
1929static unsigned int implicit_sector(unsigned char command,
1930 unsigned char features)
1931{
1932 unsigned int rv = 0;
1933
1934 /* list of commands that have an implicit sector count of 1 */
1935 switch (command) {
60ec0eec
AT		 1936 case ATA_CMD_SEC_SET_PASS:
1937 case ATA_CMD_SEC_UNLOCK:
1938 case ATA_CMD_SEC_ERASE_PREP:
1939 case ATA_CMD_SEC_ERASE_UNIT:
1940 case ATA_CMD_SEC_FREEZE_LOCK:
1941 case ATA_CMD_SEC_DISABLE_PASS:
1942 case ATA_CMD_PMP_READ:
1943 case ATA_CMD_PMP_WRITE:
88523a61
SB		 1944 rv = 1;
1945 break;
60ec0eec
AT		 1946 case ATA_CMD_SET_MAX:
1947 if (features == ATA_SET_MAX_UNLOCK)
88523a61
SB		 1948 rv = 1;
1949 break;
60ec0eec
AT		 1950 case ATA_CMD_SMART:
1951 if ((features == ATA_SMART_READ_VALUES) ||
1952 (features == ATA_SMART_READ_THRESHOLDS))
88523a61
SB		 1953 rv = 1;
1954 break;
60ec0eec
AT		 1955 case ATA_CMD_CONF_OVERLAY:
1956 if ((features == ATA_DCO_IDENTIFY) ||
1957 (features == ATA_DCO_SET))
88523a61
SB		 1958 rv = 1;
1959 break;
1960 }
1961 return rv;
1962}
2df7aa96 1963
88523a61
SB		 1964/*
1965 * Executes a taskfile
1966 * See ide_taskfile_ioctl() for derivation
1967 */
1968static int exec_drive_taskfile(struct driver_data *dd,
ef0f1587
JA		 1969 void __user *buf,
1970 ide_task_request_t *req_task,
1971 int outtotal)
88523a61
SB		 1972{
1973 struct host_to_dev_fis fis;
1974 struct host_to_dev_fis *reply;
88523a61
SB		 1975 u8 *outbuf = NULL;
1976 u8 *inbuf = NULL;
16d02c04
JA		 1977 dma_addr_t outbuf_dma = 0;
1978 dma_addr_t inbuf_dma = 0;
1979 dma_addr_t dma_buffer = 0;
88523a61 1980 int err = 0;
88523a61
SB		 1981 unsigned int taskin = 0;
1982 unsigned int taskout = 0;
1983 u8 nsect = 0;
2df7aa96 1984 unsigned int timeout;
88523a61
SB		 1985 unsigned int force_single_sector;
1986 unsigned int transfer_size;
1987 unsigned long task_file_data;
ef0f1587 1988 int intotal = outtotal + req_task->out_size;
4453bc88 1989 int erasemode = 0;
88523a61
SB		 1990
1991 taskout = req_task->out_size;
1992 taskin = req_task->in_size;
1993 /* 130560 = 512 * 0xFF*/
b425b020
SS		 1994 if (taskin > 130560 || taskout > 130560)
1995 return -EINVAL;
88523a61
SB		 1996
1997 if (taskout) {
8ed6010d 1998 outbuf = memdup_user(buf + outtotal, taskout);
b425b020
SS		 1999 if (IS_ERR(outbuf))
2000 return PTR_ERR(outbuf);
2001
88523a61
SB		 2002 outbuf_dma = pci_map_single(dd->pdev,
2003 outbuf,
2004 taskout,
2005 DMA_TO_DEVICE);
5173cb81 2006 if (pci_dma_mapping_error(dd->pdev, outbuf_dma)) {
88523a61
SB		 2007 err = -ENOMEM;
2008 goto abort;
2009 }
2010 dma_buffer = outbuf_dma;
2011 }
2012
2013 if (taskin) {
8ed6010d
AV		 2014 inbuf = memdup_user(buf + intotal, taskin);
2015 if (IS_ERR(inbuf)) {
2016 err = PTR_ERR(inbuf);
2017 inbuf = NULL;
88523a61
SB		 2018 goto abort;
2019 }
2020 inbuf_dma = pci_map_single(dd->pdev,
2021 inbuf,
2022 taskin, DMA_FROM_DEVICE);
5173cb81 2023 if (pci_dma_mapping_error(dd->pdev, inbuf_dma)) {
88523a61
SB		 2024 err = -ENOMEM;
2025 goto abort;
2026 }
2027 dma_buffer = inbuf_dma;
2028 }
2029
2030 /* only supports PIO and non-data commands from this ioctl. */
2031 switch (req_task->data_phase) {
2032 case TASKFILE_OUT:
2033 nsect = taskout / ATA_SECT_SIZE;
2034 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2035 break;
2036 case TASKFILE_IN:
2037 reply = (dd->port->rxfis + RX_FIS_PIO_SETUP);
2038 break;
2039 case TASKFILE_NO_DATA:
2040 reply = (dd->port->rxfis + RX_FIS_D2H_REG);
2041 break;
2042 default:
2043 err = -EINVAL;
2044 goto abort;
2045 }
2046
88523a61
SB		 2047 /* Build the FIS. */
2048 memset(&fis, 0, sizeof(struct host_to_dev_fis));
2049
2050 fis.type = 0x27;
2051 fis.opts = 1 << 7;
2052 fis.command = req_task->io_ports[7];
2053 fis.features = req_task->io_ports[1];
2054 fis.sect_count = req_task->io_ports[2];
2055 fis.lba_low = req_task->io_ports[3];
2056 fis.lba_mid = req_task->io_ports[4];
2057 fis.lba_hi = req_task->io_ports[5];
2058 /* Clear the dev bit*/
2059 fis.device = req_task->io_ports[6] & ~0x10;
2060
2061 if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) {
2062 req_task->in_flags.all =
2063 IDE_TASKFILE_STD_IN_FLAGS |
2064 (IDE_HOB_STD_IN_FLAGS << 8);
2065 fis.lba_low_ex = req_task->hob_ports[3];
2066 fis.lba_mid_ex = req_task->hob_ports[4];
2067 fis.lba_hi_ex = req_task->hob_ports[5];
2068 fis.features_ex = req_task->hob_ports[1];
2069 fis.sect_cnt_ex = req_task->hob_ports[2];
2070
2071 } else {
2072 req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS;
2073 }
2074
2075 force_single_sector = implicit_sector(fis.command, fis.features);
2076
2077 if ((taskin || taskout) && (!fis.sect_count)) {
2078 if (nsect)
2079 fis.sect_count = nsect;
2080 else {
2081 if (!force_single_sector) {
2082 dev_warn(&dd->pdev->dev,
2083 "data movement but "
2084 "sect_count is 0\n");
88523a61
SB		 2085 err = -EINVAL;
2086 goto abort;
2087 }
2088 }
2089 }
2090
2091 dbg_printk(MTIP_DRV_NAME
c74b0f58 2092 " %s: cmd %x, feat %x, nsect %x,"
88523a61
SB		 2093 " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x,"
2094 " head/dev %x\n",
c74b0f58 2095 __func__,
88523a61
SB		 2096 fis.command,
2097 fis.features,
2098 fis.sect_count,
2099 fis.lba_low,
2100 fis.lba_mid,
2101 fis.lba_hi,
2102 fis.device);
2103
4453bc88 2104 /* check for erase mode support during secure erase.*/
3208795e
SM		 2105 if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf &&
2106 (outbuf[0] & MTIP_SEC_ERASE_MODE)) {
4453bc88
SM		 2107 erasemode = 1;
2108 }
2109
2110 mtip_set_timeout(dd, &fis, &timeout, erasemode);
88523a61
SB		 2111
2112 /* Determine the correct transfer size.*/
2113 if (force_single_sector)
2114 transfer_size = ATA_SECT_SIZE;
2115 else
2116 transfer_size = ATA_SECT_SIZE * fis.sect_count;
2117
2118 /* Execute the command.*/
2119 if (mtip_exec_internal_command(dd->port,
2120 &fis,
2121 5,
2122 dma_buffer,
2123 transfer_size,
2124 0,
88523a61 2125 timeout) < 0) {
88523a61
SB		 2126 err = -EIO;
2127 goto abort;
2128 }
2129
2130 task_file_data = readl(dd->port->mmio+PORT_TFDATA);
2131
2132 if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) {
2133 reply = dd->port->rxfis + RX_FIS_PIO_SETUP;
2134 req_task->io_ports[7] = reply->control;
2135 } else {
2136 reply = dd->port->rxfis + RX_FIS_D2H_REG;
2137 req_task->io_ports[7] = reply->command;
2138 }
2139
2140 /* reclaim the DMA buffers.*/
2141 if (inbuf_dma)
2142 pci_unmap_single(dd->pdev, inbuf_dma,
2143 taskin, DMA_FROM_DEVICE);
2144 if (outbuf_dma)
2145 pci_unmap_single(dd->pdev, outbuf_dma,
2146 taskout, DMA_TO_DEVICE);
16d02c04
JA		 2147 inbuf_dma = 0;
2148 outbuf_dma = 0;
88523a61
SB		 2149
2150 /* return the ATA registers to the caller.*/
2151 req_task->io_ports[1] = reply->features;
2152 req_task->io_ports[2] = reply->sect_count;
2153 req_task->io_ports[3] = reply->lba_low;
2154 req_task->io_ports[4] = reply->lba_mid;
2155 req_task->io_ports[5] = reply->lba_hi;
2156 req_task->io_ports[6] = reply->device;
2157
2158 if (req_task->out_flags.all & 1) {
2159
2160 req_task->hob_ports[3] = reply->lba_low_ex;
2161 req_task->hob_ports[4] = reply->lba_mid_ex;
2162 req_task->hob_ports[5] = reply->lba_hi_ex;
2163 req_task->hob_ports[1] = reply->features_ex;
2164 req_task->hob_ports[2] = reply->sect_cnt_ex;
2165 }
88523a61 2166 dbg_printk(MTIP_DRV_NAME
c74b0f58 2167 " %s: Completion: stat %x,"
88523a61
SB		 2168 "err %x, sect_cnt %x, lbalo %x,"
2169 "lbamid %x, lbahi %x, dev %x\n",
2170 __func__,
2171 req_task->io_ports[7],
2172 req_task->io_ports[1],
2173 req_task->io_ports[2],
2174 req_task->io_ports[3],
2175 req_task->io_ports[4],
2176 req_task->io_ports[5],
2177 req_task->io_ports[6]);
2178
88523a61
SB		 2179 if (taskout) {
2180 if (copy_to_user(buf + outtotal, outbuf, taskout)) {
2181 err = -EFAULT;
2182 goto abort;
2183 }
2184 }
2185 if (taskin) {
2186 if (copy_to_user(buf + intotal, inbuf, taskin)) {
2187 err = -EFAULT;
2188 goto abort;
2189 }
2190 }
2191abort:
2192 if (inbuf_dma)
2193 pci_unmap_single(dd->pdev, inbuf_dma,
2194 taskin, DMA_FROM_DEVICE);
2195 if (outbuf_dma)
2196 pci_unmap_single(dd->pdev, outbuf_dma,
2197 taskout, DMA_TO_DEVICE);
88523a61
SB		 2198 kfree(outbuf);
2199 kfree(inbuf);
2200
2201 return err;
2202}
2203
2204/*
2205 * Handle IOCTL calls from the Block Layer.
2206 *
2207 * This function is called by the Block Layer when it receives an IOCTL
2208 * command that it does not understand. If the IOCTL command is not supported
2209 * this function returns -ENOTTY.
2210 *
2211 * @dd Pointer to the driver data structure.
2212 * @cmd IOCTL command passed from the Block Layer.
2213 * @arg IOCTL argument passed from the Block Layer.
2214 *
2215 * return value
2216 * 0 The IOCTL completed successfully.
2217 * -ENOTTY The specified command is not supported.
2218 * -EFAULT An error occurred copying data to a user space buffer.
2219 * -EIO An error occurred while executing the command.
2220 */
ef0f1587
JA		 2221static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd,
2222 unsigned long arg)
88523a61
SB		 2223{
2224 switch (cmd) {
2225 case HDIO_GET_IDENTITY:
971890f2
AT		 2226 {
2227 if (copy_to_user((void __user *)arg, dd->port->identify,
2228 sizeof(u16) * ATA_ID_WORDS))
2229 return -EFAULT;
88523a61 2230 break;
971890f2 2231 }
88523a61
SB		 2232 case HDIO_DRIVE_CMD:
2233 {
2234 u8 drive_command[4];
2235
2236 /* Copy the user command info to our buffer. */
2237 if (copy_from_user(drive_command,
2238 (void __user *) arg,
2239 sizeof(drive_command)))
2240 return -EFAULT;
2241
2242 /* Execute the drive command. */
2243 if (exec_drive_command(dd->port,
2244 drive_command,
2245 (void __user *) (arg+4)))
2246 return -EIO;
2247
2248 /* Copy the status back to the users buffer. */
2249 if (copy_to_user((void __user *) arg,
2250 drive_command,
2251 sizeof(drive_command)))
2252 return -EFAULT;
2253
2254 break;
2255 }
2256 case HDIO_DRIVE_TASK:
2257 {
2258 u8 drive_command[7];
2259
2260 /* Copy the user command info to our buffer. */
2261 if (copy_from_user(drive_command,
2262 (void __user *) arg,
2263 sizeof(drive_command)))
2264 return -EFAULT;
2265
2266 /* Execute the drive command. */
2267 if (exec_drive_task(dd->port, drive_command))
2268 return -EIO;
2269
2270 /* Copy the status back to the users buffer. */
2271 if (copy_to_user((void __user *) arg,
2272 drive_command,
2273 sizeof(drive_command)))
2274 return -EFAULT;
2275
2276 break;
2277 }
ef0f1587
JA		 2278 case HDIO_DRIVE_TASKFILE: {
2279 ide_task_request_t req_task;
2280 int ret, outtotal;
2281
2282 if (copy_from_user(&req_task, (void __user *) arg,
2283 sizeof(req_task)))
2284 return -EFAULT;
2285
2286 outtotal = sizeof(req_task);
2287
2288 ret = exec_drive_taskfile(dd, (void __user *) arg,
2289 &req_task, outtotal);
2290
60ec0eec
AT		 2291 if (copy_to_user((void __user *) arg, &req_task,
2292 sizeof(req_task)))
ef0f1587
JA		 2293 return -EFAULT;
2294
2295 return ret;
2296 }
88523a61
SB		 2297
2298 default:
2299 return -EINVAL;
2300 }
2301 return 0;
2302}
2303
2304/*
2305 * Submit an IO to the hw
2306 *
2307 * This function is called by the block layer to issue an io
2308 * to the device. Upon completion, the callback function will
2309 * be called with the data parameter passed as the callback data.
2310 *
2311 * @dd Pointer to the driver data structure.
2312 * @start First sector to read.
2313 * @nsect Number of sectors to read.
2314 * @nents Number of entries in scatter list for the read command.
2315 * @tag The tag of this read command.
2316 * @callback Pointer to the function that should be called
2317 * when the read completes.
2318 * @data Callback data passed to the callback function
2319 * when the read completes.
88523a61
SB		 2320 * @dir Direction (read or write)
2321 *
2322 * return value
2323 * None
2324 */
ffc771b3
JA		 2325static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq,
2326 struct mtip_cmd *command, int nents,
2327 struct blk_mq_hw_ctx *hctx)
88523a61
SB		 2328{
2329 struct host_to_dev_fis *fis;
2330 struct mtip_port *port = dd->port;
ffc771b3
JA		 2331 int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE;
2332 u64 start = blk_rq_pos(rq);
2333 unsigned int nsect = blk_rq_sectors(rq);
88523a61
SB		 2334
2335 /* Map the scatter list for DMA access */
45038367 2336 nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir);
88523a61 2337
f45c40a9
SB		 2338 prefetch(&port->flags);
2339
88523a61
SB		 2340 command->scatter_ents = nents;
2341
2342 /*
2343 * The number of retries for this command before it is
2344 * reported as a failure to the upper layers.
2345 */
2346 command->retries = MTIP_MAX_RETRIES;
2347
2348 /* Fill out fis */
2349 fis = command->command;
2350 fis->type = 0x27;
2351 fis->opts = 1 << 7;
f45c40a9 2352 if (dma_dir == DMA_FROM_DEVICE)
ffc771b3
JA		 2353 fis->command = ATA_CMD_FPDMA_READ;
2354 else
2355 fis->command = ATA_CMD_FPDMA_WRITE;
eda45314
SM		 2356 fis->lba_low = start & 0xFF;
2357 fis->lba_mid = (start >> 8) & 0xFF;
2358 fis->lba_hi = (start >> 16) & 0xFF;
2359 fis->lba_low_ex = (start >> 24) & 0xFF;
2360 fis->lba_mid_ex = (start >> 32) & 0xFF;
2361 fis->lba_hi_ex = (start >> 40) & 0xFF;
88523a61 2362 fis->device = 1 << 6;
60ec0eec
AT		 2363 fis->features = nsect & 0xFF;
2364 fis->features_ex = (nsect >> 8) & 0xFF;
ffc771b3 2365 fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5));
88523a61
SB		 2366 fis->sect_cnt_ex = 0;
2367 fis->control = 0;
2368 fis->res2 = 0;
2369 fis->res3 = 0;
2370 fill_command_sg(dd, command, nents);
2371
f45c40a9 2372 if (unlikely(command->unaligned))
2077d947
AT		 2373 fis->device |= 1 << 7;
2374
88523a61 2375 /* Populate the command header */
60ec0eec
AT		 2376 command->command_header->opts =
2377 __force_bit2int cpu_to_le32(
2378 (nents << 16) | 5 | AHCI_CMD_PREFETCH);
88523a61
SB		 2379 command->command_header->byte_count = 0;
2380
2381 /*
2382 * Set the completion function and data for the command
2383 * within this layer.
2384 */
2385 command->comp_data = dd;
2386 command->comp_func = mtip_async_complete;
45038367 2387 command->direction = dma_dir;
88523a61 2388
88523a61 2389 /*
60ec0eec
AT		 2390 * To prevent this command from being issued
2391 * if an internal command is in progress or error handling is active.
88523a61 2392 */
f45c40a9 2393 if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) {
ffc771b3 2394 set_bit(rq->tag, port->cmds_to_issue);
8a857a88 2395 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
60ec0eec
AT		 2396 return;
2397 }
88523a61
SB		 2398
2399 /* Issue the command to the hardware */
ffc771b3 2400 mtip_issue_ncq_command(port, rq->tag);
88523a61
SB		 2401}
2402
2403/*
7412ff13 2404 * Sysfs status dump.
88523a61
SB		 2405 *
2406 * @dev Pointer to the device structure, passed by the kernrel.
2407 * @attr Pointer to the device_attribute structure passed by the kernel.
2408 * @buf Pointer to the char buffer that will receive the stats info.
2409 *
2410 * return value
2411 * The size, in bytes, of the data copied into buf.
2412 */
f6587217
AT		 2413static ssize_t mtip_hw_show_status(struct device *dev,
2414 struct device_attribute *attr,
2415 char *buf)
2416{
2417 struct driver_data *dd = dev_to_disk(dev)->private_data;
2418 int size = 0;
2419
8a857a88 2420 if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))
f6587217 2421 size += sprintf(buf, "%s", "thermal_shutdown\n");
8a857a88 2422 else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag))
f6587217
AT		 2423 size += sprintf(buf, "%s", "write_protect\n");
2424 else
2425 size += sprintf(buf, "%s", "online\n");
2426
2427 return size;
2428}
2429
f6587217 2430static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL);
88523a61 2431
0caff003
AT		 2432/* debugsfs entries */
2433
2434static ssize_t show_device_status(struct device_driver *drv, char *buf)
2435{
2436 int size = 0;
2437 struct driver_data *dd, *tmp;
2438 unsigned long flags;
2439 char id_buf[42];
2440 u16 status = 0;
2441
2442 spin_lock_irqsave(&dev_lock, flags);
2443 size += sprintf(&buf[size], "Devices Present:\n");
2444 list_for_each_entry_safe(dd, tmp, &online_list, online_list) {
c66bb3f0 2445 if (dd->pdev) {
0caff003
AT		 2446 if (dd->port &&
2447 dd->port->identify &&
2448 dd->port->identify_valid) {
2449 strlcpy(id_buf,
2450 (char *) (dd->port->identify + 10), 21);
2451 status = *(dd->port->identify + 141);
2452 } else {
2453 memset(id_buf, 0, 42);
2454 status = 0;
2455 }
2456
2457 if (dd->port &&
2458 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2459 size += sprintf(&buf[size],
2460 " device %s %s (ftl rebuild %d %%)\n",
2461 dev_name(&dd->pdev->dev),
2462 id_buf,
2463 status);
2464 } else {
2465 size += sprintf(&buf[size],
2466 " device %s %s\n",
2467 dev_name(&dd->pdev->dev),
2468 id_buf);
2469 }
2470 }
2471 }
2472
2473 size += sprintf(&buf[size], "Devices Being Removed:\n");
2474 list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) {
c66bb3f0 2475 if (dd->pdev) {
0caff003
AT		 2476 if (dd->port &&
2477 dd->port->identify &&
2478 dd->port->identify_valid) {
2479 strlcpy(id_buf,
2480 (char *) (dd->port->identify+10), 21);
2481 status = *(dd->port->identify + 141);
2482 } else {
2483 memset(id_buf, 0, 42);
2484 status = 0;
2485 }
2486
2487 if (dd->port &&
2488 test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) {
2489 size += sprintf(&buf[size],
2490 " device %s %s (ftl rebuild %d %%)\n",
2491 dev_name(&dd->pdev->dev),
2492 id_buf,
2493 status);
2494 } else {
2495 size += sprintf(&buf[size],
2496 " device %s %s\n",
2497 dev_name(&dd->pdev->dev),
2498 id_buf);
2499 }
2500 }
2501 }
2502 spin_unlock_irqrestore(&dev_lock, flags);
2503
2504 return size;
2505}
2506
2507static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf,
2508 size_t len, loff_t *offset)
2509{
c8afd0dc 2510 struct driver_data *dd = (struct driver_data *)f->private_data;
0caff003 2511 int size = *offset;
c8afd0dc
DM		 2512 char *buf;
2513 int rv = 0;
0caff003
AT		 2514
2515 if (!len || *offset)
2516 return 0;
2517
c8afd0dc
DM		 2518 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2519 if (!buf) {
2520 dev_err(&dd->pdev->dev,
2521 "Memory allocation: status buffer\n");
2522 return -ENOMEM;
2523 }
2524
0caff003
AT		 2525 size += show_device_status(NULL, buf);
2526
2527 *offset = size <= len ? size : len;
2528 size = copy_to_user(ubuf, buf, *offset);
2529 if (size)
c8afd0dc 2530 rv = -EFAULT;
0caff003 2531
c8afd0dc
DM		 2532 kfree(buf);
2533 return rv ? rv : *offset;
0caff003
AT		 2534}
2535
7b421d24
AT		 2536static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf,
2537 size_t len, loff_t *offset)
2538{
2539 struct driver_data *dd = (struct driver_data *)f->private_data;
c8afd0dc 2540 char *buf;
7b421d24
AT		 2541 u32 group_allocated;
2542 int size = *offset;
c8afd0dc 2543 int n, rv = 0;
7b421d24
AT		 2544
2545 if (!len || size)
2546 return 0;
2547
c8afd0dc
DM		 2548 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2549 if (!buf) {
2550 dev_err(&dd->pdev->dev,
2551 "Memory allocation: register buffer\n");
2552 return -ENOMEM;
2553 }
2554
7b421d24
AT		 2555 size += sprintf(&buf[size], "H/ S ACTive : [ 0x");
2556
2557 for (n = dd->slot_groups-1; n >= 0; n--)
2558 size += sprintf(&buf[size], "%08X ",
2559 readl(dd->port->s_active[n]));
2560
2561 size += sprintf(&buf[size], "]\n");
2562 size += sprintf(&buf[size], "H/ Command Issue : [ 0x");
2563
2564 for (n = dd->slot_groups-1; n >= 0; n--)
2565 size += sprintf(&buf[size], "%08X ",
2566 readl(dd->port->cmd_issue[n]));
2567
2568 size += sprintf(&buf[size], "]\n");
2569 size += sprintf(&buf[size], "H/ Completed : [ 0x");
2570
2571 for (n = dd->slot_groups-1; n >= 0; n--)
2572 size += sprintf(&buf[size], "%08X ",
2573 readl(dd->port->completed[n]));
2574
2575 size += sprintf(&buf[size], "]\n");
2576 size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n",
2577 readl(dd->port->mmio + PORT_IRQ_STAT));
2578 size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n",
2579 readl(dd->mmio + HOST_IRQ_STAT));
2580 size += sprintf(&buf[size], "\n");
2581
7b421d24
AT		 2582 size += sprintf(&buf[size], "L/ Commands in Q : [ 0x");
2583
2584 for (n = dd->slot_groups-1; n >= 0; n--) {
2585 if (sizeof(long) > sizeof(u32))
2586 group_allocated =
2587 dd->port->cmds_to_issue[n/2] >> (32*(n&1));
2588 else
2589 group_allocated = dd->port->cmds_to_issue[n];
2590 size += sprintf(&buf[size], "%08X ", group_allocated);
2591 }
2592 size += sprintf(&buf[size], "]\n");
2593
2594 *offset = size <= len ? size : len;
2595 size = copy_to_user(ubuf, buf, *offset);
2596 if (size)
c8afd0dc 2597 rv = -EFAULT;
7b421d24 2598
c8afd0dc
DM		 2599 kfree(buf);
2600 return rv ? rv : *offset;
7b421d24
AT		 2601}
2602
2603static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf,
2604 size_t len, loff_t *offset)
2605{
2606 struct driver_data *dd = (struct driver_data *)f->private_data;
c8afd0dc 2607 char *buf;
7b421d24 2608 int size = *offset;
c8afd0dc 2609 int rv = 0;
7b421d24
AT		 2610
2611 if (!len || size)
2612 return 0;
2613
c8afd0dc
DM		 2614 buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL);
2615 if (!buf) {
2616 dev_err(&dd->pdev->dev,
2617 "Memory allocation: flag buffer\n");
2618 return -ENOMEM;
2619 }
2620
7b421d24
AT		 2621 size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n",
2622 dd->port->flags);
2623 size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n",
2624 dd->dd_flag);
2625
2626 *offset = size <= len ? size : len;
2627 size = copy_to_user(ubuf, buf, *offset);
2628 if (size)
c8afd0dc 2629 rv = -EFAULT;
7b421d24 2630
c8afd0dc
DM		 2631 kfree(buf);
2632 return rv ? rv : *offset;
7b421d24
AT		 2633}
2634
0caff003
AT		 2635static const struct file_operations mtip_device_status_fops = {
2636 .owner = THIS_MODULE,
2637 .open = simple_open,
2638 .read = mtip_hw_read_device_status,
2639 .llseek = no_llseek,
2640};
2641
7b421d24
AT		 2642static const struct file_operations mtip_regs_fops = {
2643 .owner = THIS_MODULE,
2644 .open = simple_open,
2645 .read = mtip_hw_read_registers,
2646 .llseek = no_llseek,
2647};
2648
2649static const struct file_operations mtip_flags_fops = {
2650 .owner = THIS_MODULE,
2651 .open = simple_open,
2652 .read = mtip_hw_read_flags,
2653 .llseek = no_llseek,
2654};
2655
88523a61
SB		 2656/*
2657 * Create the sysfs related attributes.
2658 *
2659 * @dd Pointer to the driver data structure.
2660 * @kobj Pointer to the kobj for the block device.
2661 *
2662 * return value
2663 * 0 Operation completed successfully.
2664 * -EINVAL Invalid parameter.
2665 */
6316668f 2666static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj)
88523a61
SB		 2667{
2668 if (!kobj || !dd)
2669 return -EINVAL;
2670
f6587217
AT		 2671 if (sysfs_create_file(kobj, &dev_attr_status.attr))
2672 dev_warn(&dd->pdev->dev,
2673 "Error creating 'status' sysfs entry\n");
88523a61
SB		 2674 return 0;
2675}
2676
2677/*
2678 * Remove the sysfs related attributes.
2679 *
2680 * @dd Pointer to the driver data structure.
2681 * @kobj Pointer to the kobj for the block device.
2682 *
2683 * return value
2684 * 0 Operation completed successfully.
2685 * -EINVAL Invalid parameter.
2686 */
6316668f 2687static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj)
88523a61
SB		 2688{
2689 if (!kobj || !dd)
2690 return -EINVAL;
2691
f6587217 2692 sysfs_remove_file(kobj, &dev_attr_status.attr);
88523a61
SB		 2693
2694 return 0;
2695}
2696
7b421d24
AT		 2697static int mtip_hw_debugfs_init(struct driver_data *dd)
2698{
2699 if (!dfs_parent)
2700 return -1;
2701
2702 dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent);
2703 if (IS_ERR_OR_NULL(dd->dfs_node)) {
2704 dev_warn(&dd->pdev->dev,
2705 "Error creating node %s under debugfs\n",
2706 dd->disk->disk_name);
2707 dd->dfs_node = NULL;
2708 return -1;
2709 }
2710
2711 debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd,
2712 &mtip_flags_fops);
2713 debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd,
2714 &mtip_regs_fops);
2715
2716 return 0;
2717}
2718
2719static void mtip_hw_debugfs_exit(struct driver_data *dd)
2720{
974a51a2
SB		 2721 if (dd->dfs_node)
2722 debugfs_remove_recursive(dd->dfs_node);
7b421d24
AT		 2723}
2724
88523a61
SB		 2725/*
2726 * Perform any init/resume time hardware setup
2727 *
2728 * @dd Pointer to the driver data structure.
2729 *
2730 * return value
2731 * None
2732 */
2733static inline void hba_setup(struct driver_data *dd)
2734{
2735 u32 hwdata;
2736 hwdata = readl(dd->mmio + HOST_HSORG);
2737
2738 /* interrupt bug workaround: use only 1 IS bit.*/
2739 writel(hwdata |
2740 HSORG_DISABLE_SLOTGRP_INTR |
2741 HSORG_DISABLE_SLOTGRP_PXIS,
2742 dd->mmio + HOST_HSORG);
2743}
2744
2077d947
AT		 2745static int mtip_device_unaligned_constrained(struct driver_data *dd)
2746{
2747 return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0);
2748}
2749
88523a61
SB		 2750/*
2751 * Detect the details of the product, and store anything needed
2752 * into the driver data structure. This includes product type and
2753 * version and number of slot groups.
2754 *
2755 * @dd Pointer to the driver data structure.
2756 *
2757 * return value
2758 * None
2759 */
2760static void mtip_detect_product(struct driver_data *dd)
2761{
2762 u32 hwdata;
2763 unsigned int rev, slotgroups;
2764
2765 /*
2766 * HBA base + 0xFC [15:0] - vendor-specific hardware interface
2767 * info register:
2768 * [15:8] hardware/software interface rev#
2769 * [ 3] asic-style interface
2770 * [ 2:0] number of slot groups, minus 1 (only valid for asic-style).
2771 */
2772 hwdata = readl(dd->mmio + HOST_HSORG);
2773
2774 dd->product_type = MTIP_PRODUCT_UNKNOWN;
2775 dd->slot_groups = 1;
2776
2777 if (hwdata & 0x8) {
2778 dd->product_type = MTIP_PRODUCT_ASICFPGA;
2779 rev = (hwdata & HSORG_HWREV) >> 8;
2780 slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1;
2781 dev_info(&dd->pdev->dev,
2782 "ASIC-FPGA design, HS rev 0x%x, "
2783 "%i slot groups [%i slots]\n",
2784 rev,
2785 slotgroups,
2786 slotgroups * 32);
2787
2788 if (slotgroups > MTIP_MAX_SLOT_GROUPS) {
2789 dev_warn(&dd->pdev->dev,
2790 "Warning: driver only supports "
2791 "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS);
2792 slotgroups = MTIP_MAX_SLOT_GROUPS;
2793 }
2794 dd->slot_groups = slotgroups;
2795 return;
2796 }
2797
2798 dev_warn(&dd->pdev->dev, "Unrecognized product id\n");
2799}
2800
2801/*
2802 * Blocking wait for FTL rebuild to complete
2803 *
2804 * @dd Pointer to the DRIVER_DATA structure.
2805 *
2806 * return value
2807 * 0 FTL rebuild completed successfully
2808 * -EFAULT FTL rebuild error/timeout/interruption
2809 */
2810static int mtip_ftl_rebuild_poll(struct driver_data *dd)
2811{
2812 unsigned long timeout, cnt = 0, start;
2813
2814 dev_warn(&dd->pdev->dev,
2815 "FTL rebuild in progress. Polling for completion.\n");
2816
2817 start = jiffies;
88523a61
SB		 2818 timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS);
2819
2820 do {
8a857a88 2821 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367
AT		 2822 &dd->dd_flag)))
2823 return -EFAULT;
88523a61
SB		 2824 if (mtip_check_surprise_removal(dd->pdev))
2825 return -EFAULT;
60ec0eec 2826
88523a61
SB		 2827 if (mtip_get_identify(dd->port, NULL) < 0)
2828 return -EFAULT;
2829
2830 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
2831 MTIP_FTL_REBUILD_MAGIC) {
2832 ssleep(1);
2833 /* Print message every 3 minutes */
2834 if (cnt++ >= 180) {
2835 dev_warn(&dd->pdev->dev,
2836 "FTL rebuild in progress (%d secs).\n",
2837 jiffies_to_msecs(jiffies - start) / 1000);
2838 cnt = 0;
2839 }
2840 } else {
2841 dev_warn(&dd->pdev->dev,
2842 "FTL rebuild complete (%d secs).\n",
2843 jiffies_to_msecs(jiffies - start) / 1000);
62ee8c13 2844 mtip_block_initialize(dd);
45038367 2845 return 0;
88523a61 2846 }
88523a61
SB		 2847 } while (time_before(jiffies, timeout));
2848
2849 /* Check for timeout */
45038367 2850 dev_err(&dd->pdev->dev,
88523a61
SB		 2851 "Timed out waiting for FTL rebuild to complete (%d secs).\n",
2852 jiffies_to_msecs(jiffies - start) / 1000);
45038367 2853 return -EFAULT;
88523a61
SB		 2854}
2855
abb0ccd1
ATS		 2856static void mtip_softirq_done_fn(struct request *rq)
2857{
2858 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
2859 struct driver_data *dd = rq->q->queuedata;
2860
2861 /* Unmap the DMA scatter list entries */
2862 dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents,
2863 cmd->direction);
2864
2865 if (unlikely(cmd->unaligned))
2866 up(&dd->port->cmd_slot_unal);
2867
4dda4735 2868 blk_mq_end_request(rq, cmd->status);
abb0ccd1
ATS		 2869}
2870
2871static void mtip_abort_cmd(struct request *req, void *data,
2872 bool reserved)
2873{
4dda4735 2874 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
abb0ccd1
ATS		 2875 struct driver_data *dd = data;
2876
2877 dbg_printk(MTIP_DRV_NAME " Aborting request, tag = %d\n", req->tag);
2878
2879 clear_bit(req->tag, dd->port->cmds_to_issue);
4dda4735 2880 cmd->status = -EIO;
abb0ccd1
ATS		 2881 mtip_softirq_done_fn(req);
2882}
2883
2884static void mtip_queue_cmd(struct request *req, void *data,
2885 bool reserved)
2886{
2887 struct driver_data *dd = data;
2888
2889 set_bit(req->tag, dd->port->cmds_to_issue);
2890 blk_abort_request(req);
2891}
2892
60ec0eec
AT		 2893/*
2894 * service thread to issue queued commands
2895 *
2896 * @data Pointer to the driver data structure.
2897 *
2898 * return value
2899 * 0
2900 */
2901
2902static int mtip_service_thread(void *data)
2903{
2904 struct driver_data *dd = (struct driver_data *)data;
abb0ccd1 2905 unsigned long slot, slot_start, slot_wrap, to;
60ec0eec
AT		 2906 unsigned int num_cmd_slots = dd->slot_groups * 32;
2907 struct mtip_port *port = dd->port;
2908
2909 while (1) {
9b204fbf
AT		 2910 if (kthread_should_stop() ||
2911 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2912 goto st_out;
2913 clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2914
60ec0eec
AT		 2915 /*
2916 * the condition is to check neither an internal command is
2917 * is in progress nor error handling is active
2918 */
2919 wait_event_interruptible(port->svc_wait, (port->flags) &&
cfc05bd3 2920 (port->flags & MTIP_PF_SVC_THD_WORK));
8f8b8995 2921
9b204fbf
AT		 2922 if (kthread_should_stop() ||
2923 test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags))
2924 goto st_out;
2925
8a857a88 2926 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
45038367 2927 &dd->dd_flag)))
8f8b8995 2928 goto st_out;
c74b0f58 2929
cfc05bd3
ATS		 2930 set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags);
2931
9b204fbf
AT		 2932restart_eh:
2933 /* Demux bits: start with error handling */
2934 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) {
2935 mtip_handle_tfe(dd);
2936 clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags);
2937 }
2938
2939 if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags))
2940 goto restart_eh;
2941
abb0ccd1
ATS		 2942 if (test_bit(MTIP_PF_TO_ACTIVE_BIT, &port->flags)) {
2943 to = jiffies + msecs_to_jiffies(5000);
2944
2945 do {
2946 mdelay(100);
2947 } while (atomic_read(&dd->irq_workers_active) != 0 &&
2948 time_before(jiffies, to));
2949
2950 if (atomic_read(&dd->irq_workers_active) != 0)
2951 dev_warn(&dd->pdev->dev,
2952 "Completion workers still active!");
2953
2954 spin_lock(dd->queue->queue_lock);
6d125de4 2955 blk_mq_tagset_busy_iter(&dd->tags,
abb0ccd1
ATS		 2956 mtip_queue_cmd, dd);
2957 spin_unlock(dd->queue->queue_lock);
2958
2959 set_bit(MTIP_PF_ISSUE_CMDS_BIT, &dd->port->flags);
2960
2961 if (mtip_device_reset(dd))
6d125de4 2962 blk_mq_tagset_busy_iter(&dd->tags,
abb0ccd1
ATS		 2963 mtip_abort_cmd, dd);
2964
2965 clear_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags);
2966 }
2967
8a857a88 2968 if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) {
60ec0eec
AT		 2969 slot = 1;
2970 /* used to restrict the loop to one iteration */
2971 slot_start = num_cmd_slots;
2972 slot_wrap = 0;
2973 while (1) {
2974 slot = find_next_bit(port->cmds_to_issue,
2975 num_cmd_slots, slot);
2976 if (slot_wrap == 1) {
2977 if ((slot_start >= slot) ||
2978 (slot >= num_cmd_slots))
2979 break;
2980 }
2981 if (unlikely(slot_start == num_cmd_slots))
2982 slot_start = slot;
2983
2984 if (unlikely(slot == num_cmd_slots)) {
2985 slot = 1;
2986 slot_wrap = 1;
2987 continue;
2988 }
2989
2990 /* Issue the command to the hardware */
2991 mtip_issue_ncq_command(port, slot);
2992
60ec0eec
AT		 2993 clear_bit(slot, port->cmds_to_issue);
2994 }
2995
8a857a88 2996 clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags);
9b204fbf
AT		 2997 }
2998
2999 if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) {
59cf70e2
ATS		 3000 if (mtip_ftl_rebuild_poll(dd) == 0)
3001 clear_bit(MTIP_PF_REBUILD_BIT, &port->flags);
60ec0eec 3002 }
8f8b8995
AT		 3003 }
3004
8f8b8995 3005st_out:
60ec0eec
AT		 3006 return 0;
3007}
3008
188b9f49
SB		 3009/*
3010 * DMA region teardown
3011 *
3012 * @dd Pointer to driver_data structure
3013 *
3014 * return value
3015 * None
3016 */
3017static void mtip_dma_free(struct driver_data *dd)
3018{
188b9f49
SB		 3019 struct mtip_port *port = dd->port;
3020
3021 if (port->block1)
3022 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3023 port->block1, port->block1_dma);
3024
3025 if (port->command_list) {
3026 dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3027 port->command_list, port->command_list_dma);
3028 }
188b9f49
SB		 3029}
3030
3031/*
3032 * DMA region setup
3033 *
3034 * @dd Pointer to driver_data structure
3035 *
3036 * return value
3037 * -ENOMEM Not enough free DMA region space to initialize driver
3038 */
3039static int mtip_dma_alloc(struct driver_data *dd)
3040{
3041 struct mtip_port *port = dd->port;
188b9f49
SB		 3042
3043 /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */
3044 port->block1 =
3045 dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3046 &port->block1_dma, GFP_KERNEL);
3047 if (!port->block1)
3048 return -ENOMEM;
3049 memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ);
3050
3051 /* Allocate dma memory for command list */
3052 port->command_list =
3053 dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ,
3054 &port->command_list_dma, GFP_KERNEL);
3055 if (!port->command_list) {
3056 dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ,
3057 port->block1, port->block1_dma);
3058 port->block1 = NULL;
3059 port->block1_dma = 0;
3060 return -ENOMEM;
3061 }
3062 memset(port->command_list, 0, AHCI_CMD_TBL_SZ);
3063
3064 /* Setup all pointers into first DMA region */
3065 port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET;
3066 port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET;
3067 port->identify = port->block1 + AHCI_IDFY_OFFSET;
3068 port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET;
3069 port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET;
3070 port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET;
3071 port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET;
3072 port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET;
3073
ffc771b3
JA		 3074 return 0;
3075}
188b9f49 3076
ffc771b3
JA		 3077static int mtip_hw_get_identify(struct driver_data *dd)
3078{
3079 struct smart_attr attr242;
3080 unsigned char *buf;
3081 int rv;
188b9f49 3082
ffc771b3
JA		 3083 if (mtip_get_identify(dd->port, NULL) < 0)
3084 return -EFAULT;
188b9f49 3085
ffc771b3
JA		 3086 if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) ==
3087 MTIP_FTL_REBUILD_MAGIC) {
3088 set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags);
3089 return MTIP_FTL_REBUILD_MAGIC;
3090 }
3091 mtip_dump_identify(dd->port);
188b9f49 3092
ffc771b3
JA		 3093 /* check write protect, over temp and rebuild statuses */
3094 rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ,
3095 dd->port->log_buf,
3096 dd->port->log_buf_dma, 1);
3097 if (rv) {
3098 dev_warn(&dd->pdev->dev,
3099 "Error in READ LOG EXT (10h) command\n");
3100 /* non-critical error, don't fail the load */
3101 } else {
3102 buf = (unsigned char *)dd->port->log_buf;
3103 if (buf[259] & 0x1) {
3104 dev_info(&dd->pdev->dev,
3105 "Write protect bit is set.\n");
3106 set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag);
3107 }
3108 if (buf[288] == 0xF7) {
3109 dev_info(&dd->pdev->dev,
3110 "Exceeded Tmax, drive in thermal shutdown.\n");
3111 set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag);
3112 }
3113 if (buf[288] == 0xBF) {
3114 dev_info(&dd->pdev->dev,
3115 "Drive indicates rebuild has failed.\n");
aae4a033 3116 set_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag);
ffc771b3 3117 }
188b9f49 3118 }
ffc771b3
JA		 3119
3120 /* get write protect progess */
3121 memset(&attr242, 0, sizeof(struct smart_attr));
3122 if (mtip_get_smart_attr(dd->port, 242, &attr242))
3123 dev_warn(&dd->pdev->dev,
3124 "Unable to check write protect progress\n");
3125 else
3126 dev_info(&dd->pdev->dev,
3127 "Write protect progress: %u%% (%u blocks)\n",
3128 attr242.cur, le32_to_cpu(attr242.data));
3129
3130 return rv;
188b9f49
SB		 3131}
3132
88523a61
SB		 3133/*
3134 * Called once for each card.
3135 *
3136 * @dd Pointer to the driver data structure.
3137 *
3138 * return value
3139 * 0 on success, else an error code.
3140 */
6316668f 3141static int mtip_hw_init(struct driver_data *dd)
88523a61
SB		 3142{
3143 int i;
3144 int rv;
3145 unsigned int num_command_slots;
45038367 3146 unsigned long timeout, timetaken;
88523a61
SB		 3147
3148 dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR];
3149
3150 mtip_detect_product(dd);
3151 if (dd->product_type == MTIP_PRODUCT_UNKNOWN) {
3152 rv = -EIO;
3153 goto out1;
3154 }
3155 num_command_slots = dd->slot_groups * 32;
3156
3157 hba_setup(dd);
3158
16c906e5
AT		 3159 dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL,
3160 dd->numa_node);
88523a61
SB		 3161 if (!dd->port) {
3162 dev_err(&dd->pdev->dev,
3163 "Memory allocation: port structure\n");
3164 return -ENOMEM;
3165 }
3166
16c906e5
AT		 3167 /* Continue workqueue setup */
3168 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3169 dd->work[i].port = dd->port;
3170
2077d947
AT		 3171 /* Enable unaligned IO constraints for some devices */
3172 if (mtip_device_unaligned_constrained(dd))
3173 dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS;
3174 else
3175 dd->unal_qdepth = 0;
3176
2077d947 3177 sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth);
88523a61
SB		 3178
3179 /* Spinlock to prevent concurrent issue */
16c906e5
AT		 3180 for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++)
3181 spin_lock_init(&dd->port->cmd_issue_lock[i]);
88523a61
SB		 3182
3183 /* Set the port mmio base address. */
3184 dd->port->mmio = dd->mmio + PORT_OFFSET;
3185 dd->port->dd = dd;
3186
188b9f49
SB		 3187 /* DMA allocations */
3188 rv = mtip_dma_alloc(dd);
3189 if (rv < 0)
88523a61 3190 goto out1;
88523a61
SB		 3191
3192 /* Setup the pointers to the extended s_active and CI registers. */
3193 for (i = 0; i < dd->slot_groups; i++) {
3194 dd->port->s_active[i] =
3195 dd->port->mmio + i*0x80 + PORT_SCR_ACT;
3196 dd->port->cmd_issue[i] =
3197 dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE;
3198 dd->port->completed[i] =
3199 dd->port->mmio + i*0x80 + PORT_SDBV;
3200 }
3201
45038367
AT		 3202 timetaken = jiffies;
3203 timeout = jiffies + msecs_to_jiffies(30000);
3204 while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) &&
3205 time_before(jiffies, timeout)) {
3206 mdelay(100);
3207 }
3208 if (unlikely(mtip_check_surprise_removal(dd->pdev))) {
3209 timetaken = jiffies - timetaken;
3210 dev_warn(&dd->pdev->dev,
3211 "Surprise removal detected at %u ms\n",
3212 jiffies_to_msecs(timetaken));
3213 rv = -ENODEV;
3214 goto out2 ;
3215 }
8a857a88 3216 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) {
45038367
AT		 3217 timetaken = jiffies - timetaken;
3218 dev_warn(&dd->pdev->dev,
3219 "Removal detected at %u ms\n",
3220 jiffies_to_msecs(timetaken));
3221 rv = -EFAULT;
88523a61
SB		 3222 goto out2;
3223 }
3224
45038367
AT		 3225 /* Conditionally reset the HBA. */
3226 if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) {
3227 if (mtip_hba_reset(dd) < 0) {
3228 dev_err(&dd->pdev->dev,
3229 "Card did not reset within timeout\n");
3230 rv = -EIO;
3231 goto out2;
3232 }
3233 } else {
3234 /* Clear any pending interrupts on the HBA */
3235 writel(readl(dd->mmio + HOST_IRQ_STAT),
3236 dd->mmio + HOST_IRQ_STAT);
3237 }
3238
88523a61
SB		 3239 mtip_init_port(dd->port);
3240 mtip_start_port(dd->port);
3241
3242 /* Setup the ISR and enable interrupts. */
3243 rv = devm_request_irq(&dd->pdev->dev,
3244 dd->pdev->irq,
3245 mtip_irq_handler,
3246 IRQF_SHARED,
3247 dev_driver_string(&dd->pdev->dev),
3248 dd);
3249
3250 if (rv) {
3251 dev_err(&dd->pdev->dev,
3252 "Unable to allocate IRQ %d\n", dd->pdev->irq);
3253 goto out2;
3254 }
16c906e5 3255 irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding));
88523a61
SB		 3256
3257 /* Enable interrupts on the HBA. */
3258 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3259 dd->mmio + HOST_CTL);
3260
60ec0eec
AT		 3261 init_waitqueue_head(&dd->port->svc_wait);
3262
8a857a88 3263 if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) {
45038367
AT		 3264 rv = -EFAULT;
3265 goto out3;
3266 }
3267
88523a61
SB		 3268 return rv;
3269
3270out3:
88523a61
SB		 3271 /* Disable interrupts on the HBA. */
3272 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3273 dd->mmio + HOST_CTL);
3274
16c906e5
AT		 3275 /* Release the IRQ. */
3276 irq_set_affinity_hint(dd->pdev->irq, NULL);
88523a61
SB		 3277 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
3278
3279out2:
3280 mtip_deinit_port(dd->port);
188b9f49 3281 mtip_dma_free(dd);
88523a61 3282
88523a61
SB		 3283out1:
3284 /* Free the memory allocated for the for structure. */
3285 kfree(dd->port);
3286
3287 return rv;
3288}
3289
d8a18d2d 3290static int mtip_standby_drive(struct driver_data *dd)
ffc771b3 3291{
d8a18d2d 3292 int rv = 0;
ffc771b3 3293
d8a18d2d
ATS		 3294 if (dd->sr || !dd->port)
3295 return -ENODEV;
ffc771b3
JA		 3296 /*
3297 * Send standby immediate (E0h) to the drive so that it
3298 * saves its state.
3299 */
3300 if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) &&
d8a18d2d
ATS		 3301 !test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag) &&
3302 !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) {
3303 rv = mtip_standby_immediate(dd->port);
3304 if (rv)
ffc771b3
JA		 3305 dev_warn(&dd->pdev->dev,
3306 "STANDBY IMMEDIATE failed\n");
d8a18d2d
ATS		 3307 }
3308 return rv;
ffc771b3
JA		 3309}
3310
88523a61
SB		 3311/*
3312 * Called to deinitialize an interface.
3313 *
3314 * @dd Pointer to the driver data structure.
3315 *
3316 * return value
3317 * 0
3318 */
6316668f 3319static int mtip_hw_exit(struct driver_data *dd)
88523a61 3320{
8f8b8995 3321 if (!dd->sr) {
88523a61
SB		 3322 /* de-initialize the port. */
3323 mtip_deinit_port(dd->port);
3324
3325 /* Disable interrupts on the HBA. */
3326 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3327 dd->mmio + HOST_CTL);
3328 }
3329
88523a61 3330 /* Release the IRQ. */
16c906e5 3331 irq_set_affinity_hint(dd->pdev->irq, NULL);
88523a61 3332 devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd);
2132a544 3333 msleep(1000);
88523a61 3334
188b9f49
SB		 3335 /* Free dma regions */
3336 mtip_dma_free(dd);
3337
88523a61
SB		 3338 /* Free the memory allocated for the for structure. */
3339 kfree(dd->port);
8f8b8995 3340 dd->port = NULL;
88523a61
SB		 3341
3342 return 0;
3343}
3344
3345/*
3346 * Issue a Standby Immediate command to the device.
3347 *
3348 * This function is called by the Block Layer just before the
3349 * system powers off during a shutdown.
3350 *
3351 * @dd Pointer to the driver data structure.
3352 *
3353 * return value
3354 * 0
3355 */
6316668f 3356static int mtip_hw_shutdown(struct driver_data *dd)
88523a61
SB		 3357{
3358 /*
3359 * Send standby immediate (E0h) to the drive so that it
3360 * saves its state.
3361 */
d8a18d2d 3362 mtip_standby_drive(dd);
88523a61
SB		 3363
3364 return 0;
3365}
3366
3367/*
3368 * Suspend function
3369 *
3370 * This function is called by the Block Layer just before the
3371 * system hibernates.
3372 *
3373 * @dd Pointer to the driver data structure.
3374 *
3375 * return value
3376 * 0 Suspend was successful
3377 * -EFAULT Suspend was not successful
3378 */
6316668f 3379static int mtip_hw_suspend(struct driver_data *dd)
88523a61
SB		 3380{
3381 /*
3382 * Send standby immediate (E0h) to the drive
3383 * so that it saves its state.
3384 */
d8a18d2d 3385 if (mtip_standby_drive(dd) != 0) {
88523a61
SB		 3386 dev_err(&dd->pdev->dev,
3387 "Failed standby-immediate command\n");
3388 return -EFAULT;
3389 }
3390
3391 /* Disable interrupts on the HBA.*/
3392 writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN,
3393 dd->mmio + HOST_CTL);
3394 mtip_deinit_port(dd->port);
3395
3396 return 0;
3397}
3398
3399/*
3400 * Resume function
3401 *
3402 * This function is called by the Block Layer as the
3403 * system resumes.
3404 *
3405 * @dd Pointer to the driver data structure.
3406 *
3407 * return value
3408 * 0 Resume was successful
3409 * -EFAULT Resume was not successful
3410 */
6316668f 3411static int mtip_hw_resume(struct driver_data *dd)
88523a61
SB		 3412{
3413 /* Perform any needed hardware setup steps */
3414 hba_setup(dd);
3415
3416 /* Reset the HBA */
3417 if (mtip_hba_reset(dd) != 0) {
3418 dev_err(&dd->pdev->dev,
3419 "Unable to reset the HBA\n");
3420 return -EFAULT;
3421 }
3422
3423 /*
3424 * Enable the port, DMA engine, and FIS reception specific
3425 * h/w in controller.
3426 */
3427 mtip_init_port(dd->port);
3428 mtip_start_port(dd->port);
3429
3430 /* Enable interrupts on the HBA.*/
3431 writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN,
3432 dd->mmio + HOST_CTL);
3433
3434 return 0;
3435}
3436
88523a61
SB		 3437/*
3438 * Helper function for reusing disk name
3439 * upon hot insertion.
3440 */
3441static int rssd_disk_name_format(char *prefix,
3442 int index,
3443 char *buf,
3444 int buflen)
3445{
3446 const int base = 'z' - 'a' + 1;
3447 char *begin = buf + strlen(prefix);
3448 char *end = buf + buflen;
3449 char *p;
3450 int unit;
3451
3452 p = end - 1;
3453 *p = '\0';
3454 unit = base;
3455 do {
3456 if (p == begin)
3457 return -EINVAL;
3458 *--p = 'a' + (index % unit);
3459 index = (index / unit) - 1;
3460 } while (index >= 0);
3461
3462 memmove(begin, p, end - p);
3463 memcpy(buf, prefix, strlen(prefix));
3464
3465 return 0;
3466}
3467
3468/*
3469 * Block layer IOCTL handler.
3470 *
3471 * @dev Pointer to the block_device structure.
3472 * @mode ignored
3473 * @cmd IOCTL command passed from the user application.
3474 * @arg Argument passed from the user application.
3475 *
3476 * return value
3477 * 0 IOCTL completed successfully.
3478 * -ENOTTY IOCTL not supported or invalid driver data
3479 * structure pointer.
3480 */
3481static int mtip_block_ioctl(struct block_device *dev,
3482 fmode_t mode,
3483 unsigned cmd,
3484 unsigned long arg)
3485{
3486 struct driver_data *dd = dev->bd_disk->private_data;
3487
3488 if (!capable(CAP_SYS_ADMIN))
3489 return -EACCES;
3490
3491 if (!dd)
3492 return -ENOTTY;
3493
8a857a88 3494 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
45038367
AT		 3495 return -ENOTTY;
3496
88523a61
SB		 3497 switch (cmd) {
3498 case BLKFLSBUF:
60ec0eec 3499 return -ENOTTY;
88523a61 3500 default:
ef0f1587 3501 return mtip_hw_ioctl(dd, cmd, arg);
88523a61
SB		 3502 }
3503}
3504
16d02c04 3505#ifdef CONFIG_COMPAT
88523a61
SB		 3506/*
3507 * Block layer compat IOCTL handler.
3508 *
3509 * @dev Pointer to the block_device structure.
3510 * @mode ignored
3511 * @cmd IOCTL command passed from the user application.
3512 * @arg Argument passed from the user application.
3513 *
3514 * return value
3515 * 0 IOCTL completed successfully.
3516 * -ENOTTY IOCTL not supported or invalid driver data
3517 * structure pointer.
3518 */
3519static int mtip_block_compat_ioctl(struct block_device *dev,
3520 fmode_t mode,
3521 unsigned cmd,
3522 unsigned long arg)
3523{
3524 struct driver_data *dd = dev->bd_disk->private_data;
3525
3526 if (!capable(CAP_SYS_ADMIN))
3527 return -EACCES;
3528
3529 if (!dd)
3530 return -ENOTTY;
3531
8a857a88 3532 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)))
45038367
AT		 3533 return -ENOTTY;
3534
88523a61
SB		 3535 switch (cmd) {
3536 case BLKFLSBUF:
60ec0eec 3537 return -ENOTTY;
ef0f1587 3538 case HDIO_DRIVE_TASKFILE: {
60ec0eec 3539 struct mtip_compat_ide_task_request_s __user *compat_req_task;
ef0f1587
JA		 3540 ide_task_request_t req_task;
3541 int compat_tasksize, outtotal, ret;
3542
60ec0eec
AT		 3543 compat_tasksize =
3544 sizeof(struct mtip_compat_ide_task_request_s);
ef0f1587
JA		 3545
3546 compat_req_task =
3547 (struct mtip_compat_ide_task_request_s __user *) arg;
3548
3549 if (copy_from_user(&req_task, (void __user *) arg,
60ec0eec 3550 compat_tasksize - (2 * sizeof(compat_long_t))))
ef0f1587
JA		 3551 return -EFAULT;
3552
3553 if (get_user(req_task.out_size, &compat_req_task->out_size))
3554 return -EFAULT;
3555
3556 if (get_user(req_task.in_size, &compat_req_task->in_size))
3557 return -EFAULT;
3558
3559 outtotal = sizeof(struct mtip_compat_ide_task_request_s);
3560
3561 ret = exec_drive_taskfile(dd, (void __user *) arg,
3562 &req_task, outtotal);
3563
3564 if (copy_to_user((void __user *) arg, &req_task,
3565 compat_tasksize -
3566 (2 * sizeof(compat_long_t))))
3567 return -EFAULT;
3568
3569 if (put_user(req_task.out_size, &compat_req_task->out_size))
3570 return -EFAULT;
3571
3572 if (put_user(req_task.in_size, &compat_req_task->in_size))
3573 return -EFAULT;
3574
3575 return ret;
3576 }
88523a61 3577 default:
ef0f1587 3578 return mtip_hw_ioctl(dd, cmd, arg);
88523a61
SB		 3579 }
3580}
16d02c04 3581#endif
88523a61
SB		 3582
3583/*
3584 * Obtain the geometry of the device.
3585 *
3586 * You may think that this function is obsolete, but some applications,
3587 * fdisk for example still used CHS values. This function describes the
3588 * device as having 224 heads and 56 sectors per cylinder. These values are
3589 * chosen so that each cylinder is aligned on a 4KB boundary. Since a
3590 * partition is described in terms of a start and end cylinder this means
3591 * that each partition is also 4KB aligned. Non-aligned partitions adversely
3592 * affects performance.
3593 *
3594 * @dev Pointer to the block_device strucutre.
3595 * @geo Pointer to a hd_geometry structure.
3596 *
3597 * return value
3598 * 0 Operation completed successfully.
3599 * -ENOTTY An error occurred while reading the drive capacity.
3600 */
3601static int mtip_block_getgeo(struct block_device *dev,
3602 struct hd_geometry *geo)
3603{
3604 struct driver_data *dd = dev->bd_disk->private_data;
3605 sector_t capacity;
3606
3607 if (!dd)
3608 return -ENOTTY;
3609
3610 if (!(mtip_hw_get_capacity(dd, &capacity))) {
3611 dev_warn(&dd->pdev->dev,
3612 "Could not get drive capacity.\n");
3613 return -ENOTTY;
3614 }
3615
3616 geo->heads = 224;
3617 geo->sectors = 56;
60ec0eec 3618 sector_div(capacity, (geo->heads * geo->sectors));
88523a61 3619 geo->cylinders = capacity;
88523a61
SB		 3620 return 0;
3621}
3622
51c6570e
ATS		 3623static int mtip_block_open(struct block_device *dev, fmode_t mode)
3624{
3625 struct driver_data *dd;
3626
3627 if (dev && dev->bd_disk) {
3628 dd = (struct driver_data *) dev->bd_disk->private_data;
3629
3630 if (dd) {
3631 if (test_bit(MTIP_DDF_REMOVAL_BIT,
3632 &dd->dd_flag)) {
3633 return -ENODEV;
3634 }
3635 return 0;
3636 }
3637 }
3638 return -ENODEV;
3639}
3640
99e6b87e 3641static void mtip_block_release(struct gendisk *disk, fmode_t mode)
51c6570e
ATS		 3642{
3643}
3644
88523a61
SB		 3645/*
3646 * Block device operation function.
3647 *
3648 * This structure contains pointers to the functions required by the block
3649 * layer.
3650 */
3651static const struct block_device_operations mtip_block_ops = {
51c6570e
ATS		 3652 .open = mtip_block_open,
3653 .release = mtip_block_release,
88523a61 3654 .ioctl = mtip_block_ioctl,
16d02c04 3655#ifdef CONFIG_COMPAT
88523a61 3656 .compat_ioctl = mtip_block_compat_ioctl,
16d02c04 3657#endif
88523a61
SB		 3658 .getgeo = mtip_block_getgeo,
3659 .owner = THIS_MODULE
3660};
3661
686d8e0b
ATS		 3662static inline bool is_se_active(struct driver_data *dd)
3663{
3664 if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) {
3665 if (dd->port->ic_pause_timer) {
3666 unsigned long to = dd->port->ic_pause_timer +
3667 msecs_to_jiffies(1000);
3668 if (time_after(jiffies, to)) {
3669 clear_bit(MTIP_PF_SE_ACTIVE_BIT,
3670 &dd->port->flags);
3671 clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag);
3672 dd->port->ic_pause_timer = 0;
3673 wake_up_interruptible(&dd->port->svc_wait);
3674 return false;
3675 }
3676 }
3677 return true;
3678 }
3679 return false;
3680}
3681
88523a61
SB		 3682/*
3683 * Block layer make request function.
3684 *
3685 * This function is called by the kernel to process a BIO for
3686 * the P320 device.
3687 *
3688 * @queue Pointer to the request queue. Unused other than to obtain
3689 * the driver data structure.
ffc771b3 3690 * @rq Pointer to the request.
88523a61 3691 *
88523a61 3692 */
ffc771b3 3693static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq)
88523a61 3694{
ffc771b3
JA		 3695 struct driver_data *dd = hctx->queue->queuedata;
3696 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3697 unsigned int nents;
88523a61 3698
686d8e0b
ATS		 3699 if (is_se_active(dd))
3700 return -ENODATA;
3701
c74b0f58
AT		 3702 if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) {
3703 if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT,
3704 &dd->dd_flag))) {
ffc771b3 3705 return -ENXIO;
c74b0f58
AT		 3706 }
3707 if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) {
ffc771b3 3708 return -ENODATA;
c74b0f58
AT		 3709 }
3710 if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT,
3711 &dd->dd_flag) &&
ffc771b3
JA		 3712 rq_data_dir(rq))) {
3713 return -ENODATA;
8f8b8995 3714 }
aae4a033
ATS		 3715 if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag) ||
3716 test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)))
ffc771b3 3717 return -ENODATA;
45038367
AT		 3718 }
3719
c2df40df 3720 if (req_op(rq) == REQ_OP_DISCARD) {
ffc771b3 3721 int err;
15283469 3722
ffc771b3 3723 err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq));
c8a446ad 3724 blk_mq_end_request(rq, err);
ffc771b3 3725 return 0;
88523a61
SB		 3726 }
3727
ffc771b3
JA		 3728 /* Create the scatter list for this request. */
3729 nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg);
3730
3731 /* Issue the read/write. */
3732 mtip_hw_submit_io(dd, rq, cmd, nents, hctx);
3733 return 0;
3734}
3735
3736static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx,
3737 struct request *rq)
3738{
3739 struct driver_data *dd = hctx->queue->queuedata;
3740 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3741
f45c40a9 3742 if (rq_data_dir(rq) == READ || !dd->unal_qdepth)
ffc771b3
JA		 3743 return false;
3744
3745 /*
3746 * If unaligned depth must be limited on this controller, mark it
3747 * as unaligned if the IO isn't on a 4k boundary (start of length).
3748 */
3749 if (blk_rq_sectors(rq) <= 64) {
3750 if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7))
3751 cmd->unaligned = 1;
2077d947
AT		 3752 }
3753
ffc771b3
JA		 3754 if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal))
3755 return true;
88523a61 3756
ffc771b3
JA		 3757 return false;
3758}
88523a61 3759
3f5e6a35
JA		 3760static int mtip_issue_reserved_cmd(struct blk_mq_hw_ctx *hctx,
3761 struct request *rq)
3762{
3763 struct driver_data *dd = hctx->queue->queuedata;
3764 struct mtip_int_cmd *icmd = rq->end_io_data;
3765 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3766 struct mtip_cmd_sg *command_sg;
3767
3768 if (mtip_commands_active(dd->port))
3769 return BLK_MQ_RQ_QUEUE_BUSY;
3770
3771 rq->end_io_data = NULL;
3772
3773 /* Populate the SG list */
3774 cmd->command_header->opts =
3775 __force_bit2int cpu_to_le32(icmd->opts | icmd->fis_len);
3776 if (icmd->buf_len) {
3777 command_sg = cmd->command + AHCI_CMD_TBL_HDR_SZ;
3778
3779 command_sg->info =
3780 __force_bit2int cpu_to_le32((icmd->buf_len-1) & 0x3FFFFF);
3781 command_sg->dba =
3782 __force_bit2int cpu_to_le32(icmd->buffer & 0xFFFFFFFF);
3783 command_sg->dba_upper =
3784 __force_bit2int cpu_to_le32((icmd->buffer >> 16) >> 16);
3785
3786 cmd->command_header->opts |=
3787 __force_bit2int cpu_to_le32((1 << 16));
3788 }
3789
3790 /* Populate the command header */
3791 cmd->command_header->byte_count = 0;
3792
3793 blk_mq_start_request(rq);
3794 mtip_issue_non_ncq_command(dd->port, rq->tag);
3795 return BLK_MQ_RQ_QUEUE_OK;
3796}
3797
74c45052
JA		 3798static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx,
3799 const struct blk_mq_queue_data *bd)
ffc771b3 3800{
74c45052 3801 struct request *rq = bd->rq;
ffc771b3 3802 int ret;
88523a61 3803
a4e84aae
ML		 3804 mtip_init_cmd_header(rq);
3805
3f5e6a35
JA		 3806 if (blk_rq_is_passthrough(rq))
3807 return mtip_issue_reserved_cmd(hctx, rq);
3808
f45c40a9 3809 if (unlikely(mtip_check_unal_depth(hctx, rq)))
ffc771b3
JA		 3810 return BLK_MQ_RQ_QUEUE_BUSY;
3811
e2490073
CH		 3812 blk_mq_start_request(rq);
3813
ffc771b3 3814 ret = mtip_submit_request(hctx, rq);
f45c40a9 3815 if (likely(!ret))
ffc771b3
JA		 3816 return BLK_MQ_RQ_QUEUE_OK;
3817
ffc771b3 3818 return BLK_MQ_RQ_QUEUE_ERROR;
88523a61
SB		 3819}
3820
ffc771b3
JA		 3821static void mtip_free_cmd(void *data, struct request *rq,
3822 unsigned int hctx_idx, unsigned int request_idx)
3823{
3824 struct driver_data *dd = data;
3825 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
3826
3827 if (!cmd->command)
3828 return;
3829
3830 dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3831 cmd->command, cmd->command_dma);
3832}
3833
3834static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx,
3835 unsigned int request_idx, unsigned int numa_node)
3836{
3837 struct driver_data *dd = data;
3838 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq);
ffc771b3 3839
74c9c913
JM		 3840 /*
3841 * For flush requests, request_idx starts at the end of the
3842 * tag space. Since we don't support FLUSH/FUA, simply return
3843 * 0 as there's nothing to be done.
3844 */
3845 if (request_idx >= MTIP_MAX_COMMAND_SLOTS)
3846 return 0;
3847
ffc771b3
JA		 3848 cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ,
3849 &cmd->command_dma, GFP_KERNEL);
3850 if (!cmd->command)
3851 return -ENOMEM;
3852
3853 memset(cmd->command, 0, CMD_DMA_ALLOC_SZ);
3854
ffc771b3
JA		 3855 sg_init_table(cmd->sg, MTIP_MAX_SG);
3856 return 0;
3857}
3858
abb0ccd1
ATS		 3859static enum blk_eh_timer_return mtip_cmd_timeout(struct request *req,
3860 bool reserved)
3861{
3862 struct driver_data *dd = req->q->queuedata;
abb0ccd1 3863
3f5e6a35
JA		 3864 if (reserved) {
3865 struct mtip_cmd *cmd = blk_mq_rq_to_pdu(req);
3866
3867 cmd->status = -ETIME;
3868 if (cmd->comp_func)
3869 cmd->comp_func(dd->port, MTIP_TAG_INTERNAL, cmd, -ETIME);
abb0ccd1 3870 goto exit_handler;
3f5e6a35 3871 }
abb0ccd1
ATS		 3872
3873 if (test_bit(req->tag, dd->port->cmds_to_issue))
3874 goto exit_handler;
3875
3876 if (test_and_set_bit(MTIP_PF_TO_ACTIVE_BIT, &dd->port->flags))
3877 goto exit_handler;
3878
3879 wake_up_interruptible(&dd->port->svc_wait);
3880exit_handler:
90beb2e7 3881 return BLK_EH_RESET_TIMER;
abb0ccd1
ATS		 3882}
3883
f363b089 3884static const struct blk_mq_ops mtip_mq_ops = {
ffc771b3 3885 .queue_rq = mtip_queue_rq,
ffc771b3
JA		 3886 .init_request = mtip_init_cmd,
3887 .exit_request = mtip_free_cmd,
abb0ccd1
ATS		 3888 .complete = mtip_softirq_done_fn,
3889 .timeout = mtip_cmd_timeout,
ffc771b3
JA		 3890};
3891
88523a61
SB		 3892/*
3893 * Block layer initialization function.
3894 *
3895 * This function is called once by the PCI layer for each P320
3896 * device that is connected to the system.
3897 *
3898 * @dd Pointer to the driver data structure.
3899 *
3900 * return value
3901 * 0 on success else an error code.
3902 */
6316668f 3903static int mtip_block_initialize(struct driver_data *dd)
88523a61 3904{
62ee8c13 3905 int rv = 0, wait_for_rebuild = 0;
88523a61
SB		 3906 sector_t capacity;
3907 unsigned int index = 0;
3908 struct kobject *kobj;
3909
62ee8c13
AT		 3910 if (dd->disk)
3911 goto skip_create_disk; /* hw init done, before rebuild */
3912
ffc771b3 3913 if (mtip_hw_init(dd)) {
88523a61
SB		 3914 rv = -EINVAL;
3915 goto protocol_init_error;
3916 }
3917
16c906e5 3918 dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node);
88523a61
SB		 3919 if (dd->disk == NULL) {
3920 dev_err(&dd->pdev->dev,
3921 "Unable to allocate gendisk structure\n");
3922 rv = -EINVAL;
3923 goto alloc_disk_error;
3924 }
3925
3926 /* Generate the disk name, implemented same as in sd.c */
3927 do {
5b0e34e1
PB		 3928 if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) {
3929 rv = -ENOMEM;
88523a61 3930 goto ida_get_error;
5b0e34e1 3931 }
88523a61
SB		 3932
3933 spin_lock(&rssd_index_lock);
3934 rv = ida_get_new(&rssd_index_ida, &index);
3935 spin_unlock(&rssd_index_lock);
3936 } while (rv == -EAGAIN);
3937
3938 if (rv)
3939 goto ida_get_error;
3940
3941 rv = rssd_disk_name_format("rssd",
3942 index,
3943 dd->disk->disk_name,
3944 DISK_NAME_LEN);
3945 if (rv)
3946 goto disk_index_error;
3947
88523a61 3948 dd->disk->major = dd->major;
75787265
ATS		 3949 dd->disk->first_minor = index * MTIP_MAX_MINORS;
3950 dd->disk->minors = MTIP_MAX_MINORS;
88523a61 3951 dd->disk->fops = &mtip_block_ops;
88523a61 3952 dd->disk->private_data = dd;
88523a61
SB		 3953 dd->index = index;
3954
8f8b8995
AT		 3955 mtip_hw_debugfs_init(dd);
3956
ffc771b3
JA		 3957 memset(&dd->tags, 0, sizeof(dd->tags));
3958 dd->tags.ops = &mtip_mq_ops;
3959 dd->tags.nr_hw_queues = 1;
3960 dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS;
3961 dd->tags.reserved_tags = 1;
3962 dd->tags.cmd_size = sizeof(struct mtip_cmd);
3963 dd->tags.numa_node = dd->numa_node;
a800ce8b 3964 dd->tags.flags = BLK_MQ_F_SHOULD_MERGE;
ffc771b3 3965 dd->tags.driver_data = dd;
abb0ccd1 3966 dd->tags.timeout = MTIP_NCQ_CMD_TIMEOUT_MS;
ffc771b3
JA		 3967
3968 rv = blk_mq_alloc_tag_set(&dd->tags);
3969 if (rv) {
3970 dev_err(&dd->pdev->dev,
3971 "Unable to allocate request queue\n");
008e56d2 3972 goto block_queue_alloc_tag_error;
ffc771b3
JA		 3973 }
3974
62ee8c13 3975 /* Allocate the request queue. */
ffc771b3 3976 dd->queue = blk_mq_init_queue(&dd->tags);
a8a642cc 3977 if (IS_ERR(dd->queue)) {
62ee8c13
AT		 3978 dev_err(&dd->pdev->dev,
3979 "Unable to allocate request queue\n");
3980 rv = -ENOMEM;
3981 goto block_queue_alloc_init_error;
3982 }
3983
62ee8c13
AT		 3984 dd->disk->queue = dd->queue;
3985 dd->queue->queuedata = dd;
3986
59cf70e2 3987skip_create_disk:
ffc771b3
JA		 3988 /* Initialize the protocol layer. */
3989 wait_for_rebuild = mtip_hw_get_identify(dd);
3990 if (wait_for_rebuild < 0) {
3991 dev_err(&dd->pdev->dev,
3992 "Protocol layer initialization failed\n");
3993 rv = -EINVAL;
3994 goto init_hw_cmds_error;
3995 }
3996
3997 /*
3998 * if rebuild pending, start the service thread, and delay the block
0d52c756 3999 * queue creation and device_add_disk()
ffc771b3
JA		 4000 */
4001 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4002 goto start_service_thread;
4003
62ee8c13
AT		 4004 /* Set device limits. */
4005 set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags);
b277da0a 4006 clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags);
62ee8c13
AT		 4007 blk_queue_max_segments(dd->queue, MTIP_MAX_SG);
4008 blk_queue_physical_block_size(dd->queue, 4096);
6c8ab698
AT		 4009 blk_queue_max_hw_sectors(dd->queue, 0xffff);
4010 blk_queue_max_segment_size(dd->queue, 0x400000);
62ee8c13 4011 blk_queue_io_min(dd->queue, 4096);
1044b1bb 4012 blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask);
6c8ab698 4013
15283469
AT		 4014 /* Signal trim support */
4015 if (dd->trim_supp == true) {
4016 set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags);
4017 dd->queue->limits.discard_granularity = 4096;
4018 blk_queue_max_discard_sectors(dd->queue,
4019 MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES);
15283469
AT		 4020 }
4021
88523a61
SB		 4022 /* Set the capacity of the device in 512 byte sectors. */
4023 if (!(mtip_hw_get_capacity(dd, &capacity))) {
4024 dev_warn(&dd->pdev->dev,
4025 "Could not read drive capacity\n");
4026 rv = -EIO;
4027 goto read_capacity_error;
4028 }
4029 set_capacity(dd->disk, capacity);
4030
4031 /* Enable the block device and add it to /dev */
0d52c756 4032 device_add_disk(&dd->pdev->dev, dd->disk);
88523a61 4033
8f8b8995 4034 dd->bdev = bdget_disk(dd->disk, 0);
88523a61
SB		 4035 /*
4036 * Now that the disk is active, initialize any sysfs attributes
4037 * managed by the protocol layer.
4038 */
4039 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4040 if (kobj) {
4041 mtip_hw_sysfs_init(dd, kobj);
4042 kobject_put(kobj);
4043 }
4044
45038367 4045 if (dd->mtip_svc_handler) {
8a857a88 4046 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
62ee8c13 4047 return rv; /* service thread created for handling rebuild */
45038367 4048 }
62ee8c13
AT		 4049
4050start_service_thread:
16c906e5 4051 dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread,
8aeea031
RV		 4052 dd, dd->numa_node,
4053 "mtip_svc_thd_%02d", index);
60ec0eec
AT		 4054
4055 if (IS_ERR(dd->mtip_svc_handler)) {
c74b0f58 4056 dev_err(&dd->pdev->dev, "service thread failed to start\n");
60ec0eec
AT		 4057 dd->mtip_svc_handler = NULL;
4058 rv = -EFAULT;
62ee8c13 4059 goto kthread_run_error;
60ec0eec 4060 }
16c906e5 4061 wake_up_process(dd->mtip_svc_handler);
45038367
AT		 4062 if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC)
4063 rv = wait_for_rebuild;
4064
88523a61
SB		 4065 return rv;
4066
62ee8c13 4067kthread_run_error:
8f8b8995
AT		 4068 bdput(dd->bdev);
4069 dd->bdev = NULL;
7b421d24 4070
62ee8c13 4071 /* Delete our gendisk. This also removes the device from /dev */
88523a61
SB		 4072 del_gendisk(dd->disk);
4073
62ee8c13 4074read_capacity_error:
ffc771b3 4075init_hw_cmds_error:
62ee8c13 4076 blk_cleanup_queue(dd->queue);
62ee8c13 4077block_queue_alloc_init_error:
008e56d2
ATS		 4078 blk_mq_free_tag_set(&dd->tags);
4079block_queue_alloc_tag_error:
8f8b8995 4080 mtip_hw_debugfs_exit(dd);
88523a61
SB		 4081disk_index_error:
4082 spin_lock(&rssd_index_lock);
4083 ida_remove(&rssd_index_ida, index);
4084 spin_unlock(&rssd_index_lock);
4085
4086ida_get_error:
4087 put_disk(dd->disk);
4088
4089alloc_disk_error:
62ee8c13 4090 mtip_hw_exit(dd); /* De-initialize the protocol layer. */
88523a61
SB		 4091
4092protocol_init_error:
4093 return rv;
4094}
4095
008e56d2
ATS		 4096static void mtip_no_dev_cleanup(struct request *rq, void *data, bool reserv)
4097{
4098 struct driver_data *dd = (struct driver_data *)data;
4099 struct mtip_cmd *cmd;
4100
4dda4735 4101 if (likely(!reserv)) {
95c55ff4 4102 cmd = blk_mq_rq_to_pdu(rq);
4dda4735 4103 cmd->status = -ENODEV;
08e0029a 4104 blk_mq_complete_request(rq);
4dda4735 4105 } else if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &dd->port->flags)) {
008e56d2
ATS		 4106
4107 cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL);
3f5e6a35 4108 cmd->status = -ENODEV;
008e56d2
ATS		 4109 if (cmd->comp_func)
4110 cmd->comp_func(dd->port, MTIP_TAG_INTERNAL,
4111 cmd, -ENODEV);
4112 }
4113}
4114
88523a61
SB		 4115/*
4116 * Block layer deinitialization function.
4117 *
4118 * Called by the PCI layer as each P320 device is removed.
4119 *
4120 * @dd Pointer to the driver data structure.
4121 *
4122 * return value
4123 * 0
4124 */
6316668f 4125static int mtip_block_remove(struct driver_data *dd)
88523a61
SB		 4126{
4127 struct kobject *kobj;
60ec0eec 4128
2132a544 4129 mtip_hw_debugfs_exit(dd);
60ec0eec 4130
2132a544
ATS		 4131 if (dd->mtip_svc_handler) {
4132 set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags);
4133 wake_up_interruptible(&dd->port->svc_wait);
4134 kthread_stop(dd->mtip_svc_handler);
4135 }
88523a61 4136
2132a544
ATS		 4137 /* Clean up the sysfs attributes, if created */
4138 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) {
4139 kobj = kobject_get(&disk_to_dev(dd->disk)->kobj);
4140 if (kobj) {
4141 mtip_hw_sysfs_exit(dd, kobj);
4142 kobject_put(kobj);
8f8b8995 4143 }
2132a544 4144 }
ffc771b3 4145
008e56d2
ATS		 4146 if (!dd->sr) {
4147 /*
4148 * Explicitly wait here for IOs to quiesce,
4149 * as mtip_standby_drive usually won't wait for IOs.
4150 */
8afdd94c 4151 if (!mtip_quiesce_io(dd->port, MTIP_QUIESCE_IO_TIMEOUT_MS))
008e56d2
ATS		 4152 mtip_standby_drive(dd);
4153 }
2132a544 4154 else
8f8b8995
AT		 4155 dev_info(&dd->pdev->dev, "device %s surprise removal\n",
4156 dd->disk->disk_name);
2132a544 4157
1671d522 4158 blk_freeze_queue_start(dd->queue);
008e56d2 4159 blk_mq_stop_hw_queues(dd->queue);
6d125de4 4160 blk_mq_tagset_busy_iter(&dd->tags, mtip_no_dev_cleanup, dd);
008e56d2 4161
2132a544
ATS		 4162 /*
4163 * Delete our gendisk structure. This also removes the device
4164 * from /dev
4165 */
4166 if (dd->bdev) {
4167 bdput(dd->bdev);
4168 dd->bdev = NULL;
4169 }
4170 if (dd->disk) {
59cf70e2
ATS		 4171 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4172 del_gendisk(dd->disk);
2132a544
ATS		 4173 if (dd->disk->queue) {
4174 blk_cleanup_queue(dd->queue);
4175 blk_mq_free_tag_set(&dd->tags);
4176 dd->queue = NULL;
4177 }
4178 put_disk(dd->disk);
8f8b8995 4179 }
2132a544
ATS		 4180 dd->disk = NULL;
4181
4182 spin_lock(&rssd_index_lock);
4183 ida_remove(&rssd_index_ida, dd->index);
4184 spin_unlock(&rssd_index_lock);
88523a61
SB		 4185
4186 /* De-initialize the protocol layer. */
4187 mtip_hw_exit(dd);
4188
4189 return 0;
4190}
4191
4192/*
4193 * Function called by the PCI layer when just before the
4194 * machine shuts down.
4195 *
4196 * If a protocol layer shutdown function is present it will be called
4197 * by this function.
4198 *
4199 * @dd Pointer to the driver data structure.
4200 *
4201 * return value
4202 * 0
4203 */
6316668f 4204static int mtip_block_shutdown(struct driver_data *dd)
88523a61 4205{
ffc771b3
JA		 4206 mtip_hw_shutdown(dd);
4207
88523a61 4208 /* Delete our gendisk structure, and cleanup the blk queue. */
58c49df3 4209 if (dd->disk) {
5a79e1ac
AT		 4210 dev_info(&dd->pdev->dev,
4211 "Shutting down %s ...\n", dd->disk->disk_name);
4212
59cf70e2
ATS		 4213 if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag))
4214 del_gendisk(dd->disk);
5a79e1ac 4215 if (dd->disk->queue) {
5a79e1ac 4216 blk_cleanup_queue(dd->queue);
ffc771b3 4217 blk_mq_free_tag_set(&dd->tags);
02b48265
ATS		 4218 }
4219 put_disk(dd->disk);
5a79e1ac
AT		 4220 dd->disk = NULL;
4221 dd->queue = NULL;
58c49df3
AT		 4222 }
4223
8182b495
AT		 4224 spin_lock(&rssd_index_lock);
4225 ida_remove(&rssd_index_ida, dd->index);
4226 spin_unlock(&rssd_index_lock);
88523a61
SB		 4227 return 0;
4228}
4229
6316668f 4230static int mtip_block_suspend(struct driver_data *dd)
88523a61
SB		 4231{
4232 dev_info(&dd->pdev->dev,
4233 "Suspending %s ...\n", dd->disk->disk_name);
4234 mtip_hw_suspend(dd);
4235 return 0;
4236}
4237
6316668f 4238static int mtip_block_resume(struct driver_data *dd)
88523a61
SB		 4239{
4240 dev_info(&dd->pdev->dev, "Resuming %s ...\n",
4241 dd->disk->disk_name);
4242 mtip_hw_resume(dd);
4243 return 0;
4244}
4245
16c906e5
AT		 4246static void drop_cpu(int cpu)
4247{
4248 cpu_use[cpu]--;
4249}
4250
4251static int get_least_used_cpu_on_node(int node)
4252{
4253 int cpu, least_used_cpu, least_cnt;
4254 const struct cpumask *node_mask;
4255
4256 node_mask = cpumask_of_node(node);
4257 least_used_cpu = cpumask_first(node_mask);
4258 least_cnt = cpu_use[least_used_cpu];
4259 cpu = least_used_cpu;
4260
4261 for_each_cpu(cpu, node_mask) {
4262 if (cpu_use[cpu] < least_cnt) {
4263 least_used_cpu = cpu;
4264 least_cnt = cpu_use[cpu];
4265 }
4266 }
4267 cpu_use[least_used_cpu]++;
4268 return least_used_cpu;
4269}
4270
4271/* Helper for selecting a node in round robin mode */
4272static inline int mtip_get_next_rr_node(void)
4273{
4274 static int next_node = -1;
4275
4276 if (next_node == -1) {
4277 next_node = first_online_node;
4278 return next_node;
4279 }
4280
4281 next_node = next_online_node(next_node);
4282 if (next_node == MAX_NUMNODES)
4283 next_node = first_online_node;
4284 return next_node;
4285}
4286
25bac122
FW		 4287static DEFINE_HANDLER(0);
4288static DEFINE_HANDLER(1);
4289static DEFINE_HANDLER(2);
4290static DEFINE_HANDLER(3);
4291static DEFINE_HANDLER(4);
4292static DEFINE_HANDLER(5);
4293static DEFINE_HANDLER(6);
4294static DEFINE_HANDLER(7);
16c906e5 4295
d1e714db
AT		 4296static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev)
4297{
4298 int pos;
4299 unsigned short pcie_dev_ctrl;
4300
4301 pos = pci_find_capability(pdev, PCI_CAP_ID_EXP);
4302 if (pos) {
4303 pci_read_config_word(pdev,
4304 pos + PCI_EXP_DEVCTL,
4305 &pcie_dev_ctrl);
4306 if (pcie_dev_ctrl & (1 << 11) ||
4307 pcie_dev_ctrl & (1 << 4)) {
4308 dev_info(&dd->pdev->dev,
4309 "Disabling ERO/No-Snoop on bridge device %04x:%04x\n",
4310 pdev->vendor, pdev->device);
4311 pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN |
4312 PCI_EXP_DEVCTL_RELAX_EN);
4313 pci_write_config_word(pdev,
4314 pos + PCI_EXP_DEVCTL,
4315 pcie_dev_ctrl);
4316 }
4317 }
4318}
4319
4320static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev)
4321{
4322 /*
4323 * This workaround is specific to AMD/ATI chipset with a PCI upstream
4324 * device with device id 0x5aXX
4325 */
4326 if (pdev->bus && pdev->bus->self) {
4327 if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI &&
4328 ((pdev->bus->self->device & 0xff00) == 0x5a00)) {
4329 mtip_disable_link_opts(dd, pdev->bus->self);
4330 } else {
4331 /* Check further up the topology */
4332 struct pci_dev *parent_dev = pdev->bus->self;
4333 if (parent_dev->bus &&
4334 parent_dev->bus->parent &&
4335 parent_dev->bus->parent->self &&
4336 parent_dev->bus->parent->self->vendor ==
4337 PCI_VENDOR_ID_ATI &&
4338 (parent_dev->bus->parent->self->device &
4339 0xff00) == 0x5a00) {
4340 mtip_disable_link_opts(dd,
4341 parent_dev->bus->parent->self);
4342 }
4343 }
4344 }
4345}
4346
88523a61
SB		 4347/*
4348 * Called for each supported PCI device detected.
4349 *
4350 * This function allocates the private data structure, enables the
4351 * PCI device and then calls the block layer initialization function.
4352 *
4353 * return value
4354 * 0 on success else an error code.
4355 */
4356static int mtip_pci_probe(struct pci_dev *pdev,
4357 const struct pci_device_id *ent)
4358{
4359 int rv = 0;
4360 struct driver_data *dd = NULL;
16c906e5
AT		 4361 char cpu_list[256];
4362 const struct cpumask *node_mask;
4363 int cpu, i = 0, j = 0;
4364 int my_node = NUMA_NO_NODE;
0caff003 4365 unsigned long flags;
88523a61
SB		 4366
4367 /* Allocate memory for this devices private data. */
16c906e5
AT		 4368 my_node = pcibus_to_node(pdev->bus);
4369 if (my_node != NUMA_NO_NODE) {
4370 if (!node_online(my_node))
4371 my_node = mtip_get_next_rr_node();
4372 } else {
4373 dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n");
4374 my_node = mtip_get_next_rr_node();
4375 }
4376 dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n",
4377 my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev),
7f328908 4378 cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id());
16c906e5
AT		 4379
4380 dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node);
88523a61
SB		 4381 if (dd == NULL) {
4382 dev_err(&pdev->dev,
4383 "Unable to allocate memory for driver data\n");
4384 return -ENOMEM;
4385 }
4386
88523a61
SB		 4387 /* Attach the private data to this PCI device. */
4388 pci_set_drvdata(pdev, dd);
4389
4390 rv = pcim_enable_device(pdev);
4391 if (rv < 0) {
4392 dev_err(&pdev->dev, "Unable to enable device\n");
4393 goto iomap_err;
4394 }
4395
4396 /* Map BAR5 to memory. */
4397 rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME);
4398 if (rv < 0) {
4399 dev_err(&pdev->dev, "Unable to map regions\n");
4400 goto iomap_err;
4401 }
4402
4403 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) {
4404 rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64));
4405
4406 if (rv) {
4407 rv = pci_set_consistent_dma_mask(pdev,
4408 DMA_BIT_MASK(32));
4409 if (rv) {
4410 dev_warn(&pdev->dev,
4411 "64-bit DMA enable failed\n");
4412 goto setmask_err;
4413 }
4414 }
4415 }
4416
16c906e5
AT		 4417 /* Copy the info we may need later into the private data structure. */
4418 dd->major = mtip_major;
4419 dd->instance = instance;
4420 dd->pdev = pdev;
4421 dd->numa_node = my_node;
4422
0caff003
AT		 4423 INIT_LIST_HEAD(&dd->online_list);
4424 INIT_LIST_HEAD(&dd->remove_list);
4425
16c906e5
AT		 4426 memset(dd->workq_name, 0, 32);
4427 snprintf(dd->workq_name, 31, "mtipq%d", dd->instance);
88523a61 4428
16c906e5
AT		 4429 dd->isr_workq = create_workqueue(dd->workq_name);
4430 if (!dd->isr_workq) {
4431 dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance);
d137c830 4432 rv = -ENOMEM;
16c906e5
AT		 4433 goto block_initialize_err;
4434 }
4435
4436 memset(cpu_list, 0, sizeof(cpu_list));
4437
4438 node_mask = cpumask_of_node(dd->numa_node);
4439 if (!cpumask_empty(node_mask)) {
4440 for_each_cpu(cpu, node_mask)
4441 {
4442 snprintf(&cpu_list[j], 256 - j, "%d ", cpu);
4443 j = strlen(cpu_list);
4444 }
4445
4446 dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n",
4447 dd->numa_node,
4448 topology_physical_package_id(cpumask_first(node_mask)),
4449 nr_cpus_node(dd->numa_node),
4450 cpu_list);
4451 } else
4452 dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n");
4453
4454 dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node);
4455 dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n",
4456 cpu_to_node(dd->isr_binding), dd->isr_binding);
4457
4458 /* first worker context always runs in ISR */
4459 dd->work[0].cpu_binding = dd->isr_binding;
4460 dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4461 dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node);
4462 dd->work[3].cpu_binding = dd->work[0].cpu_binding;
4463 dd->work[4].cpu_binding = dd->work[1].cpu_binding;
4464 dd->work[5].cpu_binding = dd->work[2].cpu_binding;
4465 dd->work[6].cpu_binding = dd->work[2].cpu_binding;
4466 dd->work[7].cpu_binding = dd->work[1].cpu_binding;
4467
4468 /* Log the bindings */
4469 for_each_present_cpu(cpu) {
4470 memset(cpu_list, 0, sizeof(cpu_list));
4471 for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) {
4472 if (dd->work[i].cpu_binding == cpu) {
4473 snprintf(&cpu_list[j], 256 - j, "%d ", i);
4474 j = strlen(cpu_list);
4475 }
4476 }
4477 if (j)
4478 dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list);
4479 }
4480
4481 INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0);
4482 INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1);
4483 INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2);
4484 INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3);
4485 INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4);
4486 INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5);
4487 INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6);
4488 INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7);
4489
4490 pci_set_master(pdev);
d137c830
WY		 4491 rv = pci_enable_msi(pdev);
4492 if (rv) {
88523a61
SB		 4493 dev_warn(&pdev->dev,
4494 "Unable to enable MSI interrupt.\n");
cf91f39b 4495 goto msi_initialize_err;
88523a61
SB		 4496 }
4497
d1e714db
AT		 4498 mtip_fix_ero_nosnoop(dd, pdev);
4499
88523a61
SB		 4500 /* Initialize the block layer. */
4501 rv = mtip_block_initialize(dd);
4502 if (rv < 0) {
4503 dev_err(&pdev->dev,
4504 "Unable to initialize block layer\n");
4505 goto block_initialize_err;
4506 }
4507
4508 /*
4509 * Increment the instance count so that each device has a unique
4510 * instance number.
4511 */
4512 instance++;
45038367 4513 if (rv != MTIP_FTL_REBUILD_MAGIC)
8a857a88 4514 set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag);
6b06d35f
AT		 4515 else
4516 rv = 0; /* device in rebuild state, return 0 from probe */
0caff003
AT		 4517
4518 /* Add to online list even if in ftl rebuild */
4519 spin_lock_irqsave(&dev_lock, flags);
4520 list_add(&dd->online_list, &online_list);
4521 spin_unlock_irqrestore(&dev_lock, flags);
4522
88523a61
SB		 4523 goto done;
4524
4525block_initialize_err:
4526 pci_disable_msi(pdev);
cf91f39b
AG		 4527
4528msi_initialize_err:
16c906e5
AT		 4529 if (dd->isr_workq) {
4530 flush_workqueue(dd->isr_workq);
4531 destroy_workqueue(dd->isr_workq);
4532 drop_cpu(dd->work[0].cpu_binding);
4533 drop_cpu(dd->work[1].cpu_binding);
4534 drop_cpu(dd->work[2].cpu_binding);
4535 }
88523a61
SB		 4536setmask_err:
4537 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
4538
4539iomap_err:
4540 kfree(dd);
4541 pci_set_drvdata(pdev, NULL);
4542 return rv;
4543done:
88523a61
SB		 4544 return rv;
4545}
4546
4547/*
4548 * Called for each probed device when the device is removed or the
4549 * driver is unloaded.
4550 *
4551 * return value
4552 * None
4553 */
4554static void mtip_pci_remove(struct pci_dev *pdev)
4555{
4556 struct driver_data *dd = pci_get_drvdata(pdev);
8f8b8995 4557 unsigned long flags, to;
88523a61 4558
51c6570e 4559 set_bit(MTIP_DDF_REMOVAL_BIT, &dd->dd_flag);
45038367 4560
0caff003
AT		 4561 spin_lock_irqsave(&dev_lock, flags);
4562 list_del_init(&dd->online_list);
4563 list_add(&dd->remove_list, &removing_list);
4564 spin_unlock_irqrestore(&dev_lock, flags);
4565
8f8b8995
AT		 4566 mtip_check_surprise_removal(pdev);
4567 synchronize_irq(dd->pdev->irq);
4568
4569 /* Spin until workers are done */
4570 to = jiffies + msecs_to_jiffies(4000);
4571 do {
4572 msleep(20);
4573 } while (atomic_read(&dd->irq_workers_active) != 0 &&
4574 time_before(jiffies, to));
4575
008e56d2
ATS		 4576 if (!dd->sr)
4577 fsync_bdev(dd->bdev);
51c6570e 4578
8f8b8995
AT		 4579 if (atomic_read(&dd->irq_workers_active) != 0) {
4580 dev_warn(&dd->pdev->dev,
4581 "Completion workers still active!\n");
88523a61 4582 }
88523a61 4583
008e56d2 4584 blk_set_queue_dying(dd->queue);
51c6570e
ATS		 4585 set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag);
4586
88523a61
SB		 4587 /* Clean up the block layer. */
4588 mtip_block_remove(dd);
4589
16c906e5
AT		 4590 if (dd->isr_workq) {
4591 flush_workqueue(dd->isr_workq);
4592 destroy_workqueue(dd->isr_workq);
4593 drop_cpu(dd->work[0].cpu_binding);
4594 drop_cpu(dd->work[1].cpu_binding);
4595 drop_cpu(dd->work[2].cpu_binding);
4596 }
4597
88523a61
SB		 4598 pci_disable_msi(pdev);
4599
0caff003
AT		 4600 spin_lock_irqsave(&dev_lock, flags);
4601 list_del_init(&dd->remove_list);
4602 spin_unlock_irqrestore(&dev_lock, flags);
4603
2132a544 4604 kfree(dd);
8f8b8995 4605
88523a61 4606 pcim_iounmap_regions(pdev, 1 << MTIP_ABAR);
8f8b8995 4607 pci_set_drvdata(pdev, NULL);
88523a61
SB		 4608}
4609
4610/*
4611 * Called for each probed device when the device is suspended.
4612 *
4613 * return value
4614 * 0 Success
4615 * <0 Error
4616 */
4617static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg)
4618{
4619 int rv = 0;
4620 struct driver_data *dd = pci_get_drvdata(pdev);
4621
4622 if (!dd) {
4623 dev_err(&pdev->dev,
4624 "Driver private datastructure is NULL\n");
4625 return -EFAULT;
4626 }
4627
8a857a88 4628 set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
88523a61
SB		 4629
4630 /* Disable ports & interrupts then send standby immediate */
4631 rv = mtip_block_suspend(dd);
4632 if (rv < 0) {
4633 dev_err(&pdev->dev,
4634 "Failed to suspend controller\n");
4635 return rv;
4636 }
4637
4638 /*
4639 * Save the pci config space to pdev structure &
4640 * disable the device
4641 */
4642 pci_save_state(pdev);
4643 pci_disable_device(pdev);
4644
4645 /* Move to Low power state*/
4646 pci_set_power_state(pdev, PCI_D3hot);
4647
4648 return rv;
4649}
4650
4651/*
4652 * Called for each probed device when the device is resumed.
4653 *
4654 * return value
4655 * 0 Success
4656 * <0 Error
4657 */
4658static int mtip_pci_resume(struct pci_dev *pdev)
4659{
4660 int rv = 0;
4661 struct driver_data *dd;
4662
4663 dd = pci_get_drvdata(pdev);
4664 if (!dd) {
4665 dev_err(&pdev->dev,
4666 "Driver private datastructure is NULL\n");
4667 return -EFAULT;
4668 }
4669
4670 /* Move the device to active State */
4671 pci_set_power_state(pdev, PCI_D0);
4672
4673 /* Restore PCI configuration space */
4674 pci_restore_state(pdev);
4675
4676 /* Enable the PCI device*/
4677 rv = pcim_enable_device(pdev);
4678 if (rv < 0) {
4679 dev_err(&pdev->dev,
4680 "Failed to enable card during resume\n");
4681 goto err;
4682 }
4683 pci_set_master(pdev);
4684
4685 /*
4686 * Calls hbaReset, initPort, & startPort function
4687 * then enables interrupts
4688 */
4689 rv = mtip_block_resume(dd);
4690 if (rv < 0)
4691 dev_err(&pdev->dev, "Unable to resume\n");
4692
4693err:
8a857a88 4694 clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag);
88523a61
SB		 4695
4696 return rv;
4697}
4698
4699/*
4700 * Shutdown routine
4701 *
4702 * return value
4703 * None
4704 */
4705static void mtip_pci_shutdown(struct pci_dev *pdev)
4706{
4707 struct driver_data *dd = pci_get_drvdata(pdev);
4708 if (dd)
4709 mtip_block_shutdown(dd);
4710}
4711
88523a61 4712/* Table of device ids supported by this driver. */
9baa3c34 4713static const struct pci_device_id mtip_pci_tbl[] = {
1a131458
AT		 4714 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) },
4715 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) },
4716 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) },
4717 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) },
4718 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) },
4719 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) },
4720 { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) },
88523a61
SB		 4721 { 0 }
4722};
4723
4724/* Structure that describes the PCI driver functions. */
3ff147d3 4725static struct pci_driver mtip_pci_driver = {
88523a61
SB		 4726 .name = MTIP_DRV_NAME,
4727 .id_table = mtip_pci_tbl,
4728 .probe = mtip_pci_probe,
4729 .remove = mtip_pci_remove,
4730 .suspend = mtip_pci_suspend,
4731 .resume = mtip_pci_resume,
4732 .shutdown = mtip_pci_shutdown,
4733};
4734
4735MODULE_DEVICE_TABLE(pci, mtip_pci_tbl);
4736
4737/*
4738 * Module initialization function.
4739 *
4740 * Called once when the module is loaded. This function allocates a major
4741 * block device number to the Cyclone devices and registers the PCI layer
4742 * of the driver.
4743 *
4744 * Return value
4745 * 0 on success else error code.
4746 */
4747static int __init mtip_init(void)
4748{
6d27f09a
RS		 4749 int error;
4750
45422e74 4751 pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n");
88523a61 4752
0caff003
AT		 4753 spin_lock_init(&dev_lock);
4754
4755 INIT_LIST_HEAD(&online_list);
4756 INIT_LIST_HEAD(&removing_list);
4757
88523a61 4758 /* Allocate a major block device number to use with this driver. */
6d27f09a
RS		 4759 error = register_blkdev(0, MTIP_DRV_NAME);
4760 if (error <= 0) {
45422e74 4761 pr_err("Unable to register block device (%d)\n",
6d27f09a 4762 error);
88523a61
SB		 4763 return -EBUSY;
4764 }
6d27f09a 4765 mtip_major = error;
88523a61 4766
0caff003
AT		 4767 dfs_parent = debugfs_create_dir("rssd", NULL);
4768 if (IS_ERR_OR_NULL(dfs_parent)) {
4769 pr_warn("Error creating debugfs parent\n");
4770 dfs_parent = NULL;
4771 }
4772 if (dfs_parent) {
4773 dfs_device_status = debugfs_create_file("device_status",
4774 S_IRUGO, dfs_parent, NULL,
4775 &mtip_device_status_fops);
4776 if (IS_ERR_OR_NULL(dfs_device_status)) {
4777 pr_err("Error creating device_status node\n");
4778 dfs_device_status = NULL;
7b421d24
AT		 4779 }
4780 }
4781
88523a61 4782 /* Register our PCI operations. */
6d27f09a 4783 error = pci_register_driver(&mtip_pci_driver);
7b421d24
AT		 4784 if (error) {
4785 debugfs_remove(dfs_parent);
6d27f09a 4786 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
7b421d24 4787 }
6d27f09a
RS		 4788
4789 return error;
88523a61
SB		 4790}
4791
4792/*
4793 * Module de-initialization function.
4794 *
4795 * Called once when the module is unloaded. This function deallocates
4796 * the major block device number allocated by mtip_init() and
4797 * unregisters the PCI layer of the driver.
4798 *
4799 * Return value
4800 * none
4801 */
4802static void __exit mtip_exit(void)
4803{
4804 /* Release the allocated major block device number. */
4805 unregister_blkdev(mtip_major, MTIP_DRV_NAME);
4806
4807 /* Unregister the PCI driver. */
4808 pci_unregister_driver(&mtip_pci_driver);
af5ded8c
AT		 4809
4810 debugfs_remove_recursive(dfs_parent);
88523a61
SB		 4811}
4812
4813MODULE_AUTHOR("Micron Technology, Inc");
4814MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver");
4815MODULE_LICENSE("GPL");
4816MODULE_VERSION(MTIP_DRV_VERSION);
4817
4818module_init(mtip_init);
4819module_exit(mtip_exit);
Linux 6.x block layer and io_uring tree(s)