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88523a61 SB |
1 | /* |
2 | * Driver for the Micron P320 SSD | |
3 | * Copyright (C) 2011 Micron Technology, Inc. | |
4 | * | |
5 | * Portions of this code were derived from works subjected to the | |
6 | * following copyright: | |
7 | * Copyright (C) 2009 Integrated Device Technology, Inc. | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | */ | |
20 | ||
21 | #include <linux/pci.h> | |
22 | #include <linux/interrupt.h> | |
23 | #include <linux/ata.h> | |
24 | #include <linux/delay.h> | |
25 | #include <linux/hdreg.h> | |
26 | #include <linux/uaccess.h> | |
27 | #include <linux/random.h> | |
28 | #include <linux/smp.h> | |
29 | #include <linux/compat.h> | |
30 | #include <linux/fs.h> | |
0e838c62 | 31 | #include <linux/module.h> |
88523a61 SB |
32 | #include <linux/genhd.h> |
33 | #include <linux/blkdev.h> | |
ffc771b3 | 34 | #include <linux/blk-mq.h> |
88523a61 SB |
35 | #include <linux/bio.h> |
36 | #include <linux/dma-mapping.h> | |
37 | #include <linux/idr.h> | |
60ec0eec | 38 | #include <linux/kthread.h> |
88523a61 | 39 | #include <../drivers/ata/ahci.h> |
45038367 | 40 | #include <linux/export.h> |
7b421d24 | 41 | #include <linux/debugfs.h> |
f45c40a9 | 42 | #include <linux/prefetch.h> |
88523a61 SB |
43 | #include "mtip32xx.h" |
44 | ||
45 | #define HW_CMD_SLOT_SZ (MTIP_MAX_COMMAND_SLOTS * 32) | |
188b9f49 SB |
46 | |
47 | /* DMA region containing RX Fis, Identify, RLE10, and SMART buffers */ | |
48 | #define AHCI_RX_FIS_SZ 0x100 | |
49 | #define AHCI_RX_FIS_OFFSET 0x0 | |
50 | #define AHCI_IDFY_SZ ATA_SECT_SIZE | |
51 | #define AHCI_IDFY_OFFSET 0x400 | |
52 | #define AHCI_SECTBUF_SZ ATA_SECT_SIZE | |
53 | #define AHCI_SECTBUF_OFFSET 0x800 | |
54 | #define AHCI_SMARTBUF_SZ ATA_SECT_SIZE | |
55 | #define AHCI_SMARTBUF_OFFSET 0xC00 | |
56 | /* 0x100 + 0x200 + 0x200 + 0x200 is smaller than 4k but we pad it out */ | |
57 | #define BLOCK_DMA_ALLOC_SZ 4096 | |
58 | ||
59 | /* DMA region containing command table (should be 8192 bytes) */ | |
60 | #define AHCI_CMD_SLOT_SZ sizeof(struct mtip_cmd_hdr) | |
61 | #define AHCI_CMD_TBL_SZ (MTIP_MAX_COMMAND_SLOTS * AHCI_CMD_SLOT_SZ) | |
62 | #define AHCI_CMD_TBL_OFFSET 0x0 | |
63 | ||
64 | /* DMA region per command (contains header and SGL) */ | |
65 | #define AHCI_CMD_TBL_HDR_SZ 0x80 | |
66 | #define AHCI_CMD_TBL_HDR_OFFSET 0x0 | |
67 | #define AHCI_CMD_TBL_SGL_SZ (MTIP_MAX_SG * sizeof(struct mtip_cmd_sg)) | |
68 | #define AHCI_CMD_TBL_SGL_OFFSET AHCI_CMD_TBL_HDR_SZ | |
69 | #define CMD_DMA_ALLOC_SZ (AHCI_CMD_TBL_SGL_SZ + AHCI_CMD_TBL_HDR_SZ) | |
70 | ||
88523a61 | 71 | |
45038367 | 72 | #define HOST_CAP_NZDMA (1 << 19) |
88523a61 SB |
73 | #define HOST_HSORG 0xFC |
74 | #define HSORG_DISABLE_SLOTGRP_INTR (1<<24) | |
75 | #define HSORG_DISABLE_SLOTGRP_PXIS (1<<16) | |
76 | #define HSORG_HWREV 0xFF00 | |
77 | #define HSORG_STYLE 0x8 | |
78 | #define HSORG_SLOTGROUPS 0x7 | |
79 | ||
80 | #define PORT_COMMAND_ISSUE 0x38 | |
81 | #define PORT_SDBV 0x7C | |
82 | ||
83 | #define PORT_OFFSET 0x100 | |
84 | #define PORT_MEM_SIZE 0x80 | |
85 | ||
86 | #define PORT_IRQ_ERR \ | |
87 | (PORT_IRQ_HBUS_ERR | PORT_IRQ_IF_ERR | PORT_IRQ_CONNECT | \ | |
88 | PORT_IRQ_PHYRDY | PORT_IRQ_UNK_FIS | PORT_IRQ_BAD_PMP | \ | |
89 | PORT_IRQ_TF_ERR | PORT_IRQ_HBUS_DATA_ERR | PORT_IRQ_IF_NONFATAL | \ | |
90 | PORT_IRQ_OVERFLOW) | |
91 | #define PORT_IRQ_LEGACY \ | |
92 | (PORT_IRQ_PIOS_FIS | PORT_IRQ_D2H_REG_FIS) | |
93 | #define PORT_IRQ_HANDLED \ | |
94 | (PORT_IRQ_SDB_FIS | PORT_IRQ_LEGACY | \ | |
95 | PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR | \ | |
96 | PORT_IRQ_CONNECT | PORT_IRQ_PHYRDY) | |
97 | #define DEF_PORT_IRQ \ | |
98 | (PORT_IRQ_ERR | PORT_IRQ_LEGACY | PORT_IRQ_SDB_FIS) | |
99 | ||
100 | /* product numbers */ | |
101 | #define MTIP_PRODUCT_UNKNOWN 0x00 | |
102 | #define MTIP_PRODUCT_ASICFPGA 0x11 | |
103 | ||
104 | /* Device instance number, incremented each time a device is probed. */ | |
105 | static int instance; | |
106 | ||
0caff003 AT |
107 | struct list_head online_list; |
108 | struct list_head removing_list; | |
109 | spinlock_t dev_lock; | |
110 | ||
88523a61 SB |
111 | /* |
112 | * Global variable used to hold the major block device number | |
113 | * allocated in mtip_init(). | |
114 | */ | |
3ff147d3 | 115 | static int mtip_major; |
7b421d24 | 116 | static struct dentry *dfs_parent; |
0caff003 | 117 | static struct dentry *dfs_device_status; |
88523a61 | 118 | |
16c906e5 AT |
119 | static u32 cpu_use[NR_CPUS]; |
120 | ||
88523a61 SB |
121 | static DEFINE_SPINLOCK(rssd_index_lock); |
122 | static DEFINE_IDA(rssd_index_ida); | |
123 | ||
62ee8c13 AT |
124 | static int mtip_block_initialize(struct driver_data *dd); |
125 | ||
16d02c04 | 126 | #ifdef CONFIG_COMPAT |
88523a61 SB |
127 | struct mtip_compat_ide_task_request_s { |
128 | __u8 io_ports[8]; | |
129 | __u8 hob_ports[8]; | |
130 | ide_reg_valid_t out_flags; | |
131 | ide_reg_valid_t in_flags; | |
132 | int data_phase; | |
133 | int req_cmd; | |
134 | compat_ulong_t out_size; | |
135 | compat_ulong_t in_size; | |
136 | }; | |
16d02c04 | 137 | #endif |
88523a61 | 138 | |
6316668f JA |
139 | /* |
140 | * This function check_for_surprise_removal is called | |
141 | * while card is removed from the system and it will | |
142 | * read the vendor id from the configration space | |
143 | * | |
144 | * @pdev Pointer to the pci_dev structure. | |
145 | * | |
146 | * return value | |
147 | * true if device removed, else false | |
148 | */ | |
149 | static bool mtip_check_surprise_removal(struct pci_dev *pdev) | |
150 | { | |
151 | u16 vendor_id = 0; | |
8f8b8995 AT |
152 | struct driver_data *dd = pci_get_drvdata(pdev); |
153 | ||
154 | if (dd->sr) | |
155 | return true; | |
6316668f JA |
156 | |
157 | /* Read the vendorID from the configuration space */ | |
158 | pci_read_config_word(pdev, 0x00, &vendor_id); | |
8f8b8995 AT |
159 | if (vendor_id == 0xFFFF) { |
160 | dd->sr = true; | |
161 | if (dd->queue) | |
162 | set_bit(QUEUE_FLAG_DEAD, &dd->queue->queue_flags); | |
163 | else | |
164 | dev_warn(&dd->pdev->dev, | |
165 | "%s: dd->queue is NULL\n", __func__); | |
6316668f | 166 | return true; /* device removed */ |
6316668f JA |
167 | } |
168 | ||
8f8b8995 | 169 | return false; /* device present */ |
6316668f JA |
170 | } |
171 | ||
ffc771b3 | 172 | static struct mtip_cmd *mtip_get_int_command(struct driver_data *dd) |
88523a61 | 173 | { |
ffc771b3 | 174 | struct request *rq; |
88523a61 | 175 | |
71baba4b | 176 | rq = blk_mq_alloc_request(dd->queue, 0, __GFP_RECLAIM, true); |
ffc771b3 JA |
177 | return blk_mq_rq_to_pdu(rq); |
178 | } | |
88523a61 | 179 | |
ffc771b3 JA |
180 | static void mtip_put_int_command(struct driver_data *dd, struct mtip_cmd *cmd) |
181 | { | |
182 | blk_put_request(blk_mq_rq_from_pdu(cmd)); | |
88523a61 SB |
183 | } |
184 | ||
185 | /* | |
ffc771b3 | 186 | * Once we add support for one hctx per mtip group, this will change a bit |
88523a61 | 187 | */ |
ffc771b3 JA |
188 | static struct request *mtip_rq_from_tag(struct driver_data *dd, |
189 | unsigned int tag) | |
190 | { | |
0e62f51f JA |
191 | struct blk_mq_hw_ctx *hctx = dd->queue->queue_hw_ctx[0]; |
192 | ||
193 | return blk_mq_tag_to_rq(hctx->tags, tag); | |
ffc771b3 JA |
194 | } |
195 | ||
196 | static struct mtip_cmd *mtip_cmd_from_tag(struct driver_data *dd, | |
197 | unsigned int tag) | |
88523a61 | 198 | { |
ffc771b3 JA |
199 | struct request *rq = mtip_rq_from_tag(dd, tag); |
200 | ||
201 | return blk_mq_rq_to_pdu(rq); | |
88523a61 SB |
202 | } |
203 | ||
8f8b8995 AT |
204 | /* |
205 | * IO completion function. | |
206 | * | |
207 | * This completion function is called by the driver ISR when a | |
208 | * command that was issued by the kernel completes. It first calls the | |
209 | * asynchronous completion function which normally calls back into the block | |
210 | * layer passing the asynchronous callback data, then unmaps the | |
211 | * scatter list associated with the completed command, and finally | |
212 | * clears the allocated bit associated with the completed command. | |
213 | * | |
214 | * @port Pointer to the port data structure. | |
215 | * @tag Tag of the command. | |
216 | * @data Pointer to driver_data. | |
217 | * @status Completion status. | |
218 | * | |
219 | * return value | |
220 | * None | |
221 | */ | |
222 | static void mtip_async_complete(struct mtip_port *port, | |
ffc771b3 | 223 | int tag, struct mtip_cmd *cmd, int status) |
8f8b8995 | 224 | { |
ffc771b3 JA |
225 | struct driver_data *dd = port->dd; |
226 | struct request *rq; | |
8f8b8995 AT |
227 | |
228 | if (unlikely(!dd) || unlikely(!port)) | |
229 | return; | |
230 | ||
8f8b8995 AT |
231 | if (unlikely(status == PORT_IRQ_TF_ERR)) { |
232 | dev_warn(&port->dd->pdev->dev, | |
233 | "Command tag %d failed due to TFE\n", tag); | |
234 | } | |
235 | ||
ffc771b3 JA |
236 | /* Unmap the DMA scatter list entries */ |
237 | dma_unmap_sg(&dd->pdev->dev, cmd->sg, cmd->scatter_ents, cmd->direction); | |
8f8b8995 | 238 | |
ffc771b3 | 239 | rq = mtip_rq_from_tag(dd, tag); |
8f8b8995 | 240 | |
ffc771b3 JA |
241 | if (unlikely(cmd->unaligned)) |
242 | up(&port->cmd_slot_unal); | |
8f8b8995 | 243 | |
c8a446ad | 244 | blk_mq_end_request(rq, status ? -EIO : 0); |
8f8b8995 AT |
245 | } |
246 | ||
88523a61 | 247 | /* |
6316668f | 248 | * Reset the HBA (without sleeping) |
88523a61 | 249 | * |
6316668f | 250 | * @dd Pointer to the driver data structure. |
88523a61 SB |
251 | * |
252 | * return value | |
6316668f JA |
253 | * 0 The reset was successful. |
254 | * -1 The HBA Reset bit did not clear. | |
88523a61 | 255 | */ |
d0d096b1 | 256 | static int mtip_hba_reset(struct driver_data *dd) |
88523a61 | 257 | { |
6316668f | 258 | unsigned long timeout; |
88523a61 | 259 | |
6316668f JA |
260 | /* Set the reset bit */ |
261 | writel(HOST_RESET, dd->mmio + HOST_CTL); | |
88523a61 | 262 | |
6316668f JA |
263 | /* Flush */ |
264 | readl(dd->mmio + HOST_CTL); | |
88523a61 | 265 | |
2f17d71d ATS |
266 | /* |
267 | * Spin for up to 10 seconds waiting for reset acknowledgement. Spec | |
268 | * is 1 sec but in LUN failure conditions, up to 10 secs are required | |
269 | */ | |
270 | timeout = jiffies + msecs_to_jiffies(10000); | |
d0d096b1 AT |
271 | do { |
272 | mdelay(10); | |
273 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) | |
274 | return -1; | |
88523a61 | 275 | |
d0d096b1 AT |
276 | } while ((readl(dd->mmio + HOST_CTL) & HOST_RESET) |
277 | && time_before(jiffies, timeout)); | |
45038367 | 278 | |
6316668f JA |
279 | if (readl(dd->mmio + HOST_CTL) & HOST_RESET) |
280 | return -1; | |
88523a61 | 281 | |
6316668f | 282 | return 0; |
88523a61 SB |
283 | } |
284 | ||
285 | /* | |
6316668f | 286 | * Issue a command to the hardware. |
88523a61 | 287 | * |
6316668f JA |
288 | * Set the appropriate bit in the s_active and Command Issue hardware |
289 | * registers, causing hardware command processing to begin. | |
88523a61 | 290 | * |
6316668f JA |
291 | * @port Pointer to the port structure. |
292 | * @tag The tag of the command to be issued. | |
88523a61 SB |
293 | * |
294 | * return value | |
6316668f | 295 | * None |
88523a61 | 296 | */ |
6316668f | 297 | static inline void mtip_issue_ncq_command(struct mtip_port *port, int tag) |
88523a61 | 298 | { |
16c906e5 | 299 | int group = tag >> 5; |
88523a61 | 300 | |
16c906e5 AT |
301 | /* guard SACT and CI registers */ |
302 | spin_lock(&port->cmd_issue_lock[group]); | |
6316668f JA |
303 | writel((1 << MTIP_TAG_BIT(tag)), |
304 | port->s_active[MTIP_TAG_INDEX(tag)]); | |
305 | writel((1 << MTIP_TAG_BIT(tag)), | |
306 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
16c906e5 | 307 | spin_unlock(&port->cmd_issue_lock[group]); |
88523a61 SB |
308 | } |
309 | ||
310 | /* | |
311 | * Enable/disable the reception of FIS | |
312 | * | |
313 | * @port Pointer to the port data structure | |
314 | * @enable 1 to enable, 0 to disable | |
315 | * | |
316 | * return value | |
317 | * Previous state: 1 enabled, 0 disabled | |
318 | */ | |
319 | static int mtip_enable_fis(struct mtip_port *port, int enable) | |
320 | { | |
321 | u32 tmp; | |
322 | ||
323 | /* enable FIS reception */ | |
324 | tmp = readl(port->mmio + PORT_CMD); | |
325 | if (enable) | |
326 | writel(tmp | PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
327 | else | |
328 | writel(tmp & ~PORT_CMD_FIS_RX, port->mmio + PORT_CMD); | |
329 | ||
330 | /* Flush */ | |
331 | readl(port->mmio + PORT_CMD); | |
332 | ||
333 | return (((tmp & PORT_CMD_FIS_RX) == PORT_CMD_FIS_RX)); | |
334 | } | |
335 | ||
336 | /* | |
337 | * Enable/disable the DMA engine | |
338 | * | |
339 | * @port Pointer to the port data structure | |
340 | * @enable 1 to enable, 0 to disable | |
341 | * | |
342 | * return value | |
343 | * Previous state: 1 enabled, 0 disabled. | |
344 | */ | |
345 | static int mtip_enable_engine(struct mtip_port *port, int enable) | |
346 | { | |
347 | u32 tmp; | |
348 | ||
349 | /* enable FIS reception */ | |
350 | tmp = readl(port->mmio + PORT_CMD); | |
351 | if (enable) | |
352 | writel(tmp | PORT_CMD_START, port->mmio + PORT_CMD); | |
353 | else | |
354 | writel(tmp & ~PORT_CMD_START, port->mmio + PORT_CMD); | |
355 | ||
356 | readl(port->mmio + PORT_CMD); | |
357 | return (((tmp & PORT_CMD_START) == PORT_CMD_START)); | |
358 | } | |
359 | ||
360 | /* | |
361 | * Enables the port DMA engine and FIS reception. | |
362 | * | |
363 | * return value | |
364 | * None | |
365 | */ | |
366 | static inline void mtip_start_port(struct mtip_port *port) | |
367 | { | |
368 | /* Enable FIS reception */ | |
369 | mtip_enable_fis(port, 1); | |
370 | ||
371 | /* Enable the DMA engine */ | |
372 | mtip_enable_engine(port, 1); | |
373 | } | |
374 | ||
375 | /* | |
376 | * Deinitialize a port by disabling port interrupts, the DMA engine, | |
377 | * and FIS reception. | |
378 | * | |
379 | * @port Pointer to the port structure | |
380 | * | |
381 | * return value | |
382 | * None | |
383 | */ | |
384 | static inline void mtip_deinit_port(struct mtip_port *port) | |
385 | { | |
386 | /* Disable interrupts on this port */ | |
387 | writel(0, port->mmio + PORT_IRQ_MASK); | |
388 | ||
389 | /* Disable the DMA engine */ | |
390 | mtip_enable_engine(port, 0); | |
391 | ||
392 | /* Disable FIS reception */ | |
393 | mtip_enable_fis(port, 0); | |
394 | } | |
395 | ||
396 | /* | |
397 | * Initialize a port. | |
398 | * | |
399 | * This function deinitializes the port by calling mtip_deinit_port() and | |
400 | * then initializes it by setting the command header and RX FIS addresses, | |
401 | * clearing the SError register and any pending port interrupts before | |
402 | * re-enabling the default set of port interrupts. | |
403 | * | |
404 | * @port Pointer to the port structure. | |
405 | * | |
406 | * return value | |
407 | * None | |
408 | */ | |
409 | static void mtip_init_port(struct mtip_port *port) | |
410 | { | |
411 | int i; | |
412 | mtip_deinit_port(port); | |
413 | ||
414 | /* Program the command list base and FIS base addresses */ | |
415 | if (readl(port->dd->mmio + HOST_CAP) & HOST_CAP_64) { | |
416 | writel((port->command_list_dma >> 16) >> 16, | |
417 | port->mmio + PORT_LST_ADDR_HI); | |
418 | writel((port->rxfis_dma >> 16) >> 16, | |
419 | port->mmio + PORT_FIS_ADDR_HI); | |
420 | } | |
421 | ||
60ec0eec | 422 | writel(port->command_list_dma & 0xFFFFFFFF, |
88523a61 | 423 | port->mmio + PORT_LST_ADDR); |
60ec0eec | 424 | writel(port->rxfis_dma & 0xFFFFFFFF, port->mmio + PORT_FIS_ADDR); |
88523a61 SB |
425 | |
426 | /* Clear SError */ | |
427 | writel(readl(port->mmio + PORT_SCR_ERR), port->mmio + PORT_SCR_ERR); | |
428 | ||
6316668f JA |
429 | /* reset the completed registers.*/ |
430 | for (i = 0; i < port->dd->slot_groups; i++) | |
431 | writel(0xFFFFFFFF, port->completed[i]); | |
88523a61 | 432 | |
6316668f | 433 | /* Clear any pending interrupts for this port */ |
6bb688c0 | 434 | writel(readl(port->mmio + PORT_IRQ_STAT), port->mmio + PORT_IRQ_STAT); |
88523a61 | 435 | |
22be2e6e AT |
436 | /* Clear any pending interrupts on the HBA. */ |
437 | writel(readl(port->dd->mmio + HOST_IRQ_STAT), | |
438 | port->dd->mmio + HOST_IRQ_STAT); | |
439 | ||
6316668f JA |
440 | /* Enable port interrupts */ |
441 | writel(DEF_PORT_IRQ, port->mmio + PORT_IRQ_MASK); | |
88523a61 SB |
442 | } |
443 | ||
444 | /* | |
445 | * Restart a port | |
446 | * | |
447 | * @port Pointer to the port data structure. | |
448 | * | |
449 | * return value | |
450 | * None | |
451 | */ | |
6316668f | 452 | static void mtip_restart_port(struct mtip_port *port) |
88523a61 SB |
453 | { |
454 | unsigned long timeout; | |
455 | ||
456 | /* Disable the DMA engine */ | |
457 | mtip_enable_engine(port, 0); | |
458 | ||
459 | /* Chip quirk: wait up to 500ms for PxCMD.CR == 0 */ | |
460 | timeout = jiffies + msecs_to_jiffies(500); | |
461 | while ((readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) | |
462 | && time_before(jiffies, timeout)) | |
463 | ; | |
464 | ||
8a857a88 | 465 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
466 | return; |
467 | ||
88523a61 SB |
468 | /* |
469 | * Chip quirk: escalate to hba reset if | |
470 | * PxCMD.CR not clear after 500 ms | |
471 | */ | |
472 | if (readl(port->mmio + PORT_CMD) & PORT_CMD_LIST_ON) { | |
473 | dev_warn(&port->dd->pdev->dev, | |
474 | "PxCMD.CR not clear, escalating reset\n"); | |
475 | ||
d0d096b1 | 476 | if (mtip_hba_reset(port->dd)) |
88523a61 SB |
477 | dev_err(&port->dd->pdev->dev, |
478 | "HBA reset escalation failed.\n"); | |
479 | ||
480 | /* 30 ms delay before com reset to quiesce chip */ | |
481 | mdelay(30); | |
482 | } | |
483 | ||
484 | dev_warn(&port->dd->pdev->dev, "Issuing COM reset\n"); | |
485 | ||
486 | /* Set PxSCTL.DET */ | |
487 | writel(readl(port->mmio + PORT_SCR_CTL) | | |
488 | 1, port->mmio + PORT_SCR_CTL); | |
489 | readl(port->mmio + PORT_SCR_CTL); | |
490 | ||
491 | /* Wait 1 ms to quiesce chip function */ | |
492 | timeout = jiffies + msecs_to_jiffies(1); | |
493 | while (time_before(jiffies, timeout)) | |
494 | ; | |
495 | ||
8a857a88 | 496 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
497 | return; |
498 | ||
88523a61 SB |
499 | /* Clear PxSCTL.DET */ |
500 | writel(readl(port->mmio + PORT_SCR_CTL) & ~1, | |
501 | port->mmio + PORT_SCR_CTL); | |
502 | readl(port->mmio + PORT_SCR_CTL); | |
503 | ||
504 | /* Wait 500 ms for bit 0 of PORT_SCR_STS to be set */ | |
505 | timeout = jiffies + msecs_to_jiffies(500); | |
506 | while (((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) | |
507 | && time_before(jiffies, timeout)) | |
508 | ; | |
509 | ||
8a857a88 | 510 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
511 | return; |
512 | ||
88523a61 SB |
513 | if ((readl(port->mmio + PORT_SCR_STAT) & 0x01) == 0) |
514 | dev_warn(&port->dd->pdev->dev, | |
515 | "COM reset failed\n"); | |
516 | ||
22be2e6e AT |
517 | mtip_init_port(port); |
518 | mtip_start_port(port); | |
88523a61 | 519 | |
88523a61 SB |
520 | } |
521 | ||
d0d096b1 AT |
522 | static int mtip_device_reset(struct driver_data *dd) |
523 | { | |
524 | int rv = 0; | |
525 | ||
526 | if (mtip_check_surprise_removal(dd->pdev)) | |
527 | return 0; | |
528 | ||
529 | if (mtip_hba_reset(dd) < 0) | |
530 | rv = -EFAULT; | |
531 | ||
532 | mdelay(1); | |
533 | mtip_init_port(dd->port); | |
534 | mtip_start_port(dd->port); | |
535 | ||
536 | /* Enable interrupts on the HBA. */ | |
537 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
538 | dd->mmio + HOST_CTL); | |
539 | return rv; | |
540 | } | |
541 | ||
95fea2f1 AT |
542 | /* |
543 | * Helper function for tag logging | |
544 | */ | |
545 | static void print_tags(struct driver_data *dd, | |
546 | char *msg, | |
547 | unsigned long *tagbits, | |
548 | int cnt) | |
549 | { | |
550 | unsigned char tagmap[128]; | |
551 | int group, tagmap_len = 0; | |
552 | ||
553 | memset(tagmap, 0, sizeof(tagmap)); | |
554 | for (group = SLOTBITS_IN_LONGS; group > 0; group--) | |
ffc771b3 | 555 | tagmap_len += sprintf(tagmap + tagmap_len, "%016lX ", |
95fea2f1 AT |
556 | tagbits[group-1]); |
557 | dev_warn(&dd->pdev->dev, | |
558 | "%d command(s) %s: tagmap [%s]", cnt, msg, tagmap); | |
559 | } | |
560 | ||
6316668f JA |
561 | /* |
562 | * Internal command completion callback function. | |
563 | * | |
564 | * This function is normally called by the driver ISR when an internal | |
565 | * command completed. This function signals the command completion by | |
566 | * calling complete(). | |
567 | * | |
568 | * @port Pointer to the port data structure. | |
569 | * @tag Tag of the command that has completed. | |
570 | * @data Pointer to a completion structure. | |
571 | * @status Completion status. | |
572 | * | |
573 | * return value | |
574 | * None | |
575 | */ | |
576 | static void mtip_completion(struct mtip_port *port, | |
ffc771b3 | 577 | int tag, struct mtip_cmd *command, int status) |
6316668f | 578 | { |
ffc771b3 | 579 | struct completion *waiting = command->comp_data; |
6316668f JA |
580 | if (unlikely(status == PORT_IRQ_TF_ERR)) |
581 | dev_warn(&port->dd->pdev->dev, | |
582 | "Internal command %d completed with TFE\n", tag); | |
583 | ||
6316668f JA |
584 | complete(waiting); |
585 | } | |
586 | ||
8182b495 | 587 | static void mtip_null_completion(struct mtip_port *port, |
ffc771b3 | 588 | int tag, struct mtip_cmd *command, int status) |
8182b495 | 589 | { |
8182b495 AT |
590 | } |
591 | ||
f6587217 AT |
592 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, |
593 | dma_addr_t buffer_dma, unsigned int sectors); | |
594 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
595 | struct smart_attr *attrib); | |
88523a61 SB |
596 | /* |
597 | * Handle an error. | |
598 | * | |
599 | * @dd Pointer to the DRIVER_DATA structure. | |
600 | * | |
601 | * return value | |
602 | * None | |
603 | */ | |
604 | static void mtip_handle_tfe(struct driver_data *dd) | |
605 | { | |
f6587217 | 606 | int group, tag, bit, reissue, rv; |
88523a61 | 607 | struct mtip_port *port; |
f6587217 | 608 | struct mtip_cmd *cmd; |
88523a61 SB |
609 | u32 completed; |
610 | struct host_to_dev_fis *fis; | |
611 | unsigned long tagaccum[SLOTBITS_IN_LONGS]; | |
95fea2f1 | 612 | unsigned int cmd_cnt = 0; |
f6587217 AT |
613 | unsigned char *buf; |
614 | char *fail_reason = NULL; | |
615 | int fail_all_ncq_write = 0, fail_all_ncq_cmds = 0; | |
88523a61 SB |
616 | |
617 | dev_warn(&dd->pdev->dev, "Taskfile error\n"); | |
618 | ||
619 | port = dd->port; | |
620 | ||
d02e1f0a AT |
621 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
622 | ||
a7806fad | 623 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags)) { |
ffc771b3 | 624 | cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); |
d02e1f0a AT |
625 | dbg_printk(MTIP_DRV_NAME " TFE for the internal command\n"); |
626 | ||
d02e1f0a AT |
627 | if (cmd->comp_data && cmd->comp_func) { |
628 | cmd->comp_func(port, MTIP_TAG_INTERNAL, | |
ffc771b3 | 629 | cmd, PORT_IRQ_TF_ERR); |
d02e1f0a AT |
630 | } |
631 | goto handle_tfe_exit; | |
632 | } | |
88523a61 | 633 | |
95fea2f1 AT |
634 | /* clear the tag accumulator */ |
635 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
636 | ||
88523a61 SB |
637 | /* Loop through all the groups */ |
638 | for (group = 0; group < dd->slot_groups; group++) { | |
639 | completed = readl(port->completed[group]); | |
640 | ||
ffc771b3 JA |
641 | dev_warn(&dd->pdev->dev, "g=%u, comp=%x\n", group, completed); |
642 | ||
88523a61 SB |
643 | /* clear completed status register in the hardware.*/ |
644 | writel(completed, port->completed[group]); | |
645 | ||
88523a61 SB |
646 | /* Process successfully completed commands */ |
647 | for (bit = 0; bit < 32 && completed; bit++) { | |
648 | if (!(completed & (1<<bit))) | |
649 | continue; | |
650 | tag = (group << 5) + bit; | |
651 | ||
652 | /* Skip the internal command slot */ | |
653 | if (tag == MTIP_TAG_INTERNAL) | |
654 | continue; | |
655 | ||
ffc771b3 | 656 | cmd = mtip_cmd_from_tag(dd, tag); |
f6587217 | 657 | if (likely(cmd->comp_func)) { |
88523a61 | 658 | set_bit(tag, tagaccum); |
95fea2f1 | 659 | cmd_cnt++; |
ffc771b3 | 660 | cmd->comp_func(port, tag, cmd, 0); |
88523a61 SB |
661 | } else { |
662 | dev_err(&port->dd->pdev->dev, | |
663 | "Missing completion func for tag %d", | |
664 | tag); | |
665 | if (mtip_check_surprise_removal(dd->pdev)) { | |
88523a61 SB |
666 | /* don't proceed further */ |
667 | return; | |
668 | } | |
669 | } | |
670 | } | |
671 | } | |
95fea2f1 AT |
672 | |
673 | print_tags(dd, "completed (TFE)", tagaccum, cmd_cnt); | |
88523a61 SB |
674 | |
675 | /* Restart the port */ | |
676 | mdelay(20); | |
677 | mtip_restart_port(port); | |
678 | ||
f6587217 AT |
679 | /* Trying to determine the cause of the error */ |
680 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
681 | dd->port->log_buf, | |
682 | dd->port->log_buf_dma, 1); | |
683 | if (rv) { | |
684 | dev_warn(&dd->pdev->dev, | |
685 | "Error in READ LOG EXT (10h) command\n"); | |
686 | /* non-critical error, don't fail the load */ | |
687 | } else { | |
688 | buf = (unsigned char *)dd->port->log_buf; | |
689 | if (buf[259] & 0x1) { | |
690 | dev_info(&dd->pdev->dev, | |
691 | "Write protect bit is set.\n"); | |
8a857a88 | 692 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); |
f6587217 AT |
693 | fail_all_ncq_write = 1; |
694 | fail_reason = "write protect"; | |
695 | } | |
696 | if (buf[288] == 0xF7) { | |
697 | dev_info(&dd->pdev->dev, | |
698 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
8a857a88 | 699 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); |
f6587217 AT |
700 | fail_all_ncq_cmds = 1; |
701 | fail_reason = "thermal shutdown"; | |
702 | } | |
703 | if (buf[288] == 0xBF) { | |
26d58057 | 704 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); |
f6587217 | 705 | dev_info(&dd->pdev->dev, |
26d58057 | 706 | "Drive indicates rebuild has failed. Secure erase required.\n"); |
f6587217 AT |
707 | fail_all_ncq_cmds = 1; |
708 | fail_reason = "rebuild failed"; | |
709 | } | |
710 | } | |
711 | ||
88523a61 SB |
712 | /* clear the tag accumulator */ |
713 | memset(tagaccum, 0, SLOTBITS_IN_LONGS * sizeof(long)); | |
714 | ||
715 | /* Loop through all the groups */ | |
716 | for (group = 0; group < dd->slot_groups; group++) { | |
717 | for (bit = 0; bit < 32; bit++) { | |
718 | reissue = 1; | |
719 | tag = (group << 5) + bit; | |
ffc771b3 | 720 | cmd = mtip_cmd_from_tag(dd, tag); |
88523a61 | 721 | |
f6587217 | 722 | fis = (struct host_to_dev_fis *)cmd->command; |
88523a61 SB |
723 | |
724 | /* Should re-issue? */ | |
725 | if (tag == MTIP_TAG_INTERNAL || | |
726 | fis->command == ATA_CMD_SET_FEATURES) | |
727 | reissue = 0; | |
f6587217 AT |
728 | else { |
729 | if (fail_all_ncq_cmds || | |
730 | (fail_all_ncq_write && | |
731 | fis->command == ATA_CMD_FPDMA_WRITE)) { | |
732 | dev_warn(&dd->pdev->dev, | |
733 | " Fail: %s w/tag %d [%s].\n", | |
734 | fis->command == ATA_CMD_FPDMA_WRITE ? | |
735 | "write" : "read", | |
736 | tag, | |
737 | fail_reason != NULL ? | |
738 | fail_reason : "unknown"); | |
f6587217 AT |
739 | if (cmd->comp_func) { |
740 | cmd->comp_func(port, tag, | |
ffc771b3 | 741 | cmd, -ENODATA); |
f6587217 AT |
742 | } |
743 | continue; | |
744 | } | |
745 | } | |
88523a61 SB |
746 | |
747 | /* | |
748 | * First check if this command has | |
749 | * exceeded its retries. | |
750 | */ | |
f6587217 | 751 | if (reissue && (cmd->retries-- > 0)) { |
88523a61 SB |
752 | |
753 | set_bit(tag, tagaccum); | |
754 | ||
88523a61 SB |
755 | /* Re-issue the command. */ |
756 | mtip_issue_ncq_command(port, tag); | |
757 | ||
758 | continue; | |
759 | } | |
760 | ||
761 | /* Retire a command that will not be reissued */ | |
762 | dev_warn(&port->dd->pdev->dev, | |
763 | "retiring tag %d\n", tag); | |
88523a61 | 764 | |
f6587217 | 765 | if (cmd->comp_func) |
ffc771b3 | 766 | cmd->comp_func(port, tag, cmd, PORT_IRQ_TF_ERR); |
88523a61 SB |
767 | else |
768 | dev_warn(&port->dd->pdev->dev, | |
769 | "Bad completion for tag %d\n", | |
770 | tag); | |
771 | } | |
772 | } | |
95fea2f1 | 773 | print_tags(dd, "reissued (TFE)", tagaccum, cmd_cnt); |
88523a61 | 774 | |
d02e1f0a | 775 | handle_tfe_exit: |
60ec0eec | 776 | /* clear eh_active */ |
8a857a88 | 777 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); |
60ec0eec | 778 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
779 | } |
780 | ||
781 | /* | |
782 | * Handle a set device bits interrupt | |
783 | */ | |
16c906e5 AT |
784 | static inline void mtip_workq_sdbfx(struct mtip_port *port, int group, |
785 | u32 completed) | |
88523a61 | 786 | { |
16c906e5 AT |
787 | struct driver_data *dd = port->dd; |
788 | int tag, bit; | |
88523a61 SB |
789 | struct mtip_cmd *command; |
790 | ||
16c906e5 AT |
791 | if (!completed) { |
792 | WARN_ON_ONCE(!completed); | |
793 | return; | |
794 | } | |
795 | /* clear completed status register in the hardware.*/ | |
796 | writel(completed, port->completed[group]); | |
88523a61 | 797 | |
16c906e5 AT |
798 | /* Process completed commands. */ |
799 | for (bit = 0; (bit < 32) && completed; bit++) { | |
800 | if (completed & 0x01) { | |
801 | tag = (group << 5) | bit; | |
88523a61 | 802 | |
16c906e5 AT |
803 | /* skip internal command slot. */ |
804 | if (unlikely(tag == MTIP_TAG_INTERNAL)) | |
805 | continue; | |
88523a61 | 806 | |
ffc771b3 JA |
807 | command = mtip_cmd_from_tag(dd, tag); |
808 | if (likely(command->comp_func)) | |
809 | command->comp_func(port, tag, command, 0); | |
810 | else { | |
8f8b8995 AT |
811 | dev_dbg(&dd->pdev->dev, |
812 | "Null completion for tag %d", | |
16c906e5 | 813 | tag); |
88523a61 | 814 | |
16c906e5 AT |
815 | if (mtip_check_surprise_removal( |
816 | dd->pdev)) { | |
16c906e5 | 817 | return; |
88523a61 SB |
818 | } |
819 | } | |
820 | } | |
16c906e5 | 821 | completed >>= 1; |
88523a61 | 822 | } |
16c906e5 AT |
823 | |
824 | /* If last, re-enable interrupts */ | |
825 | if (atomic_dec_return(&dd->irq_workers_active) == 0) | |
826 | writel(0xffffffff, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
827 | } |
828 | ||
829 | /* | |
830 | * Process legacy pio and d2h interrupts | |
831 | */ | |
832 | static inline void mtip_process_legacy(struct driver_data *dd, u32 port_stat) | |
833 | { | |
834 | struct mtip_port *port = dd->port; | |
ffc771b3 | 835 | struct mtip_cmd *cmd = mtip_cmd_from_tag(dd, MTIP_TAG_INTERNAL); |
88523a61 | 836 | |
8a857a88 | 837 | if (test_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags) && |
60ec0eec | 838 | (cmd != NULL) && !(readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 SB |
839 | & (1 << MTIP_TAG_INTERNAL))) { |
840 | if (cmd->comp_func) { | |
ffc771b3 | 841 | cmd->comp_func(port, MTIP_TAG_INTERNAL, cmd, 0); |
88523a61 SB |
842 | return; |
843 | } | |
844 | } | |
845 | ||
88523a61 SB |
846 | return; |
847 | } | |
848 | ||
849 | /* | |
850 | * Demux and handle errors | |
851 | */ | |
852 | static inline void mtip_process_errors(struct driver_data *dd, u32 port_stat) | |
853 | { | |
88523a61 SB |
854 | |
855 | if (unlikely(port_stat & PORT_IRQ_CONNECT)) { | |
856 | dev_warn(&dd->pdev->dev, | |
857 | "Clearing PxSERR.DIAG.x\n"); | |
858 | writel((1 << 26), dd->port->mmio + PORT_SCR_ERR); | |
859 | } | |
860 | ||
861 | if (unlikely(port_stat & PORT_IRQ_PHYRDY)) { | |
862 | dev_warn(&dd->pdev->dev, | |
863 | "Clearing PxSERR.DIAG.n\n"); | |
864 | writel((1 << 16), dd->port->mmio + PORT_SCR_ERR); | |
865 | } | |
866 | ||
867 | if (unlikely(port_stat & ~PORT_IRQ_HANDLED)) { | |
868 | dev_warn(&dd->pdev->dev, | |
869 | "Port stat errors %x unhandled\n", | |
870 | (port_stat & ~PORT_IRQ_HANDLED)); | |
9b204fbf AT |
871 | if (mtip_check_surprise_removal(dd->pdev)) |
872 | return; | |
873 | } | |
874 | if (likely(port_stat & (PORT_IRQ_TF_ERR | PORT_IRQ_IF_ERR))) { | |
875 | set_bit(MTIP_PF_EH_ACTIVE_BIT, &dd->port->flags); | |
876 | wake_up_interruptible(&dd->port->svc_wait); | |
88523a61 SB |
877 | } |
878 | } | |
879 | ||
880 | static inline irqreturn_t mtip_handle_irq(struct driver_data *data) | |
881 | { | |
882 | struct driver_data *dd = (struct driver_data *) data; | |
883 | struct mtip_port *port = dd->port; | |
884 | u32 hba_stat, port_stat; | |
885 | int rv = IRQ_NONE; | |
16c906e5 AT |
886 | int do_irq_enable = 1, i, workers; |
887 | struct mtip_work *twork; | |
88523a61 SB |
888 | |
889 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
890 | if (hba_stat) { | |
891 | rv = IRQ_HANDLED; | |
892 | ||
893 | /* Acknowledge the interrupt status on the port.*/ | |
894 | port_stat = readl(port->mmio + PORT_IRQ_STAT); | |
2132a544 ATS |
895 | if (unlikely(port_stat == 0xFFFFFFFF)) { |
896 | mtip_check_surprise_removal(dd->pdev); | |
897 | return IRQ_HANDLED; | |
898 | } | |
88523a61 SB |
899 | writel(port_stat, port->mmio + PORT_IRQ_STAT); |
900 | ||
901 | /* Demux port status */ | |
16c906e5 AT |
902 | if (likely(port_stat & PORT_IRQ_SDB_FIS)) { |
903 | do_irq_enable = 0; | |
904 | WARN_ON_ONCE(atomic_read(&dd->irq_workers_active) != 0); | |
905 | ||
906 | /* Start at 1: group zero is always local? */ | |
907 | for (i = 0, workers = 0; i < MTIP_MAX_SLOT_GROUPS; | |
908 | i++) { | |
909 | twork = &dd->work[i]; | |
910 | twork->completed = readl(port->completed[i]); | |
911 | if (twork->completed) | |
912 | workers++; | |
913 | } | |
914 | ||
915 | atomic_set(&dd->irq_workers_active, workers); | |
916 | if (workers) { | |
917 | for (i = 1; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
918 | twork = &dd->work[i]; | |
919 | if (twork->completed) | |
920 | queue_work_on( | |
921 | twork->cpu_binding, | |
922 | dd->isr_workq, | |
923 | &twork->work); | |
924 | } | |
925 | ||
926 | if (likely(dd->work[0].completed)) | |
927 | mtip_workq_sdbfx(port, 0, | |
928 | dd->work[0].completed); | |
929 | ||
930 | } else { | |
931 | /* | |
932 | * Chip quirk: SDB interrupt but nothing | |
933 | * to complete | |
934 | */ | |
935 | do_irq_enable = 1; | |
936 | } | |
937 | } | |
88523a61 SB |
938 | |
939 | if (unlikely(port_stat & PORT_IRQ_ERR)) { | |
940 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
88523a61 SB |
941 | /* don't proceed further */ |
942 | return IRQ_HANDLED; | |
943 | } | |
8a857a88 | 944 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
945 | &dd->dd_flag)) |
946 | return rv; | |
88523a61 SB |
947 | |
948 | mtip_process_errors(dd, port_stat & PORT_IRQ_ERR); | |
949 | } | |
950 | ||
951 | if (unlikely(port_stat & PORT_IRQ_LEGACY)) | |
952 | mtip_process_legacy(dd, port_stat & PORT_IRQ_LEGACY); | |
953 | } | |
954 | ||
955 | /* acknowledge interrupt */ | |
16c906e5 AT |
956 | if (unlikely(do_irq_enable)) |
957 | writel(hba_stat, dd->mmio + HOST_IRQ_STAT); | |
88523a61 SB |
958 | |
959 | return rv; | |
960 | } | |
961 | ||
88523a61 SB |
962 | /* |
963 | * HBA interrupt subroutine. | |
964 | * | |
965 | * @irq IRQ number. | |
966 | * @instance Pointer to the driver data structure. | |
967 | * | |
968 | * return value | |
969 | * IRQ_HANDLED A HBA interrupt was pending and handled. | |
970 | * IRQ_NONE This interrupt was not for the HBA. | |
971 | */ | |
972 | static irqreturn_t mtip_irq_handler(int irq, void *instance) | |
973 | { | |
974 | struct driver_data *dd = instance; | |
16c906e5 AT |
975 | |
976 | return mtip_handle_irq(dd); | |
88523a61 SB |
977 | } |
978 | ||
979 | static void mtip_issue_non_ncq_command(struct mtip_port *port, int tag) | |
980 | { | |
88523a61 SB |
981 | writel(1 << MTIP_TAG_BIT(tag), |
982 | port->cmd_issue[MTIP_TAG_INDEX(tag)]); | |
983 | } | |
984 | ||
c74b0f58 AT |
985 | static bool mtip_pause_ncq(struct mtip_port *port, |
986 | struct host_to_dev_fis *fis) | |
987 | { | |
988 | struct host_to_dev_fis *reply; | |
989 | unsigned long task_file_data; | |
990 | ||
991 | reply = port->rxfis + RX_FIS_D2H_REG; | |
992 | task_file_data = readl(port->mmio+PORT_TFDATA); | |
993 | ||
12a166c9 | 994 | if ((task_file_data & 1)) |
c74b0f58 AT |
995 | return false; |
996 | ||
997 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) { | |
c74b0f58 AT |
998 | port->ic_pause_timer = jiffies; |
999 | return true; | |
1000 | } else if ((fis->command == ATA_CMD_DOWNLOAD_MICRO) && | |
1001 | (fis->features == 0x03)) { | |
1002 | set_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); | |
1003 | port->ic_pause_timer = jiffies; | |
1004 | return true; | |
1005 | } else if ((fis->command == ATA_CMD_SEC_ERASE_UNIT) || | |
1006 | ((fis->command == 0xFC) && | |
1007 | (fis->features == 0x27 || fis->features == 0x72 || | |
1008 | fis->features == 0x62 || fis->features == 0x26))) { | |
ee04bed6 | 1009 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); |
c74b0f58 AT |
1010 | /* Com reset after secure erase or lowlevel format */ |
1011 | mtip_restart_port(port); | |
686d8e0b | 1012 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1013 | return false; |
1014 | } | |
1015 | ||
1016 | return false; | |
1017 | } | |
1018 | ||
88523a61 SB |
1019 | /* |
1020 | * Wait for port to quiesce | |
1021 | * | |
1022 | * @port Pointer to port data structure | |
1023 | * @timeout Max duration to wait (ms) | |
1024 | * | |
1025 | * return value | |
1026 | * 0 Success | |
1027 | * -EBUSY Commands still active | |
1028 | */ | |
1029 | static int mtip_quiesce_io(struct mtip_port *port, unsigned long timeout) | |
1030 | { | |
1031 | unsigned long to; | |
3e54a3d1 DC |
1032 | unsigned int n; |
1033 | unsigned int active = 1; | |
88523a61 | 1034 | |
9acf03cf JA |
1035 | blk_mq_stop_hw_queues(port->dd->queue); |
1036 | ||
88523a61 SB |
1037 | to = jiffies + msecs_to_jiffies(timeout); |
1038 | do { | |
8a857a88 AT |
1039 | if (test_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags) && |
1040 | test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { | |
60ec0eec AT |
1041 | msleep(20); |
1042 | continue; /* svc thd is actively issuing commands */ | |
1043 | } | |
9b204fbf AT |
1044 | |
1045 | msleep(100); | |
1046 | if (mtip_check_surprise_removal(port->dd->pdev)) | |
1047 | goto err_fault; | |
8a857a88 | 1048 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
9acf03cf | 1049 | goto err_fault; |
9b204fbf | 1050 | |
88523a61 SB |
1051 | /* |
1052 | * Ignore s_active bit 0 of array element 0. | |
1053 | * This bit will always be set | |
1054 | */ | |
60ec0eec | 1055 | active = readl(port->s_active[0]) & 0xFFFFFFFE; |
88523a61 SB |
1056 | for (n = 1; n < port->dd->slot_groups; n++) |
1057 | active |= readl(port->s_active[n]); | |
1058 | ||
1059 | if (!active) | |
1060 | break; | |
88523a61 SB |
1061 | } while (time_before(jiffies, to)); |
1062 | ||
9acf03cf | 1063 | blk_mq_start_stopped_hw_queues(port->dd->queue, true); |
88523a61 | 1064 | return active ? -EBUSY : 0; |
9acf03cf JA |
1065 | err_fault: |
1066 | blk_mq_start_stopped_hw_queues(port->dd->queue, true); | |
1067 | return -EFAULT; | |
88523a61 SB |
1068 | } |
1069 | ||
1070 | /* | |
1071 | * Execute an internal command and wait for the completion. | |
1072 | * | |
1073 | * @port Pointer to the port data structure. | |
1074 | * @fis Pointer to the FIS that describes the command. | |
60ec0eec | 1075 | * @fis_len Length in WORDS of the FIS. |
88523a61 | 1076 | * @buffer DMA accessible for command data. |
60ec0eec | 1077 | * @buf_len Length, in bytes, of the data buffer. |
88523a61 SB |
1078 | * @opts Command header options, excluding the FIS length |
1079 | * and the number of PRD entries. | |
1080 | * @timeout Time in ms to wait for the command to complete. | |
1081 | * | |
1082 | * return value | |
1083 | * 0 Command completed successfully. | |
1084 | * -EFAULT The buffer address is not correctly aligned. | |
1085 | * -EBUSY Internal command or other IO in progress. | |
1086 | * -EAGAIN Time out waiting for command to complete. | |
1087 | */ | |
1088 | static int mtip_exec_internal_command(struct mtip_port *port, | |
8182b495 | 1089 | struct host_to_dev_fis *fis, |
60ec0eec | 1090 | int fis_len, |
88523a61 | 1091 | dma_addr_t buffer, |
60ec0eec | 1092 | int buf_len, |
88523a61 SB |
1093 | u32 opts, |
1094 | gfp_t atomic, | |
1095 | unsigned long timeout) | |
1096 | { | |
1097 | struct mtip_cmd_sg *command_sg; | |
1098 | DECLARE_COMPLETION_ONSTACK(wait); | |
ffc771b3 | 1099 | struct mtip_cmd *int_cmd; |
d0d096b1 | 1100 | struct driver_data *dd = port->dd; |
ffc771b3 | 1101 | int rv = 0; |
88523a61 SB |
1102 | |
1103 | /* Make sure the buffer is 8 byte aligned. This is asic specific. */ | |
1104 | if (buffer & 0x00000007) { | |
d0d096b1 | 1105 | dev_err(&dd->pdev->dev, "SG buffer is not 8 byte aligned\n"); |
88523a61 SB |
1106 | return -EFAULT; |
1107 | } | |
1108 | ||
ffc771b3 JA |
1109 | int_cmd = mtip_get_int_command(dd); |
1110 | ||
8a857a88 | 1111 | set_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 | 1112 | |
686d8e0b ATS |
1113 | if (fis->command == ATA_CMD_SEC_ERASE_PREP) |
1114 | set_bit(MTIP_PF_SE_ACTIVE_BIT, &port->flags); | |
1115 | ||
d0d096b1 | 1116 | clear_bit(MTIP_PF_DM_ACTIVE_BIT, &port->flags); |
88523a61 SB |
1117 | |
1118 | if (atomic == GFP_KERNEL) { | |
8182b495 AT |
1119 | if (fis->command != ATA_CMD_STANDBYNOW1) { |
1120 | /* wait for io to complete if non atomic */ | |
9b204fbf AT |
1121 | if (mtip_quiesce_io(port, |
1122 | MTIP_QUIESCE_IO_TIMEOUT_MS) < 0) { | |
d0d096b1 | 1123 | dev_warn(&dd->pdev->dev, |
8182b495 | 1124 | "Failed to quiesce IO\n"); |
ffc771b3 | 1125 | mtip_put_int_command(dd, int_cmd); |
8a857a88 | 1126 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
8182b495 AT |
1127 | wake_up_interruptible(&port->svc_wait); |
1128 | return -EBUSY; | |
1129 | } | |
88523a61 SB |
1130 | } |
1131 | ||
1132 | /* Set the completion function and data for the command. */ | |
1133 | int_cmd->comp_data = &wait; | |
1134 | int_cmd->comp_func = mtip_completion; | |
1135 | ||
1136 | } else { | |
1137 | /* Clear completion - we're going to poll */ | |
1138 | int_cmd->comp_data = NULL; | |
8182b495 | 1139 | int_cmd->comp_func = mtip_null_completion; |
88523a61 SB |
1140 | } |
1141 | ||
1142 | /* Copy the command to the command table */ | |
60ec0eec | 1143 | memcpy(int_cmd->command, fis, fis_len*4); |
88523a61 SB |
1144 | |
1145 | /* Populate the SG list */ | |
1146 | int_cmd->command_header->opts = | |
60ec0eec AT |
1147 | __force_bit2int cpu_to_le32(opts | fis_len); |
1148 | if (buf_len) { | |
88523a61 SB |
1149 | command_sg = int_cmd->command + AHCI_CMD_TBL_HDR_SZ; |
1150 | ||
60ec0eec AT |
1151 | command_sg->info = |
1152 | __force_bit2int cpu_to_le32((buf_len-1) & 0x3FFFFF); | |
1153 | command_sg->dba = | |
1154 | __force_bit2int cpu_to_le32(buffer & 0xFFFFFFFF); | |
1155 | command_sg->dba_upper = | |
1156 | __force_bit2int cpu_to_le32((buffer >> 16) >> 16); | |
88523a61 | 1157 | |
60ec0eec AT |
1158 | int_cmd->command_header->opts |= |
1159 | __force_bit2int cpu_to_le32((1 << 16)); | |
88523a61 SB |
1160 | } |
1161 | ||
1162 | /* Populate the command header */ | |
1163 | int_cmd->command_header->byte_count = 0; | |
1164 | ||
1165 | /* Issue the command to the hardware */ | |
1166 | mtip_issue_non_ncq_command(port, MTIP_TAG_INTERNAL); | |
1167 | ||
88523a61 SB |
1168 | if (atomic == GFP_KERNEL) { |
1169 | /* Wait for the command to complete or timeout. */ | |
9b204fbf | 1170 | if ((rv = wait_for_completion_interruptible_timeout( |
88523a61 | 1171 | &wait, |
9b204fbf | 1172 | msecs_to_jiffies(timeout))) <= 0) { |
d0d096b1 AT |
1173 | if (rv == -ERESTARTSYS) { /* interrupted */ |
1174 | dev_err(&dd->pdev->dev, | |
1175 | "Internal command [%02X] was interrupted after %lu ms\n", | |
1176 | fis->command, timeout); | |
1177 | rv = -EINTR; | |
1178 | goto exec_ic_exit; | |
1179 | } else if (rv == 0) /* timeout */ | |
1180 | dev_err(&dd->pdev->dev, | |
1181 | "Internal command did not complete [%02X] within timeout of %lu ms\n", | |
1182 | fis->command, timeout); | |
1183 | else | |
1184 | dev_err(&dd->pdev->dev, | |
1185 | "Internal command [%02X] wait returned code [%d] after %lu ms - unhandled\n", | |
1186 | fis->command, rv, timeout); | |
1187 | ||
1188 | if (mtip_check_surprise_removal(dd->pdev) || | |
8a857a88 | 1189 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
d0d096b1 AT |
1190 | &dd->dd_flag)) { |
1191 | dev_err(&dd->pdev->dev, | |
1192 | "Internal command [%02X] wait returned due to SR\n", | |
1193 | fis->command); | |
45038367 AT |
1194 | rv = -ENXIO; |
1195 | goto exec_ic_exit; | |
1196 | } | |
d0d096b1 | 1197 | mtip_device_reset(dd); /* recover from timeout issue */ |
88523a61 | 1198 | rv = -EAGAIN; |
d0d096b1 | 1199 | goto exec_ic_exit; |
88523a61 | 1200 | } |
88523a61 | 1201 | } else { |
d0d096b1 AT |
1202 | u32 hba_stat, port_stat; |
1203 | ||
88523a61 SB |
1204 | /* Spin for <timeout> checking if command still outstanding */ |
1205 | timeout = jiffies + msecs_to_jiffies(timeout); | |
8182b495 AT |
1206 | while ((readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
1207 | & (1 << MTIP_TAG_INTERNAL)) | |
1208 | && time_before(jiffies, timeout)) { | |
d0d096b1 | 1209 | if (mtip_check_surprise_removal(dd->pdev)) { |
8182b495 AT |
1210 | rv = -ENXIO; |
1211 | goto exec_ic_exit; | |
1212 | } | |
1213 | if ((fis->command != ATA_CMD_STANDBYNOW1) && | |
8a857a88 | 1214 | test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
d0d096b1 | 1215 | &dd->dd_flag)) { |
45038367 AT |
1216 | rv = -ENXIO; |
1217 | goto exec_ic_exit; | |
1218 | } | |
d0d096b1 AT |
1219 | port_stat = readl(port->mmio + PORT_IRQ_STAT); |
1220 | if (!port_stat) | |
1221 | continue; | |
1222 | ||
1223 | if (port_stat & PORT_IRQ_ERR) { | |
1224 | dev_err(&dd->pdev->dev, | |
1225 | "Internal command [%02X] failed\n", | |
1226 | fis->command); | |
1227 | mtip_device_reset(dd); | |
1228 | rv = -EIO; | |
1229 | goto exec_ic_exit; | |
1230 | } else { | |
1231 | writel(port_stat, port->mmio + PORT_IRQ_STAT); | |
1232 | hba_stat = readl(dd->mmio + HOST_IRQ_STAT); | |
1233 | if (hba_stat) | |
1234 | writel(hba_stat, | |
1235 | dd->mmio + HOST_IRQ_STAT); | |
d02e1f0a | 1236 | } |
d0d096b1 | 1237 | break; |
45038367 | 1238 | } |
d02e1f0a | 1239 | } |
88523a61 | 1240 | |
d02e1f0a | 1241 | if (readl(port->cmd_issue[MTIP_TAG_INTERNAL]) |
88523a61 | 1242 | & (1 << MTIP_TAG_INTERNAL)) { |
d02e1f0a | 1243 | rv = -ENXIO; |
d0d096b1 AT |
1244 | if (!test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
1245 | mtip_device_reset(dd); | |
88523a61 SB |
1246 | rv = -EAGAIN; |
1247 | } | |
1248 | } | |
45038367 | 1249 | exec_ic_exit: |
88523a61 | 1250 | /* Clear the allocated and active bits for the internal command. */ |
ffc771b3 | 1251 | mtip_put_int_command(dd, int_cmd); |
686d8e0b | 1252 | clear_bit(MTIP_PF_IC_ACTIVE_BIT, &port->flags); |
c74b0f58 AT |
1253 | if (rv >= 0 && mtip_pause_ncq(port, fis)) { |
1254 | /* NCQ paused */ | |
1255 | return rv; | |
1256 | } | |
60ec0eec | 1257 | wake_up_interruptible(&port->svc_wait); |
88523a61 SB |
1258 | |
1259 | return rv; | |
1260 | } | |
1261 | ||
1262 | /* | |
1263 | * Byte-swap ATA ID strings. | |
1264 | * | |
1265 | * ATA identify data contains strings in byte-swapped 16-bit words. | |
1266 | * They must be swapped (on all architectures) to be usable as C strings. | |
1267 | * This function swaps bytes in-place. | |
1268 | * | |
1269 | * @buf The buffer location of the string | |
1270 | * @len The number of bytes to swap | |
1271 | * | |
1272 | * return value | |
1273 | * None | |
1274 | */ | |
1275 | static inline void ata_swap_string(u16 *buf, unsigned int len) | |
1276 | { | |
1277 | int i; | |
1278 | for (i = 0; i < (len/2); i++) | |
1279 | be16_to_cpus(&buf[i]); | |
1280 | } | |
1281 | ||
670a6414 AT |
1282 | static void mtip_set_timeout(struct driver_data *dd, |
1283 | struct host_to_dev_fis *fis, | |
1284 | unsigned int *timeout, u8 erasemode) | |
1285 | { | |
1286 | switch (fis->command) { | |
1287 | case ATA_CMD_DOWNLOAD_MICRO: | |
1288 | *timeout = 120000; /* 2 minutes */ | |
1289 | break; | |
1290 | case ATA_CMD_SEC_ERASE_UNIT: | |
1291 | case 0xFC: | |
1292 | if (erasemode) | |
1293 | *timeout = ((*(dd->port->identify + 90) * 2) * 60000); | |
1294 | else | |
1295 | *timeout = ((*(dd->port->identify + 89) * 2) * 60000); | |
1296 | break; | |
1297 | case ATA_CMD_STANDBYNOW1: | |
1298 | *timeout = 120000; /* 2 minutes */ | |
1299 | break; | |
1300 | case 0xF7: | |
1301 | case 0xFA: | |
1302 | *timeout = 60000; /* 60 seconds */ | |
1303 | break; | |
1304 | case ATA_CMD_SMART: | |
1305 | *timeout = 15000; /* 15 seconds */ | |
1306 | break; | |
1307 | default: | |
9b204fbf | 1308 | *timeout = MTIP_IOCTL_CMD_TIMEOUT_MS; |
670a6414 AT |
1309 | break; |
1310 | } | |
1311 | } | |
1312 | ||
88523a61 SB |
1313 | /* |
1314 | * Request the device identity information. | |
1315 | * | |
1316 | * If a user space buffer is not specified, i.e. is NULL, the | |
1317 | * identify information is still read from the drive and placed | |
1318 | * into the identify data buffer (@e port->identify) in the | |
1319 | * port data structure. | |
1320 | * When the identify buffer contains valid identify information @e | |
1321 | * port->identify_valid is non-zero. | |
1322 | * | |
1323 | * @port Pointer to the port structure. | |
1324 | * @user_buffer A user space buffer where the identify data should be | |
1325 | * copied. | |
1326 | * | |
1327 | * return value | |
1328 | * 0 Command completed successfully. | |
1329 | * -EFAULT An error occurred while coping data to the user buffer. | |
1330 | * -1 Command failed. | |
1331 | */ | |
1332 | static int mtip_get_identify(struct mtip_port *port, void __user *user_buffer) | |
1333 | { | |
1334 | int rv = 0; | |
1335 | struct host_to_dev_fis fis; | |
1336 | ||
8a857a88 | 1337 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &port->dd->dd_flag)) |
45038367 AT |
1338 | return -EFAULT; |
1339 | ||
88523a61 SB |
1340 | /* Build the FIS. */ |
1341 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1342 | fis.type = 0x27; | |
1343 | fis.opts = 1 << 7; | |
1344 | fis.command = ATA_CMD_ID_ATA; | |
1345 | ||
1346 | /* Set the identify information as invalid. */ | |
1347 | port->identify_valid = 0; | |
1348 | ||
1349 | /* Clear the identify information. */ | |
1350 | memset(port->identify, 0, sizeof(u16) * ATA_ID_WORDS); | |
1351 | ||
1352 | /* Execute the command. */ | |
1353 | if (mtip_exec_internal_command(port, | |
1354 | &fis, | |
1355 | 5, | |
1356 | port->identify_dma, | |
1357 | sizeof(u16) * ATA_ID_WORDS, | |
1358 | 0, | |
1359 | GFP_KERNEL, | |
9b204fbf | 1360 | MTIP_INT_CMD_TIMEOUT_MS) |
88523a61 SB |
1361 | < 0) { |
1362 | rv = -1; | |
1363 | goto out; | |
1364 | } | |
1365 | ||
1366 | /* | |
1367 | * Perform any necessary byte-swapping. Yes, the kernel does in fact | |
1368 | * perform field-sensitive swapping on the string fields. | |
1369 | * See the kernel use of ata_id_string() for proof of this. | |
1370 | */ | |
1371 | #ifdef __LITTLE_ENDIAN | |
1372 | ata_swap_string(port->identify + 27, 40); /* model string*/ | |
1373 | ata_swap_string(port->identify + 23, 8); /* firmware string*/ | |
1374 | ata_swap_string(port->identify + 10, 20); /* serial# string*/ | |
1375 | #else | |
1376 | { | |
1377 | int i; | |
1378 | for (i = 0; i < ATA_ID_WORDS; i++) | |
1379 | port->identify[i] = le16_to_cpu(port->identify[i]); | |
1380 | } | |
1381 | #endif | |
1382 | ||
26d58057 SB |
1383 | /* Check security locked state */ |
1384 | if (port->identify[128] & 0x4) | |
1385 | set_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1386 | else | |
1387 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &port->dd->dd_flag); | |
1388 | ||
68466cbf | 1389 | #ifdef MTIP_TRIM /* Disabling TRIM support temporarily */ |
15283469 AT |
1390 | /* Demux ID.DRAT & ID.RZAT to determine trim support */ |
1391 | if (port->identify[69] & (1 << 14) && port->identify[69] & (1 << 5)) | |
1392 | port->dd->trim_supp = true; | |
1393 | else | |
68466cbf | 1394 | #endif |
15283469 AT |
1395 | port->dd->trim_supp = false; |
1396 | ||
88523a61 SB |
1397 | /* Set the identify buffer as valid. */ |
1398 | port->identify_valid = 1; | |
1399 | ||
1400 | if (user_buffer) { | |
1401 | if (copy_to_user( | |
1402 | user_buffer, | |
1403 | port->identify, | |
1404 | ATA_ID_WORDS * sizeof(u16))) { | |
1405 | rv = -EFAULT; | |
1406 | goto out; | |
1407 | } | |
1408 | } | |
1409 | ||
1410 | out: | |
88523a61 SB |
1411 | return rv; |
1412 | } | |
1413 | ||
1414 | /* | |
1415 | * Issue a standby immediate command to the device. | |
1416 | * | |
1417 | * @port Pointer to the port structure. | |
1418 | * | |
1419 | * return value | |
1420 | * 0 Command was executed successfully. | |
1421 | * -1 An error occurred while executing the command. | |
1422 | */ | |
1423 | static int mtip_standby_immediate(struct mtip_port *port) | |
1424 | { | |
1425 | int rv; | |
1426 | struct host_to_dev_fis fis; | |
f6587217 | 1427 | unsigned long start; |
670a6414 | 1428 | unsigned int timeout; |
88523a61 | 1429 | |
88523a61 SB |
1430 | /* Build the FIS. */ |
1431 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1432 | fis.type = 0x27; | |
1433 | fis.opts = 1 << 7; | |
1434 | fis.command = ATA_CMD_STANDBYNOW1; | |
1435 | ||
670a6414 AT |
1436 | mtip_set_timeout(port->dd, &fis, &timeout, 0); |
1437 | ||
f6587217 | 1438 | start = jiffies; |
88523a61 SB |
1439 | rv = mtip_exec_internal_command(port, |
1440 | &fis, | |
1441 | 5, | |
1442 | 0, | |
1443 | 0, | |
1444 | 0, | |
f6587217 | 1445 | GFP_ATOMIC, |
670a6414 | 1446 | timeout); |
f6587217 AT |
1447 | dbg_printk(MTIP_DRV_NAME "Time taken to complete standby cmd: %d ms\n", |
1448 | jiffies_to_msecs(jiffies - start)); | |
1449 | if (rv) | |
1450 | dev_warn(&port->dd->pdev->dev, | |
1451 | "STANDBY IMMEDIATE command failed.\n"); | |
1452 | ||
1453 | return rv; | |
1454 | } | |
1455 | ||
1456 | /* | |
1457 | * Issue a READ LOG EXT command to the device. | |
1458 | * | |
1459 | * @port pointer to the port structure. | |
1460 | * @page page number to fetch | |
1461 | * @buffer pointer to buffer | |
1462 | * @buffer_dma dma address corresponding to @buffer | |
1463 | * @sectors page length to fetch, in sectors | |
1464 | * | |
1465 | * return value | |
1466 | * @rv return value from mtip_exec_internal_command() | |
1467 | */ | |
1468 | static int mtip_read_log_page(struct mtip_port *port, u8 page, u16 *buffer, | |
1469 | dma_addr_t buffer_dma, unsigned int sectors) | |
1470 | { | |
1471 | struct host_to_dev_fis fis; | |
1472 | ||
1473 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1474 | fis.type = 0x27; | |
1475 | fis.opts = 1 << 7; | |
1476 | fis.command = ATA_CMD_READ_LOG_EXT; | |
1477 | fis.sect_count = sectors & 0xFF; | |
1478 | fis.sect_cnt_ex = (sectors >> 8) & 0xFF; | |
1479 | fis.lba_low = page; | |
1480 | fis.lba_mid = 0; | |
1481 | fis.device = ATA_DEVICE_OBS; | |
1482 | ||
1483 | memset(buffer, 0, sectors * ATA_SECT_SIZE); | |
1484 | ||
1485 | return mtip_exec_internal_command(port, | |
1486 | &fis, | |
1487 | 5, | |
1488 | buffer_dma, | |
1489 | sectors * ATA_SECT_SIZE, | |
1490 | 0, | |
1491 | GFP_ATOMIC, | |
9b204fbf | 1492 | MTIP_INT_CMD_TIMEOUT_MS); |
f6587217 AT |
1493 | } |
1494 | ||
1495 | /* | |
1496 | * Issue a SMART READ DATA command to the device. | |
1497 | * | |
1498 | * @port pointer to the port structure. | |
1499 | * @buffer pointer to buffer | |
1500 | * @buffer_dma dma address corresponding to @buffer | |
1501 | * | |
1502 | * return value | |
1503 | * @rv return value from mtip_exec_internal_command() | |
1504 | */ | |
1505 | static int mtip_get_smart_data(struct mtip_port *port, u8 *buffer, | |
1506 | dma_addr_t buffer_dma) | |
1507 | { | |
1508 | struct host_to_dev_fis fis; | |
1509 | ||
1510 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1511 | fis.type = 0x27; | |
1512 | fis.opts = 1 << 7; | |
1513 | fis.command = ATA_CMD_SMART; | |
1514 | fis.features = 0xD0; | |
1515 | fis.sect_count = 1; | |
1516 | fis.lba_mid = 0x4F; | |
1517 | fis.lba_hi = 0xC2; | |
1518 | fis.device = ATA_DEVICE_OBS; | |
1519 | ||
1520 | return mtip_exec_internal_command(port, | |
1521 | &fis, | |
1522 | 5, | |
1523 | buffer_dma, | |
1524 | ATA_SECT_SIZE, | |
1525 | 0, | |
1526 | GFP_ATOMIC, | |
88523a61 | 1527 | 15000); |
f6587217 AT |
1528 | } |
1529 | ||
1530 | /* | |
1531 | * Get the value of a smart attribute | |
1532 | * | |
1533 | * @port pointer to the port structure | |
1534 | * @id attribute number | |
1535 | * @attrib pointer to return attrib information corresponding to @id | |
1536 | * | |
1537 | * return value | |
1538 | * -EINVAL NULL buffer passed or unsupported attribute @id. | |
1539 | * -EPERM Identify data not valid, SMART not supported or not enabled | |
1540 | */ | |
1541 | static int mtip_get_smart_attr(struct mtip_port *port, unsigned int id, | |
1542 | struct smart_attr *attrib) | |
1543 | { | |
1544 | int rv, i; | |
1545 | struct smart_attr *pattr; | |
1546 | ||
1547 | if (!attrib) | |
1548 | return -EINVAL; | |
1549 | ||
1550 | if (!port->identify_valid) { | |
1551 | dev_warn(&port->dd->pdev->dev, "IDENTIFY DATA not valid\n"); | |
1552 | return -EPERM; | |
1553 | } | |
1554 | if (!(port->identify[82] & 0x1)) { | |
1555 | dev_warn(&port->dd->pdev->dev, "SMART not supported\n"); | |
1556 | return -EPERM; | |
1557 | } | |
1558 | if (!(port->identify[85] & 0x1)) { | |
1559 | dev_warn(&port->dd->pdev->dev, "SMART not enabled\n"); | |
1560 | return -EPERM; | |
1561 | } | |
1562 | ||
1563 | memset(port->smart_buf, 0, ATA_SECT_SIZE); | |
1564 | rv = mtip_get_smart_data(port, port->smart_buf, port->smart_buf_dma); | |
1565 | if (rv) { | |
1566 | dev_warn(&port->dd->pdev->dev, "Failed to ge SMART data\n"); | |
1567 | return rv; | |
1568 | } | |
1569 | ||
1570 | pattr = (struct smart_attr *)(port->smart_buf + 2); | |
1571 | for (i = 0; i < 29; i++, pattr++) | |
1572 | if (pattr->attr_id == id) { | |
1573 | memcpy(attrib, pattr, sizeof(struct smart_attr)); | |
1574 | break; | |
1575 | } | |
1576 | ||
1577 | if (i == 29) { | |
1578 | dev_warn(&port->dd->pdev->dev, | |
1579 | "Query for invalid SMART attribute ID\n"); | |
1580 | rv = -EINVAL; | |
1581 | } | |
88523a61 | 1582 | |
88523a61 SB |
1583 | return rv; |
1584 | } | |
1585 | ||
15283469 AT |
1586 | /* |
1587 | * Trim unused sectors | |
1588 | * | |
1589 | * @dd pointer to driver_data structure | |
1590 | * @lba starting lba | |
1591 | * @len # of 512b sectors to trim | |
1592 | * | |
1593 | * return value | |
1594 | * -ENOMEM Out of dma memory | |
1595 | * -EINVAL Invalid parameters passed in, trim not supported | |
1596 | * -EIO Error submitting trim request to hw | |
1597 | */ | |
d0d096b1 AT |
1598 | static int mtip_send_trim(struct driver_data *dd, unsigned int lba, |
1599 | unsigned int len) | |
15283469 AT |
1600 | { |
1601 | int i, rv = 0; | |
1602 | u64 tlba, tlen, sect_left; | |
1603 | struct mtip_trim_entry *buf; | |
1604 | dma_addr_t dma_addr; | |
1605 | struct host_to_dev_fis fis; | |
1606 | ||
1607 | if (!len || dd->trim_supp == false) | |
1608 | return -EINVAL; | |
1609 | ||
1610 | /* Trim request too big */ | |
1611 | WARN_ON(len > (MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES)); | |
1612 | ||
1613 | /* Trim request not aligned on 4k boundary */ | |
1614 | WARN_ON(len % 8 != 0); | |
1615 | ||
1616 | /* Warn if vu_trim structure is too big */ | |
1617 | WARN_ON(sizeof(struct mtip_trim) > ATA_SECT_SIZE); | |
1618 | ||
1619 | /* Allocate a DMA buffer for the trim structure */ | |
1620 | buf = dmam_alloc_coherent(&dd->pdev->dev, ATA_SECT_SIZE, &dma_addr, | |
1621 | GFP_KERNEL); | |
1622 | if (!buf) | |
1623 | return -ENOMEM; | |
1624 | memset(buf, 0, ATA_SECT_SIZE); | |
1625 | ||
1626 | for (i = 0, sect_left = len, tlba = lba; | |
1627 | i < MTIP_MAX_TRIM_ENTRIES && sect_left; | |
1628 | i++) { | |
1629 | tlen = (sect_left >= MTIP_MAX_TRIM_ENTRY_LEN ? | |
1630 | MTIP_MAX_TRIM_ENTRY_LEN : | |
1631 | sect_left); | |
1632 | buf[i].lba = __force_bit2int cpu_to_le32(tlba); | |
1633 | buf[i].range = __force_bit2int cpu_to_le16(tlen); | |
1634 | tlba += tlen; | |
1635 | sect_left -= tlen; | |
1636 | } | |
1637 | WARN_ON(sect_left != 0); | |
1638 | ||
1639 | /* Build the fis */ | |
1640 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1641 | fis.type = 0x27; | |
1642 | fis.opts = 1 << 7; | |
1643 | fis.command = 0xfb; | |
1644 | fis.features = 0x60; | |
1645 | fis.sect_count = 1; | |
1646 | fis.device = ATA_DEVICE_OBS; | |
1647 | ||
1648 | if (mtip_exec_internal_command(dd->port, | |
1649 | &fis, | |
1650 | 5, | |
1651 | dma_addr, | |
1652 | ATA_SECT_SIZE, | |
1653 | 0, | |
1654 | GFP_KERNEL, | |
1655 | MTIP_TRIM_TIMEOUT_MS) < 0) | |
1656 | rv = -EIO; | |
1657 | ||
1658 | dmam_free_coherent(&dd->pdev->dev, ATA_SECT_SIZE, buf, dma_addr); | |
1659 | return rv; | |
1660 | } | |
1661 | ||
88523a61 SB |
1662 | /* |
1663 | * Get the drive capacity. | |
1664 | * | |
1665 | * @dd Pointer to the device data structure. | |
1666 | * @sectors Pointer to the variable that will receive the sector count. | |
1667 | * | |
1668 | * return value | |
1669 | * 1 Capacity was returned successfully. | |
1670 | * 0 The identify information is invalid. | |
1671 | */ | |
6316668f | 1672 | static bool mtip_hw_get_capacity(struct driver_data *dd, sector_t *sectors) |
88523a61 SB |
1673 | { |
1674 | struct mtip_port *port = dd->port; | |
1675 | u64 total, raw0, raw1, raw2, raw3; | |
1676 | raw0 = port->identify[100]; | |
1677 | raw1 = port->identify[101]; | |
1678 | raw2 = port->identify[102]; | |
1679 | raw3 = port->identify[103]; | |
1680 | total = raw0 | raw1<<16 | raw2<<32 | raw3<<48; | |
1681 | *sectors = total; | |
1682 | return (bool) !!port->identify_valid; | |
1683 | } | |
1684 | ||
88523a61 SB |
1685 | /* |
1686 | * Display the identify command data. | |
1687 | * | |
1688 | * @port Pointer to the port data structure. | |
1689 | * | |
1690 | * return value | |
1691 | * None | |
1692 | */ | |
1693 | static void mtip_dump_identify(struct mtip_port *port) | |
1694 | { | |
1695 | sector_t sectors; | |
1696 | unsigned short revid; | |
1697 | char cbuf[42]; | |
1698 | ||
1699 | if (!port->identify_valid) | |
1700 | return; | |
1701 | ||
1702 | strlcpy(cbuf, (char *)(port->identify+10), 21); | |
1703 | dev_info(&port->dd->pdev->dev, | |
1704 | "Serial No.: %s\n", cbuf); | |
1705 | ||
1706 | strlcpy(cbuf, (char *)(port->identify+23), 9); | |
1707 | dev_info(&port->dd->pdev->dev, | |
1708 | "Firmware Ver.: %s\n", cbuf); | |
1709 | ||
1710 | strlcpy(cbuf, (char *)(port->identify+27), 41); | |
1711 | dev_info(&port->dd->pdev->dev, "Model: %s\n", cbuf); | |
1712 | ||
26d58057 SB |
1713 | dev_info(&port->dd->pdev->dev, "Security: %04x %s\n", |
1714 | port->identify[128], | |
1715 | port->identify[128] & 0x4 ? "(LOCKED)" : ""); | |
1716 | ||
88523a61 SB |
1717 | if (mtip_hw_get_capacity(port->dd, §ors)) |
1718 | dev_info(&port->dd->pdev->dev, | |
1719 | "Capacity: %llu sectors (%llu MB)\n", | |
1720 | (u64)sectors, | |
1721 | ((u64)sectors) * ATA_SECT_SIZE >> 20); | |
1722 | ||
1723 | pci_read_config_word(port->dd->pdev, PCI_REVISION_ID, &revid); | |
60ec0eec | 1724 | switch (revid & 0xFF) { |
88523a61 SB |
1725 | case 0x1: |
1726 | strlcpy(cbuf, "A0", 3); | |
1727 | break; | |
1728 | case 0x3: | |
1729 | strlcpy(cbuf, "A2", 3); | |
1730 | break; | |
1731 | default: | |
1732 | strlcpy(cbuf, "?", 2); | |
1733 | break; | |
1734 | } | |
1735 | dev_info(&port->dd->pdev->dev, | |
1736 | "Card Type: %s\n", cbuf); | |
1737 | } | |
1738 | ||
1739 | /* | |
1740 | * Map the commands scatter list into the command table. | |
1741 | * | |
1742 | * @command Pointer to the command. | |
1743 | * @nents Number of scatter list entries. | |
1744 | * | |
1745 | * return value | |
1746 | * None | |
1747 | */ | |
1748 | static inline void fill_command_sg(struct driver_data *dd, | |
1749 | struct mtip_cmd *command, | |
1750 | int nents) | |
1751 | { | |
1752 | int n; | |
1753 | unsigned int dma_len; | |
1754 | struct mtip_cmd_sg *command_sg; | |
1755 | struct scatterlist *sg = command->sg; | |
1756 | ||
1757 | command_sg = command->command + AHCI_CMD_TBL_HDR_SZ; | |
1758 | ||
1759 | for (n = 0; n < nents; n++) { | |
1760 | dma_len = sg_dma_len(sg); | |
1761 | if (dma_len > 0x400000) | |
1762 | dev_err(&dd->pdev->dev, | |
1763 | "DMA segment length truncated\n"); | |
60ec0eec AT |
1764 | command_sg->info = __force_bit2int |
1765 | cpu_to_le32((dma_len-1) & 0x3FFFFF); | |
1766 | command_sg->dba = __force_bit2int | |
1767 | cpu_to_le32(sg_dma_address(sg)); | |
1768 | command_sg->dba_upper = __force_bit2int | |
1769 | cpu_to_le32((sg_dma_address(sg) >> 16) >> 16); | |
88523a61 SB |
1770 | command_sg++; |
1771 | sg++; | |
1772 | } | |
1773 | } | |
1774 | ||
1775 | /* | |
1776 | * @brief Execute a drive command. | |
1777 | * | |
1778 | * return value 0 The command completed successfully. | |
1779 | * return value -1 An error occurred while executing the command. | |
1780 | */ | |
6316668f | 1781 | static int exec_drive_task(struct mtip_port *port, u8 *command) |
88523a61 SB |
1782 | { |
1783 | struct host_to_dev_fis fis; | |
1784 | struct host_to_dev_fis *reply = (port->rxfis + RX_FIS_D2H_REG); | |
9b204fbf | 1785 | unsigned int to; |
88523a61 | 1786 | |
88523a61 SB |
1787 | /* Build the FIS. */ |
1788 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
1789 | fis.type = 0x27; | |
1790 | fis.opts = 1 << 7; | |
1791 | fis.command = command[0]; | |
1792 | fis.features = command[1]; | |
1793 | fis.sect_count = command[2]; | |
1794 | fis.sector = command[3]; | |
1795 | fis.cyl_low = command[4]; | |
1796 | fis.cyl_hi = command[5]; | |
1797 | fis.device = command[6] & ~0x10; /* Clear the dev bit*/ | |
1798 | ||
9b204fbf AT |
1799 | mtip_set_timeout(port->dd, &fis, &to, 0); |
1800 | ||
c74b0f58 | 1801 | dbg_printk(MTIP_DRV_NAME " %s: User Command: cmd %x, feat %x, nsect %x, sect %x, lcyl %x, hcyl %x, sel %x\n", |
88523a61 SB |
1802 | __func__, |
1803 | command[0], | |
1804 | command[1], | |
1805 | command[2], | |
1806 | command[3], | |
1807 | command[4], | |
1808 | command[5], | |
1809 | command[6]); | |
1810 | ||
1811 | /* Execute the command. */ | |
1812 | if (mtip_exec_internal_command(port, | |
1813 | &fis, | |
1814 | 5, | |
1815 | 0, | |
1816 | 0, | |
1817 | 0, | |
1818 | GFP_KERNEL, | |
9b204fbf | 1819 | to) < 0) { |
88523a61 SB |
1820 | return -1; |
1821 | } | |
1822 | ||
1823 | command[0] = reply->command; /* Status*/ | |
1824 | command[1] = reply->features; /* Error*/ | |
1825 | command[4] = reply->cyl_low; | |
1826 | command[5] = reply->cyl_hi; | |
1827 | ||
c74b0f58 | 1828 | dbg_printk(MTIP_DRV_NAME " %s: Completion Status: stat %x, err %x , cyl_lo %x cyl_hi %x\n", |
88523a61 SB |
1829 | __func__, |
1830 | command[0], | |
1831 | command[1], | |
1832 | command[4], | |
1833 | command[5]); | |
1834 | ||
88523a61 SB |
1835 | return 0; |
1836 | } | |
1837 | ||
1838 | /* | |
1839 | * @brief Execute a drive command. | |
1840 | * | |
1841 | * @param port Pointer to the port data structure. | |
1842 | * @param command Pointer to the user specified command parameters. | |
1843 | * @param user_buffer Pointer to the user space buffer where read sector | |
1844 | * data should be copied. | |
1845 | * | |
1846 | * return value 0 The command completed successfully. | |
1847 | * return value -EFAULT An error occurred while copying the completion | |
1848 | * data to the user space buffer. | |
1849 | * return value -1 An error occurred while executing the command. | |
1850 | */ | |
6316668f JA |
1851 | static int exec_drive_command(struct mtip_port *port, u8 *command, |
1852 | void __user *user_buffer) | |
88523a61 SB |
1853 | { |
1854 | struct host_to_dev_fis fis; | |
e602878f AT |
1855 | struct host_to_dev_fis *reply; |
1856 | u8 *buf = NULL; | |
1857 | dma_addr_t dma_addr = 0; | |
1858 | int rv = 0, xfer_sz = command[3]; | |
9b204fbf | 1859 | unsigned int to; |
e602878f AT |
1860 | |
1861 | if (xfer_sz) { | |
97651ea6 | 1862 | if (!user_buffer) |
e602878f AT |
1863 | return -EFAULT; |
1864 | ||
1865 | buf = dmam_alloc_coherent(&port->dd->pdev->dev, | |
1866 | ATA_SECT_SIZE * xfer_sz, | |
1867 | &dma_addr, | |
1868 | GFP_KERNEL); | |
1869 | if (!buf) { | |
1870 | dev_err(&port->dd->pdev->dev, | |
1871 | "Memory allocation failed (%d bytes)\n", | |
1872 | ATA_SECT_SIZE * xfer_sz); | |
1873 | return -ENOMEM; | |
1874 | } | |
1875 | memset(buf, 0, ATA_SECT_SIZE * xfer_sz); | |
1876 | } | |
88523a61 | 1877 | |
88523a61 SB |
1878 | /* Build the FIS. */ |
1879 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
e602878f AT |
1880 | fis.type = 0x27; |
1881 | fis.opts = 1 << 7; | |
1882 | fis.command = command[0]; | |
88523a61 SB |
1883 | fis.features = command[2]; |
1884 | fis.sect_count = command[3]; | |
1885 | if (fis.command == ATA_CMD_SMART) { | |
1886 | fis.sector = command[1]; | |
60ec0eec AT |
1887 | fis.cyl_low = 0x4F; |
1888 | fis.cyl_hi = 0xC2; | |
88523a61 SB |
1889 | } |
1890 | ||
9b204fbf AT |
1891 | mtip_set_timeout(port->dd, &fis, &to, 0); |
1892 | ||
e602878f AT |
1893 | if (xfer_sz) |
1894 | reply = (port->rxfis + RX_FIS_PIO_SETUP); | |
1895 | else | |
1896 | reply = (port->rxfis + RX_FIS_D2H_REG); | |
1897 | ||
88523a61 | 1898 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 1899 | " %s: User Command: cmd %x, sect %x, " |
88523a61 SB |
1900 | "feat %x, sectcnt %x\n", |
1901 | __func__, | |
1902 | command[0], | |
1903 | command[1], | |
1904 | command[2], | |
1905 | command[3]); | |
1906 | ||
88523a61 SB |
1907 | /* Execute the command. */ |
1908 | if (mtip_exec_internal_command(port, | |
1909 | &fis, | |
1910 | 5, | |
e602878f AT |
1911 | (xfer_sz ? dma_addr : 0), |
1912 | (xfer_sz ? ATA_SECT_SIZE * xfer_sz : 0), | |
88523a61 SB |
1913 | 0, |
1914 | GFP_KERNEL, | |
9b204fbf | 1915 | to) |
88523a61 | 1916 | < 0) { |
e602878f AT |
1917 | rv = -EFAULT; |
1918 | goto exit_drive_command; | |
88523a61 SB |
1919 | } |
1920 | ||
1921 | /* Collect the completion status. */ | |
1922 | command[0] = reply->command; /* Status*/ | |
1923 | command[1] = reply->features; /* Error*/ | |
e602878f | 1924 | command[2] = reply->sect_count; |
88523a61 SB |
1925 | |
1926 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 1927 | " %s: Completion Status: stat %x, " |
e602878f | 1928 | "err %x, nsect %x\n", |
88523a61 SB |
1929 | __func__, |
1930 | command[0], | |
1931 | command[1], | |
1932 | command[2]); | |
1933 | ||
e602878f | 1934 | if (xfer_sz) { |
88523a61 | 1935 | if (copy_to_user(user_buffer, |
e602878f | 1936 | buf, |
88523a61 | 1937 | ATA_SECT_SIZE * command[3])) { |
e602878f AT |
1938 | rv = -EFAULT; |
1939 | goto exit_drive_command; | |
88523a61 SB |
1940 | } |
1941 | } | |
e602878f AT |
1942 | exit_drive_command: |
1943 | if (buf) | |
1944 | dmam_free_coherent(&port->dd->pdev->dev, | |
1945 | ATA_SECT_SIZE * xfer_sz, buf, dma_addr); | |
1946 | return rv; | |
88523a61 SB |
1947 | } |
1948 | ||
1949 | /* | |
1950 | * Indicates whether a command has a single sector payload. | |
1951 | * | |
1952 | * @command passed to the device to perform the certain event. | |
1953 | * @features passed to the device to perform the certain event. | |
1954 | * | |
1955 | * return value | |
1956 | * 1 command is one that always has a single sector payload, | |
1957 | * regardless of the value in the Sector Count field. | |
1958 | * 0 otherwise | |
1959 | * | |
1960 | */ | |
1961 | static unsigned int implicit_sector(unsigned char command, | |
1962 | unsigned char features) | |
1963 | { | |
1964 | unsigned int rv = 0; | |
1965 | ||
1966 | /* list of commands that have an implicit sector count of 1 */ | |
1967 | switch (command) { | |
60ec0eec AT |
1968 | case ATA_CMD_SEC_SET_PASS: |
1969 | case ATA_CMD_SEC_UNLOCK: | |
1970 | case ATA_CMD_SEC_ERASE_PREP: | |
1971 | case ATA_CMD_SEC_ERASE_UNIT: | |
1972 | case ATA_CMD_SEC_FREEZE_LOCK: | |
1973 | case ATA_CMD_SEC_DISABLE_PASS: | |
1974 | case ATA_CMD_PMP_READ: | |
1975 | case ATA_CMD_PMP_WRITE: | |
88523a61 SB |
1976 | rv = 1; |
1977 | break; | |
60ec0eec AT |
1978 | case ATA_CMD_SET_MAX: |
1979 | if (features == ATA_SET_MAX_UNLOCK) | |
88523a61 SB |
1980 | rv = 1; |
1981 | break; | |
60ec0eec AT |
1982 | case ATA_CMD_SMART: |
1983 | if ((features == ATA_SMART_READ_VALUES) || | |
1984 | (features == ATA_SMART_READ_THRESHOLDS)) | |
88523a61 SB |
1985 | rv = 1; |
1986 | break; | |
60ec0eec AT |
1987 | case ATA_CMD_CONF_OVERLAY: |
1988 | if ((features == ATA_DCO_IDENTIFY) || | |
1989 | (features == ATA_DCO_SET)) | |
88523a61 SB |
1990 | rv = 1; |
1991 | break; | |
1992 | } | |
1993 | return rv; | |
1994 | } | |
2df7aa96 | 1995 | |
88523a61 SB |
1996 | /* |
1997 | * Executes a taskfile | |
1998 | * See ide_taskfile_ioctl() for derivation | |
1999 | */ | |
2000 | static int exec_drive_taskfile(struct driver_data *dd, | |
ef0f1587 JA |
2001 | void __user *buf, |
2002 | ide_task_request_t *req_task, | |
2003 | int outtotal) | |
88523a61 SB |
2004 | { |
2005 | struct host_to_dev_fis fis; | |
2006 | struct host_to_dev_fis *reply; | |
88523a61 SB |
2007 | u8 *outbuf = NULL; |
2008 | u8 *inbuf = NULL; | |
16d02c04 JA |
2009 | dma_addr_t outbuf_dma = 0; |
2010 | dma_addr_t inbuf_dma = 0; | |
2011 | dma_addr_t dma_buffer = 0; | |
88523a61 | 2012 | int err = 0; |
88523a61 SB |
2013 | unsigned int taskin = 0; |
2014 | unsigned int taskout = 0; | |
2015 | u8 nsect = 0; | |
2df7aa96 | 2016 | unsigned int timeout; |
88523a61 SB |
2017 | unsigned int force_single_sector; |
2018 | unsigned int transfer_size; | |
2019 | unsigned long task_file_data; | |
ef0f1587 | 2020 | int intotal = outtotal + req_task->out_size; |
4453bc88 | 2021 | int erasemode = 0; |
88523a61 SB |
2022 | |
2023 | taskout = req_task->out_size; | |
2024 | taskin = req_task->in_size; | |
2025 | /* 130560 = 512 * 0xFF*/ | |
2026 | if (taskin > 130560 || taskout > 130560) { | |
2027 | err = -EINVAL; | |
2028 | goto abort; | |
2029 | } | |
2030 | ||
2031 | if (taskout) { | |
2032 | outbuf = kzalloc(taskout, GFP_KERNEL); | |
2033 | if (outbuf == NULL) { | |
2034 | err = -ENOMEM; | |
2035 | goto abort; | |
2036 | } | |
2037 | if (copy_from_user(outbuf, buf + outtotal, taskout)) { | |
2038 | err = -EFAULT; | |
2039 | goto abort; | |
2040 | } | |
2041 | outbuf_dma = pci_map_single(dd->pdev, | |
2042 | outbuf, | |
2043 | taskout, | |
2044 | DMA_TO_DEVICE); | |
16d02c04 | 2045 | if (outbuf_dma == 0) { |
88523a61 SB |
2046 | err = -ENOMEM; |
2047 | goto abort; | |
2048 | } | |
2049 | dma_buffer = outbuf_dma; | |
2050 | } | |
2051 | ||
2052 | if (taskin) { | |
2053 | inbuf = kzalloc(taskin, GFP_KERNEL); | |
2054 | if (inbuf == NULL) { | |
2055 | err = -ENOMEM; | |
2056 | goto abort; | |
2057 | } | |
2058 | ||
2059 | if (copy_from_user(inbuf, buf + intotal, taskin)) { | |
2060 | err = -EFAULT; | |
2061 | goto abort; | |
2062 | } | |
2063 | inbuf_dma = pci_map_single(dd->pdev, | |
2064 | inbuf, | |
2065 | taskin, DMA_FROM_DEVICE); | |
16d02c04 | 2066 | if (inbuf_dma == 0) { |
88523a61 SB |
2067 | err = -ENOMEM; |
2068 | goto abort; | |
2069 | } | |
2070 | dma_buffer = inbuf_dma; | |
2071 | } | |
2072 | ||
2073 | /* only supports PIO and non-data commands from this ioctl. */ | |
2074 | switch (req_task->data_phase) { | |
2075 | case TASKFILE_OUT: | |
2076 | nsect = taskout / ATA_SECT_SIZE; | |
2077 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2078 | break; | |
2079 | case TASKFILE_IN: | |
2080 | reply = (dd->port->rxfis + RX_FIS_PIO_SETUP); | |
2081 | break; | |
2082 | case TASKFILE_NO_DATA: | |
2083 | reply = (dd->port->rxfis + RX_FIS_D2H_REG); | |
2084 | break; | |
2085 | default: | |
2086 | err = -EINVAL; | |
2087 | goto abort; | |
2088 | } | |
2089 | ||
88523a61 SB |
2090 | /* Build the FIS. */ |
2091 | memset(&fis, 0, sizeof(struct host_to_dev_fis)); | |
2092 | ||
2093 | fis.type = 0x27; | |
2094 | fis.opts = 1 << 7; | |
2095 | fis.command = req_task->io_ports[7]; | |
2096 | fis.features = req_task->io_ports[1]; | |
2097 | fis.sect_count = req_task->io_ports[2]; | |
2098 | fis.lba_low = req_task->io_ports[3]; | |
2099 | fis.lba_mid = req_task->io_ports[4]; | |
2100 | fis.lba_hi = req_task->io_ports[5]; | |
2101 | /* Clear the dev bit*/ | |
2102 | fis.device = req_task->io_ports[6] & ~0x10; | |
2103 | ||
2104 | if ((req_task->in_flags.all == 0) && (req_task->out_flags.all & 1)) { | |
2105 | req_task->in_flags.all = | |
2106 | IDE_TASKFILE_STD_IN_FLAGS | | |
2107 | (IDE_HOB_STD_IN_FLAGS << 8); | |
2108 | fis.lba_low_ex = req_task->hob_ports[3]; | |
2109 | fis.lba_mid_ex = req_task->hob_ports[4]; | |
2110 | fis.lba_hi_ex = req_task->hob_ports[5]; | |
2111 | fis.features_ex = req_task->hob_ports[1]; | |
2112 | fis.sect_cnt_ex = req_task->hob_ports[2]; | |
2113 | ||
2114 | } else { | |
2115 | req_task->in_flags.all = IDE_TASKFILE_STD_IN_FLAGS; | |
2116 | } | |
2117 | ||
2118 | force_single_sector = implicit_sector(fis.command, fis.features); | |
2119 | ||
2120 | if ((taskin || taskout) && (!fis.sect_count)) { | |
2121 | if (nsect) | |
2122 | fis.sect_count = nsect; | |
2123 | else { | |
2124 | if (!force_single_sector) { | |
2125 | dev_warn(&dd->pdev->dev, | |
2126 | "data movement but " | |
2127 | "sect_count is 0\n"); | |
88523a61 SB |
2128 | err = -EINVAL; |
2129 | goto abort; | |
2130 | } | |
2131 | } | |
2132 | } | |
2133 | ||
2134 | dbg_printk(MTIP_DRV_NAME | |
c74b0f58 | 2135 | " %s: cmd %x, feat %x, nsect %x," |
88523a61 SB |
2136 | " sect/lbal %x, lcyl/lbam %x, hcyl/lbah %x," |
2137 | " head/dev %x\n", | |
c74b0f58 | 2138 | __func__, |
88523a61 SB |
2139 | fis.command, |
2140 | fis.features, | |
2141 | fis.sect_count, | |
2142 | fis.lba_low, | |
2143 | fis.lba_mid, | |
2144 | fis.lba_hi, | |
2145 | fis.device); | |
2146 | ||
4453bc88 | 2147 | /* check for erase mode support during secure erase.*/ |
3208795e SM |
2148 | if ((fis.command == ATA_CMD_SEC_ERASE_UNIT) && outbuf && |
2149 | (outbuf[0] & MTIP_SEC_ERASE_MODE)) { | |
4453bc88 SM |
2150 | erasemode = 1; |
2151 | } | |
2152 | ||
2153 | mtip_set_timeout(dd, &fis, &timeout, erasemode); | |
88523a61 SB |
2154 | |
2155 | /* Determine the correct transfer size.*/ | |
2156 | if (force_single_sector) | |
2157 | transfer_size = ATA_SECT_SIZE; | |
2158 | else | |
2159 | transfer_size = ATA_SECT_SIZE * fis.sect_count; | |
2160 | ||
2161 | /* Execute the command.*/ | |
2162 | if (mtip_exec_internal_command(dd->port, | |
2163 | &fis, | |
2164 | 5, | |
2165 | dma_buffer, | |
2166 | transfer_size, | |
2167 | 0, | |
2168 | GFP_KERNEL, | |
2169 | timeout) < 0) { | |
88523a61 SB |
2170 | err = -EIO; |
2171 | goto abort; | |
2172 | } | |
2173 | ||
2174 | task_file_data = readl(dd->port->mmio+PORT_TFDATA); | |
2175 | ||
2176 | if ((req_task->data_phase == TASKFILE_IN) && !(task_file_data & 1)) { | |
2177 | reply = dd->port->rxfis + RX_FIS_PIO_SETUP; | |
2178 | req_task->io_ports[7] = reply->control; | |
2179 | } else { | |
2180 | reply = dd->port->rxfis + RX_FIS_D2H_REG; | |
2181 | req_task->io_ports[7] = reply->command; | |
2182 | } | |
2183 | ||
2184 | /* reclaim the DMA buffers.*/ | |
2185 | if (inbuf_dma) | |
2186 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2187 | taskin, DMA_FROM_DEVICE); | |
2188 | if (outbuf_dma) | |
2189 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2190 | taskout, DMA_TO_DEVICE); | |
16d02c04 JA |
2191 | inbuf_dma = 0; |
2192 | outbuf_dma = 0; | |
88523a61 SB |
2193 | |
2194 | /* return the ATA registers to the caller.*/ | |
2195 | req_task->io_ports[1] = reply->features; | |
2196 | req_task->io_ports[2] = reply->sect_count; | |
2197 | req_task->io_ports[3] = reply->lba_low; | |
2198 | req_task->io_ports[4] = reply->lba_mid; | |
2199 | req_task->io_ports[5] = reply->lba_hi; | |
2200 | req_task->io_ports[6] = reply->device; | |
2201 | ||
2202 | if (req_task->out_flags.all & 1) { | |
2203 | ||
2204 | req_task->hob_ports[3] = reply->lba_low_ex; | |
2205 | req_task->hob_ports[4] = reply->lba_mid_ex; | |
2206 | req_task->hob_ports[5] = reply->lba_hi_ex; | |
2207 | req_task->hob_ports[1] = reply->features_ex; | |
2208 | req_task->hob_ports[2] = reply->sect_cnt_ex; | |
2209 | } | |
88523a61 | 2210 | dbg_printk(MTIP_DRV_NAME |
c74b0f58 | 2211 | " %s: Completion: stat %x," |
88523a61 SB |
2212 | "err %x, sect_cnt %x, lbalo %x," |
2213 | "lbamid %x, lbahi %x, dev %x\n", | |
2214 | __func__, | |
2215 | req_task->io_ports[7], | |
2216 | req_task->io_ports[1], | |
2217 | req_task->io_ports[2], | |
2218 | req_task->io_ports[3], | |
2219 | req_task->io_ports[4], | |
2220 | req_task->io_ports[5], | |
2221 | req_task->io_ports[6]); | |
2222 | ||
88523a61 SB |
2223 | if (taskout) { |
2224 | if (copy_to_user(buf + outtotal, outbuf, taskout)) { | |
2225 | err = -EFAULT; | |
2226 | goto abort; | |
2227 | } | |
2228 | } | |
2229 | if (taskin) { | |
2230 | if (copy_to_user(buf + intotal, inbuf, taskin)) { | |
2231 | err = -EFAULT; | |
2232 | goto abort; | |
2233 | } | |
2234 | } | |
2235 | abort: | |
2236 | if (inbuf_dma) | |
2237 | pci_unmap_single(dd->pdev, inbuf_dma, | |
2238 | taskin, DMA_FROM_DEVICE); | |
2239 | if (outbuf_dma) | |
2240 | pci_unmap_single(dd->pdev, outbuf_dma, | |
2241 | taskout, DMA_TO_DEVICE); | |
88523a61 SB |
2242 | kfree(outbuf); |
2243 | kfree(inbuf); | |
2244 | ||
2245 | return err; | |
2246 | } | |
2247 | ||
2248 | /* | |
2249 | * Handle IOCTL calls from the Block Layer. | |
2250 | * | |
2251 | * This function is called by the Block Layer when it receives an IOCTL | |
2252 | * command that it does not understand. If the IOCTL command is not supported | |
2253 | * this function returns -ENOTTY. | |
2254 | * | |
2255 | * @dd Pointer to the driver data structure. | |
2256 | * @cmd IOCTL command passed from the Block Layer. | |
2257 | * @arg IOCTL argument passed from the Block Layer. | |
2258 | * | |
2259 | * return value | |
2260 | * 0 The IOCTL completed successfully. | |
2261 | * -ENOTTY The specified command is not supported. | |
2262 | * -EFAULT An error occurred copying data to a user space buffer. | |
2263 | * -EIO An error occurred while executing the command. | |
2264 | */ | |
ef0f1587 JA |
2265 | static int mtip_hw_ioctl(struct driver_data *dd, unsigned int cmd, |
2266 | unsigned long arg) | |
88523a61 SB |
2267 | { |
2268 | switch (cmd) { | |
2269 | case HDIO_GET_IDENTITY: | |
971890f2 AT |
2270 | { |
2271 | if (copy_to_user((void __user *)arg, dd->port->identify, | |
2272 | sizeof(u16) * ATA_ID_WORDS)) | |
2273 | return -EFAULT; | |
88523a61 | 2274 | break; |
971890f2 | 2275 | } |
88523a61 SB |
2276 | case HDIO_DRIVE_CMD: |
2277 | { | |
2278 | u8 drive_command[4]; | |
2279 | ||
2280 | /* Copy the user command info to our buffer. */ | |
2281 | if (copy_from_user(drive_command, | |
2282 | (void __user *) arg, | |
2283 | sizeof(drive_command))) | |
2284 | return -EFAULT; | |
2285 | ||
2286 | /* Execute the drive command. */ | |
2287 | if (exec_drive_command(dd->port, | |
2288 | drive_command, | |
2289 | (void __user *) (arg+4))) | |
2290 | return -EIO; | |
2291 | ||
2292 | /* Copy the status back to the users buffer. */ | |
2293 | if (copy_to_user((void __user *) arg, | |
2294 | drive_command, | |
2295 | sizeof(drive_command))) | |
2296 | return -EFAULT; | |
2297 | ||
2298 | break; | |
2299 | } | |
2300 | case HDIO_DRIVE_TASK: | |
2301 | { | |
2302 | u8 drive_command[7]; | |
2303 | ||
2304 | /* Copy the user command info to our buffer. */ | |
2305 | if (copy_from_user(drive_command, | |
2306 | (void __user *) arg, | |
2307 | sizeof(drive_command))) | |
2308 | return -EFAULT; | |
2309 | ||
2310 | /* Execute the drive command. */ | |
2311 | if (exec_drive_task(dd->port, drive_command)) | |
2312 | return -EIO; | |
2313 | ||
2314 | /* Copy the status back to the users buffer. */ | |
2315 | if (copy_to_user((void __user *) arg, | |
2316 | drive_command, | |
2317 | sizeof(drive_command))) | |
2318 | return -EFAULT; | |
2319 | ||
2320 | break; | |
2321 | } | |
ef0f1587 JA |
2322 | case HDIO_DRIVE_TASKFILE: { |
2323 | ide_task_request_t req_task; | |
2324 | int ret, outtotal; | |
2325 | ||
2326 | if (copy_from_user(&req_task, (void __user *) arg, | |
2327 | sizeof(req_task))) | |
2328 | return -EFAULT; | |
2329 | ||
2330 | outtotal = sizeof(req_task); | |
2331 | ||
2332 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
2333 | &req_task, outtotal); | |
2334 | ||
60ec0eec AT |
2335 | if (copy_to_user((void __user *) arg, &req_task, |
2336 | sizeof(req_task))) | |
ef0f1587 JA |
2337 | return -EFAULT; |
2338 | ||
2339 | return ret; | |
2340 | } | |
88523a61 SB |
2341 | |
2342 | default: | |
2343 | return -EINVAL; | |
2344 | } | |
2345 | return 0; | |
2346 | } | |
2347 | ||
2348 | /* | |
2349 | * Submit an IO to the hw | |
2350 | * | |
2351 | * This function is called by the block layer to issue an io | |
2352 | * to the device. Upon completion, the callback function will | |
2353 | * be called with the data parameter passed as the callback data. | |
2354 | * | |
2355 | * @dd Pointer to the driver data structure. | |
2356 | * @start First sector to read. | |
2357 | * @nsect Number of sectors to read. | |
2358 | * @nents Number of entries in scatter list for the read command. | |
2359 | * @tag The tag of this read command. | |
2360 | * @callback Pointer to the function that should be called | |
2361 | * when the read completes. | |
2362 | * @data Callback data passed to the callback function | |
2363 | * when the read completes. | |
88523a61 SB |
2364 | * @dir Direction (read or write) |
2365 | * | |
2366 | * return value | |
2367 | * None | |
2368 | */ | |
ffc771b3 JA |
2369 | static void mtip_hw_submit_io(struct driver_data *dd, struct request *rq, |
2370 | struct mtip_cmd *command, int nents, | |
2371 | struct blk_mq_hw_ctx *hctx) | |
88523a61 SB |
2372 | { |
2373 | struct host_to_dev_fis *fis; | |
2374 | struct mtip_port *port = dd->port; | |
ffc771b3 JA |
2375 | int dma_dir = rq_data_dir(rq) == READ ? DMA_FROM_DEVICE : DMA_TO_DEVICE; |
2376 | u64 start = blk_rq_pos(rq); | |
2377 | unsigned int nsect = blk_rq_sectors(rq); | |
88523a61 SB |
2378 | |
2379 | /* Map the scatter list for DMA access */ | |
45038367 | 2380 | nents = dma_map_sg(&dd->pdev->dev, command->sg, nents, dma_dir); |
88523a61 | 2381 | |
f45c40a9 SB |
2382 | prefetch(&port->flags); |
2383 | ||
88523a61 SB |
2384 | command->scatter_ents = nents; |
2385 | ||
2386 | /* | |
2387 | * The number of retries for this command before it is | |
2388 | * reported as a failure to the upper layers. | |
2389 | */ | |
2390 | command->retries = MTIP_MAX_RETRIES; | |
2391 | ||
2392 | /* Fill out fis */ | |
2393 | fis = command->command; | |
2394 | fis->type = 0x27; | |
2395 | fis->opts = 1 << 7; | |
f45c40a9 | 2396 | if (dma_dir == DMA_FROM_DEVICE) |
ffc771b3 JA |
2397 | fis->command = ATA_CMD_FPDMA_READ; |
2398 | else | |
2399 | fis->command = ATA_CMD_FPDMA_WRITE; | |
eda45314 SM |
2400 | fis->lba_low = start & 0xFF; |
2401 | fis->lba_mid = (start >> 8) & 0xFF; | |
2402 | fis->lba_hi = (start >> 16) & 0xFF; | |
2403 | fis->lba_low_ex = (start >> 24) & 0xFF; | |
2404 | fis->lba_mid_ex = (start >> 32) & 0xFF; | |
2405 | fis->lba_hi_ex = (start >> 40) & 0xFF; | |
88523a61 | 2406 | fis->device = 1 << 6; |
60ec0eec AT |
2407 | fis->features = nsect & 0xFF; |
2408 | fis->features_ex = (nsect >> 8) & 0xFF; | |
ffc771b3 | 2409 | fis->sect_count = ((rq->tag << 3) | (rq->tag >> 5)); |
88523a61 SB |
2410 | fis->sect_cnt_ex = 0; |
2411 | fis->control = 0; | |
2412 | fis->res2 = 0; | |
2413 | fis->res3 = 0; | |
2414 | fill_command_sg(dd, command, nents); | |
2415 | ||
f45c40a9 | 2416 | if (unlikely(command->unaligned)) |
2077d947 AT |
2417 | fis->device |= 1 << 7; |
2418 | ||
88523a61 | 2419 | /* Populate the command header */ |
60ec0eec AT |
2420 | command->command_header->opts = |
2421 | __force_bit2int cpu_to_le32( | |
2422 | (nents << 16) | 5 | AHCI_CMD_PREFETCH); | |
88523a61 SB |
2423 | command->command_header->byte_count = 0; |
2424 | ||
2425 | /* | |
2426 | * Set the completion function and data for the command | |
2427 | * within this layer. | |
2428 | */ | |
2429 | command->comp_data = dd; | |
2430 | command->comp_func = mtip_async_complete; | |
45038367 | 2431 | command->direction = dma_dir; |
88523a61 | 2432 | |
88523a61 | 2433 | /* |
60ec0eec AT |
2434 | * To prevent this command from being issued |
2435 | * if an internal command is in progress or error handling is active. | |
88523a61 | 2436 | */ |
f45c40a9 | 2437 | if (unlikely(port->flags & MTIP_PF_PAUSE_IO)) { |
ffc771b3 | 2438 | set_bit(rq->tag, port->cmds_to_issue); |
8a857a88 | 2439 | set_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
60ec0eec AT |
2440 | return; |
2441 | } | |
88523a61 SB |
2442 | |
2443 | /* Issue the command to the hardware */ | |
ffc771b3 | 2444 | mtip_issue_ncq_command(port, rq->tag); |
88523a61 SB |
2445 | } |
2446 | ||
2447 | /* | |
7412ff13 | 2448 | * Sysfs status dump. |
88523a61 SB |
2449 | * |
2450 | * @dev Pointer to the device structure, passed by the kernrel. | |
2451 | * @attr Pointer to the device_attribute structure passed by the kernel. | |
2452 | * @buf Pointer to the char buffer that will receive the stats info. | |
2453 | * | |
2454 | * return value | |
2455 | * The size, in bytes, of the data copied into buf. | |
2456 | */ | |
f6587217 AT |
2457 | static ssize_t mtip_hw_show_status(struct device *dev, |
2458 | struct device_attribute *attr, | |
2459 | char *buf) | |
2460 | { | |
2461 | struct driver_data *dd = dev_to_disk(dev)->private_data; | |
2462 | int size = 0; | |
2463 | ||
8a857a88 | 2464 | if (test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag)) |
f6587217 | 2465 | size += sprintf(buf, "%s", "thermal_shutdown\n"); |
8a857a88 | 2466 | else if (test_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag)) |
f6587217 AT |
2467 | size += sprintf(buf, "%s", "write_protect\n"); |
2468 | else | |
2469 | size += sprintf(buf, "%s", "online\n"); | |
2470 | ||
2471 | return size; | |
2472 | } | |
2473 | ||
f6587217 | 2474 | static DEVICE_ATTR(status, S_IRUGO, mtip_hw_show_status, NULL); |
88523a61 | 2475 | |
0caff003 AT |
2476 | /* debugsfs entries */ |
2477 | ||
2478 | static ssize_t show_device_status(struct device_driver *drv, char *buf) | |
2479 | { | |
2480 | int size = 0; | |
2481 | struct driver_data *dd, *tmp; | |
2482 | unsigned long flags; | |
2483 | char id_buf[42]; | |
2484 | u16 status = 0; | |
2485 | ||
2486 | spin_lock_irqsave(&dev_lock, flags); | |
2487 | size += sprintf(&buf[size], "Devices Present:\n"); | |
2488 | list_for_each_entry_safe(dd, tmp, &online_list, online_list) { | |
c66bb3f0 | 2489 | if (dd->pdev) { |
0caff003 AT |
2490 | if (dd->port && |
2491 | dd->port->identify && | |
2492 | dd->port->identify_valid) { | |
2493 | strlcpy(id_buf, | |
2494 | (char *) (dd->port->identify + 10), 21); | |
2495 | status = *(dd->port->identify + 141); | |
2496 | } else { | |
2497 | memset(id_buf, 0, 42); | |
2498 | status = 0; | |
2499 | } | |
2500 | ||
2501 | if (dd->port && | |
2502 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2503 | size += sprintf(&buf[size], | |
2504 | " device %s %s (ftl rebuild %d %%)\n", | |
2505 | dev_name(&dd->pdev->dev), | |
2506 | id_buf, | |
2507 | status); | |
2508 | } else { | |
2509 | size += sprintf(&buf[size], | |
2510 | " device %s %s\n", | |
2511 | dev_name(&dd->pdev->dev), | |
2512 | id_buf); | |
2513 | } | |
2514 | } | |
2515 | } | |
2516 | ||
2517 | size += sprintf(&buf[size], "Devices Being Removed:\n"); | |
2518 | list_for_each_entry_safe(dd, tmp, &removing_list, remove_list) { | |
c66bb3f0 | 2519 | if (dd->pdev) { |
0caff003 AT |
2520 | if (dd->port && |
2521 | dd->port->identify && | |
2522 | dd->port->identify_valid) { | |
2523 | strlcpy(id_buf, | |
2524 | (char *) (dd->port->identify+10), 21); | |
2525 | status = *(dd->port->identify + 141); | |
2526 | } else { | |
2527 | memset(id_buf, 0, 42); | |
2528 | status = 0; | |
2529 | } | |
2530 | ||
2531 | if (dd->port && | |
2532 | test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags)) { | |
2533 | size += sprintf(&buf[size], | |
2534 | " device %s %s (ftl rebuild %d %%)\n", | |
2535 | dev_name(&dd->pdev->dev), | |
2536 | id_buf, | |
2537 | status); | |
2538 | } else { | |
2539 | size += sprintf(&buf[size], | |
2540 | " device %s %s\n", | |
2541 | dev_name(&dd->pdev->dev), | |
2542 | id_buf); | |
2543 | } | |
2544 | } | |
2545 | } | |
2546 | spin_unlock_irqrestore(&dev_lock, flags); | |
2547 | ||
2548 | return size; | |
2549 | } | |
2550 | ||
2551 | static ssize_t mtip_hw_read_device_status(struct file *f, char __user *ubuf, | |
2552 | size_t len, loff_t *offset) | |
2553 | { | |
c8afd0dc | 2554 | struct driver_data *dd = (struct driver_data *)f->private_data; |
0caff003 | 2555 | int size = *offset; |
c8afd0dc DM |
2556 | char *buf; |
2557 | int rv = 0; | |
0caff003 AT |
2558 | |
2559 | if (!len || *offset) | |
2560 | return 0; | |
2561 | ||
c8afd0dc DM |
2562 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2563 | if (!buf) { | |
2564 | dev_err(&dd->pdev->dev, | |
2565 | "Memory allocation: status buffer\n"); | |
2566 | return -ENOMEM; | |
2567 | } | |
2568 | ||
0caff003 AT |
2569 | size += show_device_status(NULL, buf); |
2570 | ||
2571 | *offset = size <= len ? size : len; | |
2572 | size = copy_to_user(ubuf, buf, *offset); | |
2573 | if (size) | |
c8afd0dc | 2574 | rv = -EFAULT; |
0caff003 | 2575 | |
c8afd0dc DM |
2576 | kfree(buf); |
2577 | return rv ? rv : *offset; | |
0caff003 AT |
2578 | } |
2579 | ||
7b421d24 AT |
2580 | static ssize_t mtip_hw_read_registers(struct file *f, char __user *ubuf, |
2581 | size_t len, loff_t *offset) | |
2582 | { | |
2583 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
c8afd0dc | 2584 | char *buf; |
7b421d24 AT |
2585 | u32 group_allocated; |
2586 | int size = *offset; | |
c8afd0dc | 2587 | int n, rv = 0; |
7b421d24 AT |
2588 | |
2589 | if (!len || size) | |
2590 | return 0; | |
2591 | ||
c8afd0dc DM |
2592 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2593 | if (!buf) { | |
2594 | dev_err(&dd->pdev->dev, | |
2595 | "Memory allocation: register buffer\n"); | |
2596 | return -ENOMEM; | |
2597 | } | |
2598 | ||
7b421d24 AT |
2599 | size += sprintf(&buf[size], "H/ S ACTive : [ 0x"); |
2600 | ||
2601 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2602 | size += sprintf(&buf[size], "%08X ", | |
2603 | readl(dd->port->s_active[n])); | |
2604 | ||
2605 | size += sprintf(&buf[size], "]\n"); | |
2606 | size += sprintf(&buf[size], "H/ Command Issue : [ 0x"); | |
2607 | ||
2608 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2609 | size += sprintf(&buf[size], "%08X ", | |
2610 | readl(dd->port->cmd_issue[n])); | |
2611 | ||
2612 | size += sprintf(&buf[size], "]\n"); | |
2613 | size += sprintf(&buf[size], "H/ Completed : [ 0x"); | |
2614 | ||
2615 | for (n = dd->slot_groups-1; n >= 0; n--) | |
2616 | size += sprintf(&buf[size], "%08X ", | |
2617 | readl(dd->port->completed[n])); | |
2618 | ||
2619 | size += sprintf(&buf[size], "]\n"); | |
2620 | size += sprintf(&buf[size], "H/ PORT IRQ STAT : [ 0x%08X ]\n", | |
2621 | readl(dd->port->mmio + PORT_IRQ_STAT)); | |
2622 | size += sprintf(&buf[size], "H/ HOST IRQ STAT : [ 0x%08X ]\n", | |
2623 | readl(dd->mmio + HOST_IRQ_STAT)); | |
2624 | size += sprintf(&buf[size], "\n"); | |
2625 | ||
7b421d24 AT |
2626 | size += sprintf(&buf[size], "L/ Commands in Q : [ 0x"); |
2627 | ||
2628 | for (n = dd->slot_groups-1; n >= 0; n--) { | |
2629 | if (sizeof(long) > sizeof(u32)) | |
2630 | group_allocated = | |
2631 | dd->port->cmds_to_issue[n/2] >> (32*(n&1)); | |
2632 | else | |
2633 | group_allocated = dd->port->cmds_to_issue[n]; | |
2634 | size += sprintf(&buf[size], "%08X ", group_allocated); | |
2635 | } | |
2636 | size += sprintf(&buf[size], "]\n"); | |
2637 | ||
2638 | *offset = size <= len ? size : len; | |
2639 | size = copy_to_user(ubuf, buf, *offset); | |
2640 | if (size) | |
c8afd0dc | 2641 | rv = -EFAULT; |
7b421d24 | 2642 | |
c8afd0dc DM |
2643 | kfree(buf); |
2644 | return rv ? rv : *offset; | |
7b421d24 AT |
2645 | } |
2646 | ||
2647 | static ssize_t mtip_hw_read_flags(struct file *f, char __user *ubuf, | |
2648 | size_t len, loff_t *offset) | |
2649 | { | |
2650 | struct driver_data *dd = (struct driver_data *)f->private_data; | |
c8afd0dc | 2651 | char *buf; |
7b421d24 | 2652 | int size = *offset; |
c8afd0dc | 2653 | int rv = 0; |
7b421d24 AT |
2654 | |
2655 | if (!len || size) | |
2656 | return 0; | |
2657 | ||
c8afd0dc DM |
2658 | buf = kzalloc(MTIP_DFS_MAX_BUF_SIZE, GFP_KERNEL); |
2659 | if (!buf) { | |
2660 | dev_err(&dd->pdev->dev, | |
2661 | "Memory allocation: flag buffer\n"); | |
2662 | return -ENOMEM; | |
2663 | } | |
2664 | ||
7b421d24 AT |
2665 | size += sprintf(&buf[size], "Flag-port : [ %08lX ]\n", |
2666 | dd->port->flags); | |
2667 | size += sprintf(&buf[size], "Flag-dd : [ %08lX ]\n", | |
2668 | dd->dd_flag); | |
2669 | ||
2670 | *offset = size <= len ? size : len; | |
2671 | size = copy_to_user(ubuf, buf, *offset); | |
2672 | if (size) | |
c8afd0dc | 2673 | rv = -EFAULT; |
7b421d24 | 2674 | |
c8afd0dc DM |
2675 | kfree(buf); |
2676 | return rv ? rv : *offset; | |
7b421d24 AT |
2677 | } |
2678 | ||
0caff003 AT |
2679 | static const struct file_operations mtip_device_status_fops = { |
2680 | .owner = THIS_MODULE, | |
2681 | .open = simple_open, | |
2682 | .read = mtip_hw_read_device_status, | |
2683 | .llseek = no_llseek, | |
2684 | }; | |
2685 | ||
7b421d24 AT |
2686 | static const struct file_operations mtip_regs_fops = { |
2687 | .owner = THIS_MODULE, | |
2688 | .open = simple_open, | |
2689 | .read = mtip_hw_read_registers, | |
2690 | .llseek = no_llseek, | |
2691 | }; | |
2692 | ||
2693 | static const struct file_operations mtip_flags_fops = { | |
2694 | .owner = THIS_MODULE, | |
2695 | .open = simple_open, | |
2696 | .read = mtip_hw_read_flags, | |
2697 | .llseek = no_llseek, | |
2698 | }; | |
2699 | ||
88523a61 SB |
2700 | /* |
2701 | * Create the sysfs related attributes. | |
2702 | * | |
2703 | * @dd Pointer to the driver data structure. | |
2704 | * @kobj Pointer to the kobj for the block device. | |
2705 | * | |
2706 | * return value | |
2707 | * 0 Operation completed successfully. | |
2708 | * -EINVAL Invalid parameter. | |
2709 | */ | |
6316668f | 2710 | static int mtip_hw_sysfs_init(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2711 | { |
2712 | if (!kobj || !dd) | |
2713 | return -EINVAL; | |
2714 | ||
f6587217 AT |
2715 | if (sysfs_create_file(kobj, &dev_attr_status.attr)) |
2716 | dev_warn(&dd->pdev->dev, | |
2717 | "Error creating 'status' sysfs entry\n"); | |
88523a61 SB |
2718 | return 0; |
2719 | } | |
2720 | ||
2721 | /* | |
2722 | * Remove the sysfs related attributes. | |
2723 | * | |
2724 | * @dd Pointer to the driver data structure. | |
2725 | * @kobj Pointer to the kobj for the block device. | |
2726 | * | |
2727 | * return value | |
2728 | * 0 Operation completed successfully. | |
2729 | * -EINVAL Invalid parameter. | |
2730 | */ | |
6316668f | 2731 | static int mtip_hw_sysfs_exit(struct driver_data *dd, struct kobject *kobj) |
88523a61 SB |
2732 | { |
2733 | if (!kobj || !dd) | |
2734 | return -EINVAL; | |
2735 | ||
f6587217 | 2736 | sysfs_remove_file(kobj, &dev_attr_status.attr); |
88523a61 SB |
2737 | |
2738 | return 0; | |
2739 | } | |
2740 | ||
7b421d24 AT |
2741 | static int mtip_hw_debugfs_init(struct driver_data *dd) |
2742 | { | |
2743 | if (!dfs_parent) | |
2744 | return -1; | |
2745 | ||
2746 | dd->dfs_node = debugfs_create_dir(dd->disk->disk_name, dfs_parent); | |
2747 | if (IS_ERR_OR_NULL(dd->dfs_node)) { | |
2748 | dev_warn(&dd->pdev->dev, | |
2749 | "Error creating node %s under debugfs\n", | |
2750 | dd->disk->disk_name); | |
2751 | dd->dfs_node = NULL; | |
2752 | return -1; | |
2753 | } | |
2754 | ||
2755 | debugfs_create_file("flags", S_IRUGO, dd->dfs_node, dd, | |
2756 | &mtip_flags_fops); | |
2757 | debugfs_create_file("registers", S_IRUGO, dd->dfs_node, dd, | |
2758 | &mtip_regs_fops); | |
2759 | ||
2760 | return 0; | |
2761 | } | |
2762 | ||
2763 | static void mtip_hw_debugfs_exit(struct driver_data *dd) | |
2764 | { | |
974a51a2 SB |
2765 | if (dd->dfs_node) |
2766 | debugfs_remove_recursive(dd->dfs_node); | |
7b421d24 AT |
2767 | } |
2768 | ||
88523a61 SB |
2769 | /* |
2770 | * Perform any init/resume time hardware setup | |
2771 | * | |
2772 | * @dd Pointer to the driver data structure. | |
2773 | * | |
2774 | * return value | |
2775 | * None | |
2776 | */ | |
2777 | static inline void hba_setup(struct driver_data *dd) | |
2778 | { | |
2779 | u32 hwdata; | |
2780 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2781 | ||
2782 | /* interrupt bug workaround: use only 1 IS bit.*/ | |
2783 | writel(hwdata | | |
2784 | HSORG_DISABLE_SLOTGRP_INTR | | |
2785 | HSORG_DISABLE_SLOTGRP_PXIS, | |
2786 | dd->mmio + HOST_HSORG); | |
2787 | } | |
2788 | ||
2077d947 AT |
2789 | static int mtip_device_unaligned_constrained(struct driver_data *dd) |
2790 | { | |
2791 | return (dd->pdev->device == P420M_DEVICE_ID ? 1 : 0); | |
2792 | } | |
2793 | ||
88523a61 SB |
2794 | /* |
2795 | * Detect the details of the product, and store anything needed | |
2796 | * into the driver data structure. This includes product type and | |
2797 | * version and number of slot groups. | |
2798 | * | |
2799 | * @dd Pointer to the driver data structure. | |
2800 | * | |
2801 | * return value | |
2802 | * None | |
2803 | */ | |
2804 | static void mtip_detect_product(struct driver_data *dd) | |
2805 | { | |
2806 | u32 hwdata; | |
2807 | unsigned int rev, slotgroups; | |
2808 | ||
2809 | /* | |
2810 | * HBA base + 0xFC [15:0] - vendor-specific hardware interface | |
2811 | * info register: | |
2812 | * [15:8] hardware/software interface rev# | |
2813 | * [ 3] asic-style interface | |
2814 | * [ 2:0] number of slot groups, minus 1 (only valid for asic-style). | |
2815 | */ | |
2816 | hwdata = readl(dd->mmio + HOST_HSORG); | |
2817 | ||
2818 | dd->product_type = MTIP_PRODUCT_UNKNOWN; | |
2819 | dd->slot_groups = 1; | |
2820 | ||
2821 | if (hwdata & 0x8) { | |
2822 | dd->product_type = MTIP_PRODUCT_ASICFPGA; | |
2823 | rev = (hwdata & HSORG_HWREV) >> 8; | |
2824 | slotgroups = (hwdata & HSORG_SLOTGROUPS) + 1; | |
2825 | dev_info(&dd->pdev->dev, | |
2826 | "ASIC-FPGA design, HS rev 0x%x, " | |
2827 | "%i slot groups [%i slots]\n", | |
2828 | rev, | |
2829 | slotgroups, | |
2830 | slotgroups * 32); | |
2831 | ||
2832 | if (slotgroups > MTIP_MAX_SLOT_GROUPS) { | |
2833 | dev_warn(&dd->pdev->dev, | |
2834 | "Warning: driver only supports " | |
2835 | "%i slot groups.\n", MTIP_MAX_SLOT_GROUPS); | |
2836 | slotgroups = MTIP_MAX_SLOT_GROUPS; | |
2837 | } | |
2838 | dd->slot_groups = slotgroups; | |
2839 | return; | |
2840 | } | |
2841 | ||
2842 | dev_warn(&dd->pdev->dev, "Unrecognized product id\n"); | |
2843 | } | |
2844 | ||
2845 | /* | |
2846 | * Blocking wait for FTL rebuild to complete | |
2847 | * | |
2848 | * @dd Pointer to the DRIVER_DATA structure. | |
2849 | * | |
2850 | * return value | |
2851 | * 0 FTL rebuild completed successfully | |
2852 | * -EFAULT FTL rebuild error/timeout/interruption | |
2853 | */ | |
2854 | static int mtip_ftl_rebuild_poll(struct driver_data *dd) | |
2855 | { | |
2856 | unsigned long timeout, cnt = 0, start; | |
2857 | ||
2858 | dev_warn(&dd->pdev->dev, | |
2859 | "FTL rebuild in progress. Polling for completion.\n"); | |
2860 | ||
2861 | start = jiffies; | |
88523a61 SB |
2862 | timeout = jiffies + msecs_to_jiffies(MTIP_FTL_REBUILD_TIMEOUT_MS); |
2863 | ||
2864 | do { | |
8a857a88 | 2865 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 AT |
2866 | &dd->dd_flag))) |
2867 | return -EFAULT; | |
88523a61 SB |
2868 | if (mtip_check_surprise_removal(dd->pdev)) |
2869 | return -EFAULT; | |
60ec0eec | 2870 | |
88523a61 SB |
2871 | if (mtip_get_identify(dd->port, NULL) < 0) |
2872 | return -EFAULT; | |
2873 | ||
2874 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == | |
2875 | MTIP_FTL_REBUILD_MAGIC) { | |
2876 | ssleep(1); | |
2877 | /* Print message every 3 minutes */ | |
2878 | if (cnt++ >= 180) { | |
2879 | dev_warn(&dd->pdev->dev, | |
2880 | "FTL rebuild in progress (%d secs).\n", | |
2881 | jiffies_to_msecs(jiffies - start) / 1000); | |
2882 | cnt = 0; | |
2883 | } | |
2884 | } else { | |
2885 | dev_warn(&dd->pdev->dev, | |
2886 | "FTL rebuild complete (%d secs).\n", | |
2887 | jiffies_to_msecs(jiffies - start) / 1000); | |
62ee8c13 | 2888 | mtip_block_initialize(dd); |
45038367 | 2889 | return 0; |
88523a61 | 2890 | } |
88523a61 SB |
2891 | } while (time_before(jiffies, timeout)); |
2892 | ||
2893 | /* Check for timeout */ | |
45038367 | 2894 | dev_err(&dd->pdev->dev, |
88523a61 SB |
2895 | "Timed out waiting for FTL rebuild to complete (%d secs).\n", |
2896 | jiffies_to_msecs(jiffies - start) / 1000); | |
45038367 | 2897 | return -EFAULT; |
88523a61 SB |
2898 | } |
2899 | ||
60ec0eec AT |
2900 | /* |
2901 | * service thread to issue queued commands | |
2902 | * | |
2903 | * @data Pointer to the driver data structure. | |
2904 | * | |
2905 | * return value | |
2906 | * 0 | |
2907 | */ | |
2908 | ||
2909 | static int mtip_service_thread(void *data) | |
2910 | { | |
2911 | struct driver_data *dd = (struct driver_data *)data; | |
2912 | unsigned long slot, slot_start, slot_wrap; | |
2913 | unsigned int num_cmd_slots = dd->slot_groups * 32; | |
2914 | struct mtip_port *port = dd->port; | |
2915 | ||
2916 | while (1) { | |
9b204fbf AT |
2917 | if (kthread_should_stop() || |
2918 | test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) | |
2919 | goto st_out; | |
2920 | clear_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); | |
2921 | ||
60ec0eec AT |
2922 | /* |
2923 | * the condition is to check neither an internal command is | |
2924 | * is in progress nor error handling is active | |
2925 | */ | |
2926 | wait_event_interruptible(port->svc_wait, (port->flags) && | |
c74b0f58 | 2927 | !(port->flags & MTIP_PF_PAUSE_IO)); |
60ec0eec | 2928 | |
8f8b8995 AT |
2929 | set_bit(MTIP_PF_SVC_THD_ACTIVE_BIT, &port->flags); |
2930 | ||
9b204fbf AT |
2931 | if (kthread_should_stop() || |
2932 | test_bit(MTIP_PF_SVC_THD_STOP_BIT, &port->flags)) | |
2933 | goto st_out; | |
2934 | ||
8a857a88 | 2935 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, |
45038367 | 2936 | &dd->dd_flag))) |
8f8b8995 | 2937 | goto st_out; |
c74b0f58 | 2938 | |
9b204fbf AT |
2939 | restart_eh: |
2940 | /* Demux bits: start with error handling */ | |
2941 | if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) { | |
2942 | mtip_handle_tfe(dd); | |
2943 | clear_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags); | |
2944 | } | |
2945 | ||
2946 | if (test_bit(MTIP_PF_EH_ACTIVE_BIT, &port->flags)) | |
2947 | goto restart_eh; | |
2948 | ||
8a857a88 | 2949 | if (test_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags)) { |
60ec0eec AT |
2950 | slot = 1; |
2951 | /* used to restrict the loop to one iteration */ | |
2952 | slot_start = num_cmd_slots; | |
2953 | slot_wrap = 0; | |
2954 | while (1) { | |
2955 | slot = find_next_bit(port->cmds_to_issue, | |
2956 | num_cmd_slots, slot); | |
2957 | if (slot_wrap == 1) { | |
2958 | if ((slot_start >= slot) || | |
2959 | (slot >= num_cmd_slots)) | |
2960 | break; | |
2961 | } | |
2962 | if (unlikely(slot_start == num_cmd_slots)) | |
2963 | slot_start = slot; | |
2964 | ||
2965 | if (unlikely(slot == num_cmd_slots)) { | |
2966 | slot = 1; | |
2967 | slot_wrap = 1; | |
2968 | continue; | |
2969 | } | |
2970 | ||
2971 | /* Issue the command to the hardware */ | |
2972 | mtip_issue_ncq_command(port, slot); | |
2973 | ||
60ec0eec AT |
2974 | clear_bit(slot, port->cmds_to_issue); |
2975 | } | |
2976 | ||
8a857a88 | 2977 | clear_bit(MTIP_PF_ISSUE_CMDS_BIT, &port->flags); |
9b204fbf AT |
2978 | } |
2979 | ||
2980 | if (test_bit(MTIP_PF_REBUILD_BIT, &port->flags)) { | |
8f8b8995 | 2981 | if (mtip_ftl_rebuild_poll(dd) < 0) |
8a857a88 | 2982 | set_bit(MTIP_DDF_REBUILD_FAILED_BIT, |
8182b495 | 2983 | &dd->dd_flag); |
8a857a88 | 2984 | clear_bit(MTIP_PF_REBUILD_BIT, &port->flags); |
60ec0eec | 2985 | } |
8f8b8995 AT |
2986 | } |
2987 | ||
8f8b8995 | 2988 | st_out: |
60ec0eec AT |
2989 | return 0; |
2990 | } | |
2991 | ||
188b9f49 SB |
2992 | /* |
2993 | * DMA region teardown | |
2994 | * | |
2995 | * @dd Pointer to driver_data structure | |
2996 | * | |
2997 | * return value | |
2998 | * None | |
2999 | */ | |
3000 | static void mtip_dma_free(struct driver_data *dd) | |
3001 | { | |
188b9f49 SB |
3002 | struct mtip_port *port = dd->port; |
3003 | ||
3004 | if (port->block1) | |
3005 | dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3006 | port->block1, port->block1_dma); | |
3007 | ||
3008 | if (port->command_list) { | |
3009 | dmam_free_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, | |
3010 | port->command_list, port->command_list_dma); | |
3011 | } | |
188b9f49 SB |
3012 | } |
3013 | ||
3014 | /* | |
3015 | * DMA region setup | |
3016 | * | |
3017 | * @dd Pointer to driver_data structure | |
3018 | * | |
3019 | * return value | |
3020 | * -ENOMEM Not enough free DMA region space to initialize driver | |
3021 | */ | |
3022 | static int mtip_dma_alloc(struct driver_data *dd) | |
3023 | { | |
3024 | struct mtip_port *port = dd->port; | |
188b9f49 SB |
3025 | |
3026 | /* Allocate dma memory for RX Fis, Identify, and Sector Bufffer */ | |
3027 | port->block1 = | |
3028 | dmam_alloc_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3029 | &port->block1_dma, GFP_KERNEL); | |
3030 | if (!port->block1) | |
3031 | return -ENOMEM; | |
3032 | memset(port->block1, 0, BLOCK_DMA_ALLOC_SZ); | |
3033 | ||
3034 | /* Allocate dma memory for command list */ | |
3035 | port->command_list = | |
3036 | dmam_alloc_coherent(&dd->pdev->dev, AHCI_CMD_TBL_SZ, | |
3037 | &port->command_list_dma, GFP_KERNEL); | |
3038 | if (!port->command_list) { | |
3039 | dmam_free_coherent(&dd->pdev->dev, BLOCK_DMA_ALLOC_SZ, | |
3040 | port->block1, port->block1_dma); | |
3041 | port->block1 = NULL; | |
3042 | port->block1_dma = 0; | |
3043 | return -ENOMEM; | |
3044 | } | |
3045 | memset(port->command_list, 0, AHCI_CMD_TBL_SZ); | |
3046 | ||
3047 | /* Setup all pointers into first DMA region */ | |
3048 | port->rxfis = port->block1 + AHCI_RX_FIS_OFFSET; | |
3049 | port->rxfis_dma = port->block1_dma + AHCI_RX_FIS_OFFSET; | |
3050 | port->identify = port->block1 + AHCI_IDFY_OFFSET; | |
3051 | port->identify_dma = port->block1_dma + AHCI_IDFY_OFFSET; | |
3052 | port->log_buf = port->block1 + AHCI_SECTBUF_OFFSET; | |
3053 | port->log_buf_dma = port->block1_dma + AHCI_SECTBUF_OFFSET; | |
3054 | port->smart_buf = port->block1 + AHCI_SMARTBUF_OFFSET; | |
3055 | port->smart_buf_dma = port->block1_dma + AHCI_SMARTBUF_OFFSET; | |
3056 | ||
ffc771b3 JA |
3057 | return 0; |
3058 | } | |
188b9f49 | 3059 | |
ffc771b3 JA |
3060 | static int mtip_hw_get_identify(struct driver_data *dd) |
3061 | { | |
3062 | struct smart_attr attr242; | |
3063 | unsigned char *buf; | |
3064 | int rv; | |
188b9f49 | 3065 | |
ffc771b3 JA |
3066 | if (mtip_get_identify(dd->port, NULL) < 0) |
3067 | return -EFAULT; | |
188b9f49 | 3068 | |
ffc771b3 JA |
3069 | if (*(dd->port->identify + MTIP_FTL_REBUILD_OFFSET) == |
3070 | MTIP_FTL_REBUILD_MAGIC) { | |
3071 | set_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags); | |
3072 | return MTIP_FTL_REBUILD_MAGIC; | |
3073 | } | |
3074 | mtip_dump_identify(dd->port); | |
188b9f49 | 3075 | |
ffc771b3 JA |
3076 | /* check write protect, over temp and rebuild statuses */ |
3077 | rv = mtip_read_log_page(dd->port, ATA_LOG_SATA_NCQ, | |
3078 | dd->port->log_buf, | |
3079 | dd->port->log_buf_dma, 1); | |
3080 | if (rv) { | |
3081 | dev_warn(&dd->pdev->dev, | |
3082 | "Error in READ LOG EXT (10h) command\n"); | |
3083 | /* non-critical error, don't fail the load */ | |
3084 | } else { | |
3085 | buf = (unsigned char *)dd->port->log_buf; | |
3086 | if (buf[259] & 0x1) { | |
3087 | dev_info(&dd->pdev->dev, | |
3088 | "Write protect bit is set.\n"); | |
3089 | set_bit(MTIP_DDF_WRITE_PROTECT_BIT, &dd->dd_flag); | |
3090 | } | |
3091 | if (buf[288] == 0xF7) { | |
3092 | dev_info(&dd->pdev->dev, | |
3093 | "Exceeded Tmax, drive in thermal shutdown.\n"); | |
3094 | set_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag); | |
3095 | } | |
3096 | if (buf[288] == 0xBF) { | |
3097 | dev_info(&dd->pdev->dev, | |
3098 | "Drive indicates rebuild has failed.\n"); | |
3099 | /* TODO */ | |
3100 | } | |
188b9f49 | 3101 | } |
ffc771b3 JA |
3102 | |
3103 | /* get write protect progess */ | |
3104 | memset(&attr242, 0, sizeof(struct smart_attr)); | |
3105 | if (mtip_get_smart_attr(dd->port, 242, &attr242)) | |
3106 | dev_warn(&dd->pdev->dev, | |
3107 | "Unable to check write protect progress\n"); | |
3108 | else | |
3109 | dev_info(&dd->pdev->dev, | |
3110 | "Write protect progress: %u%% (%u blocks)\n", | |
3111 | attr242.cur, le32_to_cpu(attr242.data)); | |
3112 | ||
3113 | return rv; | |
188b9f49 SB |
3114 | } |
3115 | ||
88523a61 SB |
3116 | /* |
3117 | * Called once for each card. | |
3118 | * | |
3119 | * @dd Pointer to the driver data structure. | |
3120 | * | |
3121 | * return value | |
3122 | * 0 on success, else an error code. | |
3123 | */ | |
6316668f | 3124 | static int mtip_hw_init(struct driver_data *dd) |
88523a61 SB |
3125 | { |
3126 | int i; | |
3127 | int rv; | |
3128 | unsigned int num_command_slots; | |
45038367 | 3129 | unsigned long timeout, timetaken; |
88523a61 SB |
3130 | |
3131 | dd->mmio = pcim_iomap_table(dd->pdev)[MTIP_ABAR]; | |
3132 | ||
3133 | mtip_detect_product(dd); | |
3134 | if (dd->product_type == MTIP_PRODUCT_UNKNOWN) { | |
3135 | rv = -EIO; | |
3136 | goto out1; | |
3137 | } | |
3138 | num_command_slots = dd->slot_groups * 32; | |
3139 | ||
3140 | hba_setup(dd); | |
3141 | ||
16c906e5 AT |
3142 | dd->port = kzalloc_node(sizeof(struct mtip_port), GFP_KERNEL, |
3143 | dd->numa_node); | |
88523a61 SB |
3144 | if (!dd->port) { |
3145 | dev_err(&dd->pdev->dev, | |
3146 | "Memory allocation: port structure\n"); | |
3147 | return -ENOMEM; | |
3148 | } | |
3149 | ||
16c906e5 AT |
3150 | /* Continue workqueue setup */ |
3151 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) | |
3152 | dd->work[i].port = dd->port; | |
3153 | ||
2077d947 AT |
3154 | /* Enable unaligned IO constraints for some devices */ |
3155 | if (mtip_device_unaligned_constrained(dd)) | |
3156 | dd->unal_qdepth = MTIP_MAX_UNALIGNED_SLOTS; | |
3157 | else | |
3158 | dd->unal_qdepth = 0; | |
3159 | ||
2077d947 | 3160 | sema_init(&dd->port->cmd_slot_unal, dd->unal_qdepth); |
88523a61 SB |
3161 | |
3162 | /* Spinlock to prevent concurrent issue */ | |
16c906e5 AT |
3163 | for (i = 0; i < MTIP_MAX_SLOT_GROUPS; i++) |
3164 | spin_lock_init(&dd->port->cmd_issue_lock[i]); | |
88523a61 SB |
3165 | |
3166 | /* Set the port mmio base address. */ | |
3167 | dd->port->mmio = dd->mmio + PORT_OFFSET; | |
3168 | dd->port->dd = dd; | |
3169 | ||
188b9f49 SB |
3170 | /* DMA allocations */ |
3171 | rv = mtip_dma_alloc(dd); | |
3172 | if (rv < 0) | |
88523a61 | 3173 | goto out1; |
88523a61 SB |
3174 | |
3175 | /* Setup the pointers to the extended s_active and CI registers. */ | |
3176 | for (i = 0; i < dd->slot_groups; i++) { | |
3177 | dd->port->s_active[i] = | |
3178 | dd->port->mmio + i*0x80 + PORT_SCR_ACT; | |
3179 | dd->port->cmd_issue[i] = | |
3180 | dd->port->mmio + i*0x80 + PORT_COMMAND_ISSUE; | |
3181 | dd->port->completed[i] = | |
3182 | dd->port->mmio + i*0x80 + PORT_SDBV; | |
3183 | } | |
3184 | ||
45038367 AT |
3185 | timetaken = jiffies; |
3186 | timeout = jiffies + msecs_to_jiffies(30000); | |
3187 | while (((readl(dd->port->mmio + PORT_SCR_STAT) & 0x0F) != 0x03) && | |
3188 | time_before(jiffies, timeout)) { | |
3189 | mdelay(100); | |
3190 | } | |
3191 | if (unlikely(mtip_check_surprise_removal(dd->pdev))) { | |
3192 | timetaken = jiffies - timetaken; | |
3193 | dev_warn(&dd->pdev->dev, | |
3194 | "Surprise removal detected at %u ms\n", | |
3195 | jiffies_to_msecs(timetaken)); | |
3196 | rv = -ENODEV; | |
3197 | goto out2 ; | |
3198 | } | |
8a857a88 | 3199 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) { |
45038367 AT |
3200 | timetaken = jiffies - timetaken; |
3201 | dev_warn(&dd->pdev->dev, | |
3202 | "Removal detected at %u ms\n", | |
3203 | jiffies_to_msecs(timetaken)); | |
3204 | rv = -EFAULT; | |
88523a61 SB |
3205 | goto out2; |
3206 | } | |
3207 | ||
45038367 AT |
3208 | /* Conditionally reset the HBA. */ |
3209 | if (!(readl(dd->mmio + HOST_CAP) & HOST_CAP_NZDMA)) { | |
3210 | if (mtip_hba_reset(dd) < 0) { | |
3211 | dev_err(&dd->pdev->dev, | |
3212 | "Card did not reset within timeout\n"); | |
3213 | rv = -EIO; | |
3214 | goto out2; | |
3215 | } | |
3216 | } else { | |
3217 | /* Clear any pending interrupts on the HBA */ | |
3218 | writel(readl(dd->mmio + HOST_IRQ_STAT), | |
3219 | dd->mmio + HOST_IRQ_STAT); | |
3220 | } | |
3221 | ||
88523a61 SB |
3222 | mtip_init_port(dd->port); |
3223 | mtip_start_port(dd->port); | |
3224 | ||
3225 | /* Setup the ISR and enable interrupts. */ | |
3226 | rv = devm_request_irq(&dd->pdev->dev, | |
3227 | dd->pdev->irq, | |
3228 | mtip_irq_handler, | |
3229 | IRQF_SHARED, | |
3230 | dev_driver_string(&dd->pdev->dev), | |
3231 | dd); | |
3232 | ||
3233 | if (rv) { | |
3234 | dev_err(&dd->pdev->dev, | |
3235 | "Unable to allocate IRQ %d\n", dd->pdev->irq); | |
3236 | goto out2; | |
3237 | } | |
16c906e5 | 3238 | irq_set_affinity_hint(dd->pdev->irq, get_cpu_mask(dd->isr_binding)); |
88523a61 SB |
3239 | |
3240 | /* Enable interrupts on the HBA. */ | |
3241 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3242 | dd->mmio + HOST_CTL); | |
3243 | ||
60ec0eec AT |
3244 | init_waitqueue_head(&dd->port->svc_wait); |
3245 | ||
8a857a88 | 3246 | if (test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag)) { |
45038367 AT |
3247 | rv = -EFAULT; |
3248 | goto out3; | |
3249 | } | |
3250 | ||
88523a61 SB |
3251 | return rv; |
3252 | ||
3253 | out3: | |
88523a61 SB |
3254 | /* Disable interrupts on the HBA. */ |
3255 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3256 | dd->mmio + HOST_CTL); | |
3257 | ||
16c906e5 AT |
3258 | /* Release the IRQ. */ |
3259 | irq_set_affinity_hint(dd->pdev->irq, NULL); | |
88523a61 SB |
3260 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
3261 | ||
3262 | out2: | |
3263 | mtip_deinit_port(dd->port); | |
188b9f49 | 3264 | mtip_dma_free(dd); |
88523a61 | 3265 | |
88523a61 SB |
3266 | out1: |
3267 | /* Free the memory allocated for the for structure. */ | |
3268 | kfree(dd->port); | |
3269 | ||
3270 | return rv; | |
3271 | } | |
3272 | ||
ffc771b3 JA |
3273 | static void mtip_standby_drive(struct driver_data *dd) |
3274 | { | |
3275 | if (dd->sr) | |
3276 | return; | |
3277 | ||
3278 | /* | |
3279 | * Send standby immediate (E0h) to the drive so that it | |
3280 | * saves its state. | |
3281 | */ | |
3282 | if (!test_bit(MTIP_PF_REBUILD_BIT, &dd->port->flags) && | |
3283 | !test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag)) | |
3284 | if (mtip_standby_immediate(dd->port)) | |
3285 | dev_warn(&dd->pdev->dev, | |
3286 | "STANDBY IMMEDIATE failed\n"); | |
3287 | } | |
3288 | ||
88523a61 SB |
3289 | /* |
3290 | * Called to deinitialize an interface. | |
3291 | * | |
3292 | * @dd Pointer to the driver data structure. | |
3293 | * | |
3294 | * return value | |
3295 | * 0 | |
3296 | */ | |
6316668f | 3297 | static int mtip_hw_exit(struct driver_data *dd) |
88523a61 SB |
3298 | { |
3299 | /* | |
3300 | * Send standby immediate (E0h) to the drive so that it | |
3301 | * saves its state. | |
3302 | */ | |
8f8b8995 | 3303 | if (!dd->sr) { |
88523a61 SB |
3304 | /* de-initialize the port. */ |
3305 | mtip_deinit_port(dd->port); | |
3306 | ||
3307 | /* Disable interrupts on the HBA. */ | |
3308 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3309 | dd->mmio + HOST_CTL); | |
3310 | } | |
3311 | ||
88523a61 | 3312 | /* Release the IRQ. */ |
16c906e5 | 3313 | irq_set_affinity_hint(dd->pdev->irq, NULL); |
88523a61 | 3314 | devm_free_irq(&dd->pdev->dev, dd->pdev->irq, dd); |
2132a544 | 3315 | msleep(1000); |
88523a61 | 3316 | |
188b9f49 SB |
3317 | /* Free dma regions */ |
3318 | mtip_dma_free(dd); | |
3319 | ||
88523a61 SB |
3320 | /* Free the memory allocated for the for structure. */ |
3321 | kfree(dd->port); | |
8f8b8995 | 3322 | dd->port = NULL; |
88523a61 SB |
3323 | |
3324 | return 0; | |
3325 | } | |
3326 | ||
3327 | /* | |
3328 | * Issue a Standby Immediate command to the device. | |
3329 | * | |
3330 | * This function is called by the Block Layer just before the | |
3331 | * system powers off during a shutdown. | |
3332 | * | |
3333 | * @dd Pointer to the driver data structure. | |
3334 | * | |
3335 | * return value | |
3336 | * 0 | |
3337 | */ | |
6316668f | 3338 | static int mtip_hw_shutdown(struct driver_data *dd) |
88523a61 SB |
3339 | { |
3340 | /* | |
3341 | * Send standby immediate (E0h) to the drive so that it | |
3342 | * saves its state. | |
3343 | */ | |
8f8b8995 AT |
3344 | if (!dd->sr && dd->port) |
3345 | mtip_standby_immediate(dd->port); | |
88523a61 SB |
3346 | |
3347 | return 0; | |
3348 | } | |
3349 | ||
3350 | /* | |
3351 | * Suspend function | |
3352 | * | |
3353 | * This function is called by the Block Layer just before the | |
3354 | * system hibernates. | |
3355 | * | |
3356 | * @dd Pointer to the driver data structure. | |
3357 | * | |
3358 | * return value | |
3359 | * 0 Suspend was successful | |
3360 | * -EFAULT Suspend was not successful | |
3361 | */ | |
6316668f | 3362 | static int mtip_hw_suspend(struct driver_data *dd) |
88523a61 SB |
3363 | { |
3364 | /* | |
3365 | * Send standby immediate (E0h) to the drive | |
3366 | * so that it saves its state. | |
3367 | */ | |
3368 | if (mtip_standby_immediate(dd->port) != 0) { | |
3369 | dev_err(&dd->pdev->dev, | |
3370 | "Failed standby-immediate command\n"); | |
3371 | return -EFAULT; | |
3372 | } | |
3373 | ||
3374 | /* Disable interrupts on the HBA.*/ | |
3375 | writel(readl(dd->mmio + HOST_CTL) & ~HOST_IRQ_EN, | |
3376 | dd->mmio + HOST_CTL); | |
3377 | mtip_deinit_port(dd->port); | |
3378 | ||
3379 | return 0; | |
3380 | } | |
3381 | ||
3382 | /* | |
3383 | * Resume function | |
3384 | * | |
3385 | * This function is called by the Block Layer as the | |
3386 | * system resumes. | |
3387 | * | |
3388 | * @dd Pointer to the driver data structure. | |
3389 | * | |
3390 | * return value | |
3391 | * 0 Resume was successful | |
3392 | * -EFAULT Resume was not successful | |
3393 | */ | |
6316668f | 3394 | static int mtip_hw_resume(struct driver_data *dd) |
88523a61 SB |
3395 | { |
3396 | /* Perform any needed hardware setup steps */ | |
3397 | hba_setup(dd); | |
3398 | ||
3399 | /* Reset the HBA */ | |
3400 | if (mtip_hba_reset(dd) != 0) { | |
3401 | dev_err(&dd->pdev->dev, | |
3402 | "Unable to reset the HBA\n"); | |
3403 | return -EFAULT; | |
3404 | } | |
3405 | ||
3406 | /* | |
3407 | * Enable the port, DMA engine, and FIS reception specific | |
3408 | * h/w in controller. | |
3409 | */ | |
3410 | mtip_init_port(dd->port); | |
3411 | mtip_start_port(dd->port); | |
3412 | ||
3413 | /* Enable interrupts on the HBA.*/ | |
3414 | writel(readl(dd->mmio + HOST_CTL) | HOST_IRQ_EN, | |
3415 | dd->mmio + HOST_CTL); | |
3416 | ||
3417 | return 0; | |
3418 | } | |
3419 | ||
88523a61 SB |
3420 | /* |
3421 | * Helper function for reusing disk name | |
3422 | * upon hot insertion. | |
3423 | */ | |
3424 | static int rssd_disk_name_format(char *prefix, | |
3425 | int index, | |
3426 | char *buf, | |
3427 | int buflen) | |
3428 | { | |
3429 | const int base = 'z' - 'a' + 1; | |
3430 | char *begin = buf + strlen(prefix); | |
3431 | char *end = buf + buflen; | |
3432 | char *p; | |
3433 | int unit; | |
3434 | ||
3435 | p = end - 1; | |
3436 | *p = '\0'; | |
3437 | unit = base; | |
3438 | do { | |
3439 | if (p == begin) | |
3440 | return -EINVAL; | |
3441 | *--p = 'a' + (index % unit); | |
3442 | index = (index / unit) - 1; | |
3443 | } while (index >= 0); | |
3444 | ||
3445 | memmove(begin, p, end - p); | |
3446 | memcpy(buf, prefix, strlen(prefix)); | |
3447 | ||
3448 | return 0; | |
3449 | } | |
3450 | ||
3451 | /* | |
3452 | * Block layer IOCTL handler. | |
3453 | * | |
3454 | * @dev Pointer to the block_device structure. | |
3455 | * @mode ignored | |
3456 | * @cmd IOCTL command passed from the user application. | |
3457 | * @arg Argument passed from the user application. | |
3458 | * | |
3459 | * return value | |
3460 | * 0 IOCTL completed successfully. | |
3461 | * -ENOTTY IOCTL not supported or invalid driver data | |
3462 | * structure pointer. | |
3463 | */ | |
3464 | static int mtip_block_ioctl(struct block_device *dev, | |
3465 | fmode_t mode, | |
3466 | unsigned cmd, | |
3467 | unsigned long arg) | |
3468 | { | |
3469 | struct driver_data *dd = dev->bd_disk->private_data; | |
3470 | ||
3471 | if (!capable(CAP_SYS_ADMIN)) | |
3472 | return -EACCES; | |
3473 | ||
3474 | if (!dd) | |
3475 | return -ENOTTY; | |
3476 | ||
8a857a88 | 3477 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3478 | return -ENOTTY; |
3479 | ||
88523a61 SB |
3480 | switch (cmd) { |
3481 | case BLKFLSBUF: | |
60ec0eec | 3482 | return -ENOTTY; |
88523a61 | 3483 | default: |
ef0f1587 | 3484 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3485 | } |
3486 | } | |
3487 | ||
16d02c04 | 3488 | #ifdef CONFIG_COMPAT |
88523a61 SB |
3489 | /* |
3490 | * Block layer compat IOCTL handler. | |
3491 | * | |
3492 | * @dev Pointer to the block_device structure. | |
3493 | * @mode ignored | |
3494 | * @cmd IOCTL command passed from the user application. | |
3495 | * @arg Argument passed from the user application. | |
3496 | * | |
3497 | * return value | |
3498 | * 0 IOCTL completed successfully. | |
3499 | * -ENOTTY IOCTL not supported or invalid driver data | |
3500 | * structure pointer. | |
3501 | */ | |
3502 | static int mtip_block_compat_ioctl(struct block_device *dev, | |
3503 | fmode_t mode, | |
3504 | unsigned cmd, | |
3505 | unsigned long arg) | |
3506 | { | |
3507 | struct driver_data *dd = dev->bd_disk->private_data; | |
3508 | ||
3509 | if (!capable(CAP_SYS_ADMIN)) | |
3510 | return -EACCES; | |
3511 | ||
3512 | if (!dd) | |
3513 | return -ENOTTY; | |
3514 | ||
8a857a88 | 3515 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag))) |
45038367 AT |
3516 | return -ENOTTY; |
3517 | ||
88523a61 SB |
3518 | switch (cmd) { |
3519 | case BLKFLSBUF: | |
60ec0eec | 3520 | return -ENOTTY; |
ef0f1587 | 3521 | case HDIO_DRIVE_TASKFILE: { |
60ec0eec | 3522 | struct mtip_compat_ide_task_request_s __user *compat_req_task; |
ef0f1587 JA |
3523 | ide_task_request_t req_task; |
3524 | int compat_tasksize, outtotal, ret; | |
3525 | ||
60ec0eec AT |
3526 | compat_tasksize = |
3527 | sizeof(struct mtip_compat_ide_task_request_s); | |
ef0f1587 JA |
3528 | |
3529 | compat_req_task = | |
3530 | (struct mtip_compat_ide_task_request_s __user *) arg; | |
3531 | ||
3532 | if (copy_from_user(&req_task, (void __user *) arg, | |
60ec0eec | 3533 | compat_tasksize - (2 * sizeof(compat_long_t)))) |
ef0f1587 JA |
3534 | return -EFAULT; |
3535 | ||
3536 | if (get_user(req_task.out_size, &compat_req_task->out_size)) | |
3537 | return -EFAULT; | |
3538 | ||
3539 | if (get_user(req_task.in_size, &compat_req_task->in_size)) | |
3540 | return -EFAULT; | |
3541 | ||
3542 | outtotal = sizeof(struct mtip_compat_ide_task_request_s); | |
3543 | ||
3544 | ret = exec_drive_taskfile(dd, (void __user *) arg, | |
3545 | &req_task, outtotal); | |
3546 | ||
3547 | if (copy_to_user((void __user *) arg, &req_task, | |
3548 | compat_tasksize - | |
3549 | (2 * sizeof(compat_long_t)))) | |
3550 | return -EFAULT; | |
3551 | ||
3552 | if (put_user(req_task.out_size, &compat_req_task->out_size)) | |
3553 | return -EFAULT; | |
3554 | ||
3555 | if (put_user(req_task.in_size, &compat_req_task->in_size)) | |
3556 | return -EFAULT; | |
3557 | ||
3558 | return ret; | |
3559 | } | |
88523a61 | 3560 | default: |
ef0f1587 | 3561 | return mtip_hw_ioctl(dd, cmd, arg); |
88523a61 SB |
3562 | } |
3563 | } | |
16d02c04 | 3564 | #endif |
88523a61 SB |
3565 | |
3566 | /* | |
3567 | * Obtain the geometry of the device. | |
3568 | * | |
3569 | * You may think that this function is obsolete, but some applications, | |
3570 | * fdisk for example still used CHS values. This function describes the | |
3571 | * device as having 224 heads and 56 sectors per cylinder. These values are | |
3572 | * chosen so that each cylinder is aligned on a 4KB boundary. Since a | |
3573 | * partition is described in terms of a start and end cylinder this means | |
3574 | * that each partition is also 4KB aligned. Non-aligned partitions adversely | |
3575 | * affects performance. | |
3576 | * | |
3577 | * @dev Pointer to the block_device strucutre. | |
3578 | * @geo Pointer to a hd_geometry structure. | |
3579 | * | |
3580 | * return value | |
3581 | * 0 Operation completed successfully. | |
3582 | * -ENOTTY An error occurred while reading the drive capacity. | |
3583 | */ | |
3584 | static int mtip_block_getgeo(struct block_device *dev, | |
3585 | struct hd_geometry *geo) | |
3586 | { | |
3587 | struct driver_data *dd = dev->bd_disk->private_data; | |
3588 | sector_t capacity; | |
3589 | ||
3590 | if (!dd) | |
3591 | return -ENOTTY; | |
3592 | ||
3593 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3594 | dev_warn(&dd->pdev->dev, | |
3595 | "Could not get drive capacity.\n"); | |
3596 | return -ENOTTY; | |
3597 | } | |
3598 | ||
3599 | geo->heads = 224; | |
3600 | geo->sectors = 56; | |
60ec0eec | 3601 | sector_div(capacity, (geo->heads * geo->sectors)); |
88523a61 | 3602 | geo->cylinders = capacity; |
88523a61 SB |
3603 | return 0; |
3604 | } | |
3605 | ||
3606 | /* | |
3607 | * Block device operation function. | |
3608 | * | |
3609 | * This structure contains pointers to the functions required by the block | |
3610 | * layer. | |
3611 | */ | |
3612 | static const struct block_device_operations mtip_block_ops = { | |
3613 | .ioctl = mtip_block_ioctl, | |
16d02c04 | 3614 | #ifdef CONFIG_COMPAT |
88523a61 | 3615 | .compat_ioctl = mtip_block_compat_ioctl, |
16d02c04 | 3616 | #endif |
88523a61 SB |
3617 | .getgeo = mtip_block_getgeo, |
3618 | .owner = THIS_MODULE | |
3619 | }; | |
3620 | ||
686d8e0b ATS |
3621 | static inline bool is_se_active(struct driver_data *dd) |
3622 | { | |
3623 | if (unlikely(test_bit(MTIP_PF_SE_ACTIVE_BIT, &dd->port->flags))) { | |
3624 | if (dd->port->ic_pause_timer) { | |
3625 | unsigned long to = dd->port->ic_pause_timer + | |
3626 | msecs_to_jiffies(1000); | |
3627 | if (time_after(jiffies, to)) { | |
3628 | clear_bit(MTIP_PF_SE_ACTIVE_BIT, | |
3629 | &dd->port->flags); | |
3630 | clear_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag); | |
3631 | dd->port->ic_pause_timer = 0; | |
3632 | wake_up_interruptible(&dd->port->svc_wait); | |
3633 | return false; | |
3634 | } | |
3635 | } | |
3636 | return true; | |
3637 | } | |
3638 | return false; | |
3639 | } | |
3640 | ||
88523a61 SB |
3641 | /* |
3642 | * Block layer make request function. | |
3643 | * | |
3644 | * This function is called by the kernel to process a BIO for | |
3645 | * the P320 device. | |
3646 | * | |
3647 | * @queue Pointer to the request queue. Unused other than to obtain | |
3648 | * the driver data structure. | |
ffc771b3 | 3649 | * @rq Pointer to the request. |
88523a61 | 3650 | * |
88523a61 | 3651 | */ |
ffc771b3 | 3652 | static int mtip_submit_request(struct blk_mq_hw_ctx *hctx, struct request *rq) |
88523a61 | 3653 | { |
ffc771b3 JA |
3654 | struct driver_data *dd = hctx->queue->queuedata; |
3655 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3656 | unsigned int nents; | |
88523a61 | 3657 | |
686d8e0b ATS |
3658 | if (is_se_active(dd)) |
3659 | return -ENODATA; | |
3660 | ||
c74b0f58 AT |
3661 | if (unlikely(dd->dd_flag & MTIP_DDF_STOP_IO)) { |
3662 | if (unlikely(test_bit(MTIP_DDF_REMOVE_PENDING_BIT, | |
3663 | &dd->dd_flag))) { | |
ffc771b3 | 3664 | return -ENXIO; |
c74b0f58 AT |
3665 | } |
3666 | if (unlikely(test_bit(MTIP_DDF_OVER_TEMP_BIT, &dd->dd_flag))) { | |
ffc771b3 | 3667 | return -ENODATA; |
c74b0f58 AT |
3668 | } |
3669 | if (unlikely(test_bit(MTIP_DDF_WRITE_PROTECT_BIT, | |
3670 | &dd->dd_flag) && | |
ffc771b3 JA |
3671 | rq_data_dir(rq))) { |
3672 | return -ENODATA; | |
8f8b8995 | 3673 | } |
ffc771b3 JA |
3674 | if (unlikely(test_bit(MTIP_DDF_SEC_LOCK_BIT, &dd->dd_flag))) |
3675 | return -ENODATA; | |
3676 | if (test_bit(MTIP_DDF_REBUILD_FAILED_BIT, &dd->dd_flag)) | |
3677 | return -ENXIO; | |
45038367 AT |
3678 | } |
3679 | ||
ffc771b3 JA |
3680 | if (rq->cmd_flags & REQ_DISCARD) { |
3681 | int err; | |
15283469 | 3682 | |
ffc771b3 | 3683 | err = mtip_send_trim(dd, blk_rq_pos(rq), blk_rq_sectors(rq)); |
c8a446ad | 3684 | blk_mq_end_request(rq, err); |
ffc771b3 | 3685 | return 0; |
88523a61 SB |
3686 | } |
3687 | ||
ffc771b3 JA |
3688 | /* Create the scatter list for this request. */ |
3689 | nents = blk_rq_map_sg(hctx->queue, rq, cmd->sg); | |
3690 | ||
3691 | /* Issue the read/write. */ | |
3692 | mtip_hw_submit_io(dd, rq, cmd, nents, hctx); | |
3693 | return 0; | |
3694 | } | |
3695 | ||
3696 | static bool mtip_check_unal_depth(struct blk_mq_hw_ctx *hctx, | |
3697 | struct request *rq) | |
3698 | { | |
3699 | struct driver_data *dd = hctx->queue->queuedata; | |
3700 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3701 | ||
f45c40a9 | 3702 | if (rq_data_dir(rq) == READ || !dd->unal_qdepth) |
ffc771b3 JA |
3703 | return false; |
3704 | ||
3705 | /* | |
3706 | * If unaligned depth must be limited on this controller, mark it | |
3707 | * as unaligned if the IO isn't on a 4k boundary (start of length). | |
3708 | */ | |
3709 | if (blk_rq_sectors(rq) <= 64) { | |
3710 | if ((blk_rq_pos(rq) & 7) || (blk_rq_sectors(rq) & 7)) | |
3711 | cmd->unaligned = 1; | |
2077d947 AT |
3712 | } |
3713 | ||
ffc771b3 JA |
3714 | if (cmd->unaligned && down_trylock(&dd->port->cmd_slot_unal)) |
3715 | return true; | |
88523a61 | 3716 | |
ffc771b3 JA |
3717 | return false; |
3718 | } | |
88523a61 | 3719 | |
74c45052 JA |
3720 | static int mtip_queue_rq(struct blk_mq_hw_ctx *hctx, |
3721 | const struct blk_mq_queue_data *bd) | |
ffc771b3 | 3722 | { |
74c45052 | 3723 | struct request *rq = bd->rq; |
ffc771b3 | 3724 | int ret; |
88523a61 | 3725 | |
f45c40a9 | 3726 | if (unlikely(mtip_check_unal_depth(hctx, rq))) |
ffc771b3 JA |
3727 | return BLK_MQ_RQ_QUEUE_BUSY; |
3728 | ||
e2490073 CH |
3729 | blk_mq_start_request(rq); |
3730 | ||
ffc771b3 | 3731 | ret = mtip_submit_request(hctx, rq); |
f45c40a9 | 3732 | if (likely(!ret)) |
ffc771b3 JA |
3733 | return BLK_MQ_RQ_QUEUE_OK; |
3734 | ||
3735 | rq->errors = ret; | |
3736 | return BLK_MQ_RQ_QUEUE_ERROR; | |
88523a61 SB |
3737 | } |
3738 | ||
ffc771b3 JA |
3739 | static void mtip_free_cmd(void *data, struct request *rq, |
3740 | unsigned int hctx_idx, unsigned int request_idx) | |
3741 | { | |
3742 | struct driver_data *dd = data; | |
3743 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3744 | ||
3745 | if (!cmd->command) | |
3746 | return; | |
3747 | ||
3748 | dmam_free_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, | |
3749 | cmd->command, cmd->command_dma); | |
3750 | } | |
3751 | ||
3752 | static int mtip_init_cmd(void *data, struct request *rq, unsigned int hctx_idx, | |
3753 | unsigned int request_idx, unsigned int numa_node) | |
3754 | { | |
3755 | struct driver_data *dd = data; | |
3756 | struct mtip_cmd *cmd = blk_mq_rq_to_pdu(rq); | |
3757 | u32 host_cap_64 = readl(dd->mmio + HOST_CAP) & HOST_CAP_64; | |
3758 | ||
74c9c913 JM |
3759 | /* |
3760 | * For flush requests, request_idx starts at the end of the | |
3761 | * tag space. Since we don't support FLUSH/FUA, simply return | |
3762 | * 0 as there's nothing to be done. | |
3763 | */ | |
3764 | if (request_idx >= MTIP_MAX_COMMAND_SLOTS) | |
3765 | return 0; | |
3766 | ||
ffc771b3 JA |
3767 | cmd->command = dmam_alloc_coherent(&dd->pdev->dev, CMD_DMA_ALLOC_SZ, |
3768 | &cmd->command_dma, GFP_KERNEL); | |
3769 | if (!cmd->command) | |
3770 | return -ENOMEM; | |
3771 | ||
3772 | memset(cmd->command, 0, CMD_DMA_ALLOC_SZ); | |
3773 | ||
3774 | /* Point the command headers at the command tables. */ | |
3775 | cmd->command_header = dd->port->command_list + | |
3776 | (sizeof(struct mtip_cmd_hdr) * request_idx); | |
3777 | cmd->command_header_dma = dd->port->command_list_dma + | |
3778 | (sizeof(struct mtip_cmd_hdr) * request_idx); | |
3779 | ||
3780 | if (host_cap_64) | |
3781 | cmd->command_header->ctbau = __force_bit2int cpu_to_le32((cmd->command_dma >> 16) >> 16); | |
3782 | ||
3783 | cmd->command_header->ctba = __force_bit2int cpu_to_le32(cmd->command_dma & 0xFFFFFFFF); | |
3784 | ||
3785 | sg_init_table(cmd->sg, MTIP_MAX_SG); | |
3786 | return 0; | |
3787 | } | |
3788 | ||
3789 | static struct blk_mq_ops mtip_mq_ops = { | |
3790 | .queue_rq = mtip_queue_rq, | |
3791 | .map_queue = blk_mq_map_queue, | |
ffc771b3 JA |
3792 | .init_request = mtip_init_cmd, |
3793 | .exit_request = mtip_free_cmd, | |
3794 | }; | |
3795 | ||
88523a61 SB |
3796 | /* |
3797 | * Block layer initialization function. | |
3798 | * | |
3799 | * This function is called once by the PCI layer for each P320 | |
3800 | * device that is connected to the system. | |
3801 | * | |
3802 | * @dd Pointer to the driver data structure. | |
3803 | * | |
3804 | * return value | |
3805 | * 0 on success else an error code. | |
3806 | */ | |
6316668f | 3807 | static int mtip_block_initialize(struct driver_data *dd) |
88523a61 | 3808 | { |
62ee8c13 | 3809 | int rv = 0, wait_for_rebuild = 0; |
88523a61 SB |
3810 | sector_t capacity; |
3811 | unsigned int index = 0; | |
3812 | struct kobject *kobj; | |
60ec0eec | 3813 | unsigned char thd_name[16]; |
88523a61 | 3814 | |
62ee8c13 AT |
3815 | if (dd->disk) |
3816 | goto skip_create_disk; /* hw init done, before rebuild */ | |
3817 | ||
ffc771b3 | 3818 | if (mtip_hw_init(dd)) { |
88523a61 SB |
3819 | rv = -EINVAL; |
3820 | goto protocol_init_error; | |
3821 | } | |
3822 | ||
16c906e5 | 3823 | dd->disk = alloc_disk_node(MTIP_MAX_MINORS, dd->numa_node); |
88523a61 SB |
3824 | if (dd->disk == NULL) { |
3825 | dev_err(&dd->pdev->dev, | |
3826 | "Unable to allocate gendisk structure\n"); | |
3827 | rv = -EINVAL; | |
3828 | goto alloc_disk_error; | |
3829 | } | |
3830 | ||
3831 | /* Generate the disk name, implemented same as in sd.c */ | |
3832 | do { | |
3833 | if (!ida_pre_get(&rssd_index_ida, GFP_KERNEL)) | |
3834 | goto ida_get_error; | |
3835 | ||
3836 | spin_lock(&rssd_index_lock); | |
3837 | rv = ida_get_new(&rssd_index_ida, &index); | |
3838 | spin_unlock(&rssd_index_lock); | |
3839 | } while (rv == -EAGAIN); | |
3840 | ||
3841 | if (rv) | |
3842 | goto ida_get_error; | |
3843 | ||
3844 | rv = rssd_disk_name_format("rssd", | |
3845 | index, | |
3846 | dd->disk->disk_name, | |
3847 | DISK_NAME_LEN); | |
3848 | if (rv) | |
3849 | goto disk_index_error; | |
3850 | ||
3851 | dd->disk->driverfs_dev = &dd->pdev->dev; | |
3852 | dd->disk->major = dd->major; | |
75787265 ATS |
3853 | dd->disk->first_minor = index * MTIP_MAX_MINORS; |
3854 | dd->disk->minors = MTIP_MAX_MINORS; | |
88523a61 | 3855 | dd->disk->fops = &mtip_block_ops; |
88523a61 | 3856 | dd->disk->private_data = dd; |
88523a61 SB |
3857 | dd->index = index; |
3858 | ||
8f8b8995 AT |
3859 | mtip_hw_debugfs_init(dd); |
3860 | ||
62ee8c13 | 3861 | skip_create_disk: |
ffc771b3 JA |
3862 | memset(&dd->tags, 0, sizeof(dd->tags)); |
3863 | dd->tags.ops = &mtip_mq_ops; | |
3864 | dd->tags.nr_hw_queues = 1; | |
3865 | dd->tags.queue_depth = MTIP_MAX_COMMAND_SLOTS; | |
3866 | dd->tags.reserved_tags = 1; | |
3867 | dd->tags.cmd_size = sizeof(struct mtip_cmd); | |
3868 | dd->tags.numa_node = dd->numa_node; | |
3869 | dd->tags.flags = BLK_MQ_F_SHOULD_MERGE; | |
3870 | dd->tags.driver_data = dd; | |
3871 | ||
3872 | rv = blk_mq_alloc_tag_set(&dd->tags); | |
3873 | if (rv) { | |
3874 | dev_err(&dd->pdev->dev, | |
3875 | "Unable to allocate request queue\n"); | |
ffc771b3 JA |
3876 | goto block_queue_alloc_init_error; |
3877 | } | |
3878 | ||
62ee8c13 | 3879 | /* Allocate the request queue. */ |
ffc771b3 | 3880 | dd->queue = blk_mq_init_queue(&dd->tags); |
a8a642cc | 3881 | if (IS_ERR(dd->queue)) { |
62ee8c13 AT |
3882 | dev_err(&dd->pdev->dev, |
3883 | "Unable to allocate request queue\n"); | |
3884 | rv = -ENOMEM; | |
3885 | goto block_queue_alloc_init_error; | |
3886 | } | |
3887 | ||
62ee8c13 AT |
3888 | dd->disk->queue = dd->queue; |
3889 | dd->queue->queuedata = dd; | |
3890 | ||
ffc771b3 JA |
3891 | /* Initialize the protocol layer. */ |
3892 | wait_for_rebuild = mtip_hw_get_identify(dd); | |
3893 | if (wait_for_rebuild < 0) { | |
3894 | dev_err(&dd->pdev->dev, | |
3895 | "Protocol layer initialization failed\n"); | |
3896 | rv = -EINVAL; | |
3897 | goto init_hw_cmds_error; | |
3898 | } | |
3899 | ||
3900 | /* | |
3901 | * if rebuild pending, start the service thread, and delay the block | |
3902 | * queue creation and add_disk() | |
3903 | */ | |
3904 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) | |
3905 | goto start_service_thread; | |
3906 | ||
62ee8c13 AT |
3907 | /* Set device limits. */ |
3908 | set_bit(QUEUE_FLAG_NONROT, &dd->queue->queue_flags); | |
b277da0a | 3909 | clear_bit(QUEUE_FLAG_ADD_RANDOM, &dd->queue->queue_flags); |
62ee8c13 AT |
3910 | blk_queue_max_segments(dd->queue, MTIP_MAX_SG); |
3911 | blk_queue_physical_block_size(dd->queue, 4096); | |
6c8ab698 AT |
3912 | blk_queue_max_hw_sectors(dd->queue, 0xffff); |
3913 | blk_queue_max_segment_size(dd->queue, 0x400000); | |
62ee8c13 | 3914 | blk_queue_io_min(dd->queue, 4096); |
1044b1bb | 3915 | blk_queue_bounce_limit(dd->queue, dd->pdev->dma_mask); |
6c8ab698 | 3916 | |
4e8670e2 AT |
3917 | /* |
3918 | * write back cache is not supported in the device. FUA depends on | |
3919 | * write back cache support, hence setting flush support to zero. | |
3920 | */ | |
62ee8c13 AT |
3921 | blk_queue_flush(dd->queue, 0); |
3922 | ||
15283469 AT |
3923 | /* Signal trim support */ |
3924 | if (dd->trim_supp == true) { | |
3925 | set_bit(QUEUE_FLAG_DISCARD, &dd->queue->queue_flags); | |
3926 | dd->queue->limits.discard_granularity = 4096; | |
3927 | blk_queue_max_discard_sectors(dd->queue, | |
3928 | MTIP_MAX_TRIM_ENTRY_LEN * MTIP_MAX_TRIM_ENTRIES); | |
3929 | dd->queue->limits.discard_zeroes_data = 0; | |
3930 | } | |
3931 | ||
88523a61 SB |
3932 | /* Set the capacity of the device in 512 byte sectors. */ |
3933 | if (!(mtip_hw_get_capacity(dd, &capacity))) { | |
3934 | dev_warn(&dd->pdev->dev, | |
3935 | "Could not read drive capacity\n"); | |
3936 | rv = -EIO; | |
3937 | goto read_capacity_error; | |
3938 | } | |
3939 | set_capacity(dd->disk, capacity); | |
3940 | ||
3941 | /* Enable the block device and add it to /dev */ | |
3942 | add_disk(dd->disk); | |
3943 | ||
8f8b8995 | 3944 | dd->bdev = bdget_disk(dd->disk, 0); |
88523a61 SB |
3945 | /* |
3946 | * Now that the disk is active, initialize any sysfs attributes | |
3947 | * managed by the protocol layer. | |
3948 | */ | |
3949 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
3950 | if (kobj) { | |
3951 | mtip_hw_sysfs_init(dd, kobj); | |
3952 | kobject_put(kobj); | |
3953 | } | |
3954 | ||
45038367 | 3955 | if (dd->mtip_svc_handler) { |
8a857a88 | 3956 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
62ee8c13 | 3957 | return rv; /* service thread created for handling rebuild */ |
45038367 | 3958 | } |
62ee8c13 AT |
3959 | |
3960 | start_service_thread: | |
60ec0eec | 3961 | sprintf(thd_name, "mtip_svc_thd_%02d", index); |
16c906e5 | 3962 | dd->mtip_svc_handler = kthread_create_on_node(mtip_service_thread, |
f170168b KC |
3963 | dd, dd->numa_node, "%s", |
3964 | thd_name); | |
60ec0eec AT |
3965 | |
3966 | if (IS_ERR(dd->mtip_svc_handler)) { | |
c74b0f58 | 3967 | dev_err(&dd->pdev->dev, "service thread failed to start\n"); |
60ec0eec AT |
3968 | dd->mtip_svc_handler = NULL; |
3969 | rv = -EFAULT; | |
62ee8c13 | 3970 | goto kthread_run_error; |
60ec0eec | 3971 | } |
16c906e5 | 3972 | wake_up_process(dd->mtip_svc_handler); |
45038367 AT |
3973 | if (wait_for_rebuild == MTIP_FTL_REBUILD_MAGIC) |
3974 | rv = wait_for_rebuild; | |
3975 | ||
88523a61 SB |
3976 | return rv; |
3977 | ||
62ee8c13 | 3978 | kthread_run_error: |
8f8b8995 AT |
3979 | bdput(dd->bdev); |
3980 | dd->bdev = NULL; | |
7b421d24 | 3981 | |
62ee8c13 | 3982 | /* Delete our gendisk. This also removes the device from /dev */ |
88523a61 SB |
3983 | del_gendisk(dd->disk); |
3984 | ||
62ee8c13 | 3985 | read_capacity_error: |
ffc771b3 | 3986 | init_hw_cmds_error: |
62ee8c13 | 3987 | blk_cleanup_queue(dd->queue); |
ffc771b3 | 3988 | blk_mq_free_tag_set(&dd->tags); |
62ee8c13 | 3989 | block_queue_alloc_init_error: |
8f8b8995 | 3990 | mtip_hw_debugfs_exit(dd); |
88523a61 SB |
3991 | disk_index_error: |
3992 | spin_lock(&rssd_index_lock); | |
3993 | ida_remove(&rssd_index_ida, index); | |
3994 | spin_unlock(&rssd_index_lock); | |
3995 | ||
3996 | ida_get_error: | |
3997 | put_disk(dd->disk); | |
3998 | ||
3999 | alloc_disk_error: | |
62ee8c13 | 4000 | mtip_hw_exit(dd); /* De-initialize the protocol layer. */ |
88523a61 SB |
4001 | |
4002 | protocol_init_error: | |
4003 | return rv; | |
4004 | } | |
4005 | ||
4006 | /* | |
4007 | * Block layer deinitialization function. | |
4008 | * | |
4009 | * Called by the PCI layer as each P320 device is removed. | |
4010 | * | |
4011 | * @dd Pointer to the driver data structure. | |
4012 | * | |
4013 | * return value | |
4014 | * 0 | |
4015 | */ | |
6316668f | 4016 | static int mtip_block_remove(struct driver_data *dd) |
88523a61 SB |
4017 | { |
4018 | struct kobject *kobj; | |
60ec0eec | 4019 | |
2132a544 | 4020 | mtip_hw_debugfs_exit(dd); |
60ec0eec | 4021 | |
2132a544 ATS |
4022 | if (dd->mtip_svc_handler) { |
4023 | set_bit(MTIP_PF_SVC_THD_STOP_BIT, &dd->port->flags); | |
4024 | wake_up_interruptible(&dd->port->svc_wait); | |
4025 | kthread_stop(dd->mtip_svc_handler); | |
4026 | } | |
88523a61 | 4027 | |
2132a544 ATS |
4028 | /* Clean up the sysfs attributes, if created */ |
4029 | if (test_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag)) { | |
4030 | kobj = kobject_get(&disk_to_dev(dd->disk)->kobj); | |
4031 | if (kobj) { | |
4032 | mtip_hw_sysfs_exit(dd, kobj); | |
4033 | kobject_put(kobj); | |
8f8b8995 | 4034 | } |
2132a544 | 4035 | } |
ffc771b3 | 4036 | |
2132a544 | 4037 | if (!dd->sr) |
ffc771b3 | 4038 | mtip_standby_drive(dd); |
2132a544 | 4039 | else |
8f8b8995 AT |
4040 | dev_info(&dd->pdev->dev, "device %s surprise removal\n", |
4041 | dd->disk->disk_name); | |
2132a544 ATS |
4042 | |
4043 | /* | |
4044 | * Delete our gendisk structure. This also removes the device | |
4045 | * from /dev | |
4046 | */ | |
4047 | if (dd->bdev) { | |
4048 | bdput(dd->bdev); | |
4049 | dd->bdev = NULL; | |
4050 | } | |
4051 | if (dd->disk) { | |
4052 | del_gendisk(dd->disk); | |
4053 | if (dd->disk->queue) { | |
4054 | blk_cleanup_queue(dd->queue); | |
4055 | blk_mq_free_tag_set(&dd->tags); | |
4056 | dd->queue = NULL; | |
4057 | } | |
4058 | put_disk(dd->disk); | |
8f8b8995 | 4059 | } |
2132a544 ATS |
4060 | dd->disk = NULL; |
4061 | ||
4062 | spin_lock(&rssd_index_lock); | |
4063 | ida_remove(&rssd_index_ida, dd->index); | |
4064 | spin_unlock(&rssd_index_lock); | |
88523a61 SB |
4065 | |
4066 | /* De-initialize the protocol layer. */ | |
4067 | mtip_hw_exit(dd); | |
4068 | ||
4069 | return 0; | |
4070 | } | |
4071 | ||
4072 | /* | |
4073 | * Function called by the PCI layer when just before the | |
4074 | * machine shuts down. | |
4075 | * | |
4076 | * If a protocol layer shutdown function is present it will be called | |
4077 | * by this function. | |
4078 | * | |
4079 | * @dd Pointer to the driver data structure. | |
4080 | * | |
4081 | * return value | |
4082 | * 0 | |
4083 | */ | |
6316668f | 4084 | static int mtip_block_shutdown(struct driver_data *dd) |
88523a61 | 4085 | { |
ffc771b3 JA |
4086 | mtip_hw_shutdown(dd); |
4087 | ||
88523a61 | 4088 | /* Delete our gendisk structure, and cleanup the blk queue. */ |
58c49df3 | 4089 | if (dd->disk) { |
5a79e1ac AT |
4090 | dev_info(&dd->pdev->dev, |
4091 | "Shutting down %s ...\n", dd->disk->disk_name); | |
4092 | ||
02b48265 | 4093 | del_gendisk(dd->disk); |
5a79e1ac | 4094 | if (dd->disk->queue) { |
5a79e1ac | 4095 | blk_cleanup_queue(dd->queue); |
ffc771b3 | 4096 | blk_mq_free_tag_set(&dd->tags); |
02b48265 ATS |
4097 | } |
4098 | put_disk(dd->disk); | |
5a79e1ac AT |
4099 | dd->disk = NULL; |
4100 | dd->queue = NULL; | |
58c49df3 AT |
4101 | } |
4102 | ||
8182b495 AT |
4103 | spin_lock(&rssd_index_lock); |
4104 | ida_remove(&rssd_index_ida, dd->index); | |
4105 | spin_unlock(&rssd_index_lock); | |
88523a61 SB |
4106 | return 0; |
4107 | } | |
4108 | ||
6316668f | 4109 | static int mtip_block_suspend(struct driver_data *dd) |
88523a61 SB |
4110 | { |
4111 | dev_info(&dd->pdev->dev, | |
4112 | "Suspending %s ...\n", dd->disk->disk_name); | |
4113 | mtip_hw_suspend(dd); | |
4114 | return 0; | |
4115 | } | |
4116 | ||
6316668f | 4117 | static int mtip_block_resume(struct driver_data *dd) |
88523a61 SB |
4118 | { |
4119 | dev_info(&dd->pdev->dev, "Resuming %s ...\n", | |
4120 | dd->disk->disk_name); | |
4121 | mtip_hw_resume(dd); | |
4122 | return 0; | |
4123 | } | |
4124 | ||
16c906e5 AT |
4125 | static void drop_cpu(int cpu) |
4126 | { | |
4127 | cpu_use[cpu]--; | |
4128 | } | |
4129 | ||
4130 | static int get_least_used_cpu_on_node(int node) | |
4131 | { | |
4132 | int cpu, least_used_cpu, least_cnt; | |
4133 | const struct cpumask *node_mask; | |
4134 | ||
4135 | node_mask = cpumask_of_node(node); | |
4136 | least_used_cpu = cpumask_first(node_mask); | |
4137 | least_cnt = cpu_use[least_used_cpu]; | |
4138 | cpu = least_used_cpu; | |
4139 | ||
4140 | for_each_cpu(cpu, node_mask) { | |
4141 | if (cpu_use[cpu] < least_cnt) { | |
4142 | least_used_cpu = cpu; | |
4143 | least_cnt = cpu_use[cpu]; | |
4144 | } | |
4145 | } | |
4146 | cpu_use[least_used_cpu]++; | |
4147 | return least_used_cpu; | |
4148 | } | |
4149 | ||
4150 | /* Helper for selecting a node in round robin mode */ | |
4151 | static inline int mtip_get_next_rr_node(void) | |
4152 | { | |
4153 | static int next_node = -1; | |
4154 | ||
4155 | if (next_node == -1) { | |
4156 | next_node = first_online_node; | |
4157 | return next_node; | |
4158 | } | |
4159 | ||
4160 | next_node = next_online_node(next_node); | |
4161 | if (next_node == MAX_NUMNODES) | |
4162 | next_node = first_online_node; | |
4163 | return next_node; | |
4164 | } | |
4165 | ||
25bac122 FW |
4166 | static DEFINE_HANDLER(0); |
4167 | static DEFINE_HANDLER(1); | |
4168 | static DEFINE_HANDLER(2); | |
4169 | static DEFINE_HANDLER(3); | |
4170 | static DEFINE_HANDLER(4); | |
4171 | static DEFINE_HANDLER(5); | |
4172 | static DEFINE_HANDLER(6); | |
4173 | static DEFINE_HANDLER(7); | |
16c906e5 | 4174 | |
d1e714db AT |
4175 | static void mtip_disable_link_opts(struct driver_data *dd, struct pci_dev *pdev) |
4176 | { | |
4177 | int pos; | |
4178 | unsigned short pcie_dev_ctrl; | |
4179 | ||
4180 | pos = pci_find_capability(pdev, PCI_CAP_ID_EXP); | |
4181 | if (pos) { | |
4182 | pci_read_config_word(pdev, | |
4183 | pos + PCI_EXP_DEVCTL, | |
4184 | &pcie_dev_ctrl); | |
4185 | if (pcie_dev_ctrl & (1 << 11) || | |
4186 | pcie_dev_ctrl & (1 << 4)) { | |
4187 | dev_info(&dd->pdev->dev, | |
4188 | "Disabling ERO/No-Snoop on bridge device %04x:%04x\n", | |
4189 | pdev->vendor, pdev->device); | |
4190 | pcie_dev_ctrl &= ~(PCI_EXP_DEVCTL_NOSNOOP_EN | | |
4191 | PCI_EXP_DEVCTL_RELAX_EN); | |
4192 | pci_write_config_word(pdev, | |
4193 | pos + PCI_EXP_DEVCTL, | |
4194 | pcie_dev_ctrl); | |
4195 | } | |
4196 | } | |
4197 | } | |
4198 | ||
4199 | static void mtip_fix_ero_nosnoop(struct driver_data *dd, struct pci_dev *pdev) | |
4200 | { | |
4201 | /* | |
4202 | * This workaround is specific to AMD/ATI chipset with a PCI upstream | |
4203 | * device with device id 0x5aXX | |
4204 | */ | |
4205 | if (pdev->bus && pdev->bus->self) { | |
4206 | if (pdev->bus->self->vendor == PCI_VENDOR_ID_ATI && | |
4207 | ((pdev->bus->self->device & 0xff00) == 0x5a00)) { | |
4208 | mtip_disable_link_opts(dd, pdev->bus->self); | |
4209 | } else { | |
4210 | /* Check further up the topology */ | |
4211 | struct pci_dev *parent_dev = pdev->bus->self; | |
4212 | if (parent_dev->bus && | |
4213 | parent_dev->bus->parent && | |
4214 | parent_dev->bus->parent->self && | |
4215 | parent_dev->bus->parent->self->vendor == | |
4216 | PCI_VENDOR_ID_ATI && | |
4217 | (parent_dev->bus->parent->self->device & | |
4218 | 0xff00) == 0x5a00) { | |
4219 | mtip_disable_link_opts(dd, | |
4220 | parent_dev->bus->parent->self); | |
4221 | } | |
4222 | } | |
4223 | } | |
4224 | } | |
4225 | ||
88523a61 SB |
4226 | /* |
4227 | * Called for each supported PCI device detected. | |
4228 | * | |
4229 | * This function allocates the private data structure, enables the | |
4230 | * PCI device and then calls the block layer initialization function. | |
4231 | * | |
4232 | * return value | |
4233 | * 0 on success else an error code. | |
4234 | */ | |
4235 | static int mtip_pci_probe(struct pci_dev *pdev, | |
4236 | const struct pci_device_id *ent) | |
4237 | { | |
4238 | int rv = 0; | |
4239 | struct driver_data *dd = NULL; | |
16c906e5 AT |
4240 | char cpu_list[256]; |
4241 | const struct cpumask *node_mask; | |
4242 | int cpu, i = 0, j = 0; | |
4243 | int my_node = NUMA_NO_NODE; | |
0caff003 | 4244 | unsigned long flags; |
88523a61 SB |
4245 | |
4246 | /* Allocate memory for this devices private data. */ | |
16c906e5 AT |
4247 | my_node = pcibus_to_node(pdev->bus); |
4248 | if (my_node != NUMA_NO_NODE) { | |
4249 | if (!node_online(my_node)) | |
4250 | my_node = mtip_get_next_rr_node(); | |
4251 | } else { | |
4252 | dev_info(&pdev->dev, "Kernel not reporting proximity, choosing a node\n"); | |
4253 | my_node = mtip_get_next_rr_node(); | |
4254 | } | |
4255 | dev_info(&pdev->dev, "NUMA node %d (closest: %d,%d, probe on %d:%d)\n", | |
4256 | my_node, pcibus_to_node(pdev->bus), dev_to_node(&pdev->dev), | |
7f328908 | 4257 | cpu_to_node(raw_smp_processor_id()), raw_smp_processor_id()); |
16c906e5 AT |
4258 | |
4259 | dd = kzalloc_node(sizeof(struct driver_data), GFP_KERNEL, my_node); | |
88523a61 SB |
4260 | if (dd == NULL) { |
4261 | dev_err(&pdev->dev, | |
4262 | "Unable to allocate memory for driver data\n"); | |
4263 | return -ENOMEM; | |
4264 | } | |
4265 | ||
88523a61 SB |
4266 | /* Attach the private data to this PCI device. */ |
4267 | pci_set_drvdata(pdev, dd); | |
4268 | ||
4269 | rv = pcim_enable_device(pdev); | |
4270 | if (rv < 0) { | |
4271 | dev_err(&pdev->dev, "Unable to enable device\n"); | |
4272 | goto iomap_err; | |
4273 | } | |
4274 | ||
4275 | /* Map BAR5 to memory. */ | |
4276 | rv = pcim_iomap_regions(pdev, 1 << MTIP_ABAR, MTIP_DRV_NAME); | |
4277 | if (rv < 0) { | |
4278 | dev_err(&pdev->dev, "Unable to map regions\n"); | |
4279 | goto iomap_err; | |
4280 | } | |
4281 | ||
4282 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) { | |
4283 | rv = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(64)); | |
4284 | ||
4285 | if (rv) { | |
4286 | rv = pci_set_consistent_dma_mask(pdev, | |
4287 | DMA_BIT_MASK(32)); | |
4288 | if (rv) { | |
4289 | dev_warn(&pdev->dev, | |
4290 | "64-bit DMA enable failed\n"); | |
4291 | goto setmask_err; | |
4292 | } | |
4293 | } | |
4294 | } | |
4295 | ||
16c906e5 AT |
4296 | /* Copy the info we may need later into the private data structure. */ |
4297 | dd->major = mtip_major; | |
4298 | dd->instance = instance; | |
4299 | dd->pdev = pdev; | |
4300 | dd->numa_node = my_node; | |
4301 | ||
0caff003 AT |
4302 | INIT_LIST_HEAD(&dd->online_list); |
4303 | INIT_LIST_HEAD(&dd->remove_list); | |
4304 | ||
16c906e5 AT |
4305 | memset(dd->workq_name, 0, 32); |
4306 | snprintf(dd->workq_name, 31, "mtipq%d", dd->instance); | |
88523a61 | 4307 | |
16c906e5 AT |
4308 | dd->isr_workq = create_workqueue(dd->workq_name); |
4309 | if (!dd->isr_workq) { | |
4310 | dev_warn(&pdev->dev, "Can't create wq %d\n", dd->instance); | |
d137c830 | 4311 | rv = -ENOMEM; |
16c906e5 AT |
4312 | goto block_initialize_err; |
4313 | } | |
4314 | ||
4315 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4316 | ||
4317 | node_mask = cpumask_of_node(dd->numa_node); | |
4318 | if (!cpumask_empty(node_mask)) { | |
4319 | for_each_cpu(cpu, node_mask) | |
4320 | { | |
4321 | snprintf(&cpu_list[j], 256 - j, "%d ", cpu); | |
4322 | j = strlen(cpu_list); | |
4323 | } | |
4324 | ||
4325 | dev_info(&pdev->dev, "Node %d on package %d has %d cpu(s): %s\n", | |
4326 | dd->numa_node, | |
4327 | topology_physical_package_id(cpumask_first(node_mask)), | |
4328 | nr_cpus_node(dd->numa_node), | |
4329 | cpu_list); | |
4330 | } else | |
4331 | dev_dbg(&pdev->dev, "mtip32xx: node_mask empty\n"); | |
4332 | ||
4333 | dd->isr_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4334 | dev_info(&pdev->dev, "Initial IRQ binding node:cpu %d:%d\n", | |
4335 | cpu_to_node(dd->isr_binding), dd->isr_binding); | |
4336 | ||
4337 | /* first worker context always runs in ISR */ | |
4338 | dd->work[0].cpu_binding = dd->isr_binding; | |
4339 | dd->work[1].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4340 | dd->work[2].cpu_binding = get_least_used_cpu_on_node(dd->numa_node); | |
4341 | dd->work[3].cpu_binding = dd->work[0].cpu_binding; | |
4342 | dd->work[4].cpu_binding = dd->work[1].cpu_binding; | |
4343 | dd->work[5].cpu_binding = dd->work[2].cpu_binding; | |
4344 | dd->work[6].cpu_binding = dd->work[2].cpu_binding; | |
4345 | dd->work[7].cpu_binding = dd->work[1].cpu_binding; | |
4346 | ||
4347 | /* Log the bindings */ | |
4348 | for_each_present_cpu(cpu) { | |
4349 | memset(cpu_list, 0, sizeof(cpu_list)); | |
4350 | for (i = 0, j = 0; i < MTIP_MAX_SLOT_GROUPS; i++) { | |
4351 | if (dd->work[i].cpu_binding == cpu) { | |
4352 | snprintf(&cpu_list[j], 256 - j, "%d ", i); | |
4353 | j = strlen(cpu_list); | |
4354 | } | |
4355 | } | |
4356 | if (j) | |
4357 | dev_info(&pdev->dev, "CPU %d: WQs %s\n", cpu, cpu_list); | |
4358 | } | |
4359 | ||
4360 | INIT_WORK(&dd->work[0].work, mtip_workq_sdbf0); | |
4361 | INIT_WORK(&dd->work[1].work, mtip_workq_sdbf1); | |
4362 | INIT_WORK(&dd->work[2].work, mtip_workq_sdbf2); | |
4363 | INIT_WORK(&dd->work[3].work, mtip_workq_sdbf3); | |
4364 | INIT_WORK(&dd->work[4].work, mtip_workq_sdbf4); | |
4365 | INIT_WORK(&dd->work[5].work, mtip_workq_sdbf5); | |
4366 | INIT_WORK(&dd->work[6].work, mtip_workq_sdbf6); | |
4367 | INIT_WORK(&dd->work[7].work, mtip_workq_sdbf7); | |
4368 | ||
4369 | pci_set_master(pdev); | |
d137c830 WY |
4370 | rv = pci_enable_msi(pdev); |
4371 | if (rv) { | |
88523a61 SB |
4372 | dev_warn(&pdev->dev, |
4373 | "Unable to enable MSI interrupt.\n"); | |
cf91f39b | 4374 | goto msi_initialize_err; |
88523a61 SB |
4375 | } |
4376 | ||
d1e714db AT |
4377 | mtip_fix_ero_nosnoop(dd, pdev); |
4378 | ||
88523a61 SB |
4379 | /* Initialize the block layer. */ |
4380 | rv = mtip_block_initialize(dd); | |
4381 | if (rv < 0) { | |
4382 | dev_err(&pdev->dev, | |
4383 | "Unable to initialize block layer\n"); | |
4384 | goto block_initialize_err; | |
4385 | } | |
4386 | ||
4387 | /* | |
4388 | * Increment the instance count so that each device has a unique | |
4389 | * instance number. | |
4390 | */ | |
4391 | instance++; | |
45038367 | 4392 | if (rv != MTIP_FTL_REBUILD_MAGIC) |
8a857a88 | 4393 | set_bit(MTIP_DDF_INIT_DONE_BIT, &dd->dd_flag); |
6b06d35f AT |
4394 | else |
4395 | rv = 0; /* device in rebuild state, return 0 from probe */ | |
0caff003 AT |
4396 | |
4397 | /* Add to online list even if in ftl rebuild */ | |
4398 | spin_lock_irqsave(&dev_lock, flags); | |
4399 | list_add(&dd->online_list, &online_list); | |
4400 | spin_unlock_irqrestore(&dev_lock, flags); | |
4401 | ||
88523a61 SB |
4402 | goto done; |
4403 | ||
4404 | block_initialize_err: | |
4405 | pci_disable_msi(pdev); | |
cf91f39b AG |
4406 | |
4407 | msi_initialize_err: | |
16c906e5 AT |
4408 | if (dd->isr_workq) { |
4409 | flush_workqueue(dd->isr_workq); | |
4410 | destroy_workqueue(dd->isr_workq); | |
4411 | drop_cpu(dd->work[0].cpu_binding); | |
4412 | drop_cpu(dd->work[1].cpu_binding); | |
4413 | drop_cpu(dd->work[2].cpu_binding); | |
4414 | } | |
88523a61 SB |
4415 | setmask_err: |
4416 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); | |
4417 | ||
4418 | iomap_err: | |
4419 | kfree(dd); | |
4420 | pci_set_drvdata(pdev, NULL); | |
4421 | return rv; | |
4422 | done: | |
88523a61 SB |
4423 | return rv; |
4424 | } | |
4425 | ||
4426 | /* | |
4427 | * Called for each probed device when the device is removed or the | |
4428 | * driver is unloaded. | |
4429 | * | |
4430 | * return value | |
4431 | * None | |
4432 | */ | |
4433 | static void mtip_pci_remove(struct pci_dev *pdev) | |
4434 | { | |
4435 | struct driver_data *dd = pci_get_drvdata(pdev); | |
8f8b8995 | 4436 | unsigned long flags, to; |
88523a61 | 4437 | |
8a857a88 | 4438 | set_bit(MTIP_DDF_REMOVE_PENDING_BIT, &dd->dd_flag); |
45038367 | 4439 | |
0caff003 AT |
4440 | spin_lock_irqsave(&dev_lock, flags); |
4441 | list_del_init(&dd->online_list); | |
4442 | list_add(&dd->remove_list, &removing_list); | |
4443 | spin_unlock_irqrestore(&dev_lock, flags); | |
4444 | ||
8f8b8995 AT |
4445 | mtip_check_surprise_removal(pdev); |
4446 | synchronize_irq(dd->pdev->irq); | |
4447 | ||
4448 | /* Spin until workers are done */ | |
4449 | to = jiffies + msecs_to_jiffies(4000); | |
4450 | do { | |
4451 | msleep(20); | |
4452 | } while (atomic_read(&dd->irq_workers_active) != 0 && | |
4453 | time_before(jiffies, to)); | |
4454 | ||
4455 | if (atomic_read(&dd->irq_workers_active) != 0) { | |
4456 | dev_warn(&dd->pdev->dev, | |
4457 | "Completion workers still active!\n"); | |
88523a61 | 4458 | } |
88523a61 | 4459 | |
2132a544 | 4460 | blk_mq_stop_hw_queues(dd->queue); |
88523a61 SB |
4461 | /* Clean up the block layer. */ |
4462 | mtip_block_remove(dd); | |
4463 | ||
16c906e5 AT |
4464 | if (dd->isr_workq) { |
4465 | flush_workqueue(dd->isr_workq); | |
4466 | destroy_workqueue(dd->isr_workq); | |
4467 | drop_cpu(dd->work[0].cpu_binding); | |
4468 | drop_cpu(dd->work[1].cpu_binding); | |
4469 | drop_cpu(dd->work[2].cpu_binding); | |
4470 | } | |
4471 | ||
88523a61 SB |
4472 | pci_disable_msi(pdev); |
4473 | ||
0caff003 AT |
4474 | spin_lock_irqsave(&dev_lock, flags); |
4475 | list_del_init(&dd->remove_list); | |
4476 | spin_unlock_irqrestore(&dev_lock, flags); | |
4477 | ||
2132a544 | 4478 | kfree(dd); |
8f8b8995 | 4479 | |
88523a61 | 4480 | pcim_iounmap_regions(pdev, 1 << MTIP_ABAR); |
8f8b8995 | 4481 | pci_set_drvdata(pdev, NULL); |
88523a61 SB |
4482 | } |
4483 | ||
4484 | /* | |
4485 | * Called for each probed device when the device is suspended. | |
4486 | * | |
4487 | * return value | |
4488 | * 0 Success | |
4489 | * <0 Error | |
4490 | */ | |
4491 | static int mtip_pci_suspend(struct pci_dev *pdev, pm_message_t mesg) | |
4492 | { | |
4493 | int rv = 0; | |
4494 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4495 | ||
4496 | if (!dd) { | |
4497 | dev_err(&pdev->dev, | |
4498 | "Driver private datastructure is NULL\n"); | |
4499 | return -EFAULT; | |
4500 | } | |
4501 | ||
8a857a88 | 4502 | set_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4503 | |
4504 | /* Disable ports & interrupts then send standby immediate */ | |
4505 | rv = mtip_block_suspend(dd); | |
4506 | if (rv < 0) { | |
4507 | dev_err(&pdev->dev, | |
4508 | "Failed to suspend controller\n"); | |
4509 | return rv; | |
4510 | } | |
4511 | ||
4512 | /* | |
4513 | * Save the pci config space to pdev structure & | |
4514 | * disable the device | |
4515 | */ | |
4516 | pci_save_state(pdev); | |
4517 | pci_disable_device(pdev); | |
4518 | ||
4519 | /* Move to Low power state*/ | |
4520 | pci_set_power_state(pdev, PCI_D3hot); | |
4521 | ||
4522 | return rv; | |
4523 | } | |
4524 | ||
4525 | /* | |
4526 | * Called for each probed device when the device is resumed. | |
4527 | * | |
4528 | * return value | |
4529 | * 0 Success | |
4530 | * <0 Error | |
4531 | */ | |
4532 | static int mtip_pci_resume(struct pci_dev *pdev) | |
4533 | { | |
4534 | int rv = 0; | |
4535 | struct driver_data *dd; | |
4536 | ||
4537 | dd = pci_get_drvdata(pdev); | |
4538 | if (!dd) { | |
4539 | dev_err(&pdev->dev, | |
4540 | "Driver private datastructure is NULL\n"); | |
4541 | return -EFAULT; | |
4542 | } | |
4543 | ||
4544 | /* Move the device to active State */ | |
4545 | pci_set_power_state(pdev, PCI_D0); | |
4546 | ||
4547 | /* Restore PCI configuration space */ | |
4548 | pci_restore_state(pdev); | |
4549 | ||
4550 | /* Enable the PCI device*/ | |
4551 | rv = pcim_enable_device(pdev); | |
4552 | if (rv < 0) { | |
4553 | dev_err(&pdev->dev, | |
4554 | "Failed to enable card during resume\n"); | |
4555 | goto err; | |
4556 | } | |
4557 | pci_set_master(pdev); | |
4558 | ||
4559 | /* | |
4560 | * Calls hbaReset, initPort, & startPort function | |
4561 | * then enables interrupts | |
4562 | */ | |
4563 | rv = mtip_block_resume(dd); | |
4564 | if (rv < 0) | |
4565 | dev_err(&pdev->dev, "Unable to resume\n"); | |
4566 | ||
4567 | err: | |
8a857a88 | 4568 | clear_bit(MTIP_DDF_RESUME_BIT, &dd->dd_flag); |
88523a61 SB |
4569 | |
4570 | return rv; | |
4571 | } | |
4572 | ||
4573 | /* | |
4574 | * Shutdown routine | |
4575 | * | |
4576 | * return value | |
4577 | * None | |
4578 | */ | |
4579 | static void mtip_pci_shutdown(struct pci_dev *pdev) | |
4580 | { | |
4581 | struct driver_data *dd = pci_get_drvdata(pdev); | |
4582 | if (dd) | |
4583 | mtip_block_shutdown(dd); | |
4584 | } | |
4585 | ||
88523a61 | 4586 | /* Table of device ids supported by this driver. */ |
9baa3c34 | 4587 | static const struct pci_device_id mtip_pci_tbl[] = { |
1a131458 AT |
4588 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320H_DEVICE_ID) }, |
4589 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320M_DEVICE_ID) }, | |
4590 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P320S_DEVICE_ID) }, | |
4591 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P325M_DEVICE_ID) }, | |
4592 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420H_DEVICE_ID) }, | |
4593 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P420M_DEVICE_ID) }, | |
4594 | { PCI_DEVICE(PCI_VENDOR_ID_MICRON, P425M_DEVICE_ID) }, | |
88523a61 SB |
4595 | { 0 } |
4596 | }; | |
4597 | ||
4598 | /* Structure that describes the PCI driver functions. */ | |
3ff147d3 | 4599 | static struct pci_driver mtip_pci_driver = { |
88523a61 SB |
4600 | .name = MTIP_DRV_NAME, |
4601 | .id_table = mtip_pci_tbl, | |
4602 | .probe = mtip_pci_probe, | |
4603 | .remove = mtip_pci_remove, | |
4604 | .suspend = mtip_pci_suspend, | |
4605 | .resume = mtip_pci_resume, | |
4606 | .shutdown = mtip_pci_shutdown, | |
4607 | }; | |
4608 | ||
4609 | MODULE_DEVICE_TABLE(pci, mtip_pci_tbl); | |
4610 | ||
4611 | /* | |
4612 | * Module initialization function. | |
4613 | * | |
4614 | * Called once when the module is loaded. This function allocates a major | |
4615 | * block device number to the Cyclone devices and registers the PCI layer | |
4616 | * of the driver. | |
4617 | * | |
4618 | * Return value | |
4619 | * 0 on success else error code. | |
4620 | */ | |
4621 | static int __init mtip_init(void) | |
4622 | { | |
6d27f09a RS |
4623 | int error; |
4624 | ||
45422e74 | 4625 | pr_info(MTIP_DRV_NAME " Version " MTIP_DRV_VERSION "\n"); |
88523a61 | 4626 | |
0caff003 AT |
4627 | spin_lock_init(&dev_lock); |
4628 | ||
4629 | INIT_LIST_HEAD(&online_list); | |
4630 | INIT_LIST_HEAD(&removing_list); | |
4631 | ||
88523a61 | 4632 | /* Allocate a major block device number to use with this driver. */ |
6d27f09a RS |
4633 | error = register_blkdev(0, MTIP_DRV_NAME); |
4634 | if (error <= 0) { | |
45422e74 | 4635 | pr_err("Unable to register block device (%d)\n", |
6d27f09a | 4636 | error); |
88523a61 SB |
4637 | return -EBUSY; |
4638 | } | |
6d27f09a | 4639 | mtip_major = error; |
88523a61 | 4640 | |
0caff003 AT |
4641 | dfs_parent = debugfs_create_dir("rssd", NULL); |
4642 | if (IS_ERR_OR_NULL(dfs_parent)) { | |
4643 | pr_warn("Error creating debugfs parent\n"); | |
4644 | dfs_parent = NULL; | |
4645 | } | |
4646 | if (dfs_parent) { | |
4647 | dfs_device_status = debugfs_create_file("device_status", | |
4648 | S_IRUGO, dfs_parent, NULL, | |
4649 | &mtip_device_status_fops); | |
4650 | if (IS_ERR_OR_NULL(dfs_device_status)) { | |
4651 | pr_err("Error creating device_status node\n"); | |
4652 | dfs_device_status = NULL; | |
7b421d24 AT |
4653 | } |
4654 | } | |
4655 | ||
88523a61 | 4656 | /* Register our PCI operations. */ |
6d27f09a | 4657 | error = pci_register_driver(&mtip_pci_driver); |
7b421d24 AT |
4658 | if (error) { |
4659 | debugfs_remove(dfs_parent); | |
6d27f09a | 4660 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); |
7b421d24 | 4661 | } |
6d27f09a RS |
4662 | |
4663 | return error; | |
88523a61 SB |
4664 | } |
4665 | ||
4666 | /* | |
4667 | * Module de-initialization function. | |
4668 | * | |
4669 | * Called once when the module is unloaded. This function deallocates | |
4670 | * the major block device number allocated by mtip_init() and | |
4671 | * unregisters the PCI layer of the driver. | |
4672 | * | |
4673 | * Return value | |
4674 | * none | |
4675 | */ | |
4676 | static void __exit mtip_exit(void) | |
4677 | { | |
4678 | /* Release the allocated major block device number. */ | |
4679 | unregister_blkdev(mtip_major, MTIP_DRV_NAME); | |
4680 | ||
4681 | /* Unregister the PCI driver. */ | |
4682 | pci_unregister_driver(&mtip_pci_driver); | |
af5ded8c AT |
4683 | |
4684 | debugfs_remove_recursive(dfs_parent); | |
88523a61 SB |
4685 | } |
4686 | ||
4687 | MODULE_AUTHOR("Micron Technology, Inc"); | |
4688 | MODULE_DESCRIPTION("Micron RealSSD PCIe Block Driver"); | |
4689 | MODULE_LICENSE("GPL"); | |
4690 | MODULE_VERSION(MTIP_DRV_VERSION); | |
4691 | ||
4692 | module_init(mtip_init); | |
4693 | module_exit(mtip_exit); |