[linux-2.6-block.git] / drivers / block / cciss.h

#ifndef CCISS_H
#define CCISS_H

#include <linux/genhd.h>

#include "cciss_cmd.h"


#define NWD_SHIFT	4
#define MAX_PART	(1 << NWD_SHIFT)

#define IO_OK		0
#define IO_ERROR	1

struct ctlr_info;
typedef struct ctlr_info ctlr_info_t;

struct access_method {
	void (*submit_command)(ctlr_info_t *h, CommandList_struct *c);
	void (*set_intr_mask)(ctlr_info_t *h, unsigned long val);
	unsigned long (*fifo_full)(ctlr_info_t *h);
	unsigned long (*intr_pending)(ctlr_info_t *h);
	unsigned long (*command_completed)(ctlr_info_t *h);
};
typedef struct _drive_info_struct
{
 	__u32   LunID;	
	int 	usage_count;
	struct request_queue *queue;
	sector_t nr_blocks;
	int	block_size;
	int 	heads;
	int	sectors;
	int 	cylinders;
	int	raid_level; /* set to -1 to indicate that
			     * the drive is not in use/configured
			    */
	int	busy_configuring; /*This is set when the drive is being removed
				   *to prevent it from being opened or it's queue
				   *from being started.
				  */
	__u8 serial_no[16]; /* from inquiry page 0x83, */
			    /* not necc. null terminated. */
} drive_info_struct;

#ifdef CONFIG_CISS_SCSI_TAPE

struct sendcmd_reject_list {
	int ncompletions;
	unsigned long *complete; /* array of NR_CMDS tags */
};

#endif
struct ctlr_info 
{
	int	ctlr;
	char	devname[8];
	char    *product_name;
	char	firm_ver[4]; // Firmware version 
	struct pci_dev *pdev;
	__u32	board_id;
	void __iomem *vaddr;
	unsigned long paddr;
	int 	nr_cmds; /* Number of commands allowed on this controller */
	CfgTable_struct __iomem *cfgtable;
	int	interrupts_enabled;
	int	major;
	int 	max_commands;
	int	commands_outstanding;
	int 	max_outstanding; /* Debug */ 
	int	num_luns;
	int 	highest_lun;
	int	usage_count;  /* number of opens all all minor devices */
#	define DOORBELL_INT	0
#	define PERF_MODE_INT	1
#	define SIMPLE_MODE_INT	2
#	define MEMQ_MODE_INT	3
	unsigned int intr[4];
	unsigned int msix_vector;
	unsigned int msi_vector;
	int 	cciss_max_sectors;
	BYTE	cciss_read;
	BYTE	cciss_write;
	BYTE	cciss_read_capacity;

	// information about each logical volume
	drive_info_struct drv[CISS_MAX_LUN];

	struct access_method access;

	/* queue and queue Info */ 
	struct hlist_head reqQ;
	struct hlist_head cmpQ;
	unsigned int Qdepth;
	unsigned int maxQsinceinit;
	unsigned int maxSG;
	spinlock_t lock;

	//* pointers to command and error info pool */ 
	CommandList_struct 	*cmd_pool;
	dma_addr_t		cmd_pool_dhandle; 
	ErrorInfo_struct 	*errinfo_pool;
	dma_addr_t		errinfo_pool_dhandle; 
        unsigned long  		*cmd_pool_bits;
	int			nr_allocs;
	int			nr_frees; 
	int			busy_configuring;
	int			busy_initializing;

	/* This element holds the zero based queue number of the last
	 * queue to be started.  It is used for fairness.
	*/
	int			next_to_run;

	// Disk structures we need to pass back
	struct gendisk   *gendisk[CISS_MAX_LUN];
#ifdef CONFIG_CISS_SCSI_TAPE
	void *scsi_ctlr; /* ptr to structure containing scsi related stuff */
	/* list of block side commands the scsi error handling sucked up */
	/* and saved for later processing */
	struct sendcmd_reject_list scsi_rejects;
#endif
	unsigned char alive;
	struct completion *rescan_wait;
	struct task_struct *cciss_scan_thread;
};

/*  Defining the diffent access_menthods */
/*
 * Memory mapped FIFO interface (SMART 53xx cards)
 */
#define SA5_DOORBELL	0x20
#define SA5_REQUEST_PORT_OFFSET	0x40
#define SA5_REPLY_INTR_MASK_OFFSET	0x34
#define SA5_REPLY_PORT_OFFSET		0x44
#define SA5_INTR_STATUS		0x30
#define SA5_SCRATCHPAD_OFFSET	0xB0

#define SA5_CTCFG_OFFSET	0xB4
#define SA5_CTMEM_OFFSET	0xB8

#define SA5_INTR_OFF		0x08
#define SA5B_INTR_OFF		0x04
#define SA5_INTR_PENDING	0x08
#define SA5B_INTR_PENDING	0x04
#define FIFO_EMPTY		0xffffffff	
#define CCISS_FIRMWARE_READY	0xffff0000 /* value in scratchpad register */

#define  CISS_ERROR_BIT		0x02

#define CCISS_INTR_ON 	1 
#define CCISS_INTR_OFF	0
/* 
	Send the command to the hardware 
*/
static void SA5_submit_command( ctlr_info_t *h, CommandList_struct *c) 
{
#ifdef CCISS_DEBUG
	 printk("Sending %x - down to controller\n", c->busaddr );
#endif /* CCISS_DEBUG */ 
         writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
	 h->commands_outstanding++;
	 if ( h->commands_outstanding > h->max_outstanding)
		h->max_outstanding = h->commands_outstanding;
}

/*  
 *  This card is the opposite of the other cards.  
 *   0 turns interrupts on... 
 *   0x08 turns them off... 
 */
static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
{
	if (val) 
	{ /* Turn interrupts on */
		h->interrupts_enabled = 1;
		writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	} else /* Turn them off */
	{
		h->interrupts_enabled = 0;
        	writel( SA5_INTR_OFF, 
			h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	}
}
/*
 *  This card is the opposite of the other cards.
 *   0 turns interrupts on...
 *   0x04 turns them off...
 */
static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
{
        if (val)
        { /* Turn interrupts on */
		h->interrupts_enabled = 1;
                writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        } else /* Turn them off */
        {
		h->interrupts_enabled = 0;
                writel( SA5B_INTR_OFF,
                        h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
        }
}
/*
 *  Returns true if fifo is full.  
 * 
 */ 
static unsigned long SA5_fifo_full(ctlr_info_t *h)
{
	if( h->commands_outstanding >= h->max_commands)
		return(1);
	else 
		return(0);

}
/* 
 *   returns value read from hardware. 
 *     returns FIFO_EMPTY if there is nothing to read 
 */ 
static unsigned long SA5_completed(ctlr_info_t *h)
{
	unsigned long register_value 
		= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
	if(register_value != FIFO_EMPTY)
	{
		h->commands_outstanding--;
#ifdef CCISS_DEBUG
		printk("cciss:  Read %lx back from board\n", register_value);
#endif /* CCISS_DEBUG */ 
	} 
#ifdef CCISS_DEBUG
	else
	{
		printk("cciss:  FIFO Empty read\n");
	}
#endif 
	return ( register_value); 

}
/*
 *	Returns true if an interrupt is pending.. 
 */
static unsigned long SA5_intr_pending(ctlr_info_t *h)
{
	unsigned long register_value  = 
		readl(h->vaddr + SA5_INTR_STATUS);
#ifdef CCISS_DEBUG
	printk("cciss: intr_pending %lx\n", register_value);
#endif  /* CCISS_DEBUG */
	if( register_value &  SA5_INTR_PENDING) 
		return  1;	
	return 0 ;
}

/*
 *      Returns true if an interrupt is pending..
 */
static unsigned long SA5B_intr_pending(ctlr_info_t *h)
{
        unsigned long register_value  =
                readl(h->vaddr + SA5_INTR_STATUS);
#ifdef CCISS_DEBUG
        printk("cciss: intr_pending %lx\n", register_value);
#endif  /* CCISS_DEBUG */
        if( register_value &  SA5B_INTR_PENDING)
                return  1;
        return 0 ;
}


static struct access_method SA5_access = {
	SA5_submit_command,
	SA5_intr_mask,
	SA5_fifo_full,
	SA5_intr_pending,
	SA5_completed,
};

static struct access_method SA5B_access = {
        SA5_submit_command,
        SA5B_intr_mask,
        SA5_fifo_full,
        SA5B_intr_pending,
        SA5_completed,
};

struct board_type {
	__u32	board_id;
	char	*product_name;
	struct access_method *access;
	int nr_cmds; /* Max cmds this kind of ctlr can handle. */
};

#define CCISS_LOCK(i)	(&hba[i]->lock)

#endif /* CCISS_H */
Commit	Line	Data
1da177e4 LT	1	#ifndef CCISS_H
	2	#define CCISS_H
	3
	4	#include <linux/genhd.h>
	5
	6	#include "cciss_cmd.h"
	7
	8
1da177e4 LT	9	#define NWD_SHIFT 4
	10	#define MAX_PART (1 << NWD_SHIFT)
	11
	12	#define IO_OK 0
	13	#define IO_ERROR 1
	14
1da177e4 LT	15	struct ctlr_info;
	16	typedef struct ctlr_info ctlr_info_t;
	17
	18	struct access_method {
	19	void (submit_command)(ctlr_info_t h, CommandList_struct *c);
	20	void (set_intr_mask)(ctlr_info_t h, unsigned long val);
	21	unsigned long (fifo_full)(ctlr_info_t h);
	22	unsigned long (intr_pending)(ctlr_info_t h);
	23	unsigned long (command_completed)(ctlr_info_t h);
	24	};
	25	typedef struct _drive_info_struct
	26	{
	27	__u32 LunID;
	28	int usage_count;
ad2b9312	29	struct request_queue *queue;
1da177e4 LT	30	sector_t nr_blocks;
	31	int block_size;
	32	int heads;
	33	int sectors;
	34	int cylinders;
ddd47442 MM	35	int raid_level; /* set to -1 to indicate that
	36	* the drive is not in use/configured
	37	*/
	38	int busy_configuring; /*This is set when the drive is being removed
	39	*to prevent it from being opened or it's queue
	40	*from being started.
	41	*/
a72da29b MM	42	__u8 serial_no[16]; /* from inquiry page 0x83, */
a72da29b MM	43	/* not necc. null terminated. */
1da177e4 LT	44	} drive_info_struct;
1da177e4 LT	45
3da8b713	46	#ifdef CONFIG_CISS_SCSI_TAPE
	47
	48	struct sendcmd_reject_list {
	49	int ncompletions;
	50	unsigned long complete; / array of NR_CMDS tags */
	51	};
	52
	53	#endif
1da177e4 LT	54	struct ctlr_info
	55	{
	56	int ctlr;
	57	char devname[8];
	58	char *product_name;
	59	char firm_ver[4]; // Firmware version
	60	struct pci_dev *pdev;
	61	__u32 board_id;
	62	void __iomem *vaddr;
	63	unsigned long paddr;
f880632f	64	int nr_cmds; /* Number of commands allowed on this controller */
1da177e4	65	CfgTable_struct __iomem *cfgtable;
1da177e4 LT	66	int interrupts_enabled;
	67	int major;
	68	int max_commands;
	69	int commands_outstanding;
	70	int max_outstanding; /* Debug */
	71	int num_luns;
	72	int highest_lun;
	73	int usage_count; /* number of opens all all minor devices */
fb86a35b MM	74	# define DOORBELL_INT 0
	75	# define PERF_MODE_INT 1
	76	# define SIMPLE_MODE_INT 2
	77	# define MEMQ_MODE_INT 3
	78	unsigned int intr[4];
	79	unsigned int msix_vector;
	80	unsigned int msi_vector;
92c4231a	81	int cciss_max_sectors;
00988a35 MMOD	82	BYTE cciss_read;
	83	BYTE cciss_write;
	84	BYTE cciss_read_capacity;
1da177e4 LT	85
	86	// information about each logical volume
	87	drive_info_struct drv[CISS_MAX_LUN];
	88
	89	struct access_method access;
	90
	91	/* queue and queue Info */
8a3173de JA	92	struct hlist_head reqQ;
8a3173de JA	93	struct hlist_head cmpQ;
1da177e4 LT	94	unsigned int Qdepth;
	95	unsigned int maxQsinceinit;
	96	unsigned int maxSG;
	97	spinlock_t lock;
1da177e4 LT	98
	99	//* pointers to command and error info pool */
	100	CommandList_struct *cmd_pool;
	101	dma_addr_t cmd_pool_dhandle;
	102	ErrorInfo_struct *errinfo_pool;
	103	dma_addr_t errinfo_pool_dhandle;
	104	unsigned long *cmd_pool_bits;
	105	int nr_allocs;
	106	int nr_frees;
	107	int busy_configuring;
1f8ef380	108	int busy_initializing;
1da177e4 LT	109
	110	/* This element holds the zero based queue number of the last
	111	* queue to be started. It is used for fairness.
	112	*/
	113	int next_to_run;
	114
	115	// Disk structures we need to pass back
799202cb	116	struct gendisk *gendisk[CISS_MAX_LUN];
1da177e4 LT	117	#ifdef CONFIG_CISS_SCSI_TAPE
1da177e4 LT	118	void scsi_ctlr; / ptr to structure containing scsi related stuff */
3da8b713	119	/* list of block side commands the scsi error handling sucked up */
	120	/* and saved for later processing */
	121	struct sendcmd_reject_list scsi_rejects;
1da177e4	122	#endif
33079b21	123	unsigned char alive;
0a9279cc MM	124	struct completion *rescan_wait;
0a9279cc MM	125	struct task_struct *cciss_scan_thread;
1da177e4 LT	126	};
	127
	128	/* Defining the diffent access_menthods */
	129	/*
	130	* Memory mapped FIFO interface (SMART 53xx cards)
	131	*/
	132	#define SA5_DOORBELL 0x20
	133	#define SA5_REQUEST_PORT_OFFSET 0x40
	134	#define SA5_REPLY_INTR_MASK_OFFSET 0x34
	135	#define SA5_REPLY_PORT_OFFSET 0x44
	136	#define SA5_INTR_STATUS 0x30
	137	#define SA5_SCRATCHPAD_OFFSET 0xB0
	138
	139	#define SA5_CTCFG_OFFSET 0xB4
	140	#define SA5_CTMEM_OFFSET 0xB8
	141
	142	#define SA5_INTR_OFF 0x08
	143	#define SA5B_INTR_OFF 0x04
	144	#define SA5_INTR_PENDING 0x08
	145	#define SA5B_INTR_PENDING 0x04
	146	#define FIFO_EMPTY 0xffffffff
	147	#define CCISS_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */
	148
	149	#define CISS_ERROR_BIT 0x02
	150
	151	#define CCISS_INTR_ON 1
	152	#define CCISS_INTR_OFF 0
	153	/*
	154	Send the command to the hardware
	155	*/
	156	static void SA5_submit_command( ctlr_info_t h, CommandList_struct c)
	157	{
	158	#ifdef CCISS_DEBUG
	159	printk("Sending %x - down to controller\n", c->busaddr );
	160	#endif /* CCISS_DEBUG */
	161	writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
	162	h->commands_outstanding++;
	163	if ( h->commands_outstanding > h->max_outstanding)
	164	h->max_outstanding = h->commands_outstanding;
	165	}
	166
	167	/*
	168	* This card is the opposite of the other cards.
	169	* 0 turns interrupts on...
	170	* 0x08 turns them off...
	171	*/
	172	static void SA5_intr_mask(ctlr_info_t *h, unsigned long val)
	173	{
	174	if (val)
	175	{ /* Turn interrupts on */
	176	h->interrupts_enabled = 1;
	177	writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	178	} else /* Turn them off */
	179	{
	180	h->interrupts_enabled = 0;
	181	writel( SA5_INTR_OFF,
	182	h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
	183	}
	184	}
	185	/*
	186	* This card is the opposite of the other cards.
	187	* 0 turns interrupts on...
	188	* 0x04 turns them off...
	189	*/
190	static void SA5B_intr_mask(ctlr_info_t *h, unsigned long val)
191	{
192	if (val)
193	{ /* Turn interrupts on */
194	h->interrupts_enabled = 1;
195	writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
196	} else /* Turn them off */
197	{
198	h->interrupts_enabled = 0;
199	writel( SA5B_INTR_OFF,
200	h->vaddr + SA5_REPLY_INTR_MASK_OFFSET);
201	}
202	}
203	/*
204	* Returns true if fifo is full.
205	*
206	*/
207	static unsigned long SA5_fifo_full(ctlr_info_t *h)
208	{
209	if( h->commands_outstanding >= h->max_commands)
210	return(1);
211	else
212	return(0);
213
214	}
215	/*
216	* returns value read from hardware.
217	* returns FIFO_EMPTY if there is nothing to read
218	*/
219	static unsigned long SA5_completed(ctlr_info_t *h)
220	{
221	unsigned long register_value
222	= readl(h->vaddr + SA5_REPLY_PORT_OFFSET);
223	if(register_value != FIFO_EMPTY)
224	{
225	h->commands_outstanding--;
226	#ifdef CCISS_DEBUG
227	printk("cciss: Read %lx back from board\n", register_value);
228	#endif /* CCISS_DEBUG */
229	}
230	#ifdef CCISS_DEBUG
231	else
232	{
233	printk("cciss: FIFO Empty read\n");
234	}
235	#endif
236	return ( register_value);
237
238	}
239	/*
240	* Returns true if an interrupt is pending..
241	*/
242	static unsigned long SA5_intr_pending(ctlr_info_t *h)
243	{
244	unsigned long register_value =
245	readl(h->vaddr + SA5_INTR_STATUS);
246	#ifdef CCISS_DEBUG
247	printk("cciss: intr_pending %lx\n", register_value);
248	#endif /* CCISS_DEBUG */
249	if( register_value & SA5_INTR_PENDING)
250	return 1;
251	return 0 ;
252	}
253
254	/*
255	* Returns true if an interrupt is pending..
256	*/
257	static unsigned long SA5B_intr_pending(ctlr_info_t *h)
258	{
259	unsigned long register_value =
260	readl(h->vaddr + SA5_INTR_STATUS);
261	#ifdef CCISS_DEBUG
262	printk("cciss: intr_pending %lx\n", register_value);
263	#endif /* CCISS_DEBUG */
264	if( register_value & SA5B_INTR_PENDING)
265	return 1;
266	return 0 ;
267	}
268
269
270	static struct access_method SA5_access = {
271	SA5_submit_command,
272	SA5_intr_mask,
273	SA5_fifo_full,
274	SA5_intr_pending,
275	SA5_completed,
276	};
277
278	static struct access_method SA5B_access = {
279	SA5_submit_command,
280	SA5B_intr_mask,
281	SA5_fifo_full,
282	SA5B_intr_pending,
283	SA5_completed,
284	};
285
286	struct board_type {
287	__u32 board_id;
288	char *product_name;
289	struct access_method *access;
f880632f	290	int nr_cmds; /* Max cmds this kind of ctlr can handle. */
1da177e4 LT	291	};
1da177e4 LT	292
ad2b9312	293	#define CCISS_LOCK(i) (&hba[i]->lock)
1da177e4 LT	294
	295	#endif /* CCISS_H */
	296