projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Replace <asm/uaccess.h> with <linux/uaccess.h> globally
[linux-2.6-block.git] / drivers / block / cciss.c
CommitLineData
1da177e4 1/*
bd4f36d6
MM		 2 * Disk Array driver for HP Smart Array controllers.
3 * (C) Copyright 2000, 2007 Hewlett-Packard Development Company, L.P.
1da177e4
LT		 4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
bd4f36d6 7 * the Free Software Foundation; version 2 of the License.
1da177e4
LT		 8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
bd4f36d6
MM		 11 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
1da177e4
LT		 13 *
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
bd4f36d6
MM		 16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
17 * 02111-1307, USA.
1da177e4
LT		 18 *
19 * Questions/Comments/Bugfixes to iss_storagedev@hp.com
20 *
21 */
22
1da177e4
LT		 23#include <linux/module.h>
24#include <linux/interrupt.h>
25#include <linux/types.h>
26#include <linux/pci.h>
19373358 27#include <linux/pci-aspm.h>
1da177e4
LT		 28#include <linux/kernel.h>
29#include <linux/slab.h>
30#include <linux/delay.h>
31#include <linux/major.h>
32#include <linux/fs.h>
33#include <linux/bio.h>
34#include <linux/blkpg.h>
35#include <linux/timer.h>
36#include <linux/proc_fs.h>
89b6e743 37#include <linux/seq_file.h>
7c832835 38#include <linux/init.h>
4d761609 39#include <linux/jiffies.h>
1da177e4
LT		 40#include <linux/hdreg.h>
41#include <linux/spinlock.h>
42#include <linux/compat.h>
b368c9dd 43#include <linux/mutex.h>
1f118bc4 44#include <linux/bitmap.h>
d48c152a 45#include <linux/io.h>
7c0f6ba6 46#include <linux/uaccess.h>
1da177e4 47
eb0df996 48#include <linux/dma-mapping.h>
1da177e4
LT		 49#include <linux/blkdev.h>
50#include <linux/genhd.h>
51#include <linux/completion.h>
d5d3b736 52#include <scsi/scsi.h>
03bbfee5
MMOD		 53#include <scsi/sg.h>
54#include <scsi/scsi_ioctl.h>
55#include <linux/cdrom.h>
231bc2a2 56#include <linux/scatterlist.h>
0a9279cc 57#include <linux/kthread.h>
1da177e4
LT		 58
59#define CCISS_DRIVER_VERSION(maj,min,submin) ((maj<<16)|(min<<8)|(submin))
841fdffd
MM		 60#define DRIVER_NAME "HP CISS Driver (v 3.6.26)"
61#define DRIVER_VERSION CCISS_DRIVER_VERSION(3, 6, 26)
1da177e4
LT		 62
63/* Embedded module documentation macros - see modules.h */
64MODULE_AUTHOR("Hewlett-Packard Company");
24aac480 65MODULE_DESCRIPTION("Driver for HP Smart Array Controllers");
841fdffd
MM		 66MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers");
67MODULE_VERSION("3.6.26");
1da177e4 68MODULE_LICENSE("GPL");
8a4ec67b
SC		 69static int cciss_tape_cmds = 6;
70module_param(cciss_tape_cmds, int, 0644);
71MODULE_PARM_DESC(cciss_tape_cmds,
72 "number of commands to allocate for tape devices (default: 6)");
13049537
JH		 73static int cciss_simple_mode;
74module_param(cciss_simple_mode, int, S_IRUGO|S_IWUSR);
75MODULE_PARM_DESC(cciss_simple_mode,
76 "Use 'simple mode' rather than 'performant mode'");
1da177e4 77
e4292e05
MM		 78static int cciss_allow_hpsa;
79module_param(cciss_allow_hpsa, int, S_IRUGO|S_IWUSR);
80MODULE_PARM_DESC(cciss_allow_hpsa,
81 "Prevent cciss driver from accessing hardware known to be "
82 " supported by the hpsa driver");
83
2a48fc0a 84static DEFINE_MUTEX(cciss_mutex);
bbe425cd 85static struct proc_dir_entry *proc_cciss;
2ec24ff1 86
1da177e4
LT		 87#include "cciss_cmd.h"
88#include "cciss.h"
89#include <linux/cciss_ioctl.h>
90
91/* define the PCI info for the cards we can control */
92static const struct pci_device_id cciss_pci_device_id[] = {
f82ccdb9
BH		 93 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISS, 0x0E11, 0x4070},
94 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4080},
95 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4082},
96 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSB, 0x0E11, 0x4083},
97 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x4091},
98 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409A},
99 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409B},
100 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409C},
101 {PCI_VENDOR_ID_COMPAQ, PCI_DEVICE_ID_COMPAQ_CISSC, 0x0E11, 0x409D},
102 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSA, 0x103C, 0x3225},
103 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223},
104 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234},
105 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3235},
106 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3211},
107 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3212},
108 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3213},
109 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3214},
110 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSD, 0x103C, 0x3215},
de923916 111 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3237},
9cff3b38 112 {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D},
1da177e4
LT		 113 {0,}
114};
7c832835 115
1da177e4
LT		 116MODULE_DEVICE_TABLE(pci, cciss_pci_device_id);
117
1da177e4
LT		 118/* board_id = Subsystem Device ID & Vendor ID
119 * product = Marketing Name for the board
7c832835 120 * access = Address of the struct of function pointers
1da177e4
LT		 121 */
122static struct board_type products[] = {
49153998
MM		 123 {0x40700E11, "Smart Array 5300", &SA5_access},
124 {0x40800E11, "Smart Array 5i", &SA5B_access},
125 {0x40820E11, "Smart Array 532", &SA5B_access},
126 {0x40830E11, "Smart Array 5312", &SA5B_access},
127 {0x409A0E11, "Smart Array 641", &SA5_access},
128 {0x409B0E11, "Smart Array 642", &SA5_access},
129 {0x409C0E11, "Smart Array 6400", &SA5_access},
130 {0x409D0E11, "Smart Array 6400 EM", &SA5_access},
131 {0x40910E11, "Smart Array 6i", &SA5_access},
132 {0x3225103C, "Smart Array P600", &SA5_access},
4205df34
SC		 133 {0x3223103C, "Smart Array P800", &SA5_access},
134 {0x3234103C, "Smart Array P400", &SA5_access},
49153998
MM		 135 {0x3235103C, "Smart Array P400i", &SA5_access},
136 {0x3211103C, "Smart Array E200i", &SA5_access},
137 {0x3212103C, "Smart Array E200", &SA5_access},
138 {0x3213103C, "Smart Array E200i", &SA5_access},
139 {0x3214103C, "Smart Array E200i", &SA5_access},
140 {0x3215103C, "Smart Array E200i", &SA5_access},
141 {0x3237103C, "Smart Array E500", &SA5_access},
142 {0x323D103C, "Smart Array P700m", &SA5_access},
1da177e4
LT		 143};
144
d14c4ab5 145/* How long to wait (in milliseconds) for board to go into simple mode */
7c832835 146#define MAX_CONFIG_WAIT 30000
1da177e4
LT		 147#define MAX_IOCTL_CONFIG_WAIT 1000
148
149/*define how many times we will try a command because of bus resets */
150#define MAX_CMD_RETRIES 3
151
1da177e4
LT		 152#define MAX_CTLR 32
153
154/* Originally cciss driver only supports 8 major numbers */
155#define MAX_CTLR_ORIG 8
156
1da177e4
LT		 157static ctlr_info_t *hba[MAX_CTLR];
158
b368c9dd
AP		 159static struct task_struct *cciss_scan_thread;
160static DEFINE_MUTEX(scan_mutex);
161static LIST_HEAD(scan_q);
162
165125e1 163static void do_cciss_request(struct request_queue *q);
0c2b3908
MM		 164static irqreturn_t do_cciss_intx(int irq, void *dev_id);
165static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id);
ef7822c2 166static int cciss_open(struct block_device *bdev, fmode_t mode);
6e9624b8 167static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode);
db2a144b 168static void cciss_release(struct gendisk *disk, fmode_t mode);
ef7822c2 169static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
7c832835 170 unsigned int cmd, unsigned long arg);
a885c8c4 171static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo);
1da177e4 172
1da177e4 173static int cciss_revalidate(struct gendisk *disk);
2d11d993 174static int rebuild_lun_table(ctlr_info_t *h, int first_time, int via_ioctl);
a0ea8622 175static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 176 int clear_all, int via_ioctl);
1da177e4 177
f70dba83 178static void cciss_read_capacity(ctlr_info_t *h, int logvol,
00988a35 179 sector_t *total_size, unsigned int *block_size);
f70dba83 180static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
00988a35 181 sector_t *total_size, unsigned int *block_size);
f70dba83 182static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 183 sector_t total_size,
00988a35 184 unsigned int block_size, InquiryData_struct *inq_buff,
7c832835 185 drive_info_struct *drv);
8d85fce7
GKH		 186static void cciss_interrupt_mode(ctlr_info_t *);
187static int cciss_enter_simple_mode(struct ctlr_info *h);
7c832835 188static void start_io(ctlr_info_t *h);
f70dba83 189static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 190 __u8 page_code, unsigned char scsi3addr[],
191 int cmd_type);
85cc61ae 192static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
193 int attempt_retry);
194static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c);
1da177e4 195
d6f4965d 196static int add_to_scan_list(struct ctlr_info *h);
0a9279cc
MM		 197static int scan_thread(void *data);
198static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c);
617e1344
SC		 199static void cciss_hba_release(struct device *dev);
200static void cciss_device_release(struct device *dev);
361e9b07 201static void cciss_free_gendisk(ctlr_info_t *h, int drv_index);
9cef0d2f 202static void cciss_free_drive_info(ctlr_info_t *h, int drv_index);
29979a71 203static inline u32 next_command(ctlr_info_t *h);
8d85fce7
GKH		 204static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
205 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
206 u64 *cfg_offset);
207static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
208 unsigned long *memory_bar);
16011131 209static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag);
8d85fce7 210static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable);
33079b21 211
5e216153
MM		 212/* performant mode helper functions */
213static void calc_bucket_map(int *bucket, int num_buckets, int nsgs,
214 int *bucket_map);
215static void cciss_put_controller_into_performant_mode(ctlr_info_t *h);
33079b21 216
1da177e4 217#ifdef CONFIG_PROC_FS
f70dba83 218static void cciss_procinit(ctlr_info_t *h);
1da177e4 219#else
f70dba83 220static void cciss_procinit(ctlr_info_t *h)
7c832835
BH		 221{
222}
223#endif /* CONFIG_PROC_FS */
1da177e4
LT		 224
225#ifdef CONFIG_COMPAT
ef7822c2
AV		 226static int cciss_compat_ioctl(struct block_device *, fmode_t,
227 unsigned, unsigned long);
1da177e4
LT		 228#endif
229
83d5cde4 230static const struct block_device_operations cciss_fops = {
7c832835 231 .owner = THIS_MODULE,
6e9624b8 232 .open = cciss_unlocked_open,
ef7822c2 233 .release = cciss_release,
03f47e88 234 .ioctl = cciss_ioctl,
7c832835 235 .getgeo = cciss_getgeo,
1da177e4 236#ifdef CONFIG_COMPAT
ef7822c2 237 .compat_ioctl = cciss_compat_ioctl,
1da177e4 238#endif
7c832835 239 .revalidate_disk = cciss_revalidate,
1da177e4
LT		 240};
241
5e216153
MM		 242/* set_performant_mode: Modify the tag for cciss performant
243 * set bit 0 for pull model, bits 3-1 for block fetch
244 * register number
245 */
246static void set_performant_mode(ctlr_info_t *h, CommandList_struct *c)
247{
0498cc2a 248 if (likely(h->transMethod & CFGTBL_Trans_Performant))
5e216153
MM		 249 c->busaddr |= 1 | (h->blockFetchTable[c->Header.SGList] << 1);
250}
251
1da177e4
LT		 252/*
253 * Enqueuing and dequeuing functions for cmdlists.
254 */
e6e1ee93 255static inline void addQ(struct list_head *list, CommandList_struct *c)
1da177e4 256{
e6e1ee93 257 list_add_tail(&c->list, list);
1da177e4
LT		 258}
259
8a3173de 260static inline void removeQ(CommandList_struct *c)
1da177e4 261{
b59e64d0
HR		 262 /*
263 * After kexec/dump some commands might still
264 * be in flight, which the firmware will try
265 * to complete. Resetting the firmware doesn't work
266 * with old fw revisions, so we have to mark
267 * them off as 'stale' to prevent the driver from
268 * falling over.
269 */
e6e1ee93 270 if (WARN_ON(list_empty(&c->list))) {
b59e64d0 271 c->cmd_type = CMD_MSG_STALE;
8a3173de 272 return;
b59e64d0 273 }
8a3173de 274
e6e1ee93 275 list_del_init(&c->list);
1da177e4
LT		 276}
277
664a717d
MM		 278static void enqueue_cmd_and_start_io(ctlr_info_t *h,
279 CommandList_struct *c)
280{
281 unsigned long flags;
5e216153 282 set_performant_mode(h, c);
664a717d
MM		 283 spin_lock_irqsave(&h->lock, flags);
284 addQ(&h->reqQ, c);
285 h->Qdepth++;
2a643ec6
SC		 286 if (h->Qdepth > h->maxQsinceinit)
287 h->maxQsinceinit = h->Qdepth;
664a717d
MM		 288 start_io(h);
289 spin_unlock_irqrestore(&h->lock, flags);
290}
291
dccc9b56 292static void cciss_free_sg_chain_blocks(SGDescriptor_struct **cmd_sg_list,
49fc5601
SC		 293 int nr_cmds)
294{
295 int i;
296
297 if (!cmd_sg_list)
298 return;
299 for (i = 0; i < nr_cmds; i++) {
dccc9b56
SC		 300 kfree(cmd_sg_list[i]);
301 cmd_sg_list[i] = NULL;
49fc5601
SC		 302 }
303 kfree(cmd_sg_list);
304}
305
dccc9b56
SC		 306static SGDescriptor_struct **cciss_allocate_sg_chain_blocks(
307 ctlr_info_t *h, int chainsize, int nr_cmds)
49fc5601
SC		 308{
309 int j;
dccc9b56 310 SGDescriptor_struct **cmd_sg_list;
49fc5601
SC		 311
312 if (chainsize <= 0)
313 return NULL;
314
315 cmd_sg_list = kmalloc(sizeof(*cmd_sg_list) * nr_cmds, GFP_KERNEL);
316 if (!cmd_sg_list)
317 return NULL;
318
319 /* Build up chain blocks for each command */
320 for (j = 0; j < nr_cmds; j++) {
49fc5601 321 /* Need a block of chainsized s/g elements. */
dccc9b56
SC		 322 cmd_sg_list[j] = kmalloc((chainsize *
323 sizeof(*cmd_sg_list[j])), GFP_KERNEL);
324 if (!cmd_sg_list[j]) {
49fc5601
SC		 325 dev_err(&h->pdev->dev, "Cannot get memory "
326 "for s/g chains.\n");
327 goto clean;
328 }
329 }
330 return cmd_sg_list;
331clean:
332 cciss_free_sg_chain_blocks(cmd_sg_list, nr_cmds);
333 return NULL;
334}
335
d45033ef
SC		 336static void cciss_unmap_sg_chain_block(ctlr_info_t *h, CommandList_struct *c)
337{
338 SGDescriptor_struct *chain_sg;
339 u64bit temp64;
340
341 if (c->Header.SGTotal <= h->max_cmd_sgentries)
342 return;
343
344 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
345 temp64.val32.lower = chain_sg->Addr.lower;
346 temp64.val32.upper = chain_sg->Addr.upper;
347 pci_unmap_single(h->pdev, temp64.val, chain_sg->Len, PCI_DMA_TODEVICE);
348}
349
350static void cciss_map_sg_chain_block(ctlr_info_t *h, CommandList_struct *c,
351 SGDescriptor_struct *chain_block, int len)
352{
353 SGDescriptor_struct *chain_sg;
354 u64bit temp64;
355
356 chain_sg = &c->SG[h->max_cmd_sgentries - 1];
357 chain_sg->Ext = CCISS_SG_CHAIN;
358 chain_sg->Len = len;
359 temp64.val = pci_map_single(h->pdev, chain_block, len,
360 PCI_DMA_TODEVICE);
361 chain_sg->Addr.lower = temp64.val32.lower;
362 chain_sg->Addr.upper = temp64.val32.upper;
363}
364
1da177e4
LT		 365#include "cciss_scsi.c" /* For SCSI tape support */
366
1e6f2dc1
AB		 367static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG",
368 "UNKNOWN"
369};
0e4a9d03 370#define RAID_UNKNOWN (ARRAY_SIZE(raid_label)-1)
0f5486ec 371
1da177e4
LT		 372#ifdef CONFIG_PROC_FS
373
374/*
375 * Report information about this controller.
376 */
377#define ENG_GIG 1000000000
378#define ENG_GIG_FACTOR (ENG_GIG/512)
89b6e743 379#define ENGAGE_SCSI "engage scsi"
1da177e4 380
89b6e743 381static void cciss_seq_show_header(struct seq_file *seq)
1da177e4 382{
89b6e743
MM		 383 ctlr_info_t *h = seq->private;
384
385 seq_printf(seq, "%s: HP %s Controller\n"
386 "Board ID: 0x%08lx\n"
387 "Firmware Version: %c%c%c%c\n"
388 "IRQ: %d\n"
389 "Logical drives: %d\n"
390 "Current Q depth: %d\n"
391 "Current # commands on controller: %d\n"
392 "Max Q depth since init: %d\n"
393 "Max # commands on controller since init: %d\n"
394 "Max SG entries since init: %d\n",
395 h->devname,
396 h->product_name,
397 (unsigned long)h->board_id,
398 h->firm_ver[0], h->firm_ver[1], h->firm_ver[2],
13049537 399 h->firm_ver[3], (unsigned int)h->intr[h->intr_mode],
89b6e743
MM		 400 h->num_luns,
401 h->Qdepth, h->commands_outstanding,
402 h->maxQsinceinit, h->max_outstanding, h->maxSG);
403
404#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 405 cciss_seq_tape_report(seq, h);
89b6e743
MM		 406#endif /* CONFIG_CISS_SCSI_TAPE */
407}
1da177e4 408
89b6e743
MM		 409static void *cciss_seq_start(struct seq_file *seq, loff_t *pos)
410{
411 ctlr_info_t *h = seq->private;
89b6e743 412 unsigned long flags;
1da177e4
LT		 413
414 /* prevent displaying bogus info during configuration
415 * or deconfiguration of a logical volume
416 */
f70dba83 417 spin_lock_irqsave(&h->lock, flags);
1da177e4 418 if (h->busy_configuring) {
f70dba83 419 spin_unlock_irqrestore(&h->lock, flags);
89b6e743 420 return ERR_PTR(-EBUSY);
1da177e4
LT		 421 }
422 h->busy_configuring = 1;
f70dba83 423 spin_unlock_irqrestore(&h->lock, flags);
1da177e4 424
89b6e743
MM		 425 if (*pos == 0)
426 cciss_seq_show_header(seq);
427
428 return pos;
429}
430
431static int cciss_seq_show(struct seq_file *seq, void *v)
432{
433 sector_t vol_sz, vol_sz_frac;
434 ctlr_info_t *h = seq->private;
435 unsigned ctlr = h->ctlr;
436 loff_t *pos = v;
9cef0d2f 437 drive_info_struct *drv = h->drv[*pos];
89b6e743
MM		 438
439 if (*pos > h->highest_lun)
440 return 0;
441
531c2dc7
SC		 442 if (drv == NULL) /* it's possible for h->drv[] to have holes. */
443 return 0;
444
89b6e743
MM		 445 if (drv->heads == 0)
446 return 0;
447
448 vol_sz = drv->nr_blocks;
449 vol_sz_frac = sector_div(vol_sz, ENG_GIG_FACTOR);
450 vol_sz_frac *= 100;
451 sector_div(vol_sz_frac, ENG_GIG_FACTOR);
452
fa52bec9 453 if (drv->raid_level < 0 || drv->raid_level > RAID_UNKNOWN)
89b6e743
MM		 454 drv->raid_level = RAID_UNKNOWN;
455 seq_printf(seq, "cciss/c%dd%d:"
456 "\t%4u.%02uGB\tRAID %s\n",
457 ctlr, (int) *pos, (int)vol_sz, (int)vol_sz_frac,
458 raid_label[drv->raid_level]);
459 return 0;
460}
461
462static void *cciss_seq_next(struct seq_file *seq, void *v, loff_t *pos)
463{
464 ctlr_info_t *h = seq->private;
465
466 if (*pos > h->highest_lun)
467 return NULL;
468 *pos += 1;
469
470 return pos;
471}
472
473static void cciss_seq_stop(struct seq_file *seq, void *v)
474{
475 ctlr_info_t *h = seq->private;
476
477 /* Only reset h->busy_configuring if we succeeded in setting
478 * it during cciss_seq_start. */
479 if (v == ERR_PTR(-EBUSY))
480 return;
7c832835 481
1da177e4 482 h->busy_configuring = 0;
1da177e4
LT		 483}
484
88e9d34c 485static const struct seq_operations cciss_seq_ops = {
89b6e743
MM		 486 .start = cciss_seq_start,
487 .show = cciss_seq_show,
488 .next = cciss_seq_next,
489 .stop = cciss_seq_stop,
490};
491
492static int cciss_seq_open(struct inode *inode, struct file *file)
493{
494 int ret = seq_open(file, &cciss_seq_ops);
495 struct seq_file *seq = file->private_data;
496
497 if (!ret)
d9dda78b 498 seq->private = PDE_DATA(inode);
89b6e743
MM		 499
500 return ret;
501}
502
503static ssize_t
504cciss_proc_write(struct file *file, const char __user *buf,
505 size_t length, loff_t *ppos)
1da177e4 506{
89b6e743
MM		 507 int err;
508 char *buffer;
509
510#ifndef CONFIG_CISS_SCSI_TAPE
511 return -EINVAL;
1da177e4
LT		 512#endif
513
89b6e743 514 if (!buf || length > PAGE_SIZE - 1)
7c832835 515 return -EINVAL;
89b6e743 516
e4e85bb0
AV		 517 buffer = memdup_user_nul(buf, length);
518 if (IS_ERR(buffer))
519 return PTR_ERR(buffer);
89b6e743
MM		 520
521#ifdef CONFIG_CISS_SCSI_TAPE
522 if (strncmp(ENGAGE_SCSI, buffer, sizeof ENGAGE_SCSI - 1) == 0) {
523 struct seq_file *seq = file->private_data;
524 ctlr_info_t *h = seq->private;
89b6e743 525
f70dba83 526 err = cciss_engage_scsi(h);
8721c81f 527 if (err == 0)
89b6e743
MM		 528 err = length;
529 } else
530#endif /* CONFIG_CISS_SCSI_TAPE */
531 err = -EINVAL;
7c832835
BH		 532 /* might be nice to have "disengage" too, but it's not
533 safely possible. (only 1 module use count, lock issues.) */
89b6e743 534
e4e85bb0 535 kfree(buffer);
89b6e743 536 return err;
1da177e4
LT		 537}
538
828c0950 539static const struct file_operations cciss_proc_fops = {
89b6e743
MM		 540 .owner = THIS_MODULE,
541 .open = cciss_seq_open,
542 .read = seq_read,
543 .llseek = seq_lseek,
544 .release = seq_release,
545 .write = cciss_proc_write,
546};
547
8d85fce7 548static void cciss_procinit(ctlr_info_t *h)
1da177e4
LT		 549{
550 struct proc_dir_entry *pde;
551
89b6e743 552 if (proc_cciss == NULL)
928b4d8c 553 proc_cciss = proc_mkdir("driver/cciss", NULL);
89b6e743
MM		 554 if (!proc_cciss)
555 return;
f70dba83 556 pde = proc_create_data(h->devname, S_IWUSR | S_IRUSR | S_IRGRP |
89b6e743 557 S_IROTH, proc_cciss,
f70dba83 558 &cciss_proc_fops, h);
1da177e4 559}
7c832835 560#endif /* CONFIG_PROC_FS */
1da177e4 561
7fe06326
AP		 562#define MAX_PRODUCT_NAME_LEN 19
563
564#define to_hba(n) container_of(n, struct ctlr_info, dev)
565#define to_drv(n) container_of(n, drive_info_struct, dev)
566
ec52d5f1 567/* List of controllers which cannot be hard reset on kexec with reset_devices */
957c2ec5 568static u32 unresettable_controller[] = {
957c2ec5
SC		 569 0x3223103C, /* Smart Array P800 */
570 0x3234103C, /* Smart Array P400 */
571 0x3235103C, /* Smart Array P400i */
572 0x3211103C, /* Smart Array E200i */
573 0x3212103C, /* Smart Array E200 */
574 0x3213103C, /* Smart Array E200i */
575 0x3214103C, /* Smart Array E200i */
576 0x3215103C, /* Smart Array E200i */
577 0x3237103C, /* Smart Array E500 */
578 0x323D103C, /* Smart Array P700m */
b9ea9dcd 579 0x40800E11, /* Smart Array 5i */
957c2ec5
SC		 580 0x409C0E11, /* Smart Array 6400 */
581 0x409D0E11, /* Smart Array 6400 EM */
b9ea9dcd
TH		 582 0x40700E11, /* Smart Array 5300 */
583 0x40820E11, /* Smart Array 532 */
584 0x40830E11, /* Smart Array 5312 */
585 0x409A0E11, /* Smart Array 641 */
586 0x409B0E11, /* Smart Array 642 */
587 0x40910E11, /* Smart Array 6i */
957c2ec5
SC		 588};
589
ec52d5f1
SC		 590/* List of controllers which cannot even be soft reset */
591static u32 soft_unresettable_controller[] = {
b9ea9dcd
TH		 592 0x40800E11, /* Smart Array 5i */
593 0x40700E11, /* Smart Array 5300 */
594 0x40820E11, /* Smart Array 532 */
595 0x40830E11, /* Smart Array 5312 */
596 0x409A0E11, /* Smart Array 641 */
597 0x409B0E11, /* Smart Array 642 */
598 0x40910E11, /* Smart Array 6i */
599 /* Exclude 640x boards. These are two pci devices in one slot
600 * which share a battery backed cache module. One controls the
601 * cache, the other accesses the cache through the one that controls
602 * it. If we reset the one controlling the cache, the other will
603 * likely not be happy. Just forbid resetting this conjoined mess.
604 */
ec52d5f1
SC		 605 0x409C0E11, /* Smart Array 6400 */
606 0x409D0E11, /* Smart Array 6400 EM */
607};
608
609static int ctlr_is_hard_resettable(u32 board_id)
957c2ec5
SC		 610{
611 int i;
612
613 for (i = 0; i < ARRAY_SIZE(unresettable_controller); i++)
ec52d5f1 614 if (unresettable_controller[i] == board_id)
957c2ec5
SC		 615 return 0;
616 return 1;
617}
618
ec52d5f1
SC		 619static int ctlr_is_soft_resettable(u32 board_id)
620{
621 int i;
622
623 for (i = 0; i < ARRAY_SIZE(soft_unresettable_controller); i++)
624 if (soft_unresettable_controller[i] == board_id)
625 return 0;
626 return 1;
627}
628
629static int ctlr_is_resettable(u32 board_id)
630{
631 return ctlr_is_hard_resettable(board_id) ||
632 ctlr_is_soft_resettable(board_id);
633}
634
957c2ec5
SC		 635static ssize_t host_show_resettable(struct device *dev,
636 struct device_attribute *attr,
637 char *buf)
638{
639 struct ctlr_info *h = to_hba(dev);
640
ec52d5f1 641 return snprintf(buf, 20, "%d\n", ctlr_is_resettable(h->board_id));
957c2ec5
SC		 642}
643static DEVICE_ATTR(resettable, S_IRUGO, host_show_resettable, NULL);
644
d6f4965d
AP		 645static ssize_t host_store_rescan(struct device *dev,
646 struct device_attribute *attr,
647 const char *buf, size_t count)
648{
649 struct ctlr_info *h = to_hba(dev);
650
651 add_to_scan_list(h);
652 wake_up_process(cciss_scan_thread);
653 wait_for_completion_interruptible(&h->scan_wait);
654
655 return count;
656}
8ba95c69 657static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan);
7fe06326 658
f963d270
JH		 659static ssize_t host_show_transport_mode(struct device *dev,
660 struct device_attribute *attr,
661 char *buf)
662{
663 struct ctlr_info *h = to_hba(dev);
664
665 return snprintf(buf, 20, "%s\n",
666 h->transMethod & CFGTBL_Trans_Performant ?
667 "performant" : "simple");
668}
669static DEVICE_ATTR(transport_mode, S_IRUGO, host_show_transport_mode, NULL);
670
7fe06326
AP		 671static ssize_t dev_show_unique_id(struct device *dev,
672 struct device_attribute *attr,
673 char *buf)
674{
675 drive_info_struct *drv = to_drv(dev);
676 struct ctlr_info *h = to_hba(drv->dev.parent);
677 __u8 sn[16];
678 unsigned long flags;
679 int ret = 0;
680
f70dba83 681 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 682 if (h->busy_configuring)
683 ret = -EBUSY;
684 else
685 memcpy(sn, drv->serial_no, sizeof(sn));
f70dba83 686 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 687
688 if (ret)
689 return ret;
690 else
691 return snprintf(buf, 16 * 2 + 2,
692 "%02X%02X%02X%02X%02X%02X%02X%02X"
693 "%02X%02X%02X%02X%02X%02X%02X%02X\n",
694 sn[0], sn[1], sn[2], sn[3],
695 sn[4], sn[5], sn[6], sn[7],
696 sn[8], sn[9], sn[10], sn[11],
697 sn[12], sn[13], sn[14], sn[15]);
698}
8ba95c69 699static DEVICE_ATTR(unique_id, S_IRUGO, dev_show_unique_id, NULL);
7fe06326
AP		 700
701static ssize_t dev_show_vendor(struct device *dev,
702 struct device_attribute *attr,
703 char *buf)
704{
705 drive_info_struct *drv = to_drv(dev);
706 struct ctlr_info *h = to_hba(drv->dev.parent);
707 char vendor[VENDOR_LEN + 1];
708 unsigned long flags;
709 int ret = 0;
710
f70dba83 711 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 712 if (h->busy_configuring)
713 ret = -EBUSY;
714 else
715 memcpy(vendor, drv->vendor, VENDOR_LEN + 1);
f70dba83 716 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 717
718 if (ret)
719 return ret;
720 else
721 return snprintf(buf, sizeof(vendor) + 1, "%s\n", drv->vendor);
722}
8ba95c69 723static DEVICE_ATTR(vendor, S_IRUGO, dev_show_vendor, NULL);
7fe06326
AP		 724
725static ssize_t dev_show_model(struct device *dev,
726 struct device_attribute *attr,
727 char *buf)
728{
729 drive_info_struct *drv = to_drv(dev);
730 struct ctlr_info *h = to_hba(drv->dev.parent);
731 char model[MODEL_LEN + 1];
732 unsigned long flags;
733 int ret = 0;
734
f70dba83 735 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 736 if (h->busy_configuring)
737 ret = -EBUSY;
738 else
739 memcpy(model, drv->model, MODEL_LEN + 1);
f70dba83 740 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 741
742 if (ret)
743 return ret;
744 else
745 return snprintf(buf, sizeof(model) + 1, "%s\n", drv->model);
746}
8ba95c69 747static DEVICE_ATTR(model, S_IRUGO, dev_show_model, NULL);
7fe06326
AP		 748
749static ssize_t dev_show_rev(struct device *dev,
750 struct device_attribute *attr,
751 char *buf)
752{
753 drive_info_struct *drv = to_drv(dev);
754 struct ctlr_info *h = to_hba(drv->dev.parent);
755 char rev[REV_LEN + 1];
756 unsigned long flags;
757 int ret = 0;
758
f70dba83 759 spin_lock_irqsave(&h->lock, flags);
7fe06326
AP		 760 if (h->busy_configuring)
761 ret = -EBUSY;
762 else
763 memcpy(rev, drv->rev, REV_LEN + 1);
f70dba83 764 spin_unlock_irqrestore(&h->lock, flags);
7fe06326
AP		 765
766 if (ret)
767 return ret;
768 else
769 return snprintf(buf, sizeof(rev) + 1, "%s\n", drv->rev);
770}
8ba95c69 771static DEVICE_ATTR(rev, S_IRUGO, dev_show_rev, NULL);
7fe06326 772
ce84a8ae
SC		 773static ssize_t cciss_show_lunid(struct device *dev,
774 struct device_attribute *attr, char *buf)
775{
9cef0d2f
SC		 776 drive_info_struct *drv = to_drv(dev);
777 struct ctlr_info *h = to_hba(drv->dev.parent);
ce84a8ae
SC		 778 unsigned long flags;
779 unsigned char lunid[8];
780
f70dba83 781 spin_lock_irqsave(&h->lock, flags);
ce84a8ae 782 if (h->busy_configuring) {
f70dba83 783 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 784 return -EBUSY;
785 }
786 if (!drv->heads) {
f70dba83 787 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 788 return -ENOTTY;
789 }
790 memcpy(lunid, drv->LunID, sizeof(lunid));
f70dba83 791 spin_unlock_irqrestore(&h->lock, flags);
ce84a8ae
SC		 792 return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n",
793 lunid[0], lunid[1], lunid[2], lunid[3],
794 lunid[4], lunid[5], lunid[6], lunid[7]);
795}
8ba95c69 796static DEVICE_ATTR(lunid, S_IRUGO, cciss_show_lunid, NULL);
ce84a8ae 797
3ff1111d
SC		 798static ssize_t cciss_show_raid_level(struct device *dev,
799 struct device_attribute *attr, char *buf)
800{
9cef0d2f
SC		 801 drive_info_struct *drv = to_drv(dev);
802 struct ctlr_info *h = to_hba(drv->dev.parent);
3ff1111d
SC		 803 int raid;
804 unsigned long flags;
805
f70dba83 806 spin_lock_irqsave(&h->lock, flags);
3ff1111d 807 if (h->busy_configuring) {
f70dba83 808 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 809 return -EBUSY;
810 }
811 raid = drv->raid_level;
f70dba83 812 spin_unlock_irqrestore(&h->lock, flags);
3ff1111d
SC		 813 if (raid < 0 || raid > RAID_UNKNOWN)
814 raid = RAID_UNKNOWN;
815
816 return snprintf(buf, strlen(raid_label[raid]) + 7, "RAID %s\n",
817 raid_label[raid]);
818}
8ba95c69 819static DEVICE_ATTR(raid_level, S_IRUGO, cciss_show_raid_level, NULL);
3ff1111d 820
e272afec
SC		 821static ssize_t cciss_show_usage_count(struct device *dev,
822 struct device_attribute *attr, char *buf)
823{
9cef0d2f
SC		 824 drive_info_struct *drv = to_drv(dev);
825 struct ctlr_info *h = to_hba(drv->dev.parent);
e272afec
SC		 826 unsigned long flags;
827 int count;
828
f70dba83 829 spin_lock_irqsave(&h->lock, flags);
e272afec 830 if (h->busy_configuring) {
f70dba83 831 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 832 return -EBUSY;
833 }
834 count = drv->usage_count;
f70dba83 835 spin_unlock_irqrestore(&h->lock, flags);
e272afec
SC		 836 return snprintf(buf, 20, "%d\n", count);
837}
8ba95c69 838static DEVICE_ATTR(usage_count, S_IRUGO, cciss_show_usage_count, NULL);
e272afec 839
d6f4965d
AP		 840static struct attribute *cciss_host_attrs[] = {
841 &dev_attr_rescan.attr,
957c2ec5 842 &dev_attr_resettable.attr,
f963d270 843 &dev_attr_transport_mode.attr,
d6f4965d
AP		 844 NULL
845};
846
847static struct attribute_group cciss_host_attr_group = {
848 .attrs = cciss_host_attrs,
849};
850
9f792d9f 851static const struct attribute_group *cciss_host_attr_groups[] = {
d6f4965d
AP		 852 &cciss_host_attr_group,
853 NULL
854};
855
856static struct device_type cciss_host_type = {
857 .name = "cciss_host",
858 .groups = cciss_host_attr_groups,
617e1344 859 .release = cciss_hba_release,
d6f4965d
AP		 860};
861
7fe06326
AP		 862static struct attribute *cciss_dev_attrs[] = {
863 &dev_attr_unique_id.attr,
864 &dev_attr_model.attr,
865 &dev_attr_vendor.attr,
866 &dev_attr_rev.attr,
ce84a8ae 867 &dev_attr_lunid.attr,
3ff1111d 868 &dev_attr_raid_level.attr,
e272afec 869 &dev_attr_usage_count.attr,
7fe06326
AP		 870 NULL
871};
872
873static struct attribute_group cciss_dev_attr_group = {
874 .attrs = cciss_dev_attrs,
875};
876
a4dbd674 877static const struct attribute_group *cciss_dev_attr_groups[] = {
7fe06326
AP		 878 &cciss_dev_attr_group,
879 NULL
880};
881
882static struct device_type cciss_dev_type = {
883 .name = "cciss_device",
884 .groups = cciss_dev_attr_groups,
617e1344 885 .release = cciss_device_release,
7fe06326
AP		 886};
887
888static struct bus_type cciss_bus_type = {
889 .name = "cciss",
890};
891
617e1344
SC		 892/*
893 * cciss_hba_release is called when the reference count
894 * of h->dev goes to zero.
895 */
896static void cciss_hba_release(struct device *dev)
897{
898 /*
899 * nothing to do, but need this to avoid a warning
900 * about not having a release handler from lib/kref.c.
901 */
902}
7fe06326
AP		 903
904/*
905 * Initialize sysfs entry for each controller. This sets up and registers
906 * the 'cciss#' directory for each individual controller under
907 * /sys/bus/pci/devices/<dev>/.
908 */
909static int cciss_create_hba_sysfs_entry(struct ctlr_info *h)
910{
911 device_initialize(&h->dev);
912 h->dev.type = &cciss_host_type;
913 h->dev.bus = &cciss_bus_type;
914 dev_set_name(&h->dev, "%s", h->devname);
915 h->dev.parent = &h->pdev->dev;
916
917 return device_add(&h->dev);
918}
919
920/*
921 * Remove sysfs entries for an hba.
922 */
923static void cciss_destroy_hba_sysfs_entry(struct ctlr_info *h)
924{
925 device_del(&h->dev);
617e1344
SC		 926 put_device(&h->dev); /* final put. */
927}
928
929/* cciss_device_release is called when the reference count
9cef0d2f 930 * of h->drv[x]dev goes to zero.
617e1344
SC		 931 */
932static void cciss_device_release(struct device *dev)
933{
9cef0d2f
SC		 934 drive_info_struct *drv = to_drv(dev);
935 kfree(drv);
7fe06326
AP		 936}
937
938/*
939 * Initialize sysfs for each logical drive. This sets up and registers
940 * the 'c#d#' directory for each individual logical drive under
941 * /sys/bus/pci/devices/<dev/ccis#/. We also create a link from
942 * /sys/block/cciss!c#d# to this entry.
943 */
617e1344 944static long cciss_create_ld_sysfs_entry(struct ctlr_info *h,
7fe06326
AP		 945 int drv_index)
946{
617e1344
SC		 947 struct device *dev;
948
9cef0d2f 949 if (h->drv[drv_index]->device_initialized)
8ce51966
SC		 950 return 0;
951
9cef0d2f 952 dev = &h->drv[drv_index]->dev;
617e1344
SC		 953 device_initialize(dev);
954 dev->type = &cciss_dev_type;
955 dev->bus = &cciss_bus_type;
956 dev_set_name(dev, "c%dd%d", h->ctlr, drv_index);
957 dev->parent = &h->dev;
9cef0d2f 958 h->drv[drv_index]->device_initialized = 1;
617e1344 959 return device_add(dev);
7fe06326
AP		 960}
961
962/*
963 * Remove sysfs entries for a logical drive.
964 */
8ce51966
SC		 965static void cciss_destroy_ld_sysfs_entry(struct ctlr_info *h, int drv_index,
966 int ctlr_exiting)
7fe06326 967{
9cef0d2f 968 struct device *dev = &h->drv[drv_index]->dev;
8ce51966
SC		 969
970 /* special case for c*d0, we only destroy it on controller exit */
971 if (drv_index == 0 && !ctlr_exiting)
972 return;
973
617e1344
SC		 974 device_del(dev);
975 put_device(dev); /* the "final" put. */
9cef0d2f 976 h->drv[drv_index] = NULL;
7fe06326
AP		 977}
978
7c832835
BH		 979/*
980 * For operations that cannot sleep, a command block is allocated at init,
1da177e4 981 * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track
6b4d96b8 982 * which ones are free or in use.
7c832835 983 */
6b4d96b8 984static CommandList_struct *cmd_alloc(ctlr_info_t *h)
1da177e4
LT		 985{
986 CommandList_struct *c;
7c832835 987 int i;
1da177e4
LT		 988 u64bit temp64;
989 dma_addr_t cmd_dma_handle, err_dma_handle;
990
6b4d96b8
SC		 991 do {
992 i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds);
993 if (i == h->nr_cmds)
7c832835 994 return NULL;
1f118bc4 995 } while (test_and_set_bit(i, h->cmd_pool_bits) != 0);
6b4d96b8
SC		 996 c = h->cmd_pool + i;
997 memset(c, 0, sizeof(CommandList_struct));
998 cmd_dma_handle = h->cmd_pool_dhandle + i * sizeof(CommandList_struct);
999 c->err_info = h->errinfo_pool + i;
1000 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
1001 err_dma_handle = h->errinfo_pool_dhandle
1002 + i * sizeof(ErrorInfo_struct);
1003 h->nr_allocs++;
1da177e4 1004
6b4d96b8 1005 c->cmdindex = i;
33079b21 1006
e6e1ee93 1007 INIT_LIST_HEAD(&c->list);
6b4d96b8
SC		 1008 c->busaddr = (__u32) cmd_dma_handle;
1009 temp64.val = (__u64) err_dma_handle;
1010 c->ErrDesc.Addr.lower = temp64.val32.lower;
1011 c->ErrDesc.Addr.upper = temp64.val32.upper;
1012 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
7c832835 1013
6b4d96b8
SC		 1014 c->ctlr = h->ctlr;
1015 return c;
1016}
33079b21 1017
6b4d96b8
SC		 1018/* allocate a command using pci_alloc_consistent, used for ioctls,
1019 * etc., not for the main i/o path.
1020 */
1021static CommandList_struct *cmd_special_alloc(ctlr_info_t *h)
1022{
1023 CommandList_struct *c;
1024 u64bit temp64;
1025 dma_addr_t cmd_dma_handle, err_dma_handle;
1026
a5bbf616
JP		 1027 c = pci_zalloc_consistent(h->pdev, sizeof(CommandList_struct),
1028 &cmd_dma_handle);
6b4d96b8
SC		 1029 if (c == NULL)
1030 return NULL;
6b4d96b8
SC		 1031
1032 c->cmdindex = -1;
1033
a5bbf616
JP		 1034 c->err_info = pci_zalloc_consistent(h->pdev, sizeof(ErrorInfo_struct),
1035 &err_dma_handle);
6b4d96b8
SC		 1036
1037 if (c->err_info == NULL) {
1038 pci_free_consistent(h->pdev,
1039 sizeof(CommandList_struct), c, cmd_dma_handle);
1040 return NULL;
7c832835 1041 }
1da177e4 1042
e6e1ee93 1043 INIT_LIST_HEAD(&c->list);
1da177e4 1044 c->busaddr = (__u32) cmd_dma_handle;
7c832835 1045 temp64.val = (__u64) err_dma_handle;
1da177e4
LT		 1046 c->ErrDesc.Addr.lower = temp64.val32.lower;
1047 c->ErrDesc.Addr.upper = temp64.val32.upper;
1048 c->ErrDesc.Len = sizeof(ErrorInfo_struct);
1da177e4 1049
7c832835
BH		 1050 c->ctlr = h->ctlr;
1051 return c;
1da177e4
LT		 1052}
1053
6b4d96b8 1054static void cmd_free(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 1055{
1056 int i;
6b4d96b8
SC		 1057
1058 i = c - h->cmd_pool;
1f118bc4 1059 clear_bit(i, h->cmd_pool_bits);
6b4d96b8
SC		 1060 h->nr_frees++;
1061}
1062
1063static void cmd_special_free(ctlr_info_t *h, CommandList_struct *c)
1064{
1da177e4
LT		 1065 u64bit temp64;
1066
6b4d96b8
SC		 1067 temp64.val32.lower = c->ErrDesc.Addr.lower;
1068 temp64.val32.upper = c->ErrDesc.Addr.upper;
1069 pci_free_consistent(h->pdev, sizeof(ErrorInfo_struct),
1070 c->err_info, (dma_addr_t) temp64.val);
16011131
SC		 1071 pci_free_consistent(h->pdev, sizeof(CommandList_struct), c,
1072 (dma_addr_t) cciss_tag_discard_error_bits(h, (u32) c->busaddr));
1da177e4
LT		 1073}
1074
1075static inline ctlr_info_t *get_host(struct gendisk *disk)
1076{
7c832835 1077 return disk->queue->queuedata;
1da177e4
LT		 1078}
1079
1080static inline drive_info_struct *get_drv(struct gendisk *disk)
1081{
1082 return disk->private_data;
1083}
1084
1085/*
1086 * Open. Make sure the device is really there.
1087 */
ef7822c2 1088static int cciss_open(struct block_device *bdev, fmode_t mode)
1da177e4 1089{
f70dba83 1090 ctlr_info_t *h = get_host(bdev->bd_disk);
ef7822c2 1091 drive_info_struct *drv = get_drv(bdev->bd_disk);
1da177e4 1092
b2a4a43d 1093 dev_dbg(&h->pdev->dev, "cciss_open %s\n", bdev->bd_disk->disk_name);
2e043986 1094 if (drv->busy_configuring)
ddd47442 1095 return -EBUSY;
1da177e4
LT		 1096 /*
1097 * Root is allowed to open raw volume zero even if it's not configured
1098 * so array config can still work. Root is also allowed to open any
1099 * volume that has a LUN ID, so it can issue IOCTL to reread the
1100 * disk information. I don't think I really like this
1101 * but I'm already using way to many device nodes to claim another one
1102 * for "raw controller".
1103 */
7a06f789 1104 if (drv->heads == 0) {
ef7822c2 1105 if (MINOR(bdev->bd_dev) != 0) { /* not node 0? */
1da177e4 1106 /* if not node 0 make sure it is a partition = 0 */
ef7822c2 1107 if (MINOR(bdev->bd_dev) & 0x0f) {
7c832835 1108 return -ENXIO;
1da177e4 1109 /* if it is, make sure we have a LUN ID */
39ccf9a6
SC		 1110 } else if (memcmp(drv->LunID, CTLR_LUNID,
1111 sizeof(drv->LunID))) {
1da177e4
LT		 1112 return -ENXIO;
1113 }
1114 }
1115 if (!capable(CAP_SYS_ADMIN))
1116 return -EPERM;
1117 }
1118 drv->usage_count++;
f70dba83 1119 h->usage_count++;
1da177e4
LT		 1120 return 0;
1121}
7c832835 1122
6e9624b8
AB		 1123static int cciss_unlocked_open(struct block_device *bdev, fmode_t mode)
1124{
1125 int ret;
1126
2a48fc0a 1127 mutex_lock(&cciss_mutex);
6e9624b8 1128 ret = cciss_open(bdev, mode);
2a48fc0a 1129 mutex_unlock(&cciss_mutex);
6e9624b8
AB		 1130
1131 return ret;
1132}
1133
1da177e4
LT		 1134/*
1135 * Close. Sync first.
1136 */
db2a144b 1137static void cciss_release(struct gendisk *disk, fmode_t mode)
1da177e4 1138{
f70dba83 1139 ctlr_info_t *h;
6e9624b8 1140 drive_info_struct *drv;
1da177e4 1141
2a48fc0a 1142 mutex_lock(&cciss_mutex);
f70dba83 1143 h = get_host(disk);
6e9624b8 1144 drv = get_drv(disk);
b2a4a43d 1145 dev_dbg(&h->pdev->dev, "cciss_release %s\n", disk->disk_name);
1da177e4 1146 drv->usage_count--;
f70dba83 1147 h->usage_count--;
2a48fc0a 1148 mutex_unlock(&cciss_mutex);
1da177e4
LT		 1149}
1150
8a6cfeb6
AB		 1151#ifdef CONFIG_COMPAT
1152
ef7822c2
AV		 1153static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1154 unsigned cmd, unsigned long arg);
1155static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1156 unsigned cmd, unsigned long arg);
1da177e4 1157
ef7822c2
AV		 1158static int cciss_compat_ioctl(struct block_device *bdev, fmode_t mode,
1159 unsigned cmd, unsigned long arg)
1da177e4
LT		 1160{
1161 switch (cmd) {
1162 case CCISS_GETPCIINFO:
1163 case CCISS_GETINTINFO:
1164 case CCISS_SETINTINFO:
1165 case CCISS_GETNODENAME:
1166 case CCISS_SETNODENAME:
1167 case CCISS_GETHEARTBEAT:
1168 case CCISS_GETBUSTYPES:
1169 case CCISS_GETFIRMVER:
1170 case CCISS_GETDRIVVER:
1171 case CCISS_REVALIDVOLS:
1172 case CCISS_DEREGDISK:
1173 case CCISS_REGNEWDISK:
1174 case CCISS_REGNEWD:
1175 case CCISS_RESCANDISK:
1176 case CCISS_GETLUNINFO:
03f47e88 1177 return cciss_ioctl(bdev, mode, cmd, arg);
1da177e4
LT		 1178
1179 case CCISS_PASSTHRU32:
ef7822c2 1180 return cciss_ioctl32_passthru(bdev, mode, cmd, arg);
1da177e4 1181 case CCISS_BIG_PASSTHRU32:
ef7822c2 1182 return cciss_ioctl32_big_passthru(bdev, mode, cmd, arg);
1da177e4
LT		 1183
1184 default:
1185 return -ENOIOCTLCMD;
1186 }
1187}
1188
ef7822c2
AV		 1189static int cciss_ioctl32_passthru(struct block_device *bdev, fmode_t mode,
1190 unsigned cmd, unsigned long arg)
1da177e4
LT		 1191{
1192 IOCTL32_Command_struct __user *arg32 =
7c832835 1193 (IOCTL32_Command_struct __user *) arg;
1da177e4
LT		 1194 IOCTL_Command_struct arg64;
1195 IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64));
1196 int err;
1197 u32 cp;
1198
58f09e00 1199 memset(&arg64, 0, sizeof(arg64));
1da177e4 1200 err = 0;
7c832835
BH		 1201 err |=
1202 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1203 sizeof(arg64.LUN_info));
1204 err |=
1205 copy_from_user(&arg64.Request, &arg32->Request,
1206 sizeof(arg64.Request));
1207 err |=
1208 copy_from_user(&arg64.error_info, &arg32->error_info,
1209 sizeof(arg64.error_info));
1da177e4
LT		 1210 err |= get_user(arg64.buf_size, &arg32->buf_size);
1211 err |= get_user(cp, &arg32->buf);
1212 arg64.buf = compat_ptr(cp);
1213 err |= copy_to_user(p, &arg64, sizeof(arg64));
1214
1215 if (err)
1216 return -EFAULT;
1217
03f47e88 1218 err = cciss_ioctl(bdev, mode, CCISS_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1219 if (err)
1220 return err;
7c832835
BH		 1221 err |=
1222 copy_in_user(&arg32->error_info, &p->error_info,
1223 sizeof(arg32->error_info));
1da177e4
LT		 1224 if (err)
1225 return -EFAULT;
1226 return err;
1227}
1228
ef7822c2
AV		 1229static int cciss_ioctl32_big_passthru(struct block_device *bdev, fmode_t mode,
1230 unsigned cmd, unsigned long arg)
1da177e4
LT		 1231{
1232 BIG_IOCTL32_Command_struct __user *arg32 =
7c832835 1233 (BIG_IOCTL32_Command_struct __user *) arg;
1da177e4 1234 BIG_IOCTL_Command_struct arg64;
7c832835
BH		 1235 BIG_IOCTL_Command_struct __user *p =
1236 compat_alloc_user_space(sizeof(arg64));
1da177e4
LT		 1237 int err;
1238 u32 cp;
1239
7ab5118d 1240 memset(&arg64, 0, sizeof(arg64));
1da177e4 1241 err = 0;
7c832835
BH		 1242 err |=
1243 copy_from_user(&arg64.LUN_info, &arg32->LUN_info,
1244 sizeof(arg64.LUN_info));
1245 err |=
1246 copy_from_user(&arg64.Request, &arg32->Request,
1247 sizeof(arg64.Request));
1248 err |=
1249 copy_from_user(&arg64.error_info, &arg32->error_info,
1250 sizeof(arg64.error_info));
1da177e4
LT		 1251 err |= get_user(arg64.buf_size, &arg32->buf_size);
1252 err |= get_user(arg64.malloc_size, &arg32->malloc_size);
1253 err |= get_user(cp, &arg32->buf);
1254 arg64.buf = compat_ptr(cp);
1255 err |= copy_to_user(p, &arg64, sizeof(arg64));
1256
1257 if (err)
7c832835 1258 return -EFAULT;
1da177e4 1259
03f47e88 1260 err = cciss_ioctl(bdev, mode, CCISS_BIG_PASSTHRU, (unsigned long)p);
1da177e4
LT		 1261 if (err)
1262 return err;
7c832835
BH		 1263 err |=
1264 copy_in_user(&arg32->error_info, &p->error_info,
1265 sizeof(arg32->error_info));
1da177e4
LT		 1266 if (err)
1267 return -EFAULT;
1268 return err;
1269}
1270#endif
a885c8c4
CH		 1271
1272static int cciss_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1273{
1274 drive_info_struct *drv = get_drv(bdev->bd_disk);
1275
1276 if (!drv->cylinders)
1277 return -ENXIO;
1278
1279 geo->heads = drv->heads;
1280 geo->sectors = drv->sectors;
1281 geo->cylinders = drv->cylinders;
1282 return 0;
1283}
1284
f70dba83 1285static void check_ioctl_unit_attention(ctlr_info_t *h, CommandList_struct *c)
0a9279cc
MM		 1286{
1287 if (c->err_info->CommandStatus == CMD_TARGET_STATUS &&
1288 c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION)
f70dba83 1289 (void)check_for_unit_attention(h, c);
0a9279cc 1290}
0a25a5ae
SC		 1291
1292static int cciss_getpciinfo(ctlr_info_t *h, void __user *argp)
1da177e4 1293{
0a25a5ae 1294 cciss_pci_info_struct pciinfo;
1da177e4 1295
0a25a5ae
SC		 1296 if (!argp)
1297 return -EINVAL;
1298 pciinfo.domain = pci_domain_nr(h->pdev->bus);
1299 pciinfo.bus = h->pdev->bus->number;
1300 pciinfo.dev_fn = h->pdev->devfn;
1301 pciinfo.board_id = h->board_id;
1302 if (copy_to_user(argp, &pciinfo, sizeof(cciss_pci_info_struct)))
1303 return -EFAULT;
1304 return 0;
1305}
1da177e4 1306
576e661c
SC		 1307static int cciss_getintinfo(ctlr_info_t *h, void __user *argp)
1308{
1309 cciss_coalint_struct intinfo;
03f47e88 1310 unsigned long flags;
1da177e4 1311
576e661c
SC		 1312 if (!argp)
1313 return -EINVAL;
03f47e88 1314 spin_lock_irqsave(&h->lock, flags);
576e661c
SC		 1315 intinfo.delay = readl(&h->cfgtable->HostWrite.CoalIntDelay);
1316 intinfo.count = readl(&h->cfgtable->HostWrite.CoalIntCount);
03f47e88 1317 spin_unlock_irqrestore(&h->lock, flags);
576e661c
SC		 1318 if (copy_to_user
1319 (argp, &intinfo, sizeof(cciss_coalint_struct)))
1320 return -EFAULT;
1321 return 0;
1322}
1da177e4 1323
4c800eed
SC		 1324static int cciss_setintinfo(ctlr_info_t *h, void __user *argp)
1325{
1326 cciss_coalint_struct intinfo;
1327 unsigned long flags;
1328 int i;
1da177e4 1329
4c800eed
SC		 1330 if (!argp)
1331 return -EINVAL;
1332 if (!capable(CAP_SYS_ADMIN))
1333 return -EPERM;
1334 if (copy_from_user(&intinfo, argp, sizeof(intinfo)))
1335 return -EFAULT;
1336 if ((intinfo.delay == 0) && (intinfo.count == 0))
1337 return -EINVAL;
1338 spin_lock_irqsave(&h->lock, flags);
1339 /* Update the field, and then ring the doorbell */
1340 writel(intinfo.delay, &(h->cfgtable->HostWrite.CoalIntDelay));
1341 writel(intinfo.count, &(h->cfgtable->HostWrite.CoalIntCount));
1342 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1343
1344 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1345 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1346 break;
1347 udelay(1000); /* delay and try again */
1348 }
1349 spin_unlock_irqrestore(&h->lock, flags);
1350 if (i >= MAX_IOCTL_CONFIG_WAIT)
1351 return -EAGAIN;
1352 return 0;
1353}
1da177e4 1354
25216109
SC		 1355static int cciss_getnodename(ctlr_info_t *h, void __user *argp)
1356{
1357 NodeName_type NodeName;
03f47e88 1358 unsigned long flags;
25216109 1359 int i;
1da177e4 1360
25216109
SC		 1361 if (!argp)
1362 return -EINVAL;
03f47e88 1363 spin_lock_irqsave(&h->lock, flags);
25216109
SC		 1364 for (i = 0; i < 16; i++)
1365 NodeName[i] = readb(&h->cfgtable->ServerName[i]);
03f47e88 1366 spin_unlock_irqrestore(&h->lock, flags);
25216109
SC		 1367 if (copy_to_user(argp, NodeName, sizeof(NodeName_type)))
1368 return -EFAULT;
1369 return 0;
1370}
7c832835 1371
4f43f32c
SC		 1372static int cciss_setnodename(ctlr_info_t *h, void __user *argp)
1373{
1374 NodeName_type NodeName;
1375 unsigned long flags;
1376 int i;
7c832835 1377
4f43f32c
SC		 1378 if (!argp)
1379 return -EINVAL;
1380 if (!capable(CAP_SYS_ADMIN))
1381 return -EPERM;
1382 if (copy_from_user(NodeName, argp, sizeof(NodeName_type)))
1383 return -EFAULT;
1384 spin_lock_irqsave(&h->lock, flags);
1385 /* Update the field, and then ring the doorbell */
1386 for (i = 0; i < 16; i++)
1387 writeb(NodeName[i], &h->cfgtable->ServerName[i]);
1388 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
1389 for (i = 0; i < MAX_IOCTL_CONFIG_WAIT; i++) {
1390 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
1391 break;
1392 udelay(1000); /* delay and try again */
1393 }
1394 spin_unlock_irqrestore(&h->lock, flags);
1395 if (i >= MAX_IOCTL_CONFIG_WAIT)
1396 return -EAGAIN;
1397 return 0;
1398}
7c832835 1399
93c74931
SC		 1400static int cciss_getheartbeat(ctlr_info_t *h, void __user *argp)
1401{
1402 Heartbeat_type heartbeat;
03f47e88 1403 unsigned long flags;
7c832835 1404
93c74931
SC		 1405 if (!argp)
1406 return -EINVAL;
03f47e88 1407 spin_lock_irqsave(&h->lock, flags);
93c74931 1408 heartbeat = readl(&h->cfgtable->HeartBeat);
03f47e88 1409 spin_unlock_irqrestore(&h->lock, flags);
93c74931
SC		 1410 if (copy_to_user(argp, &heartbeat, sizeof(Heartbeat_type)))
1411 return -EFAULT;
1412 return 0;
1413}
0a9279cc 1414
d18dfad4
SC		 1415static int cciss_getbustypes(ctlr_info_t *h, void __user *argp)
1416{
1417 BusTypes_type BusTypes;
03f47e88 1418 unsigned long flags;
7c832835 1419
d18dfad4
SC		 1420 if (!argp)
1421 return -EINVAL;
03f47e88 1422 spin_lock_irqsave(&h->lock, flags);
d18dfad4 1423 BusTypes = readl(&h->cfgtable->BusTypes);
03f47e88 1424 spin_unlock_irqrestore(&h->lock, flags);
d18dfad4
SC		 1425 if (copy_to_user(argp, &BusTypes, sizeof(BusTypes_type)))
1426 return -EFAULT;
1427 return 0;
1428}
1429
8a4f7fbf
SC		 1430static int cciss_getfirmver(ctlr_info_t *h, void __user *argp)
1431{
1432 FirmwareVer_type firmware;
1433
1434 if (!argp)
1435 return -EINVAL;
1436 memcpy(firmware, h->firm_ver, 4);
1437
1438 if (copy_to_user
1439 (argp, firmware, sizeof(FirmwareVer_type)))
1440 return -EFAULT;
1441 return 0;
1442}
1443
c525919d
SC		 1444static int cciss_getdrivver(ctlr_info_t *h, void __user *argp)
1445{
1446 DriverVer_type DriverVer = DRIVER_VERSION;
1447
1448 if (!argp)
1449 return -EINVAL;
1450 if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type)))
1451 return -EFAULT;
1452 return 0;
1453}
1454
0894b32c
SC		 1455static int cciss_getluninfo(ctlr_info_t *h,
1456 struct gendisk *disk, void __user *argp)
1457{
1458 LogvolInfo_struct luninfo;
1459 drive_info_struct *drv = get_drv(disk);
1460
1461 if (!argp)
1462 return -EINVAL;
1463 memcpy(&luninfo.LunID, drv->LunID, sizeof(luninfo.LunID));
1464 luninfo.num_opens = drv->usage_count;
1465 luninfo.num_parts = 0;
1466 if (copy_to_user(argp, &luninfo, sizeof(LogvolInfo_struct)))
1467 return -EFAULT;
1468 return 0;
1469}
1470
f32f125b
SC		 1471static int cciss_passthru(ctlr_info_t *h, void __user *argp)
1472{
1473 IOCTL_Command_struct iocommand;
1474 CommandList_struct *c;
1475 char *buff = NULL;
1476 u64bit temp64;
1477 DECLARE_COMPLETION_ONSTACK(wait);
1478
1479 if (!argp)
1480 return -EINVAL;
1481
1482 if (!capable(CAP_SYS_RAWIO))
1483 return -EPERM;
1484
1485 if (copy_from_user
1486 (&iocommand, argp, sizeof(IOCTL_Command_struct)))
1487 return -EFAULT;
1488 if ((iocommand.buf_size < 1) &&
1489 (iocommand.Request.Type.Direction != XFER_NONE)) {
1490 return -EINVAL;
1491 }
1492 if (iocommand.buf_size > 0) {
1493 buff = kmalloc(iocommand.buf_size, GFP_KERNEL);
1494 if (buff == NULL)
1495 return -EFAULT;
1496 }
1497 if (iocommand.Request.Type.Direction == XFER_WRITE) {
1498 /* Copy the data into the buffer we created */
1499 if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) {
1500 kfree(buff);
1501 return -EFAULT;
1502 }
1503 } else {
1504 memset(buff, 0, iocommand.buf_size);
1505 }
1506 c = cmd_special_alloc(h);
1507 if (!c) {
1508 kfree(buff);
1509 return -ENOMEM;
1510 }
1511 /* Fill in the command type */
1512 c->cmd_type = CMD_IOCTL_PEND;
1513 /* Fill in Command Header */
1514 c->Header.ReplyQueue = 0; /* unused in simple mode */
1515 if (iocommand.buf_size > 0) { /* buffer to fill */
1516 c->Header.SGList = 1;
1517 c->Header.SGTotal = 1;
1518 } else { /* no buffers to fill */
1519 c->Header.SGList = 0;
1520 c->Header.SGTotal = 0;
1521 }
1522 c->Header.LUN = iocommand.LUN_info;
1523 /* use the kernel address the cmd block for tag */
1524 c->Header.Tag.lower = c->busaddr;
1525
1526 /* Fill in Request block */
1527 c->Request = iocommand.Request;
1528
1529 /* Fill in the scatter gather information */
1530 if (iocommand.buf_size > 0) {
1531 temp64.val = pci_map_single(h->pdev, buff,
1532 iocommand.buf_size, PCI_DMA_BIDIRECTIONAL);
1533 c->SG[0].Addr.lower = temp64.val32.lower;
1534 c->SG[0].Addr.upper = temp64.val32.upper;
1535 c->SG[0].Len = iocommand.buf_size;
1536 c->SG[0].Ext = 0; /* we are not chaining */
1537 }
1538 c->waiting = &wait;
1539
1540 enqueue_cmd_and_start_io(h, c);
1541 wait_for_completion(&wait);
1542
1543 /* unlock the buffers from DMA */
1544 temp64.val32.lower = c->SG[0].Addr.lower;
1545 temp64.val32.upper = c->SG[0].Addr.upper;
1546 pci_unmap_single(h->pdev, (dma_addr_t) temp64.val, iocommand.buf_size,
1547 PCI_DMA_BIDIRECTIONAL);
1548 check_ioctl_unit_attention(h, c);
1549
1550 /* Copy the error information out */
1551 iocommand.error_info = *(c->err_info);
1552 if (copy_to_user(argp, &iocommand, sizeof(IOCTL_Command_struct))) {
1553 kfree(buff);
1554 cmd_special_free(h, c);
1555 return -EFAULT;
1556 }
1557
1558 if (iocommand.Request.Type.Direction == XFER_READ) {
1559 /* Copy the data out of the buffer we created */
1560 if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) {
7c832835 1561 kfree(buff);
6b4d96b8 1562 cmd_special_free(h, c);
f32f125b 1563 return -EFAULT;
1da177e4 1564 }
f32f125b
SC		 1565 }
1566 kfree(buff);
1567 cmd_special_free(h, c);
1568 return 0;
1569}
1570
0c9f5ba7
SC		 1571static int cciss_bigpassthru(ctlr_info_t *h, void __user *argp)
1572{
1573 BIG_IOCTL_Command_struct *ioc;
1574 CommandList_struct *c;
1575 unsigned char **buff = NULL;
1576 int *buff_size = NULL;
1577 u64bit temp64;
1578 BYTE sg_used = 0;
1579 int status = 0;
1580 int i;
1581 DECLARE_COMPLETION_ONSTACK(wait);
1582 __u32 left;
1583 __u32 sz;
1584 BYTE __user *data_ptr;
1585
1586 if (!argp)
1587 return -EINVAL;
1588 if (!capable(CAP_SYS_RAWIO))
1589 return -EPERM;
fcab1c11 1590 ioc = kmalloc(sizeof(*ioc), GFP_KERNEL);
0c9f5ba7
SC		 1591 if (!ioc) {
1592 status = -ENOMEM;
1593 goto cleanup1;
1594 }
1595 if (copy_from_user(ioc, argp, sizeof(*ioc))) {
1596 status = -EFAULT;
1597 goto cleanup1;
1598 }
1599 if ((ioc->buf_size < 1) &&
1600 (ioc->Request.Type.Direction != XFER_NONE)) {
1601 status = -EINVAL;
1602 goto cleanup1;
1603 }
1604 /* Check kmalloc limits using all SGs */
1605 if (ioc->malloc_size > MAX_KMALLOC_SIZE) {
1606 status = -EINVAL;
1607 goto cleanup1;
1608 }
1609 if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) {
1610 status = -EINVAL;
1611 goto cleanup1;
1612 }
1613 buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL);
1614 if (!buff) {
1615 status = -ENOMEM;
1616 goto cleanup1;
1617 }
1618 buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL);
1619 if (!buff_size) {
1620 status = -ENOMEM;
1621 goto cleanup1;
1622 }
1623 left = ioc->buf_size;
1624 data_ptr = ioc->buf;
1625 while (left) {
1626 sz = (left > ioc->malloc_size) ? ioc->malloc_size : left;
1627 buff_size[sg_used] = sz;
1628 buff[sg_used] = kmalloc(sz, GFP_KERNEL);
1629 if (buff[sg_used] == NULL) {
1630 status = -ENOMEM;
1631 goto cleanup1;
1632 }
1633 if (ioc->Request.Type.Direction == XFER_WRITE) {
1634 if (copy_from_user(buff[sg_used], data_ptr, sz)) {
7c832835
BH		 1635 status = -EFAULT;
1636 goto cleanup1;
1637 }
0c9f5ba7
SC		 1638 } else {
1639 memset(buff[sg_used], 0, sz);
1640 }
1641 left -= sz;
1642 data_ptr += sz;
1643 sg_used++;
1644 }
1645 c = cmd_special_alloc(h);
1646 if (!c) {
1647 status = -ENOMEM;
1648 goto cleanup1;
1649 }
1650 c->cmd_type = CMD_IOCTL_PEND;
1651 c->Header.ReplyQueue = 0;
fcfb5c0c
SC		 1652 c->Header.SGList = sg_used;
1653 c->Header.SGTotal = sg_used;
0c9f5ba7
SC		 1654 c->Header.LUN = ioc->LUN_info;
1655 c->Header.Tag.lower = c->busaddr;
1656
1657 c->Request = ioc->Request;
fcfb5c0c
SC		 1658 for (i = 0; i < sg_used; i++) {
1659 temp64.val = pci_map_single(h->pdev, buff[i], buff_size[i],
0c9f5ba7 1660 PCI_DMA_BIDIRECTIONAL);
fcfb5c0c
SC		 1661 c->SG[i].Addr.lower = temp64.val32.lower;
1662 c->SG[i].Addr.upper = temp64.val32.upper;
1663 c->SG[i].Len = buff_size[i];
1664 c->SG[i].Ext = 0; /* we are not chaining */
0c9f5ba7
SC		 1665 }
1666 c->waiting = &wait;
1667 enqueue_cmd_and_start_io(h, c);
1668 wait_for_completion(&wait);
1669 /* unlock the buffers from DMA */
1670 for (i = 0; i < sg_used; i++) {
1671 temp64.val32.lower = c->SG[i].Addr.lower;
1672 temp64.val32.upper = c->SG[i].Addr.upper;
1673 pci_unmap_single(h->pdev,
1674 (dma_addr_t) temp64.val, buff_size[i],
1675 PCI_DMA_BIDIRECTIONAL);
1676 }
1677 check_ioctl_unit_attention(h, c);
1678 /* Copy the error information out */
1679 ioc->error_info = *(c->err_info);
1680 if (copy_to_user(argp, ioc, sizeof(*ioc))) {
1681 cmd_special_free(h, c);
1682 status = -EFAULT;
1683 goto cleanup1;
1684 }
1685 if (ioc->Request.Type.Direction == XFER_READ) {
1686 /* Copy the data out of the buffer we created */
1687 BYTE __user *ptr = ioc->buf;
1688 for (i = 0; i < sg_used; i++) {
1689 if (copy_to_user(ptr, buff[i], buff_size[i])) {
6b4d96b8 1690 cmd_special_free(h, c);
7c832835
BH		 1691 status = -EFAULT;
1692 goto cleanup1;
1693 }
0c9f5ba7 1694 ptr += buff_size[i];
1da177e4 1695 }
0c9f5ba7
SC		 1696 }
1697 cmd_special_free(h, c);
1698 status = 0;
1699cleanup1:
1700 if (buff) {
1701 for (i = 0; i < sg_used; i++)
1702 kfree(buff[i]);
1703 kfree(buff);
1704 }
1705 kfree(buff_size);
1706 kfree(ioc);
1707 return status;
1708}
1709
ef7822c2 1710static int cciss_ioctl(struct block_device *bdev, fmode_t mode,
c525919d 1711 unsigned int cmd, unsigned long arg)
1da177e4 1712{
1da177e4 1713 struct gendisk *disk = bdev->bd_disk;
f70dba83 1714 ctlr_info_t *h = get_host(disk);
1da177e4
LT		 1715 void __user *argp = (void __user *)arg;
1716
b2a4a43d
SC		 1717 dev_dbg(&h->pdev->dev, "cciss_ioctl: Called with cmd=%x %lx\n",
1718 cmd, arg);
7c832835 1719 switch (cmd) {
1da177e4 1720 case CCISS_GETPCIINFO:
0a25a5ae 1721 return cciss_getpciinfo(h, argp);
1da177e4 1722 case CCISS_GETINTINFO:
576e661c 1723 return cciss_getintinfo(h, argp);
1da177e4 1724 case CCISS_SETINTINFO:
4c800eed 1725 return cciss_setintinfo(h, argp);
1da177e4 1726 case CCISS_GETNODENAME:
25216109 1727 return cciss_getnodename(h, argp);
1da177e4 1728 case CCISS_SETNODENAME:
4f43f32c 1729 return cciss_setnodename(h, argp);
1da177e4 1730 case CCISS_GETHEARTBEAT:
93c74931 1731 return cciss_getheartbeat(h, argp);
1da177e4 1732 case CCISS_GETBUSTYPES:
d18dfad4 1733 return cciss_getbustypes(h, argp);
1da177e4 1734 case CCISS_GETFIRMVER:
8a4f7fbf 1735 return cciss_getfirmver(h, argp);
7c832835 1736 case CCISS_GETDRIVVER:
c525919d 1737 return cciss_getdrivver(h, argp);
6ae5ce8e
MM		 1738 case CCISS_DEREGDISK:
1739 case CCISS_REGNEWD:
1da177e4 1740 case CCISS_REVALIDVOLS:
f70dba83 1741 return rebuild_lun_table(h, 0, 1);
0894b32c
SC		 1742 case CCISS_GETLUNINFO:
1743 return cciss_getluninfo(h, disk, argp);
1da177e4 1744 case CCISS_PASSTHRU:
f32f125b 1745 return cciss_passthru(h, argp);
0c9f5ba7
SC		 1746 case CCISS_BIG_PASSTHRU:
1747 return cciss_bigpassthru(h, argp);
03bbfee5 1748
577ebb37 1749 /* scsi_cmd_blk_ioctl handles these, below, though some are not */
03bbfee5
MMOD		 1750 /* very meaningful for cciss. SG_IO is the main one people want. */
1751
1752 case SG_GET_VERSION_NUM:
1753 case SG_SET_TIMEOUT:
1754 case SG_GET_TIMEOUT:
1755 case SG_GET_RESERVED_SIZE:
1756 case SG_SET_RESERVED_SIZE:
1757 case SG_EMULATED_HOST:
1758 case SG_IO:
1759 case SCSI_IOCTL_SEND_COMMAND:
577ebb37 1760 return scsi_cmd_blk_ioctl(bdev, mode, cmd, argp);
03bbfee5 1761
577ebb37 1762 /* scsi_cmd_blk_ioctl would normally handle these, below, but */
03bbfee5
MMOD		 1763 /* they aren't a good fit for cciss, as CD-ROMs are */
1764 /* not supported, and we don't have any bus/target/lun */
1765 /* which we present to the kernel. */
1766
1767 case CDROM_SEND_PACKET:
1768 case CDROMCLOSETRAY:
1769 case CDROMEJECT:
1770 case SCSI_IOCTL_GET_IDLUN:
1771 case SCSI_IOCTL_GET_BUS_NUMBER:
1da177e4
LT		 1772 default:
1773 return -ENOTTY;
1774 }
1da177e4
LT		 1775}
1776
7b30f092
JA		 1777static void cciss_check_queues(ctlr_info_t *h)
1778{
1779 int start_queue = h->next_to_run;
1780 int i;
1781
1782 /* check to see if we have maxed out the number of commands that can
1783 * be placed on the queue. If so then exit. We do this check here
1784 * in case the interrupt we serviced was from an ioctl and did not
1785 * free any new commands.
1786 */
f880632f 1787 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds)
7b30f092
JA		 1788 return;
1789
1790 /* We have room on the queue for more commands. Now we need to queue
1791 * them up. We will also keep track of the next queue to run so
1792 * that every queue gets a chance to be started first.
1793 */
1794 for (i = 0; i < h->highest_lun + 1; i++) {
1795 int curr_queue = (start_queue + i) % (h->highest_lun + 1);
1796 /* make sure the disk has been added and the drive is real
1797 * because this can be called from the middle of init_one.
1798 */
9cef0d2f
SC		 1799 if (!h->drv[curr_queue])
1800 continue;
1801 if (!(h->drv[curr_queue]->queue) ||
1802 !(h->drv[curr_queue]->heads))
7b30f092
JA		 1803 continue;
1804 blk_start_queue(h->gendisk[curr_queue]->queue);
1805
1806 /* check to see if we have maxed out the number of commands
1807 * that can be placed on the queue.
1808 */
f880632f 1809 if ((find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds)) == h->nr_cmds) {
7b30f092
JA		 1810 if (curr_queue == start_queue) {
1811 h->next_to_run =
1812 (start_queue + 1) % (h->highest_lun + 1);
1813 break;
1814 } else {
1815 h->next_to_run = curr_queue;
1816 break;
1817 }
7b30f092
JA		 1818 }
1819 }
1820}
1821
ca1e0484
MM		 1822static void cciss_softirq_done(struct request *rq)
1823{
f70dba83
SC		 1824 CommandList_struct *c = rq->completion_data;
1825 ctlr_info_t *h = hba[c->ctlr];
1826 SGDescriptor_struct *curr_sg = c->SG;
ca1e0484 1827 u64bit temp64;
664a717d 1828 unsigned long flags;
ca1e0484 1829 int i, ddir;
5c07a311 1830 int sg_index = 0;
ca1e0484 1831
f70dba83 1832 if (c->Request.Type.Direction == XFER_READ)
ca1e0484
MM		 1833 ddir = PCI_DMA_FROMDEVICE;
1834 else
1835 ddir = PCI_DMA_TODEVICE;
1836
1837 /* command did not need to be retried */
1838 /* unmap the DMA mapping for all the scatter gather elements */
f70dba83 1839 for (i = 0; i < c->Header.SGList; i++) {
5c07a311 1840 if (curr_sg[sg_index].Ext == CCISS_SG_CHAIN) {
f70dba83 1841 cciss_unmap_sg_chain_block(h, c);
5c07a311 1842 /* Point to the next block */
f70dba83 1843 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 1844 sg_index = 0;
1845 }
1846 temp64.val32.lower = curr_sg[sg_index].Addr.lower;
1847 temp64.val32.upper = curr_sg[sg_index].Addr.upper;
1848 pci_unmap_page(h->pdev, temp64.val, curr_sg[sg_index].Len,
1849 ddir);
1850 ++sg_index;
ca1e0484
MM		 1851 }
1852
b2a4a43d 1853 dev_dbg(&h->pdev->dev, "Done with %p\n", rq);
ca1e0484 1854
c3a4d78c 1855 /* set the residual count for pc requests */
33659ebb 1856 if (rq->cmd_type == REQ_TYPE_BLOCK_PC)
f70dba83 1857 rq->resid_len = c->err_info->ResidualCnt;
ac44e5b2 1858
c3a4d78c 1859 blk_end_request_all(rq, (rq->errors == 0) ? 0 : -EIO);
3daeea29 1860
ca1e0484 1861 spin_lock_irqsave(&h->lock, flags);
6b4d96b8 1862 cmd_free(h, c);
7b30f092 1863 cciss_check_queues(h);
ca1e0484
MM		 1864 spin_unlock_irqrestore(&h->lock, flags);
1865}
1866
39ccf9a6
SC		 1867static inline void log_unit_to_scsi3addr(ctlr_info_t *h,
1868 unsigned char scsi3addr[], uint32_t log_unit)
b57695fe 1869{
9cef0d2f
SC		 1870 memcpy(scsi3addr, h->drv[log_unit]->LunID,
1871 sizeof(h->drv[log_unit]->LunID));
b57695fe 1872}
1873
7fe06326
AP		 1874/* This function gets the SCSI vendor, model, and revision of a logical drive
1875 * via the inquiry page 0. Model, vendor, and rev are set to empty strings if
1876 * they cannot be read.
1877 */
f70dba83 1878static void cciss_get_device_descr(ctlr_info_t *h, int logvol,
7fe06326
AP		 1879 char *vendor, char *model, char *rev)
1880{
1881 int rc;
1882 InquiryData_struct *inq_buf;
b57695fe 1883 unsigned char scsi3addr[8];
7fe06326
AP		 1884
1885 *vendor = '\0';
1886 *model = '\0';
1887 *rev = '\0';
1888
1889 inq_buf = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
1890 if (!inq_buf)
1891 return;
1892
f70dba83
SC		 1893 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1894 rc = sendcmd_withirq(h, CISS_INQUIRY, inq_buf, sizeof(*inq_buf), 0,
7b838bde 1895 scsi3addr, TYPE_CMD);
7fe06326
AP		 1896 if (rc == IO_OK) {
1897 memcpy(vendor, &inq_buf->data_byte[8], VENDOR_LEN);
1898 vendor[VENDOR_LEN] = '\0';
1899 memcpy(model, &inq_buf->data_byte[16], MODEL_LEN);
1900 model[MODEL_LEN] = '\0';
1901 memcpy(rev, &inq_buf->data_byte[32], REV_LEN);
1902 rev[REV_LEN] = '\0';
1903 }
1904
1905 kfree(inq_buf);
1906 return;
1907}
1908
a72da29b
MM		 1909/* This function gets the serial number of a logical drive via
1910 * inquiry page 0x83. Serial no. is 16 bytes. If the serial
1911 * number cannot be had, for whatever reason, 16 bytes of 0xff
1912 * are returned instead.
1913 */
f70dba83 1914static void cciss_get_serial_no(ctlr_info_t *h, int logvol,
a72da29b
MM		 1915 unsigned char *serial_no, int buflen)
1916{
1917#define PAGE_83_INQ_BYTES 64
1918 int rc;
1919 unsigned char *buf;
b57695fe 1920 unsigned char scsi3addr[8];
a72da29b
MM		 1921
1922 if (buflen > 16)
1923 buflen = 16;
1924 memset(serial_no, 0xff, buflen);
1925 buf = kzalloc(PAGE_83_INQ_BYTES, GFP_KERNEL);
1926 if (!buf)
1927 return;
1928 memset(serial_no, 0, buflen);
f70dba83
SC		 1929 log_unit_to_scsi3addr(h, scsi3addr, logvol);
1930 rc = sendcmd_withirq(h, CISS_INQUIRY, buf,
7b838bde 1931 PAGE_83_INQ_BYTES, 0x83, scsi3addr, TYPE_CMD);
a72da29b
MM		 1932 if (rc == IO_OK)
1933 memcpy(serial_no, &buf[8], buflen);
1934 kfree(buf);
1935 return;
1936}
1937
617e1344
SC		 1938/*
1939 * cciss_add_disk sets up the block device queue for a logical drive
1940 */
1941static int cciss_add_disk(ctlr_info_t *h, struct gendisk *disk,
6ae5ce8e
MM		 1942 int drv_index)
1943{
1944 disk->queue = blk_init_queue(do_cciss_request, &h->lock);
e8074f79
SC		 1945 if (!disk->queue)
1946 goto init_queue_failure;
6ae5ce8e
MM		 1947 sprintf(disk->disk_name, "cciss/c%dd%d", h->ctlr, drv_index);
1948 disk->major = h->major;
1949 disk->first_minor = drv_index << NWD_SHIFT;
1950 disk->fops = &cciss_fops;
9cef0d2f
SC		 1951 if (cciss_create_ld_sysfs_entry(h, drv_index))
1952 goto cleanup_queue;
1953 disk->private_data = h->drv[drv_index];
6ae5ce8e
MM		 1954
1955 /* Set up queue information */
1956 blk_queue_bounce_limit(disk->queue, h->pdev->dma_mask);
1957
1958 /* This is a hardware imposed limit. */
8a78362c 1959 blk_queue_max_segments(disk->queue, h->maxsgentries);
6ae5ce8e 1960
086fa5ff 1961 blk_queue_max_hw_sectors(disk->queue, h->cciss_max_sectors);
6ae5ce8e
MM		 1962
1963 blk_queue_softirq_done(disk->queue, cciss_softirq_done);
1964
1965 disk->queue->queuedata = h;
1966
e1defc4f 1967 blk_queue_logical_block_size(disk->queue,
9cef0d2f 1968 h->drv[drv_index]->block_size);
6ae5ce8e
MM		 1969
1970 /* Make sure all queue data is written out before */
9cef0d2f 1971 /* setting h->drv[drv_index]->queue, as setting this */
6ae5ce8e
MM		 1972 /* allows the interrupt handler to start the queue */
1973 wmb();
9cef0d2f 1974 h->drv[drv_index]->queue = disk->queue;
0d52c756 1975 device_add_disk(&h->drv[drv_index]->dev, disk);
617e1344
SC		 1976 return 0;
1977
1978cleanup_queue:
1979 blk_cleanup_queue(disk->queue);
1980 disk->queue = NULL;
e8074f79 1981init_queue_failure:
617e1344 1982 return -1;
6ae5ce8e
MM		 1983}
1984
ddd47442 1985/* This function will check the usage_count of the drive to be updated/added.
a72da29b
MM		 1986 * If the usage_count is zero and it is a heretofore unknown drive, or,
1987 * the drive's capacity, geometry, or serial number has changed,
1988 * then the drive information will be updated and the disk will be
1989 * re-registered with the kernel. If these conditions don't hold,
1990 * then it will be left alone for the next reboot. The exception to this
1991 * is disk 0 which will always be left registered with the kernel since it
1992 * is also the controller node. Any changes to disk 0 will show up on
1993 * the next reboot.
7c832835 1994 */
f70dba83
SC		 1995static void cciss_update_drive_info(ctlr_info_t *h, int drv_index,
1996 int first_time, int via_ioctl)
7c832835 1997{
ddd47442 1998 struct gendisk *disk;
ddd47442
MM		 1999 InquiryData_struct *inq_buff = NULL;
2000 unsigned int block_size;
00988a35 2001 sector_t total_size;
ddd47442
MM		 2002 unsigned long flags = 0;
2003 int ret = 0;
a72da29b
MM		 2004 drive_info_struct *drvinfo;
2005
2006 /* Get information about the disk and modify the driver structure */
2007 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
9cef0d2f 2008 drvinfo = kzalloc(sizeof(*drvinfo), GFP_KERNEL);
a72da29b
MM		 2009 if (inq_buff == NULL || drvinfo == NULL)
2010 goto mem_msg;
2011
2012 /* testing to see if 16-byte CDBs are already being used */
2013 if (h->cciss_read == CCISS_READ_16) {
f70dba83 2014 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2015 &total_size, &block_size);
2016
2017 } else {
f70dba83 2018 cciss_read_capacity(h, drv_index, &total_size, &block_size);
a72da29b
MM		 2019 /* if read_capacity returns all F's this volume is >2TB */
2020 /* in size so we switch to 16-byte CDB's for all */
2021 /* read/write ops */
2022 if (total_size == 0xFFFFFFFFULL) {
f70dba83 2023 cciss_read_capacity_16(h, drv_index,
a72da29b
MM		 2024 &total_size, &block_size);
2025 h->cciss_read = CCISS_READ_16;
2026 h->cciss_write = CCISS_WRITE_16;
2027 } else {
2028 h->cciss_read = CCISS_READ_10;
2029 h->cciss_write = CCISS_WRITE_10;
2030 }
2031 }
2032
f70dba83 2033 cciss_geometry_inquiry(h, drv_index, total_size, block_size,
a72da29b
MM		 2034 inq_buff, drvinfo);
2035 drvinfo->block_size = block_size;
2036 drvinfo->nr_blocks = total_size + 1;
2037
f70dba83 2038 cciss_get_device_descr(h, drv_index, drvinfo->vendor,
7fe06326 2039 drvinfo->model, drvinfo->rev);
f70dba83 2040 cciss_get_serial_no(h, drv_index, drvinfo->serial_no,
a72da29b 2041 sizeof(drvinfo->serial_no));
9cef0d2f
SC		 2042 /* Save the lunid in case we deregister the disk, below. */
2043 memcpy(drvinfo->LunID, h->drv[drv_index]->LunID,
2044 sizeof(drvinfo->LunID));
a72da29b
MM		 2045
2046 /* Is it the same disk we already know, and nothing's changed? */
9cef0d2f 2047 if (h->drv[drv_index]->raid_level != -1 &&
a72da29b 2048 ((memcmp(drvinfo->serial_no,
9cef0d2f
SC		 2049 h->drv[drv_index]->serial_no, 16) == 0) &&
2050 drvinfo->block_size == h->drv[drv_index]->block_size &&
2051 drvinfo->nr_blocks == h->drv[drv_index]->nr_blocks &&
2052 drvinfo->heads == h->drv[drv_index]->heads &&
2053 drvinfo->sectors == h->drv[drv_index]->sectors &&
2054 drvinfo->cylinders == h->drv[drv_index]->cylinders))
a72da29b
MM		 2055 /* The disk is unchanged, nothing to update */
2056 goto freeret;
a72da29b 2057
6ae5ce8e
MM		 2058 /* If we get here it's not the same disk, or something's changed,
2059 * so we need to * deregister it, and re-register it, if it's not
2060 * in use.
2061 * If the disk already exists then deregister it before proceeding
2062 * (unless it's the first disk (for the controller node).
2063 */
9cef0d2f 2064 if (h->drv[drv_index]->raid_level != -1 && drv_index != 0) {
b2a4a43d 2065 dev_warn(&h->pdev->dev, "disk %d has changed.\n", drv_index);
f70dba83 2066 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2067 h->drv[drv_index]->busy_configuring = 1;
f70dba83 2068 spin_unlock_irqrestore(&h->lock, flags);
e14ac670 2069
9cef0d2f 2070 /* deregister_disk sets h->drv[drv_index]->queue = NULL
6ae5ce8e
MM		 2071 * which keeps the interrupt handler from starting
2072 * the queue.
2073 */
2d11d993 2074 ret = deregister_disk(h, drv_index, 0, via_ioctl);
ddd47442
MM		 2075 }
2076
2077 /* If the disk is in use return */
2078 if (ret)
a72da29b
MM		 2079 goto freeret;
2080
6ae5ce8e 2081 /* Save the new information from cciss_geometry_inquiry
9cef0d2f
SC		 2082 * and serial number inquiry. If the disk was deregistered
2083 * above, then h->drv[drv_index] will be NULL.
6ae5ce8e 2084 */
9cef0d2f
SC		 2085 if (h->drv[drv_index] == NULL) {
2086 drvinfo->device_initialized = 0;
2087 h->drv[drv_index] = drvinfo;
2088 drvinfo = NULL; /* so it won't be freed below. */
2089 } else {
2090 /* special case for cxd0 */
2091 h->drv[drv_index]->block_size = drvinfo->block_size;
2092 h->drv[drv_index]->nr_blocks = drvinfo->nr_blocks;
2093 h->drv[drv_index]->heads = drvinfo->heads;
2094 h->drv[drv_index]->sectors = drvinfo->sectors;
2095 h->drv[drv_index]->cylinders = drvinfo->cylinders;
2096 h->drv[drv_index]->raid_level = drvinfo->raid_level;
2097 memcpy(h->drv[drv_index]->serial_no, drvinfo->serial_no, 16);
2098 memcpy(h->drv[drv_index]->vendor, drvinfo->vendor,
2099 VENDOR_LEN + 1);
2100 memcpy(h->drv[drv_index]->model, drvinfo->model, MODEL_LEN + 1);
2101 memcpy(h->drv[drv_index]->rev, drvinfo->rev, REV_LEN + 1);
2102 }
ddd47442
MM		 2103
2104 ++h->num_luns;
2105 disk = h->gendisk[drv_index];
9cef0d2f 2106 set_capacity(disk, h->drv[drv_index]->nr_blocks);
ddd47442 2107
6ae5ce8e
MM		 2108 /* If it's not disk 0 (drv_index != 0)
2109 * or if it was disk 0, but there was previously
2110 * no actual corresponding configured logical drive
2111 * (raid_leve == -1) then we want to update the
2112 * logical drive's information.
2113 */
361e9b07
SC		 2114 if (drv_index || first_time) {
2115 if (cciss_add_disk(h, disk, drv_index) != 0) {
2116 cciss_free_gendisk(h, drv_index);
9cef0d2f 2117 cciss_free_drive_info(h, drv_index);
b2a4a43d
SC		 2118 dev_warn(&h->pdev->dev, "could not update disk %d\n",
2119 drv_index);
361e9b07
SC		 2120 --h->num_luns;
2121 }
2122 }
ddd47442 2123
6ae5ce8e 2124freeret:
ddd47442 2125 kfree(inq_buff);
a72da29b 2126 kfree(drvinfo);
ddd47442 2127 return;
6ae5ce8e 2128mem_msg:
b2a4a43d 2129 dev_err(&h->pdev->dev, "out of memory\n");
ddd47442
MM		 2130 goto freeret;
2131}
2132
2133/* This function will find the first index of the controllers drive array
9cef0d2f
SC		 2134 * that has a null drv pointer and allocate the drive info struct and
2135 * will return that index This is where new drives will be added.
2136 * If the index to be returned is greater than the highest_lun index for
2137 * the controller then highest_lun is set * to this new index.
2138 * If there are no available indexes or if tha allocation fails, then -1
2139 * is returned. * "controller_node" is used to know if this is a real
2140 * logical drive, or just the controller node, which determines if this
2141 * counts towards highest_lun.
7c832835 2142 */
9cef0d2f 2143static int cciss_alloc_drive_info(ctlr_info_t *h, int controller_node)
ddd47442
MM		 2144{
2145 int i;
9cef0d2f 2146 drive_info_struct *drv;
ddd47442 2147
9cef0d2f 2148 /* Search for an empty slot for our drive info */
7c832835 2149 for (i = 0; i < CISS_MAX_LUN; i++) {
9cef0d2f
SC		 2150
2151 /* if not cxd0 case, and it's occupied, skip it. */
2152 if (h->drv[i] && i != 0)
2153 continue;
2154 /*
2155 * If it's cxd0 case, and drv is alloc'ed already, and a
2156 * disk is configured there, skip it.
2157 */
2158 if (i == 0 && h->drv[i] && h->drv[i]->raid_level != -1)
2159 continue;
2160
2161 /*
2162 * We've found an empty slot. Update highest_lun
2163 * provided this isn't just the fake cxd0 controller node.
2164 */
2165 if (i > h->highest_lun && !controller_node)
2166 h->highest_lun = i;
2167
2168 /* If adding a real disk at cxd0, and it's already alloc'ed */
2169 if (i == 0 && h->drv[i] != NULL)
ddd47442 2170 return i;
9cef0d2f
SC		 2171
2172 /*
2173 * Found an empty slot, not already alloc'ed. Allocate it.
2174 * Mark it with raid_level == -1, so we know it's new later on.
2175 */
2176 drv = kzalloc(sizeof(*drv), GFP_KERNEL);
2177 if (!drv)
2178 return -1;
2179 drv->raid_level = -1; /* so we know it's new */
2180 h->drv[i] = drv;
2181 return i;
ddd47442
MM		 2182 }
2183 return -1;
2184}
2185
9cef0d2f
SC		 2186static void cciss_free_drive_info(ctlr_info_t *h, int drv_index)
2187{
2188 kfree(h->drv[drv_index]);
2189 h->drv[drv_index] = NULL;
2190}
2191
361e9b07
SC		 2192static void cciss_free_gendisk(ctlr_info_t *h, int drv_index)
2193{
2194 put_disk(h->gendisk[drv_index]);
2195 h->gendisk[drv_index] = NULL;
2196}
2197
6ae5ce8e
MM		 2198/* cciss_add_gendisk finds a free hba[]->drv structure
2199 * and allocates a gendisk if needed, and sets the lunid
2200 * in the drvinfo structure. It returns the index into
2201 * the ->drv[] array, or -1 if none are free.
2202 * is_controller_node indicates whether highest_lun should
2203 * count this disk, or if it's only being added to provide
2204 * a means to talk to the controller in case no logical
2205 * drives have yet been configured.
2206 */
39ccf9a6
SC		 2207static int cciss_add_gendisk(ctlr_info_t *h, unsigned char lunid[],
2208 int controller_node)
6ae5ce8e
MM		 2209{
2210 int drv_index;
2211
9cef0d2f 2212 drv_index = cciss_alloc_drive_info(h, controller_node);
6ae5ce8e
MM		 2213 if (drv_index == -1)
2214 return -1;
8ce51966 2215
6ae5ce8e
MM		 2216 /*Check if the gendisk needs to be allocated */
2217 if (!h->gendisk[drv_index]) {
2218 h->gendisk[drv_index] =
2219 alloc_disk(1 << NWD_SHIFT);
2220 if (!h->gendisk[drv_index]) {
b2a4a43d
SC		 2221 dev_err(&h->pdev->dev,
2222 "could not allocate a new disk %d\n",
2223 drv_index);
9cef0d2f 2224 goto err_free_drive_info;
6ae5ce8e
MM		 2225 }
2226 }
9cef0d2f
SC		 2227 memcpy(h->drv[drv_index]->LunID, lunid,
2228 sizeof(h->drv[drv_index]->LunID));
2229 if (cciss_create_ld_sysfs_entry(h, drv_index))
7fe06326 2230 goto err_free_disk;
6ae5ce8e
MM		 2231 /* Don't need to mark this busy because nobody */
2232 /* else knows about this disk yet to contend */
2233 /* for access to it. */
9cef0d2f 2234 h->drv[drv_index]->busy_configuring = 0;
6ae5ce8e
MM		 2235 wmb();
2236 return drv_index;
7fe06326
AP		 2237
2238err_free_disk:
361e9b07 2239 cciss_free_gendisk(h, drv_index);
9cef0d2f
SC		 2240err_free_drive_info:
2241 cciss_free_drive_info(h, drv_index);
7fe06326 2242 return -1;
6ae5ce8e
MM		 2243}
2244
2245/* This is for the special case of a controller which
2246 * has no logical drives. In this case, we still need
2247 * to register a disk so the controller can be accessed
2248 * by the Array Config Utility.
2249 */
2250static void cciss_add_controller_node(ctlr_info_t *h)
2251{
2252 struct gendisk *disk;
2253 int drv_index;
2254
2255 if (h->gendisk[0] != NULL) /* already did this? Then bail. */
2256 return;
2257
39ccf9a6 2258 drv_index = cciss_add_gendisk(h, CTLR_LUNID, 1);
361e9b07
SC		 2259 if (drv_index == -1)
2260 goto error;
9cef0d2f
SC		 2261 h->drv[drv_index]->block_size = 512;
2262 h->drv[drv_index]->nr_blocks = 0;
2263 h->drv[drv_index]->heads = 0;
2264 h->drv[drv_index]->sectors = 0;
2265 h->drv[drv_index]->cylinders = 0;
2266 h->drv[drv_index]->raid_level = -1;
2267 memset(h->drv[drv_index]->serial_no, 0, 16);
6ae5ce8e 2268 disk = h->gendisk[drv_index];
361e9b07
SC		 2269 if (cciss_add_disk(h, disk, drv_index) == 0)
2270 return;
2271 cciss_free_gendisk(h, drv_index);
9cef0d2f 2272 cciss_free_drive_info(h, drv_index);
361e9b07 2273error:
b2a4a43d 2274 dev_warn(&h->pdev->dev, "could not add disk 0.\n");
361e9b07 2275 return;
6ae5ce8e
MM		 2276}
2277
ddd47442 2278/* This function will add and remove logical drives from the Logical
d14c4ab5 2279 * drive array of the controller and maintain persistency of ordering
ddd47442
MM		 2280 * so that mount points are preserved until the next reboot. This allows
2281 * for the removal of logical drives in the middle of the drive array
2282 * without a re-ordering of those drives.
2283 * INPUT
2284 * h = The controller to perform the operations on
7c832835 2285 */
2d11d993
SC		 2286static int rebuild_lun_table(ctlr_info_t *h, int first_time,
2287 int via_ioctl)
1da177e4 2288{
ddd47442
MM		 2289 int num_luns;
2290 ReportLunData_struct *ld_buff = NULL;
ddd47442
MM		 2291 int return_code;
2292 int listlength = 0;
2293 int i;
2294 int drv_found;
2295 int drv_index = 0;
39ccf9a6 2296 unsigned char lunid[8] = CTLR_LUNID;
1da177e4 2297 unsigned long flags;
ddd47442 2298
6ae5ce8e
MM		 2299 if (!capable(CAP_SYS_RAWIO))
2300 return -EPERM;
2301
ddd47442 2302 /* Set busy_configuring flag for this operation */
f70dba83 2303 spin_lock_irqsave(&h->lock, flags);
7c832835 2304 if (h->busy_configuring) {
f70dba83 2305 spin_unlock_irqrestore(&h->lock, flags);
ddd47442
MM		 2306 return -EBUSY;
2307 }
2308 h->busy_configuring = 1;
f70dba83 2309 spin_unlock_irqrestore(&h->lock, flags);
ddd47442 2310
a72da29b
MM		 2311 ld_buff = kzalloc(sizeof(ReportLunData_struct), GFP_KERNEL);
2312 if (ld_buff == NULL)
2313 goto mem_msg;
2314
f70dba83 2315 return_code = sendcmd_withirq(h, CISS_REPORT_LOG, ld_buff,
b57695fe 2316 sizeof(ReportLunData_struct),
2317 0, CTLR_LUNID, TYPE_CMD);
ddd47442 2318
a72da29b
MM		 2319 if (return_code == IO_OK)
2320 listlength = be32_to_cpu(*(__be32 *) ld_buff->LUNListLength);
2321 else { /* reading number of logical volumes failed */
b2a4a43d
SC		 2322 dev_warn(&h->pdev->dev,
2323 "report logical volume command failed\n");
a72da29b
MM		 2324 listlength = 0;
2325 goto freeret;
2326 }
2327
2328 num_luns = listlength / 8; /* 8 bytes per entry */
2329 if (num_luns > CISS_MAX_LUN) {
2330 num_luns = CISS_MAX_LUN;
b2a4a43d 2331 dev_warn(&h->pdev->dev, "more luns configured"
a72da29b
MM		 2332 " on controller than can be handled by"
2333 " this driver.\n");
2334 }
2335
6ae5ce8e
MM		 2336 if (num_luns == 0)
2337 cciss_add_controller_node(h);
2338
2339 /* Compare controller drive array to driver's drive array
2340 * to see if any drives are missing on the controller due
2341 * to action of Array Config Utility (user deletes drive)
2342 * and deregister logical drives which have disappeared.
2343 */
a72da29b
MM		 2344 for (i = 0; i <= h->highest_lun; i++) {
2345 int j;
2346 drv_found = 0;
d8a0be6a
SC		 2347
2348 /* skip holes in the array from already deleted drives */
9cef0d2f 2349 if (h->drv[i] == NULL)
d8a0be6a
SC		 2350 continue;
2351
a72da29b 2352 for (j = 0; j < num_luns; j++) {
39ccf9a6 2353 memcpy(lunid, &ld_buff->LUN[j][0], sizeof(lunid));
9cef0d2f 2354 if (memcmp(h->drv[i]->LunID, lunid,
39ccf9a6 2355 sizeof(lunid)) == 0) {
a72da29b
MM		 2356 drv_found = 1;
2357 break;
2358 }
2359 }
2360 if (!drv_found) {
2361 /* Deregister it from the OS, it's gone. */
f70dba83 2362 spin_lock_irqsave(&h->lock, flags);
9cef0d2f 2363 h->drv[i]->busy_configuring = 1;
f70dba83 2364 spin_unlock_irqrestore(&h->lock, flags);
2d11d993 2365 return_code = deregister_disk(h, i, 1, via_ioctl);
9cef0d2f
SC		 2366 if (h->drv[i] != NULL)
2367 h->drv[i]->busy_configuring = 0;
ddd47442 2368 }
a72da29b 2369 }
ddd47442 2370
a72da29b
MM		 2371 /* Compare controller drive array to driver's drive array.
2372 * Check for updates in the drive information and any new drives
2373 * on the controller due to ACU adding logical drives, or changing
2374 * a logical drive's size, etc. Reregister any new/changed drives
2375 */
2376 for (i = 0; i < num_luns; i++) {
2377 int j;
ddd47442 2378
a72da29b 2379 drv_found = 0;
ddd47442 2380
39ccf9a6 2381 memcpy(lunid, &ld_buff->LUN[i][0], sizeof(lunid));
a72da29b
MM		 2382 /* Find if the LUN is already in the drive array
2383 * of the driver. If so then update its info
2384 * if not in use. If it does not exist then find
2385 * the first free index and add it.
2386 */
2387 for (j = 0; j <= h->highest_lun; j++) {
9cef0d2f
SC		 2388 if (h->drv[j] != NULL &&
2389 memcmp(h->drv[j]->LunID, lunid,
2390 sizeof(h->drv[j]->LunID)) == 0) {
a72da29b
MM		 2391 drv_index = j;
2392 drv_found = 1;
2393 break;
ddd47442 2394 }
a72da29b 2395 }
ddd47442 2396
a72da29b
MM		 2397 /* check if the drive was found already in the array */
2398 if (!drv_found) {
eece695f 2399 drv_index = cciss_add_gendisk(h, lunid, 0);
a72da29b
MM		 2400 if (drv_index == -1)
2401 goto freeret;
a72da29b 2402 }
f70dba83 2403 cciss_update_drive_info(h, drv_index, first_time, via_ioctl);
a72da29b 2404 } /* end for */
ddd47442 2405
6ae5ce8e 2406freeret:
ddd47442
MM		 2407 kfree(ld_buff);
2408 h->busy_configuring = 0;
2409 /* We return -1 here to tell the ACU that we have registered/updated
2410 * all of the drives that we can and to keep it from calling us
2411 * additional times.
7c832835 2412 */
ddd47442 2413 return -1;
6ae5ce8e 2414mem_msg:
b2a4a43d 2415 dev_err(&h->pdev->dev, "out of memory\n");
a72da29b 2416 h->busy_configuring = 0;
ddd47442
MM		 2417 goto freeret;
2418}
2419
9ddb27b4
SC		 2420static void cciss_clear_drive_info(drive_info_struct *drive_info)
2421{
2422 /* zero out the disk size info */
2423 drive_info->nr_blocks = 0;
2424 drive_info->block_size = 0;
2425 drive_info->heads = 0;
2426 drive_info->sectors = 0;
2427 drive_info->cylinders = 0;
2428 drive_info->raid_level = -1;
2429 memset(drive_info->serial_no, 0, sizeof(drive_info->serial_no));
2430 memset(drive_info->model, 0, sizeof(drive_info->model));
2431 memset(drive_info->rev, 0, sizeof(drive_info->rev));
2432 memset(drive_info->vendor, 0, sizeof(drive_info->vendor));
2433 /*
2434 * don't clear the LUNID though, we need to remember which
2435 * one this one is.
2436 */
2437}
2438
ddd47442
MM		 2439/* This function will deregister the disk and it's queue from the
2440 * kernel. It must be called with the controller lock held and the
2441 * drv structures busy_configuring flag set. It's parameters are:
2442 *
2443 * disk = This is the disk to be deregistered
2444 * drv = This is the drive_info_struct associated with the disk to be
2445 * deregistered. It contains information about the disk used
2446 * by the driver.
2447 * clear_all = This flag determines whether or not the disk information
2448 * is going to be completely cleared out and the highest_lun
2449 * reset. Sometimes we want to clear out information about
d14c4ab5 2450 * the disk in preparation for re-adding it. In this case
ddd47442
MM		 2451 * the highest_lun should be left unchanged and the LunID
2452 * should not be cleared.
2d11d993
SC		 2453 * via_ioctl
2454 * This indicates whether we've reached this path via ioctl.
2455 * This affects the maximum usage count allowed for c0d0 to be messed with.
2456 * If this path is reached via ioctl(), then the max_usage_count will
2457 * be 1, as the process calling ioctl() has got to have the device open.
2458 * If we get here via sysfs, then the max usage count will be zero.
ddd47442 2459*/
a0ea8622 2460static int deregister_disk(ctlr_info_t *h, int drv_index,
2d11d993 2461 int clear_all, int via_ioctl)
ddd47442 2462{
799202cb 2463 int i;
a0ea8622
SC		 2464 struct gendisk *disk;
2465 drive_info_struct *drv;
9cef0d2f 2466 int recalculate_highest_lun;
1da177e4
LT		 2467
2468 if (!capable(CAP_SYS_RAWIO))
2469 return -EPERM;
2470
9cef0d2f 2471 drv = h->drv[drv_index];
a0ea8622
SC		 2472 disk = h->gendisk[drv_index];
2473
1da177e4 2474 /* make sure logical volume is NOT is use */
7c832835 2475 if (clear_all || (h->gendisk[0] == disk)) {
2d11d993 2476 if (drv->usage_count > via_ioctl)
7c832835
BH		 2477 return -EBUSY;
2478 } else if (drv->usage_count > 0)
2479 return -EBUSY;
1da177e4 2480
9cef0d2f
SC		 2481 recalculate_highest_lun = (drv == h->drv[h->highest_lun]);
2482
ddd47442
MM		 2483 /* invalidate the devices and deregister the disk. If it is disk
2484 * zero do not deregister it but just zero out it's values. This
2485 * allows us to delete disk zero but keep the controller registered.
7c832835
BH		 2486 */
2487 if (h->gendisk[0] != disk) {
5a9df732 2488 struct request_queue *q = disk->queue;
097d0264 2489 if (disk->flags & GENHD_FL_UP) {
8ce51966 2490 cciss_destroy_ld_sysfs_entry(h, drv_index, 0);
5a9df732 2491 del_gendisk(disk);
5a9df732 2492 }
9cef0d2f 2493 if (q)
5a9df732 2494 blk_cleanup_queue(q);
5a9df732
AB		 2495 /* If clear_all is set then we are deleting the logical
2496 * drive, not just refreshing its info. For drives
2497 * other than disk 0 we will call put_disk. We do not
2498 * do this for disk 0 as we need it to be able to
2499 * configure the controller.
a72da29b 2500 */
5a9df732
AB		 2501 if (clear_all){
2502 /* This isn't pretty, but we need to find the
2503 * disk in our array and NULL our the pointer.
2504 * This is so that we will call alloc_disk if
2505 * this index is used again later.
a72da29b 2506 */
5a9df732 2507 for (i=0; i < CISS_MAX_LUN; i++){
a72da29b 2508 if (h->gendisk[i] == disk) {
5a9df732
AB		 2509 h->gendisk[i] = NULL;
2510 break;
799202cb 2511 }
799202cb 2512 }
5a9df732 2513 put_disk(disk);
ddd47442 2514 }
799202cb
MM		 2515 } else {
2516 set_capacity(disk, 0);
9cef0d2f 2517 cciss_clear_drive_info(drv);
ddd47442
MM		 2518 }
2519
2520 --h->num_luns;
ddd47442 2521
9cef0d2f
SC		 2522 /* if it was the last disk, find the new hightest lun */
2523 if (clear_all && recalculate_highest_lun) {
c2d45b4d 2524 int newhighest = -1;
9cef0d2f
SC		 2525 for (i = 0; i <= h->highest_lun; i++) {
2526 /* if the disk has size > 0, it is available */
2527 if (h->drv[i] && h->drv[i]->heads)
2528 newhighest = i;
1da177e4 2529 }
9cef0d2f 2530 h->highest_lun = newhighest;
ddd47442 2531 }
e2019b58 2532 return 0;
1da177e4 2533}
ddd47442 2534
f70dba83 2535static int fill_cmd(ctlr_info_t *h, CommandList_struct *c, __u8 cmd, void *buff,
b57695fe 2536 size_t size, __u8 page_code, unsigned char *scsi3addr,
2537 int cmd_type)
1da177e4 2538{
1da177e4
LT		 2539 u64bit buff_dma_handle;
2540 int status = IO_OK;
2541
2542 c->cmd_type = CMD_IOCTL_PEND;
2543 c->Header.ReplyQueue = 0;
7c832835 2544 if (buff != NULL) {
1da177e4 2545 c->Header.SGList = 1;
7c832835 2546 c->Header.SGTotal = 1;
1da177e4
LT		 2547 } else {
2548 c->Header.SGList = 0;
7c832835 2549 c->Header.SGTotal = 0;
1da177e4
LT		 2550 }
2551 c->Header.Tag.lower = c->busaddr;
b57695fe 2552 memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8);
1da177e4
LT		 2553
2554 c->Request.Type.Type = cmd_type;
2555 if (cmd_type == TYPE_CMD) {
7c832835
BH		 2556 switch (cmd) {
2557 case CISS_INQUIRY:
1da177e4 2558 /* are we trying to read a vital product page */
7c832835 2559 if (page_code != 0) {
1da177e4
LT		 2560 c->Request.CDB[1] = 0x01;
2561 c->Request.CDB[2] = page_code;
2562 }
2563 c->Request.CDBLen = 6;
7c832835 2564 c->Request.Type.Attribute = ATTR_SIMPLE;
1da177e4
LT		 2565 c->Request.Type.Direction = XFER_READ;
2566 c->Request.Timeout = 0;
7c832835
BH		 2567 c->Request.CDB[0] = CISS_INQUIRY;
2568 c->Request.CDB[4] = size & 0xFF;
2569 break;
1da177e4
LT		 2570 case CISS_REPORT_LOG:
2571 case CISS_REPORT_PHYS:
7c832835 2572 /* Talking to controller so It's a physical command
1da177e4 2573 mode = 00 target = 0. Nothing to write.
7c832835 2574 */
1da177e4
LT		 2575 c->Request.CDBLen = 12;
2576 c->Request.Type.Attribute = ATTR_SIMPLE;
2577 c->Request.Type.Direction = XFER_READ;
2578 c->Request.Timeout = 0;
2579 c->Request.CDB[0] = cmd;
b028461d 2580 c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */
1da177e4
LT		 2581 c->Request.CDB[7] = (size >> 16) & 0xFF;
2582 c->Request.CDB[8] = (size >> 8) & 0xFF;
2583 c->Request.CDB[9] = size & 0xFF;
2584 break;
2585
2586 case CCISS_READ_CAPACITY:
1da177e4
LT		 2587 c->Request.CDBLen = 10;
2588 c->Request.Type.Attribute = ATTR_SIMPLE;
2589 c->Request.Type.Direction = XFER_READ;
2590 c->Request.Timeout = 0;
2591 c->Request.CDB[0] = cmd;
7c832835 2592 break;
00988a35 2593 case CCISS_READ_CAPACITY_16:
00988a35
MMOD		 2594 c->Request.CDBLen = 16;
2595 c->Request.Type.Attribute = ATTR_SIMPLE;
2596 c->Request.Type.Direction = XFER_READ;
2597 c->Request.Timeout = 0;
2598 c->Request.CDB[0] = cmd;
2599 c->Request.CDB[1] = 0x10;
2600 c->Request.CDB[10] = (size >> 24) & 0xFF;
2601 c->Request.CDB[11] = (size >> 16) & 0xFF;
2602 c->Request.CDB[12] = (size >> 8) & 0xFF;
2603 c->Request.CDB[13] = size & 0xFF;
2604 c->Request.Timeout = 0;
2605 c->Request.CDB[0] = cmd;
2606 break;
1da177e4
LT		 2607 case CCISS_CACHE_FLUSH:
2608 c->Request.CDBLen = 12;
2609 c->Request.Type.Attribute = ATTR_SIMPLE;
2610 c->Request.Type.Direction = XFER_WRITE;
2611 c->Request.Timeout = 0;
2612 c->Request.CDB[0] = BMIC_WRITE;
2613 c->Request.CDB[6] = BMIC_CACHE_FLUSH;
59bd71a8
SC		 2614 c->Request.CDB[7] = (size >> 8) & 0xFF;
2615 c->Request.CDB[8] = size & 0xFF;
7c832835 2616 break;
88f627ae 2617 case TEST_UNIT_READY:
88f627ae
SC		 2618 c->Request.CDBLen = 6;
2619 c->Request.Type.Attribute = ATTR_SIMPLE;
2620 c->Request.Type.Direction = XFER_NONE;
2621 c->Request.Timeout = 0;
2622 break;
1da177e4 2623 default:
b2a4a43d 2624 dev_warn(&h->pdev->dev, "Unknown Command 0x%c\n", cmd);
e2019b58 2625 return IO_ERROR;
1da177e4
LT		 2626 }
2627 } else if (cmd_type == TYPE_MSG) {
2628 switch (cmd) {
8f71bb82 2629 case CCISS_ABORT_MSG:
3da8b713 2630 c->Request.CDBLen = 12;
2631 c->Request.Type.Attribute = ATTR_SIMPLE;
2632 c->Request.Type.Direction = XFER_WRITE;
2633 c->Request.Timeout = 0;
7c832835
BH		 2634 c->Request.CDB[0] = cmd; /* abort */
2635 c->Request.CDB[1] = 0; /* abort a command */
3da8b713 2636 /* buff contains the tag of the command to abort */
2637 memcpy(&c->Request.CDB[4], buff, 8);
2638 break;
8f71bb82 2639 case CCISS_RESET_MSG:
88f627ae 2640 c->Request.CDBLen = 16;
3da8b713 2641 c->Request.Type.Attribute = ATTR_SIMPLE;
88f627ae 2642 c->Request.Type.Direction = XFER_NONE;
3da8b713 2643 c->Request.Timeout = 0;
2644 memset(&c->Request.CDB[0], 0, sizeof(c->Request.CDB));
7c832835 2645 c->Request.CDB[0] = cmd; /* reset */
8f71bb82 2646 c->Request.CDB[1] = CCISS_RESET_TYPE_TARGET;
00988a35 2647 break;
8f71bb82 2648 case CCISS_NOOP_MSG:
1da177e4
LT		 2649 c->Request.CDBLen = 1;
2650 c->Request.Type.Attribute = ATTR_SIMPLE;
2651 c->Request.Type.Direction = XFER_WRITE;
2652 c->Request.Timeout = 0;
2653 c->Request.CDB[0] = cmd;
2654 break;
2655 default:
b2a4a43d
SC		 2656 dev_warn(&h->pdev->dev,
2657 "unknown message type %d\n", cmd);
1da177e4
LT		 2658 return IO_ERROR;
2659 }
2660 } else {
b2a4a43d 2661 dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type);
1da177e4
LT		 2662 return IO_ERROR;
2663 }
2664 /* Fill in the scatter gather information */
2665 if (size > 0) {
2666 buff_dma_handle.val = (__u64) pci_map_single(h->pdev,
7c832835
BH		 2667 buff, size,
2668 PCI_DMA_BIDIRECTIONAL);
1da177e4
LT		 2669 c->SG[0].Addr.lower = buff_dma_handle.val32.lower;
2670 c->SG[0].Addr.upper = buff_dma_handle.val32.upper;
2671 c->SG[0].Len = size;
7c832835 2672 c->SG[0].Ext = 0; /* we are not chaining */
1da177e4
LT		 2673 }
2674 return status;
2675}
7c832835 2676
8d85fce7
GKH		 2677static int cciss_send_reset(ctlr_info_t *h, unsigned char *scsi3addr,
2678 u8 reset_type)
edc83d47
JA		 2679{
2680 CommandList_struct *c;
2681 int return_status;
2682
2683 c = cmd_alloc(h);
2684 if (!c)
2685 return -ENOMEM;
2686 return_status = fill_cmd(h, c, CCISS_RESET_MSG, NULL, 0, 0,
2687 CTLR_LUNID, TYPE_MSG);
2688 c->Request.CDB[1] = reset_type; /* fill_cmd defaults to target reset */
2689 if (return_status != IO_OK) {
2690 cmd_special_free(h, c);
2691 return return_status;
2692 }
2693 c->waiting = NULL;
2694 enqueue_cmd_and_start_io(h, c);
2695 /* Don't wait for completion, the reset won't complete. Don't free
2696 * the command either. This is the last command we will send before
2697 * re-initializing everything, so it doesn't matter and won't leak.
2698 */
2699 return 0;
2700}
2701
3c2ab402 2702static int check_target_status(ctlr_info_t *h, CommandList_struct *c)
2703{
2704 switch (c->err_info->ScsiStatus) {
2705 case SAM_STAT_GOOD:
2706 return IO_OK;
2707 case SAM_STAT_CHECK_CONDITION:
2708 switch (0xf & c->err_info->SenseInfo[2]) {
2709 case 0: return IO_OK; /* no sense */
2710 case 1: return IO_OK; /* recovered error */
2711 default:
c08fac65
SC		 2712 if (check_for_unit_attention(h, c))
2713 return IO_NEEDS_RETRY;
b2a4a43d 2714 dev_warn(&h->pdev->dev, "cmd 0x%02x "
3c2ab402 2715 "check condition, sense key = 0x%02x\n",
b2a4a43d 2716 c->Request.CDB[0], c->err_info->SenseInfo[2]);
3c2ab402 2717 }
2718 break;
2719 default:
b2a4a43d
SC		 2720 dev_warn(&h->pdev->dev, "cmd 0x%02x"
2721 "scsi status = 0x%02x\n",
3c2ab402 2722 c->Request.CDB[0], c->err_info->ScsiStatus);
2723 break;
2724 }
2725 return IO_ERROR;
2726}
2727
789a424a 2728static int process_sendcmd_error(ctlr_info_t *h, CommandList_struct *c)
1da177e4 2729{
5390cfc3 2730 int return_status = IO_OK;
7c832835 2731
789a424a 2732 if (c->err_info->CommandStatus == CMD_SUCCESS)
2733 return IO_OK;
5390cfc3 2734
2735 switch (c->err_info->CommandStatus) {
2736 case CMD_TARGET_STATUS:
3c2ab402 2737 return_status = check_target_status(h, c);
5390cfc3 2738 break;
2739 case CMD_DATA_UNDERRUN:
2740 case CMD_DATA_OVERRUN:
2741 /* expected for inquiry and report lun commands */
2742 break;
2743 case CMD_INVALID:
b2a4a43d 2744 dev_warn(&h->pdev->dev, "cmd 0x%02x is "
5390cfc3 2745 "reported invalid\n", c->Request.CDB[0]);
2746 return_status = IO_ERROR;
2747 break;
2748 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 2749 dev_warn(&h->pdev->dev, "cmd 0x%02x has "
2750 "protocol error\n", c->Request.CDB[0]);
5390cfc3 2751 return_status = IO_ERROR;
2752 break;
2753 case CMD_HARDWARE_ERR:
b2a4a43d 2754 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2755 " hardware error\n", c->Request.CDB[0]);
2756 return_status = IO_ERROR;
2757 break;
2758 case CMD_CONNECTION_LOST:
b2a4a43d 2759 dev_warn(&h->pdev->dev, "cmd 0x%02x had "
5390cfc3 2760 "connection lost\n", c->Request.CDB[0]);
2761 return_status = IO_ERROR;
2762 break;
2763 case CMD_ABORTED:
b2a4a43d 2764 dev_warn(&h->pdev->dev, "cmd 0x%02x was "
5390cfc3 2765 "aborted\n", c->Request.CDB[0]);
2766 return_status = IO_ERROR;
2767 break;
2768 case CMD_ABORT_FAILED:
b2a4a43d 2769 dev_warn(&h->pdev->dev, "cmd 0x%02x reports "
5390cfc3 2770 "abort failed\n", c->Request.CDB[0]);
2771 return_status = IO_ERROR;
2772 break;
2773 case CMD_UNSOLICITED_ABORT:
b2a4a43d 2774 dev_warn(&h->pdev->dev, "unsolicited abort 0x%02x\n",
5390cfc3 2775 c->Request.CDB[0]);
789a424a 2776 return_status = IO_NEEDS_RETRY;
5390cfc3 2777 break;
6d9a4f9e
SC		 2778 case CMD_UNABORTABLE:
2779 dev_warn(&h->pdev->dev, "cmd unabortable\n");
2780 return_status = IO_ERROR;
2781 break;
5390cfc3 2782 default:
b2a4a43d 2783 dev_warn(&h->pdev->dev, "cmd 0x%02x returned "
5390cfc3 2784 "unknown status %x\n", c->Request.CDB[0],
2785 c->err_info->CommandStatus);
2786 return_status = IO_ERROR;
7c832835 2787 }
789a424a 2788 return return_status;
2789}
2790
2791static int sendcmd_withirq_core(ctlr_info_t *h, CommandList_struct *c,
2792 int attempt_retry)
2793{
2794 DECLARE_COMPLETION_ONSTACK(wait);
2795 u64bit buff_dma_handle;
789a424a 2796 int return_status = IO_OK;
2797
2798resend_cmd2:
2799 c->waiting = &wait;
664a717d 2800 enqueue_cmd_and_start_io(h, c);
789a424a 2801
2802 wait_for_completion(&wait);
2803
2804 if (c->err_info->CommandStatus == 0 || !attempt_retry)
2805 goto command_done;
2806
2807 return_status = process_sendcmd_error(h, c);
2808
2809 if (return_status == IO_NEEDS_RETRY &&
2810 c->retry_count < MAX_CMD_RETRIES) {
b2a4a43d 2811 dev_warn(&h->pdev->dev, "retrying 0x%02x\n",
789a424a 2812 c->Request.CDB[0]);
2813 c->retry_count++;
2814 /* erase the old error information */
2815 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
2816 return_status = IO_OK;
16735d02 2817 reinit_completion(&wait);
789a424a 2818 goto resend_cmd2;
2819 }
5390cfc3 2820
2821command_done:
1da177e4 2822 /* unlock the buffers from DMA */
bb2a37bf
MM		 2823 buff_dma_handle.val32.lower = c->SG[0].Addr.lower;
2824 buff_dma_handle.val32.upper = c->SG[0].Addr.upper;
7c832835
BH		 2825 pci_unmap_single(h->pdev, (dma_addr_t) buff_dma_handle.val,
2826 c->SG[0].Len, PCI_DMA_BIDIRECTIONAL);
5390cfc3 2827 return return_status;
2828}
2829
f70dba83 2830static int sendcmd_withirq(ctlr_info_t *h, __u8 cmd, void *buff, size_t size,
b57695fe 2831 __u8 page_code, unsigned char scsi3addr[],
2832 int cmd_type)
5390cfc3 2833{
5390cfc3 2834 CommandList_struct *c;
2835 int return_status;
2836
6b4d96b8 2837 c = cmd_special_alloc(h);
5390cfc3 2838 if (!c)
2839 return -ENOMEM;
f70dba83 2840 return_status = fill_cmd(h, c, cmd, buff, size, page_code,
b57695fe 2841 scsi3addr, cmd_type);
5390cfc3 2842 if (return_status == IO_OK)
789a424a 2843 return_status = sendcmd_withirq_core(h, c, 1);
2844
6b4d96b8 2845 cmd_special_free(h, c);
7c832835 2846 return return_status;
1da177e4 2847}
7c832835 2848
f70dba83 2849static void cciss_geometry_inquiry(ctlr_info_t *h, int logvol,
7b838bde 2850 sector_t total_size,
7c832835
BH		 2851 unsigned int block_size,
2852 InquiryData_struct *inq_buff,
2853 drive_info_struct *drv)
1da177e4
LT		 2854{
2855 int return_code;
00988a35 2856 unsigned long t;
b57695fe 2857 unsigned char scsi3addr[8];
00988a35 2858
1da177e4 2859 memset(inq_buff, 0, sizeof(InquiryData_struct));
f70dba83
SC		 2860 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2861 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
7b838bde 2862 sizeof(*inq_buff), 0xC1, scsi3addr, TYPE_CMD);
1da177e4 2863 if (return_code == IO_OK) {
7c832835 2864 if (inq_buff->data_byte[8] == 0xFF) {
b2a4a43d
SC		 2865 dev_warn(&h->pdev->dev,
2866 "reading geometry failed, volume "
7c832835 2867 "does not support reading geometry\n");
1da177e4 2868 drv->heads = 255;
b028461d 2869 drv->sectors = 32; /* Sectors per track */
7f42d3b8 2870 drv->cylinders = total_size + 1;
89f97ad1 2871 drv->raid_level = RAID_UNKNOWN;
1da177e4 2872 } else {
1da177e4
LT		 2873 drv->heads = inq_buff->data_byte[6];
2874 drv->sectors = inq_buff->data_byte[7];
2875 drv->cylinders = (inq_buff->data_byte[4] & 0xff) << 8;
2876 drv->cylinders += inq_buff->data_byte[5];
2877 drv->raid_level = inq_buff->data_byte[8];
3f7705ea
MW		 2878 }
2879 drv->block_size = block_size;
97c06978 2880 drv->nr_blocks = total_size + 1;
3f7705ea
MW		 2881 t = drv->heads * drv->sectors;
2882 if (t > 1) {
97c06978
MMOD		 2883 sector_t real_size = total_size + 1;
2884 unsigned long rem = sector_div(real_size, t);
3f7705ea 2885 if (rem)
97c06978
MMOD		 2886 real_size++;
2887 drv->cylinders = real_size;
1da177e4 2888 }
7c832835 2889 } else { /* Get geometry failed */
b2a4a43d 2890 dev_warn(&h->pdev->dev, "reading geometry failed\n");
1da177e4 2891 }
1da177e4 2892}
7c832835 2893
1da177e4 2894static void
f70dba83 2895cciss_read_capacity(ctlr_info_t *h, int logvol, sector_t *total_size,
7c832835 2896 unsigned int *block_size)
1da177e4 2897{
00988a35 2898 ReadCapdata_struct *buf;
1da177e4 2899 int return_code;
b57695fe 2900 unsigned char scsi3addr[8];
1aebe187
MK		 2901
2902 buf = kzalloc(sizeof(ReadCapdata_struct), GFP_KERNEL);
2903 if (!buf) {
b2a4a43d 2904 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2905 return;
2906 }
1aebe187 2907
f70dba83
SC		 2908 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2909 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY, buf,
7b838bde 2910 sizeof(ReadCapdata_struct), 0, scsi3addr, TYPE_CMD);
1da177e4 2911 if (return_code == IO_OK) {
4c1f2b31
AV		 2912 *total_size = be32_to_cpu(*(__be32 *) buf->total_size);
2913 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
7c832835 2914 } else { /* read capacity command failed */
b2a4a43d 2915 dev_warn(&h->pdev->dev, "read capacity failed\n");
1da177e4
LT		 2916 *total_size = 0;
2917 *block_size = BLOCK_SIZE;
2918 }
00988a35 2919 kfree(buf);
00988a35
MMOD		 2920}
2921
f70dba83 2922static void cciss_read_capacity_16(ctlr_info_t *h, int logvol,
7b838bde 2923 sector_t *total_size, unsigned int *block_size)
00988a35
MMOD		 2924{
2925 ReadCapdata_struct_16 *buf;
2926 int return_code;
b57695fe 2927 unsigned char scsi3addr[8];
1aebe187
MK		 2928
2929 buf = kzalloc(sizeof(ReadCapdata_struct_16), GFP_KERNEL);
2930 if (!buf) {
b2a4a43d 2931 dev_warn(&h->pdev->dev, "out of memory\n");
00988a35
MMOD		 2932 return;
2933 }
1aebe187 2934
f70dba83
SC		 2935 log_unit_to_scsi3addr(h, scsi3addr, logvol);
2936 return_code = sendcmd_withirq(h, CCISS_READ_CAPACITY_16,
2937 buf, sizeof(ReadCapdata_struct_16),
7b838bde 2938 0, scsi3addr, TYPE_CMD);
00988a35 2939 if (return_code == IO_OK) {
4c1f2b31
AV		 2940 *total_size = be64_to_cpu(*(__be64 *) buf->total_size);
2941 *block_size = be32_to_cpu(*(__be32 *) buf->block_size);
00988a35 2942 } else { /* read capacity command failed */
b2a4a43d 2943 dev_warn(&h->pdev->dev, "read capacity failed\n");
00988a35
MMOD		 2944 *total_size = 0;
2945 *block_size = BLOCK_SIZE;
2946 }
b2a4a43d 2947 dev_info(&h->pdev->dev, " blocks= %llu block_size= %d\n",
97c06978 2948 (unsigned long long)*total_size+1, *block_size);
00988a35 2949 kfree(buf);
1da177e4
LT		 2950}
2951
1da177e4
LT		 2952static int cciss_revalidate(struct gendisk *disk)
2953{
2954 ctlr_info_t *h = get_host(disk);
2955 drive_info_struct *drv = get_drv(disk);
2956 int logvol;
7c832835 2957 int FOUND = 0;
1da177e4 2958 unsigned int block_size;
00988a35 2959 sector_t total_size;
1da177e4
LT		 2960 InquiryData_struct *inq_buff = NULL;
2961
68264e9d 2962 for (logvol = 0; logvol <= h->highest_lun; logvol++) {
0fc13c89 2963 if (!h->drv[logvol])
453434cf 2964 continue;
9cef0d2f 2965 if (memcmp(h->drv[logvol]->LunID, drv->LunID,
39ccf9a6 2966 sizeof(drv->LunID)) == 0) {
7c832835 2967 FOUND = 1;
1da177e4
LT		 2968 break;
2969 }
2970 }
2971
7c832835
BH		 2972 if (!FOUND)
2973 return 1;
1da177e4 2974
7c832835
BH		 2975 inq_buff = kmalloc(sizeof(InquiryData_struct), GFP_KERNEL);
2976 if (inq_buff == NULL) {
b2a4a43d 2977 dev_warn(&h->pdev->dev, "out of memory\n");
7c832835
BH		 2978 return 1;
2979 }
00988a35 2980 if (h->cciss_read == CCISS_READ_10) {
f70dba83 2981 cciss_read_capacity(h, logvol,
00988a35
MMOD		 2982 &total_size, &block_size);
2983 } else {
f70dba83 2984 cciss_read_capacity_16(h, logvol,
00988a35
MMOD		 2985 &total_size, &block_size);
2986 }
f70dba83 2987 cciss_geometry_inquiry(h, logvol, total_size, block_size,
7c832835 2988 inq_buff, drv);
1da177e4 2989
e1defc4f 2990 blk_queue_logical_block_size(drv->queue, drv->block_size);
1da177e4
LT		 2991 set_capacity(disk, drv->nr_blocks);
2992
1da177e4
LT		 2993 kfree(inq_buff);
2994 return 0;
2995}
2996
1da177e4
LT		 2997/*
2998 * Map (physical) PCI mem into (virtual) kernel space
2999 */
3000static void __iomem *remap_pci_mem(ulong base, ulong size)
3001{
7c832835
BH		 3002 ulong page_base = ((ulong) base) & PAGE_MASK;
3003 ulong page_offs = ((ulong) base) - page_base;
3004 void __iomem *page_remapped = ioremap(page_base, page_offs + size);
1da177e4 3005
7c832835 3006 return page_remapped ? (page_remapped + page_offs) : NULL;
1da177e4
LT		 3007}
3008
7c832835
BH		 3009/*
3010 * Takes jobs of the Q and sends them to the hardware, then puts it on
3011 * the Q to wait for completion.
3012 */
3013static void start_io(ctlr_info_t *h)
1da177e4
LT		 3014{
3015 CommandList_struct *c;
7c832835 3016
e6e1ee93
JA		 3017 while (!list_empty(&h->reqQ)) {
3018 c = list_entry(h->reqQ.next, CommandList_struct, list);
1da177e4
LT		 3019 /* can't do anything if fifo is full */
3020 if ((h->access.fifo_full(h))) {
b2a4a43d 3021 dev_warn(&h->pdev->dev, "fifo full\n");
1da177e4
LT		 3022 break;
3023 }
3024
7c832835 3025 /* Get the first entry from the Request Q */
8a3173de 3026 removeQ(c);
1da177e4 3027 h->Qdepth--;
7c832835
BH		 3028
3029 /* Tell the controller execute command */
1da177e4 3030 h->access.submit_command(h, c);
7c832835
BH		 3031
3032 /* Put job onto the completed Q */
8a3173de 3033 addQ(&h->cmpQ, c);
1da177e4
LT		 3034 }
3035}
7c832835 3036
f70dba83 3037/* Assumes that h->lock is held. */
1da177e4
LT		 3038/* Zeros out the error record and then resends the command back */
3039/* to the controller */
7c832835 3040static inline void resend_cciss_cmd(ctlr_info_t *h, CommandList_struct *c)
1da177e4
LT		 3041{
3042 /* erase the old error information */
3043 memset(c->err_info, 0, sizeof(ErrorInfo_struct));
3044
3045 /* add it to software queue and then send it to the controller */
8a3173de 3046 addQ(&h->reqQ, c);
1da177e4 3047 h->Qdepth++;
7c832835 3048 if (h->Qdepth > h->maxQsinceinit)
1da177e4
LT		 3049 h->maxQsinceinit = h->Qdepth;
3050
3051 start_io(h);
3052}
a9925a06 3053
1a614f50
SC		 3054static inline unsigned int make_status_bytes(unsigned int scsi_status_byte,
3055 unsigned int msg_byte, unsigned int host_byte,
3056 unsigned int driver_byte)
3057{
3058 /* inverse of macros in scsi.h */
3059 return (scsi_status_byte & 0xff) |
3060 ((msg_byte & 0xff) << 8) |
3061 ((host_byte & 0xff) << 16) |
3062 ((driver_byte & 0xff) << 24);
3063}
3064
0a9279cc
MM		 3065static inline int evaluate_target_status(ctlr_info_t *h,
3066 CommandList_struct *cmd, int *retry_cmd)
03bbfee5
MMOD		 3067{
3068 unsigned char sense_key;
1a614f50
SC		 3069 unsigned char status_byte, msg_byte, host_byte, driver_byte;
3070 int error_value;
3071
0a9279cc 3072 *retry_cmd = 0;
1a614f50
SC		 3073 /* If we get in here, it means we got "target status", that is, scsi status */
3074 status_byte = cmd->err_info->ScsiStatus;
3075 driver_byte = DRIVER_OK;
3076 msg_byte = cmd->err_info->CommandStatus; /* correct? seems too device specific */
3077
33659ebb 3078 if (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC)
1a614f50
SC		 3079 host_byte = DID_PASSTHROUGH;
3080 else
3081 host_byte = DID_OK;
3082
3083 error_value = make_status_bytes(status_byte, msg_byte,
3084 host_byte, driver_byte);
03bbfee5 3085
1a614f50 3086 if (cmd->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) {
33659ebb 3087 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC)
b2a4a43d 3088 dev_warn(&h->pdev->dev, "cmd %p "
03bbfee5
MMOD		 3089 "has SCSI Status 0x%x\n",
3090 cmd, cmd->err_info->ScsiStatus);
1a614f50 3091 return error_value;
03bbfee5
MMOD		 3092 }
3093
3094 /* check the sense key */
3095 sense_key = 0xf & cmd->err_info->SenseInfo[2];
3096 /* no status or recovered error */
33659ebb
CH		 3097 if (((sense_key == 0x0) || (sense_key == 0x1)) &&
3098 (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC))
1a614f50 3099 error_value = 0;
03bbfee5 3100
0a9279cc 3101 if (check_for_unit_attention(h, cmd)) {
33659ebb 3102 *retry_cmd = !(cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC);
0a9279cc
MM		 3103 return 0;
3104 }
3105
33659ebb
CH		 3106 /* Not SG_IO or similar? */
3107 if (cmd->rq->cmd_type != REQ_TYPE_BLOCK_PC) {
1a614f50 3108 if (error_value != 0)
b2a4a43d 3109 dev_warn(&h->pdev->dev, "cmd %p has CHECK CONDITION"
03bbfee5 3110 " sense key = 0x%x\n", cmd, sense_key);
1a614f50 3111 return error_value;
03bbfee5
MMOD		 3112 }
3113
3114 /* SG_IO or similar, copy sense data back */
3115 if (cmd->rq->sense) {
3116 if (cmd->rq->sense_len > cmd->err_info->SenseLen)
3117 cmd->rq->sense_len = cmd->err_info->SenseLen;
3118 memcpy(cmd->rq->sense, cmd->err_info->SenseInfo,
3119 cmd->rq->sense_len);
3120 } else
3121 cmd->rq->sense_len = 0;
3122
1a614f50 3123 return error_value;
03bbfee5
MMOD		 3124}
3125
7c832835 3126/* checks the status of the job and calls complete buffers to mark all
a9925a06
JA		 3127 * buffers for the completed job. Note that this function does not need
3128 * to hold the hba/queue lock.
7c832835
BH		 3129 */
3130static inline void complete_command(ctlr_info_t *h, CommandList_struct *cmd,
3131 int timeout)
1da177e4 3132{
1da177e4 3133 int retry_cmd = 0;
198b7660
MMOD		 3134 struct request *rq = cmd->rq;
3135
3136 rq->errors = 0;
7c832835 3137
1da177e4 3138 if (timeout)
1a614f50 3139 rq->errors = make_status_bytes(0, 0, 0, DRIVER_TIMEOUT);
1da177e4 3140
d38ae168
MMOD		 3141 if (cmd->err_info->CommandStatus == 0) /* no error has occurred */
3142 goto after_error_processing;
7c832835 3143
d38ae168 3144 switch (cmd->err_info->CommandStatus) {
d38ae168 3145 case CMD_TARGET_STATUS:
0a9279cc 3146 rq->errors = evaluate_target_status(h, cmd, &retry_cmd);
d38ae168
MMOD		 3147 break;
3148 case CMD_DATA_UNDERRUN:
33659ebb 3149 if (cmd->rq->cmd_type == REQ_TYPE_FS) {
b2a4a43d 3150 dev_warn(&h->pdev->dev, "cmd %p has"
03bbfee5
MMOD		 3151 " completed with data underrun "
3152 "reported\n", cmd);
c3a4d78c 3153 cmd->rq->resid_len = cmd->err_info->ResidualCnt;
03bbfee5 3154 }
d38ae168
MMOD		 3155 break;
3156 case CMD_DATA_OVERRUN:
33659ebb 3157 if (cmd->rq->cmd_type == REQ_TYPE_FS)
b2a4a43d 3158 dev_warn(&h->pdev->dev, "cciss: cmd %p has"
03bbfee5
MMOD		 3159 " completed with data overrun "
3160 "reported\n", cmd);
d38ae168
MMOD		 3161 break;
3162 case CMD_INVALID:
b2a4a43d 3163 dev_warn(&h->pdev->dev, "cciss: cmd %p is "
d38ae168 3164 "reported invalid\n", cmd);
1a614f50
SC		 3165 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3166 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3167 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3168 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3169 break;
3170 case CMD_PROTOCOL_ERR:
b2a4a43d
SC		 3171 dev_warn(&h->pdev->dev, "cciss: cmd %p has "
3172 "protocol error\n", cmd);
1a614f50
SC		 3173 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3174 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3175 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3176 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3177 break;
3178 case CMD_HARDWARE_ERR:
b2a4a43d 3179 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3180 " hardware error\n", cmd);
1a614f50
SC		 3181 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3182 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3183 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3184 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3185 break;
3186 case CMD_CONNECTION_LOST:
b2a4a43d 3187 dev_warn(&h->pdev->dev, "cciss: cmd %p had "
d38ae168 3188 "connection lost\n", cmd);
1a614f50
SC		 3189 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3190 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3191 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3192 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3193 break;
3194 case CMD_ABORTED:
b2a4a43d 3195 dev_warn(&h->pdev->dev, "cciss: cmd %p was "
d38ae168 3196 "aborted\n", cmd);
1a614f50
SC		 3197 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3198 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3199 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3200 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3201 break;
3202 case CMD_ABORT_FAILED:
b2a4a43d 3203 dev_warn(&h->pdev->dev, "cciss: cmd %p reports "
d38ae168 3204 "abort failed\n", cmd);
1a614f50
SC		 3205 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3206 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3207 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3208 DID_PASSTHROUGH : DID_ERROR);
d38ae168
MMOD		 3209 break;
3210 case CMD_UNSOLICITED_ABORT:
b2a4a43d 3211 dev_warn(&h->pdev->dev, "cciss%d: unsolicited "
d38ae168
MMOD		 3212 "abort %p\n", h->ctlr, cmd);
3213 if (cmd->retry_count < MAX_CMD_RETRIES) {
3214 retry_cmd = 1;
b2a4a43d 3215 dev_warn(&h->pdev->dev, "retrying %p\n", cmd);
d38ae168
MMOD		 3216 cmd->retry_count++;
3217 } else
b2a4a43d
SC		 3218 dev_warn(&h->pdev->dev,
3219 "%p retried too many times\n", cmd);
1a614f50
SC		 3220 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3221 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3222 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3223 DID_PASSTHROUGH : DID_ABORT);
d38ae168
MMOD		 3224 break;
3225 case CMD_TIMEOUT:
b2a4a43d 3226 dev_warn(&h->pdev->dev, "cmd %p timedout\n", cmd);
1a614f50
SC		 3227 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3228 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3229 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3230 DID_PASSTHROUGH : DID_ERROR);
d38ae168 3231 break;
6d9a4f9e
SC		 3232 case CMD_UNABORTABLE:
3233 dev_warn(&h->pdev->dev, "cmd %p unabortable\n", cmd);
3234 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3235 cmd->err_info->CommandStatus, DRIVER_OK,
3236 cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC ?
3237 DID_PASSTHROUGH : DID_ERROR);
3238 break;
d38ae168 3239 default:
b2a4a43d 3240 dev_warn(&h->pdev->dev, "cmd %p returned "
d38ae168
MMOD		 3241 "unknown status %x\n", cmd,
3242 cmd->err_info->CommandStatus);
1a614f50
SC		 3243 rq->errors = make_status_bytes(SAM_STAT_GOOD,
3244 cmd->err_info->CommandStatus, DRIVER_OK,
33659ebb
CH		 3245 (cmd->rq->cmd_type == REQ_TYPE_BLOCK_PC) ?
3246 DID_PASSTHROUGH : DID_ERROR);
1da177e4 3247 }
d38ae168
MMOD		 3248
3249after_error_processing:
3250
1da177e4 3251 /* We need to return this command */
7c832835
BH		 3252 if (retry_cmd) {
3253 resend_cciss_cmd(h, cmd);
1da177e4 3254 return;
7c832835 3255 }
03bbfee5 3256 cmd->rq->completion_data = cmd;
a9925a06 3257 blk_complete_request(cmd->rq);
1da177e4
LT		 3258}
3259
0c2b3908
MM		 3260static inline u32 cciss_tag_contains_index(u32 tag)
3261{
5e216153 3262#define DIRECT_LOOKUP_BIT 0x10
0c2b3908
MM		 3263 return tag & DIRECT_LOOKUP_BIT;
3264}
3265
3266static inline u32 cciss_tag_to_index(u32 tag)
3267{
5e216153 3268#define DIRECT_LOOKUP_SHIFT 5
0c2b3908
MM		 3269 return tag >> DIRECT_LOOKUP_SHIFT;
3270}
3271
0498cc2a 3272static inline u32 cciss_tag_discard_error_bits(ctlr_info_t *h, u32 tag)
0c2b3908 3273{
0498cc2a
SC		 3274#define CCISS_PERF_ERROR_BITS ((1 << DIRECT_LOOKUP_SHIFT) - 1)
3275#define CCISS_SIMPLE_ERROR_BITS 0x03
3276 if (likely(h->transMethod & CFGTBL_Trans_Performant))
3277 return tag & ~CCISS_PERF_ERROR_BITS;
3278 return tag & ~CCISS_SIMPLE_ERROR_BITS;
0c2b3908
MM		 3279}
3280
3281static inline void cciss_mark_tag_indexed(u32 *tag)
3282{
3283 *tag |= DIRECT_LOOKUP_BIT;
3284}
3285
3286static inline void cciss_set_tag_index(u32 *tag, u32 index)
3287{
3288 *tag |= (index << DIRECT_LOOKUP_SHIFT);
3289}
3290
7c832835
BH		 3291/*
3292 * Get a request and submit it to the controller.
1da177e4 3293 */
165125e1 3294static void do_cciss_request(struct request_queue *q)
1da177e4 3295{
7c832835 3296 ctlr_info_t *h = q->queuedata;
1da177e4 3297 CommandList_struct *c;
00988a35
MMOD		 3298 sector_t start_blk;
3299 int seg;
1da177e4
LT		 3300 struct request *creq;
3301 u64bit temp64;
5c07a311
DB		 3302 struct scatterlist *tmp_sg;
3303 SGDescriptor_struct *curr_sg;
1da177e4
LT		 3304 drive_info_struct *drv;
3305 int i, dir;
5c07a311
DB		 3306 int sg_index = 0;
3307 int chained = 0;
1da177e4 3308
7c832835 3309 queue:
9934c8c0 3310 creq = blk_peek_request(q);
1da177e4
LT		 3311 if (!creq)
3312 goto startio;
3313
5c07a311 3314 BUG_ON(creq->nr_phys_segments > h->maxsgentries);
1da177e4 3315
6b4d96b8
SC		 3316 c = cmd_alloc(h);
3317 if (!c)
1da177e4
LT		 3318 goto full;
3319
9934c8c0 3320 blk_start_request(creq);
1da177e4 3321
5c07a311 3322 tmp_sg = h->scatter_list[c->cmdindex];
1da177e4
LT		 3323 spin_unlock_irq(q->queue_lock);
3324
3325 c->cmd_type = CMD_RWREQ;
3326 c->rq = creq;
7c832835
BH		 3327
3328 /* fill in the request */
1da177e4 3329 drv = creq->rq_disk->private_data;
b028461d 3330 c->Header.ReplyQueue = 0; /* unused in simple mode */
33079b21
MM		 3331 /* got command from pool, so use the command block index instead */
3332 /* for direct lookups. */
3333 /* The first 2 bits are reserved for controller error reporting. */
0c2b3908
MM		 3334 cciss_set_tag_index(&c->Header.Tag.lower, c->cmdindex);
3335 cciss_mark_tag_indexed(&c->Header.Tag.lower);
39ccf9a6 3336 memcpy(&c->Header.LUN, drv->LunID, sizeof(drv->LunID));
b028461d 3337 c->Request.CDBLen = 10; /* 12 byte commands not in FW yet; */
3338 c->Request.Type.Type = TYPE_CMD; /* It is a command. */
7c832835
BH		 3339 c->Request.Type.Attribute = ATTR_SIMPLE;
3340 c->Request.Type.Direction =
a52de245 3341 (rq_data_dir(creq) == READ) ? XFER_READ : XFER_WRITE;
b028461d 3342 c->Request.Timeout = 0; /* Don't time out */
7c832835 3343 c->Request.CDB[0] =
00988a35 3344 (rq_data_dir(creq) == READ) ? h->cciss_read : h->cciss_write;
83096ebf 3345 start_blk = blk_rq_pos(creq);
b2a4a43d 3346 dev_dbg(&h->pdev->dev, "sector =%d nr_sectors=%d\n",
83096ebf 3347 (int)blk_rq_pos(creq), (int)blk_rq_sectors(creq));
5c07a311 3348 sg_init_table(tmp_sg, h->maxsgentries);
1da177e4
LT		 3349 seg = blk_rq_map_sg(q, creq, tmp_sg);
3350
7c832835 3351 /* get the DMA records for the setup */
1da177e4
LT		 3352 if (c->Request.Type.Direction == XFER_READ)
3353 dir = PCI_DMA_FROMDEVICE;
3354 else
3355 dir = PCI_DMA_TODEVICE;
3356
5c07a311
DB		 3357 curr_sg = c->SG;
3358 sg_index = 0;
3359 chained = 0;
3360
7c832835 3361 for (i = 0; i < seg; i++) {
5c07a311
DB		 3362 if (((sg_index+1) == (h->max_cmd_sgentries)) &&
3363 !chained && ((seg - i) > 1)) {
5c07a311 3364 /* Point to next chain block. */
dccc9b56 3365 curr_sg = h->cmd_sg_list[c->cmdindex];
5c07a311
DB		 3366 sg_index = 0;
3367 chained = 1;
3368 }
3369 curr_sg[sg_index].Len = tmp_sg[i].length;
45711f1a 3370 temp64.val = (__u64) pci_map_page(h->pdev, sg_page(&tmp_sg[i]),
5c07a311
DB		 3371 tmp_sg[i].offset,
3372 tmp_sg[i].length, dir);
3373 curr_sg[sg_index].Addr.lower = temp64.val32.lower;
3374 curr_sg[sg_index].Addr.upper = temp64.val32.upper;
3375 curr_sg[sg_index].Ext = 0; /* we are not chaining */
5c07a311 3376 ++sg_index;
1da177e4 3377 }
d45033ef
SC		 3378 if (chained)
3379 cciss_map_sg_chain_block(h, c, h->cmd_sg_list[c->cmdindex],
3380 (seg - (h->max_cmd_sgentries - 1)) *
3381 sizeof(SGDescriptor_struct));
5c07a311 3382
7c832835
BH		 3383 /* track how many SG entries we are using */
3384 if (seg > h->maxSG)
3385 h->maxSG = seg;
1da177e4 3386
b2a4a43d 3387 dev_dbg(&h->pdev->dev, "Submitting %u sectors in %d segments "
5c07a311
DB		 3388 "chained[%d]\n",
3389 blk_rq_sectors(creq), seg, chained);
1da177e4 3390
5e216153
MM		 3391 c->Header.SGTotal = seg + chained;
3392 if (seg <= h->max_cmd_sgentries)
3393 c->Header.SGList = c->Header.SGTotal;
3394 else
5c07a311 3395 c->Header.SGList = h->max_cmd_sgentries;
5e216153 3396 set_performant_mode(h, c);
5c07a311 3397
33659ebb 3398 if (likely(creq->cmd_type == REQ_TYPE_FS)) {
03bbfee5
MMOD		 3399 if(h->cciss_read == CCISS_READ_10) {
3400 c->Request.CDB[1] = 0;
b028461d 3401 c->Request.CDB[2] = (start_blk >> 24) & 0xff; /* MSB */
03bbfee5
MMOD		 3402 c->Request.CDB[3] = (start_blk >> 16) & 0xff;
3403 c->Request.CDB[4] = (start_blk >> 8) & 0xff;
3404 c->Request.CDB[5] = start_blk & 0xff;
b028461d 3405 c->Request.CDB[6] = 0; /* (sect >> 24) & 0xff; MSB */
83096ebf
TH		 3406 c->Request.CDB[7] = (blk_rq_sectors(creq) >> 8) & 0xff;
3407 c->Request.CDB[8] = blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3408 c->Request.CDB[9] = c->Request.CDB[11] = c->Request.CDB[12] = 0;
3409 } else {
582539e5
RD		 3410 u32 upper32 = upper_32_bits(start_blk);
3411
03bbfee5
MMOD		 3412 c->Request.CDBLen = 16;
3413 c->Request.CDB[1]= 0;
b028461d 3414 c->Request.CDB[2]= (upper32 >> 24) & 0xff; /* MSB */
582539e5
RD		 3415 c->Request.CDB[3]= (upper32 >> 16) & 0xff;
3416 c->Request.CDB[4]= (upper32 >> 8) & 0xff;
3417 c->Request.CDB[5]= upper32 & 0xff;
03bbfee5
MMOD		 3418 c->Request.CDB[6]= (start_blk >> 24) & 0xff;
3419 c->Request.CDB[7]= (start_blk >> 16) & 0xff;
3420 c->Request.CDB[8]= (start_blk >> 8) & 0xff;
3421 c->Request.CDB[9]= start_blk & 0xff;
83096ebf
TH		 3422 c->Request.CDB[10]= (blk_rq_sectors(creq) >> 24) & 0xff;
3423 c->Request.CDB[11]= (blk_rq_sectors(creq) >> 16) & 0xff;
3424 c->Request.CDB[12]= (blk_rq_sectors(creq) >> 8) & 0xff;
3425 c->Request.CDB[13]= blk_rq_sectors(creq) & 0xff;
03bbfee5
MMOD		 3426 c->Request.CDB[14] = c->Request.CDB[15] = 0;
3427 }
33659ebb 3428 } else if (creq->cmd_type == REQ_TYPE_BLOCK_PC) {
03bbfee5
MMOD		 3429 c->Request.CDBLen = creq->cmd_len;
3430 memcpy(c->Request.CDB, creq->cmd, BLK_MAX_CDB);
00988a35 3431 } else {
b2a4a43d
SC		 3432 dev_warn(&h->pdev->dev, "bad request type %d\n",
3433 creq->cmd_type);
03bbfee5 3434 BUG();
00988a35 3435 }
1da177e4
LT		 3436
3437 spin_lock_irq(q->queue_lock);
3438
8a3173de 3439 addQ(&h->reqQ, c);
1da177e4 3440 h->Qdepth++;
7c832835
BH		 3441 if (h->Qdepth > h->maxQsinceinit)
3442 h->maxQsinceinit = h->Qdepth;
1da177e4
LT		 3443
3444 goto queue;
00988a35 3445full:
1da177e4 3446 blk_stop_queue(q);
00988a35 3447startio:
1da177e4
LT		 3448 /* We will already have the driver lock here so not need
3449 * to lock it.
7c832835 3450 */
1da177e4
LT		 3451 start_io(h);
3452}
3453
3da8b713 3454static inline unsigned long get_next_completion(ctlr_info_t *h)
3455{
3da8b713 3456 return h->access.command_completed(h);
3da8b713 3457}
3458
3459static inline int interrupt_pending(ctlr_info_t *h)
3460{
3da8b713 3461 return h->access.intr_pending(h);
3da8b713 3462}
3463
3464static inline long interrupt_not_for_us(ctlr_info_t *h)
3465{
81125860 3466 return ((h->access.intr_pending(h) == 0) ||
2cf3af1c 3467 (h->interrupts_enabled == 0));
3da8b713 3468}
3469
0c2b3908
MM		 3470static inline int bad_tag(ctlr_info_t *h, u32 tag_index,
3471 u32 raw_tag)
1da177e4 3472{
0c2b3908
MM		 3473 if (unlikely(tag_index >= h->nr_cmds)) {
3474 dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag);
3475 return 1;
3476 }
3477 return 0;
3478}
3479
3480static inline void finish_cmd(ctlr_info_t *h, CommandList_struct *c,
3481 u32 raw_tag)
3482{
3483 removeQ(c);
3484 if (likely(c->cmd_type == CMD_RWREQ))
3485 complete_command(h, c, 0);
3486 else if (c->cmd_type == CMD_IOCTL_PEND)
3487 complete(c->waiting);
3488#ifdef CONFIG_CISS_SCSI_TAPE
3489 else if (c->cmd_type == CMD_SCSI)
3490 complete_scsi_command(c, 0, raw_tag);
3491#endif
3492}
3493
29979a71
MM		 3494static inline u32 next_command(ctlr_info_t *h)
3495{
3496 u32 a;
3497
0498cc2a 3498 if (unlikely(!(h->transMethod & CFGTBL_Trans_Performant)))
29979a71
MM		 3499 return h->access.command_completed(h);
3500
3501 if ((*(h->reply_pool_head) & 1) == (h->reply_pool_wraparound)) {
3502 a = *(h->reply_pool_head); /* Next cmd in ring buffer */
3503 (h->reply_pool_head)++;
3504 h->commands_outstanding--;
3505 } else {
3506 a = FIFO_EMPTY;
3507 }
3508 /* Check for wraparound */
3509 if (h->reply_pool_head == (h->reply_pool + h->max_commands)) {
3510 h->reply_pool_head = h->reply_pool;
3511 h->reply_pool_wraparound ^= 1;
3512 }
3513 return a;
3514}
3515
0c2b3908
MM		 3516/* process completion of an indexed ("direct lookup") command */
3517static inline u32 process_indexed_cmd(ctlr_info_t *h, u32 raw_tag)
3518{
3519 u32 tag_index;
1da177e4 3520 CommandList_struct *c;
0c2b3908
MM		 3521
3522 tag_index = cciss_tag_to_index(raw_tag);
3523 if (bad_tag(h, tag_index, raw_tag))
5e216153 3524 return next_command(h);
0c2b3908
MM		 3525 c = h->cmd_pool + tag_index;
3526 finish_cmd(h, c, raw_tag);
5e216153 3527 return next_command(h);
0c2b3908
MM		 3528}
3529
3530/* process completion of a non-indexed command */
3531static inline u32 process_nonindexed_cmd(ctlr_info_t *h, u32 raw_tag)
3532{
0c2b3908 3533 CommandList_struct *c = NULL;
0c2b3908
MM		 3534 __u32 busaddr_masked, tag_masked;
3535
0498cc2a 3536 tag_masked = cciss_tag_discard_error_bits(h, raw_tag);
e6e1ee93 3537 list_for_each_entry(c, &h->cmpQ, list) {
0498cc2a 3538 busaddr_masked = cciss_tag_discard_error_bits(h, c->busaddr);
0c2b3908
MM		 3539 if (busaddr_masked == tag_masked) {
3540 finish_cmd(h, c, raw_tag);
5e216153 3541 return next_command(h);
0c2b3908
MM		 3542 }
3543 }
3544 bad_tag(h, h->nr_cmds + 1, raw_tag);
5e216153 3545 return next_command(h);
0c2b3908
MM		 3546}
3547
5afe2781
SC		 3548/* Some controllers, like p400, will give us one interrupt
3549 * after a soft reset, even if we turned interrupts off.
3550 * Only need to check for this in the cciss_xxx_discard_completions
3551 * functions.
3552 */
3553static int ignore_bogus_interrupt(ctlr_info_t *h)
3554{
3555 if (likely(!reset_devices))
3556 return 0;
3557
3558 if (likely(h->interrupts_enabled))
3559 return 0;
3560
3561 dev_info(&h->pdev->dev, "Received interrupt while interrupts disabled "
3562 "(known firmware bug.) Ignoring.\n");
3563
3564 return 1;
3565}
3566
3567static irqreturn_t cciss_intx_discard_completions(int irq, void *dev_id)
3568{
3569 ctlr_info_t *h = dev_id;
3570 unsigned long flags;
3571 u32 raw_tag;
3572
3573 if (ignore_bogus_interrupt(h))
3574 return IRQ_NONE;
3575
3576 if (interrupt_not_for_us(h))
3577 return IRQ_NONE;
3578 spin_lock_irqsave(&h->lock, flags);
3579 while (interrupt_pending(h)) {
3580 raw_tag = get_next_completion(h);
3581 while (raw_tag != FIFO_EMPTY)
3582 raw_tag = next_command(h);
3583 }
3584 spin_unlock_irqrestore(&h->lock, flags);
3585 return IRQ_HANDLED;
3586}
3587
3588static irqreturn_t cciss_msix_discard_completions(int irq, void *dev_id)
3589{
3590 ctlr_info_t *h = dev_id;
3591 unsigned long flags;
3592 u32 raw_tag;
3593
3594 if (ignore_bogus_interrupt(h))
3595 return IRQ_NONE;
3596
3597 spin_lock_irqsave(&h->lock, flags);
3598 raw_tag = get_next_completion(h);
3599 while (raw_tag != FIFO_EMPTY)
3600 raw_tag = next_command(h);
3601 spin_unlock_irqrestore(&h->lock, flags);
3602 return IRQ_HANDLED;
3603}
3604
0c2b3908
MM		 3605static irqreturn_t do_cciss_intx(int irq, void *dev_id)
3606{
3607 ctlr_info_t *h = dev_id;
1da177e4 3608 unsigned long flags;
0c2b3908 3609 u32 raw_tag;
1da177e4 3610
3da8b713 3611 if (interrupt_not_for_us(h))
1da177e4 3612 return IRQ_NONE;
f70dba83 3613 spin_lock_irqsave(&h->lock, flags);
3da8b713 3614 while (interrupt_pending(h)) {
0c2b3908
MM		 3615 raw_tag = get_next_completion(h);
3616 while (raw_tag != FIFO_EMPTY) {
3617 if (cciss_tag_contains_index(raw_tag))
3618 raw_tag = process_indexed_cmd(h, raw_tag);
3619 else
3620 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4
LT		 3621 }
3622 }
f70dba83 3623 spin_unlock_irqrestore(&h->lock, flags);
0c2b3908
MM		 3624 return IRQ_HANDLED;
3625}
1da177e4 3626
0c2b3908
MM		 3627/* Add a second interrupt handler for MSI/MSI-X mode. In this mode we never
3628 * check the interrupt pending register because it is not set.
3629 */
3630static irqreturn_t do_cciss_msix_intr(int irq, void *dev_id)
3631{
3632 ctlr_info_t *h = dev_id;
3633 unsigned long flags;
3634 u32 raw_tag;
8a3173de 3635
f70dba83 3636 spin_lock_irqsave(&h->lock, flags);
0c2b3908
MM		 3637 raw_tag = get_next_completion(h);
3638 while (raw_tag != FIFO_EMPTY) {
3639 if (cciss_tag_contains_index(raw_tag))
3640 raw_tag = process_indexed_cmd(h, raw_tag);
3641 else
3642 raw_tag = process_nonindexed_cmd(h, raw_tag);
1da177e4 3643 }
f70dba83 3644 spin_unlock_irqrestore(&h->lock, flags);
1da177e4
LT		 3645 return IRQ_HANDLED;
3646}
7c832835 3647
b368c9dd
AP		 3648/**
3649 * add_to_scan_list() - add controller to rescan queue
3650 * @h: Pointer to the controller.
3651 *
3652 * Adds the controller to the rescan queue if not already on the queue.
3653 *
3654 * returns 1 if added to the queue, 0 if skipped (could be on the
3655 * queue already, or the controller could be initializing or shutting
3656 * down).
3657 **/
3658static int add_to_scan_list(struct ctlr_info *h)
3659{
3660 struct ctlr_info *test_h;
3661 int found = 0;
3662 int ret = 0;
3663
3664 if (h->busy_initializing)
3665 return 0;
3666
3667 if (!mutex_trylock(&h->busy_shutting_down))
3668 return 0;
3669
3670 mutex_lock(&scan_mutex);
3671 list_for_each_entry(test_h, &scan_q, scan_list) {
3672 if (test_h == h) {
3673 found = 1;
3674 break;
3675 }
3676 }
3677 if (!found && !h->busy_scanning) {
16735d02 3678 reinit_completion(&h->scan_wait);
b368c9dd
AP		 3679 list_add_tail(&h->scan_list, &scan_q);
3680 ret = 1;
3681 }
3682 mutex_unlock(&scan_mutex);
3683 mutex_unlock(&h->busy_shutting_down);
3684
3685 return ret;
3686}
3687
3688/**
3689 * remove_from_scan_list() - remove controller from rescan queue
3690 * @h: Pointer to the controller.
3691 *
3692 * Removes the controller from the rescan queue if present. Blocks if
fd8489cf
SC		 3693 * the controller is currently conducting a rescan. The controller
3694 * can be in one of three states:
3695 * 1. Doesn't need a scan
3696 * 2. On the scan list, but not scanning yet (we remove it)
3697 * 3. Busy scanning (and not on the list). In this case we want to wait for
3698 * the scan to complete to make sure the scanning thread for this
3699 * controller is completely idle.
b368c9dd
AP		 3700 **/
3701static void remove_from_scan_list(struct ctlr_info *h)
3702{
3703 struct ctlr_info *test_h, *tmp_h;
b368c9dd
AP		 3704
3705 mutex_lock(&scan_mutex);
3706 list_for_each_entry_safe(test_h, tmp_h, &scan_q, scan_list) {
fd8489cf 3707 if (test_h == h) { /* state 2. */
b368c9dd
AP		 3708 list_del(&h->scan_list);
3709 complete_all(&h->scan_wait);
3710 mutex_unlock(&scan_mutex);
3711 return;
3712 }
3713 }
fd8489cf
SC		 3714 if (h->busy_scanning) { /* state 3. */
3715 mutex_unlock(&scan_mutex);
b368c9dd 3716 wait_for_completion(&h->scan_wait);
fd8489cf
SC		 3717 } else { /* state 1, nothing to do. */
3718 mutex_unlock(&scan_mutex);
3719 }
b368c9dd
AP		 3720}
3721
3722/**
3723 * scan_thread() - kernel thread used to rescan controllers
3724 * @data: Ignored.
3725 *
3726 * A kernel thread used scan for drive topology changes on
3727 * controllers. The thread processes only one controller at a time
3728 * using a queue. Controllers are added to the queue using
3729 * add_to_scan_list() and removed from the queue either after done
3730 * processing or using remove_from_scan_list().
3731 *
3732 * returns 0.
3733 **/
0a9279cc
MM		 3734static int scan_thread(void *data)
3735{
b368c9dd 3736 struct ctlr_info *h;
0a9279cc 3737
b368c9dd
AP		 3738 while (1) {
3739 set_current_state(TASK_INTERRUPTIBLE);
3740 schedule();
0a9279cc
MM		 3741 if (kthread_should_stop())
3742 break;
b368c9dd
AP		 3743
3744 while (1) {
3745 mutex_lock(&scan_mutex);
3746 if (list_empty(&scan_q)) {
3747 mutex_unlock(&scan_mutex);
3748 break;
3749 }
3750
3751 h = list_entry(scan_q.next,
3752 struct ctlr_info,
3753 scan_list);
3754 list_del(&h->scan_list);
3755 h->busy_scanning = 1;
3756 mutex_unlock(&scan_mutex);
3757
d06dfbd2
SC		 3758 rebuild_lun_table(h, 0, 0);
3759 complete_all(&h->scan_wait);
3760 mutex_lock(&scan_mutex);
3761 h->busy_scanning = 0;
3762 mutex_unlock(&scan_mutex);
b368c9dd 3763 }
0a9279cc 3764 }
b368c9dd 3765
0a9279cc
MM		 3766 return 0;
3767}
3768
3769static int check_for_unit_attention(ctlr_info_t *h, CommandList_struct *c)
3770{
3771 if (c->err_info->SenseInfo[2] != UNIT_ATTENTION)
3772 return 0;
3773
3774 switch (c->err_info->SenseInfo[12]) {
3775 case STATE_CHANGED:
b2a4a43d
SC		 3776 dev_warn(&h->pdev->dev, "a state change "
3777 "detected, command retried\n");
0a9279cc
MM		 3778 return 1;
3779 break;
3780 case LUN_FAILED:
b2a4a43d
SC		 3781 dev_warn(&h->pdev->dev, "LUN failure "
3782 "detected, action required\n");
0a9279cc
MM		 3783 return 1;
3784 break;
3785 case REPORT_LUNS_CHANGED:
b2a4a43d 3786 dev_warn(&h->pdev->dev, "report LUN data changed\n");
da002184
SC		 3787 /*
3788 * Here, we could call add_to_scan_list and wake up the scan thread,
3789 * except that it's quite likely that we will get more than one
3790 * REPORT_LUNS_CHANGED condition in quick succession, which means
3791 * that those which occur after the first one will likely happen
3792 * *during* the scan_thread's rescan. And the rescan code is not
3793 * robust enough to restart in the middle, undoing what it has already
3794 * done, and it's not clear that it's even possible to do this, since
3795 * part of what it does is notify the block layer, which starts
3796 * doing it's own i/o to read partition tables and so on, and the
3797 * driver doesn't have visibility to know what might need undoing.
3798 * In any event, if possible, it is horribly complicated to get right
3799 * so we just don't do it for now.
3800 *
3801 * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012.
3802 */
0a9279cc
MM		 3803 return 1;
3804 break;
3805 case POWER_OR_RESET:
b2a4a43d
SC		 3806 dev_warn(&h->pdev->dev,
3807 "a power on or device reset detected\n");
0a9279cc
MM		 3808 return 1;
3809 break;
3810 case UNIT_ATTENTION_CLEARED:
b2a4a43d
SC		 3811 dev_warn(&h->pdev->dev,
3812 "unit attention cleared by another initiator\n");
0a9279cc
MM		 3813 return 1;
3814 break;
3815 default:
b2a4a43d
SC		 3816 dev_warn(&h->pdev->dev, "unknown unit attention detected\n");
3817 return 1;
0a9279cc
MM		 3818 }
3819}
3820
7c832835 3821/*
d14c4ab5 3822 * We cannot read the structure directly, for portability we must use
1da177e4 3823 * the io functions.
7c832835 3824 * This is for debug only.
1da177e4 3825 */
b2a4a43d 3826static void print_cfg_table(ctlr_info_t *h)
1da177e4
LT		 3827{
3828 int i;
3829 char temp_name[17];
b2a4a43d 3830 CfgTable_struct *tb = h->cfgtable;
1da177e4 3831
b2a4a43d
SC		 3832 dev_dbg(&h->pdev->dev, "Controller Configuration information\n");
3833 dev_dbg(&h->pdev->dev, "------------------------------------\n");
7c832835 3834 for (i = 0; i < 4; i++)
1da177e4 3835 temp_name[i] = readb(&(tb->Signature[i]));
7c832835 3836 temp_name[4] = '\0';
b2a4a43d
SC		 3837 dev_dbg(&h->pdev->dev, " Signature = %s\n", temp_name);
3838 dev_dbg(&h->pdev->dev, " Spec Number = %d\n",
3839 readl(&(tb->SpecValence)));
3840 dev_dbg(&h->pdev->dev, " Transport methods supported = 0x%x\n",
7c832835 3841 readl(&(tb->TransportSupport)));
b2a4a43d 3842 dev_dbg(&h->pdev->dev, " Transport methods active = 0x%x\n",
7c832835 3843 readl(&(tb->TransportActive)));
b2a4a43d 3844 dev_dbg(&h->pdev->dev, " Requested transport Method = 0x%x\n",
7c832835 3845 readl(&(tb->HostWrite.TransportRequest)));
b2a4a43d 3846 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Delay = 0x%x\n",
7c832835 3847 readl(&(tb->HostWrite.CoalIntDelay)));
b2a4a43d 3848 dev_dbg(&h->pdev->dev, " Coalesce Interrupt Count = 0x%x\n",
7c832835 3849 readl(&(tb->HostWrite.CoalIntCount)));
a8036dfb 3850 dev_dbg(&h->pdev->dev, " Max outstanding commands = 0x%x\n",
7c832835 3851 readl(&(tb->CmdsOutMax)));
b2a4a43d
SC		 3852 dev_dbg(&h->pdev->dev, " Bus Types = 0x%x\n",
3853 readl(&(tb->BusTypes)));
7c832835 3854 for (i = 0; i < 16; i++)
1da177e4
LT		 3855 temp_name[i] = readb(&(tb->ServerName[i]));
3856 temp_name[16] = '\0';
b2a4a43d
SC		 3857 dev_dbg(&h->pdev->dev, " Server Name = %s\n", temp_name);
3858 dev_dbg(&h->pdev->dev, " Heartbeat Counter = 0x%x\n\n\n",
3859 readl(&(tb->HeartBeat)));
1da177e4 3860}
1da177e4 3861
7c832835 3862static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr)
1da177e4
LT		 3863{
3864 int i, offset, mem_type, bar_type;
7c832835 3865 if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */
1da177e4
LT		 3866 return 0;
3867 offset = 0;
7c832835
BH		 3868 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
3869 bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE;
1da177e4
LT		 3870 if (bar_type == PCI_BASE_ADDRESS_SPACE_IO)
3871 offset += 4;
3872 else {
3873 mem_type = pci_resource_flags(pdev, i) &
7c832835 3874 PCI_BASE_ADDRESS_MEM_TYPE_MASK;
1da177e4 3875 switch (mem_type) {
7c832835
BH		 3876 case PCI_BASE_ADDRESS_MEM_TYPE_32:
3877 case PCI_BASE_ADDRESS_MEM_TYPE_1M:
3878 offset += 4; /* 32 bit */
3879 break;
3880 case PCI_BASE_ADDRESS_MEM_TYPE_64:
3881 offset += 8;
3882 break;
3883 default: /* reserved in PCI 2.2 */
b2a4a43d 3884 dev_warn(&pdev->dev,
7c832835
BH		 3885 "Base address is invalid\n");
3886 return -1;
1da177e4
LT		 3887 break;
3888 }
3889 }
7c832835
BH		 3890 if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0)
3891 return i + 1;
1da177e4
LT		 3892 }
3893 return -1;
3894}
3895
5e216153
MM		 3896/* Fill in bucket_map[], given nsgs (the max number of
3897 * scatter gather elements supported) and bucket[],
3898 * which is an array of 8 integers. The bucket[] array
3899 * contains 8 different DMA transfer sizes (in 16
3900 * byte increments) which the controller uses to fetch
3901 * commands. This function fills in bucket_map[], which
3902 * maps a given number of scatter gather elements to one of
3903 * the 8 DMA transfer sizes. The point of it is to allow the
3904 * controller to only do as much DMA as needed to fetch the
3905 * command, with the DMA transfer size encoded in the lower
3906 * bits of the command address.
3907 */
3908static void calc_bucket_map(int bucket[], int num_buckets,
3909 int nsgs, int *bucket_map)
3910{
3911 int i, j, b, size;
3912
3913 /* even a command with 0 SGs requires 4 blocks */
3914#define MINIMUM_TRANSFER_BLOCKS 4
3915#define NUM_BUCKETS 8
3916 /* Note, bucket_map must have nsgs+1 entries. */
3917 for (i = 0; i <= nsgs; i++) {
3918 /* Compute size of a command with i SG entries */
3919 size = i + MINIMUM_TRANSFER_BLOCKS;
3920 b = num_buckets; /* Assume the biggest bucket */
3921 /* Find the bucket that is just big enough */
3922 for (j = 0; j < 8; j++) {
3923 if (bucket[j] >= size) {
3924 b = j;
3925 break;
3926 }
3927 }
3928 /* for a command with i SG entries, use bucket b. */
3929 bucket_map[i] = b;
3930 }
3931}
3932
8d85fce7 3933static void cciss_wait_for_mode_change_ack(ctlr_info_t *h)
0f8a6a1e
SC		 3934{
3935 int i;
3936
3937 /* under certain very rare conditions, this can take awhile.
3938 * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right
3939 * as we enter this code.) */
3940 for (i = 0; i < MAX_CONFIG_WAIT; i++) {
3941 if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq))
3942 break;
332c2f80 3943 usleep_range(10000, 20000);
0f8a6a1e
SC		 3944 }
3945}
3946
8d85fce7 3947static void cciss_enter_performant_mode(ctlr_info_t *h, u32 use_short_tags)
b9933135
SC		 3948{
3949 /* This is a bit complicated. There are 8 registers on
3950 * the controller which we write to to tell it 8 different
3951 * sizes of commands which there may be. It's a way of
3952 * reducing the DMA done to fetch each command. Encoded into
3953 * each command's tag are 3 bits which communicate to the controller
3954 * which of the eight sizes that command fits within. The size of
3955 * each command depends on how many scatter gather entries there are.
3956 * Each SG entry requires 16 bytes. The eight registers are programmed
3957 * with the number of 16-byte blocks a command of that size requires.
3958 * The smallest command possible requires 5 such 16 byte blocks.
3959 * the largest command possible requires MAXSGENTRIES + 4 16-byte
3960 * blocks. Note, this only extends to the SG entries contained
3961 * within the command block, and does not extend to chained blocks
3962 * of SG elements. bft[] contains the eight values we write to
3963 * the registers. They are not evenly distributed, but have more
3964 * sizes for small commands, and fewer sizes for larger commands.
3965 */
5e216153 3966 __u32 trans_offset;
b9933135 3967 int bft[8] = { 5, 6, 8, 10, 12, 20, 28, MAXSGENTRIES + 4};
5e216153
MM		 3968 /*
3969 * 5 = 1 s/g entry or 4k
3970 * 6 = 2 s/g entry or 8k
3971 * 8 = 4 s/g entry or 16k
3972 * 10 = 6 s/g entry or 24k
3973 */
5e216153 3974 unsigned long register_value;
5e216153
MM		 3975 BUILD_BUG_ON(28 > MAXSGENTRIES + 4);
3976
5e216153
MM		 3977 h->reply_pool_wraparound = 1; /* spec: init to 1 */
3978
3979 /* Controller spec: zero out this buffer. */
3980 memset(h->reply_pool, 0, h->max_commands * sizeof(__u64));
3981 h->reply_pool_head = h->reply_pool;
3982
3983 trans_offset = readl(&(h->cfgtable->TransMethodOffset));
3984 calc_bucket_map(bft, ARRAY_SIZE(bft), h->maxsgentries,
3985 h->blockFetchTable);
3986 writel(bft[0], &h->transtable->BlockFetch0);
3987 writel(bft[1], &h->transtable->BlockFetch1);
3988 writel(bft[2], &h->transtable->BlockFetch2);
3989 writel(bft[3], &h->transtable->BlockFetch3);
3990 writel(bft[4], &h->transtable->BlockFetch4);
3991 writel(bft[5], &h->transtable->BlockFetch5);
3992 writel(bft[6], &h->transtable->BlockFetch6);
3993 writel(bft[7], &h->transtable->BlockFetch7);
3994
3995 /* size of controller ring buffer */
3996 writel(h->max_commands, &h->transtable->RepQSize);
3997 writel(1, &h->transtable->RepQCount);
3998 writel(0, &h->transtable->RepQCtrAddrLow32);
3999 writel(0, &h->transtable->RepQCtrAddrHigh32);
4000 writel(h->reply_pool_dhandle, &h->transtable->RepQAddr0Low32);
4001 writel(0, &h->transtable->RepQAddr0High32);
0498cc2a 4002 writel(CFGTBL_Trans_Performant | use_short_tags,
5e216153
MM		 4003 &(h->cfgtable->HostWrite.TransportRequest));
4004
5e216153 4005 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
0f8a6a1e 4006 cciss_wait_for_mode_change_ack(h);
5e216153 4007 register_value = readl(&(h->cfgtable->TransportActive));
b9933135 4008 if (!(register_value & CFGTBL_Trans_Performant))
b2a4a43d 4009 dev_warn(&h->pdev->dev, "cciss: unable to get board into"
5e216153 4010 " performant mode\n");
b9933135
SC		 4011}
4012
8d85fce7 4013static void cciss_put_controller_into_performant_mode(ctlr_info_t *h)
b9933135
SC		 4014{
4015 __u32 trans_support;
4016
13049537
JH		 4017 if (cciss_simple_mode)
4018 return;
4019
b9933135
SC		 4020 dev_dbg(&h->pdev->dev, "Trying to put board into Performant mode\n");
4021 /* Attempt to put controller into performant mode if supported */
4022 /* Does board support performant mode? */
4023 trans_support = readl(&(h->cfgtable->TransportSupport));
4024 if (!(trans_support & PERFORMANT_MODE))
4025 return;
4026
b2a4a43d 4027 dev_dbg(&h->pdev->dev, "Placing controller into performant mode\n");
b9933135
SC		 4028 /* Performant mode demands commands on a 32 byte boundary
4029 * pci_alloc_consistent aligns on page boundarys already.
4030 * Just need to check if divisible by 32
4031 */
4032 if ((sizeof(CommandList_struct) % 32) != 0) {
b2a4a43d 4033 dev_warn(&h->pdev->dev, "%s %d %s\n",
b9933135
SC		 4034 "cciss info: command size[",
4035 (int)sizeof(CommandList_struct),
4036 "] not divisible by 32, no performant mode..\n");
5e216153
MM		 4037 return;
4038 }
4039
b9933135
SC		 4040 /* Performant mode ring buffer and supporting data structures */
4041 h->reply_pool = (__u64 *)pci_alloc_consistent(
4042 h->pdev, h->max_commands * sizeof(__u64),
4043 &(h->reply_pool_dhandle));
4044
4045 /* Need a block fetch table for performant mode */
4046 h->blockFetchTable = kmalloc(((h->maxsgentries+1) *
4047 sizeof(__u32)), GFP_KERNEL);
4048
4049 if ((h->reply_pool == NULL) || (h->blockFetchTable == NULL))
4050 goto clean_up;
4051
0498cc2a
SC		 4052 cciss_enter_performant_mode(h,
4053 trans_support & CFGTBL_Trans_use_short_tags);
b9933135 4054
5e216153
MM		 4055 /* Change the access methods to the performant access methods */
4056 h->access = SA5_performant_access;
b9933135 4057 h->transMethod = CFGTBL_Trans_Performant;
5e216153
MM		 4058
4059 return;
4060clean_up:
4061 kfree(h->blockFetchTable);
4062 if (h->reply_pool)
4063 pci_free_consistent(h->pdev,
4064 h->max_commands * sizeof(__u64),
4065 h->reply_pool,
4066 h->reply_pool_dhandle);
4067 return;
4068
4069} /* cciss_put_controller_into_performant_mode */
4070
fb86a35b
MM		 4071/* If MSI/MSI-X is supported by the kernel we will try to enable it on
4072 * controllers that are capable. If not, we use IO-APIC mode.
4073 */
4074
8d85fce7 4075static void cciss_interrupt_mode(ctlr_info_t *h)
fb86a35b
MM		 4076{
4077#ifdef CONFIG_PCI_MSI
7c832835
BH		 4078 int err;
4079 struct msix_entry cciss_msix_entries[4] = { {0, 0}, {0, 1},
4080 {0, 2}, {0, 3}
4081 };
fb86a35b
MM		 4082
4083 /* Some boards advertise MSI but don't really support it */
f70dba83
SC		 4084 if ((h->board_id == 0x40700E11) || (h->board_id == 0x40800E11) ||
4085 (h->board_id == 0x40820E11) || (h->board_id == 0x40830E11))
fb86a35b
MM		 4086 goto default_int_mode;
4087
f70dba83 4088 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSIX)) {
24cddb83 4089 err = pci_enable_msix_exact(h->pdev, cciss_msix_entries, 4);
7c832835 4090 if (!err) {
f70dba83
SC		 4091 h->intr[0] = cciss_msix_entries[0].vector;
4092 h->intr[1] = cciss_msix_entries[1].vector;
4093 h->intr[2] = cciss_msix_entries[2].vector;
4094 h->intr[3] = cciss_msix_entries[3].vector;
4095 h->msix_vector = 1;
7c832835 4096 return;
7c832835 4097 } else {
b2a4a43d
SC		 4098 dev_warn(&h->pdev->dev,
4099 "MSI-X init failed %d\n", err);
7c832835
BH		 4100 }
4101 }
f70dba83
SC		 4102 if (pci_find_capability(h->pdev, PCI_CAP_ID_MSI)) {
4103 if (!pci_enable_msi(h->pdev))
4104 h->msi_vector = 1;
4105 else
b2a4a43d 4106 dev_warn(&h->pdev->dev, "MSI init failed\n");
7c832835 4107 }
1ecb9c0f 4108default_int_mode:
7c832835 4109#endif /* CONFIG_PCI_MSI */
fb86a35b 4110 /* if we get here we're going to use the default interrupt mode */
13049537 4111 h->intr[h->intr_mode] = h->pdev->irq;
fb86a35b
MM		 4112 return;
4113}
4114
8d85fce7 4115static int cciss_lookup_board_id(struct pci_dev *pdev, u32 *board_id)
1da177e4 4116{
6539fa9b
SC		 4117 int i;
4118 u32 subsystem_vendor_id, subsystem_device_id;
2ec24ff1
SC		 4119
4120 subsystem_vendor_id = pdev->subsystem_vendor;
4121 subsystem_device_id = pdev->subsystem_device;
6539fa9b
SC		 4122 *board_id = ((subsystem_device_id << 16) & 0xffff0000) |
4123 subsystem_vendor_id;
2ec24ff1 4124
e4292e05
MM		 4125 for (i = 0; i < ARRAY_SIZE(products); i++) {
4126 /* Stand aside for hpsa driver on request */
4127 if (cciss_allow_hpsa)
4128 return -ENODEV;
6539fa9b
SC		 4129 if (*board_id == products[i].board_id)
4130 return i;
e4292e05 4131 }
6539fa9b
SC		 4132 dev_warn(&pdev->dev, "unrecognized board ID: 0x%08x, ignoring.\n",
4133 *board_id);
4134 return -ENODEV;
4135}
1da177e4 4136
dd9c426e
SC		 4137static inline bool cciss_board_disabled(ctlr_info_t *h)
4138{
4139 u16 command;
1da177e4 4140
dd9c426e
SC		 4141 (void) pci_read_config_word(h->pdev, PCI_COMMAND, &command);
4142 return ((command & PCI_COMMAND_MEMORY) == 0);
4143}
1da177e4 4144
8d85fce7
GKH		 4145static int cciss_pci_find_memory_BAR(struct pci_dev *pdev,
4146 unsigned long *memory_bar)
d474830d
SC		 4147{
4148 int i;
4e570309 4149
d474830d
SC		 4150 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++)
4151 if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) {
4152 /* addressing mode bits already removed */
4153 *memory_bar = pci_resource_start(pdev, i);
4154 dev_dbg(&pdev->dev, "memory BAR = %lx\n",
4155 *memory_bar);
4156 return 0;
4157 }
4158 dev_warn(&pdev->dev, "no memory BAR found\n");
4159 return -ENODEV;
4160}
1da177e4 4161
8d85fce7
GKH		 4162static int cciss_wait_for_board_state(struct pci_dev *pdev,
4163 void __iomem *vaddr, int wait_for_ready)
afa842fa
SC		 4164#define BOARD_READY 1
4165#define BOARD_NOT_READY 0
e99ba136 4166{
afa842fa 4167 int i, iterations;
e99ba136 4168 u32 scratchpad;
1da177e4 4169
afa842fa
SC		 4170 if (wait_for_ready)
4171 iterations = CCISS_BOARD_READY_ITERATIONS;
4172 else
4173 iterations = CCISS_BOARD_NOT_READY_ITERATIONS;
4174
4175 for (i = 0; i < iterations; i++) {
4176 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
4177 if (wait_for_ready) {
4178 if (scratchpad == CCISS_FIRMWARE_READY)
4179 return 0;
4180 } else {
4181 if (scratchpad != CCISS_FIRMWARE_READY)
4182 return 0;
4183 }
e99ba136 4184 msleep(CCISS_BOARD_READY_POLL_INTERVAL_MSECS);
e1438581 4185 }
afa842fa 4186 dev_warn(&pdev->dev, "board not ready, timed out.\n");
e99ba136
SC		 4187 return -ENODEV;
4188}
e1438581 4189
8d85fce7
GKH		 4190static int cciss_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
4191 u32 *cfg_base_addr, u64 *cfg_base_addr_index,
4192 u64 *cfg_offset)
8e93bf6d
SC		 4193{
4194 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
4195 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
4196 *cfg_base_addr &= (u32) 0x0000ffff;
4197 *cfg_base_addr_index = find_PCI_BAR_index(pdev, *cfg_base_addr);
4198 if (*cfg_base_addr_index == -1) {
4199 dev_warn(&pdev->dev, "cannot find cfg_base_addr_index, "
4200 "*cfg_base_addr = 0x%08x\n", *cfg_base_addr);
4201 return -ENODEV;
4202 }
4203 return 0;
4204}
1da177e4 4205
8d85fce7 4206static int cciss_find_cfgtables(ctlr_info_t *h)
4809d098
SC		 4207{
4208 u64 cfg_offset;
4209 u32 cfg_base_addr;
4210 u64 cfg_base_addr_index;
4211 u32 trans_offset;
8e93bf6d 4212 int rc;
1da177e4 4213
8e93bf6d
SC		 4214 rc = cciss_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
4215 &cfg_base_addr_index, &cfg_offset);
4216 if (rc)
4217 return rc;
4809d098 4218 h->cfgtable = remap_pci_mem(pci_resource_start(h->pdev,
d2b805d8 4219 cfg_base_addr_index) + cfg_offset, sizeof(*h->cfgtable));
4809d098
SC		 4220 if (!h->cfgtable)
4221 return -ENOMEM;
62710ae1
SC		 4222 rc = write_driver_ver_to_cfgtable(h->cfgtable);
4223 if (rc)
4224 return rc;
4809d098 4225 /* Find performant mode table. */
8e93bf6d 4226 trans_offset = readl(&h->cfgtable->TransMethodOffset);
4809d098
SC		 4227 h->transtable = remap_pci_mem(pci_resource_start(h->pdev,
4228 cfg_base_addr_index)+cfg_offset+trans_offset,
4229 sizeof(*h->transtable));
4230 if (!h->transtable)
4231 return -ENOMEM;
4232 return 0;
4233}
1da177e4 4234
8d85fce7 4235static void cciss_get_max_perf_mode_cmds(struct ctlr_info *h)
adfbc1ff
SC		 4236{
4237 h->max_commands = readl(&(h->cfgtable->MaxPerformantModeCommands));
186fb9cf
SC		 4238
4239 /* Limit commands in memory limited kdump scenario. */
4240 if (reset_devices && h->max_commands > 32)
4241 h->max_commands = 32;
4242
adfbc1ff
SC		 4243 if (h->max_commands < 16) {
4244 dev_warn(&h->pdev->dev, "Controller reports "
4245 "max supported commands of %d, an obvious lie. "
4246 "Using 16. Ensure that firmware is up to date.\n",
4247 h->max_commands);
4248 h->max_commands = 16;
1da177e4 4249 }
adfbc1ff 4250}
1da177e4 4251
afadbf4b
SC		 4252/* Interrogate the hardware for some limits:
4253 * max commands, max SG elements without chaining, and with chaining,
4254 * SG chain block size, etc.
4255 */
8d85fce7 4256static void cciss_find_board_params(ctlr_info_t *h)
afadbf4b 4257{
adfbc1ff 4258 cciss_get_max_perf_mode_cmds(h);
8a4ec67b 4259 h->nr_cmds = h->max_commands - 4 - cciss_tape_cmds;
afadbf4b 4260 h->maxsgentries = readl(&(h->cfgtable->MaxSGElements));
e7b18ede
MM		 4261 /*
4262 * The P600 may exhibit poor performnace under some workloads
4263 * if we use the value in the configuration table. Limit this
4264 * controller to MAXSGENTRIES (32) instead.
4265 */
4266 if (h->board_id == 0x3225103C)
4267 h->maxsgentries = MAXSGENTRIES;
5c07a311 4268 /*
afadbf4b 4269 * Limit in-command s/g elements to 32 save dma'able memory.
5c07a311
DB		 4270 * Howvever spec says if 0, use 31
4271 */
afadbf4b
SC		 4272 h->max_cmd_sgentries = 31;
4273 if (h->maxsgentries > 512) {
4274 h->max_cmd_sgentries = 32;
4275 h->chainsize = h->maxsgentries - h->max_cmd_sgentries + 1;
4276 h->maxsgentries--; /* save one for chain pointer */
5c07a311 4277 } else {
afadbf4b
SC		 4278 h->maxsgentries = 31; /* default to traditional values */
4279 h->chainsize = 0;
5c07a311 4280 }
afadbf4b 4281}
5c07a311 4282
501b92cd
SC		 4283static inline bool CISS_signature_present(ctlr_info_t *h)
4284{
d48c152a 4285 if (!check_signature(h->cfgtable->Signature, "CISS", 4)) {
501b92cd
SC		 4286 dev_warn(&h->pdev->dev, "not a valid CISS config table\n");
4287 return false;
1da177e4 4288 }
501b92cd
SC		 4289 return true;
4290}
4291
322e304c
SC		 4292/* Need to enable prefetch in the SCSI core for 6400 in x86 */
4293static inline void cciss_enable_scsi_prefetch(ctlr_info_t *h)
4294{
1da177e4 4295#ifdef CONFIG_X86
322e304c
SC		 4296 u32 prefetch;
4297
4298 prefetch = readl(&(h->cfgtable->SCSI_Prefetch));
4299 prefetch |= 0x100;
4300 writel(prefetch, &(h->cfgtable->SCSI_Prefetch));
1da177e4 4301#endif
322e304c 4302}
1da177e4 4303
bfd63ee5
SC		 4304/* Disable DMA prefetch for the P600. Otherwise an ASIC bug may result
4305 * in a prefetch beyond physical memory.
4306 */
4307static inline void cciss_p600_dma_prefetch_quirk(ctlr_info_t *h)
4308{
4309 u32 dma_prefetch;
4310 __u32 dma_refetch;
4311
4312 if (h->board_id != 0x3225103C)
4313 return;
4314 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
4315 dma_prefetch |= 0x8000;
4316 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
4317 pci_read_config_dword(h->pdev, PCI_COMMAND_PARITY, &dma_refetch);
4318 dma_refetch |= 0x1;
4319 pci_write_config_dword(h->pdev, PCI_COMMAND_PARITY, dma_refetch);
4320}
4321
8d85fce7 4322static int cciss_pci_init(ctlr_info_t *h)
6539fa9b 4323{
4809d098 4324 int prod_index, err;
6539fa9b 4325
f70dba83 4326 prod_index = cciss_lookup_board_id(h->pdev, &h->board_id);
6539fa9b 4327 if (prod_index < 0)
2ec24ff1 4328 return -ENODEV;
f70dba83
SC		 4329 h->product_name = products[prod_index].product_name;
4330 h->access = *(products[prod_index].access);
1da177e4 4331
f70dba83 4332 if (cciss_board_disabled(h)) {
b2a4a43d 4333 dev_warn(&h->pdev->dev, "controller appears to be disabled\n");
c33ac89b 4334 return -ENODEV;
1da177e4 4335 }
19373358
MG		 4336
4337 pci_disable_link_state(h->pdev, PCIE_LINK_STATE_L0S |
4338 PCIE_LINK_STATE_L1 | PCIE_LINK_STATE_CLKPM);
4339
f70dba83 4340 err = pci_enable_device(h->pdev);
7c832835 4341 if (err) {
b2a4a43d 4342 dev_warn(&h->pdev->dev, "Unable to Enable PCI device\n");
c33ac89b 4343 return err;
f92e2f5f
MM		 4344 }
4345
f70dba83 4346 err = pci_request_regions(h->pdev, "cciss");
4e570309 4347 if (err) {
b2a4a43d
SC		 4348 dev_warn(&h->pdev->dev,
4349 "Cannot obtain PCI resources, aborting\n");
872225ca 4350 return err;
4e570309 4351 }
1da177e4 4352
b2a4a43d
SC		 4353 dev_dbg(&h->pdev->dev, "irq = %x\n", h->pdev->irq);
4354 dev_dbg(&h->pdev->dev, "board_id = %x\n", h->board_id);
1da177e4 4355
fb86a35b
MM		 4356/* If the kernel supports MSI/MSI-X we will try to enable that functionality,
4357 * else we use the IO-APIC interrupt assigned to us by system ROM.
4358 */
f70dba83
SC		 4359 cciss_interrupt_mode(h);
4360 err = cciss_pci_find_memory_BAR(h->pdev, &h->paddr);
d474830d 4361 if (err)
e1438581 4362 goto err_out_free_res;
f70dba83
SC		 4363 h->vaddr = remap_pci_mem(h->paddr, 0x250);
4364 if (!h->vaddr) {
da550321
SC		 4365 err = -ENOMEM;
4366 goto err_out_free_res;
7c832835 4367 }
afa842fa 4368 err = cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
e99ba136 4369 if (err)
4e570309 4370 goto err_out_free_res;
f70dba83 4371 err = cciss_find_cfgtables(h);
4809d098 4372 if (err)
4e570309 4373 goto err_out_free_res;
b2a4a43d 4374 print_cfg_table(h);
f70dba83 4375 cciss_find_board_params(h);
1da177e4 4376
f70dba83 4377 if (!CISS_signature_present(h)) {
c33ac89b 4378 err = -ENODEV;
4e570309 4379 goto err_out_free_res;
1da177e4 4380 }
f70dba83
SC		 4381 cciss_enable_scsi_prefetch(h);
4382 cciss_p600_dma_prefetch_quirk(h);
13049537
JH		 4383 err = cciss_enter_simple_mode(h);
4384 if (err)
4385 goto err_out_free_res;
f70dba83 4386 cciss_put_controller_into_performant_mode(h);
1da177e4
LT		 4387 return 0;
4388
5faad620 4389err_out_free_res:
872225ca
MM		 4390 /*
4391 * Deliberately omit pci_disable_device(): it does something nasty to
4392 * Smart Array controllers that pci_enable_device does not undo
4393 */
f70dba83
SC		 4394 if (h->transtable)
4395 iounmap(h->transtable);
4396 if (h->cfgtable)
4397 iounmap(h->cfgtable);
4398 if (h->vaddr)
4399 iounmap(h->vaddr);
4400 pci_release_regions(h->pdev);
c33ac89b 4401 return err;
1da177e4
LT		 4402}
4403
6ae5ce8e
MM		 4404/* Function to find the first free pointer into our hba[] array
4405 * Returns -1 if no free entries are left.
7c832835 4406 */
b2a4a43d 4407static int alloc_cciss_hba(struct pci_dev *pdev)
1da177e4 4408{
799202cb 4409 int i;
1da177e4 4410
7c832835 4411 for (i = 0; i < MAX_CTLR; i++) {
1da177e4 4412 if (!hba[i]) {
f70dba83 4413 ctlr_info_t *h;
f2912a12 4414
f70dba83
SC		 4415 h = kzalloc(sizeof(ctlr_info_t), GFP_KERNEL);
4416 if (!h)
1da177e4 4417 goto Enomem;
f70dba83 4418 hba[i] = h;
1da177e4
LT		 4419 return i;
4420 }
4421 }
b2a4a43d 4422 dev_warn(&pdev->dev, "This driver supports a maximum"
7c832835 4423 " of %d controllers.\n", MAX_CTLR);
799202cb
MM		 4424 return -1;
4425Enomem:
b2a4a43d 4426 dev_warn(&pdev->dev, "out of memory.\n");
1da177e4
LT		 4427 return -1;
4428}
4429
f70dba83 4430static void free_hba(ctlr_info_t *h)
1da177e4 4431{
2c935593 4432 int i;
1da177e4 4433
f70dba83 4434 hba[h->ctlr] = NULL;
2c935593
SC		 4435 for (i = 0; i < h->highest_lun + 1; i++)
4436 if (h->gendisk[i] != NULL)
4437 put_disk(h->gendisk[i]);
4438 kfree(h);
1da177e4
LT		 4439}
4440
82eb03cf 4441/* Send a message CDB to the firmware. */
8d85fce7
GKH		 4442static int cciss_message(struct pci_dev *pdev, unsigned char opcode,
4443 unsigned char type)
82eb03cf
CC		 4444{
4445 typedef struct {
4446 CommandListHeader_struct CommandHeader;
4447 RequestBlock_struct Request;
4448 ErrDescriptor_struct ErrorDescriptor;
4449 } Command;
4450 static const size_t cmd_sz = sizeof(Command) + sizeof(ErrorInfo_struct);
4451 Command *cmd;
4452 dma_addr_t paddr64;
4453 uint32_t paddr32, tag;
4454 void __iomem *vaddr;
4455 int i, err;
4456
4457 vaddr = ioremap_nocache(pci_resource_start(pdev, 0), pci_resource_len(pdev, 0));
4458 if (vaddr == NULL)
4459 return -ENOMEM;
4460
4461 /* The Inbound Post Queue only accepts 32-bit physical addresses for the
4462 CCISS commands, so they must be allocated from the lower 4GiB of
4463 memory. */
e930438c 4464 err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
82eb03cf
CC		 4465 if (err) {
4466 iounmap(vaddr);
4467 return -ENOMEM;
4468 }
4469
4470 cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64);
4471 if (cmd == NULL) {
4472 iounmap(vaddr);
4473 return -ENOMEM;
4474 }
4475
4476 /* This must fit, because of the 32-bit consistent DMA mask. Also,
4477 although there's no guarantee, we assume that the address is at
4478 least 4-byte aligned (most likely, it's page-aligned). */
4479 paddr32 = paddr64;
4480
4481 cmd->CommandHeader.ReplyQueue = 0;
4482 cmd->CommandHeader.SGList = 0;
4483 cmd->CommandHeader.SGTotal = 0;
4484 cmd->CommandHeader.Tag.lower = paddr32;
4485 cmd->CommandHeader.Tag.upper = 0;
4486 memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8);
4487
4488 cmd->Request.CDBLen = 16;
4489 cmd->Request.Type.Type = TYPE_MSG;
4490 cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE;
4491 cmd->Request.Type.Direction = XFER_NONE;
4492 cmd->Request.Timeout = 0; /* Don't time out */
4493 cmd->Request.CDB[0] = opcode;
4494 cmd->Request.CDB[1] = type;
4495 memset(&cmd->Request.CDB[2], 0, 14); /* the rest of the CDB is reserved */
4496
4497 cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(Command);
4498 cmd->ErrorDescriptor.Addr.upper = 0;
4499 cmd->ErrorDescriptor.Len = sizeof(ErrorInfo_struct);
4500
4501 writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET);
4502
4503 for (i = 0; i < 10; i++) {
4504 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
4505 if ((tag & ~3) == paddr32)
4506 break;
3e28601f 4507 msleep(CCISS_POST_RESET_NOOP_TIMEOUT_MSECS);
82eb03cf
CC		 4508 }
4509
4510 iounmap(vaddr);
4511
4512 /* we leak the DMA buffer here ... no choice since the controller could
4513 still complete the command. */
4514 if (i == 10) {
b2a4a43d
SC		 4515 dev_err(&pdev->dev,
4516 "controller message %02x:%02x timed out\n",
82eb03cf
CC		 4517 opcode, type);
4518 return -ETIMEDOUT;
4519 }
4520
4521 pci_free_consistent(pdev, cmd_sz, cmd, paddr64);
4522
4523 if (tag & 2) {
b2a4a43d 4524 dev_err(&pdev->dev, "controller message %02x:%02x failed\n",
82eb03cf
CC		 4525 opcode, type);
4526 return -EIO;
4527 }
4528
b2a4a43d 4529 dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n",
82eb03cf
CC		 4530 opcode, type);
4531 return 0;
4532}
4533
82eb03cf
CC		 4534#define cciss_noop(p) cciss_message(p, 3, 0)
4535
a6528d01 4536static int cciss_controller_hard_reset(struct pci_dev *pdev,
bf2e2e6b 4537 void * __iomem vaddr, u32 use_doorbell)
82eb03cf 4538{
a6528d01
SC		 4539 u16 pmcsr;
4540 int pos;
82eb03cf 4541
a6528d01
SC		 4542 if (use_doorbell) {
4543 /* For everything after the P600, the PCI power state method
4544 * of resetting the controller doesn't work, so we have this
4545 * other way using the doorbell register.
4546 */
4547 dev_info(&pdev->dev, "using doorbell to reset controller\n");
bf2e2e6b 4548 writel(use_doorbell, vaddr + SA5_DOORBELL);
a6528d01
SC		 4549 } else { /* Try to do it the PCI power state way */
4550
4551 /* Quoting from the Open CISS Specification: "The Power
4552 * Management Control/Status Register (CSR) controls the power
4553 * state of the device. The normal operating state is D0,
4554 * CSR=00h. The software off state is D3, CSR=03h. To reset
4555 * the controller, place the interface device in D3 then to D0,
4556 * this causes a secondary PCI reset which will reset the
4557 * controller." */
4558
4559 pos = pci_find_capability(pdev, PCI_CAP_ID_PM);
4560 if (pos == 0) {
4561 dev_err(&pdev->dev,
4562 "cciss_controller_hard_reset: "
4563 "PCI PM not supported\n");
4564 return -ENODEV;
4565 }
4566 dev_info(&pdev->dev, "using PCI PM to reset controller\n");
4567 /* enter the D3hot power management state */
4568 pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr);
4569 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4570 pmcsr |= PCI_D3hot;
4571 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
82eb03cf 4572
a6528d01 4573 msleep(500);
82eb03cf 4574
a6528d01
SC		 4575 /* enter the D0 power management state */
4576 pmcsr &= ~PCI_PM_CTRL_STATE_MASK;
4577 pmcsr |= PCI_D0;
4578 pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr);
ab5dbebe
MM		 4579
4580 /*
4581 * The P600 requires a small delay when changing states.
4582 * Otherwise we may think the board did not reset and we bail.
4583 * This for kdump only and is particular to the P600.
4584 */
4585 msleep(500);
a6528d01
SC		 4586 }
4587 return 0;
4588}
82eb03cf 4589
8d85fce7 4590static void init_driver_version(char *driver_version, int len)
62710ae1
SC		 4591{
4592 memset(driver_version, 0, len);
4593 strncpy(driver_version, "cciss " DRIVER_NAME, len - 1);
4594}
4595
8d85fce7 4596static int write_driver_ver_to_cfgtable(CfgTable_struct __iomem *cfgtable)
62710ae1
SC		 4597{
4598 char *driver_version;
4599 int i, size = sizeof(cfgtable->driver_version);
4600
4601 driver_version = kmalloc(size, GFP_KERNEL);
4602 if (!driver_version)
4603 return -ENOMEM;
4604
4605 init_driver_version(driver_version, size);
4606 for (i = 0; i < size; i++)
4607 writeb(driver_version[i], &cfgtable->driver_version[i]);
4608 kfree(driver_version);
4609 return 0;
4610}
4611
8d85fce7
GKH		 4612static void read_driver_ver_from_cfgtable(CfgTable_struct __iomem *cfgtable,
4613 unsigned char *driver_ver)
62710ae1
SC		 4614{
4615 int i;
4616
4617 for (i = 0; i < sizeof(cfgtable->driver_version); i++)
4618 driver_ver[i] = readb(&cfgtable->driver_version[i]);
4619}
4620
8d85fce7 4621static int controller_reset_failed(CfgTable_struct __iomem *cfgtable)
62710ae1
SC		 4622{
4623
4624 char *driver_ver, *old_driver_ver;
4625 int rc, size = sizeof(cfgtable->driver_version);
4626
4627 old_driver_ver = kmalloc(2 * size, GFP_KERNEL);
4628 if (!old_driver_ver)
4629 return -ENOMEM;
4630 driver_ver = old_driver_ver + size;
4631
4632 /* After a reset, the 32 bytes of "driver version" in the cfgtable
4633 * should have been changed, otherwise we know the reset failed.
4634 */
4635 init_driver_version(old_driver_ver, size);
4636 read_driver_ver_from_cfgtable(cfgtable, driver_ver);
4637 rc = !memcmp(driver_ver, old_driver_ver, size);
4638 kfree(old_driver_ver);
4639 return rc;
4640}
4641
a6528d01
SC		 4642/* This does a hard reset of the controller using PCI power management
4643 * states or using the doorbell register. */
8d85fce7 4644static int cciss_kdump_hard_reset_controller(struct pci_dev *pdev)
a6528d01 4645{
a6528d01
SC		 4646 u64 cfg_offset;
4647 u32 cfg_base_addr;
4648 u64 cfg_base_addr_index;
4649 void __iomem *vaddr;
4650 unsigned long paddr;
62710ae1 4651 u32 misc_fw_support;
f442e64b 4652 int rc;
a6528d01 4653 CfgTable_struct __iomem *cfgtable;
bf2e2e6b 4654 u32 use_doorbell;
058a0f9f 4655 u32 board_id;
f442e64b 4656 u16 command_register;
a6528d01
SC		 4657
4658 /* For controllers as old a the p600, this is very nearly
4659 * the same thing as
4660 *
4661 * pci_save_state(pci_dev);
4662 * pci_set_power_state(pci_dev, PCI_D3hot);
4663 * pci_set_power_state(pci_dev, PCI_D0);
4664 * pci_restore_state(pci_dev);
4665 *
a6528d01
SC		 4666 * For controllers newer than the P600, the pci power state
4667 * method of resetting doesn't work so we have another way
4668 * using the doorbell register.
4669 */
82eb03cf 4670
058a0f9f
SC		 4671 /* Exclude 640x boards. These are two pci devices in one slot
4672 * which share a battery backed cache module. One controls the
4673 * cache, the other accesses the cache through the one that controls
4674 * it. If we reset the one controlling the cache, the other will
4675 * likely not be happy. Just forbid resetting this conjoined mess.
4676 */
4677 cciss_lookup_board_id(pdev, &board_id);
ec52d5f1 4678 if (!ctlr_is_resettable(board_id)) {
b9ea9dcd 4679 dev_warn(&pdev->dev, "Controller not resettable\n");
82eb03cf
CC		 4680 return -ENODEV;
4681 }
4682
ec52d5f1
SC		 4683 /* if controller is soft- but not hard resettable... */
4684 if (!ctlr_is_hard_resettable(board_id))
4685 return -ENOTSUPP; /* try soft reset later. */
4686
f442e64b
SC		 4687 /* Save the PCI command register */
4688 pci_read_config_word(pdev, 4, &command_register);
4689 /* Turn the board off. This is so that later pci_restore_state()
4690 * won't turn the board on before the rest of config space is ready.
4691 */
4692 pci_disable_device(pdev);
4693 pci_save_state(pdev);
82eb03cf 4694
a6528d01
SC		 4695 /* find the first memory BAR, so we can find the cfg table */
4696 rc = cciss_pci_find_memory_BAR(pdev, &paddr);
4697 if (rc)
4698 return rc;
4699 vaddr = remap_pci_mem(paddr, 0x250);
4700 if (!vaddr)
4701 return -ENOMEM;
82eb03cf 4702
a6528d01
SC		 4703 /* find cfgtable in order to check if reset via doorbell is supported */
4704 rc = cciss_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
4705 &cfg_base_addr_index, &cfg_offset);
4706 if (rc)
4707 goto unmap_vaddr;
4708 cfgtable = remap_pci_mem(pci_resource_start(pdev,
4709 cfg_base_addr_index) + cfg_offset, sizeof(*cfgtable));
4710 if (!cfgtable) {
4711 rc = -ENOMEM;
4712 goto unmap_vaddr;
4713 }
62710ae1
SC		 4714 rc = write_driver_ver_to_cfgtable(cfgtable);
4715 if (rc)
4716 goto unmap_vaddr;
82eb03cf 4717
bf2e2e6b
SC		 4718 /* If reset via doorbell register is supported, use that.
4719 * There are two such methods. Favor the newest method.
75230ff2 4720 */
bf2e2e6b
SC		 4721 misc_fw_support = readl(&cfgtable->misc_fw_support);
4722 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET2;
4723 if (use_doorbell) {
4724 use_doorbell = DOORBELL_CTLR_RESET2;
4725 } else {
4726 use_doorbell = misc_fw_support & MISC_FW_DOORBELL_RESET;
063d2cf7
SC		 4727 if (use_doorbell) {
4728 dev_warn(&pdev->dev, "Controller claims that "
4729 "'Bit 2 doorbell reset' is "
4730 "supported, but not 'bit 5 doorbell reset'. "
4731 "Firmware update is recommended.\n");
4732 rc = -ENOTSUPP; /* use the soft reset */
4733 goto unmap_cfgtable;
4734 }
bf2e2e6b 4735 }
75230ff2 4736
a6528d01
SC		 4737 rc = cciss_controller_hard_reset(pdev, vaddr, use_doorbell);
4738 if (rc)
4739 goto unmap_cfgtable;
f442e64b
SC		 4740 pci_restore_state(pdev);
4741 rc = pci_enable_device(pdev);
4742 if (rc) {
4743 dev_warn(&pdev->dev, "failed to enable device.\n");
4744 goto unmap_cfgtable;
82eb03cf 4745 }
f442e64b 4746 pci_write_config_word(pdev, 4, command_register);
82eb03cf 4747
a6528d01
SC		 4748 /* Some devices (notably the HP Smart Array 5i Controller)
4749 need a little pause here */
4750 msleep(CCISS_POST_RESET_PAUSE_MSECS);
4751
afa842fa 4752 /* Wait for board to become not ready, then ready. */
59ec86bb 4753 dev_info(&pdev->dev, "Waiting for board to reset.\n");
afa842fa 4754 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_NOT_READY);
5afe2781
SC		 4755 if (rc) {
4756 dev_warn(&pdev->dev, "Failed waiting for board to hard reset."
4757 " Will try soft reset.\n");
4758 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
4759 goto unmap_cfgtable;
4760 }
afa842fa
SC		 4761 rc = cciss_wait_for_board_state(pdev, vaddr, BOARD_READY);
4762 if (rc) {
4763 dev_warn(&pdev->dev,
5afe2781
SC		 4764 "failed waiting for board to become ready "
4765 "after hard reset\n");
afa842fa
SC		 4766 goto unmap_cfgtable;
4767 }
afa842fa 4768
62710ae1
SC		 4769 rc = controller_reset_failed(vaddr);
4770 if (rc < 0)
4771 goto unmap_cfgtable;
4772 if (rc) {
5afe2781
SC		 4773 dev_warn(&pdev->dev, "Unable to successfully hard reset "
4774 "controller. Will try soft reset.\n");
4775 rc = -ENOTSUPP; /* Not expected, but try soft reset later */
62710ae1 4776 } else {
5afe2781 4777 dev_info(&pdev->dev, "Board ready after hard reset.\n");
a6528d01
SC		 4778 }
4779
4780unmap_cfgtable:
4781 iounmap(cfgtable);
4782
4783unmap_vaddr:
4784 iounmap(vaddr);
4785 return rc;
82eb03cf
CC		 4786}
4787
8d85fce7 4788static int cciss_init_reset_devices(struct pci_dev *pdev)
83123cb1 4789{
a6528d01 4790 int rc, i;
83123cb1
SC		 4791
4792 if (!reset_devices)
4793 return 0;
4794
a6528d01
SC		 4795 /* Reset the controller with a PCI power-cycle or via doorbell */
4796 rc = cciss_kdump_hard_reset_controller(pdev);
83123cb1 4797
a6528d01
SC		 4798 /* -ENOTSUPP here means we cannot reset the controller
4799 * but it's already (and still) up and running in
058a0f9f
SC		 4800 * "performant mode". Or, it might be 640x, which can't reset
4801 * due to concerns about shared bbwc between 6402/6404 pair.
a6528d01
SC		 4802 */
4803 if (rc == -ENOTSUPP)
5afe2781 4804 return rc; /* just try to do the kdump anyhow. */
a6528d01
SC		 4805 if (rc)
4806 return -ENODEV;
83123cb1
SC		 4807
4808 /* Now try to get the controller to respond to a no-op */
59ec86bb 4809 dev_warn(&pdev->dev, "Waiting for controller to respond to no-op\n");
83123cb1
SC		 4810 for (i = 0; i < CCISS_POST_RESET_NOOP_RETRIES; i++) {
4811 if (cciss_noop(pdev) == 0)
4812 break;
4813 else
4814 dev_warn(&pdev->dev, "no-op failed%s\n",
4815 (i < CCISS_POST_RESET_NOOP_RETRIES - 1 ?
4816 "; re-trying" : ""));
4817 msleep(CCISS_POST_RESET_NOOP_INTERVAL_MSECS);
4818 }
82eb03cf
CC		 4819 return 0;
4820}
4821
8d85fce7 4822static int cciss_allocate_cmd_pool(ctlr_info_t *h)
54dae343 4823{
1f118bc4 4824 h->cmd_pool_bits = kmalloc(BITS_TO_LONGS(h->nr_cmds) *
54dae343
SC		 4825 sizeof(unsigned long), GFP_KERNEL);
4826 h->cmd_pool = pci_alloc_consistent(h->pdev,
4827 h->nr_cmds * sizeof(CommandList_struct),
4828 &(h->cmd_pool_dhandle));
4829 h->errinfo_pool = pci_alloc_consistent(h->pdev,
4830 h->nr_cmds * sizeof(ErrorInfo_struct),
4831 &(h->errinfo_pool_dhandle));
4832 if ((h->cmd_pool_bits == NULL)
4833 || (h->cmd_pool == NULL)
4834 || (h->errinfo_pool == NULL)) {
4835 dev_err(&h->pdev->dev, "out of memory");
4836 return -ENOMEM;
4837 }
4838 return 0;
4839}
4840
8d85fce7 4841static int cciss_allocate_scatterlists(ctlr_info_t *h)
abf7966e
SC		 4842{
4843 int i;
4844
4845 /* zero it, so that on free we need not know how many were alloc'ed */
4846 h->scatter_list = kzalloc(h->max_commands *
4847 sizeof(struct scatterlist *), GFP_KERNEL);
4848 if (!h->scatter_list)
4849 return -ENOMEM;
4850
4851 for (i = 0; i < h->nr_cmds; i++) {
4852 h->scatter_list[i] = kmalloc(sizeof(struct scatterlist) *
4853 h->maxsgentries, GFP_KERNEL);
4854 if (h->scatter_list[i] == NULL) {
4855 dev_err(&h->pdev->dev, "could not allocate "
4856 "s/g lists\n");
4857 return -ENOMEM;
4858 }
4859 }
4860 return 0;
4861}
4862
4863static void cciss_free_scatterlists(ctlr_info_t *h)
4864{
4865 int i;
4866
4867 if (h->scatter_list) {
4868 for (i = 0; i < h->nr_cmds; i++)
4869 kfree(h->scatter_list[i]);
4870 kfree(h->scatter_list);
4871 }
4872}
4873
54dae343
SC		 4874static void cciss_free_cmd_pool(ctlr_info_t *h)
4875{
4876 kfree(h->cmd_pool_bits);
4877 if (h->cmd_pool)
4878 pci_free_consistent(h->pdev,
4879 h->nr_cmds * sizeof(CommandList_struct),
4880 h->cmd_pool, h->cmd_pool_dhandle);
4881 if (h->errinfo_pool)
4882 pci_free_consistent(h->pdev,
4883 h->nr_cmds * sizeof(ErrorInfo_struct),
4884 h->errinfo_pool, h->errinfo_pool_dhandle);
4885}
4886
2b48085f
SC		 4887static int cciss_request_irq(ctlr_info_t *h,
4888 irqreturn_t (*msixhandler)(int, void *),
4889 irqreturn_t (*intxhandler)(int, void *))
4890{
4891 if (h->msix_vector || h->msi_vector) {
13049537 4892 if (!request_irq(h->intr[h->intr_mode], msixhandler,
6225da48 4893 0, h->devname, h))
2b48085f
SC		 4894 return 0;
4895 dev_err(&h->pdev->dev, "Unable to get msi irq %d"
13049537 4896 " for %s\n", h->intr[h->intr_mode],
2b48085f
SC		 4897 h->devname);
4898 return -1;
4899 }
4900
13049537 4901 if (!request_irq(h->intr[h->intr_mode], intxhandler,
6225da48 4902 IRQF_SHARED, h->devname, h))
2b48085f
SC		 4903 return 0;
4904 dev_err(&h->pdev->dev, "Unable to get irq %d for %s\n",
13049537 4905 h->intr[h->intr_mode], h->devname);
2b48085f
SC		 4906 return -1;
4907}
4908
8d85fce7 4909static int cciss_kdump_soft_reset(ctlr_info_t *h)
5afe2781
SC		 4910{
4911 if (cciss_send_reset(h, CTLR_LUNID, CCISS_RESET_TYPE_CONTROLLER)) {
4912 dev_warn(&h->pdev->dev, "Resetting array controller failed.\n");
4913 return -EIO;
4914 }
4915
4916 dev_info(&h->pdev->dev, "Waiting for board to soft reset.\n");
4917 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY)) {
4918 dev_warn(&h->pdev->dev, "Soft reset had no effect.\n");
4919 return -1;
4920 }
4921
4922 dev_info(&h->pdev->dev, "Board reset, awaiting READY status.\n");
4923 if (cciss_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY)) {
4924 dev_warn(&h->pdev->dev, "Board failed to become ready "
4925 "after soft reset.\n");
4926 return -1;
4927 }
4928
4929 return 0;
4930}
4931
4932static void cciss_undo_allocations_after_kdump_soft_reset(ctlr_info_t *h)
4933{
4934 int ctlr = h->ctlr;
4935
13049537 4936 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 4937#ifdef CONFIG_PCI_MSI
4938 if (h->msix_vector)
4939 pci_disable_msix(h->pdev);
4940 else if (h->msi_vector)
4941 pci_disable_msi(h->pdev);
4942#endif /* CONFIG_PCI_MSI */
4943 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
4944 cciss_free_scatterlists(h);
4945 cciss_free_cmd_pool(h);
4946 kfree(h->blockFetchTable);
4947 if (h->reply_pool)
4948 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
4949 h->reply_pool, h->reply_pool_dhandle);
4950 if (h->transtable)
4951 iounmap(h->transtable);
4952 if (h->cfgtable)
4953 iounmap(h->cfgtable);
4954 if (h->vaddr)
4955 iounmap(h->vaddr);
4956 unregister_blkdev(h->major, h->devname);
4957 cciss_destroy_hba_sysfs_entry(h);
4958 pci_release_regions(h->pdev);
4959 kfree(h);
4960 hba[ctlr] = NULL;
4961}
4962
1da177e4
LT		 4963/*
4964 * This is it. Find all the controllers and register them. I really hate
4965 * stealing all these major device numbers.
4966 * returns the number of block devices registered.
4967 */
8d85fce7 4968static int cciss_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 4969{
1da177e4 4970 int i;
799202cb 4971 int j = 0;
1da177e4 4972 int rc;
5afe2781 4973 int try_soft_reset = 0;
22bece00 4974 int dac, return_code;
212a5026 4975 InquiryData_struct *inq_buff;
f70dba83 4976 ctlr_info_t *h;
5afe2781 4977 unsigned long flags;
1da177e4 4978
0821e904
MM		 4979 /*
4980 * By default the cciss driver is used for all older HP Smart Array
4981 * controllers. There are module paramaters that allow a user to
4982 * override this behavior and instead use the hpsa SCSI driver. If
4983 * this is the case cciss may be loaded first from the kdump initrd
4984 * image and cause a kernel panic. So if reset_devices is true and
4985 * cciss_allow_hpsa is set just bail.
4986 */
4987 if ((reset_devices) && (cciss_allow_hpsa == 1))
4988 return -ENODEV;
83123cb1 4989 rc = cciss_init_reset_devices(pdev);
5afe2781
SC		 4990 if (rc) {
4991 if (rc != -ENOTSUPP)
4992 return rc;
4993 /* If the reset fails in a particular way (it has no way to do
4994 * a proper hard reset, so returns -ENOTSUPP) we can try to do
4995 * a soft reset once we get the controller configured up to the
4996 * point that it can accept a command.
4997 */
4998 try_soft_reset = 1;
4999 rc = 0;
5000 }
5001
5002reinit_after_soft_reset:
5003
b2a4a43d 5004 i = alloc_cciss_hba(pdev);
7c832835 5005 if (i < 0)
4336548a 5006 return -ENOMEM;
1f8ef380 5007
f70dba83
SC		 5008 h = hba[i];
5009 h->pdev = pdev;
5010 h->busy_initializing = 1;
13049537 5011 h->intr_mode = cciss_simple_mode ? SIMPLE_MODE_INT : PERF_MODE_INT;
e6e1ee93
JA		 5012 INIT_LIST_HEAD(&h->cmpQ);
5013 INIT_LIST_HEAD(&h->reqQ);
f70dba83 5014 mutex_init(&h->busy_shutting_down);
1f8ef380 5015
f70dba83 5016 if (cciss_pci_init(h) != 0)
2cfa948c 5017 goto clean_no_release_regions;
1da177e4 5018
f70dba83
SC		 5019 sprintf(h->devname, "cciss%d", i);
5020 h->ctlr = i;
1da177e4 5021
8a4ec67b
SC		 5022 if (cciss_tape_cmds < 2)
5023 cciss_tape_cmds = 2;
5024 if (cciss_tape_cmds > 16)
5025 cciss_tape_cmds = 16;
5026
f70dba83 5027 init_completion(&h->scan_wait);
b368c9dd 5028
f70dba83 5029 if (cciss_create_hba_sysfs_entry(h))
7fe06326
AP		 5030 goto clean0;
5031
1da177e4 5032 /* configure PCI DMA stuff */
6a35528a 5033 if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64)))
40aabb58 5034 dac = 1;
284901a9 5035 else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32)))
40aabb58 5036 dac = 0;
1da177e4 5037 else {
b2a4a43d 5038 dev_err(&h->pdev->dev, "no suitable DMA available\n");
1da177e4
LT		 5039 goto clean1;
5040 }
5041
5042 /*
5043 * register with the major number, or get a dynamic major number
5044 * by passing 0 as argument. This is done for greater than
5045 * 8 controller support.
5046 */
5047 if (i < MAX_CTLR_ORIG)
f70dba83
SC		 5048 h->major = COMPAQ_CISS_MAJOR + i;
5049 rc = register_blkdev(h->major, h->devname);
7c832835 5050 if (rc == -EBUSY || rc == -EINVAL) {
b2a4a43d
SC		 5051 dev_err(&h->pdev->dev,
5052 "Unable to get major number %d for %s "
f70dba83 5053 "on hba %d\n", h->major, h->devname, i);
1da177e4 5054 goto clean1;
7c832835 5055 } else {
1da177e4 5056 if (i >= MAX_CTLR_ORIG)
f70dba83 5057 h->major = rc;
1da177e4
LT		 5058 }
5059
5060 /* make sure the board interrupts are off */
f70dba83 5061 h->access.set_intr_mask(h, CCISS_INTR_OFF);
2b48085f
SC		 5062 rc = cciss_request_irq(h, do_cciss_msix_intr, do_cciss_intx);
5063 if (rc)
5064 goto clean2;
40aabb58 5065
b2a4a43d 5066 dev_info(&h->pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n",
f70dba83 5067 h->devname, pdev->device, pci_name(pdev),
13049537 5068 h->intr[h->intr_mode], dac ? "" : " not");
7c832835 5069
54dae343 5070 if (cciss_allocate_cmd_pool(h))
1da177e4 5071 goto clean4;
5c07a311 5072
abf7966e 5073 if (cciss_allocate_scatterlists(h))
4ee69851
DC		 5074 goto clean4;
5075
f70dba83
SC		 5076 h->cmd_sg_list = cciss_allocate_sg_chain_blocks(h,
5077 h->chainsize, h->nr_cmds);
5078 if (!h->cmd_sg_list && h->chainsize > 0)
5c07a311 5079 goto clean4;
5c07a311 5080
f70dba83 5081 spin_lock_init(&h->lock);
1da177e4 5082
7c832835 5083 /* Initialize the pdev driver private data.
f70dba83
SC		 5084 have it point to h. */
5085 pci_set_drvdata(pdev, h);
7c832835
BH		 5086 /* command and error info recs zeroed out before
5087 they are used */
1f118bc4 5088 bitmap_zero(h->cmd_pool_bits, h->nr_cmds);
1da177e4 5089
f70dba83
SC		 5090 h->num_luns = 0;
5091 h->highest_lun = -1;
6ae5ce8e 5092 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83
SC		 5093 h->drv[j] = NULL;
5094 h->gendisk[j] = NULL;
6ae5ce8e 5095 }
1da177e4 5096
5afe2781
SC		 5097 /* At this point, the controller is ready to take commands.
5098 * Now, if reset_devices and the hard reset didn't work, try
5099 * the soft reset and see if that works.
5100 */
5101 if (try_soft_reset) {
5102
5103 /* This is kind of gross. We may or may not get a completion
5104 * from the soft reset command, and if we do, then the value
5105 * from the fifo may or may not be valid. So, we wait 10 secs
5106 * after the reset throwing away any completions we get during
5107 * that time. Unregister the interrupt handler and register
5108 * fake ones to scoop up any residual completions.
5109 */
5110 spin_lock_irqsave(&h->lock, flags);
5111 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5112 spin_unlock_irqrestore(&h->lock, flags);
13049537 5113 free_irq(h->intr[h->intr_mode], h);
5afe2781
SC		 5114 rc = cciss_request_irq(h, cciss_msix_discard_completions,
5115 cciss_intx_discard_completions);
5116 if (rc) {
5117 dev_warn(&h->pdev->dev, "Failed to request_irq after "
5118 "soft reset.\n");
5119 goto clean4;
5120 }
5121
5122 rc = cciss_kdump_soft_reset(h);
5123 if (rc) {
5124 dev_warn(&h->pdev->dev, "Soft reset failed.\n");
5125 goto clean4;
5126 }
5127
5128 dev_info(&h->pdev->dev, "Board READY.\n");
5129 dev_info(&h->pdev->dev,
5130 "Waiting for stale completions to drain.\n");
5131 h->access.set_intr_mask(h, CCISS_INTR_ON);
5132 msleep(10000);
5133 h->access.set_intr_mask(h, CCISS_INTR_OFF);
5134
5135 rc = controller_reset_failed(h->cfgtable);
5136 if (rc)
5137 dev_info(&h->pdev->dev,
5138 "Soft reset appears to have failed.\n");
5139
5140 /* since the controller's reset, we have to go back and re-init
5141 * everything. Easiest to just forget what we've done and do it
5142 * all over again.
5143 */
5144 cciss_undo_allocations_after_kdump_soft_reset(h);
5145 try_soft_reset = 0;
5146 if (rc)
5147 /* don't go to clean4, we already unallocated */
5148 return -ENODEV;
5149
5150 goto reinit_after_soft_reset;
5151 }
5152
f70dba83 5153 cciss_scsi_setup(h);
1da177e4
LT		 5154
5155 /* Turn the interrupts on so we can service requests */
f70dba83 5156 h->access.set_intr_mask(h, CCISS_INTR_ON);
1da177e4 5157
22bece00
MM		 5158 /* Get the firmware version */
5159 inq_buff = kzalloc(sizeof(InquiryData_struct), GFP_KERNEL);
5160 if (inq_buff == NULL) {
b2a4a43d 5161 dev_err(&h->pdev->dev, "out of memory\n");
22bece00
MM		 5162 goto clean4;
5163 }
5164
f70dba83 5165 return_code = sendcmd_withirq(h, CISS_INQUIRY, inq_buff,
b57695fe 5166 sizeof(InquiryData_struct), 0, CTLR_LUNID, TYPE_CMD);
22bece00 5167 if (return_code == IO_OK) {
f70dba83
SC		 5168 h->firm_ver[0] = inq_buff->data_byte[32];
5169 h->firm_ver[1] = inq_buff->data_byte[33];
5170 h->firm_ver[2] = inq_buff->data_byte[34];
5171 h->firm_ver[3] = inq_buff->data_byte[35];
22bece00 5172 } else { /* send command failed */
b2a4a43d 5173 dev_warn(&h->pdev->dev, "unable to determine firmware"
22bece00
MM		 5174 " version of controller\n");
5175 }
212a5026 5176 kfree(inq_buff);
22bece00 5177
f70dba83 5178 cciss_procinit(h);
92c4231a 5179
f70dba83 5180 h->cciss_max_sectors = 8192;
92c4231a 5181
f70dba83 5182 rebuild_lun_table(h, 1, 0);
0007a4c9 5183 cciss_engage_scsi(h);
f70dba83 5184 h->busy_initializing = 0;
b88fac63 5185 return 0;
1da177e4 5186
6ae5ce8e 5187clean4:
54dae343 5188 cciss_free_cmd_pool(h);
abf7966e 5189 cciss_free_scatterlists(h);
f70dba83 5190 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
13049537 5191 free_irq(h->intr[h->intr_mode], h);
6ae5ce8e 5192clean2:
f70dba83 5193 unregister_blkdev(h->major, h->devname);
6ae5ce8e 5194clean1:
f70dba83 5195 cciss_destroy_hba_sysfs_entry(h);
7fe06326 5196clean0:
2cfa948c
SC		 5197 pci_release_regions(pdev);
5198clean_no_release_regions:
f70dba83 5199 h->busy_initializing = 0;
9cef0d2f 5200
872225ca
MM		 5201 /*
5202 * Deliberately omit pci_disable_device(): it does something nasty to
5203 * Smart Array controllers that pci_enable_device does not undo
5204 */
799202cb 5205 pci_set_drvdata(pdev, NULL);
f70dba83 5206 free_hba(h);
4336548a 5207 return -ENODEV;
1da177e4
LT		 5208}
5209
e9ca75b5 5210static void cciss_shutdown(struct pci_dev *pdev)
1da177e4 5211{
29009a03
SC		 5212 ctlr_info_t *h;
5213 char *flush_buf;
7c832835 5214 int return_code;
1da177e4 5215
29009a03
SC		 5216 h = pci_get_drvdata(pdev);
5217 flush_buf = kzalloc(4, GFP_KERNEL);
5218 if (!flush_buf) {
b2a4a43d 5219 dev_warn(&h->pdev->dev, "cache not flushed, out of memory.\n");
e9ca75b5 5220 return;
e9ca75b5 5221 }
29009a03 5222 /* write all data in the battery backed cache to disk */
f70dba83 5223 return_code = sendcmd_withirq(h, CCISS_CACHE_FLUSH, flush_buf,
29009a03
SC		 5224 4, 0, CTLR_LUNID, TYPE_CMD);
5225 kfree(flush_buf);
5226 if (return_code != IO_OK)
b2a4a43d 5227 dev_warn(&h->pdev->dev, "Error flushing cache\n");
29009a03 5228 h->access.set_intr_mask(h, CCISS_INTR_OFF);
13049537 5229 free_irq(h->intr[h->intr_mode], h);
e9ca75b5
GB		 5230}
5231
8d85fce7 5232static int cciss_enter_simple_mode(struct ctlr_info *h)
13049537
JH		 5233{
5234 u32 trans_support;
5235
5236 trans_support = readl(&(h->cfgtable->TransportSupport));
5237 if (!(trans_support & SIMPLE_MODE))
5238 return -ENOTSUPP;
5239
5240 h->max_commands = readl(&(h->cfgtable->CmdsOutMax));
5241 writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
5242 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
5243 cciss_wait_for_mode_change_ack(h);
5244 print_cfg_table(h);
5245 if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) {
5246 dev_warn(&h->pdev->dev, "unable to get board into simple mode\n");
5247 return -ENODEV;
5248 }
5249 h->transMethod = CFGTBL_Trans_Simple;
5250 return 0;
5251}
5252
5253
8d85fce7 5254static void cciss_remove_one(struct pci_dev *pdev)
e9ca75b5 5255{
f70dba83 5256 ctlr_info_t *h;
e9ca75b5
GB		 5257 int i, j;
5258
7c832835 5259 if (pci_get_drvdata(pdev) == NULL) {
b2a4a43d 5260 dev_err(&pdev->dev, "Unable to remove device\n");
1da177e4
LT		 5261 return;
5262 }
0a9279cc 5263
f70dba83
SC		 5264 h = pci_get_drvdata(pdev);
5265 i = h->ctlr;
7c832835 5266 if (hba[i] == NULL) {
b2a4a43d 5267 dev_err(&pdev->dev, "device appears to already be removed\n");
1da177e4
LT		 5268 return;
5269 }
b6550777 5270
f70dba83 5271 mutex_lock(&h->busy_shutting_down);
0a9279cc 5272
f70dba83
SC		 5273 remove_from_scan_list(h);
5274 remove_proc_entry(h->devname, proc_cciss);
5275 unregister_blkdev(h->major, h->devname);
b6550777
BH		 5276
5277 /* remove it from the disk list */
5278 for (j = 0; j < CISS_MAX_LUN; j++) {
f70dba83 5279 struct gendisk *disk = h->gendisk[j];
b6550777 5280 if (disk) {
165125e1 5281 struct request_queue *q = disk->queue;
b6550777 5282
097d0264 5283 if (disk->flags & GENHD_FL_UP) {
f70dba83 5284 cciss_destroy_ld_sysfs_entry(h, j, 1);
b6550777 5285 del_gendisk(disk);
097d0264 5286 }
b6550777
BH		 5287 if (q)
5288 blk_cleanup_queue(q);
5289 }
5290 }
5291
ba198efb 5292#ifdef CONFIG_CISS_SCSI_TAPE
f70dba83 5293 cciss_unregister_scsi(h); /* unhook from SCSI subsystem */
ba198efb 5294#endif
b6550777 5295
e9ca75b5 5296 cciss_shutdown(pdev);
fb86a35b
MM		 5297
5298#ifdef CONFIG_PCI_MSI
f70dba83
SC		 5299 if (h->msix_vector)
5300 pci_disable_msix(h->pdev);
5301 else if (h->msi_vector)
5302 pci_disable_msi(h->pdev);
7c832835 5303#endif /* CONFIG_PCI_MSI */
fb86a35b 5304
f70dba83
SC		 5305 iounmap(h->transtable);
5306 iounmap(h->cfgtable);
5307 iounmap(h->vaddr);
1da177e4 5308
54dae343 5309 cciss_free_cmd_pool(h);
5c07a311 5310 /* Free up sg elements */
f70dba83
SC		 5311 for (j = 0; j < h->nr_cmds; j++)
5312 kfree(h->scatter_list[j]);
5313 kfree(h->scatter_list);
5314 cciss_free_sg_chain_blocks(h->cmd_sg_list, h->nr_cmds);
e363e014
SC		 5315 kfree(h->blockFetchTable);
5316 if (h->reply_pool)
5317 pci_free_consistent(h->pdev, h->max_commands * sizeof(__u64),
5318 h->reply_pool, h->reply_pool_dhandle);
872225ca
MM		 5319 /*
5320 * Deliberately omit pci_disable_device(): it does something nasty to
5321 * Smart Array controllers that pci_enable_device does not undo
5322 */
7c832835 5323 pci_release_regions(pdev);
4e570309 5324 pci_set_drvdata(pdev, NULL);
f70dba83
SC		 5325 cciss_destroy_hba_sysfs_entry(h);
5326 mutex_unlock(&h->busy_shutting_down);
5327 free_hba(h);
7c832835 5328}
1da177e4
LT		 5329
5330static struct pci_driver cciss_pci_driver = {
7c832835
BH		 5331 .name = "cciss",
5332 .probe = cciss_init_one,
8d85fce7 5333 .remove = cciss_remove_one,
7c832835 5334 .id_table = cciss_pci_device_id, /* id_table */
e9ca75b5 5335 .shutdown = cciss_shutdown,
1da177e4
LT		 5336};
5337
5338/*
5339 * This is it. Register the PCI driver information for the cards we control
7c832835 5340 * the OS will call our registered routines when it finds one of our cards.
1da177e4
LT		 5341 */
5342static int __init cciss_init(void)
5343{
7fe06326
AP		 5344 int err;
5345
10cbda97
JA		 5346 /*
5347 * The hardware requires that commands are aligned on a 64-bit
5348 * boundary. Given that we use pci_alloc_consistent() to allocate an
5349 * array of them, the size must be a multiple of 8 bytes.
5350 */
1b7d0d28 5351 BUILD_BUG_ON(sizeof(CommandList_struct) % COMMANDLIST_ALIGNMENT);
1da177e4
LT		 5352 printk(KERN_INFO DRIVER_NAME "\n");
5353
7fe06326
AP		 5354 err = bus_register(&cciss_bus_type);
5355 if (err)
5356 return err;
5357
b368c9dd
AP		 5358 /* Start the scan thread */
5359 cciss_scan_thread = kthread_run(scan_thread, NULL, "cciss_scan");
5360 if (IS_ERR(cciss_scan_thread)) {
5361 err = PTR_ERR(cciss_scan_thread);
5362 goto err_bus_unregister;
5363 }
5364
1da177e4 5365 /* Register for our PCI devices */
7fe06326
AP		 5366 err = pci_register_driver(&cciss_pci_driver);
5367 if (err)
b368c9dd 5368 goto err_thread_stop;
7fe06326 5369
617e1344 5370 return err;
7fe06326 5371
b368c9dd
AP		 5372err_thread_stop:
5373 kthread_stop(cciss_scan_thread);
5374err_bus_unregister:
7fe06326 5375 bus_unregister(&cciss_bus_type);
b368c9dd 5376
7fe06326 5377 return err;
1da177e4
LT		 5378}
5379
5380static void __exit cciss_cleanup(void)
5381{
5382 int i;
5383
5384 pci_unregister_driver(&cciss_pci_driver);
5385 /* double check that all controller entrys have been removed */
7c832835
BH		 5386 for (i = 0; i < MAX_CTLR; i++) {
5387 if (hba[i] != NULL) {
b2a4a43d
SC		 5388 dev_warn(&hba[i]->pdev->dev,
5389 "had to remove controller\n");
1da177e4
LT		 5390 cciss_remove_one(hba[i]->pdev);
5391 }
5392 }
b368c9dd 5393 kthread_stop(cciss_scan_thread);
90fdb0b9
JA		 5394 if (proc_cciss)
5395 remove_proc_entry("driver/cciss", NULL);
7fe06326 5396 bus_unregister(&cciss_bus_type);
1da177e4
LT		 5397}
5398
5399module_init(cciss_init);
5400module_exit(cciss_cleanup);
Linux 6.x block layer and io_uring tree(s)