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[linux-block.git] / drivers / block / DAC960.c
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1da177e4
LT		 1/*
2
3 Linux Driver for Mylex DAC960/AcceleRAID/eXtremeRAID PCI RAID Controllers
4
5 Copyright 1998-2001 by Leonard N. Zubkoff <lnz@dandelion.com>
5b76ffd5 6 Portions Copyright 2002 by Mylex (An IBM Business Unit)
1da177e4
LT		 7
8 This program is free software; you may redistribute and/or modify it under
9 the terms of the GNU General Public License Version 2 as published by the
10 Free Software Foundation.
11
12 This program is distributed in the hope that it will be useful, but
13 WITHOUT ANY WARRANTY, without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
15 for complete details.
16
17*/
18
19
868047fc
MW		 20#define DAC960_DriverVersion "2.5.49"
21#define DAC960_DriverDate "21 Aug 2007"
1da177e4
LT		 22
23
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/miscdevice.h>
27#include <linux/blkdev.h>
28#include <linux/bio.h>
29#include <linux/completion.h>
30#include <linux/delay.h>
31#include <linux/genhd.h>
32#include <linux/hdreg.h>
33#include <linux/blkpg.h>
3558c9b3 34#include <linux/dma-mapping.h>
1da177e4
LT		 35#include <linux/interrupt.h>
36#include <linux/ioport.h>
37#include <linux/mm.h>
38#include <linux/slab.h>
2a48fc0a 39#include <linux/mutex.h>
1da177e4 40#include <linux/proc_fs.h>
d5d03eec 41#include <linux/seq_file.h>
1da177e4
LT		 42#include <linux/reboot.h>
43#include <linux/spinlock.h>
44#include <linux/timer.h>
45#include <linux/pci.h>
46#include <linux/init.h>
50297cbf 47#include <linux/jiffies.h>
62287fbb 48#include <linux/random.h>
11763609 49#include <linux/scatterlist.h>
1da177e4 50#include <asm/io.h>
7c0f6ba6 51#include <linux/uaccess.h>
1da177e4
LT		 52#include "DAC960.h"
53
54#define DAC960_GAM_MINOR 252
55
56
2a48fc0a 57static DEFINE_MUTEX(DAC960_mutex);
1da177e4
LT		 58static DAC960_Controller_T *DAC960_Controllers[DAC960_MaxControllers];
59static int DAC960_ControllerCount;
60static struct proc_dir_entry *DAC960_ProcDirectoryEntry;
61
62static long disk_size(DAC960_Controller_T *p, int drive_nr)
63{
64 if (p->FirmwareType == DAC960_V1_Controller) {
65 if (drive_nr >= p->LogicalDriveCount)
66 return 0;
67 return p->V1.LogicalDriveInformation[drive_nr].
68 LogicalDriveSize;
69 } else {
70 DAC960_V2_LogicalDeviceInfo_T *i =
71 p->V2.LogicalDeviceInformation[drive_nr];
72 if (i == NULL)
73 return 0;
74 return i->ConfigurableDeviceSize;
75 }
76}
77
b564f027 78static int DAC960_open(struct block_device *bdev, fmode_t mode)
1da177e4 79{
b564f027 80 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 81 DAC960_Controller_T *p = disk->queue->queuedata;
82 int drive_nr = (long)disk->private_data;
6e9624b8 83 int ret = -ENXIO;
1da177e4 84
2a48fc0a 85 mutex_lock(&DAC960_mutex);
1da177e4
LT		 86 if (p->FirmwareType == DAC960_V1_Controller) {
87 if (p->V1.LogicalDriveInformation[drive_nr].
88 LogicalDriveState == DAC960_V1_LogicalDrive_Offline)
6e9624b8 89 goto out;
1da177e4
LT		 90 } else {
91 DAC960_V2_LogicalDeviceInfo_T *i =
92 p->V2.LogicalDeviceInformation[drive_nr];
93 if (!i || i->LogicalDeviceState == DAC960_V2_LogicalDevice_Offline)
6e9624b8 94 goto out;
1da177e4
LT		 95 }
96
b564f027 97 check_disk_change(bdev);
1da177e4
LT		 98
99 if (!get_capacity(p->disks[drive_nr]))
6e9624b8
AB		 100 goto out;
101 ret = 0;
102out:
2a48fc0a 103 mutex_unlock(&DAC960_mutex);
6e9624b8 104 return ret;
1da177e4
LT		 105}
106
a885c8c4 107static int DAC960_getgeo(struct block_device *bdev, struct hd_geometry *geo)
1da177e4 108{
a885c8c4 109 struct gendisk *disk = bdev->bd_disk;
1da177e4
LT		 110 DAC960_Controller_T *p = disk->queue->queuedata;
111 int drive_nr = (long)disk->private_data;
1da177e4
LT		 112
113 if (p->FirmwareType == DAC960_V1_Controller) {
a885c8c4
CH		 114 geo->heads = p->V1.GeometryTranslationHeads;
115 geo->sectors = p->V1.GeometryTranslationSectors;
116 geo->cylinders = p->V1.LogicalDriveInformation[drive_nr].
117 LogicalDriveSize / (geo->heads * geo->sectors);
1da177e4
LT		 118 } else {
119 DAC960_V2_LogicalDeviceInfo_T *i =
120 p->V2.LogicalDeviceInformation[drive_nr];
121 switch (i->DriveGeometry) {
122 case DAC960_V2_Geometry_128_32:
a885c8c4
CH		 123 geo->heads = 128;
124 geo->sectors = 32;
1da177e4
LT		 125 break;
126 case DAC960_V2_Geometry_255_63:
a885c8c4
CH		 127 geo->heads = 255;
128 geo->sectors = 63;
1da177e4
LT		 129 break;
130 default:
131 DAC960_Error("Illegal Logical Device Geometry %d\n",
132 p, i->DriveGeometry);
133 return -EINVAL;
134 }
135
a885c8c4
CH		 136 geo->cylinders = i->ConfigurableDeviceSize /
137 (geo->heads * geo->sectors);
1da177e4
LT		 138 }
139
a885c8c4 140 return 0;
1da177e4
LT		 141}
142
507daea2
TH		 143static unsigned int DAC960_check_events(struct gendisk *disk,
144 unsigned int clearing)
1da177e4
LT		 145{
146 DAC960_Controller_T *p = disk->queue->queuedata;
147 int drive_nr = (long)disk->private_data;
148
149 if (!p->LogicalDriveInitiallyAccessible[drive_nr])
507daea2 150 return DISK_EVENT_MEDIA_CHANGE;
1da177e4
LT		 151 return 0;
152}
153
154static int DAC960_revalidate_disk(struct gendisk *disk)
155{
156 DAC960_Controller_T *p = disk->queue->queuedata;
157 int unit = (long)disk->private_data;
158
159 set_capacity(disk, disk_size(p, unit));
160 return 0;
161}
162
83d5cde4 163static const struct block_device_operations DAC960_BlockDeviceOperations = {
1da177e4 164 .owner = THIS_MODULE,
b564f027 165 .open = DAC960_open,
a885c8c4 166 .getgeo = DAC960_getgeo,
507daea2 167 .check_events = DAC960_check_events,
1da177e4
LT		 168 .revalidate_disk = DAC960_revalidate_disk,
169};
170
171
172/*
173 DAC960_AnnounceDriver announces the Driver Version and Date, Author's Name,
174 Copyright Notice, and Electronic Mail Address.
175*/
176
177static void DAC960_AnnounceDriver(DAC960_Controller_T *Controller)
178{
179 DAC960_Announce("***** DAC960 RAID Driver Version "
180 DAC960_DriverVersion " of "
181 DAC960_DriverDate " *****\n", Controller);
182 DAC960_Announce("Copyright 1998-2001 by Leonard N. Zubkoff "
183 "<lnz@dandelion.com>\n", Controller);
184}
185
186
187/*
188 DAC960_Failure prints a standardized error message, and then returns false.
189*/
190
87d156bf 191static bool DAC960_Failure(DAC960_Controller_T *Controller,
1da177e4
LT		 192 unsigned char *ErrorMessage)
193{
194 DAC960_Error("While configuring DAC960 PCI RAID Controller at\n",
195 Controller);
196 if (Controller->IO_Address == 0)
197 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
198 "PCI Address 0x%X\n", Controller,
199 Controller->Bus, Controller->Device,
200 Controller->Function, Controller->PCI_Address);
201 else DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
202 "0x%X PCI Address 0x%X\n", Controller,
203 Controller->Bus, Controller->Device,
204 Controller->Function, Controller->IO_Address,
205 Controller->PCI_Address);
206 DAC960_Error("%s FAILED - DETACHING\n", Controller, ErrorMessage);
207 return false;
208}
209
210/*
211 init_dma_loaf() and slice_dma_loaf() are helper functions for
212 aggregating the dma-mapped memory for a well-known collection of
213 data structures that are of different lengths.
214
215 These routines don't guarantee any alignment. The caller must
216 include any space needed for alignment in the sizes of the structures
217 that are passed in.
218 */
219
87d156bf 220static bool init_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf,
1da177e4
LT		 221 size_t len)
222{
223 void *cpu_addr;
224 dma_addr_t dma_handle;
225
226 cpu_addr = pci_alloc_consistent(dev, len, &dma_handle);
227 if (cpu_addr == NULL)
228 return false;
229
230 loaf->cpu_free = loaf->cpu_base = cpu_addr;
231 loaf->dma_free =loaf->dma_base = dma_handle;
232 loaf->length = len;
233 memset(cpu_addr, 0, len);
234 return true;
235}
236
237static void *slice_dma_loaf(struct dma_loaf *loaf, size_t len,
238 dma_addr_t *dma_handle)
239{
240 void *cpu_end = loaf->cpu_free + len;
241 void *cpu_addr = loaf->cpu_free;
242
089fe1b2 243 BUG_ON(cpu_end > loaf->cpu_base + loaf->length);
1da177e4
LT		 244 *dma_handle = loaf->dma_free;
245 loaf->cpu_free = cpu_end;
246 loaf->dma_free += len;
247 return cpu_addr;
248}
249
250static void free_dma_loaf(struct pci_dev *dev, struct dma_loaf *loaf_handle)
251{
252 if (loaf_handle->cpu_base != NULL)
253 pci_free_consistent(dev, loaf_handle->length,
254 loaf_handle->cpu_base, loaf_handle->dma_base);
255}
256
257
258/*
259 DAC960_CreateAuxiliaryStructures allocates and initializes the auxiliary
260 data structures for Controller. It returns true on success and false on
261 failure.
262*/
263
87d156bf 264static bool DAC960_CreateAuxiliaryStructures(DAC960_Controller_T *Controller)
1da177e4
LT		 265{
266 int CommandAllocationLength, CommandAllocationGroupSize;
267 int CommandsRemaining = 0, CommandIdentifier, CommandGroupByteCount;
268 void *AllocationPointer = NULL;
269 void *ScatterGatherCPU = NULL;
270 dma_addr_t ScatterGatherDMA;
4695a1ad 271 struct dma_pool *ScatterGatherPool;
1da177e4
LT		 272 void *RequestSenseCPU = NULL;
273 dma_addr_t RequestSenseDMA;
4695a1ad 274 struct dma_pool *RequestSensePool = NULL;
1da177e4
LT		 275
276 if (Controller->FirmwareType == DAC960_V1_Controller)
277 {
278 CommandAllocationLength = offsetof(DAC960_Command_T, V1.EndMarker);
279 CommandAllocationGroupSize = DAC960_V1_CommandAllocationGroupSize;
4695a1ad
RP		 280 ScatterGatherPool = dma_pool_create("DAC960_V1_ScatterGather",
281 &Controller->PCIDevice->dev,
1da177e4
LT		 282 DAC960_V1_ScatterGatherLimit * sizeof(DAC960_V1_ScatterGatherSegment_T),
283 sizeof(DAC960_V1_ScatterGatherSegment_T), 0);
284 if (ScatterGatherPool == NULL)
285 return DAC960_Failure(Controller,
286 "AUXILIARY STRUCTURE CREATION (SG)");
287 Controller->ScatterGatherPool = ScatterGatherPool;
288 }
289 else
290 {
291 CommandAllocationLength = offsetof(DAC960_Command_T, V2.EndMarker);
292 CommandAllocationGroupSize = DAC960_V2_CommandAllocationGroupSize;
4695a1ad
RP		 293 ScatterGatherPool = dma_pool_create("DAC960_V2_ScatterGather",
294 &Controller->PCIDevice->dev,
1da177e4
LT		 295 DAC960_V2_ScatterGatherLimit * sizeof(DAC960_V2_ScatterGatherSegment_T),
296 sizeof(DAC960_V2_ScatterGatherSegment_T), 0);
297 if (ScatterGatherPool == NULL)
298 return DAC960_Failure(Controller,
299 "AUXILIARY STRUCTURE CREATION (SG)");
4695a1ad
RP		 300 RequestSensePool = dma_pool_create("DAC960_V2_RequestSense",
301 &Controller->PCIDevice->dev, sizeof(DAC960_SCSI_RequestSense_T),
1da177e4
LT		 302 sizeof(int), 0);
303 if (RequestSensePool == NULL) {
4695a1ad 304 dma_pool_destroy(ScatterGatherPool);
1da177e4
LT		 305 return DAC960_Failure(Controller,
306 "AUXILIARY STRUCTURE CREATION (SG)");
307 }
308 Controller->ScatterGatherPool = ScatterGatherPool;
309 Controller->V2.RequestSensePool = RequestSensePool;
310 }
311 Controller->CommandAllocationGroupSize = CommandAllocationGroupSize;
312 Controller->FreeCommands = NULL;
313 for (CommandIdentifier = 1;
314 CommandIdentifier <= Controller->DriverQueueDepth;
315 CommandIdentifier++)
316 {
317 DAC960_Command_T *Command;
318 if (--CommandsRemaining <= 0)
319 {
320 CommandsRemaining =
321 Controller->DriverQueueDepth - CommandIdentifier + 1;
322 if (CommandsRemaining > CommandAllocationGroupSize)
323 CommandsRemaining = CommandAllocationGroupSize;
324 CommandGroupByteCount =
325 CommandsRemaining * CommandAllocationLength;
06ff37ff 326 AllocationPointer = kzalloc(CommandGroupByteCount, GFP_ATOMIC);
1da177e4
LT		 327 if (AllocationPointer == NULL)
328 return DAC960_Failure(Controller,
329 "AUXILIARY STRUCTURE CREATION");
1da177e4
LT		 330 }
331 Command = (DAC960_Command_T *) AllocationPointer;
332 AllocationPointer += CommandAllocationLength;
333 Command->CommandIdentifier = CommandIdentifier;
334 Command->Controller = Controller;
335 Command->Next = Controller->FreeCommands;
336 Controller->FreeCommands = Command;
337 Controller->Commands[CommandIdentifier-1] = Command;
4695a1ad 338 ScatterGatherCPU = dma_pool_alloc(ScatterGatherPool, GFP_ATOMIC,
1da177e4
LT		 339 &ScatterGatherDMA);
340 if (ScatterGatherCPU == NULL)
341 return DAC960_Failure(Controller, "AUXILIARY STRUCTURE CREATION");
342
343 if (RequestSensePool != NULL) {
4695a1ad 344 RequestSenseCPU = dma_pool_alloc(RequestSensePool, GFP_ATOMIC,
1da177e4
LT		 345 &RequestSenseDMA);
346 if (RequestSenseCPU == NULL) {
4695a1ad 347 dma_pool_free(ScatterGatherPool, ScatterGatherCPU,
1da177e4
LT		 348 ScatterGatherDMA);
349 return DAC960_Failure(Controller,
350 "AUXILIARY STRUCTURE CREATION");
351 }
352 }
353 if (Controller->FirmwareType == DAC960_V1_Controller) {
354 Command->cmd_sglist = Command->V1.ScatterList;
355 Command->V1.ScatterGatherList =
356 (DAC960_V1_ScatterGatherSegment_T *)ScatterGatherCPU;
357 Command->V1.ScatterGatherListDMA = ScatterGatherDMA;
45711f1a 358 sg_init_table(Command->cmd_sglist, DAC960_V1_ScatterGatherLimit);
1da177e4
LT		 359 } else {
360 Command->cmd_sglist = Command->V2.ScatterList;
361 Command->V2.ScatterGatherList =
362 (DAC960_V2_ScatterGatherSegment_T *)ScatterGatherCPU;
363 Command->V2.ScatterGatherListDMA = ScatterGatherDMA;
364 Command->V2.RequestSense =
365 (DAC960_SCSI_RequestSense_T *)RequestSenseCPU;
366 Command->V2.RequestSenseDMA = RequestSenseDMA;
45711f1a 367 sg_init_table(Command->cmd_sglist, DAC960_V2_ScatterGatherLimit);
1da177e4
LT		 368 }
369 }
370 return true;
371}
372
373
374/*
375 DAC960_DestroyAuxiliaryStructures deallocates the auxiliary data
376 structures for Controller.
377*/
378
379static void DAC960_DestroyAuxiliaryStructures(DAC960_Controller_T *Controller)
380{
381 int i;
4695a1ad
RP		 382 struct dma_pool *ScatterGatherPool = Controller->ScatterGatherPool;
383 struct dma_pool *RequestSensePool = NULL;
1da177e4
LT		 384 void *ScatterGatherCPU;
385 dma_addr_t ScatterGatherDMA;
386 void *RequestSenseCPU;
387 dma_addr_t RequestSenseDMA;
388 DAC960_Command_T *CommandGroup = NULL;
389
390
391 if (Controller->FirmwareType == DAC960_V2_Controller)
392 RequestSensePool = Controller->V2.RequestSensePool;
393
394 Controller->FreeCommands = NULL;
395 for (i = 0; i < Controller->DriverQueueDepth; i++)
396 {
397 DAC960_Command_T *Command = Controller->Commands[i];
398
399 if (Command == NULL)
400 continue;
401
402 if (Controller->FirmwareType == DAC960_V1_Controller) {
403 ScatterGatherCPU = (void *)Command->V1.ScatterGatherList;
404 ScatterGatherDMA = Command->V1.ScatterGatherListDMA;
405 RequestSenseCPU = NULL;
406 RequestSenseDMA = (dma_addr_t)0;
407 } else {
408 ScatterGatherCPU = (void *)Command->V2.ScatterGatherList;
409 ScatterGatherDMA = Command->V2.ScatterGatherListDMA;
410 RequestSenseCPU = (void *)Command->V2.RequestSense;
411 RequestSenseDMA = Command->V2.RequestSenseDMA;
412 }
413 if (ScatterGatherCPU != NULL)
4695a1ad 414 dma_pool_free(ScatterGatherPool, ScatterGatherCPU, ScatterGatherDMA);
1da177e4 415 if (RequestSenseCPU != NULL)
4695a1ad 416 dma_pool_free(RequestSensePool, RequestSenseCPU, RequestSenseDMA);
1da177e4
LT		 417
418 if ((Command->CommandIdentifier
419 % Controller->CommandAllocationGroupSize) == 1) {
420 /*
421 * We can't free the group of commands until all of the
422 * request sense and scatter gather dma structures are free.
423 * Remember the beginning of the group, but don't free it
424 * until we've reached the beginning of the next group.
425 */
6044ec88
JJ		 426 kfree(CommandGroup);
427 CommandGroup = Command;
1da177e4
LT		 428 }
429 Controller->Commands[i] = NULL;
430 }
6044ec88 431 kfree(CommandGroup);
1da177e4
LT		 432
433 if (Controller->CombinedStatusBuffer != NULL)
434 {
435 kfree(Controller->CombinedStatusBuffer);
436 Controller->CombinedStatusBuffer = NULL;
437 Controller->CurrentStatusBuffer = NULL;
438 }
439
4695a1ad 440 dma_pool_destroy(ScatterGatherPool);
6044ec88
JJ		 441 if (Controller->FirmwareType == DAC960_V1_Controller)
442 return;
1da177e4 443
4695a1ad 444 dma_pool_destroy(RequestSensePool);
1da177e4 445
6044ec88 446 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
1da177e4
LT		 447 kfree(Controller->V2.LogicalDeviceInformation[i]);
448 Controller->V2.LogicalDeviceInformation[i] = NULL;
6044ec88 449 }
1da177e4
LT		 450
451 for (i = 0; i < DAC960_V2_MaxPhysicalDevices; i++)
452 {
6044ec88
JJ		 453 kfree(Controller->V2.PhysicalDeviceInformation[i]);
454 Controller->V2.PhysicalDeviceInformation[i] = NULL;
455 kfree(Controller->V2.InquiryUnitSerialNumber[i]);
456 Controller->V2.InquiryUnitSerialNumber[i] = NULL;
1da177e4
LT		 457 }
458}
459
460
461/*
462 DAC960_V1_ClearCommand clears critical fields of Command for DAC960 V1
463 Firmware Controllers.
464*/
465
466static inline void DAC960_V1_ClearCommand(DAC960_Command_T *Command)
467{
468 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
469 memset(CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
470 Command->V1.CommandStatus = 0;
471}
472
473
474/*
475 DAC960_V2_ClearCommand clears critical fields of Command for DAC960 V2
476 Firmware Controllers.
477*/
478
479static inline void DAC960_V2_ClearCommand(DAC960_Command_T *Command)
480{
481 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
482 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
483 Command->V2.CommandStatus = 0;
484}
485
486
487/*
488 DAC960_AllocateCommand allocates a Command structure from Controller's
489 free list. During driver initialization, a special initialization command
490 has been placed on the free list to guarantee that command allocation can
491 never fail.
492*/
493
494static inline DAC960_Command_T *DAC960_AllocateCommand(DAC960_Controller_T
495 *Controller)
496{
497 DAC960_Command_T *Command = Controller->FreeCommands;
498 if (Command == NULL) return NULL;
499 Controller->FreeCommands = Command->Next;
500 Command->Next = NULL;
501 return Command;
502}
503
504
505/*
506 DAC960_DeallocateCommand deallocates Command, returning it to Controller's
507 free list.
508*/
509
510static inline void DAC960_DeallocateCommand(DAC960_Command_T *Command)
511{
512 DAC960_Controller_T *Controller = Command->Controller;
513
514 Command->Request = NULL;
515 Command->Next = Controller->FreeCommands;
516 Controller->FreeCommands = Command;
517}
518
519
520/*
521 DAC960_WaitForCommand waits for a wake_up on Controller's Command Wait Queue.
522*/
523
524static void DAC960_WaitForCommand(DAC960_Controller_T *Controller)
525{
526 spin_unlock_irq(&Controller->queue_lock);
527 __wait_event(Controller->CommandWaitQueue, Controller->FreeCommands);
528 spin_lock_irq(&Controller->queue_lock);
529}
530
5b76ffd5
CH		 531/*
532 DAC960_GEM_QueueCommand queues Command for DAC960 GEM Series Controllers.
533*/
534
535static void DAC960_GEM_QueueCommand(DAC960_Command_T *Command)
536{
537 DAC960_Controller_T *Controller = Command->Controller;
538 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
539 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
540 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
541 Controller->V2.NextCommandMailbox;
542
543 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
544 DAC960_GEM_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
545
546 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
547 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
548 DAC960_GEM_MemoryMailboxNewCommand(ControllerBaseAddress);
549
550 Controller->V2.PreviousCommandMailbox2 =
551 Controller->V2.PreviousCommandMailbox1;
552 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
553
554 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
555 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
556
557 Controller->V2.NextCommandMailbox = NextCommandMailbox;
558}
1da177e4
LT		 559
560/*
561 DAC960_BA_QueueCommand queues Command for DAC960 BA Series Controllers.
562*/
563
564static void DAC960_BA_QueueCommand(DAC960_Command_T *Command)
565{
566 DAC960_Controller_T *Controller = Command->Controller;
567 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
568 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
569 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
570 Controller->V2.NextCommandMailbox;
571 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
572 DAC960_BA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
573 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
574 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
575 DAC960_BA_MemoryMailboxNewCommand(ControllerBaseAddress);
576 Controller->V2.PreviousCommandMailbox2 =
577 Controller->V2.PreviousCommandMailbox1;
578 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
579 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
580 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
581 Controller->V2.NextCommandMailbox = NextCommandMailbox;
582}
583
584
585/*
586 DAC960_LP_QueueCommand queues Command for DAC960 LP Series Controllers.
587*/
588
589static void DAC960_LP_QueueCommand(DAC960_Command_T *Command)
590{
591 DAC960_Controller_T *Controller = Command->Controller;
592 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
593 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
594 DAC960_V2_CommandMailbox_T *NextCommandMailbox =
595 Controller->V2.NextCommandMailbox;
596 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
597 DAC960_LP_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
598 if (Controller->V2.PreviousCommandMailbox1->Words[0] == 0 ||
599 Controller->V2.PreviousCommandMailbox2->Words[0] == 0)
600 DAC960_LP_MemoryMailboxNewCommand(ControllerBaseAddress);
601 Controller->V2.PreviousCommandMailbox2 =
602 Controller->V2.PreviousCommandMailbox1;
603 Controller->V2.PreviousCommandMailbox1 = NextCommandMailbox;
604 if (++NextCommandMailbox > Controller->V2.LastCommandMailbox)
605 NextCommandMailbox = Controller->V2.FirstCommandMailbox;
606 Controller->V2.NextCommandMailbox = NextCommandMailbox;
607}
608
609
610/*
611 DAC960_LA_QueueCommandDualMode queues Command for DAC960 LA Series
612 Controllers with Dual Mode Firmware.
613*/
614
615static void DAC960_LA_QueueCommandDualMode(DAC960_Command_T *Command)
616{
617 DAC960_Controller_T *Controller = Command->Controller;
618 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
619 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
620 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
621 Controller->V1.NextCommandMailbox;
622 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
623 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
624 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
625 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
626 DAC960_LA_MemoryMailboxNewCommand(ControllerBaseAddress);
627 Controller->V1.PreviousCommandMailbox2 =
628 Controller->V1.PreviousCommandMailbox1;
629 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
630 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
631 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
632 Controller->V1.NextCommandMailbox = NextCommandMailbox;
633}
634
635
636/*
637 DAC960_LA_QueueCommandSingleMode queues Command for DAC960 LA Series
638 Controllers with Single Mode Firmware.
639*/
640
641static void DAC960_LA_QueueCommandSingleMode(DAC960_Command_T *Command)
642{
643 DAC960_Controller_T *Controller = Command->Controller;
644 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
645 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
646 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
647 Controller->V1.NextCommandMailbox;
648 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
649 DAC960_LA_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
650 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
651 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
652 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
653 Controller->V1.PreviousCommandMailbox2 =
654 Controller->V1.PreviousCommandMailbox1;
655 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
656 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
657 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
658 Controller->V1.NextCommandMailbox = NextCommandMailbox;
659}
660
661
662/*
663 DAC960_PG_QueueCommandDualMode queues Command for DAC960 PG Series
664 Controllers with Dual Mode Firmware.
665*/
666
667static void DAC960_PG_QueueCommandDualMode(DAC960_Command_T *Command)
668{
669 DAC960_Controller_T *Controller = Command->Controller;
670 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
671 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
672 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
673 Controller->V1.NextCommandMailbox;
674 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
675 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
676 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
677 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
678 DAC960_PG_MemoryMailboxNewCommand(ControllerBaseAddress);
679 Controller->V1.PreviousCommandMailbox2 =
680 Controller->V1.PreviousCommandMailbox1;
681 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
682 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
683 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
684 Controller->V1.NextCommandMailbox = NextCommandMailbox;
685}
686
687
688/*
689 DAC960_PG_QueueCommandSingleMode queues Command for DAC960 PG Series
690 Controllers with Single Mode Firmware.
691*/
692
693static void DAC960_PG_QueueCommandSingleMode(DAC960_Command_T *Command)
694{
695 DAC960_Controller_T *Controller = Command->Controller;
696 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
697 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
698 DAC960_V1_CommandMailbox_T *NextCommandMailbox =
699 Controller->V1.NextCommandMailbox;
700 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
701 DAC960_PG_WriteCommandMailbox(NextCommandMailbox, CommandMailbox);
702 if (Controller->V1.PreviousCommandMailbox1->Words[0] == 0 ||
703 Controller->V1.PreviousCommandMailbox2->Words[0] == 0)
704 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
705 Controller->V1.PreviousCommandMailbox2 =
706 Controller->V1.PreviousCommandMailbox1;
707 Controller->V1.PreviousCommandMailbox1 = NextCommandMailbox;
708 if (++NextCommandMailbox > Controller->V1.LastCommandMailbox)
709 NextCommandMailbox = Controller->V1.FirstCommandMailbox;
710 Controller->V1.NextCommandMailbox = NextCommandMailbox;
711}
712
713
714/*
715 DAC960_PD_QueueCommand queues Command for DAC960 PD Series Controllers.
716*/
717
718static void DAC960_PD_QueueCommand(DAC960_Command_T *Command)
719{
720 DAC960_Controller_T *Controller = Command->Controller;
721 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
722 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
723 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
724 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
725 udelay(1);
726 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
727 DAC960_PD_NewCommand(ControllerBaseAddress);
728}
729
730
731/*
732 DAC960_P_QueueCommand queues Command for DAC960 P Series Controllers.
733*/
734
735static void DAC960_P_QueueCommand(DAC960_Command_T *Command)
736{
737 DAC960_Controller_T *Controller = Command->Controller;
738 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
739 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
740 CommandMailbox->Common.CommandIdentifier = Command->CommandIdentifier;
741 switch (CommandMailbox->Common.CommandOpcode)
742 {
743 case DAC960_V1_Enquiry:
744 CommandMailbox->Common.CommandOpcode = DAC960_V1_Enquiry_Old;
745 break;
746 case DAC960_V1_GetDeviceState:
747 CommandMailbox->Common.CommandOpcode = DAC960_V1_GetDeviceState_Old;
748 break;
749 case DAC960_V1_Read:
750 CommandMailbox->Common.CommandOpcode = DAC960_V1_Read_Old;
751 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
752 break;
753 case DAC960_V1_Write:
754 CommandMailbox->Common.CommandOpcode = DAC960_V1_Write_Old;
755 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
756 break;
757 case DAC960_V1_ReadWithScatterGather:
758 CommandMailbox->Common.CommandOpcode =
759 DAC960_V1_ReadWithScatterGather_Old;
760 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
761 break;
762 case DAC960_V1_WriteWithScatterGather:
763 CommandMailbox->Common.CommandOpcode =
764 DAC960_V1_WriteWithScatterGather_Old;
765 DAC960_PD_To_P_TranslateReadWriteCommand(CommandMailbox);
766 break;
767 default:
768 break;
769 }
770 while (DAC960_PD_MailboxFullP(ControllerBaseAddress))
771 udelay(1);
772 DAC960_PD_WriteCommandMailbox(ControllerBaseAddress, CommandMailbox);
773 DAC960_PD_NewCommand(ControllerBaseAddress);
774}
775
776
777/*
778 DAC960_ExecuteCommand executes Command and waits for completion.
779*/
780
781static void DAC960_ExecuteCommand(DAC960_Command_T *Command)
782{
783 DAC960_Controller_T *Controller = Command->Controller;
6e9a4738 784 DECLARE_COMPLETION_ONSTACK(Completion);
1da177e4
LT		 785 unsigned long flags;
786 Command->Completion = &Completion;
787
788 spin_lock_irqsave(&Controller->queue_lock, flags);
789 DAC960_QueueCommand(Command);
790 spin_unlock_irqrestore(&Controller->queue_lock, flags);
791
792 if (in_interrupt())
793 return;
794 wait_for_completion(&Completion);
795}
796
797
798/*
799 DAC960_V1_ExecuteType3 executes a DAC960 V1 Firmware Controller Type 3
800 Command and waits for completion. It returns true on success and false
801 on failure.
802*/
803
87d156bf 804static bool DAC960_V1_ExecuteType3(DAC960_Controller_T *Controller,
1da177e4
LT		 805 DAC960_V1_CommandOpcode_T CommandOpcode,
806 dma_addr_t DataDMA)
807{
808 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
809 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
810 DAC960_V1_CommandStatus_T CommandStatus;
811 DAC960_V1_ClearCommand(Command);
812 Command->CommandType = DAC960_ImmediateCommand;
813 CommandMailbox->Type3.CommandOpcode = CommandOpcode;
814 CommandMailbox->Type3.BusAddress = DataDMA;
815 DAC960_ExecuteCommand(Command);
816 CommandStatus = Command->V1.CommandStatus;
817 DAC960_DeallocateCommand(Command);
818 return (CommandStatus == DAC960_V1_NormalCompletion);
819}
820
821
822/*
823 DAC960_V1_ExecuteTypeB executes a DAC960 V1 Firmware Controller Type 3B
824 Command and waits for completion. It returns true on success and false
825 on failure.
826*/
827
87d156bf 828static bool DAC960_V1_ExecuteType3B(DAC960_Controller_T *Controller,
1da177e4
LT		 829 DAC960_V1_CommandOpcode_T CommandOpcode,
830 unsigned char CommandOpcode2,
831 dma_addr_t DataDMA)
832{
833 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
834 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
835 DAC960_V1_CommandStatus_T CommandStatus;
836 DAC960_V1_ClearCommand(Command);
837 Command->CommandType = DAC960_ImmediateCommand;
838 CommandMailbox->Type3B.CommandOpcode = CommandOpcode;
839 CommandMailbox->Type3B.CommandOpcode2 = CommandOpcode2;
840 CommandMailbox->Type3B.BusAddress = DataDMA;
841 DAC960_ExecuteCommand(Command);
842 CommandStatus = Command->V1.CommandStatus;
843 DAC960_DeallocateCommand(Command);
844 return (CommandStatus == DAC960_V1_NormalCompletion);
845}
846
847
848/*
849 DAC960_V1_ExecuteType3D executes a DAC960 V1 Firmware Controller Type 3D
850 Command and waits for completion. It returns true on success and false
851 on failure.
852*/
853
87d156bf 854static bool DAC960_V1_ExecuteType3D(DAC960_Controller_T *Controller,
1da177e4
LT		 855 DAC960_V1_CommandOpcode_T CommandOpcode,
856 unsigned char Channel,
857 unsigned char TargetID,
858 dma_addr_t DataDMA)
859{
860 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
861 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
862 DAC960_V1_CommandStatus_T CommandStatus;
863 DAC960_V1_ClearCommand(Command);
864 Command->CommandType = DAC960_ImmediateCommand;
865 CommandMailbox->Type3D.CommandOpcode = CommandOpcode;
866 CommandMailbox->Type3D.Channel = Channel;
867 CommandMailbox->Type3D.TargetID = TargetID;
868 CommandMailbox->Type3D.BusAddress = DataDMA;
869 DAC960_ExecuteCommand(Command);
870 CommandStatus = Command->V1.CommandStatus;
871 DAC960_DeallocateCommand(Command);
872 return (CommandStatus == DAC960_V1_NormalCompletion);
873}
874
875
876/*
877 DAC960_V2_GeneralInfo executes a DAC960 V2 Firmware General Information
878 Reading IOCTL Command and waits for completion. It returns true on success
879 and false on failure.
880
881 Return data in The controller's HealthStatusBuffer, which is dma-able memory
882*/
883
87d156bf 884static bool DAC960_V2_GeneralInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 885{
886 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
887 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
888 DAC960_V2_CommandStatus_T CommandStatus;
889 DAC960_V2_ClearCommand(Command);
890 Command->CommandType = DAC960_ImmediateCommand;
891 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
892 CommandMailbox->Common.CommandControlBits
893 .DataTransferControllerToHost = true;
894 CommandMailbox->Common.CommandControlBits
895 .NoAutoRequestSense = true;
896 CommandMailbox->Common.DataTransferSize = sizeof(DAC960_V2_HealthStatusBuffer_T);
897 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_GetHealthStatus;
898 CommandMailbox->Common.DataTransferMemoryAddress
899 .ScatterGatherSegments[0]
900 .SegmentDataPointer =
901 Controller->V2.HealthStatusBufferDMA;
902 CommandMailbox->Common.DataTransferMemoryAddress
903 .ScatterGatherSegments[0]
904 .SegmentByteCount =
905 CommandMailbox->Common.DataTransferSize;
906 DAC960_ExecuteCommand(Command);
907 CommandStatus = Command->V2.CommandStatus;
908 DAC960_DeallocateCommand(Command);
909 return (CommandStatus == DAC960_V2_NormalCompletion);
910}
911
912
913/*
914 DAC960_V2_ControllerInfo executes a DAC960 V2 Firmware Controller
915 Information Reading IOCTL Command and waits for completion. It returns
916 true on success and false on failure.
917
918 Data is returned in the controller's V2.NewControllerInformation dma-able
919 memory buffer.
920*/
921
87d156bf 922static bool DAC960_V2_NewControllerInfo(DAC960_Controller_T *Controller)
1da177e4
LT		 923{
924 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
925 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
926 DAC960_V2_CommandStatus_T CommandStatus;
927 DAC960_V2_ClearCommand(Command);
928 Command->CommandType = DAC960_ImmediateCommand;
929 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
930 CommandMailbox->ControllerInfo.CommandControlBits
931 .DataTransferControllerToHost = true;
932 CommandMailbox->ControllerInfo.CommandControlBits
933 .NoAutoRequestSense = true;
934 CommandMailbox->ControllerInfo.DataTransferSize = sizeof(DAC960_V2_ControllerInfo_T);
935 CommandMailbox->ControllerInfo.ControllerNumber = 0;
936 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
937 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
938 .ScatterGatherSegments[0]
939 .SegmentDataPointer =
940 Controller->V2.NewControllerInformationDMA;
941 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
942 .ScatterGatherSegments[0]
943 .SegmentByteCount =
944 CommandMailbox->ControllerInfo.DataTransferSize;
945 DAC960_ExecuteCommand(Command);
946 CommandStatus = Command->V2.CommandStatus;
947 DAC960_DeallocateCommand(Command);
948 return (CommandStatus == DAC960_V2_NormalCompletion);
949}
950
951
952/*
953 DAC960_V2_LogicalDeviceInfo executes a DAC960 V2 Firmware Controller Logical
954 Device Information Reading IOCTL Command and waits for completion. It
955 returns true on success and false on failure.
956
957 Data is returned in the controller's V2.NewLogicalDeviceInformation
958*/
959
87d156bf 960static bool DAC960_V2_NewLogicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 961 unsigned short LogicalDeviceNumber)
962{
963 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
964 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
965 DAC960_V2_CommandStatus_T CommandStatus;
966
967 DAC960_V2_ClearCommand(Command);
968 Command->CommandType = DAC960_ImmediateCommand;
969 CommandMailbox->LogicalDeviceInfo.CommandOpcode =
970 DAC960_V2_IOCTL;
971 CommandMailbox->LogicalDeviceInfo.CommandControlBits
972 .DataTransferControllerToHost = true;
973 CommandMailbox->LogicalDeviceInfo.CommandControlBits
974 .NoAutoRequestSense = true;
975 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
976 sizeof(DAC960_V2_LogicalDeviceInfo_T);
977 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
978 LogicalDeviceNumber;
979 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode = DAC960_V2_GetLogicalDeviceInfoValid;
980 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
981 .ScatterGatherSegments[0]
982 .SegmentDataPointer =
983 Controller->V2.NewLogicalDeviceInformationDMA;
984 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
985 .ScatterGatherSegments[0]
986 .SegmentByteCount =
987 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
988 DAC960_ExecuteCommand(Command);
989 CommandStatus = Command->V2.CommandStatus;
990 DAC960_DeallocateCommand(Command);
991 return (CommandStatus == DAC960_V2_NormalCompletion);
992}
993
994
995/*
996 DAC960_V2_PhysicalDeviceInfo executes a DAC960 V2 Firmware Controller "Read
997 Physical Device Information" IOCTL Command and waits for completion. It
998 returns true on success and false on failure.
999
1000 The Channel, TargetID, LogicalUnit arguments should be 0 the first time
1001 this function is called for a given controller. This will return data
1002 for the "first" device on that controller. The returned data includes a
1003 Channel, TargetID, LogicalUnit that can be passed in to this routine to
1004 get data for the NEXT device on that controller.
1005
1006 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1007 memory buffer.
1008
1009*/
1010
87d156bf 1011static bool DAC960_V2_NewPhysicalDeviceInfo(DAC960_Controller_T *Controller,
1da177e4
LT		 1012 unsigned char Channel,
1013 unsigned char TargetID,
1014 unsigned char LogicalUnit)
1015{
1016 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1017 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1018 DAC960_V2_CommandStatus_T CommandStatus;
1019
1020 DAC960_V2_ClearCommand(Command);
1021 Command->CommandType = DAC960_ImmediateCommand;
1022 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
1023 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1024 .DataTransferControllerToHost = true;
1025 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
1026 .NoAutoRequestSense = true;
1027 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
1028 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
1029 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit = LogicalUnit;
1030 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
1031 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
1032 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
1033 DAC960_V2_GetPhysicalDeviceInfoValid;
1034 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1035 .ScatterGatherSegments[0]
1036 .SegmentDataPointer =
1037 Controller->V2.NewPhysicalDeviceInformationDMA;
1038 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
1039 .ScatterGatherSegments[0]
1040 .SegmentByteCount =
1041 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
1042 DAC960_ExecuteCommand(Command);
1043 CommandStatus = Command->V2.CommandStatus;
1044 DAC960_DeallocateCommand(Command);
1045 return (CommandStatus == DAC960_V2_NormalCompletion);
1046}
1047
1048
1049static void DAC960_V2_ConstructNewUnitSerialNumber(
1050 DAC960_Controller_T *Controller,
1051 DAC960_V2_CommandMailbox_T *CommandMailbox, int Channel, int TargetID,
1052 int LogicalUnit)
1053{
1054 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10_Passthru;
1055 CommandMailbox->SCSI_10.CommandControlBits
1056 .DataTransferControllerToHost = true;
1057 CommandMailbox->SCSI_10.CommandControlBits
1058 .NoAutoRequestSense = true;
1059 CommandMailbox->SCSI_10.DataTransferSize =
1060 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1061 CommandMailbox->SCSI_10.PhysicalDevice.LogicalUnit = LogicalUnit;
1062 CommandMailbox->SCSI_10.PhysicalDevice.TargetID = TargetID;
1063 CommandMailbox->SCSI_10.PhysicalDevice.Channel = Channel;
1064 CommandMailbox->SCSI_10.CDBLength = 6;
1065 CommandMailbox->SCSI_10.SCSI_CDB[0] = 0x12; /* INQUIRY */
1066 CommandMailbox->SCSI_10.SCSI_CDB[1] = 1; /* EVPD = 1 */
1067 CommandMailbox->SCSI_10.SCSI_CDB[2] = 0x80; /* Page Code */
1068 CommandMailbox->SCSI_10.SCSI_CDB[3] = 0; /* Reserved */
1069 CommandMailbox->SCSI_10.SCSI_CDB[4] =
1070 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1071 CommandMailbox->SCSI_10.SCSI_CDB[5] = 0; /* Control */
1072 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1073 .ScatterGatherSegments[0]
1074 .SegmentDataPointer =
1075 Controller->V2.NewInquiryUnitSerialNumberDMA;
1076 CommandMailbox->SCSI_10.DataTransferMemoryAddress
1077 .ScatterGatherSegments[0]
1078 .SegmentByteCount =
1079 CommandMailbox->SCSI_10.DataTransferSize;
1080}
1081
1082
1083/*
1084 DAC960_V2_NewUnitSerialNumber executes an SCSI pass-through
1085 Inquiry command to a SCSI device identified by Channel number,
1086 Target id, Logical Unit Number. This function Waits for completion
1087 of the command.
1088
1089 The return data includes Unit Serial Number information for the
1090 specified device.
1091
1092 Data is stored in the controller's V2.NewPhysicalDeviceInfo dma-able
1093 memory buffer.
1094*/
1095
87d156bf 1096static bool DAC960_V2_NewInquiryUnitSerialNumber(DAC960_Controller_T *Controller,
1da177e4
LT		 1097 int Channel, int TargetID, int LogicalUnit)
1098{
1099 DAC960_Command_T *Command;
1100 DAC960_V2_CommandMailbox_T *CommandMailbox;
1101 DAC960_V2_CommandStatus_T CommandStatus;
1102
1103 Command = DAC960_AllocateCommand(Controller);
1104 CommandMailbox = &Command->V2.CommandMailbox;
1105 DAC960_V2_ClearCommand(Command);
1106 Command->CommandType = DAC960_ImmediateCommand;
1107
1108 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
1109 Channel, TargetID, LogicalUnit);
1110
1111 DAC960_ExecuteCommand(Command);
1112 CommandStatus = Command->V2.CommandStatus;
1113 DAC960_DeallocateCommand(Command);
1114 return (CommandStatus == DAC960_V2_NormalCompletion);
1115}
1116
1117
1118/*
1119 DAC960_V2_DeviceOperation executes a DAC960 V2 Firmware Controller Device
1120 Operation IOCTL Command and waits for completion. It returns true on
1121 success and false on failure.
1122*/
1123
87d156bf 1124static bool DAC960_V2_DeviceOperation(DAC960_Controller_T *Controller,
1da177e4
LT		 1125 DAC960_V2_IOCTL_Opcode_T IOCTL_Opcode,
1126 DAC960_V2_OperationDevice_T
1127 OperationDevice)
1128{
1129 DAC960_Command_T *Command = DAC960_AllocateCommand(Controller);
1130 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
1131 DAC960_V2_CommandStatus_T CommandStatus;
1132 DAC960_V2_ClearCommand(Command);
1133 Command->CommandType = DAC960_ImmediateCommand;
1134 CommandMailbox->DeviceOperation.CommandOpcode = DAC960_V2_IOCTL;
1135 CommandMailbox->DeviceOperation.CommandControlBits
1136 .DataTransferControllerToHost = true;
1137 CommandMailbox->DeviceOperation.CommandControlBits
1138 .NoAutoRequestSense = true;
1139 CommandMailbox->DeviceOperation.IOCTL_Opcode = IOCTL_Opcode;
1140 CommandMailbox->DeviceOperation.OperationDevice = OperationDevice;
1141 DAC960_ExecuteCommand(Command);
1142 CommandStatus = Command->V2.CommandStatus;
1143 DAC960_DeallocateCommand(Command);
1144 return (CommandStatus == DAC960_V2_NormalCompletion);
1145}
1146
1147
1148/*
1149 DAC960_V1_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1150 for DAC960 V1 Firmware Controllers.
1151
1152 PD and P controller types have no memory mailbox, but still need the
1153 other dma mapped memory.
1154*/
1155
87d156bf 1156static bool DAC960_V1_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1157 *Controller)
1158{
1159 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1160 DAC960_HardwareType_T hw_type = Controller->HardwareType;
1161 struct pci_dev *PCI_Device = Controller->PCIDevice;
1162 struct dma_loaf *DmaPages = &Controller->DmaPages;
1163 size_t DmaPagesSize;
1164 size_t CommandMailboxesSize;
1165 size_t StatusMailboxesSize;
1166
1167 DAC960_V1_CommandMailbox_T *CommandMailboxesMemory;
1168 dma_addr_t CommandMailboxesMemoryDMA;
1169
1170 DAC960_V1_StatusMailbox_T *StatusMailboxesMemory;
1171 dma_addr_t StatusMailboxesMemoryDMA;
1172
1173 DAC960_V1_CommandMailbox_T CommandMailbox;
1174 DAC960_V1_CommandStatus_T CommandStatus;
1175 int TimeoutCounter;
1176 int i;
1177
cecd353a
DK		 1178 memset(&CommandMailbox, 0, sizeof(DAC960_V1_CommandMailbox_T));
1179
284901a9 1180 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
1da177e4 1181 return DAC960_Failure(Controller, "DMA mask out of range");
1da177e4
LT		 1182
1183 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller)) {
1184 CommandMailboxesSize = 0;
1185 StatusMailboxesSize = 0;
1186 } else {
1187 CommandMailboxesSize = DAC960_V1_CommandMailboxCount * sizeof(DAC960_V1_CommandMailbox_T);
1188 StatusMailboxesSize = DAC960_V1_StatusMailboxCount * sizeof(DAC960_V1_StatusMailbox_T);
1189 }
1190 DmaPagesSize = CommandMailboxesSize + StatusMailboxesSize +
1191 sizeof(DAC960_V1_DCDB_T) + sizeof(DAC960_V1_Enquiry_T) +
1192 sizeof(DAC960_V1_ErrorTable_T) + sizeof(DAC960_V1_EventLogEntry_T) +
1193 sizeof(DAC960_V1_RebuildProgress_T) +
1194 sizeof(DAC960_V1_LogicalDriveInformationArray_T) +
1195 sizeof(DAC960_V1_BackgroundInitializationStatus_T) +
1196 sizeof(DAC960_V1_DeviceState_T) + sizeof(DAC960_SCSI_Inquiry_T) +
1197 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
1198
1199 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize))
1200 return false;
1201
1202
1203 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1204 goto skip_mailboxes;
1205
1206 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1207 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1208
1209 /* These are the base addresses for the command memory mailbox array */
1210 Controller->V1.FirstCommandMailbox = CommandMailboxesMemory;
1211 Controller->V1.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1212
1213 CommandMailboxesMemory += DAC960_V1_CommandMailboxCount - 1;
1214 Controller->V1.LastCommandMailbox = CommandMailboxesMemory;
1215 Controller->V1.NextCommandMailbox = Controller->V1.FirstCommandMailbox;
1216 Controller->V1.PreviousCommandMailbox1 = Controller->V1.LastCommandMailbox;
1217 Controller->V1.PreviousCommandMailbox2 =
1218 Controller->V1.LastCommandMailbox - 1;
1219
1220 /* These are the base addresses for the status memory mailbox array */
1221 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1222 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1223
1224 Controller->V1.FirstStatusMailbox = StatusMailboxesMemory;
1225 Controller->V1.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1226 StatusMailboxesMemory += DAC960_V1_StatusMailboxCount - 1;
1227 Controller->V1.LastStatusMailbox = StatusMailboxesMemory;
1228 Controller->V1.NextStatusMailbox = Controller->V1.FirstStatusMailbox;
1229
1230skip_mailboxes:
1231 Controller->V1.MonitoringDCDB = slice_dma_loaf(DmaPages,
1232 sizeof(DAC960_V1_DCDB_T),
1233 &Controller->V1.MonitoringDCDB_DMA);
1234
1235 Controller->V1.NewEnquiry = slice_dma_loaf(DmaPages,
1236 sizeof(DAC960_V1_Enquiry_T),
1237 &Controller->V1.NewEnquiryDMA);
1238
1239 Controller->V1.NewErrorTable = slice_dma_loaf(DmaPages,
1240 sizeof(DAC960_V1_ErrorTable_T),
1241 &Controller->V1.NewErrorTableDMA);
1242
1243 Controller->V1.EventLogEntry = slice_dma_loaf(DmaPages,
1244 sizeof(DAC960_V1_EventLogEntry_T),
1245 &Controller->V1.EventLogEntryDMA);
1246
1247 Controller->V1.RebuildProgress = slice_dma_loaf(DmaPages,
1248 sizeof(DAC960_V1_RebuildProgress_T),
1249 &Controller->V1.RebuildProgressDMA);
1250
1251 Controller->V1.NewLogicalDriveInformation = slice_dma_loaf(DmaPages,
1252 sizeof(DAC960_V1_LogicalDriveInformationArray_T),
1253 &Controller->V1.NewLogicalDriveInformationDMA);
1254
1255 Controller->V1.BackgroundInitializationStatus = slice_dma_loaf(DmaPages,
1256 sizeof(DAC960_V1_BackgroundInitializationStatus_T),
1257 &Controller->V1.BackgroundInitializationStatusDMA);
1258
1259 Controller->V1.NewDeviceState = slice_dma_loaf(DmaPages,
1260 sizeof(DAC960_V1_DeviceState_T),
1261 &Controller->V1.NewDeviceStateDMA);
1262
1263 Controller->V1.NewInquiryStandardData = slice_dma_loaf(DmaPages,
1264 sizeof(DAC960_SCSI_Inquiry_T),
1265 &Controller->V1.NewInquiryStandardDataDMA);
1266
1267 Controller->V1.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1268 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1269 &Controller->V1.NewInquiryUnitSerialNumberDMA);
1270
1271 if ((hw_type == DAC960_PD_Controller) || (hw_type == DAC960_P_Controller))
1272 return true;
1273
1274 /* Enable the Memory Mailbox Interface. */
1275 Controller->V1.DualModeMemoryMailboxInterface = true;
1276 CommandMailbox.TypeX.CommandOpcode = 0x2B;
1277 CommandMailbox.TypeX.CommandIdentifier = 0;
1278 CommandMailbox.TypeX.CommandOpcode2 = 0x14;
1279 CommandMailbox.TypeX.CommandMailboxesBusAddress =
1280 Controller->V1.FirstCommandMailboxDMA;
1281 CommandMailbox.TypeX.StatusMailboxesBusAddress =
1282 Controller->V1.FirstStatusMailboxDMA;
1283#define TIMEOUT_COUNT 1000000
1284
1285 for (i = 0; i < 2; i++)
1286 switch (Controller->HardwareType)
1287 {
1288 case DAC960_LA_Controller:
1289 TimeoutCounter = TIMEOUT_COUNT;
1290 while (--TimeoutCounter >= 0)
1291 {
1292 if (!DAC960_LA_HardwareMailboxFullP(ControllerBaseAddress))
1293 break;
1294 udelay(10);
1295 }
1296 if (TimeoutCounter < 0) return false;
1297 DAC960_LA_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1298 DAC960_LA_HardwareMailboxNewCommand(ControllerBaseAddress);
1299 TimeoutCounter = TIMEOUT_COUNT;
1300 while (--TimeoutCounter >= 0)
1301 {
1302 if (DAC960_LA_HardwareMailboxStatusAvailableP(
1303 ControllerBaseAddress))
1304 break;
1305 udelay(10);
1306 }
1307 if (TimeoutCounter < 0) return false;
1308 CommandStatus = DAC960_LA_ReadStatusRegister(ControllerBaseAddress);
1309 DAC960_LA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1310 DAC960_LA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1311 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1312 Controller->V1.DualModeMemoryMailboxInterface = false;
1313 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1314 break;
1315 case DAC960_PG_Controller:
1316 TimeoutCounter = TIMEOUT_COUNT;
1317 while (--TimeoutCounter >= 0)
1318 {
1319 if (!DAC960_PG_HardwareMailboxFullP(ControllerBaseAddress))
1320 break;
1321 udelay(10);
1322 }
1323 if (TimeoutCounter < 0) return false;
1324 DAC960_PG_WriteHardwareMailbox(ControllerBaseAddress, &CommandMailbox);
1325 DAC960_PG_HardwareMailboxNewCommand(ControllerBaseAddress);
1326
1327 TimeoutCounter = TIMEOUT_COUNT;
1328 while (--TimeoutCounter >= 0)
1329 {
1330 if (DAC960_PG_HardwareMailboxStatusAvailableP(
1331 ControllerBaseAddress))
1332 break;
1333 udelay(10);
1334 }
1335 if (TimeoutCounter < 0) return false;
1336 CommandStatus = DAC960_PG_ReadStatusRegister(ControllerBaseAddress);
1337 DAC960_PG_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1338 DAC960_PG_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1339 if (CommandStatus == DAC960_V1_NormalCompletion) return true;
1340 Controller->V1.DualModeMemoryMailboxInterface = false;
1341 CommandMailbox.TypeX.CommandOpcode2 = 0x10;
1342 break;
1343 default:
1344 DAC960_Failure(Controller, "Unknown Controller Type\n");
1345 break;
1346 }
1347 return false;
1348}
1349
1350
1351/*
1352 DAC960_V2_EnableMemoryMailboxInterface enables the Memory Mailbox Interface
1353 for DAC960 V2 Firmware Controllers.
1354
1355 Aggregate the space needed for the controller's memory mailbox and
1356 the other data structures that will be targets of dma transfers with
1357 the controller. Allocate a dma-mapped region of memory to hold these
1358 structures. Then, save CPU pointers and dma_addr_t values to reference
1359 the structures that are contained in that region.
1360*/
1361
87d156bf 1362static bool DAC960_V2_EnableMemoryMailboxInterface(DAC960_Controller_T
1da177e4
LT		 1363 *Controller)
1364{
1365 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
1366 struct pci_dev *PCI_Device = Controller->PCIDevice;
1367 struct dma_loaf *DmaPages = &Controller->DmaPages;
1368 size_t DmaPagesSize;
1369 size_t CommandMailboxesSize;
1370 size_t StatusMailboxesSize;
1371
1372 DAC960_V2_CommandMailbox_T *CommandMailboxesMemory;
1373 dma_addr_t CommandMailboxesMemoryDMA;
1374
1375 DAC960_V2_StatusMailbox_T *StatusMailboxesMemory;
1376 dma_addr_t StatusMailboxesMemoryDMA;
1377
1378 DAC960_V2_CommandMailbox_T *CommandMailbox;
1379 dma_addr_t CommandMailboxDMA;
1380 DAC960_V2_CommandStatus_T CommandStatus;
1381
00f0a51f
CH		 1382 if (pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(64)) &&
1383 pci_set_dma_mask(Controller->PCIDevice, DMA_BIT_MASK(32)))
868047fc 1384 return DAC960_Failure(Controller, "DMA mask out of range");
1da177e4
LT		 1385
1386 /* This is a temporary dma mapping, used only in the scope of this function */
0a361e31 1387 CommandMailbox = pci_alloc_consistent(PCI_Device,
1da177e4
LT		 1388 sizeof(DAC960_V2_CommandMailbox_T), &CommandMailboxDMA);
1389 if (CommandMailbox == NULL)
1390 return false;
1391
1392 CommandMailboxesSize = DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T);
1393 StatusMailboxesSize = DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T);
1394 DmaPagesSize =
1395 CommandMailboxesSize + StatusMailboxesSize +
1396 sizeof(DAC960_V2_HealthStatusBuffer_T) +
1397 sizeof(DAC960_V2_ControllerInfo_T) +
1398 sizeof(DAC960_V2_LogicalDeviceInfo_T) +
1399 sizeof(DAC960_V2_PhysicalDeviceInfo_T) +
1400 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T) +
1401 sizeof(DAC960_V2_Event_T) +
1402 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
1403
1404 if (!init_dma_loaf(PCI_Device, DmaPages, DmaPagesSize)) {
1405 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1406 CommandMailbox, CommandMailboxDMA);
1407 return false;
1408 }
1409
1410 CommandMailboxesMemory = slice_dma_loaf(DmaPages,
1411 CommandMailboxesSize, &CommandMailboxesMemoryDMA);
1412
1413 /* These are the base addresses for the command memory mailbox array */
1414 Controller->V2.FirstCommandMailbox = CommandMailboxesMemory;
1415 Controller->V2.FirstCommandMailboxDMA = CommandMailboxesMemoryDMA;
1416
1417 CommandMailboxesMemory += DAC960_V2_CommandMailboxCount - 1;
1418 Controller->V2.LastCommandMailbox = CommandMailboxesMemory;
1419 Controller->V2.NextCommandMailbox = Controller->V2.FirstCommandMailbox;
1420 Controller->V2.PreviousCommandMailbox1 = Controller->V2.LastCommandMailbox;
1421 Controller->V2.PreviousCommandMailbox2 =
1422 Controller->V2.LastCommandMailbox - 1;
1423
1424 /* These are the base addresses for the status memory mailbox array */
1425 StatusMailboxesMemory = slice_dma_loaf(DmaPages,
1426 StatusMailboxesSize, &StatusMailboxesMemoryDMA);
1427
1428 Controller->V2.FirstStatusMailbox = StatusMailboxesMemory;
1429 Controller->V2.FirstStatusMailboxDMA = StatusMailboxesMemoryDMA;
1430 StatusMailboxesMemory += DAC960_V2_StatusMailboxCount - 1;
1431 Controller->V2.LastStatusMailbox = StatusMailboxesMemory;
1432 Controller->V2.NextStatusMailbox = Controller->V2.FirstStatusMailbox;
1433
1434 Controller->V2.HealthStatusBuffer = slice_dma_loaf(DmaPages,
1435 sizeof(DAC960_V2_HealthStatusBuffer_T),
1436 &Controller->V2.HealthStatusBufferDMA);
1437
1438 Controller->V2.NewControllerInformation = slice_dma_loaf(DmaPages,
1439 sizeof(DAC960_V2_ControllerInfo_T),
1440 &Controller->V2.NewControllerInformationDMA);
1441
1442 Controller->V2.NewLogicalDeviceInformation = slice_dma_loaf(DmaPages,
1443 sizeof(DAC960_V2_LogicalDeviceInfo_T),
1444 &Controller->V2.NewLogicalDeviceInformationDMA);
1445
1446 Controller->V2.NewPhysicalDeviceInformation = slice_dma_loaf(DmaPages,
1447 sizeof(DAC960_V2_PhysicalDeviceInfo_T),
1448 &Controller->V2.NewPhysicalDeviceInformationDMA);
1449
1450 Controller->V2.NewInquiryUnitSerialNumber = slice_dma_loaf(DmaPages,
1451 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1452 &Controller->V2.NewInquiryUnitSerialNumberDMA);
1453
1454 Controller->V2.Event = slice_dma_loaf(DmaPages,
1455 sizeof(DAC960_V2_Event_T),
1456 &Controller->V2.EventDMA);
1457
1458 Controller->V2.PhysicalToLogicalDevice = slice_dma_loaf(DmaPages,
1459 sizeof(DAC960_V2_PhysicalToLogicalDevice_T),
1460 &Controller->V2.PhysicalToLogicalDeviceDMA);
1461
1462 /*
1463 Enable the Memory Mailbox Interface.
1464
1465 I don't know why we can't just use one of the memory mailboxes
1466 we just allocated to do this, instead of using this temporary one.
1467 Try this change later.
1468 */
1469 memset(CommandMailbox, 0, sizeof(DAC960_V2_CommandMailbox_T));
1470 CommandMailbox->SetMemoryMailbox.CommandIdentifier = 1;
1471 CommandMailbox->SetMemoryMailbox.CommandOpcode = DAC960_V2_IOCTL;
1472 CommandMailbox->SetMemoryMailbox.CommandControlBits.NoAutoRequestSense = true;
1473 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxSizeKB =
1474 (DAC960_V2_CommandMailboxCount * sizeof(DAC960_V2_CommandMailbox_T)) >> 10;
1475 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxSizeKB =
1476 (DAC960_V2_StatusMailboxCount * sizeof(DAC960_V2_StatusMailbox_T)) >> 10;
1477 CommandMailbox->SetMemoryMailbox.SecondCommandMailboxSizeKB = 0;
1478 CommandMailbox->SetMemoryMailbox.SecondStatusMailboxSizeKB = 0;
1479 CommandMailbox->SetMemoryMailbox.RequestSenseSize = 0;
1480 CommandMailbox->SetMemoryMailbox.IOCTL_Opcode = DAC960_V2_SetMemoryMailbox;
1481 CommandMailbox->SetMemoryMailbox.HealthStatusBufferSizeKB = 1;
1482 CommandMailbox->SetMemoryMailbox.HealthStatusBufferBusAddress =
1483 Controller->V2.HealthStatusBufferDMA;
1484 CommandMailbox->SetMemoryMailbox.FirstCommandMailboxBusAddress =
1485 Controller->V2.FirstCommandMailboxDMA;
1486 CommandMailbox->SetMemoryMailbox.FirstStatusMailboxBusAddress =
1487 Controller->V2.FirstStatusMailboxDMA;
1488 switch (Controller->HardwareType)
1489 {
5b76ffd5
CH		 1490 case DAC960_GEM_Controller:
1491 while (DAC960_GEM_HardwareMailboxFullP(ControllerBaseAddress))
1492 udelay(1);
1493 DAC960_GEM_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1494 DAC960_GEM_HardwareMailboxNewCommand(ControllerBaseAddress);
1495 while (!DAC960_GEM_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1496 udelay(1);
1497 CommandStatus = DAC960_GEM_ReadCommandStatus(ControllerBaseAddress);
1498 DAC960_GEM_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1499 DAC960_GEM_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1500 break;
1da177e4
LT		 1501 case DAC960_BA_Controller:
1502 while (DAC960_BA_HardwareMailboxFullP(ControllerBaseAddress))
1503 udelay(1);
1504 DAC960_BA_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1505 DAC960_BA_HardwareMailboxNewCommand(ControllerBaseAddress);
1506 while (!DAC960_BA_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1507 udelay(1);
1508 CommandStatus = DAC960_BA_ReadCommandStatus(ControllerBaseAddress);
1509 DAC960_BA_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1510 DAC960_BA_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1511 break;
1512 case DAC960_LP_Controller:
1513 while (DAC960_LP_HardwareMailboxFullP(ControllerBaseAddress))
1514 udelay(1);
1515 DAC960_LP_WriteHardwareMailbox(ControllerBaseAddress, CommandMailboxDMA);
1516 DAC960_LP_HardwareMailboxNewCommand(ControllerBaseAddress);
1517 while (!DAC960_LP_HardwareMailboxStatusAvailableP(ControllerBaseAddress))
1518 udelay(1);
1519 CommandStatus = DAC960_LP_ReadCommandStatus(ControllerBaseAddress);
1520 DAC960_LP_AcknowledgeHardwareMailboxInterrupt(ControllerBaseAddress);
1521 DAC960_LP_AcknowledgeHardwareMailboxStatus(ControllerBaseAddress);
1522 break;
1523 default:
1524 DAC960_Failure(Controller, "Unknown Controller Type\n");
1525 CommandStatus = DAC960_V2_AbormalCompletion;
1526 break;
1527 }
1528 pci_free_consistent(PCI_Device, sizeof(DAC960_V2_CommandMailbox_T),
1529 CommandMailbox, CommandMailboxDMA);
1530 return (CommandStatus == DAC960_V2_NormalCompletion);
1531}
1532
1533
1534/*
1535 DAC960_V1_ReadControllerConfiguration reads the Configuration Information
1536 from DAC960 V1 Firmware Controllers and initializes the Controller structure.
1537*/
1538
87d156bf 1539static bool DAC960_V1_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1540 *Controller)
1541{
1542 DAC960_V1_Enquiry2_T *Enquiry2;
1543 dma_addr_t Enquiry2DMA;
1544 DAC960_V1_Config2_T *Config2;
1545 dma_addr_t Config2DMA;
1546 int LogicalDriveNumber, Channel, TargetID;
1547 struct dma_loaf local_dma;
1548
1549 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1550 sizeof(DAC960_V1_Enquiry2_T) + sizeof(DAC960_V1_Config2_T)))
1551 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1552
1553 Enquiry2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Enquiry2_T), &Enquiry2DMA);
1554 Config2 = slice_dma_loaf(&local_dma, sizeof(DAC960_V1_Config2_T), &Config2DMA);
1555
1556 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry,
1557 Controller->V1.NewEnquiryDMA)) {
1558 free_dma_loaf(Controller->PCIDevice, &local_dma);
1559 return DAC960_Failure(Controller, "ENQUIRY");
1560 }
1561 memcpy(&Controller->V1.Enquiry, Controller->V1.NewEnquiry,
1562 sizeof(DAC960_V1_Enquiry_T));
1563
1564 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_Enquiry2, Enquiry2DMA)) {
1565 free_dma_loaf(Controller->PCIDevice, &local_dma);
1566 return DAC960_Failure(Controller, "ENQUIRY2");
1567 }
1568
1569 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_ReadConfig2, Config2DMA)) {
1570 free_dma_loaf(Controller->PCIDevice, &local_dma);
1571 return DAC960_Failure(Controller, "READ CONFIG2");
1572 }
1573
1574 if (!DAC960_V1_ExecuteType3(Controller, DAC960_V1_GetLogicalDriveInformation,
1575 Controller->V1.NewLogicalDriveInformationDMA)) {
1576 free_dma_loaf(Controller->PCIDevice, &local_dma);
1577 return DAC960_Failure(Controller, "GET LOGICAL DRIVE INFORMATION");
1578 }
1579 memcpy(&Controller->V1.LogicalDriveInformation,
1580 Controller->V1.NewLogicalDriveInformation,
1581 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
1582
1583 for (Channel = 0; Channel < Enquiry2->ActualChannels; Channel++)
1584 for (TargetID = 0; TargetID < Enquiry2->MaxTargets; TargetID++) {
1585 if (!DAC960_V1_ExecuteType3D(Controller, DAC960_V1_GetDeviceState,
1586 Channel, TargetID,
1587 Controller->V1.NewDeviceStateDMA)) {
1588 free_dma_loaf(Controller->PCIDevice, &local_dma);
1589 return DAC960_Failure(Controller, "GET DEVICE STATE");
1590 }
1591 memcpy(&Controller->V1.DeviceState[Channel][TargetID],
1592 Controller->V1.NewDeviceState, sizeof(DAC960_V1_DeviceState_T));
1593 }
1594 /*
1595 Initialize the Controller Model Name and Full Model Name fields.
1596 */
1597 switch (Enquiry2->HardwareID.SubModel)
1598 {
1599 case DAC960_V1_P_PD_PU:
1600 if (Enquiry2->SCSICapability.BusSpeed == DAC960_V1_Ultra)
1601 strcpy(Controller->ModelName, "DAC960PU");
1602 else strcpy(Controller->ModelName, "DAC960PD");
1603 break;
1604 case DAC960_V1_PL:
1605 strcpy(Controller->ModelName, "DAC960PL");
1606 break;
1607 case DAC960_V1_PG:
1608 strcpy(Controller->ModelName, "DAC960PG");
1609 break;
1610 case DAC960_V1_PJ:
1611 strcpy(Controller->ModelName, "DAC960PJ");
1612 break;
1613 case DAC960_V1_PR:
1614 strcpy(Controller->ModelName, "DAC960PR");
1615 break;
1616 case DAC960_V1_PT:
1617 strcpy(Controller->ModelName, "DAC960PT");
1618 break;
1619 case DAC960_V1_PTL0:
1620 strcpy(Controller->ModelName, "DAC960PTL0");
1621 break;
1622 case DAC960_V1_PRL:
1623 strcpy(Controller->ModelName, "DAC960PRL");
1624 break;
1625 case DAC960_V1_PTL1:
1626 strcpy(Controller->ModelName, "DAC960PTL1");
1627 break;
1628 case DAC960_V1_1164P:
1629 strcpy(Controller->ModelName, "DAC1164P");
1630 break;
1631 default:
1632 free_dma_loaf(Controller->PCIDevice, &local_dma);
1633 return DAC960_Failure(Controller, "MODEL VERIFICATION");
1634 }
1635 strcpy(Controller->FullModelName, "Mylex ");
1636 strcat(Controller->FullModelName, Controller->ModelName);
1637 /*
1638 Initialize the Controller Firmware Version field and verify that it
1639 is a supported firmware version. The supported firmware versions are:
1640
1641 DAC1164P 5.06 and above
1642 DAC960PTL/PRL/PJ/PG 4.06 and above
1643 DAC960PU/PD/PL 3.51 and above
1644 DAC960PU/PD/PL/P 2.73 and above
1645 */
1646#if defined(CONFIG_ALPHA)
1647 /*
1648 DEC Alpha machines were often equipped with DAC960 cards that were
1649 OEMed from Mylex, and had their own custom firmware. Version 2.70,
1650 the last custom FW revision to be released by DEC for these older
1651 controllers, appears to work quite well with this driver.
1652
1653 Cards tested successfully were several versions each of the PD and
1654 PU, called by DEC the KZPSC and KZPAC, respectively, and having
1655 the Manufacturer Numbers (from Mylex), usually on a sticker on the
1656 back of the board, of:
1657
1658 KZPSC: D040347 (1-channel) or D040348 (2-channel) or D040349 (3-channel)
1659 KZPAC: D040395 (1-channel) or D040396 (2-channel) or D040397 (3-channel)
1660 */
1661# define FIRMWARE_27X "2.70"
1662#else
1663# define FIRMWARE_27X "2.73"
1664#endif
1665
1666 if (Enquiry2->FirmwareID.MajorVersion == 0)
1667 {
1668 Enquiry2->FirmwareID.MajorVersion =
1669 Controller->V1.Enquiry.MajorFirmwareVersion;
1670 Enquiry2->FirmwareID.MinorVersion =
1671 Controller->V1.Enquiry.MinorFirmwareVersion;
1672 Enquiry2->FirmwareID.FirmwareType = '0';
1673 Enquiry2->FirmwareID.TurnID = 0;
1674 }
33027c2b
AB		 1675 snprintf(Controller->FirmwareVersion, sizeof(Controller->FirmwareVersion),
1676 "%d.%02d-%c-%02d",
1677 Enquiry2->FirmwareID.MajorVersion,
1678 Enquiry2->FirmwareID.MinorVersion,
1679 Enquiry2->FirmwareID.FirmwareType,
1680 Enquiry2->FirmwareID.TurnID);
1da177e4
LT		 1681 if (!((Controller->FirmwareVersion[0] == '5' &&
1682 strcmp(Controller->FirmwareVersion, "5.06") >= 0) ||
1683 (Controller->FirmwareVersion[0] == '4' &&
1684 strcmp(Controller->FirmwareVersion, "4.06") >= 0) ||
1685 (Controller->FirmwareVersion[0] == '3' &&
1686 strcmp(Controller->FirmwareVersion, "3.51") >= 0) ||
1687 (Controller->FirmwareVersion[0] == '2' &&
1688 strcmp(Controller->FirmwareVersion, FIRMWARE_27X) >= 0)))
1689 {
1690 DAC960_Failure(Controller, "FIRMWARE VERSION VERIFICATION");
1691 DAC960_Error("Firmware Version = '%s'\n", Controller,
1692 Controller->FirmwareVersion);
1693 free_dma_loaf(Controller->PCIDevice, &local_dma);
1694 return false;
1695 }
1696 /*
1697 Initialize the Controller Channels, Targets, Memory Size, and SAF-TE
1698 Enclosure Management Enabled fields.
1699 */
1700 Controller->Channels = Enquiry2->ActualChannels;
1701 Controller->Targets = Enquiry2->MaxTargets;
1702 Controller->MemorySize = Enquiry2->MemorySize >> 20;
1703 Controller->V1.SAFTE_EnclosureManagementEnabled =
1704 (Enquiry2->FaultManagementType == DAC960_V1_SAFTE);
1705 /*
1706 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1707 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1708 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1709 less than the Controller Queue Depth to allow for an automatic drive
1710 rebuild operation.
1711 */
1712 Controller->ControllerQueueDepth = Controller->V1.Enquiry.MaxCommands;
1713 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1714 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1715 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1716 Controller->LogicalDriveCount =
1717 Controller->V1.Enquiry.NumberOfLogicalDrives;
1718 Controller->MaxBlocksPerCommand = Enquiry2->MaxBlocksPerCommand;
1719 Controller->ControllerScatterGatherLimit = Enquiry2->MaxScatterGatherEntries;
1720 Controller->DriverScatterGatherLimit =
1721 Controller->ControllerScatterGatherLimit;
1722 if (Controller->DriverScatterGatherLimit > DAC960_V1_ScatterGatherLimit)
1723 Controller->DriverScatterGatherLimit = DAC960_V1_ScatterGatherLimit;
1724 /*
1725 Initialize the Stripe Size, Segment Size, and Geometry Translation.
1726 */
1727 Controller->V1.StripeSize = Config2->BlocksPerStripe * Config2->BlockFactor
1728 >> (10 - DAC960_BlockSizeBits);
1729 Controller->V1.SegmentSize = Config2->BlocksPerCacheLine * Config2->BlockFactor
1730 >> (10 - DAC960_BlockSizeBits);
1731 switch (Config2->DriveGeometry)
1732 {
1733 case DAC960_V1_Geometry_128_32:
1734 Controller->V1.GeometryTranslationHeads = 128;
1735 Controller->V1.GeometryTranslationSectors = 32;
1736 break;
1737 case DAC960_V1_Geometry_255_63:
1738 Controller->V1.GeometryTranslationHeads = 255;
1739 Controller->V1.GeometryTranslationSectors = 63;
1740 break;
1741 default:
1742 free_dma_loaf(Controller->PCIDevice, &local_dma);
1743 return DAC960_Failure(Controller, "CONFIG2 DRIVE GEOMETRY");
1744 }
1745 /*
1746 Initialize the Background Initialization Status.
1747 */
1748 if ((Controller->FirmwareVersion[0] == '4' &&
1749 strcmp(Controller->FirmwareVersion, "4.08") >= 0) ||
1750 (Controller->FirmwareVersion[0] == '5' &&
1751 strcmp(Controller->FirmwareVersion, "5.08") >= 0))
1752 {
1753 Controller->V1.BackgroundInitializationStatusSupported = true;
1754 DAC960_V1_ExecuteType3B(Controller,
1755 DAC960_V1_BackgroundInitializationControl, 0x20,
1756 Controller->
1757 V1.BackgroundInitializationStatusDMA);
1758 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
1759 Controller->V1.BackgroundInitializationStatus,
1760 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
1761 }
1762 /*
1763 Initialize the Logical Drive Initially Accessible flag.
1764 */
1765 for (LogicalDriveNumber = 0;
1766 LogicalDriveNumber < Controller->LogicalDriveCount;
1767 LogicalDriveNumber++)
1768 if (Controller->V1.LogicalDriveInformation
1769 [LogicalDriveNumber].LogicalDriveState !=
1770 DAC960_V1_LogicalDrive_Offline)
1771 Controller->LogicalDriveInitiallyAccessible[LogicalDriveNumber] = true;
1772 Controller->V1.LastRebuildStatus = DAC960_V1_NoRebuildOrCheckInProgress;
1773 free_dma_loaf(Controller->PCIDevice, &local_dma);
1774 return true;
1775}
1776
1777
1778/*
1779 DAC960_V2_ReadControllerConfiguration reads the Configuration Information
1780 from DAC960 V2 Firmware Controllers and initializes the Controller structure.
1781*/
1782
87d156bf 1783static bool DAC960_V2_ReadControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1784 *Controller)
1785{
1786 DAC960_V2_ControllerInfo_T *ControllerInfo =
1787 &Controller->V2.ControllerInformation;
1788 unsigned short LogicalDeviceNumber = 0;
1789 int ModelNameLength;
1790
25985edc 1791 /* Get data into dma-able area, then copy into permanent location */
1da177e4
LT		 1792 if (!DAC960_V2_NewControllerInfo(Controller))
1793 return DAC960_Failure(Controller, "GET CONTROLLER INFO");
1794 memcpy(ControllerInfo, Controller->V2.NewControllerInformation,
1795 sizeof(DAC960_V2_ControllerInfo_T));
1796
1797
1798 if (!DAC960_V2_GeneralInfo(Controller))
1799 return DAC960_Failure(Controller, "GET HEALTH STATUS");
1800
1801 /*
1802 Initialize the Controller Model Name and Full Model Name fields.
1803 */
1804 ModelNameLength = sizeof(ControllerInfo->ControllerName);
1805 if (ModelNameLength > sizeof(Controller->ModelName)-1)
1806 ModelNameLength = sizeof(Controller->ModelName)-1;
1807 memcpy(Controller->ModelName, ControllerInfo->ControllerName,
1808 ModelNameLength);
1809 ModelNameLength--;
1810 while (Controller->ModelName[ModelNameLength] == ' ' ||
1811 Controller->ModelName[ModelNameLength] == '\0')
1812 ModelNameLength--;
1813 Controller->ModelName[++ModelNameLength] = '\0';
1814 strcpy(Controller->FullModelName, "Mylex ");
1815 strcat(Controller->FullModelName, Controller->ModelName);
1816 /*
1817 Initialize the Controller Firmware Version field.
1818 */
1819 sprintf(Controller->FirmwareVersion, "%d.%02d-%02d",
1820 ControllerInfo->FirmwareMajorVersion,
1821 ControllerInfo->FirmwareMinorVersion,
1822 ControllerInfo->FirmwareTurnNumber);
1823 if (ControllerInfo->FirmwareMajorVersion == 6 &&
1824 ControllerInfo->FirmwareMinorVersion == 0 &&
1825 ControllerInfo->FirmwareTurnNumber < 1)
1826 {
1827 DAC960_Info("FIRMWARE VERSION %s DOES NOT PROVIDE THE CONTROLLER\n",
1828 Controller, Controller->FirmwareVersion);
1829 DAC960_Info("STATUS MONITORING FUNCTIONALITY NEEDED BY THIS DRIVER.\n",
1830 Controller);
1831 DAC960_Info("PLEASE UPGRADE TO VERSION 6.00-01 OR ABOVE.\n",
1832 Controller);
1833 }
1834 /*
1835 Initialize the Controller Channels, Targets, and Memory Size.
1836 */
1837 Controller->Channels = ControllerInfo->NumberOfPhysicalChannelsPresent;
1838 Controller->Targets =
1839 ControllerInfo->MaximumTargetsPerChannel
1840 [ControllerInfo->NumberOfPhysicalChannelsPresent-1];
1841 Controller->MemorySize = ControllerInfo->MemorySizeMB;
1842 /*
1843 Initialize the Controller Queue Depth, Driver Queue Depth, Logical Drive
1844 Count, Maximum Blocks per Command, Controller Scatter/Gather Limit, and
1845 Driver Scatter/Gather Limit. The Driver Queue Depth must be at most one
1846 less than the Controller Queue Depth to allow for an automatic drive
1847 rebuild operation.
1848 */
1849 Controller->ControllerQueueDepth = ControllerInfo->MaximumParallelCommands;
1850 Controller->DriverQueueDepth = Controller->ControllerQueueDepth - 1;
1851 if (Controller->DriverQueueDepth > DAC960_MaxDriverQueueDepth)
1852 Controller->DriverQueueDepth = DAC960_MaxDriverQueueDepth;
1853 Controller->LogicalDriveCount = ControllerInfo->LogicalDevicesPresent;
1854 Controller->MaxBlocksPerCommand =
1855 ControllerInfo->MaximumDataTransferSizeInBlocks;
1856 Controller->ControllerScatterGatherLimit =
1857 ControllerInfo->MaximumScatterGatherEntries;
1858 Controller->DriverScatterGatherLimit =
1859 Controller->ControllerScatterGatherLimit;
1860 if (Controller->DriverScatterGatherLimit > DAC960_V2_ScatterGatherLimit)
1861 Controller->DriverScatterGatherLimit = DAC960_V2_ScatterGatherLimit;
1862 /*
1863 Initialize the Logical Device Information.
1864 */
1865 while (true)
1866 {
1867 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
1868 Controller->V2.NewLogicalDeviceInformation;
1869 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo;
1870 DAC960_V2_PhysicalDevice_T PhysicalDevice;
1871
1872 if (!DAC960_V2_NewLogicalDeviceInfo(Controller, LogicalDeviceNumber))
1873 break;
1874 LogicalDeviceNumber = NewLogicalDeviceInfo->LogicalDeviceNumber;
1875 if (LogicalDeviceNumber >= DAC960_MaxLogicalDrives) {
1876 DAC960_Error("DAC960: Logical Drive Number %d not supported\n",
1877 Controller, LogicalDeviceNumber);
1878 break;
1879 }
1880 if (NewLogicalDeviceInfo->DeviceBlockSizeInBytes != DAC960_BlockSize) {
1881 DAC960_Error("DAC960: Logical Drive Block Size %d not supported\n",
1882 Controller, NewLogicalDeviceInfo->DeviceBlockSizeInBytes);
1883 LogicalDeviceNumber++;
1884 continue;
1885 }
1886 PhysicalDevice.Controller = 0;
1887 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
1888 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
1889 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
1890 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
1891 PhysicalDevice;
1892 if (NewLogicalDeviceInfo->LogicalDeviceState !=
1893 DAC960_V2_LogicalDevice_Offline)
1894 Controller->LogicalDriveInitiallyAccessible[LogicalDeviceNumber] = true;
0a361e31
AD		 1895 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
1896 GFP_ATOMIC);
1da177e4
LT		 1897 if (LogicalDeviceInfo == NULL)
1898 return DAC960_Failure(Controller, "LOGICAL DEVICE ALLOCATION");
1899 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
1900 LogicalDeviceInfo;
1901 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
1902 sizeof(DAC960_V2_LogicalDeviceInfo_T));
1903 LogicalDeviceNumber++;
1904 }
1905 return true;
1906}
1907
1908
1909/*
1910 DAC960_ReportControllerConfiguration reports the Configuration Information
1911 for Controller.
1912*/
1913
87d156bf 1914static bool DAC960_ReportControllerConfiguration(DAC960_Controller_T
1da177e4
LT		 1915 *Controller)
1916{
1917 DAC960_Info("Configuring Mylex %s PCI RAID Controller\n",
1918 Controller, Controller->ModelName);
1919 DAC960_Info(" Firmware Version: %s, Channels: %d, Memory Size: %dMB\n",
1920 Controller, Controller->FirmwareVersion,
1921 Controller->Channels, Controller->MemorySize);
1922 DAC960_Info(" PCI Bus: %d, Device: %d, Function: %d, I/O Address: ",
1923 Controller, Controller->Bus,
1924 Controller->Device, Controller->Function);
1925 if (Controller->IO_Address == 0)
1926 DAC960_Info("Unassigned\n", Controller);
1927 else DAC960_Info("0x%X\n", Controller, Controller->IO_Address);
1928 DAC960_Info(" PCI Address: 0x%X mapped at 0x%lX, IRQ Channel: %d\n",
1929 Controller, Controller->PCI_Address,
1930 (unsigned long) Controller->BaseAddress,
1931 Controller->IRQ_Channel);
1932 DAC960_Info(" Controller Queue Depth: %d, "
1933 "Maximum Blocks per Command: %d\n",
1934 Controller, Controller->ControllerQueueDepth,
1935 Controller->MaxBlocksPerCommand);
1936 DAC960_Info(" Driver Queue Depth: %d, "
1937 "Scatter/Gather Limit: %d of %d Segments\n",
1938 Controller, Controller->DriverQueueDepth,
1939 Controller->DriverScatterGatherLimit,
1940 Controller->ControllerScatterGatherLimit);
1941 if (Controller->FirmwareType == DAC960_V1_Controller)
1942 {
1943 DAC960_Info(" Stripe Size: %dKB, Segment Size: %dKB, "
1944 "BIOS Geometry: %d/%d\n", Controller,
1945 Controller->V1.StripeSize,
1946 Controller->V1.SegmentSize,
1947 Controller->V1.GeometryTranslationHeads,
1948 Controller->V1.GeometryTranslationSectors);
1949 if (Controller->V1.SAFTE_EnclosureManagementEnabled)
1950 DAC960_Info(" SAF-TE Enclosure Management Enabled\n", Controller);
1951 }
1952 return true;
1953}
1954
1955
1956/*
1957 DAC960_V1_ReadDeviceConfiguration reads the Device Configuration Information
1958 for DAC960 V1 Firmware Controllers by requesting the SCSI Inquiry and SCSI
1959 Inquiry Unit Serial Number information for each device connected to
1960 Controller.
1961*/
1962
87d156bf 1963static bool DAC960_V1_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 1964 *Controller)
1965{
1966 struct dma_loaf local_dma;
1967
1968 dma_addr_t DCDBs_dma[DAC960_V1_MaxChannels];
1969 DAC960_V1_DCDB_T *DCDBs_cpu[DAC960_V1_MaxChannels];
1970
1971 dma_addr_t SCSI_Inquiry_dma[DAC960_V1_MaxChannels];
1972 DAC960_SCSI_Inquiry_T *SCSI_Inquiry_cpu[DAC960_V1_MaxChannels];
1973
1974 dma_addr_t SCSI_NewInquiryUnitSerialNumberDMA[DAC960_V1_MaxChannels];
1975 DAC960_SCSI_Inquiry_UnitSerialNumber_T *SCSI_NewInquiryUnitSerialNumberCPU[DAC960_V1_MaxChannels];
1976
1977 struct completion Completions[DAC960_V1_MaxChannels];
1978 unsigned long flags;
1979 int Channel, TargetID;
1980
1981 if (!init_dma_loaf(Controller->PCIDevice, &local_dma,
1982 DAC960_V1_MaxChannels*(sizeof(DAC960_V1_DCDB_T) +
1983 sizeof(DAC960_SCSI_Inquiry_T) +
1984 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T))))
1985 return DAC960_Failure(Controller,
1986 "DMA ALLOCATION FAILED IN ReadDeviceConfiguration");
1987
1988 for (Channel = 0; Channel < Controller->Channels; Channel++) {
1989 DCDBs_cpu[Channel] = slice_dma_loaf(&local_dma,
1990 sizeof(DAC960_V1_DCDB_T), DCDBs_dma + Channel);
1991 SCSI_Inquiry_cpu[Channel] = slice_dma_loaf(&local_dma,
1992 sizeof(DAC960_SCSI_Inquiry_T),
1993 SCSI_Inquiry_dma + Channel);
1994 SCSI_NewInquiryUnitSerialNumberCPU[Channel] = slice_dma_loaf(&local_dma,
1995 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
1996 SCSI_NewInquiryUnitSerialNumberDMA + Channel);
1997 }
1998
1999 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2000 {
2001 /*
2002 * For each channel, submit a probe for a device on that channel.
2003 * The timeout interval for a device that is present is 10 seconds.
2004 * With this approach, the timeout periods can elapse in parallel
2005 * on each channel.
2006 */
2007 for (Channel = 0; Channel < Controller->Channels; Channel++)
2008 {
2009 dma_addr_t NewInquiryStandardDataDMA = SCSI_Inquiry_dma[Channel];
2010 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2011 dma_addr_t DCDB_dma = DCDBs_dma[Channel];
2012 DAC960_Command_T *Command = Controller->Commands[Channel];
2013 struct completion *Completion = &Completions[Channel];
2014
2015 init_completion(Completion);
2016 DAC960_V1_ClearCommand(Command);
2017 Command->CommandType = DAC960_ImmediateCommand;
2018 Command->Completion = Completion;
2019 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
2020 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_dma;
2021 DCDB->Channel = Channel;
2022 DCDB->TargetID = TargetID;
2023 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
2024 DCDB->EarlyStatus = false;
2025 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
2026 DCDB->NoAutomaticRequestSense = false;
2027 DCDB->DisconnectPermitted = true;
2028 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
2029 DCDB->BusAddress = NewInquiryStandardDataDMA;
2030 DCDB->CDBLength = 6;
2031 DCDB->TransferLengthHigh4 = 0;
2032 DCDB->SenseLength = sizeof(DCDB->SenseData);
2033 DCDB->CDB[0] = 0x12; /* INQUIRY */
2034 DCDB->CDB[1] = 0; /* EVPD = 0 */
2035 DCDB->CDB[2] = 0; /* Page Code */
2036 DCDB->CDB[3] = 0; /* Reserved */
2037 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
2038 DCDB->CDB[5] = 0; /* Control */
2039
2040 spin_lock_irqsave(&Controller->queue_lock, flags);
2041 DAC960_QueueCommand(Command);
2042 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2043 }
2044 /*
2045 * Wait for the problems submitted in the previous loop
2046 * to complete. On the probes that are successful,
2047 * get the serial number of the device that was found.
2048 */
2049 for (Channel = 0; Channel < Controller->Channels; Channel++)
2050 {
2051 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2052 &Controller->V1.InquiryStandardData[Channel][TargetID];
2053 DAC960_SCSI_Inquiry_T *NewInquiryStandardData = SCSI_Inquiry_cpu[Channel];
2054 dma_addr_t NewInquiryUnitSerialNumberDMA =
2055 SCSI_NewInquiryUnitSerialNumberDMA[Channel];
2056 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2057 SCSI_NewInquiryUnitSerialNumberCPU[Channel];
2058 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2059 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2060 DAC960_Command_T *Command = Controller->Commands[Channel];
2061 DAC960_V1_DCDB_T *DCDB = DCDBs_cpu[Channel];
2062 struct completion *Completion = &Completions[Channel];
2063
2064 wait_for_completion(Completion);
2065
2066 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2067 memset(InquiryStandardData, 0, sizeof(DAC960_SCSI_Inquiry_T));
2068 InquiryStandardData->PeripheralDeviceType = 0x1F;
2069 continue;
2070 } else
2071 memcpy(InquiryStandardData, NewInquiryStandardData, sizeof(DAC960_SCSI_Inquiry_T));
2072
2073 /* Preserve Channel and TargetID values from the previous loop */
2074 Command->Completion = Completion;
2075 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2076 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
2077 DCDB->SenseLength = sizeof(DCDB->SenseData);
2078 DCDB->CDB[0] = 0x12; /* INQUIRY */
2079 DCDB->CDB[1] = 1; /* EVPD = 1 */
2080 DCDB->CDB[2] = 0x80; /* Page Code */
2081 DCDB->CDB[3] = 0; /* Reserved */
2082 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
2083 DCDB->CDB[5] = 0; /* Control */
2084
2085 spin_lock_irqsave(&Controller->queue_lock, flags);
2086 DAC960_QueueCommand(Command);
2087 spin_unlock_irqrestore(&Controller->queue_lock, flags);
2088 wait_for_completion(Completion);
2089
2090 if (Command->V1.CommandStatus != DAC960_V1_NormalCompletion) {
2091 memset(InquiryUnitSerialNumber, 0,
2092 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2093 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2094 } else
2095 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2096 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2097 }
2098 }
2099 free_dma_loaf(Controller->PCIDevice, &local_dma);
2100 return true;
2101}
2102
2103
2104/*
2105 DAC960_V2_ReadDeviceConfiguration reads the Device Configuration Information
2106 for DAC960 V2 Firmware Controllers by requesting the Physical Device
2107 Information and SCSI Inquiry Unit Serial Number information for each
2108 device connected to Controller.
2109*/
2110
87d156bf 2111static bool DAC960_V2_ReadDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2112 *Controller)
2113{
2114 unsigned char Channel = 0, TargetID = 0, LogicalUnit = 0;
2115 unsigned short PhysicalDeviceIndex = 0;
2116
2117 while (true)
2118 {
2119 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
2120 Controller->V2.NewPhysicalDeviceInformation;
2121 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo;
2122 DAC960_SCSI_Inquiry_UnitSerialNumber_T *NewInquiryUnitSerialNumber =
2123 Controller->V2.NewInquiryUnitSerialNumber;
2124 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber;
2125
2126 if (!DAC960_V2_NewPhysicalDeviceInfo(Controller, Channel, TargetID, LogicalUnit))
2127 break;
2128
0a361e31
AD		 2129 PhysicalDeviceInfo = kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T),
2130 GFP_ATOMIC);
1da177e4
LT		 2131 if (PhysicalDeviceInfo == NULL)
2132 return DAC960_Failure(Controller, "PHYSICAL DEVICE ALLOCATION");
2133 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex] =
2134 PhysicalDeviceInfo;
2135 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
2136 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
2137
0a361e31
AD		 2138 InquiryUnitSerialNumber = kmalloc(
2139 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T), GFP_ATOMIC);
1da177e4
LT		 2140 if (InquiryUnitSerialNumber == NULL) {
2141 kfree(PhysicalDeviceInfo);
2142 return DAC960_Failure(Controller, "SERIAL NUMBER ALLOCATION");
2143 }
2144 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex] =
2145 InquiryUnitSerialNumber;
2146
2147 Channel = NewPhysicalDeviceInfo->Channel;
2148 TargetID = NewPhysicalDeviceInfo->TargetID;
2149 LogicalUnit = NewPhysicalDeviceInfo->LogicalUnit;
2150
2151 /*
2152 Some devices do NOT have Unit Serial Numbers.
2153 This command fails for them. But, we still want to
2154 remember those devices are there. Construct a
2155 UnitSerialNumber structure for the failure case.
2156 */
2157 if (!DAC960_V2_NewInquiryUnitSerialNumber(Controller, Channel, TargetID, LogicalUnit)) {
2158 memset(InquiryUnitSerialNumber, 0,
2159 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2160 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
2161 } else
2162 memcpy(InquiryUnitSerialNumber, NewInquiryUnitSerialNumber,
2163 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
2164
2165 PhysicalDeviceIndex++;
2166 LogicalUnit++;
2167 }
2168 return true;
2169}
2170
2171
2172/*
2173 DAC960_SanitizeInquiryData sanitizes the Vendor, Model, Revision, and
2174 Product Serial Number fields of the Inquiry Standard Data and Inquiry
2175 Unit Serial Number structures.
2176*/
2177
2178static void DAC960_SanitizeInquiryData(DAC960_SCSI_Inquiry_T
2179 *InquiryStandardData,
2180 DAC960_SCSI_Inquiry_UnitSerialNumber_T
2181 *InquiryUnitSerialNumber,
2182 unsigned char *Vendor,
2183 unsigned char *Model,
2184 unsigned char *Revision,
2185 unsigned char *SerialNumber)
2186{
2187 int SerialNumberLength, i;
2188 if (InquiryStandardData->PeripheralDeviceType == 0x1F) return;
2189 for (i = 0; i < sizeof(InquiryStandardData->VendorIdentification); i++)
2190 {
2191 unsigned char VendorCharacter =
2192 InquiryStandardData->VendorIdentification[i];
2193 Vendor[i] = (VendorCharacter >= ' ' && VendorCharacter <= '~'
2194 ? VendorCharacter : ' ');
2195 }
2196 Vendor[sizeof(InquiryStandardData->VendorIdentification)] = '\0';
2197 for (i = 0; i < sizeof(InquiryStandardData->ProductIdentification); i++)
2198 {
2199 unsigned char ModelCharacter =
2200 InquiryStandardData->ProductIdentification[i];
2201 Model[i] = (ModelCharacter >= ' ' && ModelCharacter <= '~'
2202 ? ModelCharacter : ' ');
2203 }
2204 Model[sizeof(InquiryStandardData->ProductIdentification)] = '\0';
2205 for (i = 0; i < sizeof(InquiryStandardData->ProductRevisionLevel); i++)
2206 {
2207 unsigned char RevisionCharacter =
2208 InquiryStandardData->ProductRevisionLevel[i];
2209 Revision[i] = (RevisionCharacter >= ' ' && RevisionCharacter <= '~'
2210 ? RevisionCharacter : ' ');
2211 }
2212 Revision[sizeof(InquiryStandardData->ProductRevisionLevel)] = '\0';
2213 if (InquiryUnitSerialNumber->PeripheralDeviceType == 0x1F) return;
2214 SerialNumberLength = InquiryUnitSerialNumber->PageLength;
2215 if (SerialNumberLength >
2216 sizeof(InquiryUnitSerialNumber->ProductSerialNumber))
2217 SerialNumberLength = sizeof(InquiryUnitSerialNumber->ProductSerialNumber);
2218 for (i = 0; i < SerialNumberLength; i++)
2219 {
2220 unsigned char SerialNumberCharacter =
2221 InquiryUnitSerialNumber->ProductSerialNumber[i];
2222 SerialNumber[i] =
2223 (SerialNumberCharacter >= ' ' && SerialNumberCharacter <= '~'
2224 ? SerialNumberCharacter : ' ');
2225 }
2226 SerialNumber[SerialNumberLength] = '\0';
2227}
2228
2229
2230/*
2231 DAC960_V1_ReportDeviceConfiguration reports the Device Configuration
2232 Information for DAC960 V1 Firmware Controllers.
2233*/
2234
87d156bf 2235static bool DAC960_V1_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2236 *Controller)
2237{
2238 int LogicalDriveNumber, Channel, TargetID;
2239 DAC960_Info(" Physical Devices:\n", Controller);
2240 for (Channel = 0; Channel < Controller->Channels; Channel++)
2241 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
2242 {
2243 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2244 &Controller->V1.InquiryStandardData[Channel][TargetID];
2245 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2246 &Controller->V1.InquiryUnitSerialNumber[Channel][TargetID];
2247 DAC960_V1_DeviceState_T *DeviceState =
2248 &Controller->V1.DeviceState[Channel][TargetID];
2249 DAC960_V1_ErrorTableEntry_T *ErrorEntry =
2250 &Controller->V1.ErrorTable.ErrorTableEntries[Channel][TargetID];
2251 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2252 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2253 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2254 char SerialNumber[1+sizeof(InquiryUnitSerialNumber
2255 ->ProductSerialNumber)];
2256 if (InquiryStandardData->PeripheralDeviceType == 0x1F) continue;
2257 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2258 Vendor, Model, Revision, SerialNumber);
2259 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2260 Controller, Channel, TargetID, (TargetID < 10 ? " " : ""),
2261 Vendor, Model, Revision);
2262 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2263 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2264 if (DeviceState->Present &&
2265 DeviceState->DeviceType == DAC960_V1_DiskType)
2266 {
2267 if (Controller->V1.DeviceResetCount[Channel][TargetID] > 0)
2268 DAC960_Info(" Disk Status: %s, %u blocks, %d resets\n",
2269 Controller,
2270 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2271 ? "Dead"
2272 : DeviceState->DeviceState
2273 == DAC960_V1_Device_WriteOnly
2274 ? "Write-Only"
2275 : DeviceState->DeviceState
2276 == DAC960_V1_Device_Online
2277 ? "Online" : "Standby"),
2278 DeviceState->DiskSize,
2279 Controller->V1.DeviceResetCount[Channel][TargetID]);
2280 else
2281 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2282 (DeviceState->DeviceState == DAC960_V1_Device_Dead
2283 ? "Dead"
2284 : DeviceState->DeviceState
2285 == DAC960_V1_Device_WriteOnly
2286 ? "Write-Only"
2287 : DeviceState->DeviceState
2288 == DAC960_V1_Device_Online
2289 ? "Online" : "Standby"),
2290 DeviceState->DiskSize);
2291 }
2292 if (ErrorEntry->ParityErrorCount > 0 ||
2293 ErrorEntry->SoftErrorCount > 0 ||
2294 ErrorEntry->HardErrorCount > 0 ||
2295 ErrorEntry->MiscErrorCount > 0)
2296 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2297 "Hard: %d, Misc: %d\n", Controller,
2298 ErrorEntry->ParityErrorCount,
2299 ErrorEntry->SoftErrorCount,
2300 ErrorEntry->HardErrorCount,
2301 ErrorEntry->MiscErrorCount);
2302 }
2303 DAC960_Info(" Logical Drives:\n", Controller);
2304 for (LogicalDriveNumber = 0;
2305 LogicalDriveNumber < Controller->LogicalDriveCount;
2306 LogicalDriveNumber++)
2307 {
2308 DAC960_V1_LogicalDriveInformation_T *LogicalDriveInformation =
2309 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
2310 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks, %s\n",
2311 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2312 LogicalDriveInformation->RAIDLevel,
2313 (LogicalDriveInformation->LogicalDriveState
2314 == DAC960_V1_LogicalDrive_Online
2315 ? "Online"
2316 : LogicalDriveInformation->LogicalDriveState
2317 == DAC960_V1_LogicalDrive_Critical
2318 ? "Critical" : "Offline"),
2319 LogicalDriveInformation->LogicalDriveSize,
2320 (LogicalDriveInformation->WriteBack
2321 ? "Write Back" : "Write Thru"));
2322 }
2323 return true;
2324}
2325
2326
2327/*
2328 DAC960_V2_ReportDeviceConfiguration reports the Device Configuration
2329 Information for DAC960 V2 Firmware Controllers.
2330*/
2331
87d156bf 2332static bool DAC960_V2_ReportDeviceConfiguration(DAC960_Controller_T
1da177e4
LT		 2333 *Controller)
2334{
2335 int PhysicalDeviceIndex, LogicalDriveNumber;
2336 DAC960_Info(" Physical Devices:\n", Controller);
2337 for (PhysicalDeviceIndex = 0;
2338 PhysicalDeviceIndex < DAC960_V2_MaxPhysicalDevices;
2339 PhysicalDeviceIndex++)
2340 {
2341 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
2342 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
2343 DAC960_SCSI_Inquiry_T *InquiryStandardData =
2344 (DAC960_SCSI_Inquiry_T *) &PhysicalDeviceInfo->SCSI_InquiryData;
2345 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
2346 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
2347 char Vendor[1+sizeof(InquiryStandardData->VendorIdentification)];
2348 char Model[1+sizeof(InquiryStandardData->ProductIdentification)];
2349 char Revision[1+sizeof(InquiryStandardData->ProductRevisionLevel)];
2350 char SerialNumber[1+sizeof(InquiryUnitSerialNumber->ProductSerialNumber)];
2351 if (PhysicalDeviceInfo == NULL) break;
2352 DAC960_SanitizeInquiryData(InquiryStandardData, InquiryUnitSerialNumber,
2353 Vendor, Model, Revision, SerialNumber);
2354 DAC960_Info(" %d:%d%s Vendor: %s Model: %s Revision: %s\n",
2355 Controller,
2356 PhysicalDeviceInfo->Channel,
2357 PhysicalDeviceInfo->TargetID,
2358 (PhysicalDeviceInfo->TargetID < 10 ? " " : ""),
2359 Vendor, Model, Revision);
2360 if (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers == 0)
2361 DAC960_Info(" %sAsynchronous\n", Controller,
2362 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2363 ? "Wide " :""));
2364 else
2365 DAC960_Info(" %sSynchronous at %d MB/sec\n", Controller,
2366 (PhysicalDeviceInfo->NegotiatedDataWidthBits == 16
2367 ? "Wide " :""),
2368 (PhysicalDeviceInfo->NegotiatedSynchronousMegaTransfers
2369 * PhysicalDeviceInfo->NegotiatedDataWidthBits/8));
2370 if (InquiryUnitSerialNumber->PeripheralDeviceType != 0x1F)
2371 DAC960_Info(" Serial Number: %s\n", Controller, SerialNumber);
2372 if (PhysicalDeviceInfo->PhysicalDeviceState ==
2373 DAC960_V2_Device_Unconfigured)
2374 continue;
2375 DAC960_Info(" Disk Status: %s, %u blocks\n", Controller,
2376 (PhysicalDeviceInfo->PhysicalDeviceState
2377 == DAC960_V2_Device_Online
2378 ? "Online"
2379 : PhysicalDeviceInfo->PhysicalDeviceState
2380 == DAC960_V2_Device_Rebuild
2381 ? "Rebuild"
2382 : PhysicalDeviceInfo->PhysicalDeviceState
2383 == DAC960_V2_Device_Missing
2384 ? "Missing"
2385 : PhysicalDeviceInfo->PhysicalDeviceState
2386 == DAC960_V2_Device_Critical
2387 ? "Critical"
2388 : PhysicalDeviceInfo->PhysicalDeviceState
2389 == DAC960_V2_Device_Dead
2390 ? "Dead"
2391 : PhysicalDeviceInfo->PhysicalDeviceState
2392 == DAC960_V2_Device_SuspectedDead
2393 ? "Suspected-Dead"
2394 : PhysicalDeviceInfo->PhysicalDeviceState
2395 == DAC960_V2_Device_CommandedOffline
2396 ? "Commanded-Offline"
2397 : PhysicalDeviceInfo->PhysicalDeviceState
2398 == DAC960_V2_Device_Standby
2399 ? "Standby" : "Unknown"),
2400 PhysicalDeviceInfo->ConfigurableDeviceSize);
2401 if (PhysicalDeviceInfo->ParityErrors == 0 &&
2402 PhysicalDeviceInfo->SoftErrors == 0 &&
2403 PhysicalDeviceInfo->HardErrors == 0 &&
2404 PhysicalDeviceInfo->MiscellaneousErrors == 0 &&
2405 PhysicalDeviceInfo->CommandTimeouts == 0 &&
2406 PhysicalDeviceInfo->Retries == 0 &&
2407 PhysicalDeviceInfo->Aborts == 0 &&
2408 PhysicalDeviceInfo->PredictedFailuresDetected == 0)
2409 continue;
2410 DAC960_Info(" Errors - Parity: %d, Soft: %d, "
2411 "Hard: %d, Misc: %d\n", Controller,
2412 PhysicalDeviceInfo->ParityErrors,
2413 PhysicalDeviceInfo->SoftErrors,
2414 PhysicalDeviceInfo->HardErrors,
2415 PhysicalDeviceInfo->MiscellaneousErrors);
2416 DAC960_Info(" Timeouts: %d, Retries: %d, "
2417 "Aborts: %d, Predicted: %d\n", Controller,
2418 PhysicalDeviceInfo->CommandTimeouts,
2419 PhysicalDeviceInfo->Retries,
2420 PhysicalDeviceInfo->Aborts,
2421 PhysicalDeviceInfo->PredictedFailuresDetected);
2422 }
2423 DAC960_Info(" Logical Drives:\n", Controller);
2424 for (LogicalDriveNumber = 0;
2425 LogicalDriveNumber < DAC960_MaxLogicalDrives;
2426 LogicalDriveNumber++)
2427 {
2428 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
2429 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
2430 unsigned char *ReadCacheStatus[] = { "Read Cache Disabled",
2431 "Read Cache Enabled",
2432 "Read Ahead Enabled",
2433 "Intelligent Read Ahead Enabled",
2434 "-", "-", "-", "-" };
2435 unsigned char *WriteCacheStatus[] = { "Write Cache Disabled",
2436 "Logical Device Read Only",
2437 "Write Cache Enabled",
2438 "Intelligent Write Cache Enabled",
2439 "-", "-", "-", "-" };
2440 unsigned char *GeometryTranslation;
2441 if (LogicalDeviceInfo == NULL) continue;
2442 switch (LogicalDeviceInfo->DriveGeometry)
2443 {
2444 case DAC960_V2_Geometry_128_32:
2445 GeometryTranslation = "128/32";
2446 break;
2447 case DAC960_V2_Geometry_255_63:
2448 GeometryTranslation = "255/63";
2449 break;
2450 default:
2451 GeometryTranslation = "Invalid";
2452 DAC960_Error("Illegal Logical Device Geometry %d\n",
2453 Controller, LogicalDeviceInfo->DriveGeometry);
2454 break;
2455 }
2456 DAC960_Info(" /dev/rd/c%dd%d: RAID-%d, %s, %u blocks\n",
2457 Controller, Controller->ControllerNumber, LogicalDriveNumber,
2458 LogicalDeviceInfo->RAIDLevel,
2459 (LogicalDeviceInfo->LogicalDeviceState
2460 == DAC960_V2_LogicalDevice_Online
2461 ? "Online"
2462 : LogicalDeviceInfo->LogicalDeviceState
2463 == DAC960_V2_LogicalDevice_Critical
2464 ? "Critical" : "Offline"),
2465 LogicalDeviceInfo->ConfigurableDeviceSize);
2466 DAC960_Info(" Logical Device %s, BIOS Geometry: %s\n",
2467 Controller,
2468 (LogicalDeviceInfo->LogicalDeviceControl
2469 .LogicalDeviceInitialized
2470 ? "Initialized" : "Uninitialized"),
2471 GeometryTranslation);
2472 if (LogicalDeviceInfo->StripeSize == 0)
2473 {
2474 if (LogicalDeviceInfo->CacheLineSize == 0)
2475 DAC960_Info(" Stripe Size: N/A, "
2476 "Segment Size: N/A\n", Controller);
2477 else
2478 DAC960_Info(" Stripe Size: N/A, "
2479 "Segment Size: %dKB\n", Controller,
2480 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2481 }
2482 else
2483 {
2484 if (LogicalDeviceInfo->CacheLineSize == 0)
2485 DAC960_Info(" Stripe Size: %dKB, "
2486 "Segment Size: N/A\n", Controller,
2487 1 << (LogicalDeviceInfo->StripeSize - 2));
2488 else
2489 DAC960_Info(" Stripe Size: %dKB, "
2490 "Segment Size: %dKB\n", Controller,
2491 1 << (LogicalDeviceInfo->StripeSize - 2),
2492 1 << (LogicalDeviceInfo->CacheLineSize - 2));
2493 }
2494 DAC960_Info(" %s, %s\n", Controller,
2495 ReadCacheStatus[
2496 LogicalDeviceInfo->LogicalDeviceControl.ReadCache],
2497 WriteCacheStatus[
2498 LogicalDeviceInfo->LogicalDeviceControl.WriteCache]);
2499 if (LogicalDeviceInfo->SoftErrors > 0 ||
2500 LogicalDeviceInfo->CommandsFailed > 0 ||
2501 LogicalDeviceInfo->DeferredWriteErrors)
2502 DAC960_Info(" Errors - Soft: %d, Failed: %d, "
2503 "Deferred Write: %d\n", Controller,
2504 LogicalDeviceInfo->SoftErrors,
2505 LogicalDeviceInfo->CommandsFailed,
2506 LogicalDeviceInfo->DeferredWriteErrors);
2507
2508 }
2509 return true;
2510}
2511
2512/*
2513 DAC960_RegisterBlockDevice registers the Block Device structures
2514 associated with Controller.
2515*/
2516
87d156bf 2517static bool DAC960_RegisterBlockDevice(DAC960_Controller_T *Controller)
1da177e4
LT		 2518{
2519 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2520 int n;
2521
2522 /*
2523 Register the Block Device Major Number for this DAC960 Controller.
2524 */
2525 if (register_blkdev(MajorNumber, "dac960") < 0)
2526 return false;
2527
2528 for (n = 0; n < DAC960_MaxLogicalDrives; n++) {
2529 struct gendisk *disk = Controller->disks[n];
2530 struct request_queue *RequestQueue;
2531
2532 /* for now, let all request queues share controller's lock */
2533 RequestQueue = blk_init_queue(DAC960_RequestFunction,&Controller->queue_lock);
2534 if (!RequestQueue) {
2535 printk("DAC960: failure to allocate request queue\n");
2536 continue;
2537 }
2538 Controller->RequestQueue[n] = RequestQueue;
1da177e4 2539 RequestQueue->queuedata = Controller;
8a78362c 2540 blk_queue_max_segments(RequestQueue, Controller->DriverScatterGatherLimit);
086fa5ff 2541 blk_queue_max_hw_sectors(RequestQueue, Controller->MaxBlocksPerCommand);
1da177e4
LT		 2542 disk->queue = RequestQueue;
2543 sprintf(disk->disk_name, "rd/c%dd%d", Controller->ControllerNumber, n);
1da177e4
LT		 2544 disk->major = MajorNumber;
2545 disk->first_minor = n << DAC960_MaxPartitionsBits;
2546 disk->fops = &DAC960_BlockDeviceOperations;
2547 }
2548 /*
2549 Indicate the Block Device Registration completed successfully,
2550 */
2551 return true;
2552}
2553
2554
2555/*
2556 DAC960_UnregisterBlockDevice unregisters the Block Device structures
2557 associated with Controller.
2558*/
2559
2560static void DAC960_UnregisterBlockDevice(DAC960_Controller_T *Controller)
2561{
2562 int MajorNumber = DAC960_MAJOR + Controller->ControllerNumber;
2563 int disk;
2564
2565 /* does order matter when deleting gendisk and cleanup in request queue? */
2566 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
2567 del_gendisk(Controller->disks[disk]);
2568 blk_cleanup_queue(Controller->RequestQueue[disk]);
2569 Controller->RequestQueue[disk] = NULL;
2570 }
2571
2572 /*
2573 Unregister the Block Device Major Number for this DAC960 Controller.
2574 */
2575 unregister_blkdev(MajorNumber, "dac960");
2576}
2577
2578/*
2579 DAC960_ComputeGenericDiskInfo computes the values for the Generic Disk
2580 Information Partition Sector Counts and Block Sizes.
2581*/
2582
2583static void DAC960_ComputeGenericDiskInfo(DAC960_Controller_T *Controller)
2584{
2585 int disk;
2586 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++)
2587 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
2588}
2589
2590/*
2591 DAC960_ReportErrorStatus reports Controller BIOS Messages passed through
2592 the Error Status Register when the driver performs the BIOS handshaking.
2593 It returns true for fatal errors and false otherwise.
2594*/
2595
87d156bf 2596static bool DAC960_ReportErrorStatus(DAC960_Controller_T *Controller,
1da177e4
LT		 2597 unsigned char ErrorStatus,
2598 unsigned char Parameter0,
2599 unsigned char Parameter1)
2600{
2601 switch (ErrorStatus)
2602 {
2603 case 0x00:
2604 DAC960_Notice("Physical Device %d:%d Not Responding\n",
2605 Controller, Parameter1, Parameter0);
2606 break;
2607 case 0x08:
2608 if (Controller->DriveSpinUpMessageDisplayed) break;
2609 DAC960_Notice("Spinning Up Drives\n", Controller);
2610 Controller->DriveSpinUpMessageDisplayed = true;
2611 break;
2612 case 0x30:
2613 DAC960_Notice("Configuration Checksum Error\n", Controller);
2614 break;
2615 case 0x60:
2616 DAC960_Notice("Mirror Race Recovery Failed\n", Controller);
2617 break;
2618 case 0x70:
2619 DAC960_Notice("Mirror Race Recovery In Progress\n", Controller);
2620 break;
2621 case 0x90:
2622 DAC960_Notice("Physical Device %d:%d COD Mismatch\n",
2623 Controller, Parameter1, Parameter0);
2624 break;
2625 case 0xA0:
2626 DAC960_Notice("Logical Drive Installation Aborted\n", Controller);
2627 break;
2628 case 0xB0:
2629 DAC960_Notice("Mirror Race On A Critical Logical Drive\n", Controller);
2630 break;
2631 case 0xD0:
2632 DAC960_Notice("New Controller Configuration Found\n", Controller);
2633 break;
2634 case 0xF0:
2635 DAC960_Error("Fatal Memory Parity Error for Controller at\n", Controller);
2636 return true;
2637 default:
2638 DAC960_Error("Unknown Initialization Error %02X for Controller at\n",
2639 Controller, ErrorStatus);
2640 return true;
2641 }
2642 return false;
2643}
2644
2645
2646/*
2647 * DAC960_DetectCleanup releases the resources that were allocated
2648 * during DAC960_DetectController(). DAC960_DetectController can
2649 * has several internal failure points, so not ALL resources may
2650 * have been allocated. It's important to free only
2651 * resources that HAVE been allocated. The code below always
2652 * tests that the resource has been allocated before attempting to
2653 * free it.
2654 */
2655static void DAC960_DetectCleanup(DAC960_Controller_T *Controller)
2656{
2657 int i;
2658
2659 /* Free the memory mailbox, status, and related structures */
2660 free_dma_loaf(Controller->PCIDevice, &Controller->DmaPages);
2661 if (Controller->MemoryMappedAddress) {
2662 switch(Controller->HardwareType)
2663 {
5b76ffd5
CH		 2664 case DAC960_GEM_Controller:
2665 DAC960_GEM_DisableInterrupts(Controller->BaseAddress);
2666 break;
1da177e4
LT		 2667 case DAC960_BA_Controller:
2668 DAC960_BA_DisableInterrupts(Controller->BaseAddress);
2669 break;
2670 case DAC960_LP_Controller:
2671 DAC960_LP_DisableInterrupts(Controller->BaseAddress);
2672 break;
2673 case DAC960_LA_Controller:
2674 DAC960_LA_DisableInterrupts(Controller->BaseAddress);
2675 break;
2676 case DAC960_PG_Controller:
2677 DAC960_PG_DisableInterrupts(Controller->BaseAddress);
2678 break;
2679 case DAC960_PD_Controller:
2680 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2681 break;
2682 case DAC960_P_Controller:
2683 DAC960_PD_DisableInterrupts(Controller->BaseAddress);
2684 break;
2685 }
2686 iounmap(Controller->MemoryMappedAddress);
2687 }
2688 if (Controller->IRQ_Channel)
2689 free_irq(Controller->IRQ_Channel, Controller);
2690 if (Controller->IO_Address)
2691 release_region(Controller->IO_Address, 0x80);
2692 pci_disable_device(Controller->PCIDevice);
2693 for (i = 0; (i < DAC960_MaxLogicalDrives) && Controller->disks[i]; i++)
2694 put_disk(Controller->disks[i]);
2695 DAC960_Controllers[Controller->ControllerNumber] = NULL;
2696 kfree(Controller);
2697}
2698
2699
2700/*
2701 DAC960_DetectController detects Mylex DAC960/AcceleRAID/eXtremeRAID
2702 PCI RAID Controllers by interrogating the PCI Configuration Space for
2703 Controller Type.
2704*/
2705
2706static DAC960_Controller_T *
2707DAC960_DetectController(struct pci_dev *PCI_Device,
2708 const struct pci_device_id *entry)
2709{
2710 struct DAC960_privdata *privdata =
2711 (struct DAC960_privdata *)entry->driver_data;
7d12e780 2712 irq_handler_t InterruptHandler = privdata->InterruptHandler;
1da177e4
LT		 2713 unsigned int MemoryWindowSize = privdata->MemoryWindowSize;
2714 DAC960_Controller_T *Controller = NULL;
2715 unsigned char DeviceFunction = PCI_Device->devfn;
2716 unsigned char ErrorStatus, Parameter0, Parameter1;
2717 unsigned int IRQ_Channel;
2718 void __iomem *BaseAddress;
2719 int i;
2720
06ff37ff 2721 Controller = kzalloc(sizeof(DAC960_Controller_T), GFP_ATOMIC);
1da177e4
LT		 2722 if (Controller == NULL) {
2723 DAC960_Error("Unable to allocate Controller structure for "
2724 "Controller at\n", NULL);
2725 return NULL;
2726 }
1da177e4
LT		 2727 Controller->ControllerNumber = DAC960_ControllerCount;
2728 DAC960_Controllers[DAC960_ControllerCount++] = Controller;
2729 Controller->Bus = PCI_Device->bus->number;
2730 Controller->FirmwareType = privdata->FirmwareType;
2731 Controller->HardwareType = privdata->HardwareType;
2732 Controller->Device = DeviceFunction >> 3;
2733 Controller->Function = DeviceFunction & 0x7;
2734 Controller->PCIDevice = PCI_Device;
2735 strcpy(Controller->FullModelName, "DAC960");
2736
2737 if (pci_enable_device(PCI_Device))
2738 goto Failure;
2739
2740 switch (Controller->HardwareType)
2741 {
5b76ffd5
CH		 2742 case DAC960_GEM_Controller:
2743 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2744 break;
1da177e4
LT		 2745 case DAC960_BA_Controller:
2746 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2747 break;
2748 case DAC960_LP_Controller:
2749 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2750 break;
2751 case DAC960_LA_Controller:
2752 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2753 break;
2754 case DAC960_PG_Controller:
2755 Controller->PCI_Address = pci_resource_start(PCI_Device, 0);
2756 break;
2757 case DAC960_PD_Controller:
2758 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2759 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2760 break;
2761 case DAC960_P_Controller:
2762 Controller->IO_Address = pci_resource_start(PCI_Device, 0);
2763 Controller->PCI_Address = pci_resource_start(PCI_Device, 1);
2764 break;
2765 }
2766
2767 pci_set_drvdata(PCI_Device, (void *)((long)Controller->ControllerNumber));
2768 for (i = 0; i < DAC960_MaxLogicalDrives; i++) {
2769 Controller->disks[i] = alloc_disk(1<<DAC960_MaxPartitionsBits);
2770 if (!Controller->disks[i])
2771 goto Failure;
2772 Controller->disks[i]->private_data = (void *)((long)i);
2773 }
2774 init_waitqueue_head(&Controller->CommandWaitQueue);
2775 init_waitqueue_head(&Controller->HealthStatusWaitQueue);
2776 spin_lock_init(&Controller->queue_lock);
2777 DAC960_AnnounceDriver(Controller);
2778 /*
2779 Map the Controller Register Window.
2780 */
2781 if (MemoryWindowSize < PAGE_SIZE)
2782 MemoryWindowSize = PAGE_SIZE;
2783 Controller->MemoryMappedAddress =
2784 ioremap_nocache(Controller->PCI_Address & PAGE_MASK, MemoryWindowSize);
2785 Controller->BaseAddress =
2786 Controller->MemoryMappedAddress + (Controller->PCI_Address & ~PAGE_MASK);
2787 if (Controller->MemoryMappedAddress == NULL)
2788 {
2789 DAC960_Error("Unable to map Controller Register Window for "
2790 "Controller at\n", Controller);
2791 goto Failure;
2792 }
2793 BaseAddress = Controller->BaseAddress;
2794 switch (Controller->HardwareType)
2795 {
5b76ffd5
CH		 2796 case DAC960_GEM_Controller:
2797 DAC960_GEM_DisableInterrupts(BaseAddress);
2798 DAC960_GEM_AcknowledgeHardwareMailboxStatus(BaseAddress);
2799 udelay(1000);
2800 while (DAC960_GEM_InitializationInProgressP(BaseAddress))
2801 {
2802 if (DAC960_GEM_ReadErrorStatus(BaseAddress, &ErrorStatus,
2803 &Parameter0, &Parameter1) &&
2804 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2805 Parameter0, Parameter1))
2806 goto Failure;
2807 udelay(10);
2808 }
2809 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2810 {
2811 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2812 "for Controller at\n", Controller);
2813 goto Failure;
2814 }
2815 DAC960_GEM_EnableInterrupts(BaseAddress);
2816 Controller->QueueCommand = DAC960_GEM_QueueCommand;
2817 Controller->ReadControllerConfiguration =
2818 DAC960_V2_ReadControllerConfiguration;
2819 Controller->ReadDeviceConfiguration =
2820 DAC960_V2_ReadDeviceConfiguration;
2821 Controller->ReportDeviceConfiguration =
2822 DAC960_V2_ReportDeviceConfiguration;
2823 Controller->QueueReadWriteCommand =
2824 DAC960_V2_QueueReadWriteCommand;
2825 break;
1da177e4
LT		 2826 case DAC960_BA_Controller:
2827 DAC960_BA_DisableInterrupts(BaseAddress);
2828 DAC960_BA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2829 udelay(1000);
2830 while (DAC960_BA_InitializationInProgressP(BaseAddress))
2831 {
2832 if (DAC960_BA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2833 &Parameter0, &Parameter1) &&
2834 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2835 Parameter0, Parameter1))
2836 goto Failure;
2837 udelay(10);
2838 }
2839 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2840 {
2841 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2842 "for Controller at\n", Controller);
2843 goto Failure;
2844 }
2845 DAC960_BA_EnableInterrupts(BaseAddress);
2846 Controller->QueueCommand = DAC960_BA_QueueCommand;
2847 Controller->ReadControllerConfiguration =
2848 DAC960_V2_ReadControllerConfiguration;
2849 Controller->ReadDeviceConfiguration =
2850 DAC960_V2_ReadDeviceConfiguration;
2851 Controller->ReportDeviceConfiguration =
2852 DAC960_V2_ReportDeviceConfiguration;
2853 Controller->QueueReadWriteCommand =
2854 DAC960_V2_QueueReadWriteCommand;
2855 break;
2856 case DAC960_LP_Controller:
2857 DAC960_LP_DisableInterrupts(BaseAddress);
2858 DAC960_LP_AcknowledgeHardwareMailboxStatus(BaseAddress);
2859 udelay(1000);
2860 while (DAC960_LP_InitializationInProgressP(BaseAddress))
2861 {
2862 if (DAC960_LP_ReadErrorStatus(BaseAddress, &ErrorStatus,
2863 &Parameter0, &Parameter1) &&
2864 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2865 Parameter0, Parameter1))
2866 goto Failure;
2867 udelay(10);
2868 }
2869 if (!DAC960_V2_EnableMemoryMailboxInterface(Controller))
2870 {
2871 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2872 "for Controller at\n", Controller);
2873 goto Failure;
2874 }
2875 DAC960_LP_EnableInterrupts(BaseAddress);
2876 Controller->QueueCommand = DAC960_LP_QueueCommand;
2877 Controller->ReadControllerConfiguration =
2878 DAC960_V2_ReadControllerConfiguration;
2879 Controller->ReadDeviceConfiguration =
2880 DAC960_V2_ReadDeviceConfiguration;
2881 Controller->ReportDeviceConfiguration =
2882 DAC960_V2_ReportDeviceConfiguration;
2883 Controller->QueueReadWriteCommand =
2884 DAC960_V2_QueueReadWriteCommand;
2885 break;
2886 case DAC960_LA_Controller:
2887 DAC960_LA_DisableInterrupts(BaseAddress);
2888 DAC960_LA_AcknowledgeHardwareMailboxStatus(BaseAddress);
2889 udelay(1000);
2890 while (DAC960_LA_InitializationInProgressP(BaseAddress))
2891 {
2892 if (DAC960_LA_ReadErrorStatus(BaseAddress, &ErrorStatus,
2893 &Parameter0, &Parameter1) &&
2894 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2895 Parameter0, Parameter1))
2896 goto Failure;
2897 udelay(10);
2898 }
2899 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2900 {
2901 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2902 "for Controller at\n", Controller);
2903 goto Failure;
2904 }
2905 DAC960_LA_EnableInterrupts(BaseAddress);
2906 if (Controller->V1.DualModeMemoryMailboxInterface)
2907 Controller->QueueCommand = DAC960_LA_QueueCommandDualMode;
2908 else Controller->QueueCommand = DAC960_LA_QueueCommandSingleMode;
2909 Controller->ReadControllerConfiguration =
2910 DAC960_V1_ReadControllerConfiguration;
2911 Controller->ReadDeviceConfiguration =
2912 DAC960_V1_ReadDeviceConfiguration;
2913 Controller->ReportDeviceConfiguration =
2914 DAC960_V1_ReportDeviceConfiguration;
2915 Controller->QueueReadWriteCommand =
2916 DAC960_V1_QueueReadWriteCommand;
2917 break;
2918 case DAC960_PG_Controller:
2919 DAC960_PG_DisableInterrupts(BaseAddress);
2920 DAC960_PG_AcknowledgeHardwareMailboxStatus(BaseAddress);
2921 udelay(1000);
2922 while (DAC960_PG_InitializationInProgressP(BaseAddress))
2923 {
2924 if (DAC960_PG_ReadErrorStatus(BaseAddress, &ErrorStatus,
2925 &Parameter0, &Parameter1) &&
2926 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2927 Parameter0, Parameter1))
2928 goto Failure;
2929 udelay(10);
2930 }
2931 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2932 {
2933 DAC960_Error("Unable to Enable Memory Mailbox Interface "
2934 "for Controller at\n", Controller);
2935 goto Failure;
2936 }
2937 DAC960_PG_EnableInterrupts(BaseAddress);
2938 if (Controller->V1.DualModeMemoryMailboxInterface)
2939 Controller->QueueCommand = DAC960_PG_QueueCommandDualMode;
2940 else Controller->QueueCommand = DAC960_PG_QueueCommandSingleMode;
2941 Controller->ReadControllerConfiguration =
2942 DAC960_V1_ReadControllerConfiguration;
2943 Controller->ReadDeviceConfiguration =
2944 DAC960_V1_ReadDeviceConfiguration;
2945 Controller->ReportDeviceConfiguration =
2946 DAC960_V1_ReportDeviceConfiguration;
2947 Controller->QueueReadWriteCommand =
2948 DAC960_V1_QueueReadWriteCommand;
2949 break;
2950 case DAC960_PD_Controller:
2951 if (!request_region(Controller->IO_Address, 0x80,
2952 Controller->FullModelName)) {
ee52c44d 2953 DAC960_Error("IO port 0x%lx busy for Controller at\n",
1da177e4
LT		 2954 Controller, Controller->IO_Address);
2955 goto Failure;
2956 }
2957 DAC960_PD_DisableInterrupts(BaseAddress);
2958 DAC960_PD_AcknowledgeStatus(BaseAddress);
2959 udelay(1000);
2960 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2961 {
2962 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2963 &Parameter0, &Parameter1) &&
2964 DAC960_ReportErrorStatus(Controller, ErrorStatus,
2965 Parameter0, Parameter1))
2966 goto Failure;
2967 udelay(10);
2968 }
2969 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
2970 {
2971 DAC960_Error("Unable to allocate DMA mapped memory "
2972 "for Controller at\n", Controller);
2973 goto Failure;
2974 }
2975 DAC960_PD_EnableInterrupts(BaseAddress);
2976 Controller->QueueCommand = DAC960_PD_QueueCommand;
2977 Controller->ReadControllerConfiguration =
2978 DAC960_V1_ReadControllerConfiguration;
2979 Controller->ReadDeviceConfiguration =
2980 DAC960_V1_ReadDeviceConfiguration;
2981 Controller->ReportDeviceConfiguration =
2982 DAC960_V1_ReportDeviceConfiguration;
2983 Controller->QueueReadWriteCommand =
2984 DAC960_V1_QueueReadWriteCommand;
2985 break;
2986 case DAC960_P_Controller:
2987 if (!request_region(Controller->IO_Address, 0x80,
2988 Controller->FullModelName)){
ee52c44d 2989 DAC960_Error("IO port 0x%lx busy for Controller at\n",
1da177e4
LT		 2990 Controller, Controller->IO_Address);
2991 goto Failure;
2992 }
2993 DAC960_PD_DisableInterrupts(BaseAddress);
2994 DAC960_PD_AcknowledgeStatus(BaseAddress);
2995 udelay(1000);
2996 while (DAC960_PD_InitializationInProgressP(BaseAddress))
2997 {
2998 if (DAC960_PD_ReadErrorStatus(BaseAddress, &ErrorStatus,
2999 &Parameter0, &Parameter1) &&
3000 DAC960_ReportErrorStatus(Controller, ErrorStatus,
3001 Parameter0, Parameter1))
3002 goto Failure;
3003 udelay(10);
3004 }
3005 if (!DAC960_V1_EnableMemoryMailboxInterface(Controller))
3006 {
3007 DAC960_Error("Unable to allocate DMA mapped memory"
3008 "for Controller at\n", Controller);
3009 goto Failure;
3010 }
3011 DAC960_PD_EnableInterrupts(BaseAddress);
3012 Controller->QueueCommand = DAC960_P_QueueCommand;
3013 Controller->ReadControllerConfiguration =
3014 DAC960_V1_ReadControllerConfiguration;
3015 Controller->ReadDeviceConfiguration =
3016 DAC960_V1_ReadDeviceConfiguration;
3017 Controller->ReportDeviceConfiguration =
3018 DAC960_V1_ReportDeviceConfiguration;
3019 Controller->QueueReadWriteCommand =
3020 DAC960_V1_QueueReadWriteCommand;
3021 break;
3022 }
3023 /*
3024 Acquire shared access to the IRQ Channel.
3025 */
3026 IRQ_Channel = PCI_Device->irq;
69ab3912 3027 if (request_irq(IRQ_Channel, InterruptHandler, IRQF_SHARED,
1da177e4
LT		 3028 Controller->FullModelName, Controller) < 0)
3029 {
3030 DAC960_Error("Unable to acquire IRQ Channel %d for Controller at\n",
3031 Controller, Controller->IRQ_Channel);
3032 goto Failure;
3033 }
3034 Controller->IRQ_Channel = IRQ_Channel;
3035 Controller->InitialCommand.CommandIdentifier = 1;
3036 Controller->InitialCommand.Controller = Controller;
3037 Controller->Commands[0] = &Controller->InitialCommand;
3038 Controller->FreeCommands = &Controller->InitialCommand;
3039 return Controller;
3040
3041Failure:
3042 if (Controller->IO_Address == 0)
3043 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address N/A "
3044 "PCI Address 0x%X\n", Controller,
3045 Controller->Bus, Controller->Device,
3046 Controller->Function, Controller->PCI_Address);
3047 else
3048 DAC960_Error("PCI Bus %d Device %d Function %d I/O Address "
3049 "0x%X PCI Address 0x%X\n", Controller,
3050 Controller->Bus, Controller->Device,
3051 Controller->Function, Controller->IO_Address,
3052 Controller->PCI_Address);
3053 DAC960_DetectCleanup(Controller);
3054 DAC960_ControllerCount--;
3055 return NULL;
3056}
3057
3058/*
3059 DAC960_InitializeController initializes Controller.
3060*/
3061
87d156bf 3062static bool
1da177e4
LT		 3063DAC960_InitializeController(DAC960_Controller_T *Controller)
3064{
3065 if (DAC960_ReadControllerConfiguration(Controller) &&
3066 DAC960_ReportControllerConfiguration(Controller) &&
3067 DAC960_CreateAuxiliaryStructures(Controller) &&
3068 DAC960_ReadDeviceConfiguration(Controller) &&
3069 DAC960_ReportDeviceConfiguration(Controller) &&
3070 DAC960_RegisterBlockDevice(Controller))
3071 {
3072 /*
3073 Initialize the Monitoring Timer.
3074 */
e99e88a9
KC		 3075 timer_setup(&Controller->MonitoringTimer,
3076 DAC960_MonitoringTimerFunction, 0);
1da177e4
LT		 3077 Controller->MonitoringTimer.expires =
3078 jiffies + DAC960_MonitoringTimerInterval;
1da177e4
LT		 3079 add_timer(&Controller->MonitoringTimer);
3080 Controller->ControllerInitialized = true;
3081 return true;
3082 }
3083 return false;
3084}
3085
3086
3087/*
3088 DAC960_FinalizeController finalizes Controller.
3089*/
3090
3091static void DAC960_FinalizeController(DAC960_Controller_T *Controller)
3092{
3093 if (Controller->ControllerInitialized)
3094 {
3095 unsigned long flags;
3096
3097 /*
3098 * Acquiring and releasing lock here eliminates
3099 * a very low probability race.
3100 *
3101 * The code below allocates controller command structures
3102 * from the free list without holding the controller lock.
3103 * This is safe assuming there is no other activity on
3104 * the controller at the time.
3105 *
3106 * But, there might be a monitoring command still
3107 * in progress. Setting the Shutdown flag while holding
3108 * the lock ensures that there is no monitoring command
3109 * in the interrupt handler currently, and any monitoring
3110 * commands that complete from this time on will NOT return
3111 * their command structure to the free list.
3112 */
3113
3114 spin_lock_irqsave(&Controller->queue_lock, flags);
3115 Controller->ShutdownMonitoringTimer = 1;
3116 spin_unlock_irqrestore(&Controller->queue_lock, flags);
3117
3118 del_timer_sync(&Controller->MonitoringTimer);
3119 if (Controller->FirmwareType == DAC960_V1_Controller)
3120 {
3121 DAC960_Notice("Flushing Cache...", Controller);
3122 DAC960_V1_ExecuteType3(Controller, DAC960_V1_Flush, 0);
3123 DAC960_Notice("done\n", Controller);
3124
3125 if (Controller->HardwareType == DAC960_PD_Controller)
3126 release_region(Controller->IO_Address, 0x80);
3127 }
3128 else
3129 {
3130 DAC960_Notice("Flushing Cache...", Controller);
3131 DAC960_V2_DeviceOperation(Controller, DAC960_V2_PauseDevice,
3132 DAC960_V2_RAID_Controller);
3133 DAC960_Notice("done\n", Controller);
3134 }
3135 }
3136 DAC960_UnregisterBlockDevice(Controller);
3137 DAC960_DestroyAuxiliaryStructures(Controller);
3138 DAC960_DestroyProcEntries(Controller);
3139 DAC960_DetectCleanup(Controller);
3140}
3141
3142
3143/*
3144 DAC960_Probe verifies controller's existence and
3145 initializes the DAC960 Driver for that controller.
3146*/
3147
3148static int
3149DAC960_Probe(struct pci_dev *dev, const struct pci_device_id *entry)
3150{
3151 int disk;
3152 DAC960_Controller_T *Controller;
3153
3154 if (DAC960_ControllerCount == DAC960_MaxControllers)
3155 {
3156 DAC960_Error("More than %d DAC960 Controllers detected - "
3157 "ignoring from Controller at\n",
3158 NULL, DAC960_MaxControllers);
3159 return -ENODEV;
3160 }
3161
3162 Controller = DAC960_DetectController(dev, entry);
3163 if (!Controller)
3164 return -ENODEV;
3165
3166 if (!DAC960_InitializeController(Controller)) {
3167 DAC960_FinalizeController(Controller);
3168 return -ENODEV;
3169 }
3170
3171 for (disk = 0; disk < DAC960_MaxLogicalDrives; disk++) {
3172 set_capacity(Controller->disks[disk], disk_size(Controller, disk));
3173 add_disk(Controller->disks[disk]);
3174 }
3175 DAC960_CreateProcEntries(Controller);
3176 return 0;
3177}
3178
3179
3180/*
3181 DAC960_Finalize finalizes the DAC960 Driver.
3182*/
3183
3184static void DAC960_Remove(struct pci_dev *PCI_Device)
3185{
3186 int Controller_Number = (long)pci_get_drvdata(PCI_Device);
3187 DAC960_Controller_T *Controller = DAC960_Controllers[Controller_Number];
3188 if (Controller != NULL)
3189 DAC960_FinalizeController(Controller);
3190}
3191
3192
3193/*
3194 DAC960_V1_QueueReadWriteCommand prepares and queues a Read/Write Command for
3195 DAC960 V1 Firmware Controllers.
3196*/
3197
3198static void DAC960_V1_QueueReadWriteCommand(DAC960_Command_T *Command)
3199{
3200 DAC960_Controller_T *Controller = Command->Controller;
3201 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
3202 DAC960_V1_ScatterGatherSegment_T *ScatterGatherList =
3203 Command->V1.ScatterGatherList;
3204 struct scatterlist *ScatterList = Command->V1.ScatterList;
3205
3206 DAC960_V1_ClearCommand(Command);
3207
3208 if (Command->SegmentCount == 1)
3209 {
3210 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3211 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Read;
3212 else
3213 CommandMailbox->Type5.CommandOpcode = DAC960_V1_Write;
3214
3215 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3216 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3217 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3218 CommandMailbox->Type5.BusAddress =
3219 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3220 }
3221 else
3222 {
3223 int i;
3224
3225 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3226 CommandMailbox->Type5.CommandOpcode = DAC960_V1_ReadWithScatterGather;
3227 else
3228 CommandMailbox->Type5.CommandOpcode = DAC960_V1_WriteWithScatterGather;
3229
3230 CommandMailbox->Type5.LD.TransferLength = Command->BlockCount;
3231 CommandMailbox->Type5.LD.LogicalDriveNumber = Command->LogicalDriveNumber;
3232 CommandMailbox->Type5.LogicalBlockAddress = Command->BlockNumber;
3233 CommandMailbox->Type5.BusAddress = Command->V1.ScatterGatherListDMA;
3234
3235 CommandMailbox->Type5.ScatterGatherCount = Command->SegmentCount;
3236
3237 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3238 ScatterGatherList->SegmentDataPointer =
3239 (DAC960_BusAddress32_T)sg_dma_address(ScatterList);
3240 ScatterGatherList->SegmentByteCount =
3241 (DAC960_ByteCount32_T)sg_dma_len(ScatterList);
3242 }
3243 }
3244 DAC960_QueueCommand(Command);
3245}
3246
3247
3248/*
3249 DAC960_V2_QueueReadWriteCommand prepares and queues a Read/Write Command for
3250 DAC960 V2 Firmware Controllers.
3251*/
3252
3253static void DAC960_V2_QueueReadWriteCommand(DAC960_Command_T *Command)
3254{
3255 DAC960_Controller_T *Controller = Command->Controller;
3256 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
3257 struct scatterlist *ScatterList = Command->V2.ScatterList;
3258
3259 DAC960_V2_ClearCommand(Command);
3260
3261 CommandMailbox->SCSI_10.CommandOpcode = DAC960_V2_SCSI_10;
3262 CommandMailbox->SCSI_10.CommandControlBits.DataTransferControllerToHost =
3263 (Command->DmaDirection == PCI_DMA_FROMDEVICE);
3264 CommandMailbox->SCSI_10.DataTransferSize =
3265 Command->BlockCount << DAC960_BlockSizeBits;
3266 CommandMailbox->SCSI_10.RequestSenseBusAddress = Command->V2.RequestSenseDMA;
3267 CommandMailbox->SCSI_10.PhysicalDevice =
3268 Controller->V2.LogicalDriveToVirtualDevice[Command->LogicalDriveNumber];
3269 CommandMailbox->SCSI_10.RequestSenseSize = sizeof(DAC960_SCSI_RequestSense_T);
3270 CommandMailbox->SCSI_10.CDBLength = 10;
3271 CommandMailbox->SCSI_10.SCSI_CDB[0] =
3272 (Command->DmaDirection == PCI_DMA_FROMDEVICE ? 0x28 : 0x2A);
3273 CommandMailbox->SCSI_10.SCSI_CDB[2] = Command->BlockNumber >> 24;
3274 CommandMailbox->SCSI_10.SCSI_CDB[3] = Command->BlockNumber >> 16;
3275 CommandMailbox->SCSI_10.SCSI_CDB[4] = Command->BlockNumber >> 8;
3276 CommandMailbox->SCSI_10.SCSI_CDB[5] = Command->BlockNumber;
3277 CommandMailbox->SCSI_10.SCSI_CDB[7] = Command->BlockCount >> 8;
3278 CommandMailbox->SCSI_10.SCSI_CDB[8] = Command->BlockCount;
3279
3280 if (Command->SegmentCount == 1)
3281 {
3282 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3283 .ScatterGatherSegments[0]
3284 .SegmentDataPointer =
3285 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3286 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3287 .ScatterGatherSegments[0]
3288 .SegmentByteCount =
3289 CommandMailbox->SCSI_10.DataTransferSize;
3290 }
3291 else
3292 {
3293 DAC960_V2_ScatterGatherSegment_T *ScatterGatherList;
3294 int i;
3295
3296 if (Command->SegmentCount > 2)
3297 {
3298 ScatterGatherList = Command->V2.ScatterGatherList;
3299 CommandMailbox->SCSI_10.CommandControlBits
3300 .AdditionalScatterGatherListMemory = true;
3301 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3302 .ExtendedScatterGather.ScatterGatherList0Length = Command->SegmentCount;
3303 CommandMailbox->SCSI_10.DataTransferMemoryAddress
3304 .ExtendedScatterGather.ScatterGatherList0Address =
3305 Command->V2.ScatterGatherListDMA;
3306 }
3307 else
3308 ScatterGatherList = CommandMailbox->SCSI_10.DataTransferMemoryAddress
3309 .ScatterGatherSegments;
3310
3311 for (i = 0; i < Command->SegmentCount; i++, ScatterList++, ScatterGatherList++) {
3312 ScatterGatherList->SegmentDataPointer =
3313 (DAC960_BusAddress64_T)sg_dma_address(ScatterList);
3314 ScatterGatherList->SegmentByteCount =
3315 (DAC960_ByteCount64_T)sg_dma_len(ScatterList);
3316 }
3317 }
3318 DAC960_QueueCommand(Command);
3319}
3320
3321
3322static int DAC960_process_queue(DAC960_Controller_T *Controller, struct request_queue *req_q)
3323{
3324 struct request *Request;
3325 DAC960_Command_T *Command;
3326
3327 while(1) {
9934c8c0 3328 Request = blk_peek_request(req_q);
1da177e4
LT		 3329 if (!Request)
3330 return 1;
3331
3332 Command = DAC960_AllocateCommand(Controller);
3333 if (Command == NULL)
3334 return 0;
3335
3336 if (rq_data_dir(Request) == READ) {
3337 Command->DmaDirection = PCI_DMA_FROMDEVICE;
3338 Command->CommandType = DAC960_ReadCommand;
3339 } else {
3340 Command->DmaDirection = PCI_DMA_TODEVICE;
3341 Command->CommandType = DAC960_WriteCommand;
3342 }
c00895ab 3343 Command->Completion = Request->end_io_data;
1da177e4 3344 Command->LogicalDriveNumber = (long)Request->rq_disk->private_data;
83096ebf
TH		 3345 Command->BlockNumber = blk_rq_pos(Request);
3346 Command->BlockCount = blk_rq_sectors(Request);
1da177e4 3347 Command->Request = Request;
9934c8c0 3348 blk_start_request(Request);
1da177e4
LT		 3349 Command->SegmentCount = blk_rq_map_sg(req_q,
3350 Command->Request, Command->cmd_sglist);
3351 /* pci_map_sg MAY change the value of SegCount */
3352 Command->SegmentCount = pci_map_sg(Controller->PCIDevice, Command->cmd_sglist,
3353 Command->SegmentCount, Command->DmaDirection);
3354
3355 DAC960_QueueReadWriteCommand(Command);
3356 }
3357}
3358
3359/*
3360 DAC960_ProcessRequest attempts to remove one I/O Request from Controller's
3361 I/O Request Queue and queues it to the Controller. WaitForCommand is true if
3362 this function should wait for a Command to become available if necessary.
3363 This function returns true if an I/O Request was queued and false otherwise.
3364*/
3365static void DAC960_ProcessRequest(DAC960_Controller_T *controller)
3366{
3367 int i;
3368
3369 if (!controller->ControllerInitialized)
3370 return;
3371
3372 /* Do this better later! */
3373 for (i = controller->req_q_index; i < DAC960_MaxLogicalDrives; i++) {
3374 struct request_queue *req_q = controller->RequestQueue[i];
3375
3376 if (req_q == NULL)
3377 continue;
3378
3379 if (!DAC960_process_queue(controller, req_q)) {
3380 controller->req_q_index = i;
3381 return;
3382 }
3383 }
3384
3385 if (controller->req_q_index == 0)
3386 return;
3387
3388 for (i = 0; i < controller->req_q_index; i++) {
3389 struct request_queue *req_q = controller->RequestQueue[i];
3390
3391 if (req_q == NULL)
3392 continue;
3393
3394 if (!DAC960_process_queue(controller, req_q)) {
3395 controller->req_q_index = i;
3396 return;
3397 }
3398 }
3399}
3400
3401
3402/*
3403 DAC960_queue_partial_rw extracts one bio from the request already
3404 associated with argument command, and construct a new command block to retry I/O
3405 only on that bio. Queue that command to the controller.
3406
3407 This function re-uses a previously-allocated Command,
3408 there is no failure mode from trying to allocate a command.
3409*/
3410
3411static void DAC960_queue_partial_rw(DAC960_Command_T *Command)
3412{
3413 DAC960_Controller_T *Controller = Command->Controller;
3414 struct request *Request = Command->Request;
3415 struct request_queue *req_q = Controller->RequestQueue[Command->LogicalDriveNumber];
3416
3417 if (Command->DmaDirection == PCI_DMA_FROMDEVICE)
3418 Command->CommandType = DAC960_ReadRetryCommand;
3419 else
3420 Command->CommandType = DAC960_WriteRetryCommand;
3421
3422 /*
3423 * We could be more efficient with these mapping requests
3424 * and map only the portions that we need. But since this
3425 * code should almost never be called, just go with a
3426 * simple coding.
3427 */
3428 (void)blk_rq_map_sg(req_q, Command->Request, Command->cmd_sglist);
3429
3430 (void)pci_map_sg(Controller->PCIDevice, Command->cmd_sglist, 1, Command->DmaDirection);
3431 /*
3432 * Resubmitting the request sector at a time is really tedious.
3433 * But, this should almost never happen. So, we're willing to pay
3434 * this price so that in the end, as much of the transfer is completed
3435 * successfully as possible.
3436 */
3437 Command->SegmentCount = 1;
83096ebf 3438 Command->BlockNumber = blk_rq_pos(Request);
1da177e4
LT		 3439 Command->BlockCount = 1;
3440 DAC960_QueueReadWriteCommand(Command);
3441 return;
3442}
3443
3444/*
3445 DAC960_RequestFunction is the I/O Request Function for DAC960 Controllers.
3446*/
3447
3448static void DAC960_RequestFunction(struct request_queue *RequestQueue)
3449{
3450 DAC960_ProcessRequest(RequestQueue->queuedata);
3451}
3452
3453/*
3454 DAC960_ProcessCompletedBuffer performs completion processing for an
3455 individual Buffer.
3456*/
3457
87d156bf
RK		 3458static inline bool DAC960_ProcessCompletedRequest(DAC960_Command_T *Command,
3459 bool SuccessfulIO)
1da177e4
LT		 3460{
3461 struct request *Request = Command->Request;
2a842aca 3462 blk_status_t Error = SuccessfulIO ? BLK_STS_OK : BLK_STS_IOERR;
1da177e4
LT		 3463
3464 pci_unmap_sg(Command->Controller->PCIDevice, Command->cmd_sglist,
3465 Command->SegmentCount, Command->DmaDirection);
3466
0156c254 3467 if (!__blk_end_request(Request, Error, Command->BlockCount << 9)) {
1da177e4
LT		 3468 if (Command->Completion) {
3469 complete(Command->Completion);
3470 Command->Completion = NULL;
3471 }
3472 return true;
3473 }
3474 return false;
3475}
3476
3477/*
3478 DAC960_V1_ReadWriteError prints an appropriate error message for Command
3479 when an error occurs on a Read or Write operation.
3480*/
3481
3482static void DAC960_V1_ReadWriteError(DAC960_Command_T *Command)
3483{
3484 DAC960_Controller_T *Controller = Command->Controller;
3485 unsigned char *CommandName = "UNKNOWN";
3486 switch (Command->CommandType)
3487 {
3488 case DAC960_ReadCommand:
3489 case DAC960_ReadRetryCommand:
3490 CommandName = "READ";
3491 break;
3492 case DAC960_WriteCommand:
3493 case DAC960_WriteRetryCommand:
3494 CommandName = "WRITE";
3495 break;
3496 case DAC960_MonitoringCommand:
3497 case DAC960_ImmediateCommand:
3498 case DAC960_QueuedCommand:
3499 break;
3500 }
3501 switch (Command->V1.CommandStatus)
3502 {
3503 case DAC960_V1_IrrecoverableDataError:
3504 DAC960_Error("Irrecoverable Data Error on %s:\n",
3505 Controller, CommandName);
3506 break;
3507 case DAC960_V1_LogicalDriveNonexistentOrOffline:
3508 DAC960_Error("Logical Drive Nonexistent or Offline on %s:\n",
3509 Controller, CommandName);
3510 break;
3511 case DAC960_V1_AccessBeyondEndOfLogicalDrive:
3512 DAC960_Error("Attempt to Access Beyond End of Logical Drive "
3513 "on %s:\n", Controller, CommandName);
3514 break;
3515 case DAC960_V1_BadDataEncountered:
3516 DAC960_Error("Bad Data Encountered on %s:\n", Controller, CommandName);
3517 break;
3518 default:
3519 DAC960_Error("Unexpected Error Status %04X on %s:\n",
3520 Controller, Command->V1.CommandStatus, CommandName);
3521 break;
3522 }
3523 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
3524 Controller, Controller->ControllerNumber,
3525 Command->LogicalDriveNumber, Command->BlockNumber,
3526 Command->BlockNumber + Command->BlockCount - 1);
3527}
3528
3529
3530/*
3531 DAC960_V1_ProcessCompletedCommand performs completion processing for Command
3532 for DAC960 V1 Firmware Controllers.
3533*/
3534
3535static void DAC960_V1_ProcessCompletedCommand(DAC960_Command_T *Command)
3536{
3537 DAC960_Controller_T *Controller = Command->Controller;
3538 DAC960_CommandType_T CommandType = Command->CommandType;
3539 DAC960_V1_CommandOpcode_T CommandOpcode =
3540 Command->V1.CommandMailbox.Common.CommandOpcode;
3541 DAC960_V1_CommandStatus_T CommandStatus = Command->V1.CommandStatus;
3542
3543 if (CommandType == DAC960_ReadCommand ||
3544 CommandType == DAC960_WriteCommand)
3545 {
3546
3547#ifdef FORCE_RETRY_DEBUG
3548 CommandStatus = DAC960_V1_IrrecoverableDataError;
3549#endif
3550
3551 if (CommandStatus == DAC960_V1_NormalCompletion) {
3552
3553 if (!DAC960_ProcessCompletedRequest(Command, true))
3554 BUG();
3555
3556 } else if (CommandStatus == DAC960_V1_IrrecoverableDataError ||
3557 CommandStatus == DAC960_V1_BadDataEncountered)
3558 {
3559 /*
3560 * break the command down into pieces and resubmit each
3561 * piece, hoping that some of them will succeed.
3562 */
3563 DAC960_queue_partial_rw(Command);
3564 return;
3565 }
3566 else
3567 {
3568 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3569 DAC960_V1_ReadWriteError(Command);
3570
3571 if (!DAC960_ProcessCompletedRequest(Command, false))
3572 BUG();
3573 }
3574 }
3575 else if (CommandType == DAC960_ReadRetryCommand ||
3576 CommandType == DAC960_WriteRetryCommand)
3577 {
87d156bf 3578 bool normal_completion;
1da177e4
LT		 3579#ifdef FORCE_RETRY_FAILURE_DEBUG
3580 static int retry_count = 1;
3581#endif
3582 /*
3583 Perform completion processing for the portion that was
3584 retried, and submit the next portion, if any.
3585 */
3586 normal_completion = true;
3587 if (CommandStatus != DAC960_V1_NormalCompletion) {
3588 normal_completion = false;
3589 if (CommandStatus != DAC960_V1_LogicalDriveNonexistentOrOffline)
3590 DAC960_V1_ReadWriteError(Command);
3591 }
3592
3593#ifdef FORCE_RETRY_FAILURE_DEBUG
3594 if (!(++retry_count % 10000)) {
3595 printk("V1 error retry failure test\n");
3596 normal_completion = false;
3597 DAC960_V1_ReadWriteError(Command);
3598 }
3599#endif
3600
3601 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
3602 DAC960_queue_partial_rw(Command);
3603 return;
3604 }
3605 }
3606
3607 else if (CommandType == DAC960_MonitoringCommand)
3608 {
3609 if (Controller->ShutdownMonitoringTimer)
3610 return;
3611 if (CommandOpcode == DAC960_V1_Enquiry)
3612 {
3613 DAC960_V1_Enquiry_T *OldEnquiry = &Controller->V1.Enquiry;
3614 DAC960_V1_Enquiry_T *NewEnquiry = Controller->V1.NewEnquiry;
3615 unsigned int OldCriticalLogicalDriveCount =
3616 OldEnquiry->CriticalLogicalDriveCount;
3617 unsigned int NewCriticalLogicalDriveCount =
3618 NewEnquiry->CriticalLogicalDriveCount;
3619 if (NewEnquiry->NumberOfLogicalDrives > Controller->LogicalDriveCount)
3620 {
3621 int LogicalDriveNumber = Controller->LogicalDriveCount - 1;
3622 while (++LogicalDriveNumber < NewEnquiry->NumberOfLogicalDrives)
3623 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3624 "Now Exists\n", Controller,
3625 LogicalDriveNumber,
3626 Controller->ControllerNumber,
3627 LogicalDriveNumber);
3628 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3629 DAC960_ComputeGenericDiskInfo(Controller);
3630 }
3631 if (NewEnquiry->NumberOfLogicalDrives < Controller->LogicalDriveCount)
3632 {
3633 int LogicalDriveNumber = NewEnquiry->NumberOfLogicalDrives - 1;
3634 while (++LogicalDriveNumber < Controller->LogicalDriveCount)
3635 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3636 "No Longer Exists\n", Controller,
3637 LogicalDriveNumber,
3638 Controller->ControllerNumber,
3639 LogicalDriveNumber);
3640 Controller->LogicalDriveCount = NewEnquiry->NumberOfLogicalDrives;
3641 DAC960_ComputeGenericDiskInfo(Controller);
3642 }
3643 if (NewEnquiry->StatusFlags.DeferredWriteError !=
3644 OldEnquiry->StatusFlags.DeferredWriteError)
3645 DAC960_Critical("Deferred Write Error Flag is now %s\n", Controller,
3646 (NewEnquiry->StatusFlags.DeferredWriteError
3647 ? "TRUE" : "FALSE"));
3648 if ((NewCriticalLogicalDriveCount > 0 ||
3649 NewCriticalLogicalDriveCount != OldCriticalLogicalDriveCount) ||
3650 (NewEnquiry->OfflineLogicalDriveCount > 0 ||
3651 NewEnquiry->OfflineLogicalDriveCount !=
3652 OldEnquiry->OfflineLogicalDriveCount) ||
3653 (NewEnquiry->DeadDriveCount > 0 ||
3654 NewEnquiry->DeadDriveCount !=
3655 OldEnquiry->DeadDriveCount) ||
3656 (NewEnquiry->EventLogSequenceNumber !=
3657 OldEnquiry->EventLogSequenceNumber) ||
3658 Controller->MonitoringTimerCount == 0 ||
50297cbf
MFP		 3659 time_after_eq(jiffies, Controller->SecondaryMonitoringTime
3660 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 3661 {
3662 Controller->V1.NeedLogicalDriveInformation = true;
3663 Controller->V1.NewEventLogSequenceNumber =
3664 NewEnquiry->EventLogSequenceNumber;
3665 Controller->V1.NeedErrorTableInformation = true;
3666 Controller->V1.NeedDeviceStateInformation = true;
3667 Controller->V1.StartDeviceStateScan = true;
3668 Controller->V1.NeedBackgroundInitializationStatus =
3669 Controller->V1.BackgroundInitializationStatusSupported;
3670 Controller->SecondaryMonitoringTime = jiffies;
3671 }
3672 if (NewEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3673 NewEnquiry->RebuildFlag
3674 == DAC960_V1_BackgroundRebuildInProgress ||
3675 OldEnquiry->RebuildFlag == DAC960_V1_StandbyRebuildInProgress ||
3676 OldEnquiry->RebuildFlag == DAC960_V1_BackgroundRebuildInProgress)
3677 {
3678 Controller->V1.NeedRebuildProgress = true;
3679 Controller->V1.RebuildProgressFirst =
3680 (NewEnquiry->CriticalLogicalDriveCount <
3681 OldEnquiry->CriticalLogicalDriveCount);
3682 }
3683 if (OldEnquiry->RebuildFlag == DAC960_V1_BackgroundCheckInProgress)
3684 switch (NewEnquiry->RebuildFlag)
3685 {
3686 case DAC960_V1_NoStandbyRebuildOrCheckInProgress:
3687 DAC960_Progress("Consistency Check Completed Successfully\n",
3688 Controller);
3689 break;
3690 case DAC960_V1_StandbyRebuildInProgress:
3691 case DAC960_V1_BackgroundRebuildInProgress:
3692 break;
3693 case DAC960_V1_BackgroundCheckInProgress:
3694 Controller->V1.NeedConsistencyCheckProgress = true;
3695 break;
3696 case DAC960_V1_StandbyRebuildCompletedWithError:
3697 DAC960_Progress("Consistency Check Completed with Error\n",
3698 Controller);
3699 break;
3700 case DAC960_V1_BackgroundRebuildOrCheckFailed_DriveFailed:
3701 DAC960_Progress("Consistency Check Failed - "
3702 "Physical Device Failed\n", Controller);
3703 break;
3704 case DAC960_V1_BackgroundRebuildOrCheckFailed_LogicalDriveFailed:
3705 DAC960_Progress("Consistency Check Failed - "
3706 "Logical Drive Failed\n", Controller);
3707 break;
3708 case DAC960_V1_BackgroundRebuildOrCheckFailed_OtherCauses:
3709 DAC960_Progress("Consistency Check Failed - Other Causes\n",
3710 Controller);
3711 break;
3712 case DAC960_V1_BackgroundRebuildOrCheckSuccessfullyTerminated:
3713 DAC960_Progress("Consistency Check Successfully Terminated\n",
3714 Controller);
3715 break;
3716 }
3717 else if (NewEnquiry->RebuildFlag
3718 == DAC960_V1_BackgroundCheckInProgress)
3719 Controller->V1.NeedConsistencyCheckProgress = true;
3720 Controller->MonitoringAlertMode =
3721 (NewEnquiry->CriticalLogicalDriveCount > 0 ||
3722 NewEnquiry->OfflineLogicalDriveCount > 0 ||
3723 NewEnquiry->DeadDriveCount > 0);
3724 if (NewEnquiry->RebuildFlag > DAC960_V1_BackgroundCheckInProgress)
3725 {
3726 Controller->V1.PendingRebuildFlag = NewEnquiry->RebuildFlag;
3727 Controller->V1.RebuildFlagPending = true;
3728 }
3729 memcpy(&Controller->V1.Enquiry, &Controller->V1.NewEnquiry,
3730 sizeof(DAC960_V1_Enquiry_T));
3731 }
3732 else if (CommandOpcode == DAC960_V1_PerformEventLogOperation)
3733 {
3734 static char
3735 *DAC960_EventMessages[] =
3736 { "killed because write recovery failed",
3737 "killed because of SCSI bus reset failure",
3738 "killed because of double check condition",
3739 "killed because it was removed",
3740 "killed because of gross error on SCSI chip",
3741 "killed because of bad tag returned from drive",
3742 "killed because of timeout on SCSI command",
3743 "killed because of reset SCSI command issued from system",
3744 "killed because busy or parity error count exceeded limit",
3745 "killed because of 'kill drive' command from system",
3746 "killed because of selection timeout",
3747 "killed due to SCSI phase sequence error",
3748 "killed due to unknown status" };
3749 DAC960_V1_EventLogEntry_T *EventLogEntry =
3750 Controller->V1.EventLogEntry;
3751 if (EventLogEntry->SequenceNumber ==
3752 Controller->V1.OldEventLogSequenceNumber)
3753 {
3754 unsigned char SenseKey = EventLogEntry->SenseKey;
3755 unsigned char AdditionalSenseCode =
3756 EventLogEntry->AdditionalSenseCode;
3757 unsigned char AdditionalSenseCodeQualifier =
3758 EventLogEntry->AdditionalSenseCodeQualifier;
3759 if (SenseKey == DAC960_SenseKey_VendorSpecific &&
3760 AdditionalSenseCode == 0x80 &&
3761 AdditionalSenseCodeQualifier <
945f390f 3762 ARRAY_SIZE(DAC960_EventMessages))
1da177e4
LT		 3763 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
3764 EventLogEntry->Channel,
3765 EventLogEntry->TargetID,
3766 DAC960_EventMessages[
3767 AdditionalSenseCodeQualifier]);
3768 else if (SenseKey == DAC960_SenseKey_UnitAttention &&
3769 AdditionalSenseCode == 0x29)
3770 {
3771 if (Controller->MonitoringTimerCount > 0)
3772 Controller->V1.DeviceResetCount[EventLogEntry->Channel]
3773 [EventLogEntry->TargetID]++;
3774 }
3775 else if (!(SenseKey == DAC960_SenseKey_NoSense ||
3776 (SenseKey == DAC960_SenseKey_NotReady &&
3777 AdditionalSenseCode == 0x04 &&
3778 (AdditionalSenseCodeQualifier == 0x01 ||
3779 AdditionalSenseCodeQualifier == 0x02))))
3780 {
3781 DAC960_Critical("Physical Device %d:%d Error Log: "
3782 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
3783 Controller,
3784 EventLogEntry->Channel,
3785 EventLogEntry->TargetID,
3786 SenseKey,
3787 AdditionalSenseCode,
3788 AdditionalSenseCodeQualifier);
3789 DAC960_Critical("Physical Device %d:%d Error Log: "
3790 "Information = %02X%02X%02X%02X "
3791 "%02X%02X%02X%02X\n",
3792 Controller,
3793 EventLogEntry->Channel,
3794 EventLogEntry->TargetID,
3795 EventLogEntry->Information[0],
3796 EventLogEntry->Information[1],
3797 EventLogEntry->Information[2],
3798 EventLogEntry->Information[3],
3799 EventLogEntry->CommandSpecificInformation[0],
3800 EventLogEntry->CommandSpecificInformation[1],
3801 EventLogEntry->CommandSpecificInformation[2],
3802 EventLogEntry->CommandSpecificInformation[3]);
3803 }
3804 }
3805 Controller->V1.OldEventLogSequenceNumber++;
3806 }
3807 else if (CommandOpcode == DAC960_V1_GetErrorTable)
3808 {
3809 DAC960_V1_ErrorTable_T *OldErrorTable = &Controller->V1.ErrorTable;
3810 DAC960_V1_ErrorTable_T *NewErrorTable = Controller->V1.NewErrorTable;
3811 int Channel, TargetID;
3812 for (Channel = 0; Channel < Controller->Channels; Channel++)
3813 for (TargetID = 0; TargetID < Controller->Targets; TargetID++)
3814 {
3815 DAC960_V1_ErrorTableEntry_T *NewErrorEntry =
3816 &NewErrorTable->ErrorTableEntries[Channel][TargetID];
3817 DAC960_V1_ErrorTableEntry_T *OldErrorEntry =
3818 &OldErrorTable->ErrorTableEntries[Channel][TargetID];
3819 if ((NewErrorEntry->ParityErrorCount !=
3820 OldErrorEntry->ParityErrorCount) ||
3821 (NewErrorEntry->SoftErrorCount !=
3822 OldErrorEntry->SoftErrorCount) ||
3823 (NewErrorEntry->HardErrorCount !=
3824 OldErrorEntry->HardErrorCount) ||
3825 (NewErrorEntry->MiscErrorCount !=
3826 OldErrorEntry->MiscErrorCount))
3827 DAC960_Critical("Physical Device %d:%d Errors: "
3828 "Parity = %d, Soft = %d, "
3829 "Hard = %d, Misc = %d\n",
3830 Controller, Channel, TargetID,
3831 NewErrorEntry->ParityErrorCount,
3832 NewErrorEntry->SoftErrorCount,
3833 NewErrorEntry->HardErrorCount,
3834 NewErrorEntry->MiscErrorCount);
3835 }
3836 memcpy(&Controller->V1.ErrorTable, Controller->V1.NewErrorTable,
3837 sizeof(DAC960_V1_ErrorTable_T));
3838 }
3839 else if (CommandOpcode == DAC960_V1_GetDeviceState)
3840 {
3841 DAC960_V1_DeviceState_T *OldDeviceState =
3842 &Controller->V1.DeviceState[Controller->V1.DeviceStateChannel]
3843 [Controller->V1.DeviceStateTargetID];
3844 DAC960_V1_DeviceState_T *NewDeviceState =
3845 Controller->V1.NewDeviceState;
3846 if (NewDeviceState->DeviceState != OldDeviceState->DeviceState)
3847 DAC960_Critical("Physical Device %d:%d is now %s\n", Controller,
3848 Controller->V1.DeviceStateChannel,
3849 Controller->V1.DeviceStateTargetID,
3850 (NewDeviceState->DeviceState
3851 == DAC960_V1_Device_Dead
3852 ? "DEAD"
3853 : NewDeviceState->DeviceState
3854 == DAC960_V1_Device_WriteOnly
3855 ? "WRITE-ONLY"
3856 : NewDeviceState->DeviceState
3857 == DAC960_V1_Device_Online
3858 ? "ONLINE" : "STANDBY"));
3859 if (OldDeviceState->DeviceState == DAC960_V1_Device_Dead &&
3860 NewDeviceState->DeviceState != DAC960_V1_Device_Dead)
3861 {
3862 Controller->V1.NeedDeviceInquiryInformation = true;
3863 Controller->V1.NeedDeviceSerialNumberInformation = true;
3864 Controller->V1.DeviceResetCount
3865 [Controller->V1.DeviceStateChannel]
3866 [Controller->V1.DeviceStateTargetID] = 0;
3867 }
3868 memcpy(OldDeviceState, NewDeviceState,
3869 sizeof(DAC960_V1_DeviceState_T));
3870 }
3871 else if (CommandOpcode == DAC960_V1_GetLogicalDriveInformation)
3872 {
3873 int LogicalDriveNumber;
3874 for (LogicalDriveNumber = 0;
3875 LogicalDriveNumber < Controller->LogicalDriveCount;
3876 LogicalDriveNumber++)
3877 {
3878 DAC960_V1_LogicalDriveInformation_T *OldLogicalDriveInformation =
3879 &Controller->V1.LogicalDriveInformation[LogicalDriveNumber];
3880 DAC960_V1_LogicalDriveInformation_T *NewLogicalDriveInformation =
3881 &(*Controller->V1.NewLogicalDriveInformation)[LogicalDriveNumber];
3882 if (NewLogicalDriveInformation->LogicalDriveState !=
3883 OldLogicalDriveInformation->LogicalDriveState)
3884 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3885 "is now %s\n", Controller,
3886 LogicalDriveNumber,
3887 Controller->ControllerNumber,
3888 LogicalDriveNumber,
3889 (NewLogicalDriveInformation->LogicalDriveState
3890 == DAC960_V1_LogicalDrive_Online
3891 ? "ONLINE"
3892 : NewLogicalDriveInformation->LogicalDriveState
3893 == DAC960_V1_LogicalDrive_Critical
3894 ? "CRITICAL" : "OFFLINE"));
3895 if (NewLogicalDriveInformation->WriteBack !=
3896 OldLogicalDriveInformation->WriteBack)
3897 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
3898 "is now %s\n", Controller,
3899 LogicalDriveNumber,
3900 Controller->ControllerNumber,
3901 LogicalDriveNumber,
3902 (NewLogicalDriveInformation->WriteBack
3903 ? "WRITE BACK" : "WRITE THRU"));
3904 }
3905 memcpy(&Controller->V1.LogicalDriveInformation,
3906 Controller->V1.NewLogicalDriveInformation,
3907 sizeof(DAC960_V1_LogicalDriveInformationArray_T));
3908 }
3909 else if (CommandOpcode == DAC960_V1_GetRebuildProgress)
3910 {
3911 unsigned int LogicalDriveNumber =
3912 Controller->V1.RebuildProgress->LogicalDriveNumber;
3913 unsigned int LogicalDriveSize =
3914 Controller->V1.RebuildProgress->LogicalDriveSize;
3915 unsigned int BlocksCompleted =
3916 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3917 if (CommandStatus == DAC960_V1_NoRebuildOrCheckInProgress &&
3918 Controller->V1.LastRebuildStatus == DAC960_V1_NormalCompletion)
3919 CommandStatus = DAC960_V1_RebuildSuccessful;
3920 switch (CommandStatus)
3921 {
3922 case DAC960_V1_NormalCompletion:
3923 Controller->EphemeralProgressMessage = true;
3924 DAC960_Progress("Rebuild in Progress: "
3925 "Logical Drive %d (/dev/rd/c%dd%d) "
3926 "%d%% completed\n",
3927 Controller, LogicalDriveNumber,
3928 Controller->ControllerNumber,
3929 LogicalDriveNumber,
3930 (100 * (BlocksCompleted >> 7))
3931 / (LogicalDriveSize >> 7));
3932 Controller->EphemeralProgressMessage = false;
3933 break;
3934 case DAC960_V1_RebuildFailed_LogicalDriveFailure:
3935 DAC960_Progress("Rebuild Failed due to "
3936 "Logical Drive Failure\n", Controller);
3937 break;
3938 case DAC960_V1_RebuildFailed_BadBlocksOnOther:
3939 DAC960_Progress("Rebuild Failed due to "
3940 "Bad Blocks on Other Drives\n", Controller);
3941 break;
3942 case DAC960_V1_RebuildFailed_NewDriveFailed:
3943 DAC960_Progress("Rebuild Failed due to "
3944 "Failure of Drive Being Rebuilt\n", Controller);
3945 break;
3946 case DAC960_V1_NoRebuildOrCheckInProgress:
3947 break;
3948 case DAC960_V1_RebuildSuccessful:
3949 DAC960_Progress("Rebuild Completed Successfully\n", Controller);
3950 break;
3951 case DAC960_V1_RebuildSuccessfullyTerminated:
3952 DAC960_Progress("Rebuild Successfully Terminated\n", Controller);
3953 break;
3954 }
3955 Controller->V1.LastRebuildStatus = CommandStatus;
3956 if (CommandType != DAC960_MonitoringCommand &&
3957 Controller->V1.RebuildStatusPending)
3958 {
3959 Command->V1.CommandStatus = Controller->V1.PendingRebuildStatus;
3960 Controller->V1.RebuildStatusPending = false;
3961 }
3962 else if (CommandType == DAC960_MonitoringCommand &&
3963 CommandStatus != DAC960_V1_NormalCompletion &&
3964 CommandStatus != DAC960_V1_NoRebuildOrCheckInProgress)
3965 {
3966 Controller->V1.PendingRebuildStatus = CommandStatus;
3967 Controller->V1.RebuildStatusPending = true;
3968 }
3969 }
3970 else if (CommandOpcode == DAC960_V1_RebuildStat)
3971 {
3972 unsigned int LogicalDriveNumber =
3973 Controller->V1.RebuildProgress->LogicalDriveNumber;
3974 unsigned int LogicalDriveSize =
3975 Controller->V1.RebuildProgress->LogicalDriveSize;
3976 unsigned int BlocksCompleted =
3977 LogicalDriveSize - Controller->V1.RebuildProgress->RemainingBlocks;
3978 if (CommandStatus == DAC960_V1_NormalCompletion)
3979 {
3980 Controller->EphemeralProgressMessage = true;
3981 DAC960_Progress("Consistency Check in Progress: "
3982 "Logical Drive %d (/dev/rd/c%dd%d) "
3983 "%d%% completed\n",
3984 Controller, LogicalDriveNumber,
3985 Controller->ControllerNumber,
3986 LogicalDriveNumber,
3987 (100 * (BlocksCompleted >> 7))
3988 / (LogicalDriveSize >> 7));
3989 Controller->EphemeralProgressMessage = false;
3990 }
3991 }
3992 else if (CommandOpcode == DAC960_V1_BackgroundInitializationControl)
3993 {
3994 unsigned int LogicalDriveNumber =
3995 Controller->V1.BackgroundInitializationStatus->LogicalDriveNumber;
3996 unsigned int LogicalDriveSize =
3997 Controller->V1.BackgroundInitializationStatus->LogicalDriveSize;
3998 unsigned int BlocksCompleted =
3999 Controller->V1.BackgroundInitializationStatus->BlocksCompleted;
4000 switch (CommandStatus)
4001 {
4002 case DAC960_V1_NormalCompletion:
4003 switch (Controller->V1.BackgroundInitializationStatus->Status)
4004 {
4005 case DAC960_V1_BackgroundInitializationInvalid:
4006 break;
4007 case DAC960_V1_BackgroundInitializationStarted:
4008 DAC960_Progress("Background Initialization Started\n",
4009 Controller);
4010 break;
4011 case DAC960_V1_BackgroundInitializationInProgress:
4012 if (BlocksCompleted ==
4013 Controller->V1.LastBackgroundInitializationStatus.
4014 BlocksCompleted &&
4015 LogicalDriveNumber ==
4016 Controller->V1.LastBackgroundInitializationStatus.
4017 LogicalDriveNumber)
4018 break;
4019 Controller->EphemeralProgressMessage = true;
4020 DAC960_Progress("Background Initialization in Progress: "
4021 "Logical Drive %d (/dev/rd/c%dd%d) "
4022 "%d%% completed\n",
4023 Controller, LogicalDriveNumber,
4024 Controller->ControllerNumber,
4025 LogicalDriveNumber,
4026 (100 * (BlocksCompleted >> 7))
4027 / (LogicalDriveSize >> 7));
4028 Controller->EphemeralProgressMessage = false;
4029 break;
4030 case DAC960_V1_BackgroundInitializationSuspended:
4031 DAC960_Progress("Background Initialization Suspended\n",
4032 Controller);
4033 break;
4034 case DAC960_V1_BackgroundInitializationCancelled:
4035 DAC960_Progress("Background Initialization Cancelled\n",
4036 Controller);
4037 break;
4038 }
4039 memcpy(&Controller->V1.LastBackgroundInitializationStatus,
4040 Controller->V1.BackgroundInitializationStatus,
4041 sizeof(DAC960_V1_BackgroundInitializationStatus_T));
4042 break;
4043 case DAC960_V1_BackgroundInitSuccessful:
4044 if (Controller->V1.BackgroundInitializationStatus->Status ==
4045 DAC960_V1_BackgroundInitializationInProgress)
4046 DAC960_Progress("Background Initialization "
4047 "Completed Successfully\n", Controller);
4048 Controller->V1.BackgroundInitializationStatus->Status =
4049 DAC960_V1_BackgroundInitializationInvalid;
4050 break;
4051 case DAC960_V1_BackgroundInitAborted:
4052 if (Controller->V1.BackgroundInitializationStatus->Status ==
4053 DAC960_V1_BackgroundInitializationInProgress)
4054 DAC960_Progress("Background Initialization Aborted\n",
4055 Controller);
4056 Controller->V1.BackgroundInitializationStatus->Status =
4057 DAC960_V1_BackgroundInitializationInvalid;
4058 break;
4059 case DAC960_V1_NoBackgroundInitInProgress:
4060 break;
4061 }
4062 }
4063 else if (CommandOpcode == DAC960_V1_DCDB)
4064 {
4065 /*
4066 This is a bit ugly.
4067
4068 The InquiryStandardData and
4069 the InquiryUntitSerialNumber information
4070 retrieval operations BOTH use the DAC960_V1_DCDB
4071 commands. the test above can't distinguish between
4072 these two cases.
4073
4074 Instead, we rely on the order of code later in this
4075 function to ensure that DeviceInquiryInformation commands
4076 are submitted before DeviceSerialNumber commands.
4077 */
4078 if (Controller->V1.NeedDeviceInquiryInformation)
4079 {
4080 DAC960_SCSI_Inquiry_T *InquiryStandardData =
4081 &Controller->V1.InquiryStandardData
4082 [Controller->V1.DeviceStateChannel]
4083 [Controller->V1.DeviceStateTargetID];
4084 if (CommandStatus != DAC960_V1_NormalCompletion)
4085 {
4086 memset(InquiryStandardData, 0,
4087 sizeof(DAC960_SCSI_Inquiry_T));
4088 InquiryStandardData->PeripheralDeviceType = 0x1F;
4089 }
4090 else
4091 memcpy(InquiryStandardData,
4092 Controller->V1.NewInquiryStandardData,
4093 sizeof(DAC960_SCSI_Inquiry_T));
4094 Controller->V1.NeedDeviceInquiryInformation = false;
4095 }
4096 else if (Controller->V1.NeedDeviceSerialNumberInformation)
4097 {
4098 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4099 &Controller->V1.InquiryUnitSerialNumber
4100 [Controller->V1.DeviceStateChannel]
4101 [Controller->V1.DeviceStateTargetID];
4102 if (CommandStatus != DAC960_V1_NormalCompletion)
4103 {
4104 memset(InquiryUnitSerialNumber, 0,
4105 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4106 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4107 }
4108 else
4109 memcpy(InquiryUnitSerialNumber,
4110 Controller->V1.NewInquiryUnitSerialNumber,
4111 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4112 Controller->V1.NeedDeviceSerialNumberInformation = false;
4113 }
4114 }
4115 /*
4116 Begin submitting new monitoring commands.
4117 */
4118 if (Controller->V1.NewEventLogSequenceNumber
4119 - Controller->V1.OldEventLogSequenceNumber > 0)
4120 {
4121 Command->V1.CommandMailbox.Type3E.CommandOpcode =
4122 DAC960_V1_PerformEventLogOperation;
4123 Command->V1.CommandMailbox.Type3E.OperationType =
4124 DAC960_V1_GetEventLogEntry;
4125 Command->V1.CommandMailbox.Type3E.OperationQualifier = 1;
4126 Command->V1.CommandMailbox.Type3E.SequenceNumber =
4127 Controller->V1.OldEventLogSequenceNumber;
4128 Command->V1.CommandMailbox.Type3E.BusAddress =
4129 Controller->V1.EventLogEntryDMA;
4130 DAC960_QueueCommand(Command);
4131 return;
4132 }
4133 if (Controller->V1.NeedErrorTableInformation)
4134 {
4135 Controller->V1.NeedErrorTableInformation = false;
4136 Command->V1.CommandMailbox.Type3.CommandOpcode =
4137 DAC960_V1_GetErrorTable;
4138 Command->V1.CommandMailbox.Type3.BusAddress =
4139 Controller->V1.NewErrorTableDMA;
4140 DAC960_QueueCommand(Command);
4141 return;
4142 }
4143 if (Controller->V1.NeedRebuildProgress &&
4144 Controller->V1.RebuildProgressFirst)
4145 {
4146 Controller->V1.NeedRebuildProgress = false;
4147 Command->V1.CommandMailbox.Type3.CommandOpcode =
4148 DAC960_V1_GetRebuildProgress;
4149 Command->V1.CommandMailbox.Type3.BusAddress =
4150 Controller->V1.RebuildProgressDMA;
4151 DAC960_QueueCommand(Command);
4152 return;
4153 }
4154 if (Controller->V1.NeedDeviceStateInformation)
4155 {
4156 if (Controller->V1.NeedDeviceInquiryInformation)
4157 {
4158 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4159 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4160
4161 dma_addr_t NewInquiryStandardDataDMA =
4162 Controller->V1.NewInquiryStandardDataDMA;
4163
4164 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4165 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4166 DCDB->Channel = Controller->V1.DeviceStateChannel;
4167 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4168 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4169 DCDB->EarlyStatus = false;
4170 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4171 DCDB->NoAutomaticRequestSense = false;
4172 DCDB->DisconnectPermitted = true;
4173 DCDB->TransferLength = sizeof(DAC960_SCSI_Inquiry_T);
4174 DCDB->BusAddress = NewInquiryStandardDataDMA;
4175 DCDB->CDBLength = 6;
4176 DCDB->TransferLengthHigh4 = 0;
4177 DCDB->SenseLength = sizeof(DCDB->SenseData);
4178 DCDB->CDB[0] = 0x12; /* INQUIRY */
4179 DCDB->CDB[1] = 0; /* EVPD = 0 */
4180 DCDB->CDB[2] = 0; /* Page Code */
4181 DCDB->CDB[3] = 0; /* Reserved */
4182 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_T);
4183 DCDB->CDB[5] = 0; /* Control */
4184 DAC960_QueueCommand(Command);
4185 return;
4186 }
4187 if (Controller->V1.NeedDeviceSerialNumberInformation)
4188 {
4189 DAC960_V1_DCDB_T *DCDB = Controller->V1.MonitoringDCDB;
4190 dma_addr_t DCDB_DMA = Controller->V1.MonitoringDCDB_DMA;
4191 dma_addr_t NewInquiryUnitSerialNumberDMA =
4192 Controller->V1.NewInquiryUnitSerialNumberDMA;
4193
4194 Command->V1.CommandMailbox.Type3.CommandOpcode = DAC960_V1_DCDB;
4195 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_DMA;
4196 DCDB->Channel = Controller->V1.DeviceStateChannel;
4197 DCDB->TargetID = Controller->V1.DeviceStateTargetID;
4198 DCDB->Direction = DAC960_V1_DCDB_DataTransferDeviceToSystem;
4199 DCDB->EarlyStatus = false;
4200 DCDB->Timeout = DAC960_V1_DCDB_Timeout_10_seconds;
4201 DCDB->NoAutomaticRequestSense = false;
4202 DCDB->DisconnectPermitted = true;
4203 DCDB->TransferLength =
4204 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4205 DCDB->BusAddress = NewInquiryUnitSerialNumberDMA;
4206 DCDB->CDBLength = 6;
4207 DCDB->TransferLengthHigh4 = 0;
4208 DCDB->SenseLength = sizeof(DCDB->SenseData);
4209 DCDB->CDB[0] = 0x12; /* INQUIRY */
4210 DCDB->CDB[1] = 1; /* EVPD = 1 */
4211 DCDB->CDB[2] = 0x80; /* Page Code */
4212 DCDB->CDB[3] = 0; /* Reserved */
4213 DCDB->CDB[4] = sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T);
4214 DCDB->CDB[5] = 0; /* Control */
4215 DAC960_QueueCommand(Command);
4216 return;
4217 }
4218 if (Controller->V1.StartDeviceStateScan)
4219 {
4220 Controller->V1.DeviceStateChannel = 0;
4221 Controller->V1.DeviceStateTargetID = 0;
4222 Controller->V1.StartDeviceStateScan = false;
4223 }
4224 else if (++Controller->V1.DeviceStateTargetID == Controller->Targets)
4225 {
4226 Controller->V1.DeviceStateChannel++;
4227 Controller->V1.DeviceStateTargetID = 0;
4228 }
4229 if (Controller->V1.DeviceStateChannel < Controller->Channels)
4230 {
4231 Controller->V1.NewDeviceState->DeviceState =
4232 DAC960_V1_Device_Dead;
4233 Command->V1.CommandMailbox.Type3D.CommandOpcode =
4234 DAC960_V1_GetDeviceState;
4235 Command->V1.CommandMailbox.Type3D.Channel =
4236 Controller->V1.DeviceStateChannel;
4237 Command->V1.CommandMailbox.Type3D.TargetID =
4238 Controller->V1.DeviceStateTargetID;
4239 Command->V1.CommandMailbox.Type3D.BusAddress =
4240 Controller->V1.NewDeviceStateDMA;
4241 DAC960_QueueCommand(Command);
4242 return;
4243 }
4244 Controller->V1.NeedDeviceStateInformation = false;
4245 }
4246 if (Controller->V1.NeedLogicalDriveInformation)
4247 {
4248 Controller->V1.NeedLogicalDriveInformation = false;
4249 Command->V1.CommandMailbox.Type3.CommandOpcode =
4250 DAC960_V1_GetLogicalDriveInformation;
4251 Command->V1.CommandMailbox.Type3.BusAddress =
4252 Controller->V1.NewLogicalDriveInformationDMA;
4253 DAC960_QueueCommand(Command);
4254 return;
4255 }
4256 if (Controller->V1.NeedRebuildProgress)
4257 {
4258 Controller->V1.NeedRebuildProgress = false;
4259 Command->V1.CommandMailbox.Type3.CommandOpcode =
4260 DAC960_V1_GetRebuildProgress;
4261 Command->V1.CommandMailbox.Type3.BusAddress =
4262 Controller->V1.RebuildProgressDMA;
4263 DAC960_QueueCommand(Command);
4264 return;
4265 }
4266 if (Controller->V1.NeedConsistencyCheckProgress)
4267 {
4268 Controller->V1.NeedConsistencyCheckProgress = false;
4269 Command->V1.CommandMailbox.Type3.CommandOpcode =
4270 DAC960_V1_RebuildStat;
4271 Command->V1.CommandMailbox.Type3.BusAddress =
4272 Controller->V1.RebuildProgressDMA;
4273 DAC960_QueueCommand(Command);
4274 return;
4275 }
4276 if (Controller->V1.NeedBackgroundInitializationStatus)
4277 {
4278 Controller->V1.NeedBackgroundInitializationStatus = false;
4279 Command->V1.CommandMailbox.Type3B.CommandOpcode =
4280 DAC960_V1_BackgroundInitializationControl;
4281 Command->V1.CommandMailbox.Type3B.CommandOpcode2 = 0x20;
4282 Command->V1.CommandMailbox.Type3B.BusAddress =
4283 Controller->V1.BackgroundInitializationStatusDMA;
4284 DAC960_QueueCommand(Command);
4285 return;
4286 }
4287 Controller->MonitoringTimerCount++;
4288 Controller->MonitoringTimer.expires =
4289 jiffies + DAC960_MonitoringTimerInterval;
4290 add_timer(&Controller->MonitoringTimer);
4291 }
4292 if (CommandType == DAC960_ImmediateCommand)
4293 {
4294 complete(Command->Completion);
4295 Command->Completion = NULL;
4296 return;
4297 }
4298 if (CommandType == DAC960_QueuedCommand)
4299 {
4300 DAC960_V1_KernelCommand_T *KernelCommand = Command->V1.KernelCommand;
4301 KernelCommand->CommandStatus = Command->V1.CommandStatus;
4302 Command->V1.KernelCommand = NULL;
4303 if (CommandOpcode == DAC960_V1_DCDB)
4304 Controller->V1.DirectCommandActive[KernelCommand->DCDB->Channel]
4305 [KernelCommand->DCDB->TargetID] =
4306 false;
4307 DAC960_DeallocateCommand(Command);
4308 KernelCommand->CompletionFunction(KernelCommand);
4309 return;
4310 }
4311 /*
4312 Queue a Status Monitoring Command to the Controller using the just
4313 completed Command if one was deferred previously due to lack of a
4314 free Command when the Monitoring Timer Function was called.
4315 */
4316 if (Controller->MonitoringCommandDeferred)
4317 {
4318 Controller->MonitoringCommandDeferred = false;
4319 DAC960_V1_QueueMonitoringCommand(Command);
4320 return;
4321 }
4322 /*
4323 Deallocate the Command.
4324 */
4325 DAC960_DeallocateCommand(Command);
4326 /*
4327 Wake up any processes waiting on a free Command.
4328 */
4329 wake_up(&Controller->CommandWaitQueue);
4330}
4331
4332
4333/*
4334 DAC960_V2_ReadWriteError prints an appropriate error message for Command
4335 when an error occurs on a Read or Write operation.
4336*/
4337
4338static void DAC960_V2_ReadWriteError(DAC960_Command_T *Command)
4339{
4340 DAC960_Controller_T *Controller = Command->Controller;
4341 unsigned char *SenseErrors[] = { "NO SENSE", "RECOVERED ERROR",
4342 "NOT READY", "MEDIUM ERROR",
4343 "HARDWARE ERROR", "ILLEGAL REQUEST",
4344 "UNIT ATTENTION", "DATA PROTECT",
4345 "BLANK CHECK", "VENDOR-SPECIFIC",
4346 "COPY ABORTED", "ABORTED COMMAND",
4347 "EQUAL", "VOLUME OVERFLOW",
4348 "MISCOMPARE", "RESERVED" };
4349 unsigned char *CommandName = "UNKNOWN";
4350 switch (Command->CommandType)
4351 {
4352 case DAC960_ReadCommand:
4353 case DAC960_ReadRetryCommand:
4354 CommandName = "READ";
4355 break;
4356 case DAC960_WriteCommand:
4357 case DAC960_WriteRetryCommand:
4358 CommandName = "WRITE";
4359 break;
4360 case DAC960_MonitoringCommand:
4361 case DAC960_ImmediateCommand:
4362 case DAC960_QueuedCommand:
4363 break;
4364 }
4365 DAC960_Error("Error Condition %s on %s:\n", Controller,
4366 SenseErrors[Command->V2.RequestSense->SenseKey], CommandName);
4367 DAC960_Error(" /dev/rd/c%dd%d: absolute blocks %u..%u\n",
4368 Controller, Controller->ControllerNumber,
4369 Command->LogicalDriveNumber, Command->BlockNumber,
4370 Command->BlockNumber + Command->BlockCount - 1);
4371}
4372
4373
4374/*
4375 DAC960_V2_ReportEvent prints an appropriate message when a Controller Event
4376 occurs.
4377*/
4378
4379static void DAC960_V2_ReportEvent(DAC960_Controller_T *Controller,
4380 DAC960_V2_Event_T *Event)
4381{
4382 DAC960_SCSI_RequestSense_T *RequestSense =
4383 (DAC960_SCSI_RequestSense_T *) &Event->RequestSenseData;
4384 unsigned char MessageBuffer[DAC960_LineBufferSize];
4385 static struct { int EventCode; unsigned char *EventMessage; } EventList[] =
4386 { /* Physical Device Events (0x0000 - 0x007F) */
4387 { 0x0001, "P Online" },
4388 { 0x0002, "P Standby" },
4389 { 0x0005, "P Automatic Rebuild Started" },
4390 { 0x0006, "P Manual Rebuild Started" },
4391 { 0x0007, "P Rebuild Completed" },
4392 { 0x0008, "P Rebuild Cancelled" },
4393 { 0x0009, "P Rebuild Failed for Unknown Reasons" },
4394 { 0x000A, "P Rebuild Failed due to New Physical Device" },
4395 { 0x000B, "P Rebuild Failed due to Logical Drive Failure" },
4396 { 0x000C, "S Offline" },
4397 { 0x000D, "P Found" },
4398 { 0x000E, "P Removed" },
4399 { 0x000F, "P Unconfigured" },
4400 { 0x0010, "P Expand Capacity Started" },
4401 { 0x0011, "P Expand Capacity Completed" },
4402 { 0x0012, "P Expand Capacity Failed" },
4403 { 0x0013, "P Command Timed Out" },
4404 { 0x0014, "P Command Aborted" },
4405 { 0x0015, "P Command Retried" },
4406 { 0x0016, "P Parity Error" },
4407 { 0x0017, "P Soft Error" },
4408 { 0x0018, "P Miscellaneous Error" },
4409 { 0x0019, "P Reset" },
4410 { 0x001A, "P Active Spare Found" },
4411 { 0x001B, "P Warm Spare Found" },
4412 { 0x001C, "S Sense Data Received" },
4413 { 0x001D, "P Initialization Started" },
4414 { 0x001E, "P Initialization Completed" },
4415 { 0x001F, "P Initialization Failed" },
4416 { 0x0020, "P Initialization Cancelled" },
4417 { 0x0021, "P Failed because Write Recovery Failed" },
4418 { 0x0022, "P Failed because SCSI Bus Reset Failed" },
4419 { 0x0023, "P Failed because of Double Check Condition" },
4420 { 0x0024, "P Failed because Device Cannot Be Accessed" },
4421 { 0x0025, "P Failed because of Gross Error on SCSI Processor" },
4422 { 0x0026, "P Failed because of Bad Tag from Device" },
4423 { 0x0027, "P Failed because of Command Timeout" },
4424 { 0x0028, "P Failed because of System Reset" },
4425 { 0x0029, "P Failed because of Busy Status or Parity Error" },
4426 { 0x002A, "P Failed because Host Set Device to Failed State" },
4427 { 0x002B, "P Failed because of Selection Timeout" },
4428 { 0x002C, "P Failed because of SCSI Bus Phase Error" },
4429 { 0x002D, "P Failed because Device Returned Unknown Status" },
4430 { 0x002E, "P Failed because Device Not Ready" },
4431 { 0x002F, "P Failed because Device Not Found at Startup" },
4432 { 0x0030, "P Failed because COD Write Operation Failed" },
4433 { 0x0031, "P Failed because BDT Write Operation Failed" },
4434 { 0x0039, "P Missing at Startup" },
4435 { 0x003A, "P Start Rebuild Failed due to Physical Drive Too Small" },
4436 { 0x003C, "P Temporarily Offline Device Automatically Made Online" },
4437 { 0x003D, "P Standby Rebuild Started" },
4438 /* Logical Device Events (0x0080 - 0x00FF) */
4439 { 0x0080, "M Consistency Check Started" },
4440 { 0x0081, "M Consistency Check Completed" },
4441 { 0x0082, "M Consistency Check Cancelled" },
4442 { 0x0083, "M Consistency Check Completed With Errors" },
4443 { 0x0084, "M Consistency Check Failed due to Logical Drive Failure" },
4444 { 0x0085, "M Consistency Check Failed due to Physical Device Failure" },
4445 { 0x0086, "L Offline" },
4446 { 0x0087, "L Critical" },
4447 { 0x0088, "L Online" },
4448 { 0x0089, "M Automatic Rebuild Started" },
4449 { 0x008A, "M Manual Rebuild Started" },
4450 { 0x008B, "M Rebuild Completed" },
4451 { 0x008C, "M Rebuild Cancelled" },
4452 { 0x008D, "M Rebuild Failed for Unknown Reasons" },
4453 { 0x008E, "M Rebuild Failed due to New Physical Device" },
4454 { 0x008F, "M Rebuild Failed due to Logical Drive Failure" },
4455 { 0x0090, "M Initialization Started" },
4456 { 0x0091, "M Initialization Completed" },
4457 { 0x0092, "M Initialization Cancelled" },
4458 { 0x0093, "M Initialization Failed" },
4459 { 0x0094, "L Found" },
4460 { 0x0095, "L Deleted" },
4461 { 0x0096, "M Expand Capacity Started" },
4462 { 0x0097, "M Expand Capacity Completed" },
4463 { 0x0098, "M Expand Capacity Failed" },
4464 { 0x0099, "L Bad Block Found" },
4465 { 0x009A, "L Size Changed" },
4466 { 0x009B, "L Type Changed" },
4467 { 0x009C, "L Bad Data Block Found" },
4468 { 0x009E, "L Read of Data Block in BDT" },
4469 { 0x009F, "L Write Back Data for Disk Block Lost" },
4470 { 0x00A0, "L Temporarily Offline RAID-5/3 Drive Made Online" },
4471 { 0x00A1, "L Temporarily Offline RAID-6/1/0/7 Drive Made Online" },
4472 { 0x00A2, "L Standby Rebuild Started" },
4473 /* Fault Management Events (0x0100 - 0x017F) */
4474 { 0x0140, "E Fan %d Failed" },
4475 { 0x0141, "E Fan %d OK" },
4476 { 0x0142, "E Fan %d Not Present" },
4477 { 0x0143, "E Power Supply %d Failed" },
4478 { 0x0144, "E Power Supply %d OK" },
4479 { 0x0145, "E Power Supply %d Not Present" },
4480 { 0x0146, "E Temperature Sensor %d Temperature Exceeds Safe Limit" },
4481 { 0x0147, "E Temperature Sensor %d Temperature Exceeds Working Limit" },
4482 { 0x0148, "E Temperature Sensor %d Temperature Normal" },
4483 { 0x0149, "E Temperature Sensor %d Not Present" },
4484 { 0x014A, "E Enclosure Management Unit %d Access Critical" },
4485 { 0x014B, "E Enclosure Management Unit %d Access OK" },
4486 { 0x014C, "E Enclosure Management Unit %d Access Offline" },
4487 /* Controller Events (0x0180 - 0x01FF) */
4488 { 0x0181, "C Cache Write Back Error" },
4489 { 0x0188, "C Battery Backup Unit Found" },
4490 { 0x0189, "C Battery Backup Unit Charge Level Low" },
4491 { 0x018A, "C Battery Backup Unit Charge Level OK" },
4492 { 0x0193, "C Installation Aborted" },
4493 { 0x0195, "C Battery Backup Unit Physically Removed" },
4494 { 0x0196, "C Memory Error During Warm Boot" },
4495 { 0x019E, "C Memory Soft ECC Error Corrected" },
4496 { 0x019F, "C Memory Hard ECC Error Corrected" },
4497 { 0x01A2, "C Battery Backup Unit Failed" },
4498 { 0x01AB, "C Mirror Race Recovery Failed" },
4499 { 0x01AC, "C Mirror Race on Critical Drive" },
4500 /* Controller Internal Processor Events */
4501 { 0x0380, "C Internal Controller Hung" },
4502 { 0x0381, "C Internal Controller Firmware Breakpoint" },
4503 { 0x0390, "C Internal Controller i960 Processor Specific Error" },
4504 { 0x03A0, "C Internal Controller StrongARM Processor Specific Error" },
4505 { 0, "" } };
4506 int EventListIndex = 0, EventCode;
4507 unsigned char EventType, *EventMessage;
4508 if (Event->EventCode == 0x1C &&
4509 RequestSense->SenseKey == DAC960_SenseKey_VendorSpecific &&
4510 (RequestSense->AdditionalSenseCode == 0x80 ||
4511 RequestSense->AdditionalSenseCode == 0x81))
4512 Event->EventCode = ((RequestSense->AdditionalSenseCode - 0x80) << 8) |
4513 RequestSense->AdditionalSenseCodeQualifier;
4514 while (true)
4515 {
4516 EventCode = EventList[EventListIndex].EventCode;
4517 if (EventCode == Event->EventCode || EventCode == 0) break;
4518 EventListIndex++;
4519 }
4520 EventType = EventList[EventListIndex].EventMessage[0];
4521 EventMessage = &EventList[EventListIndex].EventMessage[2];
4522 if (EventCode == 0)
4523 {
4524 DAC960_Critical("Unknown Controller Event Code %04X\n",
4525 Controller, Event->EventCode);
4526 return;
4527 }
4528 switch (EventType)
4529 {
4530 case 'P':
4531 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4532 Event->Channel, Event->TargetID, EventMessage);
4533 break;
4534 case 'L':
4535 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4536 Event->LogicalUnit, Controller->ControllerNumber,
4537 Event->LogicalUnit, EventMessage);
4538 break;
4539 case 'M':
4540 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) %s\n", Controller,
4541 Event->LogicalUnit, Controller->ControllerNumber,
4542 Event->LogicalUnit, EventMessage);
4543 break;
4544 case 'S':
4545 if (RequestSense->SenseKey == DAC960_SenseKey_NoSense ||
4546 (RequestSense->SenseKey == DAC960_SenseKey_NotReady &&
4547 RequestSense->AdditionalSenseCode == 0x04 &&
4548 (RequestSense->AdditionalSenseCodeQualifier == 0x01 ||
4549 RequestSense->AdditionalSenseCodeQualifier == 0x02)))
4550 break;
4551 DAC960_Critical("Physical Device %d:%d %s\n", Controller,
4552 Event->Channel, Event->TargetID, EventMessage);
4553 DAC960_Critical("Physical Device %d:%d Request Sense: "
4554 "Sense Key = %X, ASC = %02X, ASCQ = %02X\n",
4555 Controller,
4556 Event->Channel,
4557 Event->TargetID,
4558 RequestSense->SenseKey,
4559 RequestSense->AdditionalSenseCode,
4560 RequestSense->AdditionalSenseCodeQualifier);
4561 DAC960_Critical("Physical Device %d:%d Request Sense: "
4562 "Information = %02X%02X%02X%02X "
4563 "%02X%02X%02X%02X\n",
4564 Controller,
4565 Event->Channel,
4566 Event->TargetID,
4567 RequestSense->Information[0],
4568 RequestSense->Information[1],
4569 RequestSense->Information[2],
4570 RequestSense->Information[3],
4571 RequestSense->CommandSpecificInformation[0],
4572 RequestSense->CommandSpecificInformation[1],
4573 RequestSense->CommandSpecificInformation[2],
4574 RequestSense->CommandSpecificInformation[3]);
4575 break;
4576 case 'E':
4577 if (Controller->SuppressEnclosureMessages) break;
4578 sprintf(MessageBuffer, EventMessage, Event->LogicalUnit);
4579 DAC960_Critical("Enclosure %d %s\n", Controller,
4580 Event->TargetID, MessageBuffer);
4581 break;
4582 case 'C':
4583 DAC960_Critical("Controller %s\n", Controller, EventMessage);
4584 break;
4585 default:
4586 DAC960_Critical("Unknown Controller Event Code %04X\n",
4587 Controller, Event->EventCode);
4588 break;
4589 }
4590}
4591
4592
4593/*
4594 DAC960_V2_ReportProgress prints an appropriate progress message for
4595 Logical Device Long Operations.
4596*/
4597
4598static void DAC960_V2_ReportProgress(DAC960_Controller_T *Controller,
4599 unsigned char *MessageString,
4600 unsigned int LogicalDeviceNumber,
4601 unsigned long BlocksCompleted,
4602 unsigned long LogicalDeviceSize)
4603{
4604 Controller->EphemeralProgressMessage = true;
4605 DAC960_Progress("%s in Progress: Logical Drive %d (/dev/rd/c%dd%d) "
4606 "%d%% completed\n", Controller,
4607 MessageString,
4608 LogicalDeviceNumber,
4609 Controller->ControllerNumber,
4610 LogicalDeviceNumber,
4611 (100 * (BlocksCompleted >> 7)) / (LogicalDeviceSize >> 7));
4612 Controller->EphemeralProgressMessage = false;
4613}
4614
4615
4616/*
4617 DAC960_V2_ProcessCompletedCommand performs completion processing for Command
4618 for DAC960 V2 Firmware Controllers.
4619*/
4620
4621static void DAC960_V2_ProcessCompletedCommand(DAC960_Command_T *Command)
4622{
4623 DAC960_Controller_T *Controller = Command->Controller;
4624 DAC960_CommandType_T CommandType = Command->CommandType;
4625 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
bca505f1
DK		 4626 DAC960_V2_IOCTL_Opcode_T IOCTLOpcode = CommandMailbox->Common.IOCTL_Opcode;
4627 DAC960_V2_CommandOpcode_T CommandOpcode = CommandMailbox->SCSI_10.CommandOpcode;
1da177e4
LT		 4628 DAC960_V2_CommandStatus_T CommandStatus = Command->V2.CommandStatus;
4629
4630 if (CommandType == DAC960_ReadCommand ||
4631 CommandType == DAC960_WriteCommand)
4632 {
4633
4634#ifdef FORCE_RETRY_DEBUG
4635 CommandStatus = DAC960_V2_AbormalCompletion;
4636#endif
4637 Command->V2.RequestSense->SenseKey = DAC960_SenseKey_MediumError;
4638
4639 if (CommandStatus == DAC960_V2_NormalCompletion) {
4640
4641 if (!DAC960_ProcessCompletedRequest(Command, true))
4642 BUG();
4643
4644 } else if (Command->V2.RequestSense->SenseKey == DAC960_SenseKey_MediumError)
4645 {
4646 /*
4647 * break the command down into pieces and resubmit each
4648 * piece, hoping that some of them will succeed.
4649 */
4650 DAC960_queue_partial_rw(Command);
4651 return;
4652 }
4653 else
4654 {
4655 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4656 DAC960_V2_ReadWriteError(Command);
4657 /*
4658 Perform completion processing for all buffers in this I/O Request.
4659 */
4660 (void)DAC960_ProcessCompletedRequest(Command, false);
4661 }
4662 }
4663 else if (CommandType == DAC960_ReadRetryCommand ||
4664 CommandType == DAC960_WriteRetryCommand)
4665 {
87d156bf 4666 bool normal_completion;
1da177e4
LT		 4667
4668#ifdef FORCE_RETRY_FAILURE_DEBUG
4669 static int retry_count = 1;
4670#endif
4671 /*
4672 Perform completion processing for the portion that was
4673 retried, and submit the next portion, if any.
4674 */
4675 normal_completion = true;
4676 if (CommandStatus != DAC960_V2_NormalCompletion) {
4677 normal_completion = false;
4678 if (Command->V2.RequestSense->SenseKey != DAC960_SenseKey_NotReady)
4679 DAC960_V2_ReadWriteError(Command);
4680 }
4681
4682#ifdef FORCE_RETRY_FAILURE_DEBUG
4683 if (!(++retry_count % 10000)) {
4684 printk("V2 error retry failure test\n");
4685 normal_completion = false;
4686 DAC960_V2_ReadWriteError(Command);
4687 }
4688#endif
4689
4690 if (!DAC960_ProcessCompletedRequest(Command, normal_completion)) {
4691 DAC960_queue_partial_rw(Command);
4692 return;
4693 }
4694 }
4695 else if (CommandType == DAC960_MonitoringCommand)
4696 {
4697 if (Controller->ShutdownMonitoringTimer)
4698 return;
bca505f1 4699 if (IOCTLOpcode == DAC960_V2_GetControllerInfo)
1da177e4
LT		 4700 {
4701 DAC960_V2_ControllerInfo_T *NewControllerInfo =
4702 Controller->V2.NewControllerInformation;
4703 DAC960_V2_ControllerInfo_T *ControllerInfo =
4704 &Controller->V2.ControllerInformation;
4705 Controller->LogicalDriveCount =
4706 NewControllerInfo->LogicalDevicesPresent;
4707 Controller->V2.NeedLogicalDeviceInformation = true;
4708 Controller->V2.NeedPhysicalDeviceInformation = true;
4709 Controller->V2.StartLogicalDeviceInformationScan = true;
4710 Controller->V2.StartPhysicalDeviceInformationScan = true;
4711 Controller->MonitoringAlertMode =
4712 (NewControllerInfo->LogicalDevicesCritical > 0 ||
4713 NewControllerInfo->LogicalDevicesOffline > 0 ||
4714 NewControllerInfo->PhysicalDisksCritical > 0 ||
4715 NewControllerInfo->PhysicalDisksOffline > 0);
4716 memcpy(ControllerInfo, NewControllerInfo,
4717 sizeof(DAC960_V2_ControllerInfo_T));
4718 }
bca505f1 4719 else if (IOCTLOpcode == DAC960_V2_GetEvent)
1da177e4
LT		 4720 {
4721 if (CommandStatus == DAC960_V2_NormalCompletion) {
4722 DAC960_V2_ReportEvent(Controller, Controller->V2.Event);
4723 }
4724 Controller->V2.NextEventSequenceNumber++;
4725 }
bca505f1 4726 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid &&
1da177e4
LT		 4727 CommandStatus == DAC960_V2_NormalCompletion)
4728 {
4729 DAC960_V2_PhysicalDeviceInfo_T *NewPhysicalDeviceInfo =
4730 Controller->V2.NewPhysicalDeviceInformation;
4731 unsigned int PhysicalDeviceIndex = Controller->V2.PhysicalDeviceIndex;
4732 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4733 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4734 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4735 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4736 unsigned int DeviceIndex;
4737 while (PhysicalDeviceInfo != NULL &&
4738 (NewPhysicalDeviceInfo->Channel >
4739 PhysicalDeviceInfo->Channel ||
4740 (NewPhysicalDeviceInfo->Channel ==
4741 PhysicalDeviceInfo->Channel &&
4742 (NewPhysicalDeviceInfo->TargetID >
4743 PhysicalDeviceInfo->TargetID ||
4744 (NewPhysicalDeviceInfo->TargetID ==
4745 PhysicalDeviceInfo->TargetID &&
4746 NewPhysicalDeviceInfo->LogicalUnit >
4747 PhysicalDeviceInfo->LogicalUnit)))))
4748 {
4749 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4750 Controller,
4751 PhysicalDeviceInfo->Channel,
4752 PhysicalDeviceInfo->TargetID);
4753 Controller->V2.PhysicalDeviceInformation
4754 [PhysicalDeviceIndex] = NULL;
4755 Controller->V2.InquiryUnitSerialNumber
4756 [PhysicalDeviceIndex] = NULL;
4757 kfree(PhysicalDeviceInfo);
4758 kfree(InquiryUnitSerialNumber);
4759 for (DeviceIndex = PhysicalDeviceIndex;
4760 DeviceIndex < DAC960_V2_MaxPhysicalDevices - 1;
4761 DeviceIndex++)
4762 {
4763 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4764 Controller->V2.PhysicalDeviceInformation[DeviceIndex+1];
4765 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4766 Controller->V2.InquiryUnitSerialNumber[DeviceIndex+1];
4767 }
4768 Controller->V2.PhysicalDeviceInformation
4769 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4770 Controller->V2.InquiryUnitSerialNumber
4771 [DAC960_V2_MaxPhysicalDevices-1] = NULL;
4772 PhysicalDeviceInfo =
4773 Controller->V2.PhysicalDeviceInformation[PhysicalDeviceIndex];
4774 InquiryUnitSerialNumber =
4775 Controller->V2.InquiryUnitSerialNumber[PhysicalDeviceIndex];
4776 }
4777 if (PhysicalDeviceInfo == NULL ||
4778 (NewPhysicalDeviceInfo->Channel !=
4779 PhysicalDeviceInfo->Channel) ||
4780 (NewPhysicalDeviceInfo->TargetID !=
4781 PhysicalDeviceInfo->TargetID) ||
4782 (NewPhysicalDeviceInfo->LogicalUnit !=
4783 PhysicalDeviceInfo->LogicalUnit))
4784 {
07fb75a5 4785 PhysicalDeviceInfo =
1da177e4
LT		 4786 kmalloc(sizeof(DAC960_V2_PhysicalDeviceInfo_T), GFP_ATOMIC);
4787 InquiryUnitSerialNumber =
1da177e4
LT		 4788 kmalloc(sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T),
4789 GFP_ATOMIC);
07fb75a5
JJ		 4790 if (InquiryUnitSerialNumber == NULL ||
4791 PhysicalDeviceInfo == NULL)
1da177e4 4792 {
07fb75a5
JJ		 4793 kfree(InquiryUnitSerialNumber);
4794 InquiryUnitSerialNumber = NULL;
1da177e4
LT		 4795 kfree(PhysicalDeviceInfo);
4796 PhysicalDeviceInfo = NULL;
4797 }
4798 DAC960_Critical("Physical Device %d:%d Now Exists%s\n",
4799 Controller,
4800 NewPhysicalDeviceInfo->Channel,
4801 NewPhysicalDeviceInfo->TargetID,
4802 (PhysicalDeviceInfo != NULL
4803 ? "" : " - Allocation Failed"));
4804 if (PhysicalDeviceInfo != NULL)
4805 {
4806 memset(PhysicalDeviceInfo, 0,
4807 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4808 PhysicalDeviceInfo->PhysicalDeviceState =
4809 DAC960_V2_Device_InvalidState;
4810 memset(InquiryUnitSerialNumber, 0,
4811 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
4812 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
4813 for (DeviceIndex = DAC960_V2_MaxPhysicalDevices - 1;
4814 DeviceIndex > PhysicalDeviceIndex;
4815 DeviceIndex--)
4816 {
4817 Controller->V2.PhysicalDeviceInformation[DeviceIndex] =
4818 Controller->V2.PhysicalDeviceInformation[DeviceIndex-1];
4819 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] =
4820 Controller->V2.InquiryUnitSerialNumber[DeviceIndex-1];
4821 }
4822 Controller->V2.PhysicalDeviceInformation
4823 [PhysicalDeviceIndex] =
4824 PhysicalDeviceInfo;
4825 Controller->V2.InquiryUnitSerialNumber
4826 [PhysicalDeviceIndex] =
4827 InquiryUnitSerialNumber;
4828 Controller->V2.NeedDeviceSerialNumberInformation = true;
4829 }
4830 }
4831 if (PhysicalDeviceInfo != NULL)
4832 {
4833 if (NewPhysicalDeviceInfo->PhysicalDeviceState !=
4834 PhysicalDeviceInfo->PhysicalDeviceState)
4835 DAC960_Critical(
4836 "Physical Device %d:%d is now %s\n", Controller,
4837 NewPhysicalDeviceInfo->Channel,
4838 NewPhysicalDeviceInfo->TargetID,
4839 (NewPhysicalDeviceInfo->PhysicalDeviceState
4840 == DAC960_V2_Device_Online
4841 ? "ONLINE"
4842 : NewPhysicalDeviceInfo->PhysicalDeviceState
4843 == DAC960_V2_Device_Rebuild
4844 ? "REBUILD"
4845 : NewPhysicalDeviceInfo->PhysicalDeviceState
4846 == DAC960_V2_Device_Missing
4847 ? "MISSING"
4848 : NewPhysicalDeviceInfo->PhysicalDeviceState
4849 == DAC960_V2_Device_Critical
4850 ? "CRITICAL"
4851 : NewPhysicalDeviceInfo->PhysicalDeviceState
4852 == DAC960_V2_Device_Dead
4853 ? "DEAD"
4854 : NewPhysicalDeviceInfo->PhysicalDeviceState
4855 == DAC960_V2_Device_SuspectedDead
4856 ? "SUSPECTED-DEAD"
4857 : NewPhysicalDeviceInfo->PhysicalDeviceState
4858 == DAC960_V2_Device_CommandedOffline
4859 ? "COMMANDED-OFFLINE"
4860 : NewPhysicalDeviceInfo->PhysicalDeviceState
4861 == DAC960_V2_Device_Standby
4862 ? "STANDBY" : "UNKNOWN"));
4863 if ((NewPhysicalDeviceInfo->ParityErrors !=
4864 PhysicalDeviceInfo->ParityErrors) ||
4865 (NewPhysicalDeviceInfo->SoftErrors !=
4866 PhysicalDeviceInfo->SoftErrors) ||
4867 (NewPhysicalDeviceInfo->HardErrors !=
4868 PhysicalDeviceInfo->HardErrors) ||
4869 (NewPhysicalDeviceInfo->MiscellaneousErrors !=
4870 PhysicalDeviceInfo->MiscellaneousErrors) ||
4871 (NewPhysicalDeviceInfo->CommandTimeouts !=
4872 PhysicalDeviceInfo->CommandTimeouts) ||
4873 (NewPhysicalDeviceInfo->Retries !=
4874 PhysicalDeviceInfo->Retries) ||
4875 (NewPhysicalDeviceInfo->Aborts !=
4876 PhysicalDeviceInfo->Aborts) ||
4877 (NewPhysicalDeviceInfo->PredictedFailuresDetected !=
4878 PhysicalDeviceInfo->PredictedFailuresDetected))
4879 {
4880 DAC960_Critical("Physical Device %d:%d Errors: "
4881 "Parity = %d, Soft = %d, "
4882 "Hard = %d, Misc = %d\n",
4883 Controller,
4884 NewPhysicalDeviceInfo->Channel,
4885 NewPhysicalDeviceInfo->TargetID,
4886 NewPhysicalDeviceInfo->ParityErrors,
4887 NewPhysicalDeviceInfo->SoftErrors,
4888 NewPhysicalDeviceInfo->HardErrors,
4889 NewPhysicalDeviceInfo->MiscellaneousErrors);
4890 DAC960_Critical("Physical Device %d:%d Errors: "
4891 "Timeouts = %d, Retries = %d, "
4892 "Aborts = %d, Predicted = %d\n",
4893 Controller,
4894 NewPhysicalDeviceInfo->Channel,
4895 NewPhysicalDeviceInfo->TargetID,
4896 NewPhysicalDeviceInfo->CommandTimeouts,
4897 NewPhysicalDeviceInfo->Retries,
4898 NewPhysicalDeviceInfo->Aborts,
4899 NewPhysicalDeviceInfo
4900 ->PredictedFailuresDetected);
4901 }
4902 if ((PhysicalDeviceInfo->PhysicalDeviceState
4903 == DAC960_V2_Device_Dead ||
4904 PhysicalDeviceInfo->PhysicalDeviceState
4905 == DAC960_V2_Device_InvalidState) &&
4906 NewPhysicalDeviceInfo->PhysicalDeviceState
4907 != DAC960_V2_Device_Dead)
4908 Controller->V2.NeedDeviceSerialNumberInformation = true;
4909 memcpy(PhysicalDeviceInfo, NewPhysicalDeviceInfo,
4910 sizeof(DAC960_V2_PhysicalDeviceInfo_T));
4911 }
4912 NewPhysicalDeviceInfo->LogicalUnit++;
4913 Controller->V2.PhysicalDeviceIndex++;
4914 }
bca505f1 4915 else if (IOCTLOpcode == DAC960_V2_GetPhysicalDeviceInfoValid)
1da177e4
LT		 4916 {
4917 unsigned int DeviceIndex;
4918 for (DeviceIndex = Controller->V2.PhysicalDeviceIndex;
4919 DeviceIndex < DAC960_V2_MaxPhysicalDevices;
4920 DeviceIndex++)
4921 {
4922 DAC960_V2_PhysicalDeviceInfo_T *PhysicalDeviceInfo =
4923 Controller->V2.PhysicalDeviceInformation[DeviceIndex];
4924 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
4925 Controller->V2.InquiryUnitSerialNumber[DeviceIndex];
4926 if (PhysicalDeviceInfo == NULL) break;
4927 DAC960_Critical("Physical Device %d:%d No Longer Exists\n",
4928 Controller,
4929 PhysicalDeviceInfo->Channel,
4930 PhysicalDeviceInfo->TargetID);
4931 Controller->V2.PhysicalDeviceInformation[DeviceIndex] = NULL;
4932 Controller->V2.InquiryUnitSerialNumber[DeviceIndex] = NULL;
4933 kfree(PhysicalDeviceInfo);
4934 kfree(InquiryUnitSerialNumber);
4935 }
4936 Controller->V2.NeedPhysicalDeviceInformation = false;
4937 }
bca505f1 4938 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid &&
1da177e4
LT		 4939 CommandStatus == DAC960_V2_NormalCompletion)
4940 {
4941 DAC960_V2_LogicalDeviceInfo_T *NewLogicalDeviceInfo =
4942 Controller->V2.NewLogicalDeviceInformation;
4943 unsigned short LogicalDeviceNumber =
4944 NewLogicalDeviceInfo->LogicalDeviceNumber;
4945 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
4946 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber];
4947 if (LogicalDeviceInfo == NULL)
4948 {
4949 DAC960_V2_PhysicalDevice_T PhysicalDevice;
4950 PhysicalDevice.Controller = 0;
4951 PhysicalDevice.Channel = NewLogicalDeviceInfo->Channel;
4952 PhysicalDevice.TargetID = NewLogicalDeviceInfo->TargetID;
4953 PhysicalDevice.LogicalUnit = NewLogicalDeviceInfo->LogicalUnit;
4954 Controller->V2.LogicalDriveToVirtualDevice[LogicalDeviceNumber] =
4955 PhysicalDevice;
0a361e31
AD		 4956 LogicalDeviceInfo = kmalloc(sizeof(DAC960_V2_LogicalDeviceInfo_T),
4957 GFP_ATOMIC);
1da177e4
LT		 4958 Controller->V2.LogicalDeviceInformation[LogicalDeviceNumber] =
4959 LogicalDeviceInfo;
4960 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4961 "Now Exists%s\n", Controller,
4962 LogicalDeviceNumber,
4963 Controller->ControllerNumber,
4964 LogicalDeviceNumber,
4965 (LogicalDeviceInfo != NULL
4966 ? "" : " - Allocation Failed"));
4967 if (LogicalDeviceInfo != NULL)
4968 {
4969 memset(LogicalDeviceInfo, 0,
4970 sizeof(DAC960_V2_LogicalDeviceInfo_T));
4971 DAC960_ComputeGenericDiskInfo(Controller);
4972 }
4973 }
4974 if (LogicalDeviceInfo != NULL)
4975 {
4976 unsigned long LogicalDeviceSize =
4977 NewLogicalDeviceInfo->ConfigurableDeviceSize;
4978 if (NewLogicalDeviceInfo->LogicalDeviceState !=
4979 LogicalDeviceInfo->LogicalDeviceState)
4980 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
4981 "is now %s\n", Controller,
4982 LogicalDeviceNumber,
4983 Controller->ControllerNumber,
4984 LogicalDeviceNumber,
4985 (NewLogicalDeviceInfo->LogicalDeviceState
4986 == DAC960_V2_LogicalDevice_Online
4987 ? "ONLINE"
4988 : NewLogicalDeviceInfo->LogicalDeviceState
4989 == DAC960_V2_LogicalDevice_Critical
4990 ? "CRITICAL" : "OFFLINE"));
4991 if ((NewLogicalDeviceInfo->SoftErrors !=
4992 LogicalDeviceInfo->SoftErrors) ||
4993 (NewLogicalDeviceInfo->CommandsFailed !=
4994 LogicalDeviceInfo->CommandsFailed) ||
4995 (NewLogicalDeviceInfo->DeferredWriteErrors !=
4996 LogicalDeviceInfo->DeferredWriteErrors))
4997 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) Errors: "
4998 "Soft = %d, Failed = %d, Deferred Write = %d\n",
4999 Controller, LogicalDeviceNumber,
5000 Controller->ControllerNumber,
5001 LogicalDeviceNumber,
5002 NewLogicalDeviceInfo->SoftErrors,
5003 NewLogicalDeviceInfo->CommandsFailed,
5004 NewLogicalDeviceInfo->DeferredWriteErrors);
5005 if (NewLogicalDeviceInfo->ConsistencyCheckInProgress)
5006 DAC960_V2_ReportProgress(Controller,
5007 "Consistency Check",
5008 LogicalDeviceNumber,
5009 NewLogicalDeviceInfo
5010 ->ConsistencyCheckBlockNumber,
5011 LogicalDeviceSize);
5012 else if (NewLogicalDeviceInfo->RebuildInProgress)
5013 DAC960_V2_ReportProgress(Controller,
5014 "Rebuild",
5015 LogicalDeviceNumber,
5016 NewLogicalDeviceInfo
5017 ->RebuildBlockNumber,
5018 LogicalDeviceSize);
5019 else if (NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5020 DAC960_V2_ReportProgress(Controller,
5021 "Background Initialization",
5022 LogicalDeviceNumber,
5023 NewLogicalDeviceInfo
5024 ->BackgroundInitializationBlockNumber,
5025 LogicalDeviceSize);
5026 else if (NewLogicalDeviceInfo->ForegroundInitializationInProgress)
5027 DAC960_V2_ReportProgress(Controller,
5028 "Foreground Initialization",
5029 LogicalDeviceNumber,
5030 NewLogicalDeviceInfo
5031 ->ForegroundInitializationBlockNumber,
5032 LogicalDeviceSize);
5033 else if (NewLogicalDeviceInfo->DataMigrationInProgress)
5034 DAC960_V2_ReportProgress(Controller,
5035 "Data Migration",
5036 LogicalDeviceNumber,
5037 NewLogicalDeviceInfo
5038 ->DataMigrationBlockNumber,
5039 LogicalDeviceSize);
5040 else if (NewLogicalDeviceInfo->PatrolOperationInProgress)
5041 DAC960_V2_ReportProgress(Controller,
5042 "Patrol Operation",
5043 LogicalDeviceNumber,
5044 NewLogicalDeviceInfo
5045 ->PatrolOperationBlockNumber,
5046 LogicalDeviceSize);
5047 if (LogicalDeviceInfo->BackgroundInitializationInProgress &&
5048 !NewLogicalDeviceInfo->BackgroundInitializationInProgress)
5049 DAC960_Progress("Logical Drive %d (/dev/rd/c%dd%d) "
5050 "Background Initialization %s\n",
5051 Controller,
5052 LogicalDeviceNumber,
5053 Controller->ControllerNumber,
5054 LogicalDeviceNumber,
5055 (NewLogicalDeviceInfo->LogicalDeviceControl
5056 .LogicalDeviceInitialized
5057 ? "Completed" : "Failed"));
5058 memcpy(LogicalDeviceInfo, NewLogicalDeviceInfo,
5059 sizeof(DAC960_V2_LogicalDeviceInfo_T));
5060 }
5061 Controller->V2.LogicalDriveFoundDuringScan
5062 [LogicalDeviceNumber] = true;
5063 NewLogicalDeviceInfo->LogicalDeviceNumber++;
5064 }
bca505f1 5065 else if (IOCTLOpcode == DAC960_V2_GetLogicalDeviceInfoValid)
1da177e4
LT		 5066 {
5067 int LogicalDriveNumber;
5068 for (LogicalDriveNumber = 0;
5069 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5070 LogicalDriveNumber++)
5071 {
5072 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5073 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5074 if (LogicalDeviceInfo == NULL ||
5075 Controller->V2.LogicalDriveFoundDuringScan
5076 [LogicalDriveNumber])
5077 continue;
5078 DAC960_Critical("Logical Drive %d (/dev/rd/c%dd%d) "
5079 "No Longer Exists\n", Controller,
5080 LogicalDriveNumber,
5081 Controller->ControllerNumber,
5082 LogicalDriveNumber);
5083 Controller->V2.LogicalDeviceInformation
5084 [LogicalDriveNumber] = NULL;
5085 kfree(LogicalDeviceInfo);
5086 Controller->LogicalDriveInitiallyAccessible
5087 [LogicalDriveNumber] = false;
5088 DAC960_ComputeGenericDiskInfo(Controller);
5089 }
5090 Controller->V2.NeedLogicalDeviceInformation = false;
5091 }
5092 else if (CommandOpcode == DAC960_V2_SCSI_10_Passthru)
5093 {
5094 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5095 Controller->V2.InquiryUnitSerialNumber[Controller->V2.PhysicalDeviceIndex - 1];
5096
5097 if (CommandStatus != DAC960_V2_NormalCompletion) {
5098 memset(InquiryUnitSerialNumber,
5099 0, sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5100 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5101 } else
5102 memcpy(InquiryUnitSerialNumber,
5103 Controller->V2.NewInquiryUnitSerialNumber,
5104 sizeof(DAC960_SCSI_Inquiry_UnitSerialNumber_T));
5105
5106 Controller->V2.NeedDeviceSerialNumberInformation = false;
5107 }
5108
5109 if (Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5110 - Controller->V2.NextEventSequenceNumber > 0)
5111 {
5112 CommandMailbox->GetEvent.CommandOpcode = DAC960_V2_IOCTL;
5113 CommandMailbox->GetEvent.DataTransferSize = sizeof(DAC960_V2_Event_T);
5114 CommandMailbox->GetEvent.EventSequenceNumberHigh16 =
5115 Controller->V2.NextEventSequenceNumber >> 16;
5116 CommandMailbox->GetEvent.ControllerNumber = 0;
5117 CommandMailbox->GetEvent.IOCTL_Opcode =
5118 DAC960_V2_GetEvent;
5119 CommandMailbox->GetEvent.EventSequenceNumberLow16 =
5120 Controller->V2.NextEventSequenceNumber & 0xFFFF;
5121 CommandMailbox->GetEvent.DataTransferMemoryAddress
5122 .ScatterGatherSegments[0]
5123 .SegmentDataPointer =
5124 Controller->V2.EventDMA;
5125 CommandMailbox->GetEvent.DataTransferMemoryAddress
5126 .ScatterGatherSegments[0]
5127 .SegmentByteCount =
5128 CommandMailbox->GetEvent.DataTransferSize;
5129 DAC960_QueueCommand(Command);
5130 return;
5131 }
5132 if (Controller->V2.NeedPhysicalDeviceInformation)
5133 {
5134 if (Controller->V2.NeedDeviceSerialNumberInformation)
5135 {
5136 DAC960_SCSI_Inquiry_UnitSerialNumber_T *InquiryUnitSerialNumber =
5137 Controller->V2.NewInquiryUnitSerialNumber;
5138 InquiryUnitSerialNumber->PeripheralDeviceType = 0x1F;
5139
5140 DAC960_V2_ConstructNewUnitSerialNumber(Controller, CommandMailbox,
5141 Controller->V2.NewPhysicalDeviceInformation->Channel,
5142 Controller->V2.NewPhysicalDeviceInformation->TargetID,
5143 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit - 1);
5144
5145
5146 DAC960_QueueCommand(Command);
5147 return;
5148 }
5149 if (Controller->V2.StartPhysicalDeviceInformationScan)
5150 {
5151 Controller->V2.PhysicalDeviceIndex = 0;
5152 Controller->V2.NewPhysicalDeviceInformation->Channel = 0;
5153 Controller->V2.NewPhysicalDeviceInformation->TargetID = 0;
5154 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit = 0;
5155 Controller->V2.StartPhysicalDeviceInformationScan = false;
5156 }
5157 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5158 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
5159 sizeof(DAC960_V2_PhysicalDeviceInfo_T);
5160 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.LogicalUnit =
5161 Controller->V2.NewPhysicalDeviceInformation->LogicalUnit;
5162 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID =
5163 Controller->V2.NewPhysicalDeviceInformation->TargetID;
5164 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel =
5165 Controller->V2.NewPhysicalDeviceInformation->Channel;
5166 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
5167 DAC960_V2_GetPhysicalDeviceInfoValid;
5168 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5169 .ScatterGatherSegments[0]
5170 .SegmentDataPointer =
5171 Controller->V2.NewPhysicalDeviceInformationDMA;
5172 CommandMailbox->PhysicalDeviceInfo.DataTransferMemoryAddress
5173 .ScatterGatherSegments[0]
5174 .SegmentByteCount =
5175 CommandMailbox->PhysicalDeviceInfo.DataTransferSize;
5176 DAC960_QueueCommand(Command);
5177 return;
5178 }
5179 if (Controller->V2.NeedLogicalDeviceInformation)
5180 {
5181 if (Controller->V2.StartLogicalDeviceInformationScan)
5182 {
5183 int LogicalDriveNumber;
5184 for (LogicalDriveNumber = 0;
5185 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5186 LogicalDriveNumber++)
5187 Controller->V2.LogicalDriveFoundDuringScan
5188 [LogicalDriveNumber] = false;
5189 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber = 0;
5190 Controller->V2.StartLogicalDeviceInformationScan = false;
5191 }
5192 CommandMailbox->LogicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
5193 CommandMailbox->LogicalDeviceInfo.DataTransferSize =
5194 sizeof(DAC960_V2_LogicalDeviceInfo_T);
5195 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
5196 Controller->V2.NewLogicalDeviceInformation->LogicalDeviceNumber;
5197 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
5198 DAC960_V2_GetLogicalDeviceInfoValid;
5199 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5200 .ScatterGatherSegments[0]
5201 .SegmentDataPointer =
5202 Controller->V2.NewLogicalDeviceInformationDMA;
5203 CommandMailbox->LogicalDeviceInfo.DataTransferMemoryAddress
5204 .ScatterGatherSegments[0]
5205 .SegmentByteCount =
5206 CommandMailbox->LogicalDeviceInfo.DataTransferSize;
5207 DAC960_QueueCommand(Command);
5208 return;
5209 }
5210 Controller->MonitoringTimerCount++;
5211 Controller->MonitoringTimer.expires =
5212 jiffies + DAC960_HealthStatusMonitoringInterval;
5213 add_timer(&Controller->MonitoringTimer);
5214 }
5215 if (CommandType == DAC960_ImmediateCommand)
5216 {
5217 complete(Command->Completion);
5218 Command->Completion = NULL;
5219 return;
5220 }
5221 if (CommandType == DAC960_QueuedCommand)
5222 {
5223 DAC960_V2_KernelCommand_T *KernelCommand = Command->V2.KernelCommand;
5224 KernelCommand->CommandStatus = CommandStatus;
5225 KernelCommand->RequestSenseLength = Command->V2.RequestSenseLength;
5226 KernelCommand->DataTransferLength = Command->V2.DataTransferResidue;
5227 Command->V2.KernelCommand = NULL;
5228 DAC960_DeallocateCommand(Command);
5229 KernelCommand->CompletionFunction(KernelCommand);
5230 return;
5231 }
5232 /*
5233 Queue a Status Monitoring Command to the Controller using the just
5234 completed Command if one was deferred previously due to lack of a
5235 free Command when the Monitoring Timer Function was called.
5236 */
5237 if (Controller->MonitoringCommandDeferred)
5238 {
5239 Controller->MonitoringCommandDeferred = false;
5240 DAC960_V2_QueueMonitoringCommand(Command);
5241 return;
5242 }
5243 /*
5244 Deallocate the Command.
5245 */
5246 DAC960_DeallocateCommand(Command);
5247 /*
5248 Wake up any processes waiting on a free Command.
5249 */
5250 wake_up(&Controller->CommandWaitQueue);
5251}
5252
5b76ffd5
CH		 5253/*
5254 DAC960_GEM_InterruptHandler handles hardware interrupts from DAC960 GEM Series
5255 Controllers.
5256*/
5257
5258static irqreturn_t DAC960_GEM_InterruptHandler(int IRQ_Channel,
7d12e780 5259 void *DeviceIdentifier)
5b76ffd5 5260{
c7bec5ab 5261 DAC960_Controller_T *Controller = DeviceIdentifier;
5b76ffd5
CH		 5262 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5263 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5264 unsigned long flags;
5265
5266 spin_lock_irqsave(&Controller->queue_lock, flags);
5267 DAC960_GEM_AcknowledgeInterrupt(ControllerBaseAddress);
5268 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5269 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5270 {
5271 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5272 NextStatusMailbox->Fields.CommandIdentifier;
5273 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5274 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5275 Command->V2.RequestSenseLength =
5276 NextStatusMailbox->Fields.RequestSenseLength;
5277 Command->V2.DataTransferResidue =
5278 NextStatusMailbox->Fields.DataTransferResidue;
5279 NextStatusMailbox->Words[0] = 0;
5280 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5281 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5282 DAC960_V2_ProcessCompletedCommand(Command);
5283 }
5284 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5285 /*
5286 Attempt to remove additional I/O Requests from the Controller's
5287 I/O Request Queue and queue them to the Controller.
5288 */
5289 DAC960_ProcessRequest(Controller);
5290 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5291 return IRQ_HANDLED;
5292}
1da177e4
LT		 5293
5294/*
5295 DAC960_BA_InterruptHandler handles hardware interrupts from DAC960 BA Series
5296 Controllers.
5297*/
5298
5299static irqreturn_t DAC960_BA_InterruptHandler(int IRQ_Channel,
7d12e780 5300 void *DeviceIdentifier)
1da177e4 5301{
c7bec5ab 5302 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5303 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5304 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5305 unsigned long flags;
5306
5307 spin_lock_irqsave(&Controller->queue_lock, flags);
5308 DAC960_BA_AcknowledgeInterrupt(ControllerBaseAddress);
5309 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5310 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5311 {
5312 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5313 NextStatusMailbox->Fields.CommandIdentifier;
5314 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5315 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5316 Command->V2.RequestSenseLength =
5317 NextStatusMailbox->Fields.RequestSenseLength;
5318 Command->V2.DataTransferResidue =
5319 NextStatusMailbox->Fields.DataTransferResidue;
5320 NextStatusMailbox->Words[0] = 0;
5321 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5322 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5323 DAC960_V2_ProcessCompletedCommand(Command);
5324 }
5325 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5326 /*
5327 Attempt to remove additional I/O Requests from the Controller's
5328 I/O Request Queue and queue them to the Controller.
5329 */
5330 DAC960_ProcessRequest(Controller);
5331 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5332 return IRQ_HANDLED;
5333}
5334
5335
5336/*
5337 DAC960_LP_InterruptHandler handles hardware interrupts from DAC960 LP Series
5338 Controllers.
5339*/
5340
5341static irqreturn_t DAC960_LP_InterruptHandler(int IRQ_Channel,
7d12e780 5342 void *DeviceIdentifier)
1da177e4 5343{
c7bec5ab 5344 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5345 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5346 DAC960_V2_StatusMailbox_T *NextStatusMailbox;
5347 unsigned long flags;
5348
5349 spin_lock_irqsave(&Controller->queue_lock, flags);
5350 DAC960_LP_AcknowledgeInterrupt(ControllerBaseAddress);
5351 NextStatusMailbox = Controller->V2.NextStatusMailbox;
5352 while (NextStatusMailbox->Fields.CommandIdentifier > 0)
5353 {
5354 DAC960_V2_CommandIdentifier_T CommandIdentifier =
5355 NextStatusMailbox->Fields.CommandIdentifier;
5356 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5357 Command->V2.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5358 Command->V2.RequestSenseLength =
5359 NextStatusMailbox->Fields.RequestSenseLength;
5360 Command->V2.DataTransferResidue =
5361 NextStatusMailbox->Fields.DataTransferResidue;
5362 NextStatusMailbox->Words[0] = 0;
5363 if (++NextStatusMailbox > Controller->V2.LastStatusMailbox)
5364 NextStatusMailbox = Controller->V2.FirstStatusMailbox;
5365 DAC960_V2_ProcessCompletedCommand(Command);
5366 }
5367 Controller->V2.NextStatusMailbox = NextStatusMailbox;
5368 /*
5369 Attempt to remove additional I/O Requests from the Controller's
5370 I/O Request Queue and queue them to the Controller.
5371 */
5372 DAC960_ProcessRequest(Controller);
5373 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5374 return IRQ_HANDLED;
5375}
5376
5377
5378/*
5379 DAC960_LA_InterruptHandler handles hardware interrupts from DAC960 LA Series
5380 Controllers.
5381*/
5382
5383static irqreturn_t DAC960_LA_InterruptHandler(int IRQ_Channel,
7d12e780 5384 void *DeviceIdentifier)
1da177e4 5385{
c7bec5ab 5386 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5387 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5388 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5389 unsigned long flags;
5390
5391 spin_lock_irqsave(&Controller->queue_lock, flags);
5392 DAC960_LA_AcknowledgeInterrupt(ControllerBaseAddress);
5393 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5394 while (NextStatusMailbox->Fields.Valid)
5395 {
5396 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5397 NextStatusMailbox->Fields.CommandIdentifier;
5398 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5399 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5400 NextStatusMailbox->Word = 0;
5401 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5402 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5403 DAC960_V1_ProcessCompletedCommand(Command);
5404 }
5405 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5406 /*
5407 Attempt to remove additional I/O Requests from the Controller's
5408 I/O Request Queue and queue them to the Controller.
5409 */
5410 DAC960_ProcessRequest(Controller);
5411 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5412 return IRQ_HANDLED;
5413}
5414
5415
5416/*
5417 DAC960_PG_InterruptHandler handles hardware interrupts from DAC960 PG Series
5418 Controllers.
5419*/
5420
5421static irqreturn_t DAC960_PG_InterruptHandler(int IRQ_Channel,
7d12e780 5422 void *DeviceIdentifier)
1da177e4 5423{
c7bec5ab 5424 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5425 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5426 DAC960_V1_StatusMailbox_T *NextStatusMailbox;
5427 unsigned long flags;
5428
5429 spin_lock_irqsave(&Controller->queue_lock, flags);
5430 DAC960_PG_AcknowledgeInterrupt(ControllerBaseAddress);
5431 NextStatusMailbox = Controller->V1.NextStatusMailbox;
5432 while (NextStatusMailbox->Fields.Valid)
5433 {
5434 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5435 NextStatusMailbox->Fields.CommandIdentifier;
5436 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5437 Command->V1.CommandStatus = NextStatusMailbox->Fields.CommandStatus;
5438 NextStatusMailbox->Word = 0;
5439 if (++NextStatusMailbox > Controller->V1.LastStatusMailbox)
5440 NextStatusMailbox = Controller->V1.FirstStatusMailbox;
5441 DAC960_V1_ProcessCompletedCommand(Command);
5442 }
5443 Controller->V1.NextStatusMailbox = NextStatusMailbox;
5444 /*
5445 Attempt to remove additional I/O Requests from the Controller's
5446 I/O Request Queue and queue them to the Controller.
5447 */
5448 DAC960_ProcessRequest(Controller);
5449 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5450 return IRQ_HANDLED;
5451}
5452
5453
5454/*
5455 DAC960_PD_InterruptHandler handles hardware interrupts from DAC960 PD Series
5456 Controllers.
5457*/
5458
5459static irqreturn_t DAC960_PD_InterruptHandler(int IRQ_Channel,
7d12e780 5460 void *DeviceIdentifier)
1da177e4 5461{
c7bec5ab 5462 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5463 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5464 unsigned long flags;
5465
5466 spin_lock_irqsave(&Controller->queue_lock, flags);
5467 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5468 {
5469 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5470 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5471 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5472 Command->V1.CommandStatus =
5473 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5474 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5475 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5476 DAC960_V1_ProcessCompletedCommand(Command);
5477 }
5478 /*
5479 Attempt to remove additional I/O Requests from the Controller's
5480 I/O Request Queue and queue them to the Controller.
5481 */
5482 DAC960_ProcessRequest(Controller);
5483 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5484 return IRQ_HANDLED;
5485}
5486
5487
5488/*
5489 DAC960_P_InterruptHandler handles hardware interrupts from DAC960 P Series
5490 Controllers.
5491
5492 Translations of DAC960_V1_Enquiry and DAC960_V1_GetDeviceState rely
5493 on the data having been placed into DAC960_Controller_T, rather than
5494 an arbitrary buffer.
5495*/
5496
5497static irqreturn_t DAC960_P_InterruptHandler(int IRQ_Channel,
7d12e780 5498 void *DeviceIdentifier)
1da177e4 5499{
c7bec5ab 5500 DAC960_Controller_T *Controller = DeviceIdentifier;
1da177e4
LT		 5501 void __iomem *ControllerBaseAddress = Controller->BaseAddress;
5502 unsigned long flags;
5503
5504 spin_lock_irqsave(&Controller->queue_lock, flags);
5505 while (DAC960_PD_StatusAvailableP(ControllerBaseAddress))
5506 {
5507 DAC960_V1_CommandIdentifier_T CommandIdentifier =
5508 DAC960_PD_ReadStatusCommandIdentifier(ControllerBaseAddress);
5509 DAC960_Command_T *Command = Controller->Commands[CommandIdentifier-1];
5510 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5511 DAC960_V1_CommandOpcode_T CommandOpcode =
5512 CommandMailbox->Common.CommandOpcode;
5513 Command->V1.CommandStatus =
5514 DAC960_PD_ReadStatusRegister(ControllerBaseAddress);
5515 DAC960_PD_AcknowledgeInterrupt(ControllerBaseAddress);
5516 DAC960_PD_AcknowledgeStatus(ControllerBaseAddress);
5517 switch (CommandOpcode)
5518 {
5519 case DAC960_V1_Enquiry_Old:
5520 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Enquiry;
5521 DAC960_P_To_PD_TranslateEnquiry(Controller->V1.NewEnquiry);
5522 break;
5523 case DAC960_V1_GetDeviceState_Old:
5524 Command->V1.CommandMailbox.Common.CommandOpcode =
5525 DAC960_V1_GetDeviceState;
5526 DAC960_P_To_PD_TranslateDeviceState(Controller->V1.NewDeviceState);
5527 break;
5528 case DAC960_V1_Read_Old:
5529 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Read;
5530 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5531 break;
5532 case DAC960_V1_Write_Old:
5533 Command->V1.CommandMailbox.Common.CommandOpcode = DAC960_V1_Write;
5534 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5535 break;
5536 case DAC960_V1_ReadWithScatterGather_Old:
5537 Command->V1.CommandMailbox.Common.CommandOpcode =
5538 DAC960_V1_ReadWithScatterGather;
5539 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5540 break;
5541 case DAC960_V1_WriteWithScatterGather_Old:
5542 Command->V1.CommandMailbox.Common.CommandOpcode =
5543 DAC960_V1_WriteWithScatterGather;
5544 DAC960_P_To_PD_TranslateReadWriteCommand(CommandMailbox);
5545 break;
5546 default:
5547 break;
5548 }
5549 DAC960_V1_ProcessCompletedCommand(Command);
5550 }
5551 /*
5552 Attempt to remove additional I/O Requests from the Controller's
5553 I/O Request Queue and queue them to the Controller.
5554 */
5555 DAC960_ProcessRequest(Controller);
5556 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5557 return IRQ_HANDLED;
5558}
5559
5560
5561/*
5562 DAC960_V1_QueueMonitoringCommand queues a Monitoring Command to DAC960 V1
5563 Firmware Controllers.
5564*/
5565
5566static void DAC960_V1_QueueMonitoringCommand(DAC960_Command_T *Command)
5567{
5568 DAC960_Controller_T *Controller = Command->Controller;
5569 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5570 DAC960_V1_ClearCommand(Command);
5571 Command->CommandType = DAC960_MonitoringCommand;
5572 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Enquiry;
5573 CommandMailbox->Type3.BusAddress = Controller->V1.NewEnquiryDMA;
5574 DAC960_QueueCommand(Command);
5575}
5576
5577
5578/*
5579 DAC960_V2_QueueMonitoringCommand queues a Monitoring Command to DAC960 V2
5580 Firmware Controllers.
5581*/
5582
5583static void DAC960_V2_QueueMonitoringCommand(DAC960_Command_T *Command)
5584{
5585 DAC960_Controller_T *Controller = Command->Controller;
5586 DAC960_V2_CommandMailbox_T *CommandMailbox = &Command->V2.CommandMailbox;
5587 DAC960_V2_ClearCommand(Command);
5588 Command->CommandType = DAC960_MonitoringCommand;
5589 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
5590 CommandMailbox->ControllerInfo.CommandControlBits
5591 .DataTransferControllerToHost = true;
5592 CommandMailbox->ControllerInfo.CommandControlBits
5593 .NoAutoRequestSense = true;
5594 CommandMailbox->ControllerInfo.DataTransferSize =
5595 sizeof(DAC960_V2_ControllerInfo_T);
5596 CommandMailbox->ControllerInfo.ControllerNumber = 0;
5597 CommandMailbox->ControllerInfo.IOCTL_Opcode = DAC960_V2_GetControllerInfo;
5598 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5599 .ScatterGatherSegments[0]
5600 .SegmentDataPointer =
5601 Controller->V2.NewControllerInformationDMA;
5602 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
5603 .ScatterGatherSegments[0]
5604 .SegmentByteCount =
5605 CommandMailbox->ControllerInfo.DataTransferSize;
5606 DAC960_QueueCommand(Command);
5607}
5608
5609
5610/*
5611 DAC960_MonitoringTimerFunction is the timer function for monitoring
5612 the status of DAC960 Controllers.
5613*/
5614
e99e88a9 5615static void DAC960_MonitoringTimerFunction(struct timer_list *t)
1da177e4 5616{
e99e88a9 5617 DAC960_Controller_T *Controller = from_timer(Controller, t, MonitoringTimer);
1da177e4
LT		 5618 DAC960_Command_T *Command;
5619 unsigned long flags;
5620
5621 if (Controller->FirmwareType == DAC960_V1_Controller)
5622 {
5623 spin_lock_irqsave(&Controller->queue_lock, flags);
5624 /*
5625 Queue a Status Monitoring Command to Controller.
5626 */
5627 Command = DAC960_AllocateCommand(Controller);
5628 if (Command != NULL)
5629 DAC960_V1_QueueMonitoringCommand(Command);
5630 else Controller->MonitoringCommandDeferred = true;
5631 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5632 }
5633 else
5634 {
5635 DAC960_V2_ControllerInfo_T *ControllerInfo =
5636 &Controller->V2.ControllerInformation;
5637 unsigned int StatusChangeCounter =
5638 Controller->V2.HealthStatusBuffer->StatusChangeCounter;
87d156bf 5639 bool ForceMonitoringCommand = false;
50297cbf
MFP		 5640 if (time_after(jiffies, Controller->SecondaryMonitoringTime
5641 + DAC960_SecondaryMonitoringInterval))
1da177e4
LT		 5642 {
5643 int LogicalDriveNumber;
5644 for (LogicalDriveNumber = 0;
5645 LogicalDriveNumber < DAC960_MaxLogicalDrives;
5646 LogicalDriveNumber++)
5647 {
5648 DAC960_V2_LogicalDeviceInfo_T *LogicalDeviceInfo =
5649 Controller->V2.LogicalDeviceInformation[LogicalDriveNumber];
5650 if (LogicalDeviceInfo == NULL) continue;
5651 if (!LogicalDeviceInfo->LogicalDeviceControl
5652 .LogicalDeviceInitialized)
5653 {
5654 ForceMonitoringCommand = true;
5655 break;
5656 }
5657 }
5658 Controller->SecondaryMonitoringTime = jiffies;
5659 }
5660 if (StatusChangeCounter == Controller->V2.StatusChangeCounter &&
5661 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
5662 == Controller->V2.NextEventSequenceNumber &&
5663 (ControllerInfo->BackgroundInitializationsActive +
5664 ControllerInfo->LogicalDeviceInitializationsActive +
5665 ControllerInfo->PhysicalDeviceInitializationsActive +
5666 ControllerInfo->ConsistencyChecksActive +
5667 ControllerInfo->RebuildsActive +
5668 ControllerInfo->OnlineExpansionsActive == 0 ||
50297cbf
MFP		 5669 time_before(jiffies, Controller->PrimaryMonitoringTime
5670 + DAC960_MonitoringTimerInterval)) &&
1da177e4
LT		 5671 !ForceMonitoringCommand)
5672 {
5673 Controller->MonitoringTimer.expires =
5674 jiffies + DAC960_HealthStatusMonitoringInterval;
5675 add_timer(&Controller->MonitoringTimer);
5676 return;
5677 }
5678 Controller->V2.StatusChangeCounter = StatusChangeCounter;
5679 Controller->PrimaryMonitoringTime = jiffies;
5680
5681 spin_lock_irqsave(&Controller->queue_lock, flags);
5682 /*
5683 Queue a Status Monitoring Command to Controller.
5684 */
5685 Command = DAC960_AllocateCommand(Controller);
5686 if (Command != NULL)
5687 DAC960_V2_QueueMonitoringCommand(Command);
5688 else Controller->MonitoringCommandDeferred = true;
5689 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5690 /*
5691 Wake up any processes waiting on a Health Status Buffer change.
5692 */
5693 wake_up(&Controller->HealthStatusWaitQueue);
5694 }
5695}
5696
5697/*
5698 DAC960_CheckStatusBuffer verifies that there is room to hold ByteCount
5699 additional bytes in the Combined Status Buffer and grows the buffer if
5700 necessary. It returns true if there is enough room and false otherwise.
5701*/
5702
87d156bf 5703static bool DAC960_CheckStatusBuffer(DAC960_Controller_T *Controller,
1da177e4
LT		 5704 unsigned int ByteCount)
5705{
5706 unsigned char *NewStatusBuffer;
5707 if (Controller->InitialStatusLength + 1 +
5708 Controller->CurrentStatusLength + ByteCount + 1 <=
5709 Controller->CombinedStatusBufferLength)
5710 return true;
5711 if (Controller->CombinedStatusBufferLength == 0)
5712 {
5713 unsigned int NewStatusBufferLength = DAC960_InitialStatusBufferSize;
5714 while (NewStatusBufferLength < ByteCount)
5715 NewStatusBufferLength *= 2;
0a361e31
AD		 5716 Controller->CombinedStatusBuffer = kmalloc(NewStatusBufferLength,
5717 GFP_ATOMIC);
1da177e4
LT		 5718 if (Controller->CombinedStatusBuffer == NULL) return false;
5719 Controller->CombinedStatusBufferLength = NewStatusBufferLength;
5720 return true;
5721 }
6da2ec56
KC		 5722 NewStatusBuffer = kmalloc_array(2, Controller->CombinedStatusBufferLength,
5723 GFP_ATOMIC);
1da177e4
LT		 5724 if (NewStatusBuffer == NULL)
5725 {
5726 DAC960_Warning("Unable to expand Combined Status Buffer - Truncating\n",
5727 Controller);
5728 return false;
5729 }
5730 memcpy(NewStatusBuffer, Controller->CombinedStatusBuffer,
5731 Controller->CombinedStatusBufferLength);
5732 kfree(Controller->CombinedStatusBuffer);
5733 Controller->CombinedStatusBuffer = NewStatusBuffer;
5734 Controller->CombinedStatusBufferLength *= 2;
5735 Controller->CurrentStatusBuffer =
5736 &NewStatusBuffer[Controller->InitialStatusLength + 1];
5737 return true;
5738}
5739
5740
5741/*
5742 DAC960_Message prints Driver Messages.
5743*/
5744
5745static void DAC960_Message(DAC960_MessageLevel_T MessageLevel,
5746 unsigned char *Format,
5747 DAC960_Controller_T *Controller,
5748 ...)
5749{
5750 static unsigned char Buffer[DAC960_LineBufferSize];
87d156bf 5751 static bool BeginningOfLine = true;
1da177e4
LT		 5752 va_list Arguments;
5753 int Length = 0;
5754 va_start(Arguments, Controller);
5755 Length = vsprintf(Buffer, Format, Arguments);
5756 va_end(Arguments);
5757 if (Controller == NULL)
5758 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5759 DAC960_ControllerCount, Buffer);
5760 else if (MessageLevel == DAC960_AnnounceLevel ||
5761 MessageLevel == DAC960_InfoLevel)
5762 {
5763 if (!Controller->ControllerInitialized)
5764 {
5765 if (DAC960_CheckStatusBuffer(Controller, Length))
5766 {
5767 strcpy(&Controller->CombinedStatusBuffer
5768 [Controller->InitialStatusLength],
5769 Buffer);
5770 Controller->InitialStatusLength += Length;
5771 Controller->CurrentStatusBuffer =
5772 &Controller->CombinedStatusBuffer
5773 [Controller->InitialStatusLength + 1];
5774 }
5775 if (MessageLevel == DAC960_AnnounceLevel)
5776 {
5777 static int AnnouncementLines = 0;
5778 if (++AnnouncementLines <= 2)
5779 printk("%sDAC960: %s", DAC960_MessageLevelMap[MessageLevel],
5780 Buffer);
5781 }
5782 else
5783 {
5784 if (BeginningOfLine)
5785 {
5786 if (Buffer[0] != '\n' || Length > 1)
5787 printk("%sDAC960#%d: %s",
5788 DAC960_MessageLevelMap[MessageLevel],
5789 Controller->ControllerNumber, Buffer);
5790 }
5791 else printk("%s", Buffer);
5792 }
5793 }
5794 else if (DAC960_CheckStatusBuffer(Controller, Length))
5795 {
5796 strcpy(&Controller->CurrentStatusBuffer[
5797 Controller->CurrentStatusLength], Buffer);
5798 Controller->CurrentStatusLength += Length;
5799 }
5800 }
5801 else if (MessageLevel == DAC960_ProgressLevel)
5802 {
5803 strcpy(Controller->ProgressBuffer, Buffer);
5804 Controller->ProgressBufferLength = Length;
5805 if (Controller->EphemeralProgressMessage)
5806 {
50297cbf
MFP		 5807 if (time_after_eq(jiffies, Controller->LastProgressReportTime
5808 + DAC960_ProgressReportingInterval))
1da177e4
LT		 5809 {
5810 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5811 Controller->ControllerNumber, Buffer);
5812 Controller->LastProgressReportTime = jiffies;
5813 }
5814 }
5815 else printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5816 Controller->ControllerNumber, Buffer);
5817 }
5818 else if (MessageLevel == DAC960_UserCriticalLevel)
5819 {
5820 strcpy(&Controller->UserStatusBuffer[Controller->UserStatusLength],
5821 Buffer);
5822 Controller->UserStatusLength += Length;
5823 if (Buffer[0] != '\n' || Length > 1)
5824 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5825 Controller->ControllerNumber, Buffer);
5826 }
5827 else
5828 {
5829 if (BeginningOfLine)
5830 printk("%sDAC960#%d: %s", DAC960_MessageLevelMap[MessageLevel],
5831 Controller->ControllerNumber, Buffer);
5832 else printk("%s", Buffer);
5833 }
5834 BeginningOfLine = (Buffer[Length-1] == '\n');
5835}
5836
5837
5838/*
5839 DAC960_ParsePhysicalDevice parses spaces followed by a Physical Device
5840 Channel:TargetID specification from a User Command string. It updates
5841 Channel and TargetID and returns true on success and false on failure.
5842*/
5843
87d156bf 5844static bool DAC960_ParsePhysicalDevice(DAC960_Controller_T *Controller,
1da177e4
LT		 5845 char *UserCommandString,
5846 unsigned char *Channel,
5847 unsigned char *TargetID)
5848{
5849 char *NewUserCommandString = UserCommandString;
5850 unsigned long XChannel, XTargetID;
5851 while (*UserCommandString == ' ') UserCommandString++;
5852 if (UserCommandString == NewUserCommandString)
5853 return false;
5854 XChannel = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5855 if (NewUserCommandString == UserCommandString ||
5856 *NewUserCommandString != ':' ||
5857 XChannel >= Controller->Channels)
5858 return false;
5859 UserCommandString = ++NewUserCommandString;
5860 XTargetID = simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5861 if (NewUserCommandString == UserCommandString ||
5862 *NewUserCommandString != '\0' ||
5863 XTargetID >= Controller->Targets)
5864 return false;
5865 *Channel = XChannel;
5866 *TargetID = XTargetID;
5867 return true;
5868}
5869
5870
5871/*
5872 DAC960_ParseLogicalDrive parses spaces followed by a Logical Drive Number
5873 specification from a User Command string. It updates LogicalDriveNumber and
5874 returns true on success and false on failure.
5875*/
5876
87d156bf 5877static bool DAC960_ParseLogicalDrive(DAC960_Controller_T *Controller,
1da177e4
LT		 5878 char *UserCommandString,
5879 unsigned char *LogicalDriveNumber)
5880{
5881 char *NewUserCommandString = UserCommandString;
5882 unsigned long XLogicalDriveNumber;
5883 while (*UserCommandString == ' ') UserCommandString++;
5884 if (UserCommandString == NewUserCommandString)
5885 return false;
5886 XLogicalDriveNumber =
5887 simple_strtoul(UserCommandString, &NewUserCommandString, 10);
5888 if (NewUserCommandString == UserCommandString ||
5889 *NewUserCommandString != '\0' ||
5890 XLogicalDriveNumber > DAC960_MaxLogicalDrives - 1)
5891 return false;
5892 *LogicalDriveNumber = XLogicalDriveNumber;
5893 return true;
5894}
5895
5896
5897/*
5898 DAC960_V1_SetDeviceState sets the Device State for a Physical Device for
5899 DAC960 V1 Firmware Controllers.
5900*/
5901
5902static void DAC960_V1_SetDeviceState(DAC960_Controller_T *Controller,
5903 DAC960_Command_T *Command,
5904 unsigned char Channel,
5905 unsigned char TargetID,
5906 DAC960_V1_PhysicalDeviceState_T
5907 DeviceState,
5908 const unsigned char *DeviceStateString)
5909{
5910 DAC960_V1_CommandMailbox_T *CommandMailbox = &Command->V1.CommandMailbox;
5911 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_StartDevice;
5912 CommandMailbox->Type3D.Channel = Channel;
5913 CommandMailbox->Type3D.TargetID = TargetID;
5914 CommandMailbox->Type3D.DeviceState = DeviceState;
5915 CommandMailbox->Type3D.Modifier = 0;
5916 DAC960_ExecuteCommand(Command);
5917 switch (Command->V1.CommandStatus)
5918 {
5919 case DAC960_V1_NormalCompletion:
5920 DAC960_UserCritical("%s of Physical Device %d:%d Succeeded\n", Controller,
5921 DeviceStateString, Channel, TargetID);
5922 break;
5923 case DAC960_V1_UnableToStartDevice:
5924 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5925 "Unable to Start Device\n", Controller,
5926 DeviceStateString, Channel, TargetID);
5927 break;
5928 case DAC960_V1_NoDeviceAtAddress:
5929 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5930 "No Device at Address\n", Controller,
5931 DeviceStateString, Channel, TargetID);
5932 break;
5933 case DAC960_V1_InvalidChannelOrTargetOrModifier:
5934 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5935 "Invalid Channel or Target or Modifier\n",
5936 Controller, DeviceStateString, Channel, TargetID);
5937 break;
5938 case DAC960_V1_ChannelBusy:
5939 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5940 "Channel Busy\n", Controller,
5941 DeviceStateString, Channel, TargetID);
5942 break;
5943 default:
5944 DAC960_UserCritical("%s of Physical Device %d:%d Failed - "
5945 "Unexpected Status %04X\n", Controller,
5946 DeviceStateString, Channel, TargetID,
5947 Command->V1.CommandStatus);
5948 break;
5949 }
5950}
5951
5952
5953/*
5954 DAC960_V1_ExecuteUserCommand executes a User Command for DAC960 V1 Firmware
5955 Controllers.
5956*/
5957
87d156bf 5958static bool DAC960_V1_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 5959 unsigned char *UserCommand)
5960{
5961 DAC960_Command_T *Command;
5962 DAC960_V1_CommandMailbox_T *CommandMailbox;
5963 unsigned long flags;
5964 unsigned char Channel, TargetID, LogicalDriveNumber;
5965
5966 spin_lock_irqsave(&Controller->queue_lock, flags);
5967 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
5968 DAC960_WaitForCommand(Controller);
5969 spin_unlock_irqrestore(&Controller->queue_lock, flags);
5970 Controller->UserStatusLength = 0;
5971 DAC960_V1_ClearCommand(Command);
5972 Command->CommandType = DAC960_ImmediateCommand;
5973 CommandMailbox = &Command->V1.CommandMailbox;
5974 if (strcmp(UserCommand, "flush-cache") == 0)
5975 {
5976 CommandMailbox->Type3.CommandOpcode = DAC960_V1_Flush;
5977 DAC960_ExecuteCommand(Command);
5978 DAC960_UserCritical("Cache Flush Completed\n", Controller);
5979 }
5980 else if (strncmp(UserCommand, "kill", 4) == 0 &&
5981 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
5982 &Channel, &TargetID))
5983 {
5984 DAC960_V1_DeviceState_T *DeviceState =
5985 &Controller->V1.DeviceState[Channel][TargetID];
5986 if (DeviceState->Present &&
5987 DeviceState->DeviceType == DAC960_V1_DiskType &&
5988 DeviceState->DeviceState != DAC960_V1_Device_Dead)
5989 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
5990 DAC960_V1_Device_Dead, "Kill");
5991 else DAC960_UserCritical("Kill of Physical Device %d:%d Illegal\n",
5992 Controller, Channel, TargetID);
5993 }
5994 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
5995 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
5996 &Channel, &TargetID))
5997 {
5998 DAC960_V1_DeviceState_T *DeviceState =
5999 &Controller->V1.DeviceState[Channel][TargetID];
6000 if (DeviceState->Present &&
6001 DeviceState->DeviceType == DAC960_V1_DiskType &&
6002 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6003 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6004 DAC960_V1_Device_Online, "Make Online");
6005 else DAC960_UserCritical("Make Online of Physical Device %d:%d Illegal\n",
6006 Controller, Channel, TargetID);
6007
6008 }
6009 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6010 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6011 &Channel, &TargetID))
6012 {
6013 DAC960_V1_DeviceState_T *DeviceState =
6014 &Controller->V1.DeviceState[Channel][TargetID];
6015 if (DeviceState->Present &&
6016 DeviceState->DeviceType == DAC960_V1_DiskType &&
6017 DeviceState->DeviceState == DAC960_V1_Device_Dead)
6018 DAC960_V1_SetDeviceState(Controller, Command, Channel, TargetID,
6019 DAC960_V1_Device_Standby, "Make Standby");
6020 else DAC960_UserCritical("Make Standby of Physical "
6021 "Device %d:%d Illegal\n",
6022 Controller, Channel, TargetID);
6023 }
6024 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6025 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6026 &Channel, &TargetID))
6027 {
6028 CommandMailbox->Type3D.CommandOpcode = DAC960_V1_RebuildAsync;
6029 CommandMailbox->Type3D.Channel = Channel;
6030 CommandMailbox->Type3D.TargetID = TargetID;
6031 DAC960_ExecuteCommand(Command);
6032 switch (Command->V1.CommandStatus)
6033 {
6034 case DAC960_V1_NormalCompletion:
6035 DAC960_UserCritical("Rebuild of Physical Device %d:%d Initiated\n",
6036 Controller, Channel, TargetID);
6037 break;
6038 case DAC960_V1_AttemptToRebuildOnlineDrive:
6039 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6040 "Attempt to Rebuild Online or "
6041 "Unresponsive Drive\n",
6042 Controller, Channel, TargetID);
6043 break;
6044 case DAC960_V1_NewDiskFailedDuringRebuild:
6045 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6046 "New Disk Failed During Rebuild\n",
6047 Controller, Channel, TargetID);
6048 break;
6049 case DAC960_V1_InvalidDeviceAddress:
6050 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6051 "Invalid Device Address\n",
6052 Controller, Channel, TargetID);
6053 break;
6054 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6055 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6056 "Rebuild or Consistency Check Already "
6057 "in Progress\n", Controller, Channel, TargetID);
6058 break;
6059 default:
6060 DAC960_UserCritical("Rebuild of Physical Device %d:%d Failed - "
6061 "Unexpected Status %04X\n", Controller,
6062 Channel, TargetID, Command->V1.CommandStatus);
6063 break;
6064 }
6065 }
6066 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6067 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6068 &LogicalDriveNumber))
6069 {
6070 CommandMailbox->Type3C.CommandOpcode = DAC960_V1_CheckConsistencyAsync;
6071 CommandMailbox->Type3C.LogicalDriveNumber = LogicalDriveNumber;
6072 CommandMailbox->Type3C.AutoRestore = true;
6073 DAC960_ExecuteCommand(Command);
6074 switch (Command->V1.CommandStatus)
6075 {
6076 case DAC960_V1_NormalCompletion:
6077 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6078 "(/dev/rd/c%dd%d) Initiated\n",
6079 Controller, LogicalDriveNumber,
6080 Controller->ControllerNumber,
6081 LogicalDriveNumber);
6082 break;
6083 case DAC960_V1_DependentDiskIsDead:
6084 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6085 "(/dev/rd/c%dd%d) Failed - "
6086 "Dependent Physical Device is DEAD\n",
6087 Controller, LogicalDriveNumber,
6088 Controller->ControllerNumber,
6089 LogicalDriveNumber);
6090 break;
6091 case DAC960_V1_InvalidOrNonredundantLogicalDrive:
6092 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6093 "(/dev/rd/c%dd%d) Failed - "
6094 "Invalid or Nonredundant Logical Drive\n",
6095 Controller, LogicalDriveNumber,
6096 Controller->ControllerNumber,
6097 LogicalDriveNumber);
6098 break;
6099 case DAC960_V1_RebuildOrCheckAlreadyInProgress:
6100 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6101 "(/dev/rd/c%dd%d) Failed - Rebuild or "
6102 "Consistency Check Already in Progress\n",
6103 Controller, LogicalDriveNumber,
6104 Controller->ControllerNumber,
6105 LogicalDriveNumber);
6106 break;
6107 default:
6108 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6109 "(/dev/rd/c%dd%d) Failed - "
6110 "Unexpected Status %04X\n",
6111 Controller, LogicalDriveNumber,
6112 Controller->ControllerNumber,
6113 LogicalDriveNumber, Command->V1.CommandStatus);
6114 break;
6115 }
6116 }
6117 else if (strcmp(UserCommand, "cancel-rebuild") == 0 ||
6118 strcmp(UserCommand, "cancel-consistency-check") == 0)
6119 {
6120 /*
6121 the OldRebuildRateConstant is never actually used
6122 once its value is retrieved from the controller.
6123 */
6124 unsigned char *OldRebuildRateConstant;
6125 dma_addr_t OldRebuildRateConstantDMA;
6126
6127 OldRebuildRateConstant = pci_alloc_consistent( Controller->PCIDevice,
6128 sizeof(char), &OldRebuildRateConstantDMA);
6129 if (OldRebuildRateConstant == NULL) {
6130 DAC960_UserCritical("Cancellation of Rebuild or "
6131 "Consistency Check Failed - "
6132 "Out of Memory",
6133 Controller);
6134 goto failure;
6135 }
6136 CommandMailbox->Type3R.CommandOpcode = DAC960_V1_RebuildControl;
6137 CommandMailbox->Type3R.RebuildRateConstant = 0xFF;
6138 CommandMailbox->Type3R.BusAddress = OldRebuildRateConstantDMA;
6139 DAC960_ExecuteCommand(Command);
6140 switch (Command->V1.CommandStatus)
6141 {
6142 case DAC960_V1_NormalCompletion:
6143 DAC960_UserCritical("Rebuild or Consistency Check Cancelled\n",
6144 Controller);
6145 break;
6146 default:
6147 DAC960_UserCritical("Cancellation of Rebuild or "
6148 "Consistency Check Failed - "
6149 "Unexpected Status %04X\n",
6150 Controller, Command->V1.CommandStatus);
6151 break;
6152 }
6153failure:
6154 pci_free_consistent(Controller->PCIDevice, sizeof(char),
6155 OldRebuildRateConstant, OldRebuildRateConstantDMA);
6156 }
6157 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6158 Controller, UserCommand);
6159
6160 spin_lock_irqsave(&Controller->queue_lock, flags);
6161 DAC960_DeallocateCommand(Command);
6162 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6163 return true;
6164}
6165
6166
6167/*
6168 DAC960_V2_TranslatePhysicalDevice translates a Physical Device Channel and
6169 TargetID into a Logical Device. It returns true on success and false
6170 on failure.
6171*/
6172
87d156bf 6173static bool DAC960_V2_TranslatePhysicalDevice(DAC960_Command_T *Command,
1da177e4
LT		 6174 unsigned char Channel,
6175 unsigned char TargetID,
6176 unsigned short
6177 *LogicalDeviceNumber)
6178{
6179 DAC960_V2_CommandMailbox_T SavedCommandMailbox, *CommandMailbox;
6180 DAC960_Controller_T *Controller = Command->Controller;
6181
6182 CommandMailbox = &Command->V2.CommandMailbox;
6183 memcpy(&SavedCommandMailbox, CommandMailbox,
6184 sizeof(DAC960_V2_CommandMailbox_T));
6185
6186 CommandMailbox->PhysicalDeviceInfo.CommandOpcode = DAC960_V2_IOCTL;
6187 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6188 .DataTransferControllerToHost = true;
6189 CommandMailbox->PhysicalDeviceInfo.CommandControlBits
6190 .NoAutoRequestSense = true;
6191 CommandMailbox->PhysicalDeviceInfo.DataTransferSize =
6192 sizeof(DAC960_V2_PhysicalToLogicalDevice_T);
6193 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.TargetID = TargetID;
6194 CommandMailbox->PhysicalDeviceInfo.PhysicalDevice.Channel = Channel;
6195 CommandMailbox->PhysicalDeviceInfo.IOCTL_Opcode =
6196 DAC960_V2_TranslatePhysicalToLogicalDevice;
6197 CommandMailbox->Common.DataTransferMemoryAddress
6198 .ScatterGatherSegments[0]
6199 .SegmentDataPointer =
6200 Controller->V2.PhysicalToLogicalDeviceDMA;
6201 CommandMailbox->Common.DataTransferMemoryAddress
6202 .ScatterGatherSegments[0]
6203 .SegmentByteCount =
6204 CommandMailbox->Common.DataTransferSize;
6205
6206 DAC960_ExecuteCommand(Command);
6207 *LogicalDeviceNumber = Controller->V2.PhysicalToLogicalDevice->LogicalDeviceNumber;
6208
6209 memcpy(CommandMailbox, &SavedCommandMailbox,
6210 sizeof(DAC960_V2_CommandMailbox_T));
6211 return (Command->V2.CommandStatus == DAC960_V2_NormalCompletion);
6212}
6213
6214
6215/*
6216 DAC960_V2_ExecuteUserCommand executes a User Command for DAC960 V2 Firmware
6217 Controllers.
6218*/
6219
87d156bf 6220static bool DAC960_V2_ExecuteUserCommand(DAC960_Controller_T *Controller,
1da177e4
LT		 6221 unsigned char *UserCommand)
6222{
6223 DAC960_Command_T *Command;
6224 DAC960_V2_CommandMailbox_T *CommandMailbox;
6225 unsigned long flags;
6226 unsigned char Channel, TargetID, LogicalDriveNumber;
6227 unsigned short LogicalDeviceNumber;
6228
6229 spin_lock_irqsave(&Controller->queue_lock, flags);
6230 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6231 DAC960_WaitForCommand(Controller);
6232 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6233 Controller->UserStatusLength = 0;
6234 DAC960_V2_ClearCommand(Command);
6235 Command->CommandType = DAC960_ImmediateCommand;
6236 CommandMailbox = &Command->V2.CommandMailbox;
6237 CommandMailbox->Common.CommandOpcode = DAC960_V2_IOCTL;
6238 CommandMailbox->Common.CommandControlBits.DataTransferControllerToHost = true;
6239 CommandMailbox->Common.CommandControlBits.NoAutoRequestSense = true;
6240 if (strcmp(UserCommand, "flush-cache") == 0)
6241 {
6242 CommandMailbox->DeviceOperation.IOCTL_Opcode = DAC960_V2_PauseDevice;
6243 CommandMailbox->DeviceOperation.OperationDevice =
6244 DAC960_V2_RAID_Controller;
6245 DAC960_ExecuteCommand(Command);
6246 DAC960_UserCritical("Cache Flush Completed\n", Controller);
6247 }
6248 else if (strncmp(UserCommand, "kill", 4) == 0 &&
6249 DAC960_ParsePhysicalDevice(Controller, &UserCommand[4],
6250 &Channel, &TargetID) &&
6251 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6252 &LogicalDeviceNumber))
6253 {
6254 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6255 LogicalDeviceNumber;
6256 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6257 DAC960_V2_SetDeviceState;
6258 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6259 DAC960_V2_Device_Dead;
6260 DAC960_ExecuteCommand(Command);
6261 DAC960_UserCritical("Kill of Physical Device %d:%d %s\n",
6262 Controller, Channel, TargetID,
6263 (Command->V2.CommandStatus
6264 == DAC960_V2_NormalCompletion
6265 ? "Succeeded" : "Failed"));
6266 }
6267 else if (strncmp(UserCommand, "make-online", 11) == 0 &&
6268 DAC960_ParsePhysicalDevice(Controller, &UserCommand[11],
6269 &Channel, &TargetID) &&
6270 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6271 &LogicalDeviceNumber))
6272 {
6273 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6274 LogicalDeviceNumber;
6275 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6276 DAC960_V2_SetDeviceState;
6277 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6278 DAC960_V2_Device_Online;
6279 DAC960_ExecuteCommand(Command);
6280 DAC960_UserCritical("Make Online of Physical Device %d:%d %s\n",
6281 Controller, Channel, TargetID,
6282 (Command->V2.CommandStatus
6283 == DAC960_V2_NormalCompletion
6284 ? "Succeeded" : "Failed"));
6285 }
6286 else if (strncmp(UserCommand, "make-standby", 12) == 0 &&
6287 DAC960_ParsePhysicalDevice(Controller, &UserCommand[12],
6288 &Channel, &TargetID) &&
6289 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6290 &LogicalDeviceNumber))
6291 {
6292 CommandMailbox->SetDeviceState.LogicalDevice.LogicalDeviceNumber =
6293 LogicalDeviceNumber;
6294 CommandMailbox->SetDeviceState.IOCTL_Opcode =
6295 DAC960_V2_SetDeviceState;
6296 CommandMailbox->SetDeviceState.DeviceState.PhysicalDeviceState =
6297 DAC960_V2_Device_Standby;
6298 DAC960_ExecuteCommand(Command);
6299 DAC960_UserCritical("Make Standby of Physical Device %d:%d %s\n",
6300 Controller, Channel, TargetID,
6301 (Command->V2.CommandStatus
6302 == DAC960_V2_NormalCompletion
6303 ? "Succeeded" : "Failed"));
6304 }
6305 else if (strncmp(UserCommand, "rebuild", 7) == 0 &&
6306 DAC960_ParsePhysicalDevice(Controller, &UserCommand[7],
6307 &Channel, &TargetID) &&
6308 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6309 &LogicalDeviceNumber))
6310 {
6311 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6312 LogicalDeviceNumber;
6313 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6314 DAC960_V2_RebuildDeviceStart;
6315 DAC960_ExecuteCommand(Command);
6316 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6317 Controller, Channel, TargetID,
6318 (Command->V2.CommandStatus
6319 == DAC960_V2_NormalCompletion
6320 ? "Initiated" : "Not Initiated"));
6321 }
6322 else if (strncmp(UserCommand, "cancel-rebuild", 14) == 0 &&
6323 DAC960_ParsePhysicalDevice(Controller, &UserCommand[14],
6324 &Channel, &TargetID) &&
6325 DAC960_V2_TranslatePhysicalDevice(Command, Channel, TargetID,
6326 &LogicalDeviceNumber))
6327 {
6328 CommandMailbox->LogicalDeviceInfo.LogicalDevice.LogicalDeviceNumber =
6329 LogicalDeviceNumber;
6330 CommandMailbox->LogicalDeviceInfo.IOCTL_Opcode =
6331 DAC960_V2_RebuildDeviceStop;
6332 DAC960_ExecuteCommand(Command);
6333 DAC960_UserCritical("Rebuild of Physical Device %d:%d %s\n",
6334 Controller, Channel, TargetID,
6335 (Command->V2.CommandStatus
6336 == DAC960_V2_NormalCompletion
6337 ? "Cancelled" : "Not Cancelled"));
6338 }
6339 else if (strncmp(UserCommand, "check-consistency", 17) == 0 &&
6340 DAC960_ParseLogicalDrive(Controller, &UserCommand[17],
6341 &LogicalDriveNumber))
6342 {
6343 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6344 LogicalDriveNumber;
6345 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6346 DAC960_V2_ConsistencyCheckStart;
6347 CommandMailbox->ConsistencyCheck.RestoreConsistency = true;
6348 CommandMailbox->ConsistencyCheck.InitializedAreaOnly = false;
6349 DAC960_ExecuteCommand(Command);
6350 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6351 "(/dev/rd/c%dd%d) %s\n",
6352 Controller, LogicalDriveNumber,
6353 Controller->ControllerNumber,
6354 LogicalDriveNumber,
6355 (Command->V2.CommandStatus
6356 == DAC960_V2_NormalCompletion
6357 ? "Initiated" : "Not Initiated"));
6358 }
6359 else if (strncmp(UserCommand, "cancel-consistency-check", 24) == 0 &&
6360 DAC960_ParseLogicalDrive(Controller, &UserCommand[24],
6361 &LogicalDriveNumber))
6362 {
6363 CommandMailbox->ConsistencyCheck.LogicalDevice.LogicalDeviceNumber =
6364 LogicalDriveNumber;
6365 CommandMailbox->ConsistencyCheck.IOCTL_Opcode =
6366 DAC960_V2_ConsistencyCheckStop;
6367 DAC960_ExecuteCommand(Command);
6368 DAC960_UserCritical("Consistency Check of Logical Drive %d "
6369 "(/dev/rd/c%dd%d) %s\n",
6370 Controller, LogicalDriveNumber,
6371 Controller->ControllerNumber,
6372 LogicalDriveNumber,
6373 (Command->V2.CommandStatus
6374 == DAC960_V2_NormalCompletion
6375 ? "Cancelled" : "Not Cancelled"));
6376 }
6377 else if (strcmp(UserCommand, "perform-discovery") == 0)
6378 {
6379 CommandMailbox->Common.IOCTL_Opcode = DAC960_V2_StartDiscovery;
6380 DAC960_ExecuteCommand(Command);
6381 DAC960_UserCritical("Discovery %s\n", Controller,
6382 (Command->V2.CommandStatus
6383 == DAC960_V2_NormalCompletion
6384 ? "Initiated" : "Not Initiated"));
6385 if (Command->V2.CommandStatus == DAC960_V2_NormalCompletion)
6386 {
6387 CommandMailbox->ControllerInfo.CommandOpcode = DAC960_V2_IOCTL;
6388 CommandMailbox->ControllerInfo.CommandControlBits
6389 .DataTransferControllerToHost = true;
6390 CommandMailbox->ControllerInfo.CommandControlBits
6391 .NoAutoRequestSense = true;
6392 CommandMailbox->ControllerInfo.DataTransferSize =
6393 sizeof(DAC960_V2_ControllerInfo_T);
6394 CommandMailbox->ControllerInfo.ControllerNumber = 0;
6395 CommandMailbox->ControllerInfo.IOCTL_Opcode =
6396 DAC960_V2_GetControllerInfo;
6397 /*
6398 * How does this NOT race with the queued Monitoring
6399 * usage of this structure?
6400 */
6401 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6402 .ScatterGatherSegments[0]
6403 .SegmentDataPointer =
6404 Controller->V2.NewControllerInformationDMA;
6405 CommandMailbox->ControllerInfo.DataTransferMemoryAddress
6406 .ScatterGatherSegments[0]
6407 .SegmentByteCount =
6408 CommandMailbox->ControllerInfo.DataTransferSize;
9c552e1d
AB		 6409 while (1) {
6410 DAC960_ExecuteCommand(Command);
6411 if (!Controller->V2.NewControllerInformation->PhysicalScanActive)
6412 break;
6413 msleep(1000);
6414 }
1da177e4
LT		 6415 DAC960_UserCritical("Discovery Completed\n", Controller);
6416 }
6417 }
6418 else if (strcmp(UserCommand, "suppress-enclosure-messages") == 0)
6419 Controller->SuppressEnclosureMessages = true;
6420 else DAC960_UserCritical("Illegal User Command: '%s'\n",
6421 Controller, UserCommand);
6422
6423 spin_lock_irqsave(&Controller->queue_lock, flags);
6424 DAC960_DeallocateCommand(Command);
6425 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6426 return true;
6427}
6428
d5d03eec 6429static int dac960_proc_show(struct seq_file *m, void *v)
1da177e4
LT		 6430{
6431 unsigned char *StatusMessage = "OK\n";
d5d03eec 6432 int ControllerNumber;
1da177e4
LT		 6433 for (ControllerNumber = 0;
6434 ControllerNumber < DAC960_ControllerCount;
6435 ControllerNumber++)
6436 {
6437 DAC960_Controller_T *Controller = DAC960_Controllers[ControllerNumber];
6438 if (Controller == NULL) continue;
6439 if (Controller->MonitoringAlertMode)
6440 {
6441 StatusMessage = "ALERT\n";
6442 break;
6443 }
6444 }
d5d03eec
AD		 6445 seq_puts(m, StatusMessage);
6446 return 0;
1da177e4
LT		 6447}
6448
d5d03eec 6449static int dac960_initial_status_proc_show(struct seq_file *m, void *v)
1da177e4 6450{
d5d03eec
AD		 6451 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
6452 seq_printf(m, "%.*s", Controller->InitialStatusLength, Controller->CombinedStatusBuffer);
6453 return 0;
1da177e4
LT		 6454}
6455
d5d03eec 6456static int dac960_current_status_proc_show(struct seq_file *m, void *v)
1da177e4 6457{
d5d03eec 6458 DAC960_Controller_T *Controller = (DAC960_Controller_T *) m->private;
1da177e4
LT		 6459 unsigned char *StatusMessage =
6460 "No Rebuild or Consistency Check in Progress\n";
6461 int ProgressMessageLength = strlen(StatusMessage);
1da177e4
LT		 6462 if (jiffies != Controller->LastCurrentStatusTime)
6463 {
6464 Controller->CurrentStatusLength = 0;
6465 DAC960_AnnounceDriver(Controller);
6466 DAC960_ReportControllerConfiguration(Controller);
6467 DAC960_ReportDeviceConfiguration(Controller);
6468 if (Controller->ProgressBufferLength > 0)
6469 ProgressMessageLength = Controller->ProgressBufferLength;
6470 if (DAC960_CheckStatusBuffer(Controller, 2 + ProgressMessageLength))
6471 {
6472 unsigned char *CurrentStatusBuffer = Controller->CurrentStatusBuffer;
6473 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6474 CurrentStatusBuffer[Controller->CurrentStatusLength++] = ' ';
6475 if (Controller->ProgressBufferLength > 0)
6476 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6477 Controller->ProgressBuffer);
6478 else
6479 strcpy(&CurrentStatusBuffer[Controller->CurrentStatusLength],
6480 StatusMessage);
6481 Controller->CurrentStatusLength += ProgressMessageLength;
6482 }
6483 Controller->LastCurrentStatusTime = jiffies;
6484 }
d5d03eec
AD		 6485 seq_printf(m, "%.*s", Controller->CurrentStatusLength, Controller->CurrentStatusBuffer);
6486 return 0;
1da177e4
LT		 6487}
6488
d5d03eec 6489static int dac960_user_command_proc_show(struct seq_file *m, void *v)
1da177e4 6490{
d5d03eec 6491 DAC960_Controller_T *Controller = (DAC960_Controller_T *)m->private;
1da177e4 6492
d5d03eec
AD		 6493 seq_printf(m, "%.*s", Controller->UserStatusLength, Controller->UserStatusBuffer);
6494 return 0;
6495}
1da177e4 6496
d5d03eec
AD		 6497static int dac960_user_command_proc_open(struct inode *inode, struct file *file)
6498{
d9dda78b 6499 return single_open(file, dac960_user_command_proc_show, PDE_DATA(inode));
d5d03eec 6500}
1da177e4 6501
d5d03eec 6502static ssize_t dac960_user_command_proc_write(struct file *file,
1da177e4 6503 const char __user *Buffer,
d5d03eec 6504 size_t Count, loff_t *pos)
1da177e4 6505{
d9dda78b 6506 DAC960_Controller_T *Controller = PDE_DATA(file_inode(file));
1da177e4
LT		 6507 unsigned char CommandBuffer[80];
6508 int Length;
6509 if (Count > sizeof(CommandBuffer)-1) return -EINVAL;
6510 if (copy_from_user(CommandBuffer, Buffer, Count)) return -EFAULT;
6511 CommandBuffer[Count] = '\0';
6512 Length = strlen(CommandBuffer);
e8988933 6513 if (Length > 0 && CommandBuffer[Length-1] == '\n')
1da177e4
LT		 6514 CommandBuffer[--Length] = '\0';
6515 if (Controller->FirmwareType == DAC960_V1_Controller)
6516 return (DAC960_V1_ExecuteUserCommand(Controller, CommandBuffer)
6517 ? Count : -EBUSY);
6518 else
6519 return (DAC960_V2_ExecuteUserCommand(Controller, CommandBuffer)
6520 ? Count : -EBUSY);
6521}
6522
d5d03eec
AD		 6523static const struct file_operations dac960_user_command_proc_fops = {
6524 .owner = THIS_MODULE,
6525 .open = dac960_user_command_proc_open,
6526 .read = seq_read,
6527 .llseek = seq_lseek,
6528 .release = single_release,
6529 .write = dac960_user_command_proc_write,
6530};
1da177e4
LT		 6531
6532/*
6533 DAC960_CreateProcEntries creates the /proc/rd/... entries for the
6534 DAC960 Driver.
6535*/
6536
6537static void DAC960_CreateProcEntries(DAC960_Controller_T *Controller)
6538{
1da177e4 6539 struct proc_dir_entry *ControllerProcEntry;
1da177e4
LT		 6540
6541 if (DAC960_ProcDirectoryEntry == NULL) {
d88a440e 6542 DAC960_ProcDirectoryEntry = proc_mkdir("rd", NULL);
3f3942ac
CH		 6543 proc_create_single("status", 0, DAC960_ProcDirectoryEntry,
6544 dac960_proc_show);
1da177e4
LT		 6545 }
6546
33027c2b
AB		 6547 snprintf(Controller->ControllerName, sizeof(Controller->ControllerName),
6548 "c%d", Controller->ControllerNumber);
d88a440e
JJ		 6549 ControllerProcEntry = proc_mkdir(Controller->ControllerName,
6550 DAC960_ProcDirectoryEntry);
3f3942ac
CH		 6551 proc_create_single_data("initial_status", 0, ControllerProcEntry,
6552 dac960_initial_status_proc_show, Controller);
6553 proc_create_single_data("current_status", 0, ControllerProcEntry,
6554 dac960_current_status_proc_show, Controller);
5657a819 6555 proc_create_data("user_command", 0600, ControllerProcEntry, &dac960_user_command_proc_fops, Controller);
d88a440e 6556 Controller->ControllerProcEntry = ControllerProcEntry;
1da177e4
LT		 6557}
6558
6559
6560/*
6561 DAC960_DestroyProcEntries destroys the /proc/rd/... entries for the
6562 DAC960 Driver.
6563*/
6564
6565static void DAC960_DestroyProcEntries(DAC960_Controller_T *Controller)
6566{
6567 if (Controller->ControllerProcEntry == NULL)
6568 return;
6569 remove_proc_entry("initial_status", Controller->ControllerProcEntry);
6570 remove_proc_entry("current_status", Controller->ControllerProcEntry);
6571 remove_proc_entry("user_command", Controller->ControllerProcEntry);
6572 remove_proc_entry(Controller->ControllerName, DAC960_ProcDirectoryEntry);
6573 Controller->ControllerProcEntry = NULL;
6574}
6575
6576#ifdef DAC960_GAM_MINOR
6577
91f7b74a 6578static long DAC960_gam_get_controller_info(DAC960_ControllerInfo_T __user *UserSpaceControllerInfo)
1da177e4 6579{
1da177e4
LT		 6580 DAC960_ControllerInfo_T ControllerInfo;
6581 DAC960_Controller_T *Controller;
6582 int ControllerNumber;
91f7b74a
AB		 6583 long ErrorCode;
6584
2610324f
AC		 6585 if (UserSpaceControllerInfo == NULL)
6586 ErrorCode = -EINVAL;
6587 else ErrorCode = get_user(ControllerNumber,
1da177e4 6588 &UserSpaceControllerInfo->ControllerNumber);
2610324f 6589 if (ErrorCode != 0)
91f7b74a 6590 goto out;
2610324f 6591 ErrorCode = -ENXIO;
1da177e4 6592 if (ControllerNumber < 0 ||
2610324f 6593 ControllerNumber > DAC960_ControllerCount - 1) {
91f7b74a 6594 goto out;
2610324f 6595 }
1da177e4 6596 Controller = DAC960_Controllers[ControllerNumber];
2610324f 6597 if (Controller == NULL)
91f7b74a 6598 goto out;
1da177e4
LT		 6599 memset(&ControllerInfo, 0, sizeof(DAC960_ControllerInfo_T));
6600 ControllerInfo.ControllerNumber = ControllerNumber;
6601 ControllerInfo.FirmwareType = Controller->FirmwareType;
6602 ControllerInfo.Channels = Controller->Channels;
6603 ControllerInfo.Targets = Controller->Targets;
6604 ControllerInfo.PCI_Bus = Controller->Bus;
6605 ControllerInfo.PCI_Device = Controller->Device;
6606 ControllerInfo.PCI_Function = Controller->Function;
6607 ControllerInfo.IRQ_Channel = Controller->IRQ_Channel;
6608 ControllerInfo.PCI_Address = Controller->PCI_Address;
6609 strcpy(ControllerInfo.ModelName, Controller->ModelName);
6610 strcpy(ControllerInfo.FirmwareVersion, Controller->FirmwareVersion);
2610324f 6611 ErrorCode = (copy_to_user(UserSpaceControllerInfo, &ControllerInfo,
1da177e4 6612 sizeof(DAC960_ControllerInfo_T)) ? -EFAULT : 0);
91f7b74a
AB		 6613out:
6614 return ErrorCode;
6615}
6616
6617static long DAC960_gam_v1_execute_command(DAC960_V1_UserCommand_T __user *UserSpaceUserCommand)
6618{
1da177e4
LT		 6619 DAC960_V1_UserCommand_T UserCommand;
6620 DAC960_Controller_T *Controller;
6621 DAC960_Command_T *Command = NULL;
6622 DAC960_V1_CommandOpcode_T CommandOpcode;
6623 DAC960_V1_CommandStatus_T CommandStatus;
6624 DAC960_V1_DCDB_T DCDB;
6625 DAC960_V1_DCDB_T *DCDB_IOBUF = NULL;
6626 dma_addr_t DCDB_IOBUFDMA;
6627 unsigned long flags;
6628 int ControllerNumber, DataTransferLength;
6629 unsigned char *DataTransferBuffer = NULL;
6630 dma_addr_t DataTransferBufferDMA;
91f7b74a
AB		 6631 long ErrorCode;
6632
2610324f
AC		 6633 if (UserSpaceUserCommand == NULL) {
6634 ErrorCode = -EINVAL;
91f7b74a 6635 goto out;
2610324f 6636 }
1da177e4
LT		 6637 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6638 sizeof(DAC960_V1_UserCommand_T))) {
6639 ErrorCode = -EFAULT;
91f7b74a 6640 goto out;
1da177e4
LT		 6641 }
6642 ControllerNumber = UserCommand.ControllerNumber;
2610324f 6643 ErrorCode = -ENXIO;
1da177e4
LT		 6644 if (ControllerNumber < 0 ||
6645 ControllerNumber > DAC960_ControllerCount - 1)
91f7b74a 6646 goto out;
1da177e4 6647 Controller = DAC960_Controllers[ControllerNumber];
2610324f 6648 if (Controller == NULL)
91f7b74a 6649 goto out;
2610324f
AC		 6650 ErrorCode = -EINVAL;
6651 if (Controller->FirmwareType != DAC960_V1_Controller)
91f7b74a 6652 goto out;
1da177e4
LT		 6653 CommandOpcode = UserCommand.CommandMailbox.Common.CommandOpcode;
6654 DataTransferLength = UserCommand.DataTransferLength;
2610324f 6655 if (CommandOpcode & 0x80)
91f7b74a 6656 goto out;
1da177e4
LT		 6657 if (CommandOpcode == DAC960_V1_DCDB)
6658 {
6659 if (copy_from_user(&DCDB, UserCommand.DCDB,
6660 sizeof(DAC960_V1_DCDB_T))) {
6661 ErrorCode = -EFAULT;
91f7b74a 6662 goto out;
1da177e4 6663 }
2610324f 6664 if (DCDB.Channel >= DAC960_V1_MaxChannels)
91f7b74a 6665 goto out;
1da177e4
LT		 6666 if (!((DataTransferLength == 0 &&
6667 DCDB.Direction
6668 == DAC960_V1_DCDB_NoDataTransfer) ||
6669 (DataTransferLength > 0 &&
6670 DCDB.Direction
6671 == DAC960_V1_DCDB_DataTransferDeviceToSystem) ||
6672 (DataTransferLength < 0 &&
6673 DCDB.Direction
6674 == DAC960_V1_DCDB_DataTransferSystemToDevice)))
91f7b74a 6675 goto out;
1da177e4
LT		 6676 if (((DCDB.TransferLengthHigh4 << 16) | DCDB.TransferLength)
6677 != abs(DataTransferLength))
91f7b74a 6678 goto out;
1da177e4
LT		 6679 DCDB_IOBUF = pci_alloc_consistent(Controller->PCIDevice,
6680 sizeof(DAC960_V1_DCDB_T), &DCDB_IOBUFDMA);
2610324f
AC		 6681 if (DCDB_IOBUF == NULL) {
6682 ErrorCode = -ENOMEM;
91f7b74a 6683 goto out;
2610324f 6684 }
1da177e4 6685 }
2610324f 6686 ErrorCode = -ENOMEM;
1da177e4
LT		 6687 if (DataTransferLength > 0)
6688 {
a5bbf616
JP		 6689 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6690 DataTransferLength,
6691 &DataTransferBufferDMA);
2610324f 6692 if (DataTransferBuffer == NULL)
91f7b74a 6693 goto out;
1da177e4
LT		 6694 }
6695 else if (DataTransferLength < 0)
6696 {
6697 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6698 -DataTransferLength, &DataTransferBufferDMA);
2610324f 6699 if (DataTransferBuffer == NULL)
91f7b74a 6700 goto out;
1da177e4
LT		 6701 if (copy_from_user(DataTransferBuffer,
6702 UserCommand.DataTransferBuffer,
6703 -DataTransferLength)) {
6704 ErrorCode = -EFAULT;
91f7b74a 6705 goto out;
1da177e4
LT		 6706 }
6707 }
6708 if (CommandOpcode == DAC960_V1_DCDB)
6709 {
6710 spin_lock_irqsave(&Controller->queue_lock, flags);
6711 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6712 DAC960_WaitForCommand(Controller);
6713 while (Controller->V1.DirectCommandActive[DCDB.Channel]
6714 [DCDB.TargetID])
6715 {
6716 spin_unlock_irq(&Controller->queue_lock);
6717 __wait_event(Controller->CommandWaitQueue,
6718 !Controller->V1.DirectCommandActive
6719 [DCDB.Channel][DCDB.TargetID]);
6720 spin_lock_irq(&Controller->queue_lock);
6721 }
6722 Controller->V1.DirectCommandActive[DCDB.Channel]
6723 [DCDB.TargetID] = true;
6724 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6725 DAC960_V1_ClearCommand(Command);
6726 Command->CommandType = DAC960_ImmediateCommand;
6727 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6728 sizeof(DAC960_V1_CommandMailbox_T));
6729 Command->V1.CommandMailbox.Type3.BusAddress = DCDB_IOBUFDMA;
6730 DCDB.BusAddress = DataTransferBufferDMA;
6731 memcpy(DCDB_IOBUF, &DCDB, sizeof(DAC960_V1_DCDB_T));
6732 }
6733 else
6734 {
6735 spin_lock_irqsave(&Controller->queue_lock, flags);
6736 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6737 DAC960_WaitForCommand(Controller);
6738 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6739 DAC960_V1_ClearCommand(Command);
6740 Command->CommandType = DAC960_ImmediateCommand;
6741 memcpy(&Command->V1.CommandMailbox, &UserCommand.CommandMailbox,
6742 sizeof(DAC960_V1_CommandMailbox_T));
6743 if (DataTransferBuffer != NULL)
6744 Command->V1.CommandMailbox.Type3.BusAddress =
6745 DataTransferBufferDMA;
6746 }
6747 DAC960_ExecuteCommand(Command);
6748 CommandStatus = Command->V1.CommandStatus;
6749 spin_lock_irqsave(&Controller->queue_lock, flags);
6750 DAC960_DeallocateCommand(Command);
6751 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6752 if (DataTransferLength > 0)
6753 {
6754 if (copy_to_user(UserCommand.DataTransferBuffer,
6755 DataTransferBuffer, DataTransferLength)) {
6756 ErrorCode = -EFAULT;
6757 goto Failure1;
6758 }
6759 }
6760 if (CommandOpcode == DAC960_V1_DCDB)
6761 {
6762 /*
6763 I don't believe Target or Channel in the DCDB_IOBUF
6764 should be any different from the contents of DCDB.
6765 */
6766 Controller->V1.DirectCommandActive[DCDB.Channel]
6767 [DCDB.TargetID] = false;
6768 if (copy_to_user(UserCommand.DCDB, DCDB_IOBUF,
6769 sizeof(DAC960_V1_DCDB_T))) {
6770 ErrorCode = -EFAULT;
6771 goto Failure1;
6772 }
6773 }
6774 ErrorCode = CommandStatus;
6775 Failure1:
6776 if (DataTransferBuffer != NULL)
6777 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6778 DataTransferBuffer, DataTransferBufferDMA);
6779 if (DCDB_IOBUF != NULL)
6780 pci_free_consistent(Controller->PCIDevice, sizeof(DAC960_V1_DCDB_T),
6781 DCDB_IOBUF, DCDB_IOBUFDMA);
91f7b74a
AB		 6782 out:
6783 return ErrorCode;
6784}
6785
6786static long DAC960_gam_v2_execute_command(DAC960_V2_UserCommand_T __user *UserSpaceUserCommand)
6787{
1da177e4
LT		 6788 DAC960_V2_UserCommand_T UserCommand;
6789 DAC960_Controller_T *Controller;
6790 DAC960_Command_T *Command = NULL;
6791 DAC960_V2_CommandMailbox_T *CommandMailbox;
6792 DAC960_V2_CommandStatus_T CommandStatus;
6793 unsigned long flags;
6794 int ControllerNumber, DataTransferLength;
6795 int DataTransferResidue, RequestSenseLength;
6796 unsigned char *DataTransferBuffer = NULL;
6797 dma_addr_t DataTransferBufferDMA;
6798 unsigned char *RequestSenseBuffer = NULL;
6799 dma_addr_t RequestSenseBufferDMA;
91f7b74a 6800 long ErrorCode = -EINVAL;
2610324f 6801
2610324f 6802 if (UserSpaceUserCommand == NULL)
91f7b74a 6803 goto out;
1da177e4
LT		 6804 if (copy_from_user(&UserCommand, UserSpaceUserCommand,
6805 sizeof(DAC960_V2_UserCommand_T))) {
6806 ErrorCode = -EFAULT;
91f7b74a 6807 goto out;
1da177e4 6808 }
2610324f 6809 ErrorCode = -ENXIO;
1da177e4
LT		 6810 ControllerNumber = UserCommand.ControllerNumber;
6811 if (ControllerNumber < 0 ||
6812 ControllerNumber > DAC960_ControllerCount - 1)
91f7b74a 6813 goto out;
1da177e4 6814 Controller = DAC960_Controllers[ControllerNumber];
2610324f 6815 if (Controller == NULL)
91f7b74a 6816 goto out;
2610324f
AC		 6817 if (Controller->FirmwareType != DAC960_V2_Controller){
6818 ErrorCode = -EINVAL;
91f7b74a 6819 goto out;
2610324f 6820 }
1da177e4 6821 DataTransferLength = UserCommand.DataTransferLength;
2610324f 6822 ErrorCode = -ENOMEM;
1da177e4
LT		 6823 if (DataTransferLength > 0)
6824 {
a5bbf616
JP		 6825 DataTransferBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6826 DataTransferLength,
6827 &DataTransferBufferDMA);
2610324f 6828 if (DataTransferBuffer == NULL)
91f7b74a 6829 goto out;
1da177e4
LT		 6830 }
6831 else if (DataTransferLength < 0)
6832 {
6833 DataTransferBuffer = pci_alloc_consistent(Controller->PCIDevice,
6834 -DataTransferLength, &DataTransferBufferDMA);
2610324f 6835 if (DataTransferBuffer == NULL)
91f7b74a 6836 goto out;
1da177e4
LT		 6837 if (copy_from_user(DataTransferBuffer,
6838 UserCommand.DataTransferBuffer,
6839 -DataTransferLength)) {
6840 ErrorCode = -EFAULT;
6841 goto Failure2;
6842 }
6843 }
6844 RequestSenseLength = UserCommand.RequestSenseLength;
6845 if (RequestSenseLength > 0)
6846 {
a5bbf616
JP		 6847 RequestSenseBuffer = pci_zalloc_consistent(Controller->PCIDevice,
6848 RequestSenseLength,
6849 &RequestSenseBufferDMA);
1da177e4
LT		 6850 if (RequestSenseBuffer == NULL)
6851 {
6852 ErrorCode = -ENOMEM;
6853 goto Failure2;
6854 }
1da177e4
LT		 6855 }
6856 spin_lock_irqsave(&Controller->queue_lock, flags);
6857 while ((Command = DAC960_AllocateCommand(Controller)) == NULL)
6858 DAC960_WaitForCommand(Controller);
6859 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6860 DAC960_V2_ClearCommand(Command);
6861 Command->CommandType = DAC960_ImmediateCommand;
6862 CommandMailbox = &Command->V2.CommandMailbox;
6863 memcpy(CommandMailbox, &UserCommand.CommandMailbox,
6864 sizeof(DAC960_V2_CommandMailbox_T));
6865 CommandMailbox->Common.CommandControlBits
6866 .AdditionalScatterGatherListMemory = false;
6867 CommandMailbox->Common.CommandControlBits
6868 .NoAutoRequestSense = true;
6869 CommandMailbox->Common.DataTransferSize = 0;
6870 CommandMailbox->Common.DataTransferPageNumber = 0;
6871 memset(&CommandMailbox->Common.DataTransferMemoryAddress, 0,
6872 sizeof(DAC960_V2_DataTransferMemoryAddress_T));
6873 if (DataTransferLength != 0)
6874 {
6875 if (DataTransferLength > 0)
6876 {
6877 CommandMailbox->Common.CommandControlBits
6878 .DataTransferControllerToHost = true;
6879 CommandMailbox->Common.DataTransferSize = DataTransferLength;
6880 }
6881 else
6882 {
6883 CommandMailbox->Common.CommandControlBits
6884 .DataTransferControllerToHost = false;
6885 CommandMailbox->Common.DataTransferSize = -DataTransferLength;
6886 }
6887 CommandMailbox->Common.DataTransferMemoryAddress
6888 .ScatterGatherSegments[0]
6889 .SegmentDataPointer = DataTransferBufferDMA;
6890 CommandMailbox->Common.DataTransferMemoryAddress
6891 .ScatterGatherSegments[0]
6892 .SegmentByteCount =
6893 CommandMailbox->Common.DataTransferSize;
6894 }
6895 if (RequestSenseLength > 0)
6896 {
6897 CommandMailbox->Common.CommandControlBits
6898 .NoAutoRequestSense = false;
6899 CommandMailbox->Common.RequestSenseSize = RequestSenseLength;
6900 CommandMailbox->Common.RequestSenseBusAddress =
6901 RequestSenseBufferDMA;
6902 }
6903 DAC960_ExecuteCommand(Command);
6904 CommandStatus = Command->V2.CommandStatus;
6905 RequestSenseLength = Command->V2.RequestSenseLength;
6906 DataTransferResidue = Command->V2.DataTransferResidue;
6907 spin_lock_irqsave(&Controller->queue_lock, flags);
6908 DAC960_DeallocateCommand(Command);
6909 spin_unlock_irqrestore(&Controller->queue_lock, flags);
6910 if (RequestSenseLength > UserCommand.RequestSenseLength)
6911 RequestSenseLength = UserCommand.RequestSenseLength;
6912 if (copy_to_user(&UserSpaceUserCommand->DataTransferLength,
6913 &DataTransferResidue,
6914 sizeof(DataTransferResidue))) {
6915 ErrorCode = -EFAULT;
6916 goto Failure2;
6917 }
6918 if (copy_to_user(&UserSpaceUserCommand->RequestSenseLength,
6919 &RequestSenseLength, sizeof(RequestSenseLength))) {
6920 ErrorCode = -EFAULT;
6921 goto Failure2;
6922 }
6923 if (DataTransferLength > 0)
6924 {
6925 if (copy_to_user(UserCommand.DataTransferBuffer,
6926 DataTransferBuffer, DataTransferLength)) {
6927 ErrorCode = -EFAULT;
6928 goto Failure2;
6929 }
6930 }
6931 if (RequestSenseLength > 0)
6932 {
6933 if (copy_to_user(UserCommand.RequestSenseBuffer,
6934 RequestSenseBuffer, RequestSenseLength)) {
6935 ErrorCode = -EFAULT;
6936 goto Failure2;
6937 }
6938 }
6939 ErrorCode = CommandStatus;
6940 Failure2:
6941 pci_free_consistent(Controller->PCIDevice, abs(DataTransferLength),
6942 DataTransferBuffer, DataTransferBufferDMA);
6943 if (RequestSenseBuffer != NULL)
6944 pci_free_consistent(Controller->PCIDevice, RequestSenseLength,
6945 RequestSenseBuffer, RequestSenseBufferDMA);
91f7b74a
AB		 6946out:
6947 return ErrorCode;
6948}
6949
6950static long DAC960_gam_v2_get_health_status(DAC960_V2_GetHealthStatus_T __user *UserSpaceGetHealthStatus)
6951{
1da177e4
LT		 6952 DAC960_V2_GetHealthStatus_T GetHealthStatus;
6953 DAC960_V2_HealthStatusBuffer_T HealthStatusBuffer;
6954 DAC960_Controller_T *Controller;
6955 int ControllerNumber;
91f7b74a
AB		 6956 long ErrorCode;
6957
2610324f
AC		 6958 if (UserSpaceGetHealthStatus == NULL) {
6959 ErrorCode = -EINVAL;
91f7b74a 6960 goto out;
2610324f 6961 }
1da177e4 6962 if (copy_from_user(&GetHealthStatus, UserSpaceGetHealthStatus,
2610324f
AC		 6963 sizeof(DAC960_V2_GetHealthStatus_T))) {
6964 ErrorCode = -EFAULT;
91f7b74a 6965 goto out;
2610324f
AC		 6966 }
6967 ErrorCode = -ENXIO;
1da177e4
LT		 6968 ControllerNumber = GetHealthStatus.ControllerNumber;
6969 if (ControllerNumber < 0 ||
6970 ControllerNumber > DAC960_ControllerCount - 1)
91f7b74a 6971 goto out;
1da177e4 6972 Controller = DAC960_Controllers[ControllerNumber];
2610324f 6973 if (Controller == NULL)
91f7b74a 6974 goto out;
2610324f
AC		 6975 if (Controller->FirmwareType != DAC960_V2_Controller) {
6976 ErrorCode = -EINVAL;
91f7b74a 6977 goto out;
2610324f 6978 }
1da177e4
LT		 6979 if (copy_from_user(&HealthStatusBuffer,
6980 GetHealthStatus.HealthStatusBuffer,
2610324f
AC		 6981 sizeof(DAC960_V2_HealthStatusBuffer_T))) {
6982 ErrorCode = -EFAULT;
91f7b74a 6983 goto out;
2610324f 6984 }
9c552e1d
AB		 6985 ErrorCode = wait_event_interruptible_timeout(Controller->HealthStatusWaitQueue,
6986 !(Controller->V2.HealthStatusBuffer->StatusChangeCounter
6987 == HealthStatusBuffer.StatusChangeCounter &&
6988 Controller->V2.HealthStatusBuffer->NextEventSequenceNumber
6989 == HealthStatusBuffer.NextEventSequenceNumber),
6990 DAC960_MonitoringTimerInterval);
6991 if (ErrorCode == -ERESTARTSYS) {
6992 ErrorCode = -EINTR;
91f7b74a 6993 goto out;
9c552e1d 6994 }
1da177e4
LT		 6995 if (copy_to_user(GetHealthStatus.HealthStatusBuffer,
6996 Controller->V2.HealthStatusBuffer,
6997 sizeof(DAC960_V2_HealthStatusBuffer_T)))
2610324f
AC		 6998 ErrorCode = -EFAULT;
6999 else
7000 ErrorCode = 0;
91f7b74a
AB		 7001
7002out:
7003 return ErrorCode;
7004}
7005
7006/*
7007 * DAC960_gam_ioctl is the ioctl function for performing RAID operations.
7008*/
7009
7010static long DAC960_gam_ioctl(struct file *file, unsigned int Request,
7011 unsigned long Argument)
7012{
7013 long ErrorCode = 0;
7014 void __user *argp = (void __user *)Argument;
7015 if (!capable(CAP_SYS_ADMIN)) return -EACCES;
7016
7017 mutex_lock(&DAC960_mutex);
7018 switch (Request)
7019 {
7020 case DAC960_IOCTL_GET_CONTROLLER_COUNT:
7021 ErrorCode = DAC960_ControllerCount;
7022 break;
7023 case DAC960_IOCTL_GET_CONTROLLER_INFO:
7024 ErrorCode = DAC960_gam_get_controller_info(argp);
7025 break;
7026 case DAC960_IOCTL_V1_EXECUTE_COMMAND:
7027 ErrorCode = DAC960_gam_v1_execute_command(argp);
7028 break;
7029 case DAC960_IOCTL_V2_EXECUTE_COMMAND:
7030 ErrorCode = DAC960_gam_v2_execute_command(argp);
7031 break;
7032 case DAC960_IOCTL_V2_GET_HEALTH_STATUS:
7033 ErrorCode = DAC960_gam_v2_get_health_status(argp);
3d6a8743 7034 break;
2610324f
AC		 7035 default:
7036 ErrorCode = -ENOTTY;
1da177e4 7037 }
2a48fc0a 7038 mutex_unlock(&DAC960_mutex);
2610324f 7039 return ErrorCode;
1da177e4
LT		 7040}
7041
2b8693c0 7042static const struct file_operations DAC960_gam_fops = {
1da177e4 7043 .owner = THIS_MODULE,
6038f373
AB		 7044 .unlocked_ioctl = DAC960_gam_ioctl,
7045 .llseek = noop_llseek,
1da177e4
LT		 7046};
7047
7048static struct miscdevice DAC960_gam_dev = {
7049 DAC960_GAM_MINOR,
7050 "dac960_gam",
7051 &DAC960_gam_fops
7052};
7053
7054static int DAC960_gam_init(void)
7055{
7056 int ret;
7057
7058 ret = misc_register(&DAC960_gam_dev);
7059 if (ret)
7060 printk(KERN_ERR "DAC960_gam: can't misc_register on minor %d\n", DAC960_GAM_MINOR);
7061 return ret;
7062}
7063
7064static void DAC960_gam_cleanup(void)
7065{
7066 misc_deregister(&DAC960_gam_dev);
7067}
7068
7069#endif /* DAC960_GAM_MINOR */
7070
5b76ffd5
CH		 7071static struct DAC960_privdata DAC960_GEM_privdata = {
7072 .HardwareType = DAC960_GEM_Controller,
7073 .FirmwareType = DAC960_V2_Controller,
7074 .InterruptHandler = DAC960_GEM_InterruptHandler,
7075 .MemoryWindowSize = DAC960_GEM_RegisterWindowSize,
7076};
7077
7078
1da177e4
LT		 7079static struct DAC960_privdata DAC960_BA_privdata = {
7080 .HardwareType = DAC960_BA_Controller,
7081 .FirmwareType = DAC960_V2_Controller,
7082 .InterruptHandler = DAC960_BA_InterruptHandler,
7083 .MemoryWindowSize = DAC960_BA_RegisterWindowSize,
7084};
7085
7086static struct DAC960_privdata DAC960_LP_privdata = {
7087 .HardwareType = DAC960_LP_Controller,
df9dc83d 7088 .FirmwareType = DAC960_V2_Controller,
1da177e4
LT		 7089 .InterruptHandler = DAC960_LP_InterruptHandler,
7090 .MemoryWindowSize = DAC960_LP_RegisterWindowSize,
7091};
7092
7093static struct DAC960_privdata DAC960_LA_privdata = {
7094 .HardwareType = DAC960_LA_Controller,
7095 .FirmwareType = DAC960_V1_Controller,
7096 .InterruptHandler = DAC960_LA_InterruptHandler,
7097 .MemoryWindowSize = DAC960_LA_RegisterWindowSize,
7098};
7099
7100static struct DAC960_privdata DAC960_PG_privdata = {
7101 .HardwareType = DAC960_PG_Controller,
7102 .FirmwareType = DAC960_V1_Controller,
7103 .InterruptHandler = DAC960_PG_InterruptHandler,
7104 .MemoryWindowSize = DAC960_PG_RegisterWindowSize,
7105};
7106
7107static struct DAC960_privdata DAC960_PD_privdata = {
7108 .HardwareType = DAC960_PD_Controller,
7109 .FirmwareType = DAC960_V1_Controller,
7110 .InterruptHandler = DAC960_PD_InterruptHandler,
7111 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7112};
7113
7114static struct DAC960_privdata DAC960_P_privdata = {
7115 .HardwareType = DAC960_P_Controller,
7116 .FirmwareType = DAC960_V1_Controller,
7117 .InterruptHandler = DAC960_P_InterruptHandler,
7118 .MemoryWindowSize = DAC960_PD_RegisterWindowSize,
7119};
7120
3d447ec0 7121static const struct pci_device_id DAC960_id_table[] = {
5b76ffd5
CH		 7122 {
7123 .vendor = PCI_VENDOR_ID_MYLEX,
7124 .device = PCI_DEVICE_ID_MYLEX_DAC960_GEM,
fddafd3d 7125 .subvendor = PCI_VENDOR_ID_MYLEX,
5b76ffd5
CH		 7126 .subdevice = PCI_ANY_ID,
7127 .driver_data = (unsigned long) &DAC960_GEM_privdata,
7128 },
1da177e4
LT		 7129 {
7130 .vendor = PCI_VENDOR_ID_MYLEX,
7131 .device = PCI_DEVICE_ID_MYLEX_DAC960_BA,
7132 .subvendor = PCI_ANY_ID,
7133 .subdevice = PCI_ANY_ID,
7134 .driver_data = (unsigned long) &DAC960_BA_privdata,
7135 },
7136 {
7137 .vendor = PCI_VENDOR_ID_MYLEX,
7138 .device = PCI_DEVICE_ID_MYLEX_DAC960_LP,
7139 .subvendor = PCI_ANY_ID,
7140 .subdevice = PCI_ANY_ID,
7141 .driver_data = (unsigned long) &DAC960_LP_privdata,
7142 },
7143 {
7144 .vendor = PCI_VENDOR_ID_DEC,
7145 .device = PCI_DEVICE_ID_DEC_21285,
7146 .subvendor = PCI_VENDOR_ID_MYLEX,
7147 .subdevice = PCI_DEVICE_ID_MYLEX_DAC960_LA,
7148 .driver_data = (unsigned long) &DAC960_LA_privdata,
7149 },
7150 {
7151 .vendor = PCI_VENDOR_ID_MYLEX,
7152 .device = PCI_DEVICE_ID_MYLEX_DAC960_PG,
7153 .subvendor = PCI_ANY_ID,
7154 .subdevice = PCI_ANY_ID,
7155 .driver_data = (unsigned long) &DAC960_PG_privdata,
7156 },
7157 {
7158 .vendor = PCI_VENDOR_ID_MYLEX,
7159 .device = PCI_DEVICE_ID_MYLEX_DAC960_PD,
7160 .subvendor = PCI_ANY_ID,
7161 .subdevice = PCI_ANY_ID,
7162 .driver_data = (unsigned long) &DAC960_PD_privdata,
7163 },
7164 {
7165 .vendor = PCI_VENDOR_ID_MYLEX,
7166 .device = PCI_DEVICE_ID_MYLEX_DAC960_P,
7167 .subvendor = PCI_ANY_ID,
7168 .subdevice = PCI_ANY_ID,
7169 .driver_data = (unsigned long) &DAC960_P_privdata,
7170 },
7171 {0, },
7172};
7173
7174MODULE_DEVICE_TABLE(pci, DAC960_id_table);
7175
7176static struct pci_driver DAC960_pci_driver = {
7177 .name = "DAC960",
7178 .id_table = DAC960_id_table,
7179 .probe = DAC960_Probe,
7180 .remove = DAC960_Remove,
7181};
7182
3c36543a 7183static int __init DAC960_init_module(void)
1da177e4
LT		 7184{
7185 int ret;
7186
9bfab8ce 7187 ret = pci_register_driver(&DAC960_pci_driver);
1da177e4
LT		 7188#ifdef DAC960_GAM_MINOR
7189 if (!ret)
7190 DAC960_gam_init();
7191#endif
7192 return ret;
7193}
7194
3c36543a 7195static void __exit DAC960_cleanup_module(void)
1da177e4
LT		 7196{
7197 int i;
7198
7199#ifdef DAC960_GAM_MINOR
7200 DAC960_gam_cleanup();
7201#endif
7202
7203 for (i = 0; i < DAC960_ControllerCount; i++) {
7204 DAC960_Controller_T *Controller = DAC960_Controllers[i];
7205 if (Controller == NULL)
7206 continue;
7207 DAC960_FinalizeController(Controller);
7208 }
7209 if (DAC960_ProcDirectoryEntry != NULL) {
7210 remove_proc_entry("rd/status", NULL);
7211 remove_proc_entry("rd", NULL);
7212 }
7213 DAC960_ControllerCount = 0;
7214 pci_unregister_driver(&DAC960_pci_driver);
7215}
7216
7217module_init(DAC960_init_module);
7218module_exit(DAC960_cleanup_module);
7219
7220MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)