[linux-2.6-block.git] / drivers / bcma / host_pci.c

/*
 * Broadcom specific AMBA
 * PCI Host
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "bcma_private.h"
#include <linux/slab.h>
#include <linux/bcma/bcma.h>
#include <linux/pci.h>
#include <linux/module.h>

static void bcma_host_pci_switch_core(struct bcma_device *core)
{
	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN,
			       core->addr);
	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
			       core->wrap);
	core->bus->mapped_core = core;
	pr_debug("Switched to core: 0x%X\n", core->id.id);
}

/* Provides access to the requested core. Returns base offset that has to be
 * used. It makes use of fixed windows when possible. */
static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core)
{
	switch (core->id.id) {
	case BCMA_CORE_CHIPCOMMON:
		return 3 * BCMA_CORE_SIZE;
	case BCMA_CORE_PCIE:
		return 2 * BCMA_CORE_SIZE;
	}

	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	return 0;
}

static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	return ioread8(core->bus->mmio + offset);
}

static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	return ioread16(core->bus->mmio + offset);
}

static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	return ioread32(core->bus->mmio + offset);
}

static void bcma_host_pci_write8(struct bcma_device *core, u16 offset,
				 u8 value)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	iowrite8(value, core->bus->mmio + offset);
}

static void bcma_host_pci_write16(struct bcma_device *core, u16 offset,
				 u16 value)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	iowrite16(value, core->bus->mmio + offset);
}

static void bcma_host_pci_write32(struct bcma_device *core, u16 offset,
				 u32 value)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	iowrite32(value, core->bus->mmio + offset);
}

#ifdef CONFIG_BCMA_BLOCKIO
void bcma_host_pci_block_read(struct bcma_device *core, void *buffer,
			      size_t count, u16 offset, u8 reg_width)
{
	void __iomem *addr = core->bus->mmio + offset;
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	switch (reg_width) {
	case sizeof(u8):
		ioread8_rep(addr, buffer, count);
		break;
	case sizeof(u16):
		WARN_ON(count & 1);
		ioread16_rep(addr, buffer, count >> 1);
		break;
	case sizeof(u32):
		WARN_ON(count & 3);
		ioread32_rep(addr, buffer, count >> 2);
		break;
	default:
		WARN_ON(1);
	}
}

void bcma_host_pci_block_write(struct bcma_device *core, const void *buffer,
			       size_t count, u16 offset, u8 reg_width)
{
	void __iomem *addr = core->bus->mmio + offset;
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	switch (reg_width) {
	case sizeof(u8):
		iowrite8_rep(addr, buffer, count);
		break;
	case sizeof(u16):
		WARN_ON(count & 1);
		iowrite16_rep(addr, buffer, count >> 1);
		break;
	case sizeof(u32):
		WARN_ON(count & 3);
		iowrite32_rep(addr, buffer, count >> 2);
		break;
	default:
		WARN_ON(1);
	}
}
#endif

static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset)
{
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
}

static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset,
				  u32 value)
{
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
}

const struct bcma_host_ops bcma_host_pci_ops = {
	.read8		= bcma_host_pci_read8,
	.read16		= bcma_host_pci_read16,
	.read32		= bcma_host_pci_read32,
	.write8		= bcma_host_pci_write8,
	.write16	= bcma_host_pci_write16,
	.write32	= bcma_host_pci_write32,
#ifdef CONFIG_BCMA_BLOCKIO
	.block_read	= bcma_host_pci_block_read,
	.block_write	= bcma_host_pci_block_write,
#endif
	.aread32	= bcma_host_pci_aread32,
	.awrite32	= bcma_host_pci_awrite32,
};

static int bcma_host_pci_probe(struct pci_dev *dev,
			     const struct pci_device_id *id)
{
	struct bcma_bus *bus;
	int err = -ENOMEM;
	const char *name;
	u32 val;

	/* Alloc */
	bus = kzalloc(sizeof(*bus), GFP_KERNEL);
	if (!bus)
		goto out;

	/* Basic PCI configuration */
	err = pci_enable_device(dev);
	if (err)
		goto err_kfree_bus;

	name = dev_name(&dev->dev);
	if (dev->driver && dev->driver->name)
		name = dev->driver->name;
	err = pci_request_regions(dev, name);
	if (err)
		goto err_pci_disable;
	pci_set_master(dev);

	/* Disable the RETRY_TIMEOUT register (0x41) to keep
	 * PCI Tx retries from interfering with C3 CPU state */
	pci_read_config_dword(dev, 0x40, &val);
	if ((val & 0x0000ff00) != 0)
		pci_write_config_dword(dev, 0x40, val & 0xffff00ff);

	/* SSB needed additional powering up, do we have any AMBA PCI cards? */
	if (!pci_is_pcie(dev))
		pr_err("PCI card detected, report problems.\n");

	/* Map MMIO */
	err = -ENOMEM;
	bus->mmio = pci_iomap(dev, 0, ~0UL);
	if (!bus->mmio)
		goto err_pci_release_regions;

	/* Host specific */
	bus->host_pci = dev;
	bus->hosttype = BCMA_HOSTTYPE_PCI;
	bus->ops = &bcma_host_pci_ops;

	/* Register */
	err = bcma_bus_register(bus);
	if (err)
		goto err_pci_unmap_mmio;

	pci_set_drvdata(dev, bus);

out:
	return err;

err_pci_unmap_mmio:
	pci_iounmap(dev, bus->mmio);
err_pci_release_regions:
	pci_release_regions(dev);
err_pci_disable:
	pci_disable_device(dev);
err_kfree_bus:
	kfree(bus);
	return err;
}

static void bcma_host_pci_remove(struct pci_dev *dev)
{
	struct bcma_bus *bus = pci_get_drvdata(dev);

	bcma_bus_unregister(bus);
	pci_iounmap(dev, bus->mmio);
	pci_release_regions(dev);
	pci_disable_device(dev);
	kfree(bus);
	pci_set_drvdata(dev, NULL);
}

#ifdef CONFIG_PM
static int bcma_host_pci_suspend(struct pci_dev *dev, pm_message_t state)
{
	struct bcma_bus *bus = pci_get_drvdata(dev);

	/* Host specific */
	pci_save_state(dev);
	pci_disable_device(dev);
	pci_set_power_state(dev, pci_choose_state(dev, state));

	bus->mapped_core = NULL;
	return 0;
}

static int bcma_host_pci_resume(struct pci_dev *dev)
{
	struct bcma_bus *bus = pci_get_drvdata(dev);
	int err;

	/* Host specific */
	pci_set_power_state(dev, 0);
	err = pci_enable_device(dev);
	if (err)
		return err;
	pci_restore_state(dev);

	/* Bus specific */
	err = bcma_bus_resume(bus);
	if (err)
		return err;

	return 0;
}
#else /* CONFIG_PM */
# define bcma_host_pci_suspend	NULL
# define bcma_host_pci_resume	NULL
#endif /* CONFIG_PM */

static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);

static struct pci_driver bcma_pci_bridge_driver = {
	.name = "bcma-pci-bridge",
	.id_table = bcma_pci_bridge_tbl,
	.probe = bcma_host_pci_probe,
	.remove = bcma_host_pci_remove,
	.suspend = bcma_host_pci_suspend,
	.resume = bcma_host_pci_resume,
};

int __init bcma_host_pci_init(void)
{
	return pci_register_driver(&bcma_pci_bridge_driver);
}

void __exit bcma_host_pci_exit(void)
{
	pci_unregister_driver(&bcma_pci_bridge_driver);
}
Commit	Line	Data
8369ae33 RM	1	/*
	2	* Broadcom specific AMBA
	3	* PCI Host
	4	*
	5	* Licensed under the GNU/GPL. See COPYING for details.
	6	*/
	7
	8	#include "bcma_private.h"
ba7328b2	9	#include <linux/slab.h>
8369ae33 RM	10	#include <linux/bcma/bcma.h>
8369ae33 RM	11	#include <linux/pci.h>
200351c7	12	#include <linux/module.h>
8369ae33 RM	13
	14	static void bcma_host_pci_switch_core(struct bcma_device *core)
	15	{
	16	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN,
	17	core->addr);
	18	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
	19	core->wrap);
	20	core->bus->mapped_core = core;
	21	pr_debug("Switched to core: 0x%X\n", core->id.id);
	22	}
	23
439678f8 RM	24	/* Provides access to the requested core. Returns base offset that has to be
	25	* used. It makes use of fixed windows when possible. */
	26	static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core)
8369ae33	27	{
439678f8 RM	28	switch (core->id.id) {
	29	case BCMA_CORE_CHIPCOMMON:
	30	return 3 * BCMA_CORE_SIZE;
	31	case BCMA_CORE_PCIE:
	32	return 2 * BCMA_CORE_SIZE;
	33	}
	34
8369ae33 RM	35	if (core->bus->mapped_core != core)
8369ae33 RM	36	bcma_host_pci_switch_core(core);
439678f8 RM	37	return 0;
	38	}
	39
	40	static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset)
	41	{
	42	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	43	return ioread8(core->bus->mmio + offset);
	44	}
	45
	46	static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset)
	47	{
439678f8	48	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	49	return ioread16(core->bus->mmio + offset);
	50	}
	51
	52	static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset)
	53	{
439678f8	54	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	55	return ioread32(core->bus->mmio + offset);
	56	}
	57
	58	static void bcma_host_pci_write8(struct bcma_device *core, u16 offset,
	59	u8 value)
	60	{
439678f8	61	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	62	iowrite8(value, core->bus->mmio + offset);
	63	}
	64
	65	static void bcma_host_pci_write16(struct bcma_device *core, u16 offset,
	66	u16 value)
	67	{
439678f8	68	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	69	iowrite16(value, core->bus->mmio + offset);
	70	}
	71
	72	static void bcma_host_pci_write32(struct bcma_device *core, u16 offset,
	73	u32 value)
	74	{
439678f8	75	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	76	iowrite32(value, core->bus->mmio + offset);
	77	}
	78
9d75ef0f RM	79	#ifdef CONFIG_BCMA_BLOCKIO
	80	void bcma_host_pci_block_read(struct bcma_device core, void buffer,
	81	size_t count, u16 offset, u8 reg_width)
	82	{
	83	void __iomem *addr = core->bus->mmio + offset;
	84	if (core->bus->mapped_core != core)
	85	bcma_host_pci_switch_core(core);
	86	switch (reg_width) {
	87	case sizeof(u8):
	88	ioread8_rep(addr, buffer, count);
	89	break;
	90	case sizeof(u16):
	91	WARN_ON(count & 1);
	92	ioread16_rep(addr, buffer, count >> 1);
	93	break;
	94	case sizeof(u32):
	95	WARN_ON(count & 3);
	96	ioread32_rep(addr, buffer, count >> 2);
	97	break;
	98	default:
	99	WARN_ON(1);
	100	}
	101	}
	102
	103	void bcma_host_pci_block_write(struct bcma_device core, const void buffer,
	104	size_t count, u16 offset, u8 reg_width)
	105	{
	106	void __iomem *addr = core->bus->mmio + offset;
	107	if (core->bus->mapped_core != core)
	108	bcma_host_pci_switch_core(core);
	109	switch (reg_width) {
	110	case sizeof(u8):
	111	iowrite8_rep(addr, buffer, count);
	112	break;
	113	case sizeof(u16):
	114	WARN_ON(count & 1);
	115	iowrite16_rep(addr, buffer, count >> 1);
	116	break;
	117	case sizeof(u32):
	118	WARN_ON(count & 3);
	119	iowrite32_rep(addr, buffer, count >> 2);
	120	break;
	121	default:
	122	WARN_ON(1);
	123	}
	124	}
	125	#endif
	126
8369ae33 RM	127	static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset)
	128	{
	129	if (core->bus->mapped_core != core)
	130	bcma_host_pci_switch_core(core);
	131	return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
	132	}
	133
	134	static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset,
	135	u32 value)
	136	{
	137	if (core->bus->mapped_core != core)
	138	bcma_host_pci_switch_core(core);
	139	iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
	140	}
	141
	142	const struct bcma_host_ops bcma_host_pci_ops = {
	143	.read8 = bcma_host_pci_read8,
	144	.read16 = bcma_host_pci_read16,
	145	.read32 = bcma_host_pci_read32,
	146	.write8 = bcma_host_pci_write8,
	147	.write16 = bcma_host_pci_write16,
	148	.write32 = bcma_host_pci_write32,
9d75ef0f RM	149	#ifdef CONFIG_BCMA_BLOCKIO
	150	.block_read = bcma_host_pci_block_read,
	151	.block_write = bcma_host_pci_block_write,
	152	#endif
8369ae33 RM	153	.aread32 = bcma_host_pci_aread32,
	154	.awrite32 = bcma_host_pci_awrite32,
	155	};
	156
	157	static int bcma_host_pci_probe(struct pci_dev *dev,
	158	const struct pci_device_id *id)
	159	{
	160	struct bcma_bus *bus;
	161	int err = -ENOMEM;
	162	const char *name;
	163	u32 val;
	164
	165	/* Alloc */
	166	bus = kzalloc(sizeof(*bus), GFP_KERNEL);
	167	if (!bus)
	168	goto out;
	169
	170	/* Basic PCI configuration */
	171	err = pci_enable_device(dev);
	172	if (err)
	173	goto err_kfree_bus;
	174
	175	name = dev_name(&dev->dev);
	176	if (dev->driver && dev->driver->name)
	177	name = dev->driver->name;
	178	err = pci_request_regions(dev, name);
	179	if (err)
	180	goto err_pci_disable;
	181	pci_set_master(dev);
	182
	183	/* Disable the RETRY_TIMEOUT register (0x41) to keep
	184	* PCI Tx retries from interfering with C3 CPU state */
	185	pci_read_config_dword(dev, 0x40, &val);
	186	if ((val & 0x0000ff00) != 0)
	187	pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
	188
	189	/* SSB needed additional powering up, do we have any AMBA PCI cards? */
	190	if (!pci_is_pcie(dev))
	191	pr_err("PCI card detected, report problems.\n");
	192
	193	/* Map MMIO */
	194	err = -ENOMEM;
	195	bus->mmio = pci_iomap(dev, 0, ~0UL);
	196	if (!bus->mmio)
	197	goto err_pci_release_regions;
	198
	199	/* Host specific */
	200	bus->host_pci = dev;
	201	bus->hosttype = BCMA_HOSTTYPE_PCI;
	202	bus->ops = &bcma_host_pci_ops;
	203
	204	/* Register */
	205	err = bcma_bus_register(bus);
	206	if (err)
	207	goto err_pci_unmap_mmio;
	208
	209	pci_set_drvdata(dev, bus);
	210
	211	out:
	212	return err;
	213
	214	err_pci_unmap_mmio:
	215	pci_iounmap(dev, bus->mmio);
	216	err_pci_release_regions:
217	pci_release_regions(dev);
218	err_pci_disable:
219	pci_disable_device(dev);
220	err_kfree_bus:
221	kfree(bus);
222	return err;
223	}
224
225	static void bcma_host_pci_remove(struct pci_dev *dev)
226	{
227	struct bcma_bus *bus = pci_get_drvdata(dev);
228
229	bcma_bus_unregister(bus);
230	pci_iounmap(dev, bus->mmio);
231	pci_release_regions(dev);
232	pci_disable_device(dev);
233	kfree(bus);
234	pci_set_drvdata(dev, NULL);
235	}
236
775ab521 RM	237	#ifdef CONFIG_PM
	238	static int bcma_host_pci_suspend(struct pci_dev *dev, pm_message_t state)
	239	{
28e7d218 RM	240	struct bcma_bus *bus = pci_get_drvdata(dev);
28e7d218 RM	241
775ab521 RM	242	/* Host specific */
	243	pci_save_state(dev);
	244	pci_disable_device(dev);
	245	pci_set_power_state(dev, pci_choose_state(dev, state));
	246
28e7d218	247	bus->mapped_core = NULL;
775ab521 RM	248	return 0;
	249	}
	250
	251	static int bcma_host_pci_resume(struct pci_dev *dev)
	252	{
	253	struct bcma_bus *bus = pci_get_drvdata(dev);
	254	int err;
	255
	256	/* Host specific */
	257	pci_set_power_state(dev, 0);
	258	err = pci_enable_device(dev);
	259	if (err)
	260	return err;
	261	pci_restore_state(dev);
	262
	263	/* Bus specific */
	264	err = bcma_bus_resume(bus);
	265	if (err)
	266	return err;
	267
	268	return 0;
	269	}
	270	#else /* CONFIG_PM */
	271	# define bcma_host_pci_suspend NULL
	272	# define bcma_host_pci_resume NULL
	273	#endif /* CONFIG_PM */
	274
8369ae33	275	static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
9594b56d	276	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
8369ae33 RM	277	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
8369ae33 RM	278	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
91fa4b0a	279	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
8369ae33 RM	280	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
	281	{ 0, },
	282	};
	283	MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);
	284
	285	static struct pci_driver bcma_pci_bridge_driver = {
	286	.name = "bcma-pci-bridge",
	287	.id_table = bcma_pci_bridge_tbl,
	288	.probe = bcma_host_pci_probe,
	289	.remove = bcma_host_pci_remove,
775ab521 RM	290	.suspend = bcma_host_pci_suspend,
775ab521 RM	291	.resume = bcma_host_pci_resume,
8369ae33 RM	292	};
	293
	294	int __init bcma_host_pci_init(void)
	295	{
	296	return pci_register_driver(&bcma_pci_bridge_driver);
	297	}
	298
	299	void __exit bcma_host_pci_exit(void)
	300	{
	301	pci_unregister_driver(&bcma_pci_bridge_driver);
	302	}