[linux-2.6-block.git] / drivers / bcma / host_pci.c

/*
 * Broadcom specific AMBA
 * PCI Host
 *
 * Licensed under the GNU/GPL. See COPYING for details.
 */

#include "bcma_private.h"
#include <linux/slab.h>
#include <linux/bcma/bcma.h>
#include <linux/pci.h>
#include <linux/module.h>

static void bcma_host_pci_switch_core(struct bcma_device *core)
{
	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN,
			       core->addr);
	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
			       core->wrap);
	core->bus->mapped_core = core;
	bcma_debug(core->bus, "Switched to core: 0x%X\n", core->id.id);
}

/* Provides access to the requested core. Returns base offset that has to be
 * used. It makes use of fixed windows when possible. */
static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core)
{
	switch (core->id.id) {
	case BCMA_CORE_CHIPCOMMON:
		return 3 * BCMA_CORE_SIZE;
	case BCMA_CORE_PCIE:
		return 2 * BCMA_CORE_SIZE;
	}

	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	return 0;
}

static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	return ioread8(core->bus->mmio + offset);
}

static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	return ioread16(core->bus->mmio + offset);
}

static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	return ioread32(core->bus->mmio + offset);
}

static void bcma_host_pci_write8(struct bcma_device *core, u16 offset,
				 u8 value)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	iowrite8(value, core->bus->mmio + offset);
}

static void bcma_host_pci_write16(struct bcma_device *core, u16 offset,
				 u16 value)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	iowrite16(value, core->bus->mmio + offset);
}

static void bcma_host_pci_write32(struct bcma_device *core, u16 offset,
				 u32 value)
{
	offset += bcma_host_pci_provide_access_to_core(core);
	iowrite32(value, core->bus->mmio + offset);
}

#ifdef CONFIG_BCMA_BLOCKIO
static void bcma_host_pci_block_read(struct bcma_device *core, void *buffer,
				     size_t count, u16 offset, u8 reg_width)
{
	void __iomem *addr = core->bus->mmio + offset;
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	switch (reg_width) {
	case sizeof(u8):
		ioread8_rep(addr, buffer, count);
		break;
	case sizeof(u16):
		WARN_ON(count & 1);
		ioread16_rep(addr, buffer, count >> 1);
		break;
	case sizeof(u32):
		WARN_ON(count & 3);
		ioread32_rep(addr, buffer, count >> 2);
		break;
	default:
		WARN_ON(1);
	}
}

static void bcma_host_pci_block_write(struct bcma_device *core,
				      const void *buffer, size_t count,
				      u16 offset, u8 reg_width)
{
	void __iomem *addr = core->bus->mmio + offset;
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	switch (reg_width) {
	case sizeof(u8):
		iowrite8_rep(addr, buffer, count);
		break;
	case sizeof(u16):
		WARN_ON(count & 1);
		iowrite16_rep(addr, buffer, count >> 1);
		break;
	case sizeof(u32):
		WARN_ON(count & 3);
		iowrite32_rep(addr, buffer, count >> 2);
		break;
	default:
		WARN_ON(1);
	}
}
#endif

static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset)
{
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
}

static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset,
				  u32 value)
{
	if (core->bus->mapped_core != core)
		bcma_host_pci_switch_core(core);
	iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
}

static const struct bcma_host_ops bcma_host_pci_ops = {
	.read8		= bcma_host_pci_read8,
	.read16		= bcma_host_pci_read16,
	.read32		= bcma_host_pci_read32,
	.write8		= bcma_host_pci_write8,
	.write16	= bcma_host_pci_write16,
	.write32	= bcma_host_pci_write32,
#ifdef CONFIG_BCMA_BLOCKIO
	.block_read	= bcma_host_pci_block_read,
	.block_write	= bcma_host_pci_block_write,
#endif
	.aread32	= bcma_host_pci_aread32,
	.awrite32	= bcma_host_pci_awrite32,
};

static int bcma_host_pci_probe(struct pci_dev *dev,
			       const struct pci_device_id *id)
{
	struct bcma_bus *bus;
	int err = -ENOMEM;
	const char *name;
	u32 val;

	/* Alloc */
	bus = kzalloc(sizeof(*bus), GFP_KERNEL);
	if (!bus)
		goto out;

	/* Basic PCI configuration */
	err = pci_enable_device(dev);
	if (err)
		goto err_kfree_bus;

	name = dev_name(&dev->dev);
	if (dev->driver && dev->driver->name)
		name = dev->driver->name;
	err = pci_request_regions(dev, name);
	if (err)
		goto err_pci_disable;
	pci_set_master(dev);

	/* Disable the RETRY_TIMEOUT register (0x41) to keep
	 * PCI Tx retries from interfering with C3 CPU state */
	pci_read_config_dword(dev, 0x40, &val);
	if ((val & 0x0000ff00) != 0)
		pci_write_config_dword(dev, 0x40, val & 0xffff00ff);

	/* SSB needed additional powering up, do we have any AMBA PCI cards? */
	if (!pci_is_pcie(dev)) {
		bcma_err(bus, "PCI card detected, they are not supported.\n");
		err = -ENXIO;
		goto err_pci_release_regions;
	}

	/* Map MMIO */
	err = -ENOMEM;
	bus->mmio = pci_iomap(dev, 0, ~0UL);
	if (!bus->mmio)
		goto err_pci_release_regions;

	/* Host specific */
	bus->host_pci = dev;
	bus->hosttype = BCMA_HOSTTYPE_PCI;
	bus->ops = &bcma_host_pci_ops;

	bus->boardinfo.vendor = bus->host_pci->subsystem_vendor;
	bus->boardinfo.type = bus->host_pci->subsystem_device;

	/* Register */
	err = bcma_bus_register(bus);
	if (err)
		goto err_pci_unmap_mmio;

	pci_set_drvdata(dev, bus);

out:
	return err;

err_pci_unmap_mmio:
	pci_iounmap(dev, bus->mmio);
err_pci_release_regions:
	pci_release_regions(dev);
err_pci_disable:
	pci_disable_device(dev);
err_kfree_bus:
	kfree(bus);
	return err;
}

static void bcma_host_pci_remove(struct pci_dev *dev)
{
	struct bcma_bus *bus = pci_get_drvdata(dev);

	bcma_bus_unregister(bus);
	pci_iounmap(dev, bus->mmio);
	pci_release_regions(dev);
	pci_disable_device(dev);
	kfree(bus);
}

#ifdef CONFIG_PM_SLEEP
static int bcma_host_pci_suspend(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct bcma_bus *bus = pci_get_drvdata(pdev);

	bus->mapped_core = NULL;

	return bcma_bus_suspend(bus);
}

static int bcma_host_pci_resume(struct device *dev)
{
	struct pci_dev *pdev = to_pci_dev(dev);
	struct bcma_bus *bus = pci_get_drvdata(pdev);

	return bcma_bus_resume(bus);
}

static SIMPLE_DEV_PM_OPS(bcma_pm_ops, bcma_host_pci_suspend,
			 bcma_host_pci_resume);
#define BCMA_PM_OPS	(&bcma_pm_ops)

#else /* CONFIG_PM_SLEEP */

#define BCMA_PM_OPS     NULL

#endif /* CONFIG_PM_SLEEP */

static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4313) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43224) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4365) },
	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);

static struct pci_driver bcma_pci_bridge_driver = {
	.name = "bcma-pci-bridge",
	.id_table = bcma_pci_bridge_tbl,
	.probe = bcma_host_pci_probe,
	.remove = bcma_host_pci_remove,
	.driver.pm = BCMA_PM_OPS,
};

int __init bcma_host_pci_init(void)
{
	return pci_register_driver(&bcma_pci_bridge_driver);
}

void __exit bcma_host_pci_exit(void)
{
	pci_unregister_driver(&bcma_pci_bridge_driver);
}
Commit	Line	Data
8369ae33 RM	1	/*
	2	* Broadcom specific AMBA
	3	* PCI Host
	4	*
	5	* Licensed under the GNU/GPL. See COPYING for details.
	6	*/
	7
	8	#include "bcma_private.h"
ba7328b2	9	#include <linux/slab.h>
8369ae33 RM	10	#include <linux/bcma/bcma.h>
8369ae33 RM	11	#include <linux/pci.h>
200351c7	12	#include <linux/module.h>
8369ae33 RM	13
	14	static void bcma_host_pci_switch_core(struct bcma_device *core)
	15	{
	16	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN,
	17	core->addr);
	18	pci_write_config_dword(core->bus->host_pci, BCMA_PCI_BAR0_WIN2,
	19	core->wrap);
	20	core->bus->mapped_core = core;
3d9d8af3	21	bcma_debug(core->bus, "Switched to core: 0x%X\n", core->id.id);
8369ae33 RM	22	}
8369ae33 RM	23
439678f8 RM	24	/* Provides access to the requested core. Returns base offset that has to be
	25	* used. It makes use of fixed windows when possible. */
	26	static u16 bcma_host_pci_provide_access_to_core(struct bcma_device *core)
8369ae33	27	{
439678f8 RM	28	switch (core->id.id) {
	29	case BCMA_CORE_CHIPCOMMON:
	30	return 3 * BCMA_CORE_SIZE;
	31	case BCMA_CORE_PCIE:
	32	return 2 * BCMA_CORE_SIZE;
	33	}
	34
8369ae33 RM	35	if (core->bus->mapped_core != core)
8369ae33 RM	36	bcma_host_pci_switch_core(core);
439678f8 RM	37	return 0;
	38	}
	39
	40	static u8 bcma_host_pci_read8(struct bcma_device *core, u16 offset)
	41	{
	42	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	43	return ioread8(core->bus->mmio + offset);
	44	}
	45
	46	static u16 bcma_host_pci_read16(struct bcma_device *core, u16 offset)
	47	{
439678f8	48	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	49	return ioread16(core->bus->mmio + offset);
	50	}
	51
	52	static u32 bcma_host_pci_read32(struct bcma_device *core, u16 offset)
	53	{
439678f8	54	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	55	return ioread32(core->bus->mmio + offset);
	56	}
	57
	58	static void bcma_host_pci_write8(struct bcma_device *core, u16 offset,
	59	u8 value)
	60	{
439678f8	61	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	62	iowrite8(value, core->bus->mmio + offset);
	63	}
	64
	65	static void bcma_host_pci_write16(struct bcma_device *core, u16 offset,
	66	u16 value)
	67	{
439678f8	68	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	69	iowrite16(value, core->bus->mmio + offset);
	70	}
	71
	72	static void bcma_host_pci_write32(struct bcma_device *core, u16 offset,
	73	u32 value)
	74	{
439678f8	75	offset += bcma_host_pci_provide_access_to_core(core);
8369ae33 RM	76	iowrite32(value, core->bus->mmio + offset);
	77	}
	78
9d75ef0f	79	#ifdef CONFIG_BCMA_BLOCKIO
94f3457f HM	80	static void bcma_host_pci_block_read(struct bcma_device core, void buffer,
94f3457f HM	81	size_t count, u16 offset, u8 reg_width)
9d75ef0f RM	82	{
	83	void __iomem *addr = core->bus->mmio + offset;
	84	if (core->bus->mapped_core != core)
	85	bcma_host_pci_switch_core(core);
	86	switch (reg_width) {
	87	case sizeof(u8):
	88	ioread8_rep(addr, buffer, count);
	89	break;
	90	case sizeof(u16):
	91	WARN_ON(count & 1);
	92	ioread16_rep(addr, buffer, count >> 1);
	93	break;
	94	case sizeof(u32):
	95	WARN_ON(count & 3);
	96	ioread32_rep(addr, buffer, count >> 2);
	97	break;
	98	default:
	99	WARN_ON(1);
	100	}
	101	}
	102
94f3457f HM	103	static void bcma_host_pci_block_write(struct bcma_device *core,
	104	const void *buffer, size_t count,
	105	u16 offset, u8 reg_width)
9d75ef0f RM	106	{
	107	void __iomem *addr = core->bus->mmio + offset;
	108	if (core->bus->mapped_core != core)
	109	bcma_host_pci_switch_core(core);
	110	switch (reg_width) {
	111	case sizeof(u8):
	112	iowrite8_rep(addr, buffer, count);
	113	break;
	114	case sizeof(u16):
	115	WARN_ON(count & 1);
	116	iowrite16_rep(addr, buffer, count >> 1);
	117	break;
	118	case sizeof(u32):
	119	WARN_ON(count & 3);
	120	iowrite32_rep(addr, buffer, count >> 2);
	121	break;
	122	default:
	123	WARN_ON(1);
	124	}
	125	}
	126	#endif
	127
8369ae33 RM	128	static u32 bcma_host_pci_aread32(struct bcma_device *core, u16 offset)
	129	{
	130	if (core->bus->mapped_core != core)
	131	bcma_host_pci_switch_core(core);
	132	return ioread32(core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
	133	}
	134
	135	static void bcma_host_pci_awrite32(struct bcma_device *core, u16 offset,
	136	u32 value)
	137	{
	138	if (core->bus->mapped_core != core)
	139	bcma_host_pci_switch_core(core);
	140	iowrite32(value, core->bus->mmio + (1 * BCMA_CORE_SIZE) + offset);
	141	}
	142
94f3457f	143	static const struct bcma_host_ops bcma_host_pci_ops = {
8369ae33 RM	144	.read8 = bcma_host_pci_read8,
	145	.read16 = bcma_host_pci_read16,
	146	.read32 = bcma_host_pci_read32,
	147	.write8 = bcma_host_pci_write8,
	148	.write16 = bcma_host_pci_write16,
	149	.write32 = bcma_host_pci_write32,
9d75ef0f RM	150	#ifdef CONFIG_BCMA_BLOCKIO
	151	.block_read = bcma_host_pci_block_read,
	152	.block_write = bcma_host_pci_block_write,
	153	#endif
8369ae33 RM	154	.aread32 = bcma_host_pci_aread32,
	155	.awrite32 = bcma_host_pci_awrite32,
	156	};
	157
0f58a01d GKH	158	static int bcma_host_pci_probe(struct pci_dev *dev,
0f58a01d GKH	159	const struct pci_device_id *id)
8369ae33 RM	160	{
	161	struct bcma_bus *bus;
	162	int err = -ENOMEM;
	163	const char *name;
	164	u32 val;
	165
	166	/* Alloc */
	167	bus = kzalloc(sizeof(*bus), GFP_KERNEL);
	168	if (!bus)
	169	goto out;
	170
	171	/* Basic PCI configuration */
	172	err = pci_enable_device(dev);
	173	if (err)
	174	goto err_kfree_bus;
	175
	176	name = dev_name(&dev->dev);
	177	if (dev->driver && dev->driver->name)
	178	name = dev->driver->name;
	179	err = pci_request_regions(dev, name);
	180	if (err)
	181	goto err_pci_disable;
	182	pci_set_master(dev);
	183
	184	/* Disable the RETRY_TIMEOUT register (0x41) to keep
	185	* PCI Tx retries from interfering with C3 CPU state */
	186	pci_read_config_dword(dev, 0x40, &val);
	187	if ((val & 0x0000ff00) != 0)
	188	pci_write_config_dword(dev, 0x40, val & 0xffff00ff);
	189
	190	/* SSB needed additional powering up, do we have any AMBA PCI cards? */
dfa0415b HM	191	if (!pci_is_pcie(dev)) {
	192	bcma_err(bus, "PCI card detected, they are not supported.\n");
	193	err = -ENXIO;
	194	goto err_pci_release_regions;
	195	}
8369ae33 RM	196
	197	/* Map MMIO */
	198	err = -ENOMEM;
	199	bus->mmio = pci_iomap(dev, 0, ~0UL);
	200	if (!bus->mmio)
	201	goto err_pci_release_regions;
	202
	203	/* Host specific */
	204	bus->host_pci = dev;
	205	bus->hosttype = BCMA_HOSTTYPE_PCI;
	206	bus->ops = &bcma_host_pci_ops;
	207
0a2fcaa7 HM	208	bus->boardinfo.vendor = bus->host_pci->subsystem_vendor;
	209	bus->boardinfo.type = bus->host_pci->subsystem_device;
	210
8369ae33 RM	211	/* Register */
	212	err = bcma_bus_register(bus);
	213	if (err)
	214	goto err_pci_unmap_mmio;
	215
	216	pci_set_drvdata(dev, bus);
	217
	218	out:
	219	return err;
	220
	221	err_pci_unmap_mmio:
	222	pci_iounmap(dev, bus->mmio);
	223	err_pci_release_regions:
	224	pci_release_regions(dev);
	225	err_pci_disable:
	226	pci_disable_device(dev);
	227	err_kfree_bus:
	228	kfree(bus);
	229	return err;
	230	}
	231
0f58a01d	232	static void bcma_host_pci_remove(struct pci_dev *dev)
8369ae33 RM	233	{
	234	struct bcma_bus *bus = pci_get_drvdata(dev);
	235
	236	bcma_bus_unregister(bus);
	237	pci_iounmap(dev, bus->mmio);
	238	pci_release_regions(dev);
	239	pci_disable_device(dev);
	240	kfree(bus);
8369ae33 RM	241	}
8369ae33 RM	242
ccd60953	243	#ifdef CONFIG_PM_SLEEP
5d2031f2	244	static int bcma_host_pci_suspend(struct device *dev)
775ab521	245	{
5d2031f2 LT	246	struct pci_dev *pdev = to_pci_dev(dev);
5d2031f2 LT	247	struct bcma_bus *bus = pci_get_drvdata(pdev);
775ab521	248
28e7d218	249	bus->mapped_core = NULL;
5d2031f2	250
685a4ef0	251	return bcma_bus_suspend(bus);
775ab521 RM	252	}
775ab521 RM	253
5d2031f2	254	static int bcma_host_pci_resume(struct device *dev)
775ab521	255	{
5d2031f2 LT	256	struct pci_dev *pdev = to_pci_dev(dev);
5d2031f2 LT	257	struct bcma_bus *bus = pci_get_drvdata(pdev);
775ab521	258
5d2031f2 LT	259	return bcma_bus_resume(bus);
5d2031f2 LT	260	}
775ab521	261
5d2031f2 LT	262	static SIMPLE_DEV_PM_OPS(bcma_pm_ops, bcma_host_pci_suspend,
	263	bcma_host_pci_resume);
	264	#define BCMA_PM_OPS (&bcma_pm_ops)
775ab521	265
ccd60953	266	#else /* CONFIG_PM_SLEEP */
5d2031f2 LT	267
	268	#define BCMA_PM_OPS NULL
	269
ccd60953	270	#endif /* CONFIG_PM_SLEEP */
775ab521	271
8369ae33	272	static DEFINE_PCI_DEVICE_TABLE(bcma_pci_bridge_tbl) = {
9594b56d	273	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x0576) },
b9f54bd0	274	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4313) },
02817be0	275	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 43224) },
8369ae33 RM	276	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4331) },
8369ae33 RM	277	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4353) },
91fa4b0a	278	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4357) },
646e0827	279	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4358) },
c263c2c1	280	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4359) },
88f9b65d	281	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4365) },
8369ae33 RM	282	{ PCI_DEVICE(PCI_VENDOR_ID_BROADCOM, 0x4727) },
	283	{ 0, },
	284	};
	285	MODULE_DEVICE_TABLE(pci, bcma_pci_bridge_tbl);
	286
	287	static struct pci_driver bcma_pci_bridge_driver = {
	288	.name = "bcma-pci-bridge",
	289	.id_table = bcma_pci_bridge_tbl,
	290	.probe = bcma_host_pci_probe,
0f58a01d	291	.remove = bcma_host_pci_remove,
5d2031f2	292	.driver.pm = BCMA_PM_OPS,
8369ae33 RM	293	};
	294
	295	int __init bcma_host_pci_init(void)
	296	{
	297	return pci_register_driver(&bcma_pci_bridge_driver);
	298	}
	299
	300	void __exit bcma_host_pci_exit(void)
	301	{
	302	pci_unregister_driver(&bcma_pci_bridge_driver);
	303	}