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37613fa5 GKH |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // | |
3 | // Register map access API | |
4 | // | |
5 | // Copyright 2011 Wolfson Microelectronics plc | |
6 | // | |
7 | // Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
b83a313b | 8 | |
f5d6eba7 | 9 | #include <linux/device.h> |
b83a313b | 10 | #include <linux/slab.h> |
19694b5e | 11 | #include <linux/export.h> |
b83a313b MB |
12 | #include <linux/mutex.h> |
13 | #include <linux/err.h> | |
c916d6ef | 14 | #include <linux/property.h> |
6863ca62 | 15 | #include <linux/rbtree.h> |
30b2a553 | 16 | #include <linux/sched.h> |
2de9d600 | 17 | #include <linux/delay.h> |
ca747be2 | 18 | #include <linux/log2.h> |
8698b936 | 19 | #include <linux/hwspinlock.h> |
53d86095 | 20 | #include <asm/unaligned.h> |
b83a313b | 21 | |
fb2736bb | 22 | #define CREATE_TRACE_POINTS |
f58078da | 23 | #include "trace.h" |
fb2736bb | 24 | |
93de9124 | 25 | #include "internal.h" |
b83a313b | 26 | |
1044c180 MB |
27 | /* |
28 | * Sometimes for failures during very early init the trace | |
29 | * infrastructure isn't available early enough to be used. For this | |
30 | * sort of problem defining LOG_DEVICE will add printks for basic | |
31 | * register I/O on a specific device. | |
32 | */ | |
33 | #undef LOG_DEVICE | |
34 | ||
95093762 BD |
35 | #ifdef LOG_DEVICE |
36 | static inline bool regmap_should_log(struct regmap *map) | |
37 | { | |
38 | return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0); | |
39 | } | |
40 | #else | |
41 | static inline bool regmap_should_log(struct regmap *map) { return false; } | |
42 | #endif | |
43 | ||
44 | ||
1044c180 MB |
45 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
46 | unsigned int mask, unsigned int val, | |
7ff0589c | 47 | bool *change, bool force_write); |
1044c180 | 48 | |
3ac17037 BB |
49 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
50 | unsigned int *val); | |
ad278406 AS |
51 | static int _regmap_bus_read(void *context, unsigned int reg, |
52 | unsigned int *val); | |
07c320dc AS |
53 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
54 | unsigned int val); | |
3ac17037 BB |
55 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
56 | unsigned int val); | |
07c320dc AS |
57 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
58 | unsigned int val); | |
ad278406 | 59 | |
76aad392 DC |
60 | bool regmap_reg_in_ranges(unsigned int reg, |
61 | const struct regmap_range *ranges, | |
62 | unsigned int nranges) | |
63 | { | |
64 | const struct regmap_range *r; | |
65 | int i; | |
66 | ||
67 | for (i = 0, r = ranges; i < nranges; i++, r++) | |
68 | if (regmap_reg_in_range(reg, r)) | |
69 | return true; | |
70 | return false; | |
71 | } | |
72 | EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); | |
73 | ||
154881e5 MB |
74 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
75 | const struct regmap_access_table *table) | |
76aad392 DC |
76 | { |
77 | /* Check "no ranges" first */ | |
78 | if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) | |
79 | return false; | |
80 | ||
81 | /* In case zero "yes ranges" are supplied, any reg is OK */ | |
82 | if (!table->n_yes_ranges) | |
83 | return true; | |
84 | ||
85 | return regmap_reg_in_ranges(reg, table->yes_ranges, | |
86 | table->n_yes_ranges); | |
87 | } | |
154881e5 | 88 | EXPORT_SYMBOL_GPL(regmap_check_range_table); |
76aad392 | 89 | |
8de2f081 MB |
90 | bool regmap_writeable(struct regmap *map, unsigned int reg) |
91 | { | |
0ec74ad3 | 92 | if (map->max_register_is_set && reg > map->max_register) |
8de2f081 MB |
93 | return false; |
94 | ||
95 | if (map->writeable_reg) | |
96 | return map->writeable_reg(map->dev, reg); | |
97 | ||
76aad392 | 98 | if (map->wr_table) |
154881e5 | 99 | return regmap_check_range_table(map, reg, map->wr_table); |
76aad392 | 100 | |
8de2f081 MB |
101 | return true; |
102 | } | |
103 | ||
1ea975cf CB |
104 | bool regmap_cached(struct regmap *map, unsigned int reg) |
105 | { | |
106 | int ret; | |
107 | unsigned int val; | |
108 | ||
71df1793 | 109 | if (map->cache_type == REGCACHE_NONE) |
1ea975cf CB |
110 | return false; |
111 | ||
112 | if (!map->cache_ops) | |
113 | return false; | |
114 | ||
0ec74ad3 | 115 | if (map->max_register_is_set && reg > map->max_register) |
1ea975cf CB |
116 | return false; |
117 | ||
118 | map->lock(map->lock_arg); | |
119 | ret = regcache_read(map, reg, &val); | |
120 | map->unlock(map->lock_arg); | |
121 | if (ret) | |
122 | return false; | |
123 | ||
124 | return true; | |
125 | } | |
126 | ||
8de2f081 MB |
127 | bool regmap_readable(struct regmap *map, unsigned int reg) |
128 | { | |
04dc91ce LPC |
129 | if (!map->reg_read) |
130 | return false; | |
131 | ||
0ec74ad3 | 132 | if (map->max_register_is_set && reg > map->max_register) |
8de2f081 MB |
133 | return false; |
134 | ||
4191f197 WS |
135 | if (map->format.format_write) |
136 | return false; | |
137 | ||
8de2f081 MB |
138 | if (map->readable_reg) |
139 | return map->readable_reg(map->dev, reg); | |
140 | ||
76aad392 | 141 | if (map->rd_table) |
154881e5 | 142 | return regmap_check_range_table(map, reg, map->rd_table); |
76aad392 | 143 | |
8de2f081 MB |
144 | return true; |
145 | } | |
146 | ||
147 | bool regmap_volatile(struct regmap *map, unsigned int reg) | |
148 | { | |
5844a8b9 | 149 | if (!map->format.format_write && !regmap_readable(map, reg)) |
8de2f081 MB |
150 | return false; |
151 | ||
152 | if (map->volatile_reg) | |
153 | return map->volatile_reg(map->dev, reg); | |
154 | ||
76aad392 | 155 | if (map->volatile_table) |
154881e5 | 156 | return regmap_check_range_table(map, reg, map->volatile_table); |
76aad392 | 157 | |
b92be6fe MB |
158 | if (map->cache_ops) |
159 | return false; | |
160 | else | |
161 | return true; | |
8de2f081 MB |
162 | } |
163 | ||
164 | bool regmap_precious(struct regmap *map, unsigned int reg) | |
165 | { | |
4191f197 | 166 | if (!regmap_readable(map, reg)) |
8de2f081 MB |
167 | return false; |
168 | ||
169 | if (map->precious_reg) | |
170 | return map->precious_reg(map->dev, reg); | |
171 | ||
76aad392 | 172 | if (map->precious_table) |
154881e5 | 173 | return regmap_check_range_table(map, reg, map->precious_table); |
76aad392 | 174 | |
8de2f081 MB |
175 | return false; |
176 | } | |
177 | ||
cdf6b11d BW |
178 | bool regmap_writeable_noinc(struct regmap *map, unsigned int reg) |
179 | { | |
180 | if (map->writeable_noinc_reg) | |
181 | return map->writeable_noinc_reg(map->dev, reg); | |
182 | ||
183 | if (map->wr_noinc_table) | |
184 | return regmap_check_range_table(map, reg, map->wr_noinc_table); | |
185 | ||
186 | return true; | |
187 | } | |
188 | ||
74fe7b55 CDL |
189 | bool regmap_readable_noinc(struct regmap *map, unsigned int reg) |
190 | { | |
191 | if (map->readable_noinc_reg) | |
192 | return map->readable_noinc_reg(map->dev, reg); | |
193 | ||
194 | if (map->rd_noinc_table) | |
195 | return regmap_check_range_table(map, reg, map->rd_noinc_table); | |
196 | ||
197 | return true; | |
198 | } | |
199 | ||
82cd9965 | 200 | static bool regmap_volatile_range(struct regmap *map, unsigned int reg, |
a8f28cfa | 201 | size_t num) |
82cd9965 LPC |
202 | { |
203 | unsigned int i; | |
204 | ||
205 | for (i = 0; i < num; i++) | |
b8f9a03b | 206 | if (!regmap_volatile(map, reg + regmap_get_offset(map, i))) |
82cd9965 LPC |
207 | return false; |
208 | ||
209 | return true; | |
210 | } | |
211 | ||
0c2191c3 RR |
212 | static void regmap_format_12_20_write(struct regmap *map, |
213 | unsigned int reg, unsigned int val) | |
214 | { | |
215 | u8 *out = map->work_buf; | |
216 | ||
217 | out[0] = reg >> 4; | |
218 | out[1] = (reg << 4) | (val >> 16); | |
219 | out[2] = val >> 8; | |
220 | out[3] = val; | |
221 | } | |
222 | ||
223 | ||
9aa50750 WS |
224 | static void regmap_format_2_6_write(struct regmap *map, |
225 | unsigned int reg, unsigned int val) | |
226 | { | |
227 | u8 *out = map->work_buf; | |
228 | ||
229 | *out = (reg << 6) | val; | |
230 | } | |
231 | ||
b83a313b MB |
232 | static void regmap_format_4_12_write(struct regmap *map, |
233 | unsigned int reg, unsigned int val) | |
234 | { | |
235 | __be16 *out = map->work_buf; | |
236 | *out = cpu_to_be16((reg << 12) | val); | |
237 | } | |
238 | ||
239 | static void regmap_format_7_9_write(struct regmap *map, | |
240 | unsigned int reg, unsigned int val) | |
241 | { | |
242 | __be16 *out = map->work_buf; | |
243 | *out = cpu_to_be16((reg << 9) | val); | |
244 | } | |
245 | ||
b24412af AM |
246 | static void regmap_format_7_17_write(struct regmap *map, |
247 | unsigned int reg, unsigned int val) | |
248 | { | |
249 | u8 *out = map->work_buf; | |
250 | ||
251 | out[2] = val; | |
252 | out[1] = val >> 8; | |
253 | out[0] = (val >> 16) | (reg << 1); | |
254 | } | |
255 | ||
7e5ec63e LPC |
256 | static void regmap_format_10_14_write(struct regmap *map, |
257 | unsigned int reg, unsigned int val) | |
258 | { | |
259 | u8 *out = map->work_buf; | |
260 | ||
261 | out[2] = val; | |
262 | out[1] = (val >> 8) | (reg << 6); | |
263 | out[0] = reg >> 2; | |
264 | } | |
265 | ||
d939fb9a | 266 | static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
267 | { |
268 | u8 *b = buf; | |
269 | ||
d939fb9a | 270 | b[0] = val << shift; |
b83a313b MB |
271 | } |
272 | ||
141eba2e | 273 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) |
b83a313b | 274 | { |
53d86095 | 275 | put_unaligned_be16(val << shift, buf); |
b83a313b MB |
276 | } |
277 | ||
4aa8c069 XL |
278 | static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) |
279 | { | |
53d86095 | 280 | put_unaligned_le16(val << shift, buf); |
4aa8c069 XL |
281 | } |
282 | ||
141eba2e SW |
283 | static void regmap_format_16_native(void *buf, unsigned int val, |
284 | unsigned int shift) | |
285 | { | |
53d86095 JTT |
286 | u16 v = val << shift; |
287 | ||
288 | memcpy(buf, &v, sizeof(v)); | |
141eba2e SW |
289 | } |
290 | ||
06000443 | 291 | static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift) |
ea279fc5 | 292 | { |
06000443 | 293 | put_unaligned_be24(val << shift, buf); |
ea279fc5 MR |
294 | } |
295 | ||
141eba2e | 296 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) |
7d5e525b | 297 | { |
53d86095 | 298 | put_unaligned_be32(val << shift, buf); |
7d5e525b MB |
299 | } |
300 | ||
4aa8c069 XL |
301 | static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) |
302 | { | |
53d86095 | 303 | put_unaligned_le32(val << shift, buf); |
4aa8c069 XL |
304 | } |
305 | ||
141eba2e SW |
306 | static void regmap_format_32_native(void *buf, unsigned int val, |
307 | unsigned int shift) | |
308 | { | |
53d86095 JTT |
309 | u32 v = val << shift; |
310 | ||
311 | memcpy(buf, &v, sizeof(v)); | |
141eba2e SW |
312 | } |
313 | ||
8a819ff8 | 314 | static void regmap_parse_inplace_noop(void *buf) |
b83a313b | 315 | { |
8a819ff8 MB |
316 | } |
317 | ||
318 | static unsigned int regmap_parse_8(const void *buf) | |
319 | { | |
320 | const u8 *b = buf; | |
b83a313b MB |
321 | |
322 | return b[0]; | |
323 | } | |
324 | ||
8a819ff8 MB |
325 | static unsigned int regmap_parse_16_be(const void *buf) |
326 | { | |
53d86095 | 327 | return get_unaligned_be16(buf); |
8a819ff8 MB |
328 | } |
329 | ||
4aa8c069 XL |
330 | static unsigned int regmap_parse_16_le(const void *buf) |
331 | { | |
53d86095 | 332 | return get_unaligned_le16(buf); |
4aa8c069 XL |
333 | } |
334 | ||
8a819ff8 | 335 | static void regmap_parse_16_be_inplace(void *buf) |
b83a313b | 336 | { |
53d86095 | 337 | u16 v = get_unaligned_be16(buf); |
b83a313b | 338 | |
53d86095 | 339 | memcpy(buf, &v, sizeof(v)); |
b83a313b MB |
340 | } |
341 | ||
4aa8c069 XL |
342 | static void regmap_parse_16_le_inplace(void *buf) |
343 | { | |
53d86095 | 344 | u16 v = get_unaligned_le16(buf); |
4aa8c069 | 345 | |
53d86095 | 346 | memcpy(buf, &v, sizeof(v)); |
4aa8c069 XL |
347 | } |
348 | ||
8a819ff8 | 349 | static unsigned int regmap_parse_16_native(const void *buf) |
141eba2e | 350 | { |
53d86095 JTT |
351 | u16 v; |
352 | ||
353 | memcpy(&v, buf, sizeof(v)); | |
354 | return v; | |
141eba2e SW |
355 | } |
356 | ||
06000443 | 357 | static unsigned int regmap_parse_24_be(const void *buf) |
ea279fc5 | 358 | { |
06000443 | 359 | return get_unaligned_be24(buf); |
ea279fc5 MR |
360 | } |
361 | ||
8a819ff8 MB |
362 | static unsigned int regmap_parse_32_be(const void *buf) |
363 | { | |
53d86095 | 364 | return get_unaligned_be32(buf); |
8a819ff8 MB |
365 | } |
366 | ||
4aa8c069 XL |
367 | static unsigned int regmap_parse_32_le(const void *buf) |
368 | { | |
53d86095 | 369 | return get_unaligned_le32(buf); |
4aa8c069 XL |
370 | } |
371 | ||
8a819ff8 | 372 | static void regmap_parse_32_be_inplace(void *buf) |
7d5e525b | 373 | { |
53d86095 | 374 | u32 v = get_unaligned_be32(buf); |
7d5e525b | 375 | |
53d86095 | 376 | memcpy(buf, &v, sizeof(v)); |
7d5e525b MB |
377 | } |
378 | ||
4aa8c069 XL |
379 | static void regmap_parse_32_le_inplace(void *buf) |
380 | { | |
53d86095 | 381 | u32 v = get_unaligned_le32(buf); |
4aa8c069 | 382 | |
53d86095 | 383 | memcpy(buf, &v, sizeof(v)); |
4aa8c069 XL |
384 | } |
385 | ||
8a819ff8 | 386 | static unsigned int regmap_parse_32_native(const void *buf) |
141eba2e | 387 | { |
53d86095 JTT |
388 | u32 v; |
389 | ||
390 | memcpy(&v, buf, sizeof(v)); | |
391 | return v; | |
141eba2e SW |
392 | } |
393 | ||
8698b936 BW |
394 | static void regmap_lock_hwlock(void *__map) |
395 | { | |
396 | struct regmap *map = __map; | |
397 | ||
398 | hwspin_lock_timeout(map->hwlock, UINT_MAX); | |
399 | } | |
400 | ||
401 | static void regmap_lock_hwlock_irq(void *__map) | |
402 | { | |
403 | struct regmap *map = __map; | |
404 | ||
405 | hwspin_lock_timeout_irq(map->hwlock, UINT_MAX); | |
406 | } | |
407 | ||
408 | static void regmap_lock_hwlock_irqsave(void *__map) | |
409 | { | |
410 | struct regmap *map = __map; | |
411 | ||
412 | hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX, | |
413 | &map->spinlock_flags); | |
414 | } | |
415 | ||
416 | static void regmap_unlock_hwlock(void *__map) | |
417 | { | |
418 | struct regmap *map = __map; | |
419 | ||
420 | hwspin_unlock(map->hwlock); | |
421 | } | |
422 | ||
423 | static void regmap_unlock_hwlock_irq(void *__map) | |
424 | { | |
425 | struct regmap *map = __map; | |
426 | ||
427 | hwspin_unlock_irq(map->hwlock); | |
428 | } | |
429 | ||
430 | static void regmap_unlock_hwlock_irqrestore(void *__map) | |
431 | { | |
432 | struct regmap *map = __map; | |
433 | ||
434 | hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags); | |
435 | } | |
436 | ||
81e30b18 | 437 | static void regmap_lock_unlock_none(void *__map) |
c9b41fcf BG |
438 | { |
439 | ||
440 | } | |
8698b936 | 441 | |
0d4529c5 | 442 | static void regmap_lock_mutex(void *__map) |
bacdbe07 | 443 | { |
0d4529c5 | 444 | struct regmap *map = __map; |
bacdbe07 SW |
445 | mutex_lock(&map->mutex); |
446 | } | |
447 | ||
0d4529c5 | 448 | static void regmap_unlock_mutex(void *__map) |
bacdbe07 | 449 | { |
0d4529c5 | 450 | struct regmap *map = __map; |
bacdbe07 SW |
451 | mutex_unlock(&map->mutex); |
452 | } | |
453 | ||
0d4529c5 | 454 | static void regmap_lock_spinlock(void *__map) |
b4519c71 | 455 | __acquires(&map->spinlock) |
bacdbe07 | 456 | { |
0d4529c5 | 457 | struct regmap *map = __map; |
92ab1aab LPC |
458 | unsigned long flags; |
459 | ||
460 | spin_lock_irqsave(&map->spinlock, flags); | |
461 | map->spinlock_flags = flags; | |
bacdbe07 SW |
462 | } |
463 | ||
0d4529c5 | 464 | static void regmap_unlock_spinlock(void *__map) |
b4519c71 | 465 | __releases(&map->spinlock) |
bacdbe07 | 466 | { |
0d4529c5 | 467 | struct regmap *map = __map; |
92ab1aab | 468 | spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); |
bacdbe07 SW |
469 | } |
470 | ||
67021f25 VO |
471 | static void regmap_lock_raw_spinlock(void *__map) |
472 | __acquires(&map->raw_spinlock) | |
473 | { | |
474 | struct regmap *map = __map; | |
475 | unsigned long flags; | |
476 | ||
477 | raw_spin_lock_irqsave(&map->raw_spinlock, flags); | |
478 | map->raw_spinlock_flags = flags; | |
479 | } | |
480 | ||
481 | static void regmap_unlock_raw_spinlock(void *__map) | |
482 | __releases(&map->raw_spinlock) | |
483 | { | |
484 | struct regmap *map = __map; | |
485 | raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags); | |
486 | } | |
487 | ||
72b39f6f MB |
488 | static void dev_get_regmap_release(struct device *dev, void *res) |
489 | { | |
490 | /* | |
491 | * We don't actually have anything to do here; the goal here | |
492 | * is not to manage the regmap but to provide a simple way to | |
493 | * get the regmap back given a struct device. | |
494 | */ | |
495 | } | |
496 | ||
6863ca62 KG |
497 | static bool _regmap_range_add(struct regmap *map, |
498 | struct regmap_range_node *data) | |
499 | { | |
500 | struct rb_root *root = &map->range_tree; | |
501 | struct rb_node **new = &(root->rb_node), *parent = NULL; | |
502 | ||
503 | while (*new) { | |
504 | struct regmap_range_node *this = | |
671a911b | 505 | rb_entry(*new, struct regmap_range_node, node); |
6863ca62 KG |
506 | |
507 | parent = *new; | |
508 | if (data->range_max < this->range_min) | |
509 | new = &((*new)->rb_left); | |
510 | else if (data->range_min > this->range_max) | |
511 | new = &((*new)->rb_right); | |
512 | else | |
513 | return false; | |
514 | } | |
515 | ||
516 | rb_link_node(&data->node, parent, new); | |
517 | rb_insert_color(&data->node, root); | |
518 | ||
519 | return true; | |
520 | } | |
521 | ||
522 | static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, | |
523 | unsigned int reg) | |
524 | { | |
525 | struct rb_node *node = map->range_tree.rb_node; | |
526 | ||
527 | while (node) { | |
528 | struct regmap_range_node *this = | |
671a911b | 529 | rb_entry(node, struct regmap_range_node, node); |
6863ca62 KG |
530 | |
531 | if (reg < this->range_min) | |
532 | node = node->rb_left; | |
533 | else if (reg > this->range_max) | |
534 | node = node->rb_right; | |
535 | else | |
536 | return this; | |
537 | } | |
538 | ||
539 | return NULL; | |
540 | } | |
541 | ||
542 | static void regmap_range_exit(struct regmap *map) | |
543 | { | |
544 | struct rb_node *next; | |
545 | struct regmap_range_node *range_node; | |
546 | ||
547 | next = rb_first(&map->range_tree); | |
548 | while (next) { | |
549 | range_node = rb_entry(next, struct regmap_range_node, node); | |
550 | next = rb_next(&range_node->node); | |
551 | rb_erase(&range_node->node, &map->range_tree); | |
552 | kfree(range_node); | |
553 | } | |
554 | ||
555 | kfree(map->selector_work_buf); | |
556 | } | |
557 | ||
94cc89eb CK |
558 | static int regmap_set_name(struct regmap *map, const struct regmap_config *config) |
559 | { | |
560 | if (config->name) { | |
561 | const char *name = kstrdup_const(config->name, GFP_KERNEL); | |
562 | ||
563 | if (!name) | |
564 | return -ENOMEM; | |
565 | ||
566 | kfree_const(map->name); | |
567 | map->name = name; | |
568 | } | |
569 | ||
570 | return 0; | |
571 | } | |
572 | ||
6cfec04b MS |
573 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
574 | const struct regmap_config *config) | |
575 | { | |
576 | struct regmap **m; | |
94cc89eb | 577 | int ret; |
6cfec04b MS |
578 | |
579 | map->dev = dev; | |
580 | ||
94cc89eb CK |
581 | ret = regmap_set_name(map, config); |
582 | if (ret) | |
583 | return ret; | |
584 | ||
530792ef | 585 | regmap_debugfs_exit(map); |
94cc89eb | 586 | regmap_debugfs_init(map); |
6cfec04b MS |
587 | |
588 | /* Add a devres resource for dev_get_regmap() */ | |
589 | m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); | |
590 | if (!m) { | |
591 | regmap_debugfs_exit(map); | |
592 | return -ENOMEM; | |
593 | } | |
594 | *m = map; | |
595 | devres_add(dev, m); | |
596 | ||
597 | return 0; | |
598 | } | |
599 | EXPORT_SYMBOL_GPL(regmap_attach_dev); | |
600 | ||
cf673fbc GU |
601 | static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, |
602 | const struct regmap_config *config) | |
603 | { | |
604 | enum regmap_endian endian; | |
605 | ||
606 | /* Retrieve the endianness specification from the regmap config */ | |
607 | endian = config->reg_format_endian; | |
608 | ||
609 | /* If the regmap config specified a non-default value, use that */ | |
610 | if (endian != REGMAP_ENDIAN_DEFAULT) | |
611 | return endian; | |
612 | ||
613 | /* Retrieve the endianness specification from the bus config */ | |
614 | if (bus && bus->reg_format_endian_default) | |
615 | endian = bus->reg_format_endian_default; | |
d647c199 | 616 | |
cf673fbc GU |
617 | /* If the bus specified a non-default value, use that */ |
618 | if (endian != REGMAP_ENDIAN_DEFAULT) | |
619 | return endian; | |
620 | ||
621 | /* Use this if no other value was found */ | |
622 | return REGMAP_ENDIAN_BIG; | |
623 | } | |
624 | ||
3c174d29 GR |
625 | enum regmap_endian regmap_get_val_endian(struct device *dev, |
626 | const struct regmap_bus *bus, | |
627 | const struct regmap_config *config) | |
d647c199 | 628 | { |
c916d6ef | 629 | struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL; |
cf673fbc | 630 | enum regmap_endian endian; |
d647c199 | 631 | |
45e1a279 | 632 | /* Retrieve the endianness specification from the regmap config */ |
cf673fbc | 633 | endian = config->val_format_endian; |
d647c199 | 634 | |
45e1a279 | 635 | /* If the regmap config specified a non-default value, use that */ |
cf673fbc GU |
636 | if (endian != REGMAP_ENDIAN_DEFAULT) |
637 | return endian; | |
d647c199 | 638 | |
c916d6ef AS |
639 | /* If the firmware node exist try to get endianness from it */ |
640 | if (fwnode_property_read_bool(fwnode, "big-endian")) | |
641 | endian = REGMAP_ENDIAN_BIG; | |
642 | else if (fwnode_property_read_bool(fwnode, "little-endian")) | |
643 | endian = REGMAP_ENDIAN_LITTLE; | |
644 | else if (fwnode_property_read_bool(fwnode, "native-endian")) | |
645 | endian = REGMAP_ENDIAN_NATIVE; | |
646 | ||
647 | /* If the endianness was specified in fwnode, use that */ | |
648 | if (endian != REGMAP_ENDIAN_DEFAULT) | |
649 | return endian; | |
45e1a279 SW |
650 | |
651 | /* Retrieve the endianness specification from the bus config */ | |
cf673fbc GU |
652 | if (bus && bus->val_format_endian_default) |
653 | endian = bus->val_format_endian_default; | |
d647c199 | 654 | |
45e1a279 | 655 | /* If the bus specified a non-default value, use that */ |
cf673fbc GU |
656 | if (endian != REGMAP_ENDIAN_DEFAULT) |
657 | return endian; | |
45e1a279 SW |
658 | |
659 | /* Use this if no other value was found */ | |
cf673fbc | 660 | return REGMAP_ENDIAN_BIG; |
d647c199 | 661 | } |
3c174d29 | 662 | EXPORT_SYMBOL_GPL(regmap_get_val_endian); |
d647c199 | 663 | |
3cfe7a74 NB |
664 | struct regmap *__regmap_init(struct device *dev, |
665 | const struct regmap_bus *bus, | |
666 | void *bus_context, | |
667 | const struct regmap_config *config, | |
668 | struct lock_class_key *lock_key, | |
669 | const char *lock_name) | |
b83a313b | 670 | { |
6cfec04b | 671 | struct regmap *map; |
d36cb020 | 672 | int ret = -EINVAL; |
141eba2e | 673 | enum regmap_endian reg_endian, val_endian; |
6863ca62 | 674 | int i, j; |
b83a313b | 675 | |
d2a5884a | 676 | if (!config) |
abbb18fb | 677 | goto err; |
b83a313b MB |
678 | |
679 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
680 | if (map == NULL) { | |
681 | ret = -ENOMEM; | |
682 | goto err; | |
683 | } | |
684 | ||
94cc89eb CK |
685 | ret = regmap_set_name(map, config); |
686 | if (ret) | |
687 | goto err_map; | |
8253bb3f | 688 | |
1d512ee8 CK |
689 | ret = -EINVAL; /* Later error paths rely on this */ |
690 | ||
c9b41fcf | 691 | if (config->disable_locking) { |
81e30b18 | 692 | map->lock = map->unlock = regmap_lock_unlock_none; |
21f8e482 | 693 | map->can_sleep = config->can_sleep; |
72465736 | 694 | regmap_debugfs_disable(map); |
c9b41fcf | 695 | } else if (config->lock && config->unlock) { |
0d4529c5 DC |
696 | map->lock = config->lock; |
697 | map->unlock = config->unlock; | |
698 | map->lock_arg = config->lock_arg; | |
21f8e482 | 699 | map->can_sleep = config->can_sleep; |
a4887813 | 700 | } else if (config->use_hwlock) { |
8698b936 BW |
701 | map->hwlock = hwspin_lock_request_specific(config->hwlock_id); |
702 | if (!map->hwlock) { | |
703 | ret = -ENXIO; | |
8253bb3f | 704 | goto err_name; |
8698b936 BW |
705 | } |
706 | ||
707 | switch (config->hwlock_mode) { | |
708 | case HWLOCK_IRQSTATE: | |
709 | map->lock = regmap_lock_hwlock_irqsave; | |
710 | map->unlock = regmap_unlock_hwlock_irqrestore; | |
711 | break; | |
712 | case HWLOCK_IRQ: | |
713 | map->lock = regmap_lock_hwlock_irq; | |
714 | map->unlock = regmap_unlock_hwlock_irq; | |
715 | break; | |
716 | default: | |
717 | map->lock = regmap_lock_hwlock; | |
718 | map->unlock = regmap_unlock_hwlock; | |
719 | break; | |
720 | } | |
721 | ||
722 | map->lock_arg = map; | |
bacdbe07 | 723 | } else { |
d2a5884a AS |
724 | if ((bus && bus->fast_io) || |
725 | config->fast_io) { | |
67021f25 VO |
726 | if (config->use_raw_spinlock) { |
727 | raw_spin_lock_init(&map->raw_spinlock); | |
728 | map->lock = regmap_lock_raw_spinlock; | |
729 | map->unlock = regmap_unlock_raw_spinlock; | |
730 | lockdep_set_class_and_name(&map->raw_spinlock, | |
731 | lock_key, lock_name); | |
732 | } else { | |
733 | spin_lock_init(&map->spinlock); | |
734 | map->lock = regmap_lock_spinlock; | |
735 | map->unlock = regmap_unlock_spinlock; | |
736 | lockdep_set_class_and_name(&map->spinlock, | |
737 | lock_key, lock_name); | |
738 | } | |
0d4529c5 DC |
739 | } else { |
740 | mutex_init(&map->mutex); | |
741 | map->lock = regmap_lock_mutex; | |
742 | map->unlock = regmap_unlock_mutex; | |
21f8e482 | 743 | map->can_sleep = true; |
3cfe7a74 NB |
744 | lockdep_set_class_and_name(&map->mutex, |
745 | lock_key, lock_name); | |
0d4529c5 DC |
746 | } |
747 | map->lock_arg = map; | |
bacdbe07 | 748 | } |
b4a21fc2 SB |
749 | |
750 | /* | |
751 | * When we write in fast-paths with regmap_bulk_write() don't allocate | |
752 | * scratch buffers with sleeping allocations. | |
753 | */ | |
754 | if ((bus && bus->fast_io) || config->fast_io) | |
755 | map->alloc_flags = GFP_ATOMIC; | |
756 | else | |
757 | map->alloc_flags = GFP_KERNEL; | |
758 | ||
0074f3f2 CF |
759 | map->reg_base = config->reg_base; |
760 | ||
c212accc | 761 | map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); |
82159ba8 | 762 | map->format.pad_bytes = config->pad_bits / 8; |
4a670ac3 | 763 | map->format.reg_shift = config->reg_shift; |
c212accc | 764 | map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); |
5494a98f FE |
765 | map->format.buf_size = DIV_ROUND_UP(config->reg_bits + |
766 | config->val_bits + config->pad_bits, 8); | |
d939fb9a | 767 | map->reg_shift = config->pad_bits % 8; |
f01ee60f SW |
768 | if (config->reg_stride) |
769 | map->reg_stride = config->reg_stride; | |
770 | else | |
771 | map->reg_stride = 1; | |
ca747be2 XL |
772 | if (is_power_of_2(map->reg_stride)) |
773 | map->reg_stride_order = ilog2(map->reg_stride); | |
774 | else | |
775 | map->reg_stride_order = -1; | |
d77e7456 MV |
776 | map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read)); |
777 | map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write)); | |
778 | map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write)); | |
17649c90 SS |
779 | if (bus) { |
780 | map->max_raw_read = bus->max_raw_read; | |
781 | map->max_raw_write = bus->max_raw_write; | |
d77e7456 MV |
782 | } else if (config->max_raw_read && config->max_raw_write) { |
783 | map->max_raw_read = config->max_raw_read; | |
784 | map->max_raw_write = config->max_raw_write; | |
17649c90 | 785 | } |
b83a313b MB |
786 | map->dev = dev; |
787 | map->bus = bus; | |
0135bbcc | 788 | map->bus_context = bus_context; |
2e2ae66d | 789 | map->max_register = config->max_register; |
0ec74ad3 | 790 | map->max_register_is_set = map->max_register ?: config->max_register_is_0; |
76aad392 DC |
791 | map->wr_table = config->wr_table; |
792 | map->rd_table = config->rd_table; | |
793 | map->volatile_table = config->volatile_table; | |
794 | map->precious_table = config->precious_table; | |
cdf6b11d | 795 | map->wr_noinc_table = config->wr_noinc_table; |
74fe7b55 | 796 | map->rd_noinc_table = config->rd_noinc_table; |
2e2ae66d MB |
797 | map->writeable_reg = config->writeable_reg; |
798 | map->readable_reg = config->readable_reg; | |
799 | map->volatile_reg = config->volatile_reg; | |
2efe1642 | 800 | map->precious_reg = config->precious_reg; |
cdf6b11d | 801 | map->writeable_noinc_reg = config->writeable_noinc_reg; |
74fe7b55 | 802 | map->readable_noinc_reg = config->readable_noinc_reg; |
5d1729e7 | 803 | map->cache_type = config->cache_type; |
b83a313b | 804 | |
0d509f2b MB |
805 | spin_lock_init(&map->async_lock); |
806 | INIT_LIST_HEAD(&map->async_list); | |
7e09a979 | 807 | INIT_LIST_HEAD(&map->async_free); |
0d509f2b MB |
808 | init_waitqueue_head(&map->async_waitq); |
809 | ||
9bf485c9 AD |
810 | if (config->read_flag_mask || |
811 | config->write_flag_mask || | |
812 | config->zero_flag_mask) { | |
6f306441 LPC |
813 | map->read_flag_mask = config->read_flag_mask; |
814 | map->write_flag_mask = config->write_flag_mask; | |
d2a5884a | 815 | } else if (bus) { |
6f306441 LPC |
816 | map->read_flag_mask = bus->read_flag_mask; |
817 | } | |
818 | ||
d77e7456 MV |
819 | if (config && config->read && config->write) { |
820 | map->reg_read = _regmap_bus_read; | |
739f872e CM |
821 | if (config->reg_update_bits) |
822 | map->reg_update_bits = config->reg_update_bits; | |
d77e7456 MV |
823 | |
824 | /* Bulk read/write */ | |
825 | map->read = config->read; | |
826 | map->write = config->write; | |
827 | ||
828 | reg_endian = REGMAP_ENDIAN_NATIVE; | |
829 | val_endian = REGMAP_ENDIAN_NATIVE; | |
830 | } else if (!bus) { | |
d2a5884a AS |
831 | map->reg_read = config->reg_read; |
832 | map->reg_write = config->reg_write; | |
02d6fdec | 833 | map->reg_update_bits = config->reg_update_bits; |
d2a5884a | 834 | |
3ac17037 BB |
835 | map->defer_caching = false; |
836 | goto skip_format_initialization; | |
837 | } else if (!bus->read || !bus->write) { | |
838 | map->reg_read = _regmap_bus_reg_read; | |
839 | map->reg_write = _regmap_bus_reg_write; | |
80215f13 | 840 | map->reg_update_bits = bus->reg_update_bits; |
3ac17037 | 841 | |
d2a5884a AS |
842 | map->defer_caching = false; |
843 | goto skip_format_initialization; | |
844 | } else { | |
845 | map->reg_read = _regmap_bus_read; | |
77792b11 | 846 | map->reg_update_bits = bus->reg_update_bits; |
d77e7456 MV |
847 | /* Bulk read/write */ |
848 | map->read = bus->read; | |
849 | map->write = bus->write; | |
ad278406 | 850 | |
d77e7456 MV |
851 | reg_endian = regmap_get_reg_endian(bus, config); |
852 | val_endian = regmap_get_val_endian(dev, bus, config); | |
853 | } | |
141eba2e | 854 | |
d939fb9a | 855 | switch (config->reg_bits + map->reg_shift) { |
9aa50750 WS |
856 | case 2: |
857 | switch (config->val_bits) { | |
858 | case 6: | |
859 | map->format.format_write = regmap_format_2_6_write; | |
860 | break; | |
861 | default: | |
8698b936 | 862 | goto err_hwlock; |
9aa50750 WS |
863 | } |
864 | break; | |
865 | ||
b83a313b MB |
866 | case 4: |
867 | switch (config->val_bits) { | |
868 | case 12: | |
869 | map->format.format_write = regmap_format_4_12_write; | |
870 | break; | |
871 | default: | |
8698b936 | 872 | goto err_hwlock; |
b83a313b MB |
873 | } |
874 | break; | |
875 | ||
876 | case 7: | |
877 | switch (config->val_bits) { | |
878 | case 9: | |
879 | map->format.format_write = regmap_format_7_9_write; | |
880 | break; | |
b24412af AM |
881 | case 17: |
882 | map->format.format_write = regmap_format_7_17_write; | |
883 | break; | |
b83a313b | 884 | default: |
8698b936 | 885 | goto err_hwlock; |
b83a313b MB |
886 | } |
887 | break; | |
888 | ||
7e5ec63e LPC |
889 | case 10: |
890 | switch (config->val_bits) { | |
891 | case 14: | |
892 | map->format.format_write = regmap_format_10_14_write; | |
893 | break; | |
894 | default: | |
8698b936 | 895 | goto err_hwlock; |
7e5ec63e LPC |
896 | } |
897 | break; | |
898 | ||
0c2191c3 RR |
899 | case 12: |
900 | switch (config->val_bits) { | |
901 | case 20: | |
902 | map->format.format_write = regmap_format_12_20_write; | |
903 | break; | |
904 | default: | |
905 | goto err_hwlock; | |
906 | } | |
907 | break; | |
908 | ||
b83a313b MB |
909 | case 8: |
910 | map->format.format_reg = regmap_format_8; | |
911 | break; | |
912 | ||
913 | case 16: | |
141eba2e SW |
914 | switch (reg_endian) { |
915 | case REGMAP_ENDIAN_BIG: | |
916 | map->format.format_reg = regmap_format_16_be; | |
917 | break; | |
55562449 TL |
918 | case REGMAP_ENDIAN_LITTLE: |
919 | map->format.format_reg = regmap_format_16_le; | |
920 | break; | |
141eba2e SW |
921 | case REGMAP_ENDIAN_NATIVE: |
922 | map->format.format_reg = regmap_format_16_native; | |
923 | break; | |
924 | default: | |
8698b936 | 925 | goto err_hwlock; |
141eba2e | 926 | } |
b83a313b MB |
927 | break; |
928 | ||
237019e7 | 929 | case 24: |
06000443 AS |
930 | switch (reg_endian) { |
931 | case REGMAP_ENDIAN_BIG: | |
932 | map->format.format_reg = regmap_format_24_be; | |
933 | break; | |
934 | default: | |
8698b936 | 935 | goto err_hwlock; |
06000443 | 936 | } |
237019e7 LPC |
937 | break; |
938 | ||
7d5e525b | 939 | case 32: |
141eba2e SW |
940 | switch (reg_endian) { |
941 | case REGMAP_ENDIAN_BIG: | |
942 | map->format.format_reg = regmap_format_32_be; | |
943 | break; | |
55562449 TL |
944 | case REGMAP_ENDIAN_LITTLE: |
945 | map->format.format_reg = regmap_format_32_le; | |
946 | break; | |
141eba2e SW |
947 | case REGMAP_ENDIAN_NATIVE: |
948 | map->format.format_reg = regmap_format_32_native; | |
949 | break; | |
950 | default: | |
8698b936 | 951 | goto err_hwlock; |
141eba2e | 952 | } |
7d5e525b MB |
953 | break; |
954 | ||
b83a313b | 955 | default: |
8698b936 | 956 | goto err_hwlock; |
b83a313b MB |
957 | } |
958 | ||
8a819ff8 MB |
959 | if (val_endian == REGMAP_ENDIAN_NATIVE) |
960 | map->format.parse_inplace = regmap_parse_inplace_noop; | |
961 | ||
b83a313b MB |
962 | switch (config->val_bits) { |
963 | case 8: | |
964 | map->format.format_val = regmap_format_8; | |
965 | map->format.parse_val = regmap_parse_8; | |
8a819ff8 | 966 | map->format.parse_inplace = regmap_parse_inplace_noop; |
b83a313b MB |
967 | break; |
968 | case 16: | |
141eba2e SW |
969 | switch (val_endian) { |
970 | case REGMAP_ENDIAN_BIG: | |
971 | map->format.format_val = regmap_format_16_be; | |
972 | map->format.parse_val = regmap_parse_16_be; | |
8a819ff8 | 973 | map->format.parse_inplace = regmap_parse_16_be_inplace; |
141eba2e | 974 | break; |
4aa8c069 XL |
975 | case REGMAP_ENDIAN_LITTLE: |
976 | map->format.format_val = regmap_format_16_le; | |
977 | map->format.parse_val = regmap_parse_16_le; | |
978 | map->format.parse_inplace = regmap_parse_16_le_inplace; | |
979 | break; | |
141eba2e SW |
980 | case REGMAP_ENDIAN_NATIVE: |
981 | map->format.format_val = regmap_format_16_native; | |
982 | map->format.parse_val = regmap_parse_16_native; | |
983 | break; | |
984 | default: | |
8698b936 | 985 | goto err_hwlock; |
141eba2e | 986 | } |
b83a313b | 987 | break; |
ea279fc5 | 988 | case 24: |
06000443 AS |
989 | switch (val_endian) { |
990 | case REGMAP_ENDIAN_BIG: | |
991 | map->format.format_val = regmap_format_24_be; | |
992 | map->format.parse_val = regmap_parse_24_be; | |
993 | break; | |
994 | default: | |
8698b936 | 995 | goto err_hwlock; |
06000443 | 996 | } |
ea279fc5 | 997 | break; |
7d5e525b | 998 | case 32: |
141eba2e SW |
999 | switch (val_endian) { |
1000 | case REGMAP_ENDIAN_BIG: | |
1001 | map->format.format_val = regmap_format_32_be; | |
1002 | map->format.parse_val = regmap_parse_32_be; | |
8a819ff8 | 1003 | map->format.parse_inplace = regmap_parse_32_be_inplace; |
141eba2e | 1004 | break; |
4aa8c069 XL |
1005 | case REGMAP_ENDIAN_LITTLE: |
1006 | map->format.format_val = regmap_format_32_le; | |
1007 | map->format.parse_val = regmap_parse_32_le; | |
1008 | map->format.parse_inplace = regmap_parse_32_le_inplace; | |
1009 | break; | |
141eba2e SW |
1010 | case REGMAP_ENDIAN_NATIVE: |
1011 | map->format.format_val = regmap_format_32_native; | |
1012 | map->format.parse_val = regmap_parse_32_native; | |
1013 | break; | |
1014 | default: | |
8698b936 | 1015 | goto err_hwlock; |
141eba2e | 1016 | } |
7d5e525b | 1017 | break; |
b83a313b MB |
1018 | } |
1019 | ||
141eba2e SW |
1020 | if (map->format.format_write) { |
1021 | if ((reg_endian != REGMAP_ENDIAN_BIG) || | |
1022 | (val_endian != REGMAP_ENDIAN_BIG)) | |
8698b936 | 1023 | goto err_hwlock; |
67921a1a | 1024 | map->use_single_write = true; |
141eba2e | 1025 | } |
7a647614 | 1026 | |
b83a313b MB |
1027 | if (!map->format.format_write && |
1028 | !(map->format.format_reg && map->format.format_val)) | |
8698b936 | 1029 | goto err_hwlock; |
b83a313b | 1030 | |
82159ba8 | 1031 | map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); |
b83a313b MB |
1032 | if (map->work_buf == NULL) { |
1033 | ret = -ENOMEM; | |
8698b936 | 1034 | goto err_hwlock; |
b83a313b MB |
1035 | } |
1036 | ||
d2a5884a AS |
1037 | if (map->format.format_write) { |
1038 | map->defer_caching = false; | |
07c320dc | 1039 | map->reg_write = _regmap_bus_formatted_write; |
d2a5884a AS |
1040 | } else if (map->format.format_val) { |
1041 | map->defer_caching = true; | |
07c320dc | 1042 | map->reg_write = _regmap_bus_raw_write; |
d2a5884a AS |
1043 | } |
1044 | ||
1045 | skip_format_initialization: | |
07c320dc | 1046 | |
6863ca62 | 1047 | map->range_tree = RB_ROOT; |
e3549cd0 | 1048 | for (i = 0; i < config->num_ranges; i++) { |
6863ca62 KG |
1049 | const struct regmap_range_cfg *range_cfg = &config->ranges[i]; |
1050 | struct regmap_range_node *new; | |
1051 | ||
1052 | /* Sanity check */ | |
061adc06 MB |
1053 | if (range_cfg->range_max < range_cfg->range_min) { |
1054 | dev_err(map->dev, "Invalid range %d: %d < %d\n", i, | |
1055 | range_cfg->range_max, range_cfg->range_min); | |
6863ca62 | 1056 | goto err_range; |
061adc06 MB |
1057 | } |
1058 | ||
1059 | if (range_cfg->range_max > map->max_register) { | |
1060 | dev_err(map->dev, "Invalid range %d: %d > %d\n", i, | |
1061 | range_cfg->range_max, map->max_register); | |
1062 | goto err_range; | |
1063 | } | |
1064 | ||
1065 | if (range_cfg->selector_reg > map->max_register) { | |
1066 | dev_err(map->dev, | |
1067 | "Invalid range %d: selector out of map\n", i); | |
1068 | goto err_range; | |
1069 | } | |
1070 | ||
1071 | if (range_cfg->window_len == 0) { | |
1072 | dev_err(map->dev, "Invalid range %d: window_len 0\n", | |
1073 | i); | |
1074 | goto err_range; | |
1075 | } | |
6863ca62 KG |
1076 | |
1077 | /* Make sure, that this register range has no selector | |
1078 | or data window within its boundary */ | |
e3549cd0 | 1079 | for (j = 0; j < config->num_ranges; j++) { |
d63aa09f JW |
1080 | unsigned int sel_reg = config->ranges[j].selector_reg; |
1081 | unsigned int win_min = config->ranges[j].window_start; | |
1082 | unsigned int win_max = win_min + | |
1083 | config->ranges[j].window_len - 1; | |
6863ca62 | 1084 | |
f161d220 PZ |
1085 | /* Allow data window inside its own virtual range */ |
1086 | if (j == i) | |
1087 | continue; | |
1088 | ||
6863ca62 KG |
1089 | if (range_cfg->range_min <= sel_reg && |
1090 | sel_reg <= range_cfg->range_max) { | |
061adc06 MB |
1091 | dev_err(map->dev, |
1092 | "Range %d: selector for %d in window\n", | |
1093 | i, j); | |
6863ca62 KG |
1094 | goto err_range; |
1095 | } | |
1096 | ||
1097 | if (!(win_max < range_cfg->range_min || | |
1098 | win_min > range_cfg->range_max)) { | |
061adc06 MB |
1099 | dev_err(map->dev, |
1100 | "Range %d: window for %d in window\n", | |
1101 | i, j); | |
6863ca62 KG |
1102 | goto err_range; |
1103 | } | |
1104 | } | |
1105 | ||
1106 | new = kzalloc(sizeof(*new), GFP_KERNEL); | |
1107 | if (new == NULL) { | |
1108 | ret = -ENOMEM; | |
1109 | goto err_range; | |
1110 | } | |
1111 | ||
4b020b3f | 1112 | new->map = map; |
d058bb49 | 1113 | new->name = range_cfg->name; |
6863ca62 KG |
1114 | new->range_min = range_cfg->range_min; |
1115 | new->range_max = range_cfg->range_max; | |
1116 | new->selector_reg = range_cfg->selector_reg; | |
1117 | new->selector_mask = range_cfg->selector_mask; | |
1118 | new->selector_shift = range_cfg->selector_shift; | |
1119 | new->window_start = range_cfg->window_start; | |
1120 | new->window_len = range_cfg->window_len; | |
1121 | ||
53e87f88 | 1122 | if (!_regmap_range_add(map, new)) { |
061adc06 | 1123 | dev_err(map->dev, "Failed to add range %d\n", i); |
6863ca62 KG |
1124 | kfree(new); |
1125 | goto err_range; | |
1126 | } | |
1127 | ||
1128 | if (map->selector_work_buf == NULL) { | |
1129 | map->selector_work_buf = | |
1130 | kzalloc(map->format.buf_size, GFP_KERNEL); | |
1131 | if (map->selector_work_buf == NULL) { | |
1132 | ret = -ENOMEM; | |
1133 | goto err_range; | |
1134 | } | |
1135 | } | |
1136 | } | |
052d2cd1 | 1137 | |
e5e3b8ab | 1138 | ret = regcache_init(map, config); |
0ff3e62f | 1139 | if (ret != 0) |
6863ca62 KG |
1140 | goto err_range; |
1141 | ||
a7a037c8 | 1142 | if (dev) { |
6cfec04b MS |
1143 | ret = regmap_attach_dev(dev, map, config); |
1144 | if (ret != 0) | |
1145 | goto err_regcache; | |
9b947a13 | 1146 | } else { |
94cc89eb | 1147 | regmap_debugfs_init(map); |
a7a037c8 | 1148 | } |
72b39f6f | 1149 | |
b83a313b MB |
1150 | return map; |
1151 | ||
6cfec04b | 1152 | err_regcache: |
72b39f6f | 1153 | regcache_exit(map); |
6863ca62 KG |
1154 | err_range: |
1155 | regmap_range_exit(map); | |
58072cbf | 1156 | kfree(map->work_buf); |
8698b936 | 1157 | err_hwlock: |
a1a68fca | 1158 | if (map->hwlock) |
267f3e4f | 1159 | hwspin_lock_free(map->hwlock); |
8253bb3f BG |
1160 | err_name: |
1161 | kfree_const(map->name); | |
b83a313b MB |
1162 | err_map: |
1163 | kfree(map); | |
1164 | err: | |
1165 | return ERR_PTR(ret); | |
1166 | } | |
3cfe7a74 | 1167 | EXPORT_SYMBOL_GPL(__regmap_init); |
b83a313b | 1168 | |
c0eb4676 MB |
1169 | static void devm_regmap_release(struct device *dev, void *res) |
1170 | { | |
1171 | regmap_exit(*(struct regmap **)res); | |
1172 | } | |
1173 | ||
3cfe7a74 NB |
1174 | struct regmap *__devm_regmap_init(struct device *dev, |
1175 | const struct regmap_bus *bus, | |
1176 | void *bus_context, | |
1177 | const struct regmap_config *config, | |
1178 | struct lock_class_key *lock_key, | |
1179 | const char *lock_name) | |
c0eb4676 MB |
1180 | { |
1181 | struct regmap **ptr, *regmap; | |
1182 | ||
1183 | ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); | |
1184 | if (!ptr) | |
1185 | return ERR_PTR(-ENOMEM); | |
1186 | ||
3cfe7a74 NB |
1187 | regmap = __regmap_init(dev, bus, bus_context, config, |
1188 | lock_key, lock_name); | |
c0eb4676 MB |
1189 | if (!IS_ERR(regmap)) { |
1190 | *ptr = regmap; | |
1191 | devres_add(dev, ptr); | |
1192 | } else { | |
1193 | devres_free(ptr); | |
1194 | } | |
1195 | ||
1196 | return regmap; | |
1197 | } | |
3cfe7a74 | 1198 | EXPORT_SYMBOL_GPL(__devm_regmap_init); |
c0eb4676 | 1199 | |
67252287 SK |
1200 | static void regmap_field_init(struct regmap_field *rm_field, |
1201 | struct regmap *regmap, struct reg_field reg_field) | |
1202 | { | |
67252287 SK |
1203 | rm_field->regmap = regmap; |
1204 | rm_field->reg = reg_field.reg; | |
1205 | rm_field->shift = reg_field.lsb; | |
921cc294 | 1206 | rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb); |
cf39ed2e MR |
1207 | |
1208 | WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n"); | |
1209 | ||
a0102375 KM |
1210 | rm_field->id_size = reg_field.id_size; |
1211 | rm_field->id_offset = reg_field.id_offset; | |
67252287 SK |
1212 | } |
1213 | ||
1214 | /** | |
2cf8e2df | 1215 | * devm_regmap_field_alloc() - Allocate and initialise a register field. |
67252287 SK |
1216 | * |
1217 | * @dev: Device that will be interacted with | |
1218 | * @regmap: regmap bank in which this register field is located. | |
1219 | * @reg_field: Register field with in the bank. | |
1220 | * | |
1221 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1222 | * to a struct regmap_field. The regmap_field will be automatically freed | |
1223 | * by the device management code. | |
1224 | */ | |
1225 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
1226 | struct regmap *regmap, struct reg_field reg_field) | |
1227 | { | |
1228 | struct regmap_field *rm_field = devm_kzalloc(dev, | |
1229 | sizeof(*rm_field), GFP_KERNEL); | |
1230 | if (!rm_field) | |
1231 | return ERR_PTR(-ENOMEM); | |
1232 | ||
1233 | regmap_field_init(rm_field, regmap, reg_field); | |
1234 | ||
1235 | return rm_field; | |
1236 | ||
1237 | } | |
1238 | EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); | |
1239 | ||
ea470b82 SK |
1240 | |
1241 | /** | |
1242 | * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field. | |
1243 | * | |
1244 | * @regmap: regmap bank in which this register field is located. | |
1245 | * @rm_field: regmap register fields within the bank. | |
1246 | * @reg_field: Register fields within the bank. | |
1247 | * @num_fields: Number of register fields. | |
1248 | * | |
1249 | * The return value will be an -ENOMEM on error or zero for success. | |
1250 | * Newly allocated regmap_fields should be freed by calling | |
1251 | * regmap_field_bulk_free() | |
1252 | */ | |
1253 | int regmap_field_bulk_alloc(struct regmap *regmap, | |
1254 | struct regmap_field **rm_field, | |
29c34975 | 1255 | const struct reg_field *reg_field, |
ea470b82 SK |
1256 | int num_fields) |
1257 | { | |
1258 | struct regmap_field *rf; | |
1259 | int i; | |
1260 | ||
1261 | rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL); | |
1262 | if (!rf) | |
1263 | return -ENOMEM; | |
1264 | ||
1265 | for (i = 0; i < num_fields; i++) { | |
1266 | regmap_field_init(&rf[i], regmap, reg_field[i]); | |
1267 | rm_field[i] = &rf[i]; | |
1268 | } | |
1269 | ||
1270 | return 0; | |
1271 | } | |
1272 | EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc); | |
1273 | ||
1274 | /** | |
1275 | * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register | |
1276 | * fields. | |
1277 | * | |
1278 | * @dev: Device that will be interacted with | |
1279 | * @regmap: regmap bank in which this register field is located. | |
1280 | * @rm_field: regmap register fields within the bank. | |
1281 | * @reg_field: Register fields within the bank. | |
1282 | * @num_fields: Number of register fields. | |
1283 | * | |
1284 | * The return value will be an -ENOMEM on error or zero for success. | |
1285 | * Newly allocated regmap_fields will be automatically freed by the | |
1286 | * device management code. | |
1287 | */ | |
1288 | int devm_regmap_field_bulk_alloc(struct device *dev, | |
1289 | struct regmap *regmap, | |
1290 | struct regmap_field **rm_field, | |
29c34975 | 1291 | const struct reg_field *reg_field, |
ea470b82 SK |
1292 | int num_fields) |
1293 | { | |
1294 | struct regmap_field *rf; | |
1295 | int i; | |
1296 | ||
1297 | rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL); | |
1298 | if (!rf) | |
1299 | return -ENOMEM; | |
1300 | ||
1301 | for (i = 0; i < num_fields; i++) { | |
1302 | regmap_field_init(&rf[i], regmap, reg_field[i]); | |
1303 | rm_field[i] = &rf[i]; | |
1304 | } | |
1305 | ||
1306 | return 0; | |
1307 | } | |
1308 | EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc); | |
1309 | ||
1310 | /** | |
1311 | * regmap_field_bulk_free() - Free register field allocated using | |
1312 | * regmap_field_bulk_alloc. | |
1313 | * | |
1314 | * @field: regmap fields which should be freed. | |
1315 | */ | |
1316 | void regmap_field_bulk_free(struct regmap_field *field) | |
1317 | { | |
1318 | kfree(field); | |
1319 | } | |
1320 | EXPORT_SYMBOL_GPL(regmap_field_bulk_free); | |
1321 | ||
1322 | /** | |
1323 | * devm_regmap_field_bulk_free() - Free a bulk register field allocated using | |
1324 | * devm_regmap_field_bulk_alloc. | |
1325 | * | |
1326 | * @dev: Device that will be interacted with | |
1327 | * @field: regmap field which should be freed. | |
1328 | * | |
1329 | * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually | |
1330 | * drivers need not call this function, as the memory allocated via devm | |
1331 | * will be freed as per device-driver life-cycle. | |
1332 | */ | |
1333 | void devm_regmap_field_bulk_free(struct device *dev, | |
1334 | struct regmap_field *field) | |
1335 | { | |
1336 | devm_kfree(dev, field); | |
1337 | } | |
1338 | EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free); | |
1339 | ||
67252287 | 1340 | /** |
2cf8e2df CK |
1341 | * devm_regmap_field_free() - Free a register field allocated using |
1342 | * devm_regmap_field_alloc. | |
67252287 SK |
1343 | * |
1344 | * @dev: Device that will be interacted with | |
1345 | * @field: regmap field which should be freed. | |
2cf8e2df CK |
1346 | * |
1347 | * Free register field allocated using devm_regmap_field_alloc(). Usually | |
1348 | * drivers need not call this function, as the memory allocated via devm | |
1349 | * will be freed as per device-driver life-cyle. | |
67252287 SK |
1350 | */ |
1351 | void devm_regmap_field_free(struct device *dev, | |
1352 | struct regmap_field *field) | |
1353 | { | |
1354 | devm_kfree(dev, field); | |
1355 | } | |
1356 | EXPORT_SYMBOL_GPL(devm_regmap_field_free); | |
1357 | ||
1358 | /** | |
2cf8e2df | 1359 | * regmap_field_alloc() - Allocate and initialise a register field. |
67252287 SK |
1360 | * |
1361 | * @regmap: regmap bank in which this register field is located. | |
1362 | * @reg_field: Register field with in the bank. | |
1363 | * | |
1364 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1365 | * to a struct regmap_field. The regmap_field should be freed by the | |
1366 | * user once its finished working with it using regmap_field_free(). | |
1367 | */ | |
1368 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
1369 | struct reg_field reg_field) | |
1370 | { | |
1371 | struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); | |
1372 | ||
1373 | if (!rm_field) | |
1374 | return ERR_PTR(-ENOMEM); | |
1375 | ||
1376 | regmap_field_init(rm_field, regmap, reg_field); | |
1377 | ||
1378 | return rm_field; | |
1379 | } | |
1380 | EXPORT_SYMBOL_GPL(regmap_field_alloc); | |
1381 | ||
1382 | /** | |
2cf8e2df CK |
1383 | * regmap_field_free() - Free register field allocated using |
1384 | * regmap_field_alloc. | |
67252287 SK |
1385 | * |
1386 | * @field: regmap field which should be freed. | |
1387 | */ | |
1388 | void regmap_field_free(struct regmap_field *field) | |
1389 | { | |
1390 | kfree(field); | |
1391 | } | |
1392 | EXPORT_SYMBOL_GPL(regmap_field_free); | |
1393 | ||
bf315173 | 1394 | /** |
2cf8e2df | 1395 | * regmap_reinit_cache() - Reinitialise the current register cache |
bf315173 MB |
1396 | * |
1397 | * @map: Register map to operate on. | |
1398 | * @config: New configuration. Only the cache data will be used. | |
1399 | * | |
1400 | * Discard any existing register cache for the map and initialize a | |
1401 | * new cache. This can be used to restore the cache to defaults or to | |
1402 | * update the cache configuration to reflect runtime discovery of the | |
1403 | * hardware. | |
4d879514 DP |
1404 | * |
1405 | * No explicit locking is done here, the user needs to ensure that | |
1406 | * this function will not race with other calls to regmap. | |
bf315173 MB |
1407 | */ |
1408 | int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) | |
1409 | { | |
94cc89eb CK |
1410 | int ret; |
1411 | ||
bf315173 | 1412 | regcache_exit(map); |
a24f64a6 | 1413 | regmap_debugfs_exit(map); |
bf315173 MB |
1414 | |
1415 | map->max_register = config->max_register; | |
0ec74ad3 | 1416 | map->max_register_is_set = map->max_register ?: config->max_register_is_0; |
bf315173 MB |
1417 | map->writeable_reg = config->writeable_reg; |
1418 | map->readable_reg = config->readable_reg; | |
1419 | map->volatile_reg = config->volatile_reg; | |
1420 | map->precious_reg = config->precious_reg; | |
cdf6b11d | 1421 | map->writeable_noinc_reg = config->writeable_noinc_reg; |
74fe7b55 | 1422 | map->readable_noinc_reg = config->readable_noinc_reg; |
bf315173 MB |
1423 | map->cache_type = config->cache_type; |
1424 | ||
94cc89eb CK |
1425 | ret = regmap_set_name(map, config); |
1426 | if (ret) | |
1427 | return ret; | |
1428 | ||
1429 | regmap_debugfs_init(map); | |
a24f64a6 | 1430 | |
421e8d2d MB |
1431 | map->cache_bypass = false; |
1432 | map->cache_only = false; | |
1433 | ||
4d879514 | 1434 | return regcache_init(map, config); |
bf315173 | 1435 | } |
752a6a5f | 1436 | EXPORT_SYMBOL_GPL(regmap_reinit_cache); |
bf315173 | 1437 | |
b83a313b | 1438 | /** |
2cf8e2df CK |
1439 | * regmap_exit() - Free a previously allocated register map |
1440 | * | |
1441 | * @map: Register map to operate on. | |
b83a313b MB |
1442 | */ |
1443 | void regmap_exit(struct regmap *map) | |
1444 | { | |
7e09a979 MB |
1445 | struct regmap_async *async; |
1446 | ||
5d1729e7 | 1447 | regcache_exit(map); |
31244e39 | 1448 | regmap_debugfs_exit(map); |
6863ca62 | 1449 | regmap_range_exit(map); |
d2a5884a | 1450 | if (map->bus && map->bus->free_context) |
0135bbcc | 1451 | map->bus->free_context(map->bus_context); |
b83a313b | 1452 | kfree(map->work_buf); |
7e09a979 MB |
1453 | while (!list_empty(&map->async_free)) { |
1454 | async = list_first_entry_or_null(&map->async_free, | |
1455 | struct regmap_async, | |
1456 | list); | |
1457 | list_del(&async->list); | |
1458 | kfree(async->work_buf); | |
1459 | kfree(async); | |
1460 | } | |
a1a68fca | 1461 | if (map->hwlock) |
e8419c40 | 1462 | hwspin_lock_free(map->hwlock); |
f74d63b8 BG |
1463 | if (map->lock == regmap_lock_mutex) |
1464 | mutex_destroy(&map->mutex); | |
8253bb3f | 1465 | kfree_const(map->name); |
95b2c3ec | 1466 | kfree(map->patch); |
ea030ca6 LT |
1467 | if (map->bus && map->bus->free_on_exit) |
1468 | kfree(map->bus); | |
b83a313b MB |
1469 | kfree(map); |
1470 | } | |
1471 | EXPORT_SYMBOL_GPL(regmap_exit); | |
1472 | ||
72b39f6f MB |
1473 | static int dev_get_regmap_match(struct device *dev, void *res, void *data) |
1474 | { | |
1475 | struct regmap **r = res; | |
1476 | if (!r || !*r) { | |
1477 | WARN_ON(!r || !*r); | |
1478 | return 0; | |
1479 | } | |
1480 | ||
1481 | /* If the user didn't specify a name match any */ | |
1482 | if (data) | |
c6df8433 | 1483 | return (*r)->name && !strcmp((*r)->name, data); |
72b39f6f MB |
1484 | else |
1485 | return 1; | |
1486 | } | |
1487 | ||
1488 | /** | |
2cf8e2df | 1489 | * dev_get_regmap() - Obtain the regmap (if any) for a device |
72b39f6f MB |
1490 | * |
1491 | * @dev: Device to retrieve the map for | |
1492 | * @name: Optional name for the register map, usually NULL. | |
1493 | * | |
1494 | * Returns the regmap for the device if one is present, or NULL. If | |
1495 | * name is specified then it must match the name specified when | |
1496 | * registering the device, if it is NULL then the first regmap found | |
1497 | * will be used. Devices with multiple register maps are very rare, | |
1498 | * generic code should normally not need to specify a name. | |
1499 | */ | |
1500 | struct regmap *dev_get_regmap(struct device *dev, const char *name) | |
1501 | { | |
1502 | struct regmap **r = devres_find(dev, dev_get_regmap_release, | |
1503 | dev_get_regmap_match, (void *)name); | |
1504 | ||
1505 | if (!r) | |
1506 | return NULL; | |
1507 | return *r; | |
1508 | } | |
1509 | EXPORT_SYMBOL_GPL(dev_get_regmap); | |
1510 | ||
8d7d3972 | 1511 | /** |
2cf8e2df | 1512 | * regmap_get_device() - Obtain the device from a regmap |
8d7d3972 TT |
1513 | * |
1514 | * @map: Register map to operate on. | |
1515 | * | |
1516 | * Returns the underlying device that the regmap has been created for. | |
1517 | */ | |
1518 | struct device *regmap_get_device(struct regmap *map) | |
1519 | { | |
1520 | return map->dev; | |
1521 | } | |
fa2fbe4a | 1522 | EXPORT_SYMBOL_GPL(regmap_get_device); |
8d7d3972 | 1523 | |
6863ca62 | 1524 | static int _regmap_select_page(struct regmap *map, unsigned int *reg, |
98bc7dfd | 1525 | struct regmap_range_node *range, |
6863ca62 KG |
1526 | unsigned int val_num) |
1527 | { | |
6863ca62 KG |
1528 | void *orig_work_buf; |
1529 | unsigned int win_offset; | |
1530 | unsigned int win_page; | |
1531 | bool page_chg; | |
1532 | int ret; | |
1533 | ||
98bc7dfd MB |
1534 | win_offset = (*reg - range->range_min) % range->window_len; |
1535 | win_page = (*reg - range->range_min) / range->window_len; | |
6863ca62 | 1536 | |
98bc7dfd MB |
1537 | if (val_num > 1) { |
1538 | /* Bulk write shouldn't cross range boundary */ | |
1539 | if (*reg + val_num - 1 > range->range_max) | |
1540 | return -EINVAL; | |
6863ca62 | 1541 | |
98bc7dfd MB |
1542 | /* ... or single page boundary */ |
1543 | if (val_num > range->window_len - win_offset) | |
1544 | return -EINVAL; | |
1545 | } | |
6863ca62 | 1546 | |
98bc7dfd MB |
1547 | /* It is possible to have selector register inside data window. |
1548 | In that case, selector register is located on every page and | |
1549 | it needs no page switching, when accessed alone. */ | |
1550 | if (val_num > 1 || | |
1551 | range->window_start + win_offset != range->selector_reg) { | |
1552 | /* Use separate work_buf during page switching */ | |
1553 | orig_work_buf = map->work_buf; | |
1554 | map->work_buf = map->selector_work_buf; | |
6863ca62 | 1555 | |
98bc7dfd MB |
1556 | ret = _regmap_update_bits(map, range->selector_reg, |
1557 | range->selector_mask, | |
1558 | win_page << range->selector_shift, | |
7ff0589c | 1559 | &page_chg, false); |
632a5b01 | 1560 | |
98bc7dfd | 1561 | map->work_buf = orig_work_buf; |
6863ca62 | 1562 | |
0ff3e62f | 1563 | if (ret != 0) |
98bc7dfd | 1564 | return ret; |
6863ca62 KG |
1565 | } |
1566 | ||
98bc7dfd MB |
1567 | *reg = range->window_start + win_offset; |
1568 | ||
6863ca62 KG |
1569 | return 0; |
1570 | } | |
1571 | ||
f50e38c9 TL |
1572 | static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes, |
1573 | unsigned long mask) | |
1574 | { | |
1575 | u8 *buf; | |
1576 | int i; | |
1577 | ||
1578 | if (!mask || !map->work_buf) | |
1579 | return; | |
1580 | ||
1581 | buf = map->work_buf; | |
1582 | ||
1583 | for (i = 0; i < max_bytes; i++) | |
1584 | buf[i] |= (mask >> (8 * i)) & 0xff; | |
1585 | } | |
1586 | ||
3f58f6dc MC |
1587 | static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg) |
1588 | { | |
1589 | reg += map->reg_base; | |
4a670ac3 MC |
1590 | |
1591 | if (map->format.reg_shift > 0) | |
1592 | reg >>= map->format.reg_shift; | |
1593 | else if (map->format.reg_shift < 0) | |
1594 | reg <<= -(map->format.reg_shift); | |
1595 | ||
1596 | return reg; | |
3f58f6dc MC |
1597 | } |
1598 | ||
7ef2c6b8 | 1599 | static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, |
05669b63 | 1600 | const void *val, size_t val_len, bool noinc) |
b83a313b | 1601 | { |
98bc7dfd | 1602 | struct regmap_range_node *range; |
0d509f2b | 1603 | unsigned long flags; |
0d509f2b MB |
1604 | void *work_val = map->work_buf + map->format.reg_bytes + |
1605 | map->format.pad_bytes; | |
b83a313b MB |
1606 | void *buf; |
1607 | int ret = -ENOTSUPP; | |
1608 | size_t len; | |
73304781 MB |
1609 | int i; |
1610 | ||
2e31aab0 BW |
1611 | /* Check for unwritable or noinc registers in range |
1612 | * before we start | |
1613 | */ | |
1614 | if (!regmap_writeable_noinc(map, reg)) { | |
1615 | for (i = 0; i < val_len / map->format.val_bytes; i++) { | |
1616 | unsigned int element = | |
1617 | reg + regmap_get_offset(map, i); | |
1618 | if (!regmap_writeable(map, element) || | |
1619 | regmap_writeable_noinc(map, element)) | |
1620 | return -EINVAL; | |
1621 | } | |
1622 | } | |
b83a313b | 1623 | |
c9157198 | 1624 | if (!map->cache_bypass && map->format.parse_val) { |
984a4afd | 1625 | unsigned int ival, offset; |
c9157198 | 1626 | int val_bytes = map->format.val_bytes; |
984a4afd BW |
1627 | |
1628 | /* Cache the last written value for noinc writes */ | |
1629 | i = noinc ? val_len - val_bytes : 0; | |
1630 | for (; i < val_len; i += val_bytes) { | |
1631 | ival = map->format.parse_val(val + i); | |
1632 | offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes); | |
1633 | ret = regcache_write(map, reg + offset, ival); | |
c9157198 LD |
1634 | if (ret) { |
1635 | dev_err(map->dev, | |
6d04b8ac | 1636 | "Error in caching of register: %x ret: %d\n", |
984a4afd | 1637 | reg + offset, ret); |
c9157198 LD |
1638 | return ret; |
1639 | } | |
1640 | } | |
1641 | if (map->cache_only) { | |
1642 | map->cache_dirty = true; | |
1643 | return 0; | |
1644 | } | |
1645 | } | |
1646 | ||
98bc7dfd MB |
1647 | range = _regmap_range_lookup(map, reg); |
1648 | if (range) { | |
8a2ceac6 MB |
1649 | int val_num = val_len / map->format.val_bytes; |
1650 | int win_offset = (reg - range->range_min) % range->window_len; | |
1651 | int win_residue = range->window_len - win_offset; | |
1652 | ||
1653 | /* If the write goes beyond the end of the window split it */ | |
1654 | while (val_num > win_residue) { | |
1a61cfe3 | 1655 | dev_dbg(map->dev, "Writing window %d/%zu\n", |
8a2ceac6 | 1656 | win_residue, val_len / map->format.val_bytes); |
7ef2c6b8 CK |
1657 | ret = _regmap_raw_write_impl(map, reg, val, |
1658 | win_residue * | |
05669b63 | 1659 | map->format.val_bytes, noinc); |
8a2ceac6 MB |
1660 | if (ret != 0) |
1661 | return ret; | |
1662 | ||
1663 | reg += win_residue; | |
1664 | val_num -= win_residue; | |
1665 | val += win_residue * map->format.val_bytes; | |
1666 | val_len -= win_residue * map->format.val_bytes; | |
1667 | ||
1668 | win_offset = (reg - range->range_min) % | |
1669 | range->window_len; | |
1670 | win_residue = range->window_len - win_offset; | |
1671 | } | |
1672 | ||
05669b63 | 1673 | ret = _regmap_select_page(map, ®, range, noinc ? 1 : val_num); |
0ff3e62f | 1674 | if (ret != 0) |
98bc7dfd MB |
1675 | return ret; |
1676 | } | |
6863ca62 | 1677 | |
3f58f6dc | 1678 | reg = regmap_reg_addr(map, reg); |
d939fb9a | 1679 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
f50e38c9 TL |
1680 | regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, |
1681 | map->write_flag_mask); | |
6f306441 | 1682 | |
651e013e MB |
1683 | /* |
1684 | * Essentially all I/O mechanisms will be faster with a single | |
1685 | * buffer to write. Since register syncs often generate raw | |
1686 | * writes of single registers optimise that case. | |
1687 | */ | |
1688 | if (val != work_val && val_len == map->format.val_bytes) { | |
1689 | memcpy(work_val, val, map->format.val_bytes); | |
1690 | val = work_val; | |
1691 | } | |
1692 | ||
d77e7456 | 1693 | if (map->async && map->bus && map->bus->async_write) { |
7e09a979 | 1694 | struct regmap_async *async; |
0d509f2b | 1695 | |
c6b570d9 | 1696 | trace_regmap_async_write_start(map, reg, val_len); |
fe7d4ccd | 1697 | |
7e09a979 MB |
1698 | spin_lock_irqsave(&map->async_lock, flags); |
1699 | async = list_first_entry_or_null(&map->async_free, | |
1700 | struct regmap_async, | |
1701 | list); | |
1702 | if (async) | |
1703 | list_del(&async->list); | |
1704 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1705 | ||
1706 | if (!async) { | |
1707 | async = map->bus->async_alloc(); | |
1708 | if (!async) | |
1709 | return -ENOMEM; | |
1710 | ||
1711 | async->work_buf = kzalloc(map->format.buf_size, | |
1712 | GFP_KERNEL | GFP_DMA); | |
1713 | if (!async->work_buf) { | |
1714 | kfree(async); | |
1715 | return -ENOMEM; | |
1716 | } | |
0d509f2b MB |
1717 | } |
1718 | ||
0d509f2b MB |
1719 | async->map = map; |
1720 | ||
1721 | /* If the caller supplied the value we can use it safely. */ | |
1722 | memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + | |
1723 | map->format.reg_bytes + map->format.val_bytes); | |
0d509f2b MB |
1724 | |
1725 | spin_lock_irqsave(&map->async_lock, flags); | |
1726 | list_add_tail(&async->list, &map->async_list); | |
1727 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1728 | ||
04c50ccf MB |
1729 | if (val != work_val) |
1730 | ret = map->bus->async_write(map->bus_context, | |
1731 | async->work_buf, | |
1732 | map->format.reg_bytes + | |
1733 | map->format.pad_bytes, | |
1734 | val, val_len, async); | |
1735 | else | |
1736 | ret = map->bus->async_write(map->bus_context, | |
1737 | async->work_buf, | |
1738 | map->format.reg_bytes + | |
1739 | map->format.pad_bytes + | |
1740 | val_len, NULL, 0, async); | |
0d509f2b MB |
1741 | |
1742 | if (ret != 0) { | |
1743 | dev_err(map->dev, "Failed to schedule write: %d\n", | |
1744 | ret); | |
1745 | ||
1746 | spin_lock_irqsave(&map->async_lock, flags); | |
7e09a979 | 1747 | list_move(&async->list, &map->async_free); |
0d509f2b | 1748 | spin_unlock_irqrestore(&map->async_lock, flags); |
0d509f2b | 1749 | } |
f951b658 MB |
1750 | |
1751 | return ret; | |
0d509f2b MB |
1752 | } |
1753 | ||
c6b570d9 | 1754 | trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes); |
fb2736bb | 1755 | |
2547e201 MB |
1756 | /* If we're doing a single register write we can probably just |
1757 | * send the work_buf directly, otherwise try to do a gather | |
1758 | * write. | |
1759 | */ | |
0d509f2b | 1760 | if (val == work_val) |
d77e7456 MV |
1761 | ret = map->write(map->bus_context, map->work_buf, |
1762 | map->format.reg_bytes + | |
1763 | map->format.pad_bytes + | |
1764 | val_len); | |
5c422f0b | 1765 | else if (map->bus && map->bus->gather_write) |
0135bbcc | 1766 | ret = map->bus->gather_write(map->bus_context, map->work_buf, |
82159ba8 MB |
1767 | map->format.reg_bytes + |
1768 | map->format.pad_bytes, | |
b83a313b | 1769 | val, val_len); |
db057679 SK |
1770 | else |
1771 | ret = -ENOTSUPP; | |
b83a313b | 1772 | |
2547e201 | 1773 | /* If that didn't work fall back on linearising by hand. */ |
b83a313b | 1774 | if (ret == -ENOTSUPP) { |
82159ba8 MB |
1775 | len = map->format.reg_bytes + map->format.pad_bytes + val_len; |
1776 | buf = kzalloc(len, GFP_KERNEL); | |
b83a313b MB |
1777 | if (!buf) |
1778 | return -ENOMEM; | |
1779 | ||
1780 | memcpy(buf, map->work_buf, map->format.reg_bytes); | |
82159ba8 MB |
1781 | memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, |
1782 | val, val_len); | |
d77e7456 | 1783 | ret = map->write(map->bus_context, buf, len); |
b83a313b MB |
1784 | |
1785 | kfree(buf); | |
815806e3 | 1786 | } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) { |
f0aa1ce6 NY |
1787 | /* regcache_drop_region() takes lock that we already have, |
1788 | * thus call map->cache_ops->drop() directly | |
1789 | */ | |
1790 | if (map->cache_ops && map->cache_ops->drop) | |
1791 | map->cache_ops->drop(map, reg, reg + 1); | |
b83a313b MB |
1792 | } |
1793 | ||
c6b570d9 | 1794 | trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes); |
fb2736bb | 1795 | |
b83a313b MB |
1796 | return ret; |
1797 | } | |
1798 | ||
221ad7f2 MB |
1799 | /** |
1800 | * regmap_can_raw_write - Test if regmap_raw_write() is supported | |
1801 | * | |
1802 | * @map: Map to check. | |
1803 | */ | |
1804 | bool regmap_can_raw_write(struct regmap *map) | |
1805 | { | |
2a166929 | 1806 | return map->write && map->format.format_val && map->format.format_reg; |
221ad7f2 MB |
1807 | } |
1808 | EXPORT_SYMBOL_GPL(regmap_can_raw_write); | |
1809 | ||
f50c9eb4 MP |
1810 | /** |
1811 | * regmap_get_raw_read_max - Get the maximum size we can read | |
1812 | * | |
1813 | * @map: Map to check. | |
1814 | */ | |
1815 | size_t regmap_get_raw_read_max(struct regmap *map) | |
1816 | { | |
1817 | return map->max_raw_read; | |
1818 | } | |
1819 | EXPORT_SYMBOL_GPL(regmap_get_raw_read_max); | |
1820 | ||
1821 | /** | |
1822 | * regmap_get_raw_write_max - Get the maximum size we can read | |
1823 | * | |
1824 | * @map: Map to check. | |
1825 | */ | |
1826 | size_t regmap_get_raw_write_max(struct regmap *map) | |
1827 | { | |
1828 | return map->max_raw_write; | |
1829 | } | |
1830 | EXPORT_SYMBOL_GPL(regmap_get_raw_write_max); | |
1831 | ||
07c320dc AS |
1832 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
1833 | unsigned int val) | |
1834 | { | |
1835 | int ret; | |
1836 | struct regmap_range_node *range; | |
1837 | struct regmap *map = context; | |
1838 | ||
d77e7456 | 1839 | WARN_ON(!map->format.format_write); |
07c320dc AS |
1840 | |
1841 | range = _regmap_range_lookup(map, reg); | |
1842 | if (range) { | |
1843 | ret = _regmap_select_page(map, ®, range, 1); | |
1844 | if (ret != 0) | |
1845 | return ret; | |
1846 | } | |
1847 | ||
3f58f6dc | 1848 | reg = regmap_reg_addr(map, reg); |
07c320dc AS |
1849 | map->format.format_write(map, reg, val); |
1850 | ||
c6b570d9 | 1851 | trace_regmap_hw_write_start(map, reg, 1); |
07c320dc | 1852 | |
d77e7456 | 1853 | ret = map->write(map->bus_context, map->work_buf, map->format.buf_size); |
07c320dc | 1854 | |
c6b570d9 | 1855 | trace_regmap_hw_write_done(map, reg, 1); |
07c320dc AS |
1856 | |
1857 | return ret; | |
1858 | } | |
1859 | ||
3ac17037 BB |
1860 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
1861 | unsigned int val) | |
1862 | { | |
1863 | struct regmap *map = context; | |
f18ee501 MB |
1864 | struct regmap_range_node *range; |
1865 | int ret; | |
1866 | ||
1867 | range = _regmap_range_lookup(map, reg); | |
1868 | if (range) { | |
1869 | ret = _regmap_select_page(map, ®, range, 1); | |
1870 | if (ret != 0) | |
1871 | return ret; | |
1872 | } | |
3ac17037 | 1873 | |
3f58f6dc | 1874 | reg = regmap_reg_addr(map, reg); |
3ac17037 BB |
1875 | return map->bus->reg_write(map->bus_context, reg, val); |
1876 | } | |
1877 | ||
07c320dc AS |
1878 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
1879 | unsigned int val) | |
1880 | { | |
1881 | struct regmap *map = context; | |
1882 | ||
d77e7456 | 1883 | WARN_ON(!map->format.format_val); |
07c320dc AS |
1884 | |
1885 | map->format.format_val(map->work_buf + map->format.reg_bytes | |
1886 | + map->format.pad_bytes, val, 0); | |
7ef2c6b8 CK |
1887 | return _regmap_raw_write_impl(map, reg, |
1888 | map->work_buf + | |
1889 | map->format.reg_bytes + | |
1890 | map->format.pad_bytes, | |
05669b63 DB |
1891 | map->format.val_bytes, |
1892 | false); | |
07c320dc AS |
1893 | } |
1894 | ||
d2a5884a AS |
1895 | static inline void *_regmap_map_get_context(struct regmap *map) |
1896 | { | |
d77e7456 | 1897 | return (map->bus || (!map->bus && map->read)) ? map : map->bus_context; |
d2a5884a AS |
1898 | } |
1899 | ||
4d2dc095 DP |
1900 | int _regmap_write(struct regmap *map, unsigned int reg, |
1901 | unsigned int val) | |
b83a313b | 1902 | { |
fb2736bb | 1903 | int ret; |
d2a5884a | 1904 | void *context = _regmap_map_get_context(map); |
b83a313b | 1905 | |
515f2261 IN |
1906 | if (!regmap_writeable(map, reg)) |
1907 | return -EIO; | |
1908 | ||
d2a5884a | 1909 | if (!map->cache_bypass && !map->defer_caching) { |
5d1729e7 DP |
1910 | ret = regcache_write(map, reg, val); |
1911 | if (ret != 0) | |
1912 | return ret; | |
8ae0d7e8 MB |
1913 | if (map->cache_only) { |
1914 | map->cache_dirty = true; | |
5d1729e7 | 1915 | return 0; |
8ae0d7e8 | 1916 | } |
5d1729e7 DP |
1917 | } |
1918 | ||
f7d01359 LT |
1919 | ret = map->reg_write(context, reg, val); |
1920 | if (ret == 0) { | |
1921 | if (regmap_should_log(map)) | |
1922 | dev_info(map->dev, "%x <= %x\n", reg, val); | |
1044c180 | 1923 | |
f7d01359 LT |
1924 | trace_regmap_reg_write(map, reg, val); |
1925 | } | |
fb2736bb | 1926 | |
f7d01359 | 1927 | return ret; |
b83a313b MB |
1928 | } |
1929 | ||
1930 | /** | |
2cf8e2df | 1931 | * regmap_write() - Write a value to a single register |
b83a313b MB |
1932 | * |
1933 | * @map: Register map to write to | |
1934 | * @reg: Register to write to | |
1935 | * @val: Value to be written | |
1936 | * | |
1937 | * A value of zero will be returned on success, a negative errno will | |
1938 | * be returned in error cases. | |
1939 | */ | |
1940 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) | |
1941 | { | |
1942 | int ret; | |
1943 | ||
fcac0233 | 1944 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f SW |
1945 | return -EINVAL; |
1946 | ||
0d4529c5 | 1947 | map->lock(map->lock_arg); |
b83a313b MB |
1948 | |
1949 | ret = _regmap_write(map, reg, val); | |
1950 | ||
0d4529c5 | 1951 | map->unlock(map->lock_arg); |
b83a313b MB |
1952 | |
1953 | return ret; | |
1954 | } | |
1955 | EXPORT_SYMBOL_GPL(regmap_write); | |
1956 | ||
915f441b | 1957 | /** |
2cf8e2df | 1958 | * regmap_write_async() - Write a value to a single register asynchronously |
915f441b MB |
1959 | * |
1960 | * @map: Register map to write to | |
1961 | * @reg: Register to write to | |
1962 | * @val: Value to be written | |
1963 | * | |
1964 | * A value of zero will be returned on success, a negative errno will | |
1965 | * be returned in error cases. | |
1966 | */ | |
1967 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) | |
1968 | { | |
1969 | int ret; | |
1970 | ||
fcac0233 | 1971 | if (!IS_ALIGNED(reg, map->reg_stride)) |
915f441b MB |
1972 | return -EINVAL; |
1973 | ||
1974 | map->lock(map->lock_arg); | |
1975 | ||
1976 | map->async = true; | |
1977 | ||
1978 | ret = _regmap_write(map, reg, val); | |
1979 | ||
1980 | map->async = false; | |
1981 | ||
1982 | map->unlock(map->lock_arg); | |
1983 | ||
1984 | return ret; | |
1985 | } | |
1986 | EXPORT_SYMBOL_GPL(regmap_write_async); | |
1987 | ||
7ef2c6b8 | 1988 | int _regmap_raw_write(struct regmap *map, unsigned int reg, |
05669b63 | 1989 | const void *val, size_t val_len, bool noinc) |
7ef2c6b8 CK |
1990 | { |
1991 | size_t val_bytes = map->format.val_bytes; | |
1992 | size_t val_count = val_len / val_bytes; | |
364e378b CK |
1993 | size_t chunk_count, chunk_bytes; |
1994 | size_t chunk_regs = val_count; | |
7ef2c6b8 CK |
1995 | int ret, i; |
1996 | ||
1997 | if (!val_count) | |
1998 | return -EINVAL; | |
1999 | ||
364e378b CK |
2000 | if (map->use_single_write) |
2001 | chunk_regs = 1; | |
bc647348 MB |
2002 | else if (map->max_raw_write && val_len > map->max_raw_write) |
2003 | chunk_regs = map->max_raw_write / val_bytes; | |
364e378b CK |
2004 | |
2005 | chunk_count = val_count / chunk_regs; | |
2006 | chunk_bytes = chunk_regs * val_bytes; | |
7ef2c6b8 CK |
2007 | |
2008 | /* Write as many bytes as possible with chunk_size */ | |
2009 | for (i = 0; i < chunk_count; i++) { | |
05669b63 | 2010 | ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc); |
7ef2c6b8 CK |
2011 | if (ret) |
2012 | return ret; | |
364e378b CK |
2013 | |
2014 | reg += regmap_get_offset(map, chunk_regs); | |
2015 | val += chunk_bytes; | |
2016 | val_len -= chunk_bytes; | |
7ef2c6b8 CK |
2017 | } |
2018 | ||
2019 | /* Write remaining bytes */ | |
364e378b | 2020 | if (val_len) |
05669b63 | 2021 | ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc); |
7ef2c6b8 CK |
2022 | |
2023 | return ret; | |
2024 | } | |
2025 | ||
b83a313b | 2026 | /** |
2cf8e2df | 2027 | * regmap_raw_write() - Write raw values to one or more registers |
b83a313b MB |
2028 | * |
2029 | * @map: Register map to write to | |
2030 | * @reg: Initial register to write to | |
2031 | * @val: Block of data to be written, laid out for direct transmission to the | |
2032 | * device | |
2033 | * @val_len: Length of data pointed to by val. | |
2034 | * | |
2035 | * This function is intended to be used for things like firmware | |
2036 | * download where a large block of data needs to be transferred to the | |
2037 | * device. No formatting will be done on the data provided. | |
2038 | * | |
2039 | * A value of zero will be returned on success, a negative errno will | |
2040 | * be returned in error cases. | |
2041 | */ | |
2042 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
2043 | const void *val, size_t val_len) | |
2044 | { | |
2045 | int ret; | |
2046 | ||
221ad7f2 | 2047 | if (!regmap_can_raw_write(map)) |
d2a5884a | 2048 | return -EINVAL; |
851960ba SW |
2049 | if (val_len % map->format.val_bytes) |
2050 | return -EINVAL; | |
2051 | ||
0d4529c5 | 2052 | map->lock(map->lock_arg); |
b83a313b | 2053 | |
05669b63 | 2054 | ret = _regmap_raw_write(map, reg, val, val_len, false); |
b83a313b | 2055 | |
0d4529c5 | 2056 | map->unlock(map->lock_arg); |
b83a313b MB |
2057 | |
2058 | return ret; | |
2059 | } | |
2060 | EXPORT_SYMBOL_GPL(regmap_raw_write); | |
2061 | ||
c20cc099 LW |
2062 | static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg, |
2063 | void *val, unsigned int val_len, bool write) | |
2064 | { | |
2065 | size_t val_bytes = map->format.val_bytes; | |
2066 | size_t val_count = val_len / val_bytes; | |
2067 | unsigned int lastval; | |
2068 | u8 *u8p; | |
2069 | u16 *u16p; | |
2070 | u32 *u32p; | |
c20cc099 LW |
2071 | int ret; |
2072 | int i; | |
2073 | ||
2074 | switch (val_bytes) { | |
2075 | case 1: | |
2076 | u8p = val; | |
2077 | if (write) | |
2078 | lastval = (unsigned int)u8p[val_count - 1]; | |
2079 | break; | |
2080 | case 2: | |
2081 | u16p = val; | |
2082 | if (write) | |
2083 | lastval = (unsigned int)u16p[val_count - 1]; | |
2084 | break; | |
2085 | case 4: | |
2086 | u32p = val; | |
2087 | if (write) | |
2088 | lastval = (unsigned int)u32p[val_count - 1]; | |
2089 | break; | |
c20cc099 LW |
2090 | default: |
2091 | return -EINVAL; | |
2092 | } | |
2093 | ||
2094 | /* | |
2095 | * Update the cache with the last value we write, the rest is just | |
2096 | * gone down in the hardware FIFO. We can't cache FIFOs. This makes | |
2097 | * sure a single read from the cache will work. | |
2098 | */ | |
2099 | if (write) { | |
2100 | if (!map->cache_bypass && !map->defer_caching) { | |
2101 | ret = regcache_write(map, reg, lastval); | |
2102 | if (ret != 0) | |
2103 | return ret; | |
2104 | if (map->cache_only) { | |
2105 | map->cache_dirty = true; | |
2106 | return 0; | |
2107 | } | |
2108 | } | |
2109 | ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count); | |
2110 | } else { | |
2111 | ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count); | |
2112 | } | |
2113 | ||
2114 | if (!ret && regmap_should_log(map)) { | |
2115 | dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>"); | |
b7059927 | 2116 | for (i = 0; i < val_count; i++) { |
c20cc099 LW |
2117 | switch (val_bytes) { |
2118 | case 1: | |
2119 | pr_cont("%x", u8p[i]); | |
2120 | break; | |
2121 | case 2: | |
2122 | pr_cont("%x", u16p[i]); | |
2123 | break; | |
2124 | case 4: | |
2125 | pr_cont("%x", u32p[i]); | |
2126 | break; | |
c20cc099 LW |
2127 | default: |
2128 | break; | |
2129 | } | |
b7059927 | 2130 | if (i == (val_count - 1)) |
c20cc099 LW |
2131 | pr_cont("]\n"); |
2132 | else | |
2133 | pr_cont(","); | |
2134 | } | |
2135 | } | |
2136 | ||
2137 | return 0; | |
2138 | } | |
2139 | ||
cdf6b11d | 2140 | /** |
1957b92a | 2141 | * regmap_noinc_write(): Write data to a register without incrementing the |
cdf6b11d BW |
2142 | * register number |
2143 | * | |
2144 | * @map: Register map to write to | |
2145 | * @reg: Register to write to | |
2146 | * @val: Pointer to data buffer | |
2147 | * @val_len: Length of output buffer in bytes. | |
2148 | * | |
2149 | * The regmap API usually assumes that bulk bus write operations will write a | |
2150 | * range of registers. Some devices have certain registers for which a write | |
2151 | * operation can write to an internal FIFO. | |
2152 | * | |
2153 | * The target register must be volatile but registers after it can be | |
2154 | * completely unrelated cacheable registers. | |
2155 | * | |
2156 | * This will attempt multiple writes as required to write val_len bytes. | |
2157 | * | |
2158 | * A value of zero will be returned on success, a negative errno will be | |
2159 | * returned in error cases. | |
2160 | */ | |
2161 | int regmap_noinc_write(struct regmap *map, unsigned int reg, | |
2162 | const void *val, size_t val_len) | |
2163 | { | |
2164 | size_t write_len; | |
2165 | int ret; | |
2166 | ||
c20cc099 LW |
2167 | if (!map->write && !(map->bus && map->bus->reg_noinc_write)) |
2168 | return -EINVAL; | |
cdf6b11d BW |
2169 | if (val_len % map->format.val_bytes) |
2170 | return -EINVAL; | |
2171 | if (!IS_ALIGNED(reg, map->reg_stride)) | |
2172 | return -EINVAL; | |
2173 | if (val_len == 0) | |
2174 | return -EINVAL; | |
2175 | ||
2176 | map->lock(map->lock_arg); | |
2177 | ||
2178 | if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) { | |
2179 | ret = -EINVAL; | |
2180 | goto out_unlock; | |
2181 | } | |
2182 | ||
c20cc099 LW |
2183 | /* |
2184 | * Use the accelerated operation if we can. The val drops the const | |
2185 | * typing in order to facilitate code reuse in regmap_noinc_readwrite(). | |
2186 | */ | |
2187 | if (map->bus->reg_noinc_write) { | |
2188 | ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true); | |
2189 | goto out_unlock; | |
2190 | } | |
2191 | ||
cdf6b11d BW |
2192 | while (val_len) { |
2193 | if (map->max_raw_write && map->max_raw_write < val_len) | |
2194 | write_len = map->max_raw_write; | |
2195 | else | |
2196 | write_len = val_len; | |
05669b63 | 2197 | ret = _regmap_raw_write(map, reg, val, write_len, true); |
cdf6b11d BW |
2198 | if (ret) |
2199 | goto out_unlock; | |
2200 | val = ((u8 *)val) + write_len; | |
2201 | val_len -= write_len; | |
2202 | } | |
2203 | ||
2204 | out_unlock: | |
2205 | map->unlock(map->lock_arg); | |
2206 | return ret; | |
2207 | } | |
2208 | EXPORT_SYMBOL_GPL(regmap_noinc_write); | |
2209 | ||
67252287 | 2210 | /** |
2cf8e2df CK |
2211 | * regmap_field_update_bits_base() - Perform a read/modify/write cycle a |
2212 | * register field. | |
fdf20029 KM |
2213 | * |
2214 | * @field: Register field to write to | |
2215 | * @mask: Bitmask to change | |
2216 | * @val: Value to be written | |
28972eaa KM |
2217 | * @change: Boolean indicating if a write was done |
2218 | * @async: Boolean indicating asynchronously | |
2219 | * @force: Boolean indicating use force update | |
fdf20029 | 2220 | * |
2cf8e2df CK |
2221 | * Perform a read/modify/write cycle on the register field with change, |
2222 | * async, force option. | |
2223 | * | |
fdf20029 KM |
2224 | * A value of zero will be returned on success, a negative errno will |
2225 | * be returned in error cases. | |
2226 | */ | |
28972eaa KM |
2227 | int regmap_field_update_bits_base(struct regmap_field *field, |
2228 | unsigned int mask, unsigned int val, | |
2229 | bool *change, bool async, bool force) | |
fdf20029 KM |
2230 | { |
2231 | mask = (mask << field->shift) & field->mask; | |
2232 | ||
28972eaa KM |
2233 | return regmap_update_bits_base(field->regmap, field->reg, |
2234 | mask, val << field->shift, | |
2235 | change, async, force); | |
e874e6c7 | 2236 | } |
28972eaa | 2237 | EXPORT_SYMBOL_GPL(regmap_field_update_bits_base); |
e874e6c7 | 2238 | |
f67be8b7 LC |
2239 | /** |
2240 | * regmap_field_test_bits() - Check if all specified bits are set in a | |
2241 | * register field. | |
2242 | * | |
2243 | * @field: Register field to operate on | |
2244 | * @bits: Bits to test | |
2245 | * | |
2246 | * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the | |
2247 | * tested bits is not set and 1 if all tested bits are set. | |
2248 | */ | |
2249 | int regmap_field_test_bits(struct regmap_field *field, unsigned int bits) | |
2250 | { | |
2251 | unsigned int val, ret; | |
2252 | ||
2253 | ret = regmap_field_read(field, &val); | |
2254 | if (ret) | |
2255 | return ret; | |
2256 | ||
2257 | return (val & bits) == bits; | |
2258 | } | |
2259 | EXPORT_SYMBOL_GPL(regmap_field_test_bits); | |
2260 | ||
a0102375 | 2261 | /** |
2cf8e2df CK |
2262 | * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a |
2263 | * register field with port ID | |
a0102375 KM |
2264 | * |
2265 | * @field: Register field to write to | |
2266 | * @id: port ID | |
2267 | * @mask: Bitmask to change | |
2268 | * @val: Value to be written | |
e126edec KM |
2269 | * @change: Boolean indicating if a write was done |
2270 | * @async: Boolean indicating asynchronously | |
2271 | * @force: Boolean indicating use force update | |
a0102375 KM |
2272 | * |
2273 | * A value of zero will be returned on success, a negative errno will | |
2274 | * be returned in error cases. | |
2275 | */ | |
9fb9b771 | 2276 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
e126edec KM |
2277 | unsigned int mask, unsigned int val, |
2278 | bool *change, bool async, bool force) | |
a0102375 KM |
2279 | { |
2280 | if (id >= field->id_size) | |
2281 | return -EINVAL; | |
2282 | ||
2283 | mask = (mask << field->shift) & field->mask; | |
2284 | ||
e126edec KM |
2285 | return regmap_update_bits_base(field->regmap, |
2286 | field->reg + (field->id_offset * id), | |
2287 | mask, val << field->shift, | |
2288 | change, async, force); | |
a0102375 | 2289 | } |
e126edec | 2290 | EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base); |
a0102375 | 2291 | |
2cf8e2df CK |
2292 | /** |
2293 | * regmap_bulk_write() - Write multiple registers to the device | |
8eaeb219 LD |
2294 | * |
2295 | * @map: Register map to write to | |
2296 | * @reg: First register to be write from | |
2297 | * @val: Block of data to be written, in native register size for device | |
2298 | * @val_count: Number of registers to write | |
2299 | * | |
2300 | * This function is intended to be used for writing a large block of | |
31b35e9e | 2301 | * data to the device either in single transfer or multiple transfer. |
8eaeb219 LD |
2302 | * |
2303 | * A value of zero will be returned on success, a negative errno will | |
2304 | * be returned in error cases. | |
2305 | */ | |
2306 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, | |
2307 | size_t val_count) | |
2308 | { | |
2309 | int ret = 0, i; | |
2310 | size_t val_bytes = map->format.val_bytes; | |
8eaeb219 | 2311 | |
fcac0233 | 2312 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f | 2313 | return -EINVAL; |
8eaeb219 | 2314 | |
f4298360 | 2315 | /* |
fb44f3ce CK |
2316 | * Some devices don't support bulk write, for them we have a series of |
2317 | * single write operations. | |
f4298360 | 2318 | */ |
2a166929 | 2319 | if (!map->write || !map->format.parse_inplace) { |
4999e962 | 2320 | map->lock(map->lock_arg); |
f4298360 SB |
2321 | for (i = 0; i < val_count; i++) { |
2322 | unsigned int ival; | |
2323 | ||
2324 | switch (val_bytes) { | |
2325 | case 1: | |
2326 | ival = *(u8 *)(val + (i * val_bytes)); | |
2327 | break; | |
2328 | case 2: | |
2329 | ival = *(u16 *)(val + (i * val_bytes)); | |
2330 | break; | |
2331 | case 4: | |
2332 | ival = *(u32 *)(val + (i * val_bytes)); | |
2333 | break; | |
f4298360 SB |
2334 | default: |
2335 | ret = -EINVAL; | |
2336 | goto out; | |
2337 | } | |
8eaeb219 | 2338 | |
ca747be2 XL |
2339 | ret = _regmap_write(map, |
2340 | reg + regmap_get_offset(map, i), | |
2341 | ival); | |
f4298360 SB |
2342 | if (ret != 0) |
2343 | goto out; | |
2344 | } | |
4999e962 TI |
2345 | out: |
2346 | map->unlock(map->lock_arg); | |
8eaeb219 | 2347 | } else { |
f4298360 SB |
2348 | void *wval; |
2349 | ||
f6841d41 | 2350 | wval = kmemdup_array(val, val_count, val_bytes, map->alloc_flags); |
b4ecfec5 | 2351 | if (!wval) |
4999e962 | 2352 | return -ENOMEM; |
b4ecfec5 | 2353 | |
8eaeb219 | 2354 | for (i = 0; i < val_count * val_bytes; i += val_bytes) |
8a819ff8 | 2355 | map->format.parse_inplace(wval + i); |
f4298360 | 2356 | |
7ef2c6b8 | 2357 | ret = regmap_raw_write(map, reg, wval, val_bytes * val_count); |
8eaeb219 | 2358 | |
8eaeb219 | 2359 | kfree(wval); |
f4298360 | 2360 | } |
026c99b5 DR |
2361 | |
2362 | if (!ret) | |
2363 | trace_regmap_bulk_write(map, reg, val, val_bytes * val_count); | |
2364 | ||
8eaeb219 LD |
2365 | return ret; |
2366 | } | |
2367 | EXPORT_SYMBOL_GPL(regmap_bulk_write); | |
2368 | ||
e894c3f4 OAO |
2369 | /* |
2370 | * _regmap_raw_multi_reg_write() | |
2371 | * | |
2372 | * the (register,newvalue) pairs in regs have not been formatted, but | |
2373 | * they are all in the same page and have been changed to being page | |
b486afbd | 2374 | * relative. The page register has been written if that was necessary. |
e894c3f4 OAO |
2375 | */ |
2376 | static int _regmap_raw_multi_reg_write(struct regmap *map, | |
8019ff6c | 2377 | const struct reg_sequence *regs, |
e894c3f4 OAO |
2378 | size_t num_regs) |
2379 | { | |
2380 | int ret; | |
2381 | void *buf; | |
2382 | int i; | |
2383 | u8 *u8; | |
2384 | size_t val_bytes = map->format.val_bytes; | |
2385 | size_t reg_bytes = map->format.reg_bytes; | |
2386 | size_t pad_bytes = map->format.pad_bytes; | |
2387 | size_t pair_size = reg_bytes + pad_bytes + val_bytes; | |
2388 | size_t len = pair_size * num_regs; | |
2389 | ||
f5727cd3 XL |
2390 | if (!len) |
2391 | return -EINVAL; | |
2392 | ||
e894c3f4 OAO |
2393 | buf = kzalloc(len, GFP_KERNEL); |
2394 | if (!buf) | |
2395 | return -ENOMEM; | |
2396 | ||
2397 | /* We have to linearise by hand. */ | |
2398 | ||
2399 | u8 = buf; | |
2400 | ||
2401 | for (i = 0; i < num_regs; i++) { | |
2f9b660b MP |
2402 | unsigned int reg = regs[i].reg; |
2403 | unsigned int val = regs[i].def; | |
c6b570d9 | 2404 | trace_regmap_hw_write_start(map, reg, 1); |
3f58f6dc | 2405 | reg = regmap_reg_addr(map, reg); |
e894c3f4 OAO |
2406 | map->format.format_reg(u8, reg, map->reg_shift); |
2407 | u8 += reg_bytes + pad_bytes; | |
2408 | map->format.format_val(u8, val, 0); | |
2409 | u8 += val_bytes; | |
2410 | } | |
2411 | u8 = buf; | |
2412 | *u8 |= map->write_flag_mask; | |
2413 | ||
d77e7456 | 2414 | ret = map->write(map->bus_context, buf, len); |
e894c3f4 OAO |
2415 | |
2416 | kfree(buf); | |
2417 | ||
2418 | for (i = 0; i < num_regs; i++) { | |
2419 | int reg = regs[i].reg; | |
c6b570d9 | 2420 | trace_regmap_hw_write_done(map, reg, 1); |
e894c3f4 OAO |
2421 | } |
2422 | return ret; | |
2423 | } | |
2424 | ||
2425 | static unsigned int _regmap_register_page(struct regmap *map, | |
2426 | unsigned int reg, | |
2427 | struct regmap_range_node *range) | |
2428 | { | |
2429 | unsigned int win_page = (reg - range->range_min) / range->window_len; | |
2430 | ||
2431 | return win_page; | |
2432 | } | |
2433 | ||
2434 | static int _regmap_range_multi_paged_reg_write(struct regmap *map, | |
8019ff6c | 2435 | struct reg_sequence *regs, |
e894c3f4 OAO |
2436 | size_t num_regs) |
2437 | { | |
2438 | int ret; | |
2439 | int i, n; | |
8019ff6c | 2440 | struct reg_sequence *base; |
b48d1398 | 2441 | unsigned int this_page = 0; |
2de9d600 | 2442 | unsigned int page_change = 0; |
e894c3f4 OAO |
2443 | /* |
2444 | * the set of registers are not neccessarily in order, but | |
2445 | * since the order of write must be preserved this algorithm | |
2de9d600 NP |
2446 | * chops the set each time the page changes. This also applies |
2447 | * if there is a delay required at any point in the sequence. | |
e894c3f4 OAO |
2448 | */ |
2449 | base = regs; | |
2450 | for (i = 0, n = 0; i < num_regs; i++, n++) { | |
2451 | unsigned int reg = regs[i].reg; | |
2452 | struct regmap_range_node *range; | |
2453 | ||
2454 | range = _regmap_range_lookup(map, reg); | |
2455 | if (range) { | |
2456 | unsigned int win_page = _regmap_register_page(map, reg, | |
2457 | range); | |
2458 | ||
2459 | if (i == 0) | |
2460 | this_page = win_page; | |
2461 | if (win_page != this_page) { | |
2462 | this_page = win_page; | |
2de9d600 NP |
2463 | page_change = 1; |
2464 | } | |
2465 | } | |
2466 | ||
2467 | /* If we have both a page change and a delay make sure to | |
2468 | * write the regs and apply the delay before we change the | |
2469 | * page. | |
2470 | */ | |
2471 | ||
2472 | if (page_change || regs[i].delay_us) { | |
2473 | ||
2474 | /* For situations where the first write requires | |
2475 | * a delay we need to make sure we don't call | |
2476 | * raw_multi_reg_write with n=0 | |
2477 | * This can't occur with page breaks as we | |
2478 | * never write on the first iteration | |
2479 | */ | |
2480 | if (regs[i].delay_us && i == 0) | |
2481 | n = 1; | |
2482 | ||
e894c3f4 OAO |
2483 | ret = _regmap_raw_multi_reg_write(map, base, n); |
2484 | if (ret != 0) | |
2485 | return ret; | |
2de9d600 | 2486 | |
21f8e482 DO |
2487 | if (regs[i].delay_us) { |
2488 | if (map->can_sleep) | |
2489 | fsleep(regs[i].delay_us); | |
2490 | else | |
2491 | udelay(regs[i].delay_us); | |
2492 | } | |
2de9d600 | 2493 | |
e894c3f4 OAO |
2494 | base += n; |
2495 | n = 0; | |
2de9d600 NP |
2496 | |
2497 | if (page_change) { | |
2498 | ret = _regmap_select_page(map, | |
2499 | &base[n].reg, | |
2500 | range, 1); | |
2501 | if (ret != 0) | |
2502 | return ret; | |
2503 | ||
2504 | page_change = 0; | |
2505 | } | |
2506 | ||
e894c3f4 | 2507 | } |
2de9d600 | 2508 | |
e894c3f4 OAO |
2509 | } |
2510 | if (n > 0) | |
2511 | return _regmap_raw_multi_reg_write(map, base, n); | |
2512 | return 0; | |
2513 | } | |
2514 | ||
1d5b40bc | 2515 | static int _regmap_multi_reg_write(struct regmap *map, |
8019ff6c | 2516 | const struct reg_sequence *regs, |
e894c3f4 | 2517 | size_t num_regs) |
1d5b40bc | 2518 | { |
e894c3f4 OAO |
2519 | int i; |
2520 | int ret; | |
2521 | ||
2522 | if (!map->can_multi_write) { | |
2523 | for (i = 0; i < num_regs; i++) { | |
2524 | ret = _regmap_write(map, regs[i].reg, regs[i].def); | |
2525 | if (ret != 0) | |
2526 | return ret; | |
2de9d600 | 2527 | |
21f8e482 DO |
2528 | if (regs[i].delay_us) { |
2529 | if (map->can_sleep) | |
2530 | fsleep(regs[i].delay_us); | |
2531 | else | |
2532 | udelay(regs[i].delay_us); | |
2533 | } | |
e894c3f4 OAO |
2534 | } |
2535 | return 0; | |
2536 | } | |
2537 | ||
2538 | if (!map->format.parse_inplace) | |
2539 | return -EINVAL; | |
2540 | ||
2541 | if (map->writeable_reg) | |
2542 | for (i = 0; i < num_regs; i++) { | |
2543 | int reg = regs[i].reg; | |
2544 | if (!map->writeable_reg(map->dev, reg)) | |
2545 | return -EINVAL; | |
fcac0233 | 2546 | if (!IS_ALIGNED(reg, map->reg_stride)) |
e894c3f4 OAO |
2547 | return -EINVAL; |
2548 | } | |
2549 | ||
2550 | if (!map->cache_bypass) { | |
2551 | for (i = 0; i < num_regs; i++) { | |
2552 | unsigned int val = regs[i].def; | |
2553 | unsigned int reg = regs[i].reg; | |
2554 | ret = regcache_write(map, reg, val); | |
2555 | if (ret) { | |
2556 | dev_err(map->dev, | |
2557 | "Error in caching of register: %x ret: %d\n", | |
2558 | reg, ret); | |
2559 | return ret; | |
2560 | } | |
2561 | } | |
2562 | if (map->cache_only) { | |
2563 | map->cache_dirty = true; | |
2564 | return 0; | |
2565 | } | |
2566 | } | |
2567 | ||
2568 | WARN_ON(!map->bus); | |
1d5b40bc CK |
2569 | |
2570 | for (i = 0; i < num_regs; i++) { | |
e894c3f4 OAO |
2571 | unsigned int reg = regs[i].reg; |
2572 | struct regmap_range_node *range; | |
2de9d600 NP |
2573 | |
2574 | /* Coalesce all the writes between a page break or a delay | |
2575 | * in a sequence | |
2576 | */ | |
e894c3f4 | 2577 | range = _regmap_range_lookup(map, reg); |
2de9d600 | 2578 | if (range || regs[i].delay_us) { |
8019ff6c NP |
2579 | size_t len = sizeof(struct reg_sequence)*num_regs; |
2580 | struct reg_sequence *base = kmemdup(regs, len, | |
e894c3f4 OAO |
2581 | GFP_KERNEL); |
2582 | if (!base) | |
2583 | return -ENOMEM; | |
2584 | ret = _regmap_range_multi_paged_reg_write(map, base, | |
2585 | num_regs); | |
2586 | kfree(base); | |
2587 | ||
1d5b40bc CK |
2588 | return ret; |
2589 | } | |
2590 | } | |
e894c3f4 | 2591 | return _regmap_raw_multi_reg_write(map, regs, num_regs); |
1d5b40bc CK |
2592 | } |
2593 | ||
2cf8e2df CK |
2594 | /** |
2595 | * regmap_multi_reg_write() - Write multiple registers to the device | |
e33fabd3 AO |
2596 | * |
2597 | * @map: Register map to write to | |
2598 | * @regs: Array of structures containing register,value to be written | |
2599 | * @num_regs: Number of registers to write | |
2600 | * | |
2cf8e2df CK |
2601 | * Write multiple registers to the device where the set of register, value |
2602 | * pairs are supplied in any order, possibly not all in a single range. | |
2603 | * | |
e894c3f4 | 2604 | * The 'normal' block write mode will send ultimately send data on the |
2cf8e2df | 2605 | * target bus as R,V1,V2,V3,..,Vn where successively higher registers are |
e894c3f4 OAO |
2606 | * addressed. However, this alternative block multi write mode will send |
2607 | * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device | |
2608 | * must of course support the mode. | |
e33fabd3 | 2609 | * |
e894c3f4 OAO |
2610 | * A value of zero will be returned on success, a negative errno will be |
2611 | * returned in error cases. | |
e33fabd3 | 2612 | */ |
8019ff6c | 2613 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
f7e2cec0 | 2614 | int num_regs) |
e33fabd3 | 2615 | { |
1d5b40bc | 2616 | int ret; |
e33fabd3 AO |
2617 | |
2618 | map->lock(map->lock_arg); | |
2619 | ||
1d5b40bc CK |
2620 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
2621 | ||
e33fabd3 AO |
2622 | map->unlock(map->lock_arg); |
2623 | ||
2624 | return ret; | |
2625 | } | |
2626 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write); | |
2627 | ||
2cf8e2df CK |
2628 | /** |
2629 | * regmap_multi_reg_write_bypassed() - Write multiple registers to the | |
2630 | * device but not the cache | |
e33fabd3 AO |
2631 | * |
2632 | * @map: Register map to write to | |
2633 | * @regs: Array of structures containing register,value to be written | |
2634 | * @num_regs: Number of registers to write | |
2635 | * | |
2cf8e2df CK |
2636 | * Write multiple registers to the device but not the cache where the set |
2637 | * of register are supplied in any order. | |
2638 | * | |
e33fabd3 AO |
2639 | * This function is intended to be used for writing a large block of data |
2640 | * atomically to the device in single transfer for those I2C client devices | |
2641 | * that implement this alternative block write mode. | |
2642 | * | |
2643 | * A value of zero will be returned on success, a negative errno will | |
2644 | * be returned in error cases. | |
2645 | */ | |
1d5b40bc | 2646 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 2647 | const struct reg_sequence *regs, |
1d5b40bc | 2648 | int num_regs) |
e33fabd3 | 2649 | { |
1d5b40bc CK |
2650 | int ret; |
2651 | bool bypass; | |
e33fabd3 AO |
2652 | |
2653 | map->lock(map->lock_arg); | |
2654 | ||
1d5b40bc CK |
2655 | bypass = map->cache_bypass; |
2656 | map->cache_bypass = true; | |
2657 | ||
2658 | ret = _regmap_multi_reg_write(map, regs, num_regs); | |
2659 | ||
2660 | map->cache_bypass = bypass; | |
2661 | ||
e33fabd3 AO |
2662 | map->unlock(map->lock_arg); |
2663 | ||
2664 | return ret; | |
2665 | } | |
1d5b40bc | 2666 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); |
e33fabd3 | 2667 | |
0d509f2b | 2668 | /** |
2cf8e2df CK |
2669 | * regmap_raw_write_async() - Write raw values to one or more registers |
2670 | * asynchronously | |
0d509f2b MB |
2671 | * |
2672 | * @map: Register map to write to | |
2673 | * @reg: Initial register to write to | |
2674 | * @val: Block of data to be written, laid out for direct transmission to the | |
2675 | * device. Must be valid until regmap_async_complete() is called. | |
2676 | * @val_len: Length of data pointed to by val. | |
2677 | * | |
2678 | * This function is intended to be used for things like firmware | |
2679 | * download where a large block of data needs to be transferred to the | |
2680 | * device. No formatting will be done on the data provided. | |
2681 | * | |
2682 | * If supported by the underlying bus the write will be scheduled | |
2683 | * asynchronously, helping maximise I/O speed on higher speed buses | |
2684 | * like SPI. regmap_async_complete() can be called to ensure that all | |
2685 | * asynchrnous writes have been completed. | |
2686 | * | |
2687 | * A value of zero will be returned on success, a negative errno will | |
2688 | * be returned in error cases. | |
2689 | */ | |
2690 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, | |
2691 | const void *val, size_t val_len) | |
2692 | { | |
2693 | int ret; | |
2694 | ||
2695 | if (val_len % map->format.val_bytes) | |
2696 | return -EINVAL; | |
fcac0233 | 2697 | if (!IS_ALIGNED(reg, map->reg_stride)) |
0d509f2b MB |
2698 | return -EINVAL; |
2699 | ||
2700 | map->lock(map->lock_arg); | |
2701 | ||
0a819809 MB |
2702 | map->async = true; |
2703 | ||
05669b63 | 2704 | ret = _regmap_raw_write(map, reg, val, val_len, false); |
0a819809 MB |
2705 | |
2706 | map->async = false; | |
0d509f2b MB |
2707 | |
2708 | map->unlock(map->lock_arg); | |
2709 | ||
2710 | return ret; | |
2711 | } | |
2712 | EXPORT_SYMBOL_GPL(regmap_raw_write_async); | |
2713 | ||
b83a313b | 2714 | static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, |
40033248 | 2715 | unsigned int val_len, bool noinc) |
b83a313b | 2716 | { |
98bc7dfd | 2717 | struct regmap_range_node *range; |
b83a313b MB |
2718 | int ret; |
2719 | ||
d77e7456 | 2720 | if (!map->read) |
bb2bb45d MB |
2721 | return -EINVAL; |
2722 | ||
98bc7dfd MB |
2723 | range = _regmap_range_lookup(map, reg); |
2724 | if (range) { | |
2725 | ret = _regmap_select_page(map, ®, range, | |
40033248 | 2726 | noinc ? 1 : val_len / map->format.val_bytes); |
0ff3e62f | 2727 | if (ret != 0) |
98bc7dfd MB |
2728 | return ret; |
2729 | } | |
6863ca62 | 2730 | |
3f58f6dc | 2731 | reg = regmap_reg_addr(map, reg); |
d939fb9a | 2732 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
f50e38c9 TL |
2733 | regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, |
2734 | map->read_flag_mask); | |
c6b570d9 | 2735 | trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes); |
fb2736bb | 2736 | |
d77e7456 MV |
2737 | ret = map->read(map->bus_context, map->work_buf, |
2738 | map->format.reg_bytes + map->format.pad_bytes, | |
2739 | val, val_len); | |
b83a313b | 2740 | |
c6b570d9 | 2741 | trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes); |
fb2736bb MB |
2742 | |
2743 | return ret; | |
b83a313b MB |
2744 | } |
2745 | ||
3ac17037 BB |
2746 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
2747 | unsigned int *val) | |
2748 | { | |
2749 | struct regmap *map = context; | |
f18ee501 MB |
2750 | struct regmap_range_node *range; |
2751 | int ret; | |
2752 | ||
2753 | range = _regmap_range_lookup(map, reg); | |
2754 | if (range) { | |
2755 | ret = _regmap_select_page(map, ®, range, 1); | |
2756 | if (ret != 0) | |
2757 | return ret; | |
2758 | } | |
3ac17037 | 2759 | |
3f58f6dc | 2760 | reg = regmap_reg_addr(map, reg); |
3ac17037 BB |
2761 | return map->bus->reg_read(map->bus_context, reg, val); |
2762 | } | |
2763 | ||
ad278406 AS |
2764 | static int _regmap_bus_read(void *context, unsigned int reg, |
2765 | unsigned int *val) | |
2766 | { | |
2767 | int ret; | |
2768 | struct regmap *map = context; | |
4c90f297 KA |
2769 | void *work_val = map->work_buf + map->format.reg_bytes + |
2770 | map->format.pad_bytes; | |
ad278406 AS |
2771 | |
2772 | if (!map->format.parse_val) | |
2773 | return -EINVAL; | |
2774 | ||
40033248 | 2775 | ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false); |
ad278406 | 2776 | if (ret == 0) |
4c90f297 | 2777 | *val = map->format.parse_val(work_val); |
ad278406 AS |
2778 | |
2779 | return ret; | |
2780 | } | |
2781 | ||
b83a313b MB |
2782 | static int _regmap_read(struct regmap *map, unsigned int reg, |
2783 | unsigned int *val) | |
2784 | { | |
2785 | int ret; | |
d2a5884a AS |
2786 | void *context = _regmap_map_get_context(map); |
2787 | ||
5d1729e7 DP |
2788 | if (!map->cache_bypass) { |
2789 | ret = regcache_read(map, reg, val); | |
2790 | if (ret == 0) | |
2791 | return 0; | |
2792 | } | |
2793 | ||
2794 | if (map->cache_only) | |
2795 | return -EBUSY; | |
2796 | ||
3e47b887 MB |
2797 | if (!regmap_readable(map, reg)) |
2798 | return -EIO; | |
2799 | ||
d2a5884a | 2800 | ret = map->reg_read(context, reg, val); |
fb2736bb | 2801 | if (ret == 0) { |
95093762 | 2802 | if (regmap_should_log(map)) |
1044c180 | 2803 | dev_info(map->dev, "%x => %x\n", reg, *val); |
1044c180 | 2804 | |
c6b570d9 | 2805 | trace_regmap_reg_read(map, reg, *val); |
b83a313b | 2806 | |
ad278406 AS |
2807 | if (!map->cache_bypass) |
2808 | regcache_write(map, reg, *val); | |
2809 | } | |
f2985367 | 2810 | |
b83a313b MB |
2811 | return ret; |
2812 | } | |
2813 | ||
2814 | /** | |
2cf8e2df | 2815 | * regmap_read() - Read a value from a single register |
b83a313b | 2816 | * |
0093380c | 2817 | * @map: Register map to read from |
b83a313b MB |
2818 | * @reg: Register to be read from |
2819 | * @val: Pointer to store read value | |
2820 | * | |
2821 | * A value of zero will be returned on success, a negative errno will | |
2822 | * be returned in error cases. | |
2823 | */ | |
2824 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) | |
2825 | { | |
2826 | int ret; | |
2827 | ||
fcac0233 | 2828 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f SW |
2829 | return -EINVAL; |
2830 | ||
0d4529c5 | 2831 | map->lock(map->lock_arg); |
b83a313b MB |
2832 | |
2833 | ret = _regmap_read(map, reg, val); | |
2834 | ||
0d4529c5 | 2835 | map->unlock(map->lock_arg); |
b83a313b MB |
2836 | |
2837 | return ret; | |
2838 | } | |
2839 | EXPORT_SYMBOL_GPL(regmap_read); | |
2840 | ||
70ee853e RF |
2841 | /** |
2842 | * regmap_read_bypassed() - Read a value from a single register direct | |
2843 | * from the device, bypassing the cache | |
2844 | * | |
2845 | * @map: Register map to read from | |
2846 | * @reg: Register to be read from | |
2847 | * @val: Pointer to store read value | |
2848 | * | |
2849 | * A value of zero will be returned on success, a negative errno will | |
2850 | * be returned in error cases. | |
2851 | */ | |
2852 | int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val) | |
2853 | { | |
2854 | int ret; | |
2855 | bool bypass, cache_only; | |
2856 | ||
2857 | if (!IS_ALIGNED(reg, map->reg_stride)) | |
2858 | return -EINVAL; | |
2859 | ||
2860 | map->lock(map->lock_arg); | |
2861 | ||
2862 | bypass = map->cache_bypass; | |
2863 | cache_only = map->cache_only; | |
2864 | map->cache_bypass = true; | |
2865 | map->cache_only = false; | |
2866 | ||
2867 | ret = _regmap_read(map, reg, val); | |
2868 | ||
2869 | map->cache_bypass = bypass; | |
2870 | map->cache_only = cache_only; | |
2871 | ||
2872 | map->unlock(map->lock_arg); | |
2873 | ||
2874 | return ret; | |
2875 | } | |
2876 | EXPORT_SYMBOL_GPL(regmap_read_bypassed); | |
2877 | ||
b83a313b | 2878 | /** |
2cf8e2df | 2879 | * regmap_raw_read() - Read raw data from the device |
b83a313b | 2880 | * |
0093380c | 2881 | * @map: Register map to read from |
b83a313b MB |
2882 | * @reg: First register to be read from |
2883 | * @val: Pointer to store read value | |
2884 | * @val_len: Size of data to read | |
2885 | * | |
2886 | * A value of zero will be returned on success, a negative errno will | |
2887 | * be returned in error cases. | |
2888 | */ | |
2889 | int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, | |
2890 | size_t val_len) | |
2891 | { | |
b8fb5ab1 MB |
2892 | size_t val_bytes = map->format.val_bytes; |
2893 | size_t val_count = val_len / val_bytes; | |
2894 | unsigned int v; | |
2895 | int ret, i; | |
04e016ad | 2896 | |
851960ba SW |
2897 | if (val_len % map->format.val_bytes) |
2898 | return -EINVAL; | |
fcac0233 | 2899 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f | 2900 | return -EINVAL; |
fa3eec77 MB |
2901 | if (val_count == 0) |
2902 | return -EINVAL; | |
851960ba | 2903 | |
0d4529c5 | 2904 | map->lock(map->lock_arg); |
b83a313b | 2905 | |
b8fb5ab1 MB |
2906 | if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || |
2907 | map->cache_type == REGCACHE_NONE) { | |
1b079ca2 CK |
2908 | size_t chunk_count, chunk_bytes; |
2909 | size_t chunk_regs = val_count; | |
0645ba43 | 2910 | |
99e8dd39 CK |
2911 | if (!map->cache_bypass && map->cache_only) { |
2912 | ret = -EBUSY; | |
2913 | goto out; | |
2914 | } | |
2915 | ||
d77e7456 | 2916 | if (!map->read) { |
9a16ea90 MP |
2917 | ret = -ENOTSUPP; |
2918 | goto out; | |
2919 | } | |
2920 | ||
1b079ca2 CK |
2921 | if (map->use_single_read) |
2922 | chunk_regs = 1; | |
2923 | else if (map->max_raw_read && val_len > map->max_raw_read) | |
2924 | chunk_regs = map->max_raw_read / val_bytes; | |
9a16ea90 | 2925 | |
1b079ca2 CK |
2926 | chunk_count = val_count / chunk_regs; |
2927 | chunk_bytes = chunk_regs * val_bytes; | |
2928 | ||
2929 | /* Read bytes that fit into whole chunks */ | |
0645ba43 | 2930 | for (i = 0; i < chunk_count; i++) { |
40033248 | 2931 | ret = _regmap_raw_read(map, reg, val, chunk_bytes, false); |
0645ba43 | 2932 | if (ret != 0) |
1b079ca2 CK |
2933 | goto out; |
2934 | ||
2935 | reg += regmap_get_offset(map, chunk_regs); | |
2936 | val += chunk_bytes; | |
2937 | val_len -= chunk_bytes; | |
0645ba43 | 2938 | } |
b8fb5ab1 | 2939 | |
0645ba43 | 2940 | /* Read remaining bytes */ |
1b079ca2 | 2941 | if (val_len) { |
40033248 | 2942 | ret = _regmap_raw_read(map, reg, val, val_len, false); |
0645ba43 | 2943 | if (ret != 0) |
1b079ca2 | 2944 | goto out; |
0645ba43 | 2945 | } |
b8fb5ab1 MB |
2946 | } else { |
2947 | /* Otherwise go word by word for the cache; should be low | |
2948 | * cost as we expect to hit the cache. | |
2949 | */ | |
2950 | for (i = 0; i < val_count; i++) { | |
ca747be2 | 2951 | ret = _regmap_read(map, reg + regmap_get_offset(map, i), |
f01ee60f | 2952 | &v); |
b8fb5ab1 MB |
2953 | if (ret != 0) |
2954 | goto out; | |
2955 | ||
d939fb9a | 2956 | map->format.format_val(val + (i * val_bytes), v, 0); |
b8fb5ab1 MB |
2957 | } |
2958 | } | |
b83a313b | 2959 | |
b8fb5ab1 | 2960 | out: |
0d4529c5 | 2961 | map->unlock(map->lock_arg); |
b83a313b MB |
2962 | |
2963 | return ret; | |
2964 | } | |
2965 | EXPORT_SYMBOL_GPL(regmap_raw_read); | |
2966 | ||
67252287 | 2967 | /** |
74fe7b55 CDL |
2968 | * regmap_noinc_read(): Read data from a register without incrementing the |
2969 | * register number | |
2970 | * | |
2971 | * @map: Register map to read from | |
2972 | * @reg: Register to read from | |
2973 | * @val: Pointer to data buffer | |
2974 | * @val_len: Length of output buffer in bytes. | |
2975 | * | |
d77e7456 | 2976 | * The regmap API usually assumes that bulk read operations will read a |
74fe7b55 CDL |
2977 | * range of registers. Some devices have certain registers for which a read |
2978 | * operation read will read from an internal FIFO. | |
2979 | * | |
2980 | * The target register must be volatile but registers after it can be | |
2981 | * completely unrelated cacheable registers. | |
2982 | * | |
2983 | * This will attempt multiple reads as required to read val_len bytes. | |
2984 | * | |
2985 | * A value of zero will be returned on success, a negative errno will be | |
2986 | * returned in error cases. | |
2987 | */ | |
2988 | int regmap_noinc_read(struct regmap *map, unsigned int reg, | |
2989 | void *val, size_t val_len) | |
2990 | { | |
2991 | size_t read_len; | |
2992 | int ret; | |
2993 | ||
c42e99a3 JMC |
2994 | if (!map->read) |
2995 | return -ENOTSUPP; | |
2996 | ||
74fe7b55 CDL |
2997 | if (val_len % map->format.val_bytes) |
2998 | return -EINVAL; | |
2999 | if (!IS_ALIGNED(reg, map->reg_stride)) | |
3000 | return -EINVAL; | |
3001 | if (val_len == 0) | |
3002 | return -EINVAL; | |
3003 | ||
3004 | map->lock(map->lock_arg); | |
3005 | ||
3006 | if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) { | |
3007 | ret = -EINVAL; | |
3008 | goto out_unlock; | |
3009 | } | |
3010 | ||
99e8dd39 CK |
3011 | /* |
3012 | * We have not defined the FIFO semantics for cache, as the | |
3013 | * cache is just one value deep. Should we return the last | |
3014 | * written value? Just avoid this by always reading the FIFO | |
3015 | * even when using cache. Cache only will not work. | |
3016 | */ | |
3017 | if (!map->cache_bypass && map->cache_only) { | |
3018 | ret = -EBUSY; | |
3019 | goto out_unlock; | |
3020 | } | |
3021 | ||
c20cc099 LW |
3022 | /* Use the accelerated operation if we can */ |
3023 | if (map->bus->reg_noinc_read) { | |
c20cc099 LW |
3024 | ret = regmap_noinc_readwrite(map, reg, val, val_len, false); |
3025 | goto out_unlock; | |
3026 | } | |
3027 | ||
74fe7b55 CDL |
3028 | while (val_len) { |
3029 | if (map->max_raw_read && map->max_raw_read < val_len) | |
3030 | read_len = map->max_raw_read; | |
3031 | else | |
3032 | read_len = val_len; | |
40033248 | 3033 | ret = _regmap_raw_read(map, reg, val, read_len, true); |
74fe7b55 CDL |
3034 | if (ret) |
3035 | goto out_unlock; | |
3036 | val = ((u8 *)val) + read_len; | |
3037 | val_len -= read_len; | |
3038 | } | |
3039 | ||
3040 | out_unlock: | |
3041 | map->unlock(map->lock_arg); | |
3042 | return ret; | |
3043 | } | |
3044 | EXPORT_SYMBOL_GPL(regmap_noinc_read); | |
3045 | ||
3046 | /** | |
3047 | * regmap_field_read(): Read a value to a single register field | |
67252287 SK |
3048 | * |
3049 | * @field: Register field to read from | |
3050 | * @val: Pointer to store read value | |
3051 | * | |
3052 | * A value of zero will be returned on success, a negative errno will | |
3053 | * be returned in error cases. | |
3054 | */ | |
3055 | int regmap_field_read(struct regmap_field *field, unsigned int *val) | |
3056 | { | |
3057 | int ret; | |
3058 | unsigned int reg_val; | |
3059 | ret = regmap_read(field->regmap, field->reg, ®_val); | |
3060 | if (ret != 0) | |
3061 | return ret; | |
3062 | ||
3063 | reg_val &= field->mask; | |
3064 | reg_val >>= field->shift; | |
3065 | *val = reg_val; | |
3066 | ||
3067 | return ret; | |
3068 | } | |
3069 | EXPORT_SYMBOL_GPL(regmap_field_read); | |
3070 | ||
a0102375 | 3071 | /** |
2cf8e2df | 3072 | * regmap_fields_read() - Read a value to a single register field with port ID |
a0102375 KM |
3073 | * |
3074 | * @field: Register field to read from | |
3075 | * @id: port ID | |
3076 | * @val: Pointer to store read value | |
3077 | * | |
3078 | * A value of zero will be returned on success, a negative errno will | |
3079 | * be returned in error cases. | |
3080 | */ | |
3081 | int regmap_fields_read(struct regmap_field *field, unsigned int id, | |
3082 | unsigned int *val) | |
3083 | { | |
3084 | int ret; | |
3085 | unsigned int reg_val; | |
3086 | ||
3087 | if (id >= field->id_size) | |
3088 | return -EINVAL; | |
3089 | ||
3090 | ret = regmap_read(field->regmap, | |
3091 | field->reg + (field->id_offset * id), | |
3092 | ®_val); | |
3093 | if (ret != 0) | |
3094 | return ret; | |
3095 | ||
3096 | reg_val &= field->mask; | |
3097 | reg_val >>= field->shift; | |
3098 | *val = reg_val; | |
3099 | ||
3100 | return ret; | |
3101 | } | |
3102 | EXPORT_SYMBOL_GPL(regmap_fields_read); | |
3103 | ||
3c1ff93b GR |
3104 | static int _regmap_bulk_read(struct regmap *map, unsigned int reg, |
3105 | unsigned int *regs, void *val, size_t val_count) | |
3106 | { | |
3107 | u32 *u32 = val; | |
3108 | u16 *u16 = val; | |
3109 | u8 *u8 = val; | |
3110 | int ret, i; | |
3111 | ||
3112 | map->lock(map->lock_arg); | |
3113 | ||
3114 | for (i = 0; i < val_count; i++) { | |
3115 | unsigned int ival; | |
3116 | ||
3117 | if (regs) { | |
3118 | if (!IS_ALIGNED(regs[i], map->reg_stride)) { | |
3119 | ret = -EINVAL; | |
3120 | goto out; | |
3121 | } | |
3122 | ret = _regmap_read(map, regs[i], &ival); | |
3123 | } else { | |
3124 | ret = _regmap_read(map, reg + regmap_get_offset(map, i), &ival); | |
3125 | } | |
3126 | if (ret != 0) | |
3127 | goto out; | |
3128 | ||
3129 | switch (map->format.val_bytes) { | |
3130 | case 4: | |
3131 | u32[i] = ival; | |
3132 | break; | |
3133 | case 2: | |
3134 | u16[i] = ival; | |
3135 | break; | |
3136 | case 1: | |
3137 | u8[i] = ival; | |
3138 | break; | |
3139 | default: | |
3140 | ret = -EINVAL; | |
3141 | goto out; | |
3142 | } | |
3143 | } | |
3144 | out: | |
3145 | map->unlock(map->lock_arg); | |
3146 | return ret; | |
3147 | } | |
3148 | ||
b83a313b | 3149 | /** |
3c1ff93b | 3150 | * regmap_bulk_read() - Read multiple sequential registers from the device |
b83a313b | 3151 | * |
0093380c | 3152 | * @map: Register map to read from |
b83a313b MB |
3153 | * @reg: First register to be read from |
3154 | * @val: Pointer to store read value, in native register size for device | |
3155 | * @val_count: Number of registers to read | |
3156 | * | |
3157 | * A value of zero will be returned on success, a negative errno will | |
3158 | * be returned in error cases. | |
3159 | */ | |
3160 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
3161 | size_t val_count) | |
3162 | { | |
3163 | int ret, i; | |
3164 | size_t val_bytes = map->format.val_bytes; | |
82cd9965 | 3165 | bool vol = regmap_volatile_range(map, reg, val_count); |
5d1729e7 | 3166 | |
fcac0233 | 3167 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f | 3168 | return -EINVAL; |
186ba2ee CK |
3169 | if (val_count == 0) |
3170 | return -EINVAL; | |
b83a313b | 3171 | |
ea50e2a1 | 3172 | if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { |
0645ba43 CK |
3173 | ret = regmap_raw_read(map, reg, val, val_bytes * val_count); |
3174 | if (ret != 0) | |
3175 | return ret; | |
de2d808f MB |
3176 | |
3177 | for (i = 0; i < val_count * val_bytes; i += val_bytes) | |
8a819ff8 | 3178 | map->format.parse_inplace(val + i); |
de2d808f | 3179 | } else { |
3c1ff93b | 3180 | ret = _regmap_bulk_read(map, reg, NULL, val, val_count); |
de2d808f | 3181 | } |
026c99b5 DR |
3182 | if (!ret) |
3183 | trace_regmap_bulk_read(map, reg, val, val_bytes * val_count); | |
186ba2ee | 3184 | return ret; |
b83a313b MB |
3185 | } |
3186 | EXPORT_SYMBOL_GPL(regmap_bulk_read); | |
3187 | ||
3c1ff93b GR |
3188 | /** |
3189 | * regmap_multi_reg_read() - Read multiple non-sequential registers from the device | |
3190 | * | |
3191 | * @map: Register map to read from | |
3192 | * @regs: Array of registers to read from | |
3193 | * @val: Pointer to store read value, in native register size for device | |
3194 | * @val_count: Number of registers to read | |
3195 | * | |
3196 | * A value of zero will be returned on success, a negative errno will | |
3197 | * be returned in error cases. | |
3198 | */ | |
3199 | int regmap_multi_reg_read(struct regmap *map, unsigned int *regs, void *val, | |
3200 | size_t val_count) | |
3201 | { | |
3202 | if (val_count == 0) | |
3203 | return -EINVAL; | |
3204 | ||
3205 | return _regmap_bulk_read(map, 0, regs, val, val_count); | |
3206 | } | |
3207 | EXPORT_SYMBOL_GPL(regmap_multi_reg_read); | |
3208 | ||
018690d3 MB |
3209 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
3210 | unsigned int mask, unsigned int val, | |
7ff0589c | 3211 | bool *change, bool force_write) |
b83a313b MB |
3212 | { |
3213 | int ret; | |
d91e8db2 | 3214 | unsigned int tmp, orig; |
b83a313b | 3215 | |
77792b11 JR |
3216 | if (change) |
3217 | *change = false; | |
b83a313b | 3218 | |
77792b11 | 3219 | if (regmap_volatile(map, reg) && map->reg_update_bits) { |
3f58f6dc | 3220 | reg = regmap_reg_addr(map, reg); |
77792b11 JR |
3221 | ret = map->reg_update_bits(map->bus_context, reg, mask, val); |
3222 | if (ret == 0 && change) | |
e2f74dc6 | 3223 | *change = true; |
018690d3 | 3224 | } else { |
77792b11 JR |
3225 | ret = _regmap_read(map, reg, &orig); |
3226 | if (ret != 0) | |
3227 | return ret; | |
3228 | ||
3229 | tmp = orig & ~mask; | |
3230 | tmp |= val & mask; | |
3231 | ||
b629c698 | 3232 | if (force_write || (tmp != orig) || map->force_write_field) { |
77792b11 JR |
3233 | ret = _regmap_write(map, reg, tmp); |
3234 | if (ret == 0 && change) | |
3235 | *change = true; | |
3236 | } | |
018690d3 | 3237 | } |
b83a313b | 3238 | |
b83a313b MB |
3239 | return ret; |
3240 | } | |
018690d3 MB |
3241 | |
3242 | /** | |
2cf8e2df | 3243 | * regmap_update_bits_base() - Perform a read/modify/write cycle on a register |
915f441b MB |
3244 | * |
3245 | * @map: Register map to update | |
3246 | * @reg: Register to update | |
3247 | * @mask: Bitmask to change | |
3248 | * @val: New value for bitmask | |
3249 | * @change: Boolean indicating if a write was done | |
91d31b9f KM |
3250 | * @async: Boolean indicating asynchronously |
3251 | * @force: Boolean indicating use force update | |
915f441b | 3252 | * |
2cf8e2df CK |
3253 | * Perform a read/modify/write cycle on a register map with change, async, force |
3254 | * options. | |
3255 | * | |
3256 | * If async is true: | |
3257 | * | |
3258 | * With most buses the read must be done synchronously so this is most useful | |
3259 | * for devices with a cache which do not need to interact with the hardware to | |
3260 | * determine the current register value. | |
915f441b MB |
3261 | * |
3262 | * Returns zero for success, a negative number on error. | |
3263 | */ | |
91d31b9f KM |
3264 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
3265 | unsigned int mask, unsigned int val, | |
3266 | bool *change, bool async, bool force) | |
915f441b MB |
3267 | { |
3268 | int ret; | |
3269 | ||
3270 | map->lock(map->lock_arg); | |
3271 | ||
91d31b9f | 3272 | map->async = async; |
915f441b | 3273 | |
91d31b9f | 3274 | ret = _regmap_update_bits(map, reg, mask, val, change, force); |
915f441b MB |
3275 | |
3276 | map->async = false; | |
3277 | ||
3278 | map->unlock(map->lock_arg); | |
3279 | ||
3280 | return ret; | |
3281 | } | |
91d31b9f | 3282 | EXPORT_SYMBOL_GPL(regmap_update_bits_base); |
915f441b | 3283 | |
aa2ff9db BG |
3284 | /** |
3285 | * regmap_test_bits() - Check if all specified bits are set in a register. | |
3286 | * | |
3287 | * @map: Register map to operate on | |
3288 | * @reg: Register to read from | |
3289 | * @bits: Bits to test | |
3290 | * | |
e680a409 BG |
3291 | * Returns 0 if at least one of the tested bits is not set, 1 if all tested |
3292 | * bits are set and a negative error number if the underlying regmap_read() | |
3293 | * fails. | |
aa2ff9db BG |
3294 | */ |
3295 | int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits) | |
3296 | { | |
3297 | unsigned int val, ret; | |
3298 | ||
3299 | ret = regmap_read(map, reg, &val); | |
3300 | if (ret) | |
3301 | return ret; | |
3302 | ||
3303 | return (val & bits) == bits; | |
3304 | } | |
3305 | EXPORT_SYMBOL_GPL(regmap_test_bits); | |
3306 | ||
0d509f2b MB |
3307 | void regmap_async_complete_cb(struct regmap_async *async, int ret) |
3308 | { | |
3309 | struct regmap *map = async->map; | |
3310 | bool wake; | |
3311 | ||
c6b570d9 | 3312 | trace_regmap_async_io_complete(map); |
fe7d4ccd | 3313 | |
0d509f2b | 3314 | spin_lock(&map->async_lock); |
7e09a979 | 3315 | list_move(&async->list, &map->async_free); |
0d509f2b MB |
3316 | wake = list_empty(&map->async_list); |
3317 | ||
3318 | if (ret != 0) | |
3319 | map->async_ret = ret; | |
3320 | ||
3321 | spin_unlock(&map->async_lock); | |
3322 | ||
0d509f2b MB |
3323 | if (wake) |
3324 | wake_up(&map->async_waitq); | |
3325 | } | |
f804fb56 | 3326 | EXPORT_SYMBOL_GPL(regmap_async_complete_cb); |
0d509f2b MB |
3327 | |
3328 | static int regmap_async_is_done(struct regmap *map) | |
3329 | { | |
3330 | unsigned long flags; | |
3331 | int ret; | |
3332 | ||
3333 | spin_lock_irqsave(&map->async_lock, flags); | |
3334 | ret = list_empty(&map->async_list); | |
3335 | spin_unlock_irqrestore(&map->async_lock, flags); | |
3336 | ||
3337 | return ret; | |
3338 | } | |
3339 | ||
3340 | /** | |
2cf8e2df | 3341 | * regmap_async_complete - Ensure all asynchronous I/O has completed. |
0d509f2b MB |
3342 | * |
3343 | * @map: Map to operate on. | |
3344 | * | |
3345 | * Blocks until any pending asynchronous I/O has completed. Returns | |
3346 | * an error code for any failed I/O operations. | |
3347 | */ | |
3348 | int regmap_async_complete(struct regmap *map) | |
3349 | { | |
3350 | unsigned long flags; | |
3351 | int ret; | |
3352 | ||
3353 | /* Nothing to do with no async support */ | |
f2e055e7 | 3354 | if (!map->bus || !map->bus->async_write) |
0d509f2b MB |
3355 | return 0; |
3356 | ||
c6b570d9 | 3357 | trace_regmap_async_complete_start(map); |
fe7d4ccd | 3358 | |
0d509f2b MB |
3359 | wait_event(map->async_waitq, regmap_async_is_done(map)); |
3360 | ||
3361 | spin_lock_irqsave(&map->async_lock, flags); | |
3362 | ret = map->async_ret; | |
3363 | map->async_ret = 0; | |
3364 | spin_unlock_irqrestore(&map->async_lock, flags); | |
3365 | ||
c6b570d9 | 3366 | trace_regmap_async_complete_done(map); |
fe7d4ccd | 3367 | |
0d509f2b MB |
3368 | return ret; |
3369 | } | |
f88948ef | 3370 | EXPORT_SYMBOL_GPL(regmap_async_complete); |
0d509f2b | 3371 | |
22f0d90a | 3372 | /** |
2cf8e2df CK |
3373 | * regmap_register_patch - Register and apply register updates to be applied |
3374 | * on device initialistion | |
22f0d90a MB |
3375 | * |
3376 | * @map: Register map to apply updates to. | |
3377 | * @regs: Values to update. | |
3378 | * @num_regs: Number of entries in regs. | |
3379 | * | |
3380 | * Register a set of register updates to be applied to the device | |
3381 | * whenever the device registers are synchronised with the cache and | |
3382 | * apply them immediately. Typically this is used to apply | |
3383 | * corrections to be applied to the device defaults on startup, such | |
3384 | * as the updates some vendors provide to undocumented registers. | |
56fb1c74 MB |
3385 | * |
3386 | * The caller must ensure that this function cannot be called | |
3387 | * concurrently with either itself or regcache_sync(). | |
22f0d90a | 3388 | */ |
8019ff6c | 3389 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a MB |
3390 | int num_regs) |
3391 | { | |
8019ff6c | 3392 | struct reg_sequence *p; |
6bf13103 | 3393 | int ret; |
22f0d90a MB |
3394 | bool bypass; |
3395 | ||
bd60e381 CZ |
3396 | if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", |
3397 | num_regs)) | |
3398 | return 0; | |
3399 | ||
aab13ebc | 3400 | p = krealloc(map->patch, |
8019ff6c | 3401 | sizeof(struct reg_sequence) * (map->patch_regs + num_regs), |
aab13ebc MB |
3402 | GFP_KERNEL); |
3403 | if (p) { | |
3404 | memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); | |
3405 | map->patch = p; | |
3406 | map->patch_regs += num_regs; | |
22f0d90a | 3407 | } else { |
56fb1c74 | 3408 | return -ENOMEM; |
22f0d90a MB |
3409 | } |
3410 | ||
0d4529c5 | 3411 | map->lock(map->lock_arg); |
22f0d90a MB |
3412 | |
3413 | bypass = map->cache_bypass; | |
3414 | ||
3415 | map->cache_bypass = true; | |
1a25f261 | 3416 | map->async = true; |
22f0d90a | 3417 | |
6bf13103 | 3418 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
22f0d90a | 3419 | |
1a25f261 | 3420 | map->async = false; |
22f0d90a MB |
3421 | map->cache_bypass = bypass; |
3422 | ||
0d4529c5 | 3423 | map->unlock(map->lock_arg); |
22f0d90a | 3424 | |
1a25f261 MB |
3425 | regmap_async_complete(map); |
3426 | ||
22f0d90a MB |
3427 | return ret; |
3428 | } | |
3429 | EXPORT_SYMBOL_GPL(regmap_register_patch); | |
3430 | ||
2cf8e2df CK |
3431 | /** |
3432 | * regmap_get_val_bytes() - Report the size of a register value | |
3433 | * | |
3434 | * @map: Register map to operate on. | |
a6539c32 MB |
3435 | * |
3436 | * Report the size of a register value, mainly intended to for use by | |
3437 | * generic infrastructure built on top of regmap. | |
3438 | */ | |
3439 | int regmap_get_val_bytes(struct regmap *map) | |
3440 | { | |
3441 | if (map->format.format_write) | |
3442 | return -EINVAL; | |
3443 | ||
3444 | return map->format.val_bytes; | |
3445 | } | |
3446 | EXPORT_SYMBOL_GPL(regmap_get_val_bytes); | |
3447 | ||
668abc72 | 3448 | /** |
2cf8e2df CK |
3449 | * regmap_get_max_register() - Report the max register value |
3450 | * | |
3451 | * @map: Register map to operate on. | |
668abc72 SK |
3452 | * |
3453 | * Report the max register value, mainly intended to for use by | |
3454 | * generic infrastructure built on top of regmap. | |
3455 | */ | |
3456 | int regmap_get_max_register(struct regmap *map) | |
3457 | { | |
0ec74ad3 | 3458 | return map->max_register_is_set ? map->max_register : -EINVAL; |
668abc72 SK |
3459 | } |
3460 | EXPORT_SYMBOL_GPL(regmap_get_max_register); | |
3461 | ||
a2f776cb | 3462 | /** |
2cf8e2df CK |
3463 | * regmap_get_reg_stride() - Report the register address stride |
3464 | * | |
3465 | * @map: Register map to operate on. | |
a2f776cb SK |
3466 | * |
3467 | * Report the register address stride, mainly intended to for use by | |
3468 | * generic infrastructure built on top of regmap. | |
3469 | */ | |
3470 | int regmap_get_reg_stride(struct regmap *map) | |
3471 | { | |
3472 | return map->reg_stride; | |
3473 | } | |
3474 | EXPORT_SYMBOL_GPL(regmap_get_reg_stride); | |
3475 | ||
a6d99022 MW |
3476 | /** |
3477 | * regmap_might_sleep() - Returns whether a regmap access might sleep. | |
3478 | * | |
3479 | * @map: Register map to operate on. | |
3480 | * | |
3481 | * Returns true if an access to the register might sleep, else false. | |
3482 | */ | |
3483 | bool regmap_might_sleep(struct regmap *map) | |
3484 | { | |
3485 | return map->can_sleep; | |
3486 | } | |
3487 | EXPORT_SYMBOL_GPL(regmap_might_sleep); | |
3488 | ||
13ff50c8 NC |
3489 | int regmap_parse_val(struct regmap *map, const void *buf, |
3490 | unsigned int *val) | |
3491 | { | |
3492 | if (!map->format.parse_val) | |
3493 | return -EINVAL; | |
3494 | ||
3495 | *val = map->format.parse_val(buf); | |
3496 | ||
3497 | return 0; | |
3498 | } | |
3499 | EXPORT_SYMBOL_GPL(regmap_parse_val); | |
3500 | ||
31244e39 MB |
3501 | static int __init regmap_initcall(void) |
3502 | { | |
3503 | regmap_debugfs_initcall(); | |
3504 | ||
3505 | return 0; | |
3506 | } | |
3507 | postcore_initcall(regmap_initcall); |