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Linux 6.16-rc6
[linux-2.6-block.git] / drivers / base / regmap / regmap.c
CommitLineData
37613fa5
GKH		 1// SPDX-License-Identifier: GPL-2.0
2//
3// Register map access API
4//
5// Copyright 2011 Wolfson Microelectronics plc
6//
7// Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
b83a313b 8
f5d6eba7 9#include <linux/device.h>
b83a313b 10#include <linux/slab.h>
19694b5e 11#include <linux/export.h>
b83a313b
MB		 12#include <linux/mutex.h>
13#include <linux/err.h>
c916d6ef 14#include <linux/property.h>
6863ca62 15#include <linux/rbtree.h>
30b2a553 16#include <linux/sched.h>
2de9d600 17#include <linux/delay.h>
ca747be2 18#include <linux/log2.h>
8698b936 19#include <linux/hwspinlock.h>
5f60d5f6 20#include <linux/unaligned.h>
b83a313b 21
fb2736bb 22#define CREATE_TRACE_POINTS
f58078da 23#include "trace.h"
fb2736bb 24
93de9124 25#include "internal.h"
b83a313b 26
1044c180
MB		 27/*
28 * Sometimes for failures during very early init the trace
29 * infrastructure isn't available early enough to be used. For this
30 * sort of problem defining LOG_DEVICE will add printks for basic
31 * register I/O on a specific device.
32 */
33#undef LOG_DEVICE
34
95093762
BD		 35#ifdef LOG_DEVICE
36static inline bool regmap_should_log(struct regmap *map)
37{
38 return (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0);
39}
40#else
41static inline bool regmap_should_log(struct regmap *map) { return false; }
42#endif
43
44
1044c180
MB		 45static int _regmap_update_bits(struct regmap *map, unsigned int reg,
46 unsigned int mask, unsigned int val,
7ff0589c 47 bool *change, bool force_write);
1044c180 48
3ac17037
BB		 49static int _regmap_bus_reg_read(void *context, unsigned int reg,
50 unsigned int *val);
ad278406
AS		 51static int _regmap_bus_read(void *context, unsigned int reg,
52 unsigned int *val);
07c320dc
AS		 53static int _regmap_bus_formatted_write(void *context, unsigned int reg,
54 unsigned int val);
3ac17037
BB		 55static int _regmap_bus_reg_write(void *context, unsigned int reg,
56 unsigned int val);
07c320dc
AS		 57static int _regmap_bus_raw_write(void *context, unsigned int reg,
58 unsigned int val);
ad278406 59
76aad392
DC		 60bool regmap_reg_in_ranges(unsigned int reg,
61 const struct regmap_range *ranges,
62 unsigned int nranges)
63{
64 const struct regmap_range *r;
65 int i;
66
67 for (i = 0, r = ranges; i < nranges; i++, r++)
68 if (regmap_reg_in_range(reg, r))
69 return true;
70 return false;
71}
72EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
73
154881e5
MB		 74bool regmap_check_range_table(struct regmap *map, unsigned int reg,
75 const struct regmap_access_table *table)
76aad392
DC		 76{
77 /* Check "no ranges" first */
78 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
79 return false;
80
81 /* In case zero "yes ranges" are supplied, any reg is OK */
82 if (!table->n_yes_ranges)
83 return true;
84
85 return regmap_reg_in_ranges(reg, table->yes_ranges,
86 table->n_yes_ranges);
87}
154881e5 88EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 89
8de2f081
MB		 90bool regmap_writeable(struct regmap *map, unsigned int reg)
91{
0ec74ad3 92 if (map->max_register_is_set && reg > map->max_register)
8de2f081
MB		 93 return false;
94
95 if (map->writeable_reg)
96 return map->writeable_reg(map->dev, reg);
97
76aad392 98 if (map->wr_table)
154881e5 99 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 100
8de2f081
MB		 101 return true;
102}
103
1ea975cf
CB		 104bool regmap_cached(struct regmap *map, unsigned int reg)
105{
106 int ret;
107 unsigned int val;
108
71df1793 109 if (map->cache_type == REGCACHE_NONE)
1ea975cf
CB		 110 return false;
111
112 if (!map->cache_ops)
113 return false;
114
0ec74ad3 115 if (map->max_register_is_set && reg > map->max_register)
1ea975cf
CB		 116 return false;
117
118 map->lock(map->lock_arg);
119 ret = regcache_read(map, reg, &val);
120 map->unlock(map->lock_arg);
121 if (ret)
122 return false;
123
124 return true;
125}
126
8de2f081
MB		 127bool regmap_readable(struct regmap *map, unsigned int reg)
128{
04dc91ce
LPC		 129 if (!map->reg_read)
130 return false;
131
0ec74ad3 132 if (map->max_register_is_set && reg > map->max_register)
8de2f081
MB		 133 return false;
134
4191f197
WS		 135 if (map->format.format_write)
136 return false;
137
8de2f081
MB		 138 if (map->readable_reg)
139 return map->readable_reg(map->dev, reg);
140
76aad392 141 if (map->rd_table)
154881e5 142 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 143
8de2f081
MB		 144 return true;
145}
146
147bool regmap_volatile(struct regmap *map, unsigned int reg)
148{
5844a8b9 149 if (!map->format.format_write && !regmap_readable(map, reg))
8de2f081
MB		 150 return false;
151
152 if (map->volatile_reg)
153 return map->volatile_reg(map->dev, reg);
154
76aad392 155 if (map->volatile_table)
154881e5 156 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 157
b92be6fe
MB		 158 if (map->cache_ops)
159 return false;
160 else
161 return true;
8de2f081
MB		 162}
163
164bool regmap_precious(struct regmap *map, unsigned int reg)
165{
4191f197 166 if (!regmap_readable(map, reg))
8de2f081
MB		 167 return false;
168
169 if (map->precious_reg)
170 return map->precious_reg(map->dev, reg);
171
76aad392 172 if (map->precious_table)
154881e5 173 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 174
8de2f081
MB		 175 return false;
176}
177
cdf6b11d
BW		 178bool regmap_writeable_noinc(struct regmap *map, unsigned int reg)
179{
180 if (map->writeable_noinc_reg)
181 return map->writeable_noinc_reg(map->dev, reg);
182
183 if (map->wr_noinc_table)
184 return regmap_check_range_table(map, reg, map->wr_noinc_table);
185
186 return true;
187}
188
74fe7b55
CDL		 189bool regmap_readable_noinc(struct regmap *map, unsigned int reg)
190{
191 if (map->readable_noinc_reg)
192 return map->readable_noinc_reg(map->dev, reg);
193
194 if (map->rd_noinc_table)
195 return regmap_check_range_table(map, reg, map->rd_noinc_table);
196
197 return true;
198}
199
82cd9965 200static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 201 size_t num)
82cd9965
LPC		 202{
203 unsigned int i;
204
205 for (i = 0; i < num; i++)
b8f9a03b 206 if (!regmap_volatile(map, reg + regmap_get_offset(map, i)))
82cd9965
LPC		 207 return false;
208
209 return true;
210}
211
0c2191c3
RR		 212static void regmap_format_12_20_write(struct regmap *map,
213 unsigned int reg, unsigned int val)
214{
215 u8 *out = map->work_buf;
216
217 out[0] = reg >> 4;
218 out[1] = (reg << 4) | (val >> 16);
219 out[2] = val >> 8;
220 out[3] = val;
221}
222
223
9aa50750
WS		 224static void regmap_format_2_6_write(struct regmap *map,
225 unsigned int reg, unsigned int val)
226{
227 u8 *out = map->work_buf;
228
229 *out = (reg << 6) | val;
230}
231
b83a313b
MB		 232static void regmap_format_4_12_write(struct regmap *map,
233 unsigned int reg, unsigned int val)
234{
235 __be16 *out = map->work_buf;
236 *out = cpu_to_be16((reg << 12) | val);
237}
238
239static void regmap_format_7_9_write(struct regmap *map,
240 unsigned int reg, unsigned int val)
241{
242 __be16 *out = map->work_buf;
243 *out = cpu_to_be16((reg << 9) | val);
244}
245
b24412af
AM		 246static void regmap_format_7_17_write(struct regmap *map,
247 unsigned int reg, unsigned int val)
248{
249 u8 *out = map->work_buf;
250
251 out[2] = val;
252 out[1] = val >> 8;
253 out[0] = (val >> 16) | (reg << 1);
254}
255
7e5ec63e
LPC		 256static void regmap_format_10_14_write(struct regmap *map,
257 unsigned int reg, unsigned int val)
258{
259 u8 *out = map->work_buf;
260
261 out[2] = val;
262 out[1] = (val >> 8) | (reg << 6);
263 out[0] = reg >> 2;
264}
265
d939fb9a 266static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB		 267{
268 u8 *b = buf;
269
d939fb9a 270 b[0] = val << shift;
b83a313b
MB		 271}
272
141eba2e 273static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b 274{
53d86095 275 put_unaligned_be16(val << shift, buf);
b83a313b
MB		 276}
277
4aa8c069
XL		 278static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
279{
53d86095 280 put_unaligned_le16(val << shift, buf);
4aa8c069
XL		 281}
282
141eba2e
SW		 283static void regmap_format_16_native(void *buf, unsigned int val,
284 unsigned int shift)
285{
53d86095
JTT		 286 u16 v = val << shift;
287
288 memcpy(buf, &v, sizeof(v));
141eba2e
SW		 289}
290
06000443 291static void regmap_format_24_be(void *buf, unsigned int val, unsigned int shift)
ea279fc5 292{
06000443 293 put_unaligned_be24(val << shift, buf);
ea279fc5
MR		 294}
295
141eba2e 296static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b 297{
53d86095 298 put_unaligned_be32(val << shift, buf);
7d5e525b
MB		 299}
300
4aa8c069
XL		 301static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
302{
53d86095 303 put_unaligned_le32(val << shift, buf);
4aa8c069
XL		 304}
305
141eba2e
SW		 306static void regmap_format_32_native(void *buf, unsigned int val,
307 unsigned int shift)
308{
53d86095
JTT		 309 u32 v = val << shift;
310
311 memcpy(buf, &v, sizeof(v));
141eba2e
SW		 312}
313
8a819ff8 314static void regmap_parse_inplace_noop(void *buf)
b83a313b 315{
8a819ff8
MB		 316}
317
318static unsigned int regmap_parse_8(const void *buf)
319{
320 const u8 *b = buf;
b83a313b
MB		 321
322 return b[0];
323}
324
8a819ff8
MB		 325static unsigned int regmap_parse_16_be(const void *buf)
326{
53d86095 327 return get_unaligned_be16(buf);
8a819ff8
MB		 328}
329
4aa8c069
XL		 330static unsigned int regmap_parse_16_le(const void *buf)
331{
53d86095 332 return get_unaligned_le16(buf);
4aa8c069
XL		 333}
334
8a819ff8 335static void regmap_parse_16_be_inplace(void *buf)
b83a313b 336{
53d86095 337 u16 v = get_unaligned_be16(buf);
b83a313b 338
53d86095 339 memcpy(buf, &v, sizeof(v));
b83a313b
MB		 340}
341
4aa8c069
XL		 342static void regmap_parse_16_le_inplace(void *buf)
343{
53d86095 344 u16 v = get_unaligned_le16(buf);
4aa8c069 345
53d86095 346 memcpy(buf, &v, sizeof(v));
4aa8c069
XL		 347}
348
8a819ff8 349static unsigned int regmap_parse_16_native(const void *buf)
141eba2e 350{
53d86095
JTT		 351 u16 v;
352
353 memcpy(&v, buf, sizeof(v));
354 return v;
141eba2e
SW		 355}
356
06000443 357static unsigned int regmap_parse_24_be(const void *buf)
ea279fc5 358{
06000443 359 return get_unaligned_be24(buf);
ea279fc5
MR		 360}
361
8a819ff8
MB		 362static unsigned int regmap_parse_32_be(const void *buf)
363{
53d86095 364 return get_unaligned_be32(buf);
8a819ff8
MB		 365}
366
4aa8c069
XL		 367static unsigned int regmap_parse_32_le(const void *buf)
368{
53d86095 369 return get_unaligned_le32(buf);
4aa8c069
XL		 370}
371
8a819ff8 372static void regmap_parse_32_be_inplace(void *buf)
7d5e525b 373{
53d86095 374 u32 v = get_unaligned_be32(buf);
7d5e525b 375
53d86095 376 memcpy(buf, &v, sizeof(v));
7d5e525b
MB		 377}
378
4aa8c069
XL		 379static void regmap_parse_32_le_inplace(void *buf)
380{
53d86095 381 u32 v = get_unaligned_le32(buf);
4aa8c069 382
53d86095 383 memcpy(buf, &v, sizeof(v));
4aa8c069
XL		 384}
385
8a819ff8 386static unsigned int regmap_parse_32_native(const void *buf)
141eba2e 387{
53d86095
JTT		 388 u32 v;
389
390 memcpy(&v, buf, sizeof(v));
391 return v;
141eba2e
SW		 392}
393
8698b936
BW		 394static void regmap_lock_hwlock(void *__map)
395{
396 struct regmap *map = __map;
397
398 hwspin_lock_timeout(map->hwlock, UINT_MAX);
399}
400
401static void regmap_lock_hwlock_irq(void *__map)
402{
403 struct regmap *map = __map;
404
405 hwspin_lock_timeout_irq(map->hwlock, UINT_MAX);
406}
407
408static void regmap_lock_hwlock_irqsave(void *__map)
409{
410 struct regmap *map = __map;
411
412 hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX,
413 &map->spinlock_flags);
414}
415
416static void regmap_unlock_hwlock(void *__map)
417{
418 struct regmap *map = __map;
419
420 hwspin_unlock(map->hwlock);
421}
422
423static void regmap_unlock_hwlock_irq(void *__map)
424{
425 struct regmap *map = __map;
426
427 hwspin_unlock_irq(map->hwlock);
428}
429
430static void regmap_unlock_hwlock_irqrestore(void *__map)
431{
432 struct regmap *map = __map;
433
434 hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags);
435}
436
81e30b18 437static void regmap_lock_unlock_none(void *__map)
c9b41fcf
BG		 438{
439
440}
8698b936 441
0d4529c5 442static void regmap_lock_mutex(void *__map)
bacdbe07 443{
0d4529c5 444 struct regmap *map = __map;
bacdbe07
SW		 445 mutex_lock(&map->mutex);
446}
447
0d4529c5 448static void regmap_unlock_mutex(void *__map)
bacdbe07 449{
0d4529c5 450 struct regmap *map = __map;
bacdbe07
SW		 451 mutex_unlock(&map->mutex);
452}
453
0d4529c5 454static void regmap_lock_spinlock(void *__map)
b4519c71 455__acquires(&map->spinlock)
bacdbe07 456{
0d4529c5 457 struct regmap *map = __map;
92ab1aab
LPC		 458 unsigned long flags;
459
460 spin_lock_irqsave(&map->spinlock, flags);
461 map->spinlock_flags = flags;
bacdbe07
SW		 462}
463
0d4529c5 464static void regmap_unlock_spinlock(void *__map)
b4519c71 465__releases(&map->spinlock)
bacdbe07 466{
0d4529c5 467 struct regmap *map = __map;
92ab1aab 468 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW		 469}
470
67021f25
VO		 471static void regmap_lock_raw_spinlock(void *__map)
472__acquires(&map->raw_spinlock)
473{
474 struct regmap *map = __map;
475 unsigned long flags;
476
477 raw_spin_lock_irqsave(&map->raw_spinlock, flags);
478 map->raw_spinlock_flags = flags;
479}
480
481static void regmap_unlock_raw_spinlock(void *__map)
482__releases(&map->raw_spinlock)
483{
484 struct regmap *map = __map;
485 raw_spin_unlock_irqrestore(&map->raw_spinlock, map->raw_spinlock_flags);
486}
487
72b39f6f
MB		 488static void dev_get_regmap_release(struct device *dev, void *res)
489{
490 /*
491 * We don't actually have anything to do here; the goal here
492 * is not to manage the regmap but to provide a simple way to
493 * get the regmap back given a struct device.
494 */
495}
496
6863ca62
KG		 497static bool _regmap_range_add(struct regmap *map,
498 struct regmap_range_node *data)
499{
500 struct rb_root *root = &map->range_tree;
501 struct rb_node **new = &(root->rb_node), *parent = NULL;
502
503 while (*new) {
504 struct regmap_range_node *this =
671a911b 505 rb_entry(*new, struct regmap_range_node, node);
6863ca62
KG		 506
507 parent = *new;
508 if (data->range_max < this->range_min)
509 new = &((*new)->rb_left);
510 else if (data->range_min > this->range_max)
511 new = &((*new)->rb_right);
512 else
513 return false;
514 }
515
516 rb_link_node(&data->node, parent, new);
517 rb_insert_color(&data->node, root);
518
519 return true;
520}
521
522static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
523 unsigned int reg)
524{
525 struct rb_node *node = map->range_tree.rb_node;
526
527 while (node) {
528 struct regmap_range_node *this =
671a911b 529 rb_entry(node, struct regmap_range_node, node);
6863ca62
KG		 530
531 if (reg < this->range_min)
532 node = node->rb_left;
533 else if (reg > this->range_max)
534 node = node->rb_right;
535 else
536 return this;
537 }
538
539 return NULL;
540}
541
542static void regmap_range_exit(struct regmap *map)
543{
544 struct rb_node *next;
545 struct regmap_range_node *range_node;
546
547 next = rb_first(&map->range_tree);
548 while (next) {
549 range_node = rb_entry(next, struct regmap_range_node, node);
550 next = rb_next(&range_node->node);
551 rb_erase(&range_node->node, &map->range_tree);
552 kfree(range_node);
553 }
554
555 kfree(map->selector_work_buf);
556}
557
94cc89eb
CK		 558static int regmap_set_name(struct regmap *map, const struct regmap_config *config)
559{
560 if (config->name) {
561 const char *name = kstrdup_const(config->name, GFP_KERNEL);
562
563 if (!name)
564 return -ENOMEM;
565
566 kfree_const(map->name);
567 map->name = name;
568 }
569
570 return 0;
571}
572
6cfec04b
MS		 573int regmap_attach_dev(struct device *dev, struct regmap *map,
574 const struct regmap_config *config)
575{
576 struct regmap **m;
94cc89eb 577 int ret;
6cfec04b
MS		 578
579 map->dev = dev;
580
94cc89eb
CK		 581 ret = regmap_set_name(map, config);
582 if (ret)
583 return ret;
584
530792ef 585 regmap_debugfs_exit(map);
94cc89eb 586 regmap_debugfs_init(map);
6cfec04b
MS		 587
588 /* Add a devres resource for dev_get_regmap() */
589 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
590 if (!m) {
591 regmap_debugfs_exit(map);
592 return -ENOMEM;
593 }
594 *m = map;
595 devres_add(dev, m);
596
597 return 0;
598}
599EXPORT_SYMBOL_GPL(regmap_attach_dev);
600
3061e170
CT		 601static int dev_get_regmap_match(struct device *dev, void *res, void *data);
602
603static int regmap_detach_dev(struct device *dev, struct regmap *map)
604{
605 if (!dev)
606 return 0;
607
608 return devres_release(dev, dev_get_regmap_release,
609 dev_get_regmap_match, (void *)map->name);
610}
611
cf673fbc
GU		 612static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
613 const struct regmap_config *config)
614{
615 enum regmap_endian endian;
616
617 /* Retrieve the endianness specification from the regmap config */
618 endian = config->reg_format_endian;
619
620 /* If the regmap config specified a non-default value, use that */
621 if (endian != REGMAP_ENDIAN_DEFAULT)
622 return endian;
623
624 /* Retrieve the endianness specification from the bus config */
625 if (bus && bus->reg_format_endian_default)
626 endian = bus->reg_format_endian_default;
d647c199 627
cf673fbc
GU		 628 /* If the bus specified a non-default value, use that */
629 if (endian != REGMAP_ENDIAN_DEFAULT)
630 return endian;
631
632 /* Use this if no other value was found */
633 return REGMAP_ENDIAN_BIG;
634}
635
3c174d29
GR		 636enum regmap_endian regmap_get_val_endian(struct device *dev,
637 const struct regmap_bus *bus,
638 const struct regmap_config *config)
d647c199 639{
c916d6ef 640 struct fwnode_handle *fwnode = dev ? dev_fwnode(dev) : NULL;
cf673fbc 641 enum regmap_endian endian;
d647c199 642
45e1a279 643 /* Retrieve the endianness specification from the regmap config */
cf673fbc 644 endian = config->val_format_endian;
d647c199 645
45e1a279 646 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU		 647 if (endian != REGMAP_ENDIAN_DEFAULT)
648 return endian;
d647c199 649
c916d6ef
AS		 650 /* If the firmware node exist try to get endianness from it */
651 if (fwnode_property_read_bool(fwnode, "big-endian"))
652 endian = REGMAP_ENDIAN_BIG;
653 else if (fwnode_property_read_bool(fwnode, "little-endian"))
654 endian = REGMAP_ENDIAN_LITTLE;
655 else if (fwnode_property_read_bool(fwnode, "native-endian"))
656 endian = REGMAP_ENDIAN_NATIVE;
657
658 /* If the endianness was specified in fwnode, use that */
659 if (endian != REGMAP_ENDIAN_DEFAULT)
660 return endian;
45e1a279
SW		 661
662 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU		 663 if (bus && bus->val_format_endian_default)
664 endian = bus->val_format_endian_default;
d647c199 665
45e1a279 666 /* If the bus specified a non-default value, use that */
cf673fbc
GU		 667 if (endian != REGMAP_ENDIAN_DEFAULT)
668 return endian;
45e1a279
SW		 669
670 /* Use this if no other value was found */
cf673fbc 671 return REGMAP_ENDIAN_BIG;
d647c199 672}
3c174d29 673EXPORT_SYMBOL_GPL(regmap_get_val_endian);
d647c199 674
3cfe7a74
NB		 675struct regmap *__regmap_init(struct device *dev,
676 const struct regmap_bus *bus,
677 void *bus_context,
678 const struct regmap_config *config,
679 struct lock_class_key *lock_key,
680 const char *lock_name)
b83a313b 681{
6cfec04b 682 struct regmap *map;
d36cb020 683 int ret = -EINVAL;
141eba2e 684 enum regmap_endian reg_endian, val_endian;
6863ca62 685 int i, j;
b83a313b 686
d2a5884a 687 if (!config)
abbb18fb 688 goto err;
b83a313b
MB		 689
690 map = kzalloc(sizeof(*map), GFP_KERNEL);
691 if (map == NULL) {
692 ret = -ENOMEM;
693 goto err;
694 }
695
94cc89eb
CK		 696 ret = regmap_set_name(map, config);
697 if (ret)
698 goto err_map;
8253bb3f 699
1d512ee8
CK		 700 ret = -EINVAL; /* Later error paths rely on this */
701
c9b41fcf 702 if (config->disable_locking) {
81e30b18 703 map->lock = map->unlock = regmap_lock_unlock_none;
21f8e482 704 map->can_sleep = config->can_sleep;
72465736 705 regmap_debugfs_disable(map);
c9b41fcf 706 } else if (config->lock && config->unlock) {
0d4529c5
DC		 707 map->lock = config->lock;
708 map->unlock = config->unlock;
709 map->lock_arg = config->lock_arg;
21f8e482 710 map->can_sleep = config->can_sleep;
a4887813 711 } else if (config->use_hwlock) {
8698b936
BW		 712 map->hwlock = hwspin_lock_request_specific(config->hwlock_id);
713 if (!map->hwlock) {
714 ret = -ENXIO;
8253bb3f 715 goto err_name;
8698b936
BW		 716 }
717
718 switch (config->hwlock_mode) {
719 case HWLOCK_IRQSTATE:
720 map->lock = regmap_lock_hwlock_irqsave;
721 map->unlock = regmap_unlock_hwlock_irqrestore;
722 break;
723 case HWLOCK_IRQ:
724 map->lock = regmap_lock_hwlock_irq;
725 map->unlock = regmap_unlock_hwlock_irq;
726 break;
727 default:
728 map->lock = regmap_lock_hwlock;
729 map->unlock = regmap_unlock_hwlock;
730 break;
731 }
732
733 map->lock_arg = map;
bacdbe07 734 } else {
d2a5884a
AS		 735 if ((bus && bus->fast_io) ||
736 config->fast_io) {
67021f25
VO		 737 if (config->use_raw_spinlock) {
738 raw_spin_lock_init(&map->raw_spinlock);
739 map->lock = regmap_lock_raw_spinlock;
740 map->unlock = regmap_unlock_raw_spinlock;
741 lockdep_set_class_and_name(&map->raw_spinlock,
742 lock_key, lock_name);
743 } else {
744 spin_lock_init(&map->spinlock);
745 map->lock = regmap_lock_spinlock;
746 map->unlock = regmap_unlock_spinlock;
747 lockdep_set_class_and_name(&map->spinlock,
748 lock_key, lock_name);
749 }
0d4529c5
DC		 750 } else {
751 mutex_init(&map->mutex);
752 map->lock = regmap_lock_mutex;
753 map->unlock = regmap_unlock_mutex;
21f8e482 754 map->can_sleep = true;
3cfe7a74
NB		 755 lockdep_set_class_and_name(&map->mutex,
756 lock_key, lock_name);
0d4529c5
DC		 757 }
758 map->lock_arg = map;
1ed9b927 759 map->lock_key = lock_key;
bacdbe07 760 }
b4a21fc2
SB		 761
762 /*
763 * When we write in fast-paths with regmap_bulk_write() don't allocate
764 * scratch buffers with sleeping allocations.
765 */
766 if ((bus && bus->fast_io) || config->fast_io)
767 map->alloc_flags = GFP_ATOMIC;
768 else
769 map->alloc_flags = GFP_KERNEL;
770
0074f3f2 771 map->reg_base = config->reg_base;
9b3cd5c7 772 map->reg_shift = config->pad_bits % 8;
0074f3f2 773
82159ba8 774 map->format.pad_bytes = config->pad_bits / 8;
4a670ac3 775 map->format.reg_shift = config->reg_shift;
9b3cd5c7 776 map->format.reg_bytes = BITS_TO_BYTES(config->reg_bits);
a4a7d86b
AS		 777 map->format.val_bytes = BITS_TO_BYTES(config->val_bits);
778 map->format.buf_size = BITS_TO_BYTES(config->reg_bits + config->val_bits + config->pad_bits);
f01ee60f
SW		 779 if (config->reg_stride)
780 map->reg_stride = config->reg_stride;
781 else
782 map->reg_stride = 1;
ca747be2
XL		 783 if (is_power_of_2(map->reg_stride))
784 map->reg_stride_order = ilog2(map->reg_stride);
785 else
786 map->reg_stride_order = -1;
d77e7456
MV		 787 map->use_single_read = config->use_single_read || !(config->read || (bus && bus->read));
788 map->use_single_write = config->use_single_write || !(config->write || (bus && bus->write));
789 map->can_multi_write = config->can_multi_write && (config->write || (bus && bus->write));
17649c90
SS		 790 if (bus) {
791 map->max_raw_read = bus->max_raw_read;
792 map->max_raw_write = bus->max_raw_write;
d77e7456
MV		 793 } else if (config->max_raw_read && config->max_raw_write) {
794 map->max_raw_read = config->max_raw_read;
795 map->max_raw_write = config->max_raw_write;
17649c90 796 }
b83a313b
MB		 797 map->dev = dev;
798 map->bus = bus;
0135bbcc 799 map->bus_context = bus_context;
2e2ae66d 800 map->max_register = config->max_register;
0ec74ad3 801 map->max_register_is_set = map->max_register ?: config->max_register_is_0;
76aad392
DC		 802 map->wr_table = config->wr_table;
803 map->rd_table = config->rd_table;
804 map->volatile_table = config->volatile_table;
805 map->precious_table = config->precious_table;
cdf6b11d 806 map->wr_noinc_table = config->wr_noinc_table;
74fe7b55 807 map->rd_noinc_table = config->rd_noinc_table;
2e2ae66d
MB		 808 map->writeable_reg = config->writeable_reg;
809 map->readable_reg = config->readable_reg;
810 map->volatile_reg = config->volatile_reg;
2efe1642 811 map->precious_reg = config->precious_reg;
cdf6b11d 812 map->writeable_noinc_reg = config->writeable_noinc_reg;
74fe7b55 813 map->readable_noinc_reg = config->readable_noinc_reg;
5d1729e7 814 map->cache_type = config->cache_type;
b83a313b 815
0d509f2b
MB		 816 spin_lock_init(&map->async_lock);
817 INIT_LIST_HEAD(&map->async_list);
7e09a979 818 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB		 819 init_waitqueue_head(&map->async_waitq);
820
9bf485c9
AD		 821 if (config->read_flag_mask ||
822 config->write_flag_mask ||
823 config->zero_flag_mask) {
6f306441
LPC		 824 map->read_flag_mask = config->read_flag_mask;
825 map->write_flag_mask = config->write_flag_mask;
d2a5884a 826 } else if (bus) {
6f306441
LPC		 827 map->read_flag_mask = bus->read_flag_mask;
828 }
829
d77e7456
MV		 830 if (config && config->read && config->write) {
831 map->reg_read = _regmap_bus_read;
739f872e
CM		 832 if (config->reg_update_bits)
833 map->reg_update_bits = config->reg_update_bits;
d77e7456
MV		 834
835 /* Bulk read/write */
836 map->read = config->read;
837 map->write = config->write;
838
839 reg_endian = REGMAP_ENDIAN_NATIVE;
840 val_endian = REGMAP_ENDIAN_NATIVE;
841 } else if (!bus) {
d2a5884a
AS		 842 map->reg_read = config->reg_read;
843 map->reg_write = config->reg_write;
02d6fdec 844 map->reg_update_bits = config->reg_update_bits;
d2a5884a 845
3ac17037
BB		 846 map->defer_caching = false;
847 goto skip_format_initialization;
848 } else if (!bus->read || !bus->write) {
849 map->reg_read = _regmap_bus_reg_read;
850 map->reg_write = _regmap_bus_reg_write;
80215f13 851 map->reg_update_bits = bus->reg_update_bits;
3ac17037 852
d2a5884a
AS		 853 map->defer_caching = false;
854 goto skip_format_initialization;
855 } else {
856 map->reg_read = _regmap_bus_read;
77792b11 857 map->reg_update_bits = bus->reg_update_bits;
d77e7456
MV		 858 /* Bulk read/write */
859 map->read = bus->read;
860 map->write = bus->write;
ad278406 861
d77e7456
MV		 862 reg_endian = regmap_get_reg_endian(bus, config);
863 val_endian = regmap_get_val_endian(dev, bus, config);
864 }
141eba2e 865
d939fb9a 866 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS		 867 case 2:
868 switch (config->val_bits) {
869 case 6:
870 map->format.format_write = regmap_format_2_6_write;
871 break;
872 default:
8698b936 873 goto err_hwlock;
9aa50750
WS		 874 }
875 break;
876
b83a313b
MB		 877 case 4:
878 switch (config->val_bits) {
879 case 12:
880 map->format.format_write = regmap_format_4_12_write;
881 break;
882 default:
8698b936 883 goto err_hwlock;
b83a313b
MB		 884 }
885 break;
886
887 case 7:
888 switch (config->val_bits) {
889 case 9:
890 map->format.format_write = regmap_format_7_9_write;
891 break;
b24412af
AM		 892 case 17:
893 map->format.format_write = regmap_format_7_17_write;
894 break;
b83a313b 895 default:
8698b936 896 goto err_hwlock;
b83a313b
MB		 897 }
898 break;
899
7e5ec63e
LPC		 900 case 10:
901 switch (config->val_bits) {
902 case 14:
903 map->format.format_write = regmap_format_10_14_write;
904 break;
905 default:
8698b936 906 goto err_hwlock;
7e5ec63e
LPC		 907 }
908 break;
909
0c2191c3
RR		 910 case 12:
911 switch (config->val_bits) {
912 case 20:
913 map->format.format_write = regmap_format_12_20_write;
914 break;
915 default:
916 goto err_hwlock;
917 }
918 break;
919
b83a313b
MB		 920 case 8:
921 map->format.format_reg = regmap_format_8;
922 break;
923
924 case 16:
141eba2e
SW		 925 switch (reg_endian) {
926 case REGMAP_ENDIAN_BIG:
927 map->format.format_reg = regmap_format_16_be;
928 break;
55562449
TL		 929 case REGMAP_ENDIAN_LITTLE:
930 map->format.format_reg = regmap_format_16_le;
931 break;
141eba2e
SW		 932 case REGMAP_ENDIAN_NATIVE:
933 map->format.format_reg = regmap_format_16_native;
934 break;
935 default:
8698b936 936 goto err_hwlock;
141eba2e 937 }
b83a313b
MB		 938 break;
939
237019e7 940 case 24:
06000443
AS		 941 switch (reg_endian) {
942 case REGMAP_ENDIAN_BIG:
943 map->format.format_reg = regmap_format_24_be;
944 break;
945 default:
8698b936 946 goto err_hwlock;
06000443 947 }
237019e7
LPC		 948 break;
949
7d5e525b 950 case 32:
141eba2e
SW		 951 switch (reg_endian) {
952 case REGMAP_ENDIAN_BIG:
953 map->format.format_reg = regmap_format_32_be;
954 break;
55562449
TL		 955 case REGMAP_ENDIAN_LITTLE:
956 map->format.format_reg = regmap_format_32_le;
957 break;
141eba2e
SW		 958 case REGMAP_ENDIAN_NATIVE:
959 map->format.format_reg = regmap_format_32_native;
960 break;
961 default:
8698b936 962 goto err_hwlock;
141eba2e 963 }
7d5e525b
MB		 964 break;
965
b83a313b 966 default:
8698b936 967 goto err_hwlock;
b83a313b
MB		 968 }
969
8a819ff8
MB		 970 if (val_endian == REGMAP_ENDIAN_NATIVE)
971 map->format.parse_inplace = regmap_parse_inplace_noop;
972
b83a313b
MB		 973 switch (config->val_bits) {
974 case 8:
975 map->format.format_val = regmap_format_8;
976 map->format.parse_val = regmap_parse_8;
8a819ff8 977 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB		 978 break;
979 case 16:
141eba2e
SW		 980 switch (val_endian) {
981 case REGMAP_ENDIAN_BIG:
982 map->format.format_val = regmap_format_16_be;
983 map->format.parse_val = regmap_parse_16_be;
8a819ff8 984 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 985 break;
4aa8c069
XL		 986 case REGMAP_ENDIAN_LITTLE:
987 map->format.format_val = regmap_format_16_le;
988 map->format.parse_val = regmap_parse_16_le;
989 map->format.parse_inplace = regmap_parse_16_le_inplace;
990 break;
141eba2e
SW		 991 case REGMAP_ENDIAN_NATIVE:
992 map->format.format_val = regmap_format_16_native;
993 map->format.parse_val = regmap_parse_16_native;
994 break;
995 default:
8698b936 996 goto err_hwlock;
141eba2e 997 }
b83a313b 998 break;
ea279fc5 999 case 24:
06000443
AS		 1000 switch (val_endian) {
1001 case REGMAP_ENDIAN_BIG:
1002 map->format.format_val = regmap_format_24_be;
1003 map->format.parse_val = regmap_parse_24_be;
1004 break;
1005 default:
8698b936 1006 goto err_hwlock;
06000443 1007 }
ea279fc5 1008 break;
7d5e525b 1009 case 32:
141eba2e
SW		 1010 switch (val_endian) {
1011 case REGMAP_ENDIAN_BIG:
1012 map->format.format_val = regmap_format_32_be;
1013 map->format.parse_val = regmap_parse_32_be;
8a819ff8 1014 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 1015 break;
4aa8c069
XL		 1016 case REGMAP_ENDIAN_LITTLE:
1017 map->format.format_val = regmap_format_32_le;
1018 map->format.parse_val = regmap_parse_32_le;
1019 map->format.parse_inplace = regmap_parse_32_le_inplace;
1020 break;
141eba2e
SW		 1021 case REGMAP_ENDIAN_NATIVE:
1022 map->format.format_val = regmap_format_32_native;
1023 map->format.parse_val = regmap_parse_32_native;
1024 break;
1025 default:
8698b936 1026 goto err_hwlock;
141eba2e 1027 }
7d5e525b 1028 break;
b83a313b
MB		 1029 }
1030
141eba2e
SW		 1031 if (map->format.format_write) {
1032 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
1033 (val_endian != REGMAP_ENDIAN_BIG))
8698b936 1034 goto err_hwlock;
67921a1a 1035 map->use_single_write = true;
141eba2e 1036 }
7a647614 1037
b83a313b
MB		 1038 if (!map->format.format_write &&
1039 !(map->format.format_reg && map->format.format_val))
8698b936 1040 goto err_hwlock;
b83a313b 1041
82159ba8 1042 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB		 1043 if (map->work_buf == NULL) {
1044 ret = -ENOMEM;
8698b936 1045 goto err_hwlock;
b83a313b
MB		 1046 }
1047
d2a5884a
AS		 1048 if (map->format.format_write) {
1049 map->defer_caching = false;
07c320dc 1050 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS		 1051 } else if (map->format.format_val) {
1052 map->defer_caching = true;
07c320dc 1053 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS		 1054 }
1055
1056skip_format_initialization:
07c320dc 1057
6863ca62 1058 map->range_tree = RB_ROOT;
e3549cd0 1059 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG		 1060 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
1061 struct regmap_range_node *new;
1062
1063 /* Sanity check */
061adc06 1064 if (range_cfg->range_max < range_cfg->range_min) {
3f1aa0c5 1065 dev_err(map->dev, "Invalid range %d: %u < %u\n", i,
061adc06 1066 range_cfg->range_max, range_cfg->range_min);
6863ca62 1067 goto err_range;
061adc06
MB		 1068 }
1069
1070 if (range_cfg->range_max > map->max_register) {
3f1aa0c5 1071 dev_err(map->dev, "Invalid range %d: %u > %u\n", i,
061adc06
MB		 1072 range_cfg->range_max, map->max_register);
1073 goto err_range;
1074 }
1075
1076 if (range_cfg->selector_reg > map->max_register) {
1077 dev_err(map->dev,
1078 "Invalid range %d: selector out of map\n", i);
1079 goto err_range;
1080 }
1081
1082 if (range_cfg->window_len == 0) {
1083 dev_err(map->dev, "Invalid range %d: window_len 0\n",
1084 i);
1085 goto err_range;
1086 }
6863ca62
KG		 1087
1088 /* Make sure, that this register range has no selector
1089 or data window within its boundary */
e3549cd0 1090 for (j = 0; j < config->num_ranges; j++) {
d63aa09f
JW		 1091 unsigned int sel_reg = config->ranges[j].selector_reg;
1092 unsigned int win_min = config->ranges[j].window_start;
1093 unsigned int win_max = win_min +
1094 config->ranges[j].window_len - 1;
6863ca62 1095
f161d220
PZ		 1096 /* Allow data window inside its own virtual range */
1097 if (j == i)
1098 continue;
1099
6863ca62
KG		 1100 if (range_cfg->range_min <= sel_reg &&
1101 sel_reg <= range_cfg->range_max) {
061adc06
MB		 1102 dev_err(map->dev,
1103 "Range %d: selector for %d in window\n",
1104 i, j);
6863ca62
KG		 1105 goto err_range;
1106 }
1107
1108 if (!(win_max < range_cfg->range_min ||
1109 win_min > range_cfg->range_max)) {
061adc06
MB		 1110 dev_err(map->dev,
1111 "Range %d: window for %d in window\n",
1112 i, j);
6863ca62
KG		 1113 goto err_range;
1114 }
1115 }
1116
1117 new = kzalloc(sizeof(*new), GFP_KERNEL);
1118 if (new == NULL) {
1119 ret = -ENOMEM;
1120 goto err_range;
1121 }
1122
4b020b3f 1123 new->map = map;
d058bb49 1124 new->name = range_cfg->name;
6863ca62
KG		 1125 new->range_min = range_cfg->range_min;
1126 new->range_max = range_cfg->range_max;
1127 new->selector_reg = range_cfg->selector_reg;
1128 new->selector_mask = range_cfg->selector_mask;
1129 new->selector_shift = range_cfg->selector_shift;
1130 new->window_start = range_cfg->window_start;
1131 new->window_len = range_cfg->window_len;
1132
53e87f88 1133 if (!_regmap_range_add(map, new)) {
061adc06 1134 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG		 1135 kfree(new);
1136 goto err_range;
1137 }
1138
1139 if (map->selector_work_buf == NULL) {
1140 map->selector_work_buf =
1141 kzalloc(map->format.buf_size, GFP_KERNEL);
1142 if (map->selector_work_buf == NULL) {
1143 ret = -ENOMEM;
1144 goto err_range;
1145 }
1146 }
1147 }
052d2cd1 1148
e5e3b8ab 1149 ret = regcache_init(map, config);
0ff3e62f 1150 if (ret != 0)
6863ca62
KG		 1151 goto err_range;
1152
a7a037c8 1153 if (dev) {
6cfec04b
MS		 1154 ret = regmap_attach_dev(dev, map, config);
1155 if (ret != 0)
1156 goto err_regcache;
9b947a13 1157 } else {
94cc89eb 1158 regmap_debugfs_init(map);
a7a037c8 1159 }
72b39f6f 1160
b83a313b
MB		 1161 return map;
1162
6cfec04b 1163err_regcache:
72b39f6f 1164 regcache_exit(map);
6863ca62
KG		 1165err_range:
1166 regmap_range_exit(map);
58072cbf 1167 kfree(map->work_buf);
8698b936 1168err_hwlock:
a1a68fca 1169 if (map->hwlock)
267f3e4f 1170 hwspin_lock_free(map->hwlock);
8253bb3f
BG		 1171err_name:
1172 kfree_const(map->name);
b83a313b
MB		 1173err_map:
1174 kfree(map);
1175err:
1176 return ERR_PTR(ret);
1177}
3cfe7a74 1178EXPORT_SYMBOL_GPL(__regmap_init);
b83a313b 1179
c0eb4676
MB		 1180static void devm_regmap_release(struct device *dev, void *res)
1181{
1182 regmap_exit(*(struct regmap **)res);
1183}
1184
3cfe7a74
NB		 1185struct regmap *__devm_regmap_init(struct device *dev,
1186 const struct regmap_bus *bus,
1187 void *bus_context,
1188 const struct regmap_config *config,
1189 struct lock_class_key *lock_key,
1190 const char *lock_name)
c0eb4676
MB		 1191{
1192 struct regmap **ptr, *regmap;
1193
1194 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
1195 if (!ptr)
1196 return ERR_PTR(-ENOMEM);
1197
3cfe7a74
NB		 1198 regmap = __regmap_init(dev, bus, bus_context, config,
1199 lock_key, lock_name);
c0eb4676
MB		 1200 if (!IS_ERR(regmap)) {
1201 *ptr = regmap;
1202 devres_add(dev, ptr);
1203 } else {
1204 devres_free(ptr);
1205 }
1206
1207 return regmap;
1208}
3cfe7a74 1209EXPORT_SYMBOL_GPL(__devm_regmap_init);
c0eb4676 1210
67252287
SK		 1211static void regmap_field_init(struct regmap_field *rm_field,
1212 struct regmap *regmap, struct reg_field reg_field)
1213{
67252287
SK		 1214 rm_field->regmap = regmap;
1215 rm_field->reg = reg_field.reg;
1216 rm_field->shift = reg_field.lsb;
921cc294 1217 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
cf39ed2e
MR		 1218
1219 WARN_ONCE(rm_field->mask == 0, "invalid empty mask defined\n");
1220
a0102375
KM		 1221 rm_field->id_size = reg_field.id_size;
1222 rm_field->id_offset = reg_field.id_offset;
67252287
SK		 1223}
1224
1225/**
2cf8e2df 1226 * devm_regmap_field_alloc() - Allocate and initialise a register field.
67252287
SK		 1227 *
1228 * @dev: Device that will be interacted with
1229 * @regmap: regmap bank in which this register field is located.
1230 * @reg_field: Register field with in the bank.
1231 *
1232 * The return value will be an ERR_PTR() on error or a valid pointer
1233 * to a struct regmap_field. The regmap_field will be automatically freed
1234 * by the device management code.
1235 */
1236struct regmap_field *devm_regmap_field_alloc(struct device *dev,
1237 struct regmap *regmap, struct reg_field reg_field)
1238{
1239 struct regmap_field *rm_field = devm_kzalloc(dev,
1240 sizeof(*rm_field), GFP_KERNEL);
1241 if (!rm_field)
1242 return ERR_PTR(-ENOMEM);
1243
1244 regmap_field_init(rm_field, regmap, reg_field);
1245
1246 return rm_field;
1247
1248}
1249EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
1250
ea470b82
SK		 1251
1252/**
1253 * regmap_field_bulk_alloc() - Allocate and initialise a bulk register field.
1254 *
1255 * @regmap: regmap bank in which this register field is located.
1256 * @rm_field: regmap register fields within the bank.
1257 * @reg_field: Register fields within the bank.
1258 * @num_fields: Number of register fields.
1259 *
1260 * The return value will be an -ENOMEM on error or zero for success.
1261 * Newly allocated regmap_fields should be freed by calling
1262 * regmap_field_bulk_free()
1263 */
1264int regmap_field_bulk_alloc(struct regmap *regmap,
1265 struct regmap_field **rm_field,
29c34975 1266 const struct reg_field *reg_field,
ea470b82
SK		 1267 int num_fields)
1268{
1269 struct regmap_field *rf;
1270 int i;
1271
1272 rf = kcalloc(num_fields, sizeof(*rf), GFP_KERNEL);
1273 if (!rf)
1274 return -ENOMEM;
1275
1276 for (i = 0; i < num_fields; i++) {
1277 regmap_field_init(&rf[i], regmap, reg_field[i]);
1278 rm_field[i] = &rf[i];
1279 }
1280
1281 return 0;
1282}
1283EXPORT_SYMBOL_GPL(regmap_field_bulk_alloc);
1284
1285/**
1286 * devm_regmap_field_bulk_alloc() - Allocate and initialise a bulk register
1287 * fields.
1288 *
1289 * @dev: Device that will be interacted with
1290 * @regmap: regmap bank in which this register field is located.
1291 * @rm_field: regmap register fields within the bank.
1292 * @reg_field: Register fields within the bank.
1293 * @num_fields: Number of register fields.
1294 *
1295 * The return value will be an -ENOMEM on error or zero for success.
1296 * Newly allocated regmap_fields will be automatically freed by the
1297 * device management code.
1298 */
1299int devm_regmap_field_bulk_alloc(struct device *dev,
1300 struct regmap *regmap,
1301 struct regmap_field **rm_field,
29c34975 1302 const struct reg_field *reg_field,
ea470b82
SK		 1303 int num_fields)
1304{
1305 struct regmap_field *rf;
1306 int i;
1307
1308 rf = devm_kcalloc(dev, num_fields, sizeof(*rf), GFP_KERNEL);
1309 if (!rf)
1310 return -ENOMEM;
1311
1312 for (i = 0; i < num_fields; i++) {
1313 regmap_field_init(&rf[i], regmap, reg_field[i]);
1314 rm_field[i] = &rf[i];
1315 }
1316
1317 return 0;
1318}
1319EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_alloc);
1320
1321/**
1322 * regmap_field_bulk_free() - Free register field allocated using
1323 * regmap_field_bulk_alloc.
1324 *
1325 * @field: regmap fields which should be freed.
1326 */
1327void regmap_field_bulk_free(struct regmap_field *field)
1328{
1329 kfree(field);
1330}
1331EXPORT_SYMBOL_GPL(regmap_field_bulk_free);
1332
1333/**
1334 * devm_regmap_field_bulk_free() - Free a bulk register field allocated using
1335 * devm_regmap_field_bulk_alloc.
1336 *
1337 * @dev: Device that will be interacted with
1338 * @field: regmap field which should be freed.
1339 *
1340 * Free register field allocated using devm_regmap_field_bulk_alloc(). Usually
1341 * drivers need not call this function, as the memory allocated via devm
1342 * will be freed as per device-driver life-cycle.
1343 */
1344void devm_regmap_field_bulk_free(struct device *dev,
1345 struct regmap_field *field)
1346{
1347 devm_kfree(dev, field);
1348}
1349EXPORT_SYMBOL_GPL(devm_regmap_field_bulk_free);
1350
67252287 1351/**
2cf8e2df
CK		 1352 * devm_regmap_field_free() - Free a register field allocated using
1353 * devm_regmap_field_alloc.
67252287
SK		 1354 *
1355 * @dev: Device that will be interacted with
1356 * @field: regmap field which should be freed.
2cf8e2df
CK		 1357 *
1358 * Free register field allocated using devm_regmap_field_alloc(). Usually
1359 * drivers need not call this function, as the memory allocated via devm
1360 * will be freed as per device-driver life-cyle.
67252287
SK		 1361 */
1362void devm_regmap_field_free(struct device *dev,
1363 struct regmap_field *field)
1364{
1365 devm_kfree(dev, field);
1366}
1367EXPORT_SYMBOL_GPL(devm_regmap_field_free);
1368
1369/**
2cf8e2df 1370 * regmap_field_alloc() - Allocate and initialise a register field.
67252287
SK		 1371 *
1372 * @regmap: regmap bank in which this register field is located.
1373 * @reg_field: Register field with in the bank.
1374 *
1375 * The return value will be an ERR_PTR() on error or a valid pointer
1376 * to a struct regmap_field. The regmap_field should be freed by the
1377 * user once its finished working with it using regmap_field_free().
1378 */
1379struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1380 struct reg_field reg_field)
1381{
1382 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1383
1384 if (!rm_field)
1385 return ERR_PTR(-ENOMEM);
1386
1387 regmap_field_init(rm_field, regmap, reg_field);
1388
1389 return rm_field;
1390}
1391EXPORT_SYMBOL_GPL(regmap_field_alloc);
1392
1393/**
2cf8e2df
CK		 1394 * regmap_field_free() - Free register field allocated using
1395 * regmap_field_alloc.
67252287
SK		 1396 *
1397 * @field: regmap field which should be freed.
1398 */
1399void regmap_field_free(struct regmap_field *field)
1400{
1401 kfree(field);
1402}
1403EXPORT_SYMBOL_GPL(regmap_field_free);
1404
bf315173 1405/**
2cf8e2df 1406 * regmap_reinit_cache() - Reinitialise the current register cache
bf315173
MB		 1407 *
1408 * @map: Register map to operate on.
1409 * @config: New configuration. Only the cache data will be used.
1410 *
1411 * Discard any existing register cache for the map and initialize a
1412 * new cache. This can be used to restore the cache to defaults or to
1413 * update the cache configuration to reflect runtime discovery of the
1414 * hardware.
4d879514
DP		 1415 *
1416 * No explicit locking is done here, the user needs to ensure that
1417 * this function will not race with other calls to regmap.
bf315173
MB		 1418 */
1419int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1420{
94cc89eb
CK		 1421 int ret;
1422
bf315173 1423 regcache_exit(map);
a24f64a6 1424 regmap_debugfs_exit(map);
bf315173
MB		 1425
1426 map->max_register = config->max_register;
0ec74ad3 1427 map->max_register_is_set = map->max_register ?: config->max_register_is_0;
bf315173
MB		 1428 map->writeable_reg = config->writeable_reg;
1429 map->readable_reg = config->readable_reg;
1430 map->volatile_reg = config->volatile_reg;
1431 map->precious_reg = config->precious_reg;
cdf6b11d 1432 map->writeable_noinc_reg = config->writeable_noinc_reg;
74fe7b55 1433 map->readable_noinc_reg = config->readable_noinc_reg;
bf315173
MB		 1434 map->cache_type = config->cache_type;
1435
94cc89eb
CK		 1436 ret = regmap_set_name(map, config);
1437 if (ret)
1438 return ret;
1439
1440 regmap_debugfs_init(map);
a24f64a6 1441
421e8d2d
MB		 1442 map->cache_bypass = false;
1443 map->cache_only = false;
1444
4d879514 1445 return regcache_init(map, config);
bf315173 1446}
752a6a5f 1447EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1448
b83a313b 1449/**
2cf8e2df
CK		 1450 * regmap_exit() - Free a previously allocated register map
1451 *
1452 * @map: Register map to operate on.
b83a313b
MB		 1453 */
1454void regmap_exit(struct regmap *map)
1455{
7e09a979
MB		 1456 struct regmap_async *async;
1457
3061e170 1458 regmap_detach_dev(map->dev, map);
5d1729e7 1459 regcache_exit(map);
fd4ebc07 1460
31244e39 1461 regmap_debugfs_exit(map);
6863ca62 1462 regmap_range_exit(map);
d2a5884a 1463 if (map->bus && map->bus->free_context)
0135bbcc 1464 map->bus->free_context(map->bus_context);
b83a313b 1465 kfree(map->work_buf);
7e09a979
MB		 1466 while (!list_empty(&map->async_free)) {
1467 async = list_first_entry_or_null(&map->async_free,
1468 struct regmap_async,
1469 list);
1470 list_del(&async->list);
1471 kfree(async->work_buf);
1472 kfree(async);
1473 }
a1a68fca 1474 if (map->hwlock)
e8419c40 1475 hwspin_lock_free(map->hwlock);
f74d63b8
BG		 1476 if (map->lock == regmap_lock_mutex)
1477 mutex_destroy(&map->mutex);
8253bb3f 1478 kfree_const(map->name);
95b2c3ec 1479 kfree(map->patch);
ea030ca6
LT		 1480 if (map->bus && map->bus->free_on_exit)
1481 kfree(map->bus);
b83a313b
MB		 1482 kfree(map);
1483}
1484EXPORT_SYMBOL_GPL(regmap_exit);
1485
72b39f6f
MB		 1486static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1487{
1488 struct regmap **r = res;
1489 if (!r || !*r) {
1490 WARN_ON(!r || !*r);
1491 return 0;
1492 }
1493
1494 /* If the user didn't specify a name match any */
1495 if (data)
c6df8433 1496 return (*r)->name && !strcmp((*r)->name, data);
72b39f6f
MB		 1497 else
1498 return 1;
1499}
1500
1501/**
2cf8e2df 1502 * dev_get_regmap() - Obtain the regmap (if any) for a device
72b39f6f
MB		 1503 *
1504 * @dev: Device to retrieve the map for
1505 * @name: Optional name for the register map, usually NULL.
1506 *
1507 * Returns the regmap for the device if one is present, or NULL. If
1508 * name is specified then it must match the name specified when
1509 * registering the device, if it is NULL then the first regmap found
1510 * will be used. Devices with multiple register maps are very rare,
1511 * generic code should normally not need to specify a name.
1512 */
1513struct regmap *dev_get_regmap(struct device *dev, const char *name)
1514{
1515 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1516 dev_get_regmap_match, (void *)name);
1517
1518 if (!r)
1519 return NULL;
1520 return *r;
1521}
1522EXPORT_SYMBOL_GPL(dev_get_regmap);
1523
8d7d3972 1524/**
2cf8e2df 1525 * regmap_get_device() - Obtain the device from a regmap
8d7d3972
TT		 1526 *
1527 * @map: Register map to operate on.
1528 *
1529 * Returns the underlying device that the regmap has been created for.
1530 */
1531struct device *regmap_get_device(struct regmap *map)
1532{
1533 return map->dev;
1534}
fa2fbe4a 1535EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1536
6863ca62 1537static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1538 struct regmap_range_node *range,
6863ca62
KG		 1539 unsigned int val_num)
1540{
6863ca62
KG		 1541 void *orig_work_buf;
1542 unsigned int win_offset;
1543 unsigned int win_page;
1544 bool page_chg;
1545 int ret;
1546
98bc7dfd
MB		 1547 win_offset = (*reg - range->range_min) % range->window_len;
1548 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1549
98bc7dfd
MB		 1550 if (val_num > 1) {
1551 /* Bulk write shouldn't cross range boundary */
1552 if (*reg + val_num - 1 > range->range_max)
1553 return -EINVAL;
6863ca62 1554
98bc7dfd
MB		 1555 /* ... or single page boundary */
1556 if (val_num > range->window_len - win_offset)
1557 return -EINVAL;
1558 }
6863ca62 1559
98bc7dfd
MB		 1560 /* It is possible to have selector register inside data window.
1561 In that case, selector register is located on every page and
1562 it needs no page switching, when accessed alone. */
1563 if (val_num > 1 ||
1564 range->window_start + win_offset != range->selector_reg) {
1565 /* Use separate work_buf during page switching */
1566 orig_work_buf = map->work_buf;
1567 map->work_buf = map->selector_work_buf;
6863ca62 1568
98bc7dfd
MB		 1569 ret = _regmap_update_bits(map, range->selector_reg,
1570 range->selector_mask,
1571 win_page << range->selector_shift,
7ff0589c 1572 &page_chg, false);
632a5b01 1573
98bc7dfd 1574 map->work_buf = orig_work_buf;
6863ca62 1575
0ff3e62f 1576 if (ret != 0)
98bc7dfd 1577 return ret;
6863ca62
KG		 1578 }
1579
98bc7dfd
MB		 1580 *reg = range->window_start + win_offset;
1581
6863ca62
KG		 1582 return 0;
1583}
1584
f50e38c9
TL		 1585static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes,
1586 unsigned long mask)
1587{
1588 u8 *buf;
1589 int i;
1590
1591 if (!mask || !map->work_buf)
1592 return;
1593
1594 buf = map->work_buf;
1595
1596 for (i = 0; i < max_bytes; i++)
1597 buf[i] |= (mask >> (8 * i)) & 0xff;
1598}
1599
3f58f6dc
MC		 1600static unsigned int regmap_reg_addr(struct regmap *map, unsigned int reg)
1601{
1602 reg += map->reg_base;
4a670ac3
MC		 1603
1604 if (map->format.reg_shift > 0)
1605 reg >>= map->format.reg_shift;
1606 else if (map->format.reg_shift < 0)
1607 reg <<= -(map->format.reg_shift);
1608
1609 return reg;
3f58f6dc
MC		 1610}
1611
7ef2c6b8 1612static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg,
05669b63 1613 const void *val, size_t val_len, bool noinc)
b83a313b 1614{
98bc7dfd 1615 struct regmap_range_node *range;
0d509f2b 1616 unsigned long flags;
0d509f2b
MB		 1617 void *work_val = map->work_buf + map->format.reg_bytes +
1618 map->format.pad_bytes;
b83a313b
MB		 1619 void *buf;
1620 int ret = -ENOTSUPP;
1621 size_t len;
73304781
MB		 1622 int i;
1623
2e31aab0
BW		 1624 /* Check for unwritable or noinc registers in range
1625 * before we start
1626 */
1627 if (!regmap_writeable_noinc(map, reg)) {
1628 for (i = 0; i < val_len / map->format.val_bytes; i++) {
1629 unsigned int element =
1630 reg + regmap_get_offset(map, i);
1631 if (!regmap_writeable(map, element) ||
1632 regmap_writeable_noinc(map, element))
1633 return -EINVAL;
1634 }
1635 }
b83a313b 1636
c9157198 1637 if (!map->cache_bypass && map->format.parse_val) {
984a4afd 1638 unsigned int ival, offset;
c9157198 1639 int val_bytes = map->format.val_bytes;
984a4afd
BW		 1640
1641 /* Cache the last written value for noinc writes */
1642 i = noinc ? val_len - val_bytes : 0;
1643 for (; i < val_len; i += val_bytes) {
1644 ival = map->format.parse_val(val + i);
1645 offset = noinc ? 0 : regmap_get_offset(map, i / val_bytes);
1646 ret = regcache_write(map, reg + offset, ival);
c9157198
LD		 1647 if (ret) {
1648 dev_err(map->dev,
6d04b8ac 1649 "Error in caching of register: %x ret: %d\n",
984a4afd 1650 reg + offset, ret);
c9157198
LD		 1651 return ret;
1652 }
1653 }
1654 if (map->cache_only) {
1655 map->cache_dirty = true;
1656 return 0;
1657 }
1658 }
1659
98bc7dfd
MB		 1660 range = _regmap_range_lookup(map, reg);
1661 if (range) {
8a2ceac6
MB		 1662 int val_num = val_len / map->format.val_bytes;
1663 int win_offset = (reg - range->range_min) % range->window_len;
1664 int win_residue = range->window_len - win_offset;
1665
1666 /* If the write goes beyond the end of the window split it */
1667 while (val_num > win_residue) {
1a61cfe3 1668 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6 1669 win_residue, val_len / map->format.val_bytes);
7ef2c6b8
CK		 1670 ret = _regmap_raw_write_impl(map, reg, val,
1671 win_residue *
05669b63 1672 map->format.val_bytes, noinc);
8a2ceac6
MB		 1673 if (ret != 0)
1674 return ret;
1675
1676 reg += win_residue;
1677 val_num -= win_residue;
1678 val += win_residue * map->format.val_bytes;
1679 val_len -= win_residue * map->format.val_bytes;
1680
1681 win_offset = (reg - range->range_min) %
1682 range->window_len;
1683 win_residue = range->window_len - win_offset;
1684 }
1685
05669b63 1686 ret = _regmap_select_page(map, &reg, range, noinc ? 1 : val_num);
0ff3e62f 1687 if (ret != 0)
98bc7dfd
MB		 1688 return ret;
1689 }
6863ca62 1690
3f58f6dc 1691 reg = regmap_reg_addr(map, reg);
d939fb9a 1692 map->format.format_reg(map->work_buf, reg, map->reg_shift);
f50e38c9
TL		 1693 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
1694 map->write_flag_mask);
6f306441 1695
651e013e
MB		 1696 /*
1697 * Essentially all I/O mechanisms will be faster with a single
1698 * buffer to write. Since register syncs often generate raw
1699 * writes of single registers optimise that case.
1700 */
1701 if (val != work_val && val_len == map->format.val_bytes) {
1702 memcpy(work_val, val, map->format.val_bytes);
1703 val = work_val;
1704 }
1705
d77e7456 1706 if (map->async && map->bus && map->bus->async_write) {
7e09a979 1707 struct regmap_async *async;
0d509f2b 1708
c6b570d9 1709 trace_regmap_async_write_start(map, reg, val_len);
fe7d4ccd 1710
7e09a979
MB		 1711 spin_lock_irqsave(&map->async_lock, flags);
1712 async = list_first_entry_or_null(&map->async_free,
1713 struct regmap_async,
1714 list);
1715 if (async)
1716 list_del(&async->list);
1717 spin_unlock_irqrestore(&map->async_lock, flags);
1718
1719 if (!async) {
1720 async = map->bus->async_alloc();
1721 if (!async)
1722 return -ENOMEM;
1723
1724 async->work_buf = kzalloc(map->format.buf_size,
1725 GFP_KERNEL | GFP_DMA);
1726 if (!async->work_buf) {
1727 kfree(async);
1728 return -ENOMEM;
1729 }
0d509f2b
MB		 1730 }
1731
0d509f2b
MB		 1732 async->map = map;
1733
1734 /* If the caller supplied the value we can use it safely. */
1735 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1736 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB		 1737
1738 spin_lock_irqsave(&map->async_lock, flags);
1739 list_add_tail(&async->list, &map->async_list);
1740 spin_unlock_irqrestore(&map->async_lock, flags);
1741
04c50ccf
MB		 1742 if (val != work_val)
1743 ret = map->bus->async_write(map->bus_context,
1744 async->work_buf,
1745 map->format.reg_bytes +
1746 map->format.pad_bytes,
1747 val, val_len, async);
1748 else
1749 ret = map->bus->async_write(map->bus_context,
1750 async->work_buf,
1751 map->format.reg_bytes +
1752 map->format.pad_bytes +
1753 val_len, NULL, 0, async);
0d509f2b
MB		 1754
1755 if (ret != 0) {
1756 dev_err(map->dev, "Failed to schedule write: %d\n",
1757 ret);
1758
1759 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1760 list_move(&async->list, &map->async_free);
0d509f2b 1761 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1762 }
f951b658
MB		 1763
1764 return ret;
0d509f2b
MB		 1765 }
1766
c6b570d9 1767 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 1768
2547e201
MB		 1769 /* If we're doing a single register write we can probably just
1770 * send the work_buf directly, otherwise try to do a gather
1771 * write.
1772 */
0d509f2b 1773 if (val == work_val)
d77e7456
MV		 1774 ret = map->write(map->bus_context, map->work_buf,
1775 map->format.reg_bytes +
1776 map->format.pad_bytes +
1777 val_len);
5c422f0b 1778 else if (map->bus && map->bus->gather_write)
0135bbcc 1779 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB		 1780 map->format.reg_bytes +
1781 map->format.pad_bytes,
b83a313b 1782 val, val_len);
db057679
SK		 1783 else
1784 ret = -ENOTSUPP;
b83a313b 1785
2547e201 1786 /* If that didn't work fall back on linearising by hand. */
b83a313b 1787 if (ret == -ENOTSUPP) {
82159ba8
MB		 1788 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1789 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB		 1790 if (!buf)
1791 return -ENOMEM;
1792
1793 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB		 1794 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1795 val, val_len);
d77e7456 1796 ret = map->write(map->bus_context, buf, len);
b83a313b
MB		 1797
1798 kfree(buf);
815806e3 1799 } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) {
f0aa1ce6
NY		 1800 /* regcache_drop_region() takes lock that we already have,
1801 * thus call map->cache_ops->drop() directly
1802 */
1803 if (map->cache_ops && map->cache_ops->drop)
1804 map->cache_ops->drop(map, reg, reg + 1);
b83a313b
MB		 1805 }
1806
c6b570d9 1807 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
fb2736bb 1808
b83a313b
MB		 1809 return ret;
1810}
1811
221ad7f2
MB		 1812/**
1813 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1814 *
1815 * @map: Map to check.
1816 */
1817bool regmap_can_raw_write(struct regmap *map)
1818{
2a166929 1819 return map->write && map->format.format_val && map->format.format_reg;
221ad7f2
MB		 1820}
1821EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1822
f50c9eb4
MP		 1823/**
1824 * regmap_get_raw_read_max - Get the maximum size we can read
1825 *
1826 * @map: Map to check.
1827 */
1828size_t regmap_get_raw_read_max(struct regmap *map)
1829{
1830 return map->max_raw_read;
1831}
1832EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1833
1834/**
1835 * regmap_get_raw_write_max - Get the maximum size we can read
1836 *
1837 * @map: Map to check.
1838 */
1839size_t regmap_get_raw_write_max(struct regmap *map)
1840{
1841 return map->max_raw_write;
1842}
1843EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1844
07c320dc
AS		 1845static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1846 unsigned int val)
1847{
1848 int ret;
1849 struct regmap_range_node *range;
1850 struct regmap *map = context;
1851
d77e7456 1852 WARN_ON(!map->format.format_write);
07c320dc
AS		 1853
1854 range = _regmap_range_lookup(map, reg);
1855 if (range) {
1856 ret = _regmap_select_page(map, &reg, range, 1);
1857 if (ret != 0)
1858 return ret;
1859 }
1860
3f58f6dc 1861 reg = regmap_reg_addr(map, reg);
07c320dc
AS		 1862 map->format.format_write(map, reg, val);
1863
c6b570d9 1864 trace_regmap_hw_write_start(map, reg, 1);
07c320dc 1865
d77e7456 1866 ret = map->write(map->bus_context, map->work_buf, map->format.buf_size);
07c320dc 1867
c6b570d9 1868 trace_regmap_hw_write_done(map, reg, 1);
07c320dc
AS		 1869
1870 return ret;
1871}
1872
3ac17037
BB		 1873static int _regmap_bus_reg_write(void *context, unsigned int reg,
1874 unsigned int val)
1875{
1876 struct regmap *map = context;
f18ee501
MB		 1877 struct regmap_range_node *range;
1878 int ret;
1879
1880 range = _regmap_range_lookup(map, reg);
1881 if (range) {
1882 ret = _regmap_select_page(map, &reg, range, 1);
1883 if (ret != 0)
1884 return ret;
1885 }
3ac17037 1886
3f58f6dc 1887 reg = regmap_reg_addr(map, reg);
3ac17037
BB		 1888 return map->bus->reg_write(map->bus_context, reg, val);
1889}
1890
07c320dc
AS		 1891static int _regmap_bus_raw_write(void *context, unsigned int reg,
1892 unsigned int val)
1893{
1894 struct regmap *map = context;
1895
d77e7456 1896 WARN_ON(!map->format.format_val);
07c320dc
AS		 1897
1898 map->format.format_val(map->work_buf + map->format.reg_bytes
1899 + map->format.pad_bytes, val, 0);
7ef2c6b8
CK		 1900 return _regmap_raw_write_impl(map, reg,
1901 map->work_buf +
1902 map->format.reg_bytes +
1903 map->format.pad_bytes,
05669b63
DB		 1904 map->format.val_bytes,
1905 false);
07c320dc
AS		 1906}
1907
d2a5884a
AS		 1908static inline void *_regmap_map_get_context(struct regmap *map)
1909{
d77e7456 1910 return (map->bus || (!map->bus && map->read)) ? map : map->bus_context;
d2a5884a
AS		 1911}
1912
4d2dc095
DP		 1913int _regmap_write(struct regmap *map, unsigned int reg,
1914 unsigned int val)
b83a313b 1915{
fb2736bb 1916 int ret;
d2a5884a 1917 void *context = _regmap_map_get_context(map);
b83a313b 1918
515f2261
IN		 1919 if (!regmap_writeable(map, reg))
1920 return -EIO;
1921
d2a5884a 1922 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP		 1923 ret = regcache_write(map, reg, val);
1924 if (ret != 0)
1925 return ret;
8ae0d7e8
MB		 1926 if (map->cache_only) {
1927 map->cache_dirty = true;
5d1729e7 1928 return 0;
8ae0d7e8 1929 }
5d1729e7
DP		 1930 }
1931
f7d01359
LT		 1932 ret = map->reg_write(context, reg, val);
1933 if (ret == 0) {
1934 if (regmap_should_log(map))
1935 dev_info(map->dev, "%x <= %x\n", reg, val);
1044c180 1936
f7d01359
LT		 1937 trace_regmap_reg_write(map, reg, val);
1938 }
fb2736bb 1939
f7d01359 1940 return ret;
b83a313b
MB		 1941}
1942
1943/**
2cf8e2df 1944 * regmap_write() - Write a value to a single register
b83a313b
MB		 1945 *
1946 * @map: Register map to write to
1947 * @reg: Register to write to
1948 * @val: Value to be written
1949 *
1950 * A value of zero will be returned on success, a negative errno will
1951 * be returned in error cases.
1952 */
1953int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1954{
1955 int ret;
1956
fcac0233 1957 if (!IS_ALIGNED(reg, map->reg_stride))
f01ee60f
SW		 1958 return -EINVAL;
1959
0d4529c5 1960 map->lock(map->lock_arg);
b83a313b
MB		 1961
1962 ret = _regmap_write(map, reg, val);
1963
0d4529c5 1964 map->unlock(map->lock_arg);
b83a313b
MB		 1965
1966 return ret;
1967}
1968EXPORT_SYMBOL_GPL(regmap_write);
1969
915f441b 1970/**
2cf8e2df 1971 * regmap_write_async() - Write a value to a single register asynchronously
915f441b
MB		 1972 *
1973 * @map: Register map to write to
1974 * @reg: Register to write to
1975 * @val: Value to be written
1976 *
1977 * A value of zero will be returned on success, a negative errno will
1978 * be returned in error cases.
1979 */
1980int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1981{
1982 int ret;
1983
fcac0233 1984 if (!IS_ALIGNED(reg, map->reg_stride))
915f441b
MB		 1985 return -EINVAL;
1986
1987 map->lock(map->lock_arg);
1988
1989 map->async = true;
1990
1991 ret = _regmap_write(map, reg, val);
1992
1993 map->async = false;
1994
1995 map->unlock(map->lock_arg);
1996
1997 return ret;
1998}
1999EXPORT_SYMBOL_GPL(regmap_write_async);
2000
7ef2c6b8 2001int _regmap_raw_write(struct regmap *map, unsigned int reg,
05669b63 2002 const void *val, size_t val_len, bool noinc)
7ef2c6b8
CK		 2003{
2004 size_t val_bytes = map->format.val_bytes;
2005 size_t val_count = val_len / val_bytes;
364e378b
CK		 2006 size_t chunk_count, chunk_bytes;
2007 size_t chunk_regs = val_count;
7ef2c6b8
CK		 2008 int ret, i;
2009
2010 if (!val_count)
2011 return -EINVAL;
2012
364e378b
CK		 2013 if (map->use_single_write)
2014 chunk_regs = 1;
bc647348
MB		 2015 else if (map->max_raw_write && val_len > map->max_raw_write)
2016 chunk_regs = map->max_raw_write / val_bytes;
364e378b
CK		 2017
2018 chunk_count = val_count / chunk_regs;
2019 chunk_bytes = chunk_regs * val_bytes;
7ef2c6b8
CK		 2020
2021 /* Write as many bytes as possible with chunk_size */
2022 for (i = 0; i < chunk_count; i++) {
05669b63 2023 ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes, noinc);
7ef2c6b8
CK		 2024 if (ret)
2025 return ret;
364e378b
CK		 2026
2027 reg += regmap_get_offset(map, chunk_regs);
2028 val += chunk_bytes;
2029 val_len -= chunk_bytes;
7ef2c6b8
CK		 2030 }
2031
2032 /* Write remaining bytes */
364e378b 2033 if (val_len)
05669b63 2034 ret = _regmap_raw_write_impl(map, reg, val, val_len, noinc);
7ef2c6b8
CK		 2035
2036 return ret;
2037}
2038
b83a313b 2039/**
2cf8e2df 2040 * regmap_raw_write() - Write raw values to one or more registers
b83a313b
MB		 2041 *
2042 * @map: Register map to write to
2043 * @reg: Initial register to write to
2044 * @val: Block of data to be written, laid out for direct transmission to the
2045 * device
2046 * @val_len: Length of data pointed to by val.
2047 *
2048 * This function is intended to be used for things like firmware
2049 * download where a large block of data needs to be transferred to the
2050 * device. No formatting will be done on the data provided.
2051 *
2052 * A value of zero will be returned on success, a negative errno will
2053 * be returned in error cases.
2054 */
2055int regmap_raw_write(struct regmap *map, unsigned int reg,
2056 const void *val, size_t val_len)
2057{
2058 int ret;
2059
221ad7f2 2060 if (!regmap_can_raw_write(map))
d2a5884a 2061 return -EINVAL;
851960ba
SW		 2062 if (val_len % map->format.val_bytes)
2063 return -EINVAL;
2064
0d4529c5 2065 map->lock(map->lock_arg);
b83a313b 2066
05669b63 2067 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 2068
0d4529c5 2069 map->unlock(map->lock_arg);
b83a313b
MB		 2070
2071 return ret;
2072}
2073EXPORT_SYMBOL_GPL(regmap_raw_write);
2074
c20cc099
LW		 2075static int regmap_noinc_readwrite(struct regmap *map, unsigned int reg,
2076 void *val, unsigned int val_len, bool write)
2077{
2078 size_t val_bytes = map->format.val_bytes;
2079 size_t val_count = val_len / val_bytes;
2080 unsigned int lastval;
2081 u8 *u8p;
2082 u16 *u16p;
2083 u32 *u32p;
c20cc099
LW		 2084 int ret;
2085 int i;
2086
2087 switch (val_bytes) {
2088 case 1:
2089 u8p = val;
2090 if (write)
2091 lastval = (unsigned int)u8p[val_count - 1];
2092 break;
2093 case 2:
2094 u16p = val;
2095 if (write)
2096 lastval = (unsigned int)u16p[val_count - 1];
2097 break;
2098 case 4:
2099 u32p = val;
2100 if (write)
2101 lastval = (unsigned int)u32p[val_count - 1];
2102 break;
c20cc099
LW		 2103 default:
2104 return -EINVAL;
2105 }
2106
2107 /*
2108 * Update the cache with the last value we write, the rest is just
2109 * gone down in the hardware FIFO. We can't cache FIFOs. This makes
2110 * sure a single read from the cache will work.
2111 */
2112 if (write) {
2113 if (!map->cache_bypass && !map->defer_caching) {
2114 ret = regcache_write(map, reg, lastval);
2115 if (ret != 0)
2116 return ret;
2117 if (map->cache_only) {
2118 map->cache_dirty = true;
2119 return 0;
2120 }
2121 }
2122 ret = map->bus->reg_noinc_write(map->bus_context, reg, val, val_count);
2123 } else {
2124 ret = map->bus->reg_noinc_read(map->bus_context, reg, val, val_count);
2125 }
2126
2127 if (!ret && regmap_should_log(map)) {
2128 dev_info(map->dev, "%x %s [", reg, write ? "<=" : "=>");
b7059927 2129 for (i = 0; i < val_count; i++) {
c20cc099
LW		 2130 switch (val_bytes) {
2131 case 1:
2132 pr_cont("%x", u8p[i]);
2133 break;
2134 case 2:
2135 pr_cont("%x", u16p[i]);
2136 break;
2137 case 4:
2138 pr_cont("%x", u32p[i]);
2139 break;
c20cc099
LW		 2140 default:
2141 break;
2142 }
b7059927 2143 if (i == (val_count - 1))
c20cc099
LW		 2144 pr_cont("]\n");
2145 else
2146 pr_cont(",");
2147 }
2148 }
2149
2150 return 0;
2151}
2152
cdf6b11d 2153/**
1957b92a 2154 * regmap_noinc_write(): Write data to a register without incrementing the
cdf6b11d
BW		 2155 * register number
2156 *
2157 * @map: Register map to write to
2158 * @reg: Register to write to
2159 * @val: Pointer to data buffer
2160 * @val_len: Length of output buffer in bytes.
2161 *
2162 * The regmap API usually assumes that bulk bus write operations will write a
2163 * range of registers. Some devices have certain registers for which a write
2164 * operation can write to an internal FIFO.
2165 *
2166 * The target register must be volatile but registers after it can be
2167 * completely unrelated cacheable registers.
2168 *
2169 * This will attempt multiple writes as required to write val_len bytes.
2170 *
2171 * A value of zero will be returned on success, a negative errno will be
2172 * returned in error cases.
2173 */
2174int regmap_noinc_write(struct regmap *map, unsigned int reg,
2175 const void *val, size_t val_len)
2176{
2177 size_t write_len;
2178 int ret;
2179
c20cc099
LW		 2180 if (!map->write && !(map->bus && map->bus->reg_noinc_write))
2181 return -EINVAL;
cdf6b11d
BW		 2182 if (val_len % map->format.val_bytes)
2183 return -EINVAL;
2184 if (!IS_ALIGNED(reg, map->reg_stride))
2185 return -EINVAL;
2186 if (val_len == 0)
2187 return -EINVAL;
2188
2189 map->lock(map->lock_arg);
2190
2191 if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) {
2192 ret = -EINVAL;
2193 goto out_unlock;
2194 }
2195
c20cc099
LW		 2196 /*
2197 * Use the accelerated operation if we can. The val drops the const
2198 * typing in order to facilitate code reuse in regmap_noinc_readwrite().
2199 */
2200 if (map->bus->reg_noinc_write) {
2201 ret = regmap_noinc_readwrite(map, reg, (void *)val, val_len, true);
2202 goto out_unlock;
2203 }
2204
cdf6b11d
BW		 2205 while (val_len) {
2206 if (map->max_raw_write && map->max_raw_write < val_len)
2207 write_len = map->max_raw_write;
2208 else
2209 write_len = val_len;
05669b63 2210 ret = _regmap_raw_write(map, reg, val, write_len, true);
cdf6b11d
BW		 2211 if (ret)
2212 goto out_unlock;
2213 val = ((u8 *)val) + write_len;
2214 val_len -= write_len;
2215 }
2216
2217out_unlock:
2218 map->unlock(map->lock_arg);
2219 return ret;
2220}
2221EXPORT_SYMBOL_GPL(regmap_noinc_write);
2222
67252287 2223/**
2cf8e2df
CK		 2224 * regmap_field_update_bits_base() - Perform a read/modify/write cycle a
2225 * register field.
fdf20029
KM		 2226 *
2227 * @field: Register field to write to
2228 * @mask: Bitmask to change
2229 * @val: Value to be written
28972eaa
KM		 2230 * @change: Boolean indicating if a write was done
2231 * @async: Boolean indicating asynchronously
2232 * @force: Boolean indicating use force update
fdf20029 2233 *
2cf8e2df
CK		 2234 * Perform a read/modify/write cycle on the register field with change,
2235 * async, force option.
2236 *
fdf20029
KM		 2237 * A value of zero will be returned on success, a negative errno will
2238 * be returned in error cases.
2239 */
28972eaa
KM		 2240int regmap_field_update_bits_base(struct regmap_field *field,
2241 unsigned int mask, unsigned int val,
2242 bool *change, bool async, bool force)
fdf20029
KM		 2243{
2244 mask = (mask << field->shift) & field->mask;
2245
28972eaa
KM		 2246 return regmap_update_bits_base(field->regmap, field->reg,
2247 mask, val << field->shift,
2248 change, async, force);
e874e6c7 2249}
28972eaa 2250EXPORT_SYMBOL_GPL(regmap_field_update_bits_base);
e874e6c7 2251
f67be8b7
LC		 2252/**
2253 * regmap_field_test_bits() - Check if all specified bits are set in a
2254 * register field.
2255 *
2256 * @field: Register field to operate on
2257 * @bits: Bits to test
2258 *
2259 * Returns -1 if the underlying regmap_field_read() fails, 0 if at least one of the
2260 * tested bits is not set and 1 if all tested bits are set.
2261 */
2262int regmap_field_test_bits(struct regmap_field *field, unsigned int bits)
2263{
2264 unsigned int val, ret;
2265
2266 ret = regmap_field_read(field, &val);
2267 if (ret)
2268 return ret;
2269
2270 return (val & bits) == bits;
2271}
2272EXPORT_SYMBOL_GPL(regmap_field_test_bits);
2273
a0102375 2274/**
2cf8e2df
CK		 2275 * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a
2276 * register field with port ID
a0102375
KM		 2277 *
2278 * @field: Register field to write to
2279 * @id: port ID
2280 * @mask: Bitmask to change
2281 * @val: Value to be written
e126edec
KM		 2282 * @change: Boolean indicating if a write was done
2283 * @async: Boolean indicating asynchronously
2284 * @force: Boolean indicating use force update
a0102375
KM		 2285 *
2286 * A value of zero will be returned on success, a negative errno will
2287 * be returned in error cases.
2288 */
9fb9b771 2289int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id,
e126edec
KM		 2290 unsigned int mask, unsigned int val,
2291 bool *change, bool async, bool force)
a0102375
KM		 2292{
2293 if (id >= field->id_size)
2294 return -EINVAL;
2295
2296 mask = (mask << field->shift) & field->mask;
2297
e126edec
KM		 2298 return regmap_update_bits_base(field->regmap,
2299 field->reg + (field->id_offset * id),
2300 mask, val << field->shift,
2301 change, async, force);
a0102375 2302}
e126edec 2303EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base);
a0102375 2304
2cf8e2df
CK		 2305/**
2306 * regmap_bulk_write() - Write multiple registers to the device
8eaeb219
LD		 2307 *
2308 * @map: Register map to write to
2309 * @reg: First register to be write from
2310 * @val: Block of data to be written, in native register size for device
2311 * @val_count: Number of registers to write
2312 *
2313 * This function is intended to be used for writing a large block of
31b35e9e 2314 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD		 2315 *
2316 * A value of zero will be returned on success, a negative errno will
2317 * be returned in error cases.
2318 */
2319int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
2320 size_t val_count)
2321{
2322 int ret = 0, i;
2323 size_t val_bytes = map->format.val_bytes;
8eaeb219 2324
fcac0233 2325 if (!IS_ALIGNED(reg, map->reg_stride))
f01ee60f 2326 return -EINVAL;
8eaeb219 2327
f4298360 2328 /*
fb44f3ce
CK		 2329 * Some devices don't support bulk write, for them we have a series of
2330 * single write operations.
f4298360 2331 */
2a166929 2332 if (!map->write || !map->format.parse_inplace) {
4999e962 2333 map->lock(map->lock_arg);
f4298360
SB		 2334 for (i = 0; i < val_count; i++) {
2335 unsigned int ival;
2336
2337 switch (val_bytes) {
2338 case 1:
2339 ival = *(u8 *)(val + (i * val_bytes));
2340 break;
2341 case 2:
2342 ival = *(u16 *)(val + (i * val_bytes));
2343 break;
2344 case 4:
2345 ival = *(u32 *)(val + (i * val_bytes));
2346 break;
f4298360
SB		 2347 default:
2348 ret = -EINVAL;
2349 goto out;
2350 }
8eaeb219 2351
ca747be2
XL		 2352 ret = _regmap_write(map,
2353 reg + regmap_get_offset(map, i),
2354 ival);
f4298360
SB		 2355 if (ret != 0)
2356 goto out;
2357 }
4999e962
TI		 2358out:
2359 map->unlock(map->lock_arg);
8eaeb219 2360 } else {
f4298360
SB		 2361 void *wval;
2362
f6841d41 2363 wval = kmemdup_array(val, val_count, val_bytes, map->alloc_flags);
b4ecfec5 2364 if (!wval)
4999e962 2365 return -ENOMEM;
b4ecfec5 2366
8eaeb219 2367 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2368 map->format.parse_inplace(wval + i);
f4298360 2369
7ef2c6b8 2370 ret = regmap_raw_write(map, reg, wval, val_bytes * val_count);
8eaeb219 2371
8eaeb219 2372 kfree(wval);
f4298360 2373 }
026c99b5
DR		 2374
2375 if (!ret)
2376 trace_regmap_bulk_write(map, reg, val, val_bytes * val_count);
2377
8eaeb219
LD		 2378 return ret;
2379}
2380EXPORT_SYMBOL_GPL(regmap_bulk_write);
2381
e894c3f4
OAO		 2382/*
2383 * _regmap_raw_multi_reg_write()
2384 *
2385 * the (register,newvalue) pairs in regs have not been formatted, but
2386 * they are all in the same page and have been changed to being page
b486afbd 2387 * relative. The page register has been written if that was necessary.
e894c3f4
OAO		 2388 */
2389static int _regmap_raw_multi_reg_write(struct regmap *map,
8019ff6c 2390 const struct reg_sequence *regs,
e894c3f4
OAO		 2391 size_t num_regs)
2392{
2393 int ret;
2394 void *buf;
2395 int i;
2396 u8 *u8;
2397 size_t val_bytes = map->format.val_bytes;
2398 size_t reg_bytes = map->format.reg_bytes;
2399 size_t pad_bytes = map->format.pad_bytes;
2400 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
2401 size_t len = pair_size * num_regs;
2402
f5727cd3
XL		 2403 if (!len)
2404 return -EINVAL;
2405
e894c3f4
OAO		 2406 buf = kzalloc(len, GFP_KERNEL);
2407 if (!buf)
2408 return -ENOMEM;
2409
2410 /* We have to linearise by hand. */
2411
2412 u8 = buf;
2413
2414 for (i = 0; i < num_regs; i++) {
2f9b660b
MP		 2415 unsigned int reg = regs[i].reg;
2416 unsigned int val = regs[i].def;
c6b570d9 2417 trace_regmap_hw_write_start(map, reg, 1);
3f58f6dc 2418 reg = regmap_reg_addr(map, reg);
e894c3f4
OAO		 2419 map->format.format_reg(u8, reg, map->reg_shift);
2420 u8 += reg_bytes + pad_bytes;
2421 map->format.format_val(u8, val, 0);
2422 u8 += val_bytes;
2423 }
2424 u8 = buf;
2425 *u8 |= map->write_flag_mask;
2426
d77e7456 2427 ret = map->write(map->bus_context, buf, len);
e894c3f4
OAO		 2428
2429 kfree(buf);
2430
2431 for (i = 0; i < num_regs; i++) {
2432 int reg = regs[i].reg;
c6b570d9 2433 trace_regmap_hw_write_done(map, reg, 1);
e894c3f4
OAO		 2434 }
2435 return ret;
2436}
2437
2438static unsigned int _regmap_register_page(struct regmap *map,
2439 unsigned int reg,
2440 struct regmap_range_node *range)
2441{
2442 unsigned int win_page = (reg - range->range_min) / range->window_len;
2443
2444 return win_page;
2445}
2446
2447static int _regmap_range_multi_paged_reg_write(struct regmap *map,
8019ff6c 2448 struct reg_sequence *regs,
e894c3f4
OAO		 2449 size_t num_regs)
2450{
2451 int ret;
2452 int i, n;
8019ff6c 2453 struct reg_sequence *base;
b48d1398 2454 unsigned int this_page = 0;
2de9d600 2455 unsigned int page_change = 0;
e894c3f4
OAO		 2456 /*
2457 * the set of registers are not neccessarily in order, but
2458 * since the order of write must be preserved this algorithm
2de9d600
NP		 2459 * chops the set each time the page changes. This also applies
2460 * if there is a delay required at any point in the sequence.
e894c3f4
OAO		 2461 */
2462 base = regs;
2463 for (i = 0, n = 0; i < num_regs; i++, n++) {
2464 unsigned int reg = regs[i].reg;
2465 struct regmap_range_node *range;
2466
2467 range = _regmap_range_lookup(map, reg);
2468 if (range) {
2469 unsigned int win_page = _regmap_register_page(map, reg,
2470 range);
2471
2472 if (i == 0)
2473 this_page = win_page;
2474 if (win_page != this_page) {
2475 this_page = win_page;
2de9d600
NP		 2476 page_change = 1;
2477 }
2478 }
2479
2480 /* If we have both a page change and a delay make sure to
2481 * write the regs and apply the delay before we change the
2482 * page.
2483 */
2484
2485 if (page_change || regs[i].delay_us) {
2486
2487 /* For situations where the first write requires
2488 * a delay we need to make sure we don't call
2489 * raw_multi_reg_write with n=0
2490 * This can't occur with page breaks as we
2491 * never write on the first iteration
2492 */
2493 if (regs[i].delay_us && i == 0)
2494 n = 1;
2495
e894c3f4
OAO		 2496 ret = _regmap_raw_multi_reg_write(map, base, n);
2497 if (ret != 0)
2498 return ret;
2de9d600 2499
21f8e482
DO		 2500 if (regs[i].delay_us) {
2501 if (map->can_sleep)
2502 fsleep(regs[i].delay_us);
2503 else
2504 udelay(regs[i].delay_us);
2505 }
2de9d600 2506
e894c3f4
OAO		 2507 base += n;
2508 n = 0;
2de9d600
NP		 2509
2510 if (page_change) {
2511 ret = _regmap_select_page(map,
2512 &base[n].reg,
2513 range, 1);
2514 if (ret != 0)
2515 return ret;
2516
2517 page_change = 0;
2518 }
2519
e894c3f4 2520 }
2de9d600 2521
e894c3f4
OAO		 2522 }
2523 if (n > 0)
2524 return _regmap_raw_multi_reg_write(map, base, n);
2525 return 0;
2526}
2527
1d5b40bc 2528static int _regmap_multi_reg_write(struct regmap *map,
8019ff6c 2529 const struct reg_sequence *regs,
e894c3f4 2530 size_t num_regs)
1d5b40bc 2531{
e894c3f4
OAO		 2532 int i;
2533 int ret;
2534
2535 if (!map->can_multi_write) {
2536 for (i = 0; i < num_regs; i++) {
2537 ret = _regmap_write(map, regs[i].reg, regs[i].def);
2538 if (ret != 0)
2539 return ret;
2de9d600 2540
21f8e482
DO		 2541 if (regs[i].delay_us) {
2542 if (map->can_sleep)
2543 fsleep(regs[i].delay_us);
2544 else
2545 udelay(regs[i].delay_us);
2546 }
e894c3f4
OAO		 2547 }
2548 return 0;
2549 }
2550
2551 if (!map->format.parse_inplace)
2552 return -EINVAL;
2553
2554 if (map->writeable_reg)
2555 for (i = 0; i < num_regs; i++) {
2556 int reg = regs[i].reg;
2557 if (!map->writeable_reg(map->dev, reg))
2558 return -EINVAL;
fcac0233 2559 if (!IS_ALIGNED(reg, map->reg_stride))
e894c3f4
OAO		 2560 return -EINVAL;
2561 }
2562
2563 if (!map->cache_bypass) {
2564 for (i = 0; i < num_regs; i++) {
2565 unsigned int val = regs[i].def;
2566 unsigned int reg = regs[i].reg;
2567 ret = regcache_write(map, reg, val);
2568 if (ret) {
2569 dev_err(map->dev,
2570 "Error in caching of register: %x ret: %d\n",
2571 reg, ret);
2572 return ret;
2573 }
2574 }
2575 if (map->cache_only) {
2576 map->cache_dirty = true;
2577 return 0;
2578 }
2579 }
2580
2581 WARN_ON(!map->bus);
1d5b40bc
CK		 2582
2583 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO		 2584 unsigned int reg = regs[i].reg;
2585 struct regmap_range_node *range;
2de9d600
NP		 2586
2587 /* Coalesce all the writes between a page break or a delay
2588 * in a sequence
2589 */
e894c3f4 2590 range = _regmap_range_lookup(map, reg);
2de9d600 2591 if (range || regs[i].delay_us) {
8019ff6c
NP		 2592 size_t len = sizeof(struct reg_sequence)*num_regs;
2593 struct reg_sequence *base = kmemdup(regs, len,
e894c3f4
OAO		 2594 GFP_KERNEL);
2595 if (!base)
2596 return -ENOMEM;
2597 ret = _regmap_range_multi_paged_reg_write(map, base,
2598 num_regs);
2599 kfree(base);
2600
1d5b40bc
CK		 2601 return ret;
2602 }
2603 }
e894c3f4 2604 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK		 2605}
2606
2cf8e2df
CK		 2607/**
2608 * regmap_multi_reg_write() - Write multiple registers to the device
e33fabd3
AO		 2609 *
2610 * @map: Register map to write to
2611 * @regs: Array of structures containing register,value to be written
2612 * @num_regs: Number of registers to write
2613 *
2cf8e2df
CK		 2614 * Write multiple registers to the device where the set of register, value
2615 * pairs are supplied in any order, possibly not all in a single range.
2616 *
e894c3f4 2617 * The 'normal' block write mode will send ultimately send data on the
2cf8e2df 2618 * target bus as R,V1,V2,V3,..,Vn where successively higher registers are
e894c3f4
OAO		 2619 * addressed. However, this alternative block multi write mode will send
2620 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2621 * must of course support the mode.
e33fabd3 2622 *
e894c3f4
OAO		 2623 * A value of zero will be returned on success, a negative errno will be
2624 * returned in error cases.
e33fabd3 2625 */
8019ff6c 2626int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
f7e2cec0 2627 int num_regs)
e33fabd3 2628{
1d5b40bc 2629 int ret;
e33fabd3
AO		 2630
2631 map->lock(map->lock_arg);
2632
1d5b40bc
CK		 2633 ret = _regmap_multi_reg_write(map, regs, num_regs);
2634
e33fabd3
AO		 2635 map->unlock(map->lock_arg);
2636
2637 return ret;
2638}
2639EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2640
2cf8e2df
CK		 2641/**
2642 * regmap_multi_reg_write_bypassed() - Write multiple registers to the
2643 * device but not the cache
e33fabd3
AO		 2644 *
2645 * @map: Register map to write to
2646 * @regs: Array of structures containing register,value to be written
2647 * @num_regs: Number of registers to write
2648 *
2cf8e2df
CK		 2649 * Write multiple registers to the device but not the cache where the set
2650 * of register are supplied in any order.
2651 *
e33fabd3
AO		 2652 * This function is intended to be used for writing a large block of data
2653 * atomically to the device in single transfer for those I2C client devices
2654 * that implement this alternative block write mode.
2655 *
2656 * A value of zero will be returned on success, a negative errno will
2657 * be returned in error cases.
2658 */
1d5b40bc 2659int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 2660 const struct reg_sequence *regs,
1d5b40bc 2661 int num_regs)
e33fabd3 2662{
1d5b40bc
CK		 2663 int ret;
2664 bool bypass;
e33fabd3
AO		 2665
2666 map->lock(map->lock_arg);
2667
1d5b40bc
CK		 2668 bypass = map->cache_bypass;
2669 map->cache_bypass = true;
2670
2671 ret = _regmap_multi_reg_write(map, regs, num_regs);
2672
2673 map->cache_bypass = bypass;
2674
e33fabd3
AO		 2675 map->unlock(map->lock_arg);
2676
2677 return ret;
2678}
1d5b40bc 2679EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 2680
0d509f2b 2681/**
2cf8e2df
CK		 2682 * regmap_raw_write_async() - Write raw values to one or more registers
2683 * asynchronously
0d509f2b
MB		 2684 *
2685 * @map: Register map to write to
2686 * @reg: Initial register to write to
2687 * @val: Block of data to be written, laid out for direct transmission to the
2688 * device. Must be valid until regmap_async_complete() is called.
2689 * @val_len: Length of data pointed to by val.
2690 *
2691 * This function is intended to be used for things like firmware
2692 * download where a large block of data needs to be transferred to the
2693 * device. No formatting will be done on the data provided.
2694 *
2695 * If supported by the underlying bus the write will be scheduled
2696 * asynchronously, helping maximise I/O speed on higher speed buses
2697 * like SPI. regmap_async_complete() can be called to ensure that all
2698 * asynchrnous writes have been completed.
2699 *
2700 * A value of zero will be returned on success, a negative errno will
2701 * be returned in error cases.
2702 */
2703int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2704 const void *val, size_t val_len)
2705{
2706 int ret;
2707
2708 if (val_len % map->format.val_bytes)
2709 return -EINVAL;
fcac0233 2710 if (!IS_ALIGNED(reg, map->reg_stride))
0d509f2b
MB		 2711 return -EINVAL;
2712
2713 map->lock(map->lock_arg);
2714
0a819809
MB		 2715 map->async = true;
2716
05669b63 2717 ret = _regmap_raw_write(map, reg, val, val_len, false);
0a819809
MB		 2718
2719 map->async = false;
0d509f2b
MB		 2720
2721 map->unlock(map->lock_arg);
2722
2723 return ret;
2724}
2725EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2726
b83a313b 2727static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
40033248 2728 unsigned int val_len, bool noinc)
b83a313b 2729{
98bc7dfd 2730 struct regmap_range_node *range;
b83a313b
MB		 2731 int ret;
2732
d77e7456 2733 if (!map->read)
bb2bb45d
MB		 2734 return -EINVAL;
2735
98bc7dfd
MB		 2736 range = _regmap_range_lookup(map, reg);
2737 if (range) {
2738 ret = _regmap_select_page(map, &reg, range,
40033248 2739 noinc ? 1 : val_len / map->format.val_bytes);
0ff3e62f 2740 if (ret != 0)
98bc7dfd
MB		 2741 return ret;
2742 }
6863ca62 2743
3f58f6dc 2744 reg = regmap_reg_addr(map, reg);
d939fb9a 2745 map->format.format_reg(map->work_buf, reg, map->reg_shift);
f50e38c9
TL		 2746 regmap_set_work_buf_flag_mask(map, map->format.reg_bytes,
2747 map->read_flag_mask);
c6b570d9 2748 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 2749
d77e7456
MV		 2750 ret = map->read(map->bus_context, map->work_buf,
2751 map->format.reg_bytes + map->format.pad_bytes,
2752 val, val_len);
b83a313b 2753
c6b570d9 2754 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
fb2736bb
MB		 2755
2756 return ret;
b83a313b
MB		 2757}
2758
3ac17037
BB		 2759static int _regmap_bus_reg_read(void *context, unsigned int reg,
2760 unsigned int *val)
2761{
2762 struct regmap *map = context;
f18ee501
MB		 2763 struct regmap_range_node *range;
2764 int ret;
2765
2766 range = _regmap_range_lookup(map, reg);
2767 if (range) {
2768 ret = _regmap_select_page(map, &reg, range, 1);
2769 if (ret != 0)
2770 return ret;
2771 }
3ac17037 2772
3f58f6dc 2773 reg = regmap_reg_addr(map, reg);
3ac17037
BB		 2774 return map->bus->reg_read(map->bus_context, reg, val);
2775}
2776
ad278406
AS		 2777static int _regmap_bus_read(void *context, unsigned int reg,
2778 unsigned int *val)
2779{
2780 int ret;
2781 struct regmap *map = context;
4c90f297
KA		 2782 void *work_val = map->work_buf + map->format.reg_bytes +
2783 map->format.pad_bytes;
ad278406
AS		 2784
2785 if (!map->format.parse_val)
2786 return -EINVAL;
2787
40033248 2788 ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes, false);
ad278406 2789 if (ret == 0)
4c90f297 2790 *val = map->format.parse_val(work_val);
ad278406
AS		 2791
2792 return ret;
2793}
2794
b83a313b
MB		 2795static int _regmap_read(struct regmap *map, unsigned int reg,
2796 unsigned int *val)
2797{
2798 int ret;
d2a5884a
AS		 2799 void *context = _regmap_map_get_context(map);
2800
5d1729e7
DP		 2801 if (!map->cache_bypass) {
2802 ret = regcache_read(map, reg, val);
2803 if (ret == 0)
2804 return 0;
2805 }
2806
2807 if (map->cache_only)
2808 return -EBUSY;
2809
3e47b887
MB		 2810 if (!regmap_readable(map, reg))
2811 return -EIO;
2812
d2a5884a 2813 ret = map->reg_read(context, reg, val);
fb2736bb 2814 if (ret == 0) {
95093762 2815 if (regmap_should_log(map))
1044c180 2816 dev_info(map->dev, "%x => %x\n", reg, *val);
1044c180 2817
c6b570d9 2818 trace_regmap_reg_read(map, reg, *val);
b83a313b 2819
ad278406
AS		 2820 if (!map->cache_bypass)
2821 regcache_write(map, reg, *val);
2822 }
f2985367 2823
b83a313b
MB		 2824 return ret;
2825}
2826
2827/**
2cf8e2df 2828 * regmap_read() - Read a value from a single register
b83a313b 2829 *
0093380c 2830 * @map: Register map to read from
b83a313b
MB		 2831 * @reg: Register to be read from
2832 * @val: Pointer to store read value
2833 *
2834 * A value of zero will be returned on success, a negative errno will
2835 * be returned in error cases.
2836 */
2837int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2838{
2839 int ret;
2840
fcac0233 2841 if (!IS_ALIGNED(reg, map->reg_stride))
f01ee60f
SW		 2842 return -EINVAL;
2843
0d4529c5 2844 map->lock(map->lock_arg);
b83a313b
MB		 2845
2846 ret = _regmap_read(map, reg, val);
2847
0d4529c5 2848 map->unlock(map->lock_arg);
b83a313b
MB		 2849
2850 return ret;
2851}
2852EXPORT_SYMBOL_GPL(regmap_read);
2853
70ee853e
RF		 2854/**
2855 * regmap_read_bypassed() - Read a value from a single register direct
2856 * from the device, bypassing the cache
2857 *
2858 * @map: Register map to read from
2859 * @reg: Register to be read from
2860 * @val: Pointer to store read value
2861 *
2862 * A value of zero will be returned on success, a negative errno will
2863 * be returned in error cases.
2864 */
2865int regmap_read_bypassed(struct regmap *map, unsigned int reg, unsigned int *val)
2866{
2867 int ret;
2868 bool bypass, cache_only;
2869
2870 if (!IS_ALIGNED(reg, map->reg_stride))
2871 return -EINVAL;
2872
2873 map->lock(map->lock_arg);
2874
2875 bypass = map->cache_bypass;
2876 cache_only = map->cache_only;
2877 map->cache_bypass = true;
2878 map->cache_only = false;
2879
2880 ret = _regmap_read(map, reg, val);
2881
2882 map->cache_bypass = bypass;
2883 map->cache_only = cache_only;
2884
2885 map->unlock(map->lock_arg);
2886
2887 return ret;
2888}
2889EXPORT_SYMBOL_GPL(regmap_read_bypassed);
2890
b83a313b 2891/**
2cf8e2df 2892 * regmap_raw_read() - Read raw data from the device
b83a313b 2893 *
0093380c 2894 * @map: Register map to read from
b83a313b
MB		 2895 * @reg: First register to be read from
2896 * @val: Pointer to store read value
2897 * @val_len: Size of data to read
2898 *
2899 * A value of zero will be returned on success, a negative errno will
2900 * be returned in error cases.
2901 */
2902int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2903 size_t val_len)
2904{
b8fb5ab1
MB		 2905 size_t val_bytes = map->format.val_bytes;
2906 size_t val_count = val_len / val_bytes;
2907 unsigned int v;
2908 int ret, i;
04e016ad 2909
851960ba
SW		 2910 if (val_len % map->format.val_bytes)
2911 return -EINVAL;
fcac0233 2912 if (!IS_ALIGNED(reg, map->reg_stride))
f01ee60f 2913 return -EINVAL;
fa3eec77
MB		 2914 if (val_count == 0)
2915 return -EINVAL;
851960ba 2916
0d4529c5 2917 map->lock(map->lock_arg);
b83a313b 2918
b8fb5ab1
MB		 2919 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2920 map->cache_type == REGCACHE_NONE) {
1b079ca2
CK		 2921 size_t chunk_count, chunk_bytes;
2922 size_t chunk_regs = val_count;
0645ba43 2923
99e8dd39
CK		 2924 if (!map->cache_bypass && map->cache_only) {
2925 ret = -EBUSY;
2926 goto out;
2927 }
2928
d77e7456 2929 if (!map->read) {
9a16ea90
MP		 2930 ret = -ENOTSUPP;
2931 goto out;
2932 }
2933
1b079ca2
CK		 2934 if (map->use_single_read)
2935 chunk_regs = 1;
2936 else if (map->max_raw_read && val_len > map->max_raw_read)
2937 chunk_regs = map->max_raw_read / val_bytes;
9a16ea90 2938
1b079ca2
CK		 2939 chunk_count = val_count / chunk_regs;
2940 chunk_bytes = chunk_regs * val_bytes;
2941
2942 /* Read bytes that fit into whole chunks */
0645ba43 2943 for (i = 0; i < chunk_count; i++) {
40033248 2944 ret = _regmap_raw_read(map, reg, val, chunk_bytes, false);
0645ba43 2945 if (ret != 0)
1b079ca2
CK		 2946 goto out;
2947
2948 reg += regmap_get_offset(map, chunk_regs);
2949 val += chunk_bytes;
2950 val_len -= chunk_bytes;
0645ba43 2951 }
b8fb5ab1 2952
0645ba43 2953 /* Read remaining bytes */
1b079ca2 2954 if (val_len) {
40033248 2955 ret = _regmap_raw_read(map, reg, val, val_len, false);
0645ba43 2956 if (ret != 0)
1b079ca2 2957 goto out;
0645ba43 2958 }
b8fb5ab1
MB		 2959 } else {
2960 /* Otherwise go word by word for the cache; should be low
2961 * cost as we expect to hit the cache.
2962 */
2963 for (i = 0; i < val_count; i++) {
ca747be2 2964 ret = _regmap_read(map, reg + regmap_get_offset(map, i),
f01ee60f 2965 &v);
b8fb5ab1
MB		 2966 if (ret != 0)
2967 goto out;
2968
d939fb9a 2969 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB		 2970 }
2971 }
b83a313b 2972
b8fb5ab1 2973 out:
0d4529c5 2974 map->unlock(map->lock_arg);
b83a313b
MB		 2975
2976 return ret;
2977}
2978EXPORT_SYMBOL_GPL(regmap_raw_read);
2979
67252287 2980/**
74fe7b55
CDL		 2981 * regmap_noinc_read(): Read data from a register without incrementing the
2982 * register number
2983 *
2984 * @map: Register map to read from
2985 * @reg: Register to read from
2986 * @val: Pointer to data buffer
2987 * @val_len: Length of output buffer in bytes.
2988 *
d77e7456 2989 * The regmap API usually assumes that bulk read operations will read a
74fe7b55
CDL		 2990 * range of registers. Some devices have certain registers for which a read
2991 * operation read will read from an internal FIFO.
2992 *
2993 * The target register must be volatile but registers after it can be
2994 * completely unrelated cacheable registers.
2995 *
2996 * This will attempt multiple reads as required to read val_len bytes.
2997 *
2998 * A value of zero will be returned on success, a negative errno will be
2999 * returned in error cases.
3000 */
3001int regmap_noinc_read(struct regmap *map, unsigned int reg,
3002 void *val, size_t val_len)
3003{
3004 size_t read_len;
3005 int ret;
3006
c42e99a3
JMC		 3007 if (!map->read)
3008 return -ENOTSUPP;
3009
74fe7b55
CDL		 3010 if (val_len % map->format.val_bytes)
3011 return -EINVAL;
3012 if (!IS_ALIGNED(reg, map->reg_stride))
3013 return -EINVAL;
3014 if (val_len == 0)
3015 return -EINVAL;
3016
3017 map->lock(map->lock_arg);
3018
3019 if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) {
3020 ret = -EINVAL;
3021 goto out_unlock;
3022 }
3023
99e8dd39
CK		 3024 /*
3025 * We have not defined the FIFO semantics for cache, as the
3026 * cache is just one value deep. Should we return the last
3027 * written value? Just avoid this by always reading the FIFO
3028 * even when using cache. Cache only will not work.
3029 */
3030 if (!map->cache_bypass && map->cache_only) {
3031 ret = -EBUSY;
3032 goto out_unlock;
3033 }
3034
c20cc099
LW		 3035 /* Use the accelerated operation if we can */
3036 if (map->bus->reg_noinc_read) {
c20cc099
LW		 3037 ret = regmap_noinc_readwrite(map, reg, val, val_len, false);
3038 goto out_unlock;
3039 }
3040
74fe7b55
CDL		 3041 while (val_len) {
3042 if (map->max_raw_read && map->max_raw_read < val_len)
3043 read_len = map->max_raw_read;
3044 else
3045 read_len = val_len;
40033248 3046 ret = _regmap_raw_read(map, reg, val, read_len, true);
74fe7b55
CDL		 3047 if (ret)
3048 goto out_unlock;
3049 val = ((u8 *)val) + read_len;
3050 val_len -= read_len;
3051 }
3052
3053out_unlock:
3054 map->unlock(map->lock_arg);
3055 return ret;
3056}
3057EXPORT_SYMBOL_GPL(regmap_noinc_read);
3058
3059/**
3060 * regmap_field_read(): Read a value to a single register field
67252287
SK		 3061 *
3062 * @field: Register field to read from
3063 * @val: Pointer to store read value
3064 *
3065 * A value of zero will be returned on success, a negative errno will
3066 * be returned in error cases.
3067 */
3068int regmap_field_read(struct regmap_field *field, unsigned int *val)
3069{
3070 int ret;
3071 unsigned int reg_val;
3072 ret = regmap_read(field->regmap, field->reg, &reg_val);
3073 if (ret != 0)
3074 return ret;
3075
3076 reg_val &= field->mask;
3077 reg_val >>= field->shift;
3078 *val = reg_val;
3079
3080 return ret;
3081}
3082EXPORT_SYMBOL_GPL(regmap_field_read);
3083
a0102375 3084/**
2cf8e2df 3085 * regmap_fields_read() - Read a value to a single register field with port ID
a0102375
KM		 3086 *
3087 * @field: Register field to read from
3088 * @id: port ID
3089 * @val: Pointer to store read value
3090 *
3091 * A value of zero will be returned on success, a negative errno will
3092 * be returned in error cases.
3093 */
3094int regmap_fields_read(struct regmap_field *field, unsigned int id,
3095 unsigned int *val)
3096{
3097 int ret;
3098 unsigned int reg_val;
3099
3100 if (id >= field->id_size)
3101 return -EINVAL;
3102
3103 ret = regmap_read(field->regmap,
3104 field->reg + (field->id_offset * id),
3105 &reg_val);
3106 if (ret != 0)
3107 return ret;
3108
3109 reg_val &= field->mask;
3110 reg_val >>= field->shift;
3111 *val = reg_val;
3112
3113 return ret;
3114}
3115EXPORT_SYMBOL_GPL(regmap_fields_read);
3116
3c1ff93b 3117static int _regmap_bulk_read(struct regmap *map, unsigned int reg,
eb708cd6 3118 const unsigned int *regs, void *val, size_t val_count)
3c1ff93b
GR		 3119{
3120 u32 *u32 = val;
3121 u16 *u16 = val;
3122 u8 *u8 = val;
3123 int ret, i;
3124
3125 map->lock(map->lock_arg);
3126
3127 for (i = 0; i < val_count; i++) {
3128 unsigned int ival;
3129
3130 if (regs) {
3131 if (!IS_ALIGNED(regs[i], map->reg_stride)) {
3132 ret = -EINVAL;
3133 goto out;
3134 }
3135 ret = _regmap_read(map, regs[i], &ival);
3136 } else {
3137 ret = _regmap_read(map, reg + regmap_get_offset(map, i), &ival);
3138 }
3139 if (ret != 0)
3140 goto out;
3141
3142 switch (map->format.val_bytes) {
3143 case 4:
3144 u32[i] = ival;
3145 break;
3146 case 2:
3147 u16[i] = ival;
3148 break;
3149 case 1:
3150 u8[i] = ival;
3151 break;
3152 default:
3153 ret = -EINVAL;
3154 goto out;
3155 }
3156 }
3157out:
3158 map->unlock(map->lock_arg);
3159 return ret;
3160}
3161
b83a313b 3162/**
3c1ff93b 3163 * regmap_bulk_read() - Read multiple sequential registers from the device
b83a313b 3164 *
0093380c 3165 * @map: Register map to read from
b83a313b
MB		 3166 * @reg: First register to be read from
3167 * @val: Pointer to store read value, in native register size for device
3168 * @val_count: Number of registers to read
3169 *
3170 * A value of zero will be returned on success, a negative errno will
3171 * be returned in error cases.
3172 */
3173int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
3174 size_t val_count)
3175{
3176 int ret, i;
3177 size_t val_bytes = map->format.val_bytes;
82cd9965 3178 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 3179
fcac0233 3180 if (!IS_ALIGNED(reg, map->reg_stride))
f01ee60f 3181 return -EINVAL;
186ba2ee
CK		 3182 if (val_count == 0)
3183 return -EINVAL;
b83a313b 3184
ea50e2a1 3185 if (map->read && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
0645ba43
CK		 3186 ret = regmap_raw_read(map, reg, val, val_bytes * val_count);
3187 if (ret != 0)
3188 return ret;
de2d808f
MB		 3189
3190 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 3191 map->format.parse_inplace(val + i);
de2d808f 3192 } else {
3c1ff93b 3193 ret = _regmap_bulk_read(map, reg, NULL, val, val_count);
de2d808f 3194 }
026c99b5
DR		 3195 if (!ret)
3196 trace_regmap_bulk_read(map, reg, val, val_bytes * val_count);
186ba2ee 3197 return ret;
b83a313b
MB		 3198}
3199EXPORT_SYMBOL_GPL(regmap_bulk_read);
3200
3c1ff93b
GR		 3201/**
3202 * regmap_multi_reg_read() - Read multiple non-sequential registers from the device
3203 *
3204 * @map: Register map to read from
3205 * @regs: Array of registers to read from
3206 * @val: Pointer to store read value, in native register size for device
3207 * @val_count: Number of registers to read
3208 *
3209 * A value of zero will be returned on success, a negative errno will
3210 * be returned in error cases.
3211 */
eb708cd6 3212int regmap_multi_reg_read(struct regmap *map, const unsigned int *regs, void *val,
3c1ff93b
GR		 3213 size_t val_count)
3214{
3215 if (val_count == 0)
3216 return -EINVAL;
3217
3218 return _regmap_bulk_read(map, 0, regs, val, val_count);
3219}
3220EXPORT_SYMBOL_GPL(regmap_multi_reg_read);
3221
018690d3
MB		 3222static int _regmap_update_bits(struct regmap *map, unsigned int reg,
3223 unsigned int mask, unsigned int val,
7ff0589c 3224 bool *change, bool force_write)
b83a313b
MB		 3225{
3226 int ret;
d91e8db2 3227 unsigned int tmp, orig;
b83a313b 3228
77792b11
JR		 3229 if (change)
3230 *change = false;
b83a313b 3231
77792b11 3232 if (regmap_volatile(map, reg) && map->reg_update_bits) {
3f58f6dc 3233 reg = regmap_reg_addr(map, reg);
77792b11
JR		 3234 ret = map->reg_update_bits(map->bus_context, reg, mask, val);
3235 if (ret == 0 && change)
e2f74dc6 3236 *change = true;
018690d3 3237 } else {
77792b11
JR		 3238 ret = _regmap_read(map, reg, &orig);
3239 if (ret != 0)
3240 return ret;
3241
3242 tmp = orig & ~mask;
3243 tmp |= val & mask;
3244
b629c698 3245 if (force_write || (tmp != orig) || map->force_write_field) {
77792b11
JR		 3246 ret = _regmap_write(map, reg, tmp);
3247 if (ret == 0 && change)
3248 *change = true;
3249 }
018690d3 3250 }
b83a313b 3251
b83a313b
MB		 3252 return ret;
3253}
018690d3
MB		 3254
3255/**
2cf8e2df 3256 * regmap_update_bits_base() - Perform a read/modify/write cycle on a register
915f441b
MB		 3257 *
3258 * @map: Register map to update
3259 * @reg: Register to update
3260 * @mask: Bitmask to change
3261 * @val: New value for bitmask
3262 * @change: Boolean indicating if a write was done
91d31b9f
KM		 3263 * @async: Boolean indicating asynchronously
3264 * @force: Boolean indicating use force update
915f441b 3265 *
2cf8e2df
CK		 3266 * Perform a read/modify/write cycle on a register map with change, async, force
3267 * options.
3268 *
3269 * If async is true:
3270 *
3271 * With most buses the read must be done synchronously so this is most useful
3272 * for devices with a cache which do not need to interact with the hardware to
3273 * determine the current register value.
915f441b
MB		 3274 *
3275 * Returns zero for success, a negative number on error.
3276 */
91d31b9f
KM		 3277int regmap_update_bits_base(struct regmap *map, unsigned int reg,
3278 unsigned int mask, unsigned int val,
3279 bool *change, bool async, bool force)
915f441b
MB		 3280{
3281 int ret;
3282
3283 map->lock(map->lock_arg);
3284
91d31b9f 3285 map->async = async;
915f441b 3286
91d31b9f 3287 ret = _regmap_update_bits(map, reg, mask, val, change, force);
915f441b
MB		 3288
3289 map->async = false;
3290
3291 map->unlock(map->lock_arg);
3292
3293 return ret;
3294}
91d31b9f 3295EXPORT_SYMBOL_GPL(regmap_update_bits_base);
915f441b 3296
aa2ff9db
BG		 3297/**
3298 * regmap_test_bits() - Check if all specified bits are set in a register.
3299 *
3300 * @map: Register map to operate on
3301 * @reg: Register to read from
3302 * @bits: Bits to test
3303 *
e680a409
BG		 3304 * Returns 0 if at least one of the tested bits is not set, 1 if all tested
3305 * bits are set and a negative error number if the underlying regmap_read()
3306 * fails.
aa2ff9db
BG		 3307 */
3308int regmap_test_bits(struct regmap *map, unsigned int reg, unsigned int bits)
3309{
3310 unsigned int val, ret;
3311
3312 ret = regmap_read(map, reg, &val);
3313 if (ret)
3314 return ret;
3315
3316 return (val & bits) == bits;
3317}
3318EXPORT_SYMBOL_GPL(regmap_test_bits);
3319
0d509f2b
MB		 3320void regmap_async_complete_cb(struct regmap_async *async, int ret)
3321{
3322 struct regmap *map = async->map;
3323 bool wake;
3324
c6b570d9 3325 trace_regmap_async_io_complete(map);
fe7d4ccd 3326
0d509f2b 3327 spin_lock(&map->async_lock);
7e09a979 3328 list_move(&async->list, &map->async_free);
0d509f2b
MB		 3329 wake = list_empty(&map->async_list);
3330
3331 if (ret != 0)
3332 map->async_ret = ret;
3333
3334 spin_unlock(&map->async_lock);
3335
0d509f2b
MB		 3336 if (wake)
3337 wake_up(&map->async_waitq);
3338}
f804fb56 3339EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB		 3340
3341static int regmap_async_is_done(struct regmap *map)
3342{
3343 unsigned long flags;
3344 int ret;
3345
3346 spin_lock_irqsave(&map->async_lock, flags);
3347 ret = list_empty(&map->async_list);
3348 spin_unlock_irqrestore(&map->async_lock, flags);
3349
3350 return ret;
3351}
3352
3353/**
2cf8e2df 3354 * regmap_async_complete - Ensure all asynchronous I/O has completed.
0d509f2b
MB		 3355 *
3356 * @map: Map to operate on.
3357 *
3358 * Blocks until any pending asynchronous I/O has completed. Returns
3359 * an error code for any failed I/O operations.
3360 */
3361int regmap_async_complete(struct regmap *map)
3362{
3363 unsigned long flags;
3364 int ret;
3365
3366 /* Nothing to do with no async support */
f2e055e7 3367 if (!map->bus || !map->bus->async_write)
0d509f2b
MB		 3368 return 0;
3369
c6b570d9 3370 trace_regmap_async_complete_start(map);
fe7d4ccd 3371
0d509f2b
MB		 3372 wait_event(map->async_waitq, regmap_async_is_done(map));
3373
3374 spin_lock_irqsave(&map->async_lock, flags);
3375 ret = map->async_ret;
3376 map->async_ret = 0;
3377 spin_unlock_irqrestore(&map->async_lock, flags);
3378
c6b570d9 3379 trace_regmap_async_complete_done(map);
fe7d4ccd 3380
0d509f2b
MB		 3381 return ret;
3382}
f88948ef 3383EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 3384
22f0d90a 3385/**
2cf8e2df
CK		 3386 * regmap_register_patch - Register and apply register updates to be applied
3387 * on device initialistion
22f0d90a
MB		 3388 *
3389 * @map: Register map to apply updates to.
3390 * @regs: Values to update.
3391 * @num_regs: Number of entries in regs.
3392 *
3393 * Register a set of register updates to be applied to the device
3394 * whenever the device registers are synchronised with the cache and
3395 * apply them immediately. Typically this is used to apply
3396 * corrections to be applied to the device defaults on startup, such
3397 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB		 3398 *
3399 * The caller must ensure that this function cannot be called
3400 * concurrently with either itself or regcache_sync().
22f0d90a 3401 */
8019ff6c 3402int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a
MB		 3403 int num_regs)
3404{
8019ff6c 3405 struct reg_sequence *p;
6bf13103 3406 int ret;
22f0d90a
MB		 3407 bool bypass;
3408
bd60e381
CZ		 3409 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
3410 num_regs))
3411 return 0;
3412
aab13ebc 3413 p = krealloc(map->patch,
8019ff6c 3414 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
aab13ebc
MB		 3415 GFP_KERNEL);
3416 if (p) {
3417 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
3418 map->patch = p;
3419 map->patch_regs += num_regs;
22f0d90a 3420 } else {
56fb1c74 3421 return -ENOMEM;
22f0d90a
MB		 3422 }
3423
0d4529c5 3424 map->lock(map->lock_arg);
22f0d90a
MB		 3425
3426 bypass = map->cache_bypass;
3427
3428 map->cache_bypass = true;
1a25f261 3429 map->async = true;
22f0d90a 3430
6bf13103 3431 ret = _regmap_multi_reg_write(map, regs, num_regs);
22f0d90a 3432
1a25f261 3433 map->async = false;
22f0d90a
MB		 3434 map->cache_bypass = bypass;
3435
0d4529c5 3436 map->unlock(map->lock_arg);
22f0d90a 3437
1a25f261
MB		 3438 regmap_async_complete(map);
3439
22f0d90a
MB		 3440 return ret;
3441}
3442EXPORT_SYMBOL_GPL(regmap_register_patch);
3443
2cf8e2df
CK		 3444/**
3445 * regmap_get_val_bytes() - Report the size of a register value
3446 *
3447 * @map: Register map to operate on.
a6539c32
MB		 3448 *
3449 * Report the size of a register value, mainly intended to for use by
3450 * generic infrastructure built on top of regmap.
3451 */
3452int regmap_get_val_bytes(struct regmap *map)
3453{
3454 if (map->format.format_write)
3455 return -EINVAL;
3456
3457 return map->format.val_bytes;
3458}
3459EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
3460
668abc72 3461/**
2cf8e2df
CK		 3462 * regmap_get_max_register() - Report the max register value
3463 *
3464 * @map: Register map to operate on.
668abc72
SK		 3465 *
3466 * Report the max register value, mainly intended to for use by
3467 * generic infrastructure built on top of regmap.
3468 */
3469int regmap_get_max_register(struct regmap *map)
3470{
0ec74ad3 3471 return map->max_register_is_set ? map->max_register : -EINVAL;
668abc72
SK		 3472}
3473EXPORT_SYMBOL_GPL(regmap_get_max_register);
3474
a2f776cb 3475/**
2cf8e2df
CK		 3476 * regmap_get_reg_stride() - Report the register address stride
3477 *
3478 * @map: Register map to operate on.
a2f776cb
SK		 3479 *
3480 * Report the register address stride, mainly intended to for use by
3481 * generic infrastructure built on top of regmap.
3482 */
3483int regmap_get_reg_stride(struct regmap *map)
3484{
3485 return map->reg_stride;
3486}
3487EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
3488
a6d99022
MW		 3489/**
3490 * regmap_might_sleep() - Returns whether a regmap access might sleep.
3491 *
3492 * @map: Register map to operate on.
3493 *
3494 * Returns true if an access to the register might sleep, else false.
3495 */
3496bool regmap_might_sleep(struct regmap *map)
3497{
3498 return map->can_sleep;
3499}
3500EXPORT_SYMBOL_GPL(regmap_might_sleep);
3501
13ff50c8
NC		 3502int regmap_parse_val(struct regmap *map, const void *buf,
3503 unsigned int *val)
3504{
3505 if (!map->format.parse_val)
3506 return -EINVAL;
3507
3508 *val = map->format.parse_val(buf);
3509
3510 return 0;
3511}
3512EXPORT_SYMBOL_GPL(regmap_parse_val);
3513
31244e39
MB		 3514static int __init regmap_initcall(void)
3515{
3516 regmap_debugfs_initcall();
3517
3518 return 0;
3519}
3520postcore_initcall(regmap_initcall);
Linux 6.x block layer and io_uring tree(s)