Commit | Line | Data |
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b83a313b MB |
1 | /* |
2 | * Register map access API | |
3 | * | |
4 | * Copyright 2011 Wolfson Microelectronics plc | |
5 | * | |
6 | * Author: Mark Brown <broonie@opensource.wolfsonmicro.com> | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
f5d6eba7 | 13 | #include <linux/device.h> |
b83a313b | 14 | #include <linux/slab.h> |
19694b5e | 15 | #include <linux/export.h> |
b83a313b MB |
16 | #include <linux/mutex.h> |
17 | #include <linux/err.h> | |
d647c199 | 18 | #include <linux/of.h> |
6863ca62 | 19 | #include <linux/rbtree.h> |
30b2a553 | 20 | #include <linux/sched.h> |
2de9d600 | 21 | #include <linux/delay.h> |
ca747be2 | 22 | #include <linux/log2.h> |
8698b936 | 23 | #include <linux/hwspinlock.h> |
b83a313b | 24 | |
fb2736bb | 25 | #define CREATE_TRACE_POINTS |
f58078da | 26 | #include "trace.h" |
fb2736bb | 27 | |
93de9124 | 28 | #include "internal.h" |
b83a313b | 29 | |
1044c180 MB |
30 | /* |
31 | * Sometimes for failures during very early init the trace | |
32 | * infrastructure isn't available early enough to be used. For this | |
33 | * sort of problem defining LOG_DEVICE will add printks for basic | |
34 | * register I/O on a specific device. | |
35 | */ | |
36 | #undef LOG_DEVICE | |
37 | ||
38 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, | |
39 | unsigned int mask, unsigned int val, | |
7ff0589c | 40 | bool *change, bool force_write); |
1044c180 | 41 | |
3ac17037 BB |
42 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
43 | unsigned int *val); | |
ad278406 AS |
44 | static int _regmap_bus_read(void *context, unsigned int reg, |
45 | unsigned int *val); | |
07c320dc AS |
46 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
47 | unsigned int val); | |
3ac17037 BB |
48 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
49 | unsigned int val); | |
07c320dc AS |
50 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
51 | unsigned int val); | |
ad278406 | 52 | |
76aad392 DC |
53 | bool regmap_reg_in_ranges(unsigned int reg, |
54 | const struct regmap_range *ranges, | |
55 | unsigned int nranges) | |
56 | { | |
57 | const struct regmap_range *r; | |
58 | int i; | |
59 | ||
60 | for (i = 0, r = ranges; i < nranges; i++, r++) | |
61 | if (regmap_reg_in_range(reg, r)) | |
62 | return true; | |
63 | return false; | |
64 | } | |
65 | EXPORT_SYMBOL_GPL(regmap_reg_in_ranges); | |
66 | ||
154881e5 MB |
67 | bool regmap_check_range_table(struct regmap *map, unsigned int reg, |
68 | const struct regmap_access_table *table) | |
76aad392 DC |
69 | { |
70 | /* Check "no ranges" first */ | |
71 | if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges)) | |
72 | return false; | |
73 | ||
74 | /* In case zero "yes ranges" are supplied, any reg is OK */ | |
75 | if (!table->n_yes_ranges) | |
76 | return true; | |
77 | ||
78 | return regmap_reg_in_ranges(reg, table->yes_ranges, | |
79 | table->n_yes_ranges); | |
80 | } | |
154881e5 | 81 | EXPORT_SYMBOL_GPL(regmap_check_range_table); |
76aad392 | 82 | |
8de2f081 MB |
83 | bool regmap_writeable(struct regmap *map, unsigned int reg) |
84 | { | |
85 | if (map->max_register && reg > map->max_register) | |
86 | return false; | |
87 | ||
88 | if (map->writeable_reg) | |
89 | return map->writeable_reg(map->dev, reg); | |
90 | ||
76aad392 | 91 | if (map->wr_table) |
154881e5 | 92 | return regmap_check_range_table(map, reg, map->wr_table); |
76aad392 | 93 | |
8de2f081 MB |
94 | return true; |
95 | } | |
96 | ||
1ea975cf CB |
97 | bool regmap_cached(struct regmap *map, unsigned int reg) |
98 | { | |
99 | int ret; | |
100 | unsigned int val; | |
101 | ||
71df1793 | 102 | if (map->cache_type == REGCACHE_NONE) |
1ea975cf CB |
103 | return false; |
104 | ||
105 | if (!map->cache_ops) | |
106 | return false; | |
107 | ||
108 | if (map->max_register && reg > map->max_register) | |
109 | return false; | |
110 | ||
111 | map->lock(map->lock_arg); | |
112 | ret = regcache_read(map, reg, &val); | |
113 | map->unlock(map->lock_arg); | |
114 | if (ret) | |
115 | return false; | |
116 | ||
117 | return true; | |
118 | } | |
119 | ||
8de2f081 MB |
120 | bool regmap_readable(struct regmap *map, unsigned int reg) |
121 | { | |
04dc91ce LPC |
122 | if (!map->reg_read) |
123 | return false; | |
124 | ||
8de2f081 MB |
125 | if (map->max_register && reg > map->max_register) |
126 | return false; | |
127 | ||
4191f197 WS |
128 | if (map->format.format_write) |
129 | return false; | |
130 | ||
8de2f081 MB |
131 | if (map->readable_reg) |
132 | return map->readable_reg(map->dev, reg); | |
133 | ||
76aad392 | 134 | if (map->rd_table) |
154881e5 | 135 | return regmap_check_range_table(map, reg, map->rd_table); |
76aad392 | 136 | |
8de2f081 MB |
137 | return true; |
138 | } | |
139 | ||
140 | bool regmap_volatile(struct regmap *map, unsigned int reg) | |
141 | { | |
5844a8b9 | 142 | if (!map->format.format_write && !regmap_readable(map, reg)) |
8de2f081 MB |
143 | return false; |
144 | ||
145 | if (map->volatile_reg) | |
146 | return map->volatile_reg(map->dev, reg); | |
147 | ||
76aad392 | 148 | if (map->volatile_table) |
154881e5 | 149 | return regmap_check_range_table(map, reg, map->volatile_table); |
76aad392 | 150 | |
b92be6fe MB |
151 | if (map->cache_ops) |
152 | return false; | |
153 | else | |
154 | return true; | |
8de2f081 MB |
155 | } |
156 | ||
157 | bool regmap_precious(struct regmap *map, unsigned int reg) | |
158 | { | |
4191f197 | 159 | if (!regmap_readable(map, reg)) |
8de2f081 MB |
160 | return false; |
161 | ||
162 | if (map->precious_reg) | |
163 | return map->precious_reg(map->dev, reg); | |
164 | ||
76aad392 | 165 | if (map->precious_table) |
154881e5 | 166 | return regmap_check_range_table(map, reg, map->precious_table); |
76aad392 | 167 | |
8de2f081 MB |
168 | return false; |
169 | } | |
170 | ||
cdf6b11d BW |
171 | bool regmap_writeable_noinc(struct regmap *map, unsigned int reg) |
172 | { | |
173 | if (map->writeable_noinc_reg) | |
174 | return map->writeable_noinc_reg(map->dev, reg); | |
175 | ||
176 | if (map->wr_noinc_table) | |
177 | return regmap_check_range_table(map, reg, map->wr_noinc_table); | |
178 | ||
179 | return true; | |
180 | } | |
181 | ||
74fe7b55 CDL |
182 | bool regmap_readable_noinc(struct regmap *map, unsigned int reg) |
183 | { | |
184 | if (map->readable_noinc_reg) | |
185 | return map->readable_noinc_reg(map->dev, reg); | |
186 | ||
187 | if (map->rd_noinc_table) | |
188 | return regmap_check_range_table(map, reg, map->rd_noinc_table); | |
189 | ||
190 | return true; | |
191 | } | |
192 | ||
82cd9965 | 193 | static bool regmap_volatile_range(struct regmap *map, unsigned int reg, |
a8f28cfa | 194 | size_t num) |
82cd9965 LPC |
195 | { |
196 | unsigned int i; | |
197 | ||
198 | for (i = 0; i < num; i++) | |
b8f9a03b | 199 | if (!regmap_volatile(map, reg + regmap_get_offset(map, i))) |
82cd9965 LPC |
200 | return false; |
201 | ||
202 | return true; | |
203 | } | |
204 | ||
9aa50750 WS |
205 | static void regmap_format_2_6_write(struct regmap *map, |
206 | unsigned int reg, unsigned int val) | |
207 | { | |
208 | u8 *out = map->work_buf; | |
209 | ||
210 | *out = (reg << 6) | val; | |
211 | } | |
212 | ||
b83a313b MB |
213 | static void regmap_format_4_12_write(struct regmap *map, |
214 | unsigned int reg, unsigned int val) | |
215 | { | |
216 | __be16 *out = map->work_buf; | |
217 | *out = cpu_to_be16((reg << 12) | val); | |
218 | } | |
219 | ||
220 | static void regmap_format_7_9_write(struct regmap *map, | |
221 | unsigned int reg, unsigned int val) | |
222 | { | |
223 | __be16 *out = map->work_buf; | |
224 | *out = cpu_to_be16((reg << 9) | val); | |
225 | } | |
226 | ||
7e5ec63e LPC |
227 | static void regmap_format_10_14_write(struct regmap *map, |
228 | unsigned int reg, unsigned int val) | |
229 | { | |
230 | u8 *out = map->work_buf; | |
231 | ||
232 | out[2] = val; | |
233 | out[1] = (val >> 8) | (reg << 6); | |
234 | out[0] = reg >> 2; | |
235 | } | |
236 | ||
d939fb9a | 237 | static void regmap_format_8(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
238 | { |
239 | u8 *b = buf; | |
240 | ||
d939fb9a | 241 | b[0] = val << shift; |
b83a313b MB |
242 | } |
243 | ||
141eba2e | 244 | static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift) |
b83a313b MB |
245 | { |
246 | __be16 *b = buf; | |
247 | ||
d939fb9a | 248 | b[0] = cpu_to_be16(val << shift); |
b83a313b MB |
249 | } |
250 | ||
4aa8c069 XL |
251 | static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift) |
252 | { | |
253 | __le16 *b = buf; | |
254 | ||
255 | b[0] = cpu_to_le16(val << shift); | |
256 | } | |
257 | ||
141eba2e SW |
258 | static void regmap_format_16_native(void *buf, unsigned int val, |
259 | unsigned int shift) | |
260 | { | |
261 | *(u16 *)buf = val << shift; | |
262 | } | |
263 | ||
d939fb9a | 264 | static void regmap_format_24(void *buf, unsigned int val, unsigned int shift) |
ea279fc5 MR |
265 | { |
266 | u8 *b = buf; | |
267 | ||
d939fb9a MR |
268 | val <<= shift; |
269 | ||
ea279fc5 MR |
270 | b[0] = val >> 16; |
271 | b[1] = val >> 8; | |
272 | b[2] = val; | |
273 | } | |
274 | ||
141eba2e | 275 | static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift) |
7d5e525b MB |
276 | { |
277 | __be32 *b = buf; | |
278 | ||
d939fb9a | 279 | b[0] = cpu_to_be32(val << shift); |
7d5e525b MB |
280 | } |
281 | ||
4aa8c069 XL |
282 | static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift) |
283 | { | |
284 | __le32 *b = buf; | |
285 | ||
286 | b[0] = cpu_to_le32(val << shift); | |
287 | } | |
288 | ||
141eba2e SW |
289 | static void regmap_format_32_native(void *buf, unsigned int val, |
290 | unsigned int shift) | |
291 | { | |
292 | *(u32 *)buf = val << shift; | |
293 | } | |
294 | ||
afcc00b9 XL |
295 | #ifdef CONFIG_64BIT |
296 | static void regmap_format_64_be(void *buf, unsigned int val, unsigned int shift) | |
297 | { | |
298 | __be64 *b = buf; | |
299 | ||
01c377bf | 300 | b[0] = cpu_to_be64((u64)val << shift); |
afcc00b9 XL |
301 | } |
302 | ||
303 | static void regmap_format_64_le(void *buf, unsigned int val, unsigned int shift) | |
304 | { | |
305 | __le64 *b = buf; | |
306 | ||
01c377bf | 307 | b[0] = cpu_to_le64((u64)val << shift); |
afcc00b9 XL |
308 | } |
309 | ||
310 | static void regmap_format_64_native(void *buf, unsigned int val, | |
311 | unsigned int shift) | |
312 | { | |
01c377bf | 313 | *(u64 *)buf = (u64)val << shift; |
afcc00b9 XL |
314 | } |
315 | #endif | |
316 | ||
8a819ff8 | 317 | static void regmap_parse_inplace_noop(void *buf) |
b83a313b | 318 | { |
8a819ff8 MB |
319 | } |
320 | ||
321 | static unsigned int regmap_parse_8(const void *buf) | |
322 | { | |
323 | const u8 *b = buf; | |
b83a313b MB |
324 | |
325 | return b[0]; | |
326 | } | |
327 | ||
8a819ff8 MB |
328 | static unsigned int regmap_parse_16_be(const void *buf) |
329 | { | |
330 | const __be16 *b = buf; | |
331 | ||
332 | return be16_to_cpu(b[0]); | |
333 | } | |
334 | ||
4aa8c069 XL |
335 | static unsigned int regmap_parse_16_le(const void *buf) |
336 | { | |
337 | const __le16 *b = buf; | |
338 | ||
339 | return le16_to_cpu(b[0]); | |
340 | } | |
341 | ||
8a819ff8 | 342 | static void regmap_parse_16_be_inplace(void *buf) |
b83a313b MB |
343 | { |
344 | __be16 *b = buf; | |
345 | ||
346 | b[0] = be16_to_cpu(b[0]); | |
b83a313b MB |
347 | } |
348 | ||
4aa8c069 XL |
349 | static void regmap_parse_16_le_inplace(void *buf) |
350 | { | |
351 | __le16 *b = buf; | |
352 | ||
353 | b[0] = le16_to_cpu(b[0]); | |
354 | } | |
355 | ||
8a819ff8 | 356 | static unsigned int regmap_parse_16_native(const void *buf) |
141eba2e SW |
357 | { |
358 | return *(u16 *)buf; | |
359 | } | |
360 | ||
8a819ff8 | 361 | static unsigned int regmap_parse_24(const void *buf) |
ea279fc5 | 362 | { |
8a819ff8 | 363 | const u8 *b = buf; |
ea279fc5 MR |
364 | unsigned int ret = b[2]; |
365 | ret |= ((unsigned int)b[1]) << 8; | |
366 | ret |= ((unsigned int)b[0]) << 16; | |
367 | ||
368 | return ret; | |
369 | } | |
370 | ||
8a819ff8 MB |
371 | static unsigned int regmap_parse_32_be(const void *buf) |
372 | { | |
373 | const __be32 *b = buf; | |
374 | ||
375 | return be32_to_cpu(b[0]); | |
376 | } | |
377 | ||
4aa8c069 XL |
378 | static unsigned int regmap_parse_32_le(const void *buf) |
379 | { | |
380 | const __le32 *b = buf; | |
381 | ||
382 | return le32_to_cpu(b[0]); | |
383 | } | |
384 | ||
8a819ff8 | 385 | static void regmap_parse_32_be_inplace(void *buf) |
7d5e525b MB |
386 | { |
387 | __be32 *b = buf; | |
388 | ||
389 | b[0] = be32_to_cpu(b[0]); | |
7d5e525b MB |
390 | } |
391 | ||
4aa8c069 XL |
392 | static void regmap_parse_32_le_inplace(void *buf) |
393 | { | |
394 | __le32 *b = buf; | |
395 | ||
396 | b[0] = le32_to_cpu(b[0]); | |
397 | } | |
398 | ||
8a819ff8 | 399 | static unsigned int regmap_parse_32_native(const void *buf) |
141eba2e SW |
400 | { |
401 | return *(u32 *)buf; | |
402 | } | |
403 | ||
afcc00b9 XL |
404 | #ifdef CONFIG_64BIT |
405 | static unsigned int regmap_parse_64_be(const void *buf) | |
406 | { | |
407 | const __be64 *b = buf; | |
408 | ||
409 | return be64_to_cpu(b[0]); | |
410 | } | |
411 | ||
412 | static unsigned int regmap_parse_64_le(const void *buf) | |
413 | { | |
414 | const __le64 *b = buf; | |
415 | ||
416 | return le64_to_cpu(b[0]); | |
417 | } | |
418 | ||
419 | static void regmap_parse_64_be_inplace(void *buf) | |
420 | { | |
421 | __be64 *b = buf; | |
422 | ||
423 | b[0] = be64_to_cpu(b[0]); | |
424 | } | |
425 | ||
426 | static void regmap_parse_64_le_inplace(void *buf) | |
427 | { | |
428 | __le64 *b = buf; | |
429 | ||
430 | b[0] = le64_to_cpu(b[0]); | |
431 | } | |
432 | ||
433 | static unsigned int regmap_parse_64_native(const void *buf) | |
434 | { | |
435 | return *(u64 *)buf; | |
436 | } | |
437 | #endif | |
438 | ||
8698b936 BW |
439 | static void regmap_lock_hwlock(void *__map) |
440 | { | |
441 | struct regmap *map = __map; | |
442 | ||
443 | hwspin_lock_timeout(map->hwlock, UINT_MAX); | |
444 | } | |
445 | ||
446 | static void regmap_lock_hwlock_irq(void *__map) | |
447 | { | |
448 | struct regmap *map = __map; | |
449 | ||
450 | hwspin_lock_timeout_irq(map->hwlock, UINT_MAX); | |
451 | } | |
452 | ||
453 | static void regmap_lock_hwlock_irqsave(void *__map) | |
454 | { | |
455 | struct regmap *map = __map; | |
456 | ||
457 | hwspin_lock_timeout_irqsave(map->hwlock, UINT_MAX, | |
458 | &map->spinlock_flags); | |
459 | } | |
460 | ||
461 | static void regmap_unlock_hwlock(void *__map) | |
462 | { | |
463 | struct regmap *map = __map; | |
464 | ||
465 | hwspin_unlock(map->hwlock); | |
466 | } | |
467 | ||
468 | static void regmap_unlock_hwlock_irq(void *__map) | |
469 | { | |
470 | struct regmap *map = __map; | |
471 | ||
472 | hwspin_unlock_irq(map->hwlock); | |
473 | } | |
474 | ||
475 | static void regmap_unlock_hwlock_irqrestore(void *__map) | |
476 | { | |
477 | struct regmap *map = __map; | |
478 | ||
479 | hwspin_unlock_irqrestore(map->hwlock, &map->spinlock_flags); | |
480 | } | |
481 | ||
81e30b18 | 482 | static void regmap_lock_unlock_none(void *__map) |
c9b41fcf BG |
483 | { |
484 | ||
485 | } | |
8698b936 | 486 | |
0d4529c5 | 487 | static void regmap_lock_mutex(void *__map) |
bacdbe07 | 488 | { |
0d4529c5 | 489 | struct regmap *map = __map; |
bacdbe07 SW |
490 | mutex_lock(&map->mutex); |
491 | } | |
492 | ||
0d4529c5 | 493 | static void regmap_unlock_mutex(void *__map) |
bacdbe07 | 494 | { |
0d4529c5 | 495 | struct regmap *map = __map; |
bacdbe07 SW |
496 | mutex_unlock(&map->mutex); |
497 | } | |
498 | ||
0d4529c5 | 499 | static void regmap_lock_spinlock(void *__map) |
b4519c71 | 500 | __acquires(&map->spinlock) |
bacdbe07 | 501 | { |
0d4529c5 | 502 | struct regmap *map = __map; |
92ab1aab LPC |
503 | unsigned long flags; |
504 | ||
505 | spin_lock_irqsave(&map->spinlock, flags); | |
506 | map->spinlock_flags = flags; | |
bacdbe07 SW |
507 | } |
508 | ||
0d4529c5 | 509 | static void regmap_unlock_spinlock(void *__map) |
b4519c71 | 510 | __releases(&map->spinlock) |
bacdbe07 | 511 | { |
0d4529c5 | 512 | struct regmap *map = __map; |
92ab1aab | 513 | spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags); |
bacdbe07 SW |
514 | } |
515 | ||
72b39f6f MB |
516 | static void dev_get_regmap_release(struct device *dev, void *res) |
517 | { | |
518 | /* | |
519 | * We don't actually have anything to do here; the goal here | |
520 | * is not to manage the regmap but to provide a simple way to | |
521 | * get the regmap back given a struct device. | |
522 | */ | |
523 | } | |
524 | ||
6863ca62 KG |
525 | static bool _regmap_range_add(struct regmap *map, |
526 | struct regmap_range_node *data) | |
527 | { | |
528 | struct rb_root *root = &map->range_tree; | |
529 | struct rb_node **new = &(root->rb_node), *parent = NULL; | |
530 | ||
531 | while (*new) { | |
532 | struct regmap_range_node *this = | |
671a911b | 533 | rb_entry(*new, struct regmap_range_node, node); |
6863ca62 KG |
534 | |
535 | parent = *new; | |
536 | if (data->range_max < this->range_min) | |
537 | new = &((*new)->rb_left); | |
538 | else if (data->range_min > this->range_max) | |
539 | new = &((*new)->rb_right); | |
540 | else | |
541 | return false; | |
542 | } | |
543 | ||
544 | rb_link_node(&data->node, parent, new); | |
545 | rb_insert_color(&data->node, root); | |
546 | ||
547 | return true; | |
548 | } | |
549 | ||
550 | static struct regmap_range_node *_regmap_range_lookup(struct regmap *map, | |
551 | unsigned int reg) | |
552 | { | |
553 | struct rb_node *node = map->range_tree.rb_node; | |
554 | ||
555 | while (node) { | |
556 | struct regmap_range_node *this = | |
671a911b | 557 | rb_entry(node, struct regmap_range_node, node); |
6863ca62 KG |
558 | |
559 | if (reg < this->range_min) | |
560 | node = node->rb_left; | |
561 | else if (reg > this->range_max) | |
562 | node = node->rb_right; | |
563 | else | |
564 | return this; | |
565 | } | |
566 | ||
567 | return NULL; | |
568 | } | |
569 | ||
570 | static void regmap_range_exit(struct regmap *map) | |
571 | { | |
572 | struct rb_node *next; | |
573 | struct regmap_range_node *range_node; | |
574 | ||
575 | next = rb_first(&map->range_tree); | |
576 | while (next) { | |
577 | range_node = rb_entry(next, struct regmap_range_node, node); | |
578 | next = rb_next(&range_node->node); | |
579 | rb_erase(&range_node->node, &map->range_tree); | |
580 | kfree(range_node); | |
581 | } | |
582 | ||
583 | kfree(map->selector_work_buf); | |
584 | } | |
585 | ||
6cfec04b MS |
586 | int regmap_attach_dev(struct device *dev, struct regmap *map, |
587 | const struct regmap_config *config) | |
588 | { | |
589 | struct regmap **m; | |
590 | ||
591 | map->dev = dev; | |
592 | ||
593 | regmap_debugfs_init(map, config->name); | |
594 | ||
595 | /* Add a devres resource for dev_get_regmap() */ | |
596 | m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL); | |
597 | if (!m) { | |
598 | regmap_debugfs_exit(map); | |
599 | return -ENOMEM; | |
600 | } | |
601 | *m = map; | |
602 | devres_add(dev, m); | |
603 | ||
604 | return 0; | |
605 | } | |
606 | EXPORT_SYMBOL_GPL(regmap_attach_dev); | |
607 | ||
cf673fbc GU |
608 | static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus, |
609 | const struct regmap_config *config) | |
610 | { | |
611 | enum regmap_endian endian; | |
612 | ||
613 | /* Retrieve the endianness specification from the regmap config */ | |
614 | endian = config->reg_format_endian; | |
615 | ||
616 | /* If the regmap config specified a non-default value, use that */ | |
617 | if (endian != REGMAP_ENDIAN_DEFAULT) | |
618 | return endian; | |
619 | ||
620 | /* Retrieve the endianness specification from the bus config */ | |
621 | if (bus && bus->reg_format_endian_default) | |
622 | endian = bus->reg_format_endian_default; | |
d647c199 | 623 | |
cf673fbc GU |
624 | /* If the bus specified a non-default value, use that */ |
625 | if (endian != REGMAP_ENDIAN_DEFAULT) | |
626 | return endian; | |
627 | ||
628 | /* Use this if no other value was found */ | |
629 | return REGMAP_ENDIAN_BIG; | |
630 | } | |
631 | ||
3c174d29 GR |
632 | enum regmap_endian regmap_get_val_endian(struct device *dev, |
633 | const struct regmap_bus *bus, | |
634 | const struct regmap_config *config) | |
d647c199 | 635 | { |
6e64b6cc | 636 | struct device_node *np; |
cf673fbc | 637 | enum regmap_endian endian; |
d647c199 | 638 | |
45e1a279 | 639 | /* Retrieve the endianness specification from the regmap config */ |
cf673fbc | 640 | endian = config->val_format_endian; |
d647c199 | 641 | |
45e1a279 | 642 | /* If the regmap config specified a non-default value, use that */ |
cf673fbc GU |
643 | if (endian != REGMAP_ENDIAN_DEFAULT) |
644 | return endian; | |
d647c199 | 645 | |
6e64b6cc PD |
646 | /* If the dev and dev->of_node exist try to get endianness from DT */ |
647 | if (dev && dev->of_node) { | |
648 | np = dev->of_node; | |
d647c199 | 649 | |
6e64b6cc PD |
650 | /* Parse the device's DT node for an endianness specification */ |
651 | if (of_property_read_bool(np, "big-endian")) | |
652 | endian = REGMAP_ENDIAN_BIG; | |
653 | else if (of_property_read_bool(np, "little-endian")) | |
654 | endian = REGMAP_ENDIAN_LITTLE; | |
a06c488d MB |
655 | else if (of_property_read_bool(np, "native-endian")) |
656 | endian = REGMAP_ENDIAN_NATIVE; | |
6e64b6cc PD |
657 | |
658 | /* If the endianness was specified in DT, use that */ | |
659 | if (endian != REGMAP_ENDIAN_DEFAULT) | |
660 | return endian; | |
661 | } | |
45e1a279 SW |
662 | |
663 | /* Retrieve the endianness specification from the bus config */ | |
cf673fbc GU |
664 | if (bus && bus->val_format_endian_default) |
665 | endian = bus->val_format_endian_default; | |
d647c199 | 666 | |
45e1a279 | 667 | /* If the bus specified a non-default value, use that */ |
cf673fbc GU |
668 | if (endian != REGMAP_ENDIAN_DEFAULT) |
669 | return endian; | |
45e1a279 SW |
670 | |
671 | /* Use this if no other value was found */ | |
cf673fbc | 672 | return REGMAP_ENDIAN_BIG; |
d647c199 | 673 | } |
3c174d29 | 674 | EXPORT_SYMBOL_GPL(regmap_get_val_endian); |
d647c199 | 675 | |
3cfe7a74 NB |
676 | struct regmap *__regmap_init(struct device *dev, |
677 | const struct regmap_bus *bus, | |
678 | void *bus_context, | |
679 | const struct regmap_config *config, | |
680 | struct lock_class_key *lock_key, | |
681 | const char *lock_name) | |
b83a313b | 682 | { |
6cfec04b | 683 | struct regmap *map; |
b83a313b | 684 | int ret = -EINVAL; |
141eba2e | 685 | enum regmap_endian reg_endian, val_endian; |
6863ca62 | 686 | int i, j; |
b83a313b | 687 | |
d2a5884a | 688 | if (!config) |
abbb18fb | 689 | goto err; |
b83a313b MB |
690 | |
691 | map = kzalloc(sizeof(*map), GFP_KERNEL); | |
692 | if (map == NULL) { | |
693 | ret = -ENOMEM; | |
694 | goto err; | |
695 | } | |
696 | ||
8253bb3f BG |
697 | if (config->name) { |
698 | map->name = kstrdup_const(config->name, GFP_KERNEL); | |
699 | if (!map->name) { | |
700 | ret = -ENOMEM; | |
701 | goto err_map; | |
702 | } | |
703 | } | |
704 | ||
c9b41fcf | 705 | if (config->disable_locking) { |
81e30b18 | 706 | map->lock = map->unlock = regmap_lock_unlock_none; |
72465736 | 707 | regmap_debugfs_disable(map); |
c9b41fcf | 708 | } else if (config->lock && config->unlock) { |
0d4529c5 DC |
709 | map->lock = config->lock; |
710 | map->unlock = config->unlock; | |
711 | map->lock_arg = config->lock_arg; | |
a4887813 | 712 | } else if (config->use_hwlock) { |
8698b936 BW |
713 | map->hwlock = hwspin_lock_request_specific(config->hwlock_id); |
714 | if (!map->hwlock) { | |
715 | ret = -ENXIO; | |
8253bb3f | 716 | goto err_name; |
8698b936 BW |
717 | } |
718 | ||
719 | switch (config->hwlock_mode) { | |
720 | case HWLOCK_IRQSTATE: | |
721 | map->lock = regmap_lock_hwlock_irqsave; | |
722 | map->unlock = regmap_unlock_hwlock_irqrestore; | |
723 | break; | |
724 | case HWLOCK_IRQ: | |
725 | map->lock = regmap_lock_hwlock_irq; | |
726 | map->unlock = regmap_unlock_hwlock_irq; | |
727 | break; | |
728 | default: | |
729 | map->lock = regmap_lock_hwlock; | |
730 | map->unlock = regmap_unlock_hwlock; | |
731 | break; | |
732 | } | |
733 | ||
734 | map->lock_arg = map; | |
bacdbe07 | 735 | } else { |
d2a5884a AS |
736 | if ((bus && bus->fast_io) || |
737 | config->fast_io) { | |
0d4529c5 DC |
738 | spin_lock_init(&map->spinlock); |
739 | map->lock = regmap_lock_spinlock; | |
740 | map->unlock = regmap_unlock_spinlock; | |
3cfe7a74 NB |
741 | lockdep_set_class_and_name(&map->spinlock, |
742 | lock_key, lock_name); | |
0d4529c5 DC |
743 | } else { |
744 | mutex_init(&map->mutex); | |
745 | map->lock = regmap_lock_mutex; | |
746 | map->unlock = regmap_unlock_mutex; | |
3cfe7a74 NB |
747 | lockdep_set_class_and_name(&map->mutex, |
748 | lock_key, lock_name); | |
0d4529c5 DC |
749 | } |
750 | map->lock_arg = map; | |
bacdbe07 | 751 | } |
b4a21fc2 SB |
752 | |
753 | /* | |
754 | * When we write in fast-paths with regmap_bulk_write() don't allocate | |
755 | * scratch buffers with sleeping allocations. | |
756 | */ | |
757 | if ((bus && bus->fast_io) || config->fast_io) | |
758 | map->alloc_flags = GFP_ATOMIC; | |
759 | else | |
760 | map->alloc_flags = GFP_KERNEL; | |
761 | ||
c212accc | 762 | map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8); |
82159ba8 | 763 | map->format.pad_bytes = config->pad_bits / 8; |
c212accc | 764 | map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8); |
5494a98f FE |
765 | map->format.buf_size = DIV_ROUND_UP(config->reg_bits + |
766 | config->val_bits + config->pad_bits, 8); | |
d939fb9a | 767 | map->reg_shift = config->pad_bits % 8; |
f01ee60f SW |
768 | if (config->reg_stride) |
769 | map->reg_stride = config->reg_stride; | |
770 | else | |
771 | map->reg_stride = 1; | |
ca747be2 XL |
772 | if (is_power_of_2(map->reg_stride)) |
773 | map->reg_stride_order = ilog2(map->reg_stride); | |
774 | else | |
775 | map->reg_stride_order = -1; | |
67921a1a MP |
776 | map->use_single_read = config->use_single_rw || !bus || !bus->read; |
777 | map->use_single_write = config->use_single_rw || !bus || !bus->write; | |
9c9f7f67 | 778 | map->can_multi_write = config->can_multi_write && bus && bus->write; |
17649c90 SS |
779 | if (bus) { |
780 | map->max_raw_read = bus->max_raw_read; | |
781 | map->max_raw_write = bus->max_raw_write; | |
782 | } | |
b83a313b MB |
783 | map->dev = dev; |
784 | map->bus = bus; | |
0135bbcc | 785 | map->bus_context = bus_context; |
2e2ae66d | 786 | map->max_register = config->max_register; |
76aad392 DC |
787 | map->wr_table = config->wr_table; |
788 | map->rd_table = config->rd_table; | |
789 | map->volatile_table = config->volatile_table; | |
790 | map->precious_table = config->precious_table; | |
cdf6b11d | 791 | map->wr_noinc_table = config->wr_noinc_table; |
74fe7b55 | 792 | map->rd_noinc_table = config->rd_noinc_table; |
2e2ae66d MB |
793 | map->writeable_reg = config->writeable_reg; |
794 | map->readable_reg = config->readable_reg; | |
795 | map->volatile_reg = config->volatile_reg; | |
2efe1642 | 796 | map->precious_reg = config->precious_reg; |
cdf6b11d | 797 | map->writeable_noinc_reg = config->writeable_noinc_reg; |
74fe7b55 | 798 | map->readable_noinc_reg = config->readable_noinc_reg; |
5d1729e7 | 799 | map->cache_type = config->cache_type; |
b83a313b | 800 | |
0d509f2b MB |
801 | spin_lock_init(&map->async_lock); |
802 | INIT_LIST_HEAD(&map->async_list); | |
7e09a979 | 803 | INIT_LIST_HEAD(&map->async_free); |
0d509f2b MB |
804 | init_waitqueue_head(&map->async_waitq); |
805 | ||
9bf485c9 AD |
806 | if (config->read_flag_mask || |
807 | config->write_flag_mask || | |
808 | config->zero_flag_mask) { | |
6f306441 LPC |
809 | map->read_flag_mask = config->read_flag_mask; |
810 | map->write_flag_mask = config->write_flag_mask; | |
d2a5884a | 811 | } else if (bus) { |
6f306441 LPC |
812 | map->read_flag_mask = bus->read_flag_mask; |
813 | } | |
814 | ||
d2a5884a AS |
815 | if (!bus) { |
816 | map->reg_read = config->reg_read; | |
817 | map->reg_write = config->reg_write; | |
818 | ||
3ac17037 BB |
819 | map->defer_caching = false; |
820 | goto skip_format_initialization; | |
821 | } else if (!bus->read || !bus->write) { | |
822 | map->reg_read = _regmap_bus_reg_read; | |
823 | map->reg_write = _regmap_bus_reg_write; | |
824 | ||
d2a5884a AS |
825 | map->defer_caching = false; |
826 | goto skip_format_initialization; | |
827 | } else { | |
828 | map->reg_read = _regmap_bus_read; | |
77792b11 | 829 | map->reg_update_bits = bus->reg_update_bits; |
d2a5884a | 830 | } |
ad278406 | 831 | |
cf673fbc GU |
832 | reg_endian = regmap_get_reg_endian(bus, config); |
833 | val_endian = regmap_get_val_endian(dev, bus, config); | |
141eba2e | 834 | |
d939fb9a | 835 | switch (config->reg_bits + map->reg_shift) { |
9aa50750 WS |
836 | case 2: |
837 | switch (config->val_bits) { | |
838 | case 6: | |
839 | map->format.format_write = regmap_format_2_6_write; | |
840 | break; | |
841 | default: | |
8698b936 | 842 | goto err_hwlock; |
9aa50750 WS |
843 | } |
844 | break; | |
845 | ||
b83a313b MB |
846 | case 4: |
847 | switch (config->val_bits) { | |
848 | case 12: | |
849 | map->format.format_write = regmap_format_4_12_write; | |
850 | break; | |
851 | default: | |
8698b936 | 852 | goto err_hwlock; |
b83a313b MB |
853 | } |
854 | break; | |
855 | ||
856 | case 7: | |
857 | switch (config->val_bits) { | |
858 | case 9: | |
859 | map->format.format_write = regmap_format_7_9_write; | |
860 | break; | |
861 | default: | |
8698b936 | 862 | goto err_hwlock; |
b83a313b MB |
863 | } |
864 | break; | |
865 | ||
7e5ec63e LPC |
866 | case 10: |
867 | switch (config->val_bits) { | |
868 | case 14: | |
869 | map->format.format_write = regmap_format_10_14_write; | |
870 | break; | |
871 | default: | |
8698b936 | 872 | goto err_hwlock; |
7e5ec63e LPC |
873 | } |
874 | break; | |
875 | ||
b83a313b MB |
876 | case 8: |
877 | map->format.format_reg = regmap_format_8; | |
878 | break; | |
879 | ||
880 | case 16: | |
141eba2e SW |
881 | switch (reg_endian) { |
882 | case REGMAP_ENDIAN_BIG: | |
883 | map->format.format_reg = regmap_format_16_be; | |
884 | break; | |
55562449 TL |
885 | case REGMAP_ENDIAN_LITTLE: |
886 | map->format.format_reg = regmap_format_16_le; | |
887 | break; | |
141eba2e SW |
888 | case REGMAP_ENDIAN_NATIVE: |
889 | map->format.format_reg = regmap_format_16_native; | |
890 | break; | |
891 | default: | |
8698b936 | 892 | goto err_hwlock; |
141eba2e | 893 | } |
b83a313b MB |
894 | break; |
895 | ||
237019e7 LPC |
896 | case 24: |
897 | if (reg_endian != REGMAP_ENDIAN_BIG) | |
8698b936 | 898 | goto err_hwlock; |
237019e7 LPC |
899 | map->format.format_reg = regmap_format_24; |
900 | break; | |
901 | ||
7d5e525b | 902 | case 32: |
141eba2e SW |
903 | switch (reg_endian) { |
904 | case REGMAP_ENDIAN_BIG: | |
905 | map->format.format_reg = regmap_format_32_be; | |
906 | break; | |
55562449 TL |
907 | case REGMAP_ENDIAN_LITTLE: |
908 | map->format.format_reg = regmap_format_32_le; | |
909 | break; | |
141eba2e SW |
910 | case REGMAP_ENDIAN_NATIVE: |
911 | map->format.format_reg = regmap_format_32_native; | |
912 | break; | |
913 | default: | |
8698b936 | 914 | goto err_hwlock; |
141eba2e | 915 | } |
7d5e525b MB |
916 | break; |
917 | ||
afcc00b9 XL |
918 | #ifdef CONFIG_64BIT |
919 | case 64: | |
920 | switch (reg_endian) { | |
921 | case REGMAP_ENDIAN_BIG: | |
922 | map->format.format_reg = regmap_format_64_be; | |
923 | break; | |
55562449 TL |
924 | case REGMAP_ENDIAN_LITTLE: |
925 | map->format.format_reg = regmap_format_64_le; | |
926 | break; | |
afcc00b9 XL |
927 | case REGMAP_ENDIAN_NATIVE: |
928 | map->format.format_reg = regmap_format_64_native; | |
929 | break; | |
930 | default: | |
8698b936 | 931 | goto err_hwlock; |
afcc00b9 XL |
932 | } |
933 | break; | |
934 | #endif | |
935 | ||
b83a313b | 936 | default: |
8698b936 | 937 | goto err_hwlock; |
b83a313b MB |
938 | } |
939 | ||
8a819ff8 MB |
940 | if (val_endian == REGMAP_ENDIAN_NATIVE) |
941 | map->format.parse_inplace = regmap_parse_inplace_noop; | |
942 | ||
b83a313b MB |
943 | switch (config->val_bits) { |
944 | case 8: | |
945 | map->format.format_val = regmap_format_8; | |
946 | map->format.parse_val = regmap_parse_8; | |
8a819ff8 | 947 | map->format.parse_inplace = regmap_parse_inplace_noop; |
b83a313b MB |
948 | break; |
949 | case 16: | |
141eba2e SW |
950 | switch (val_endian) { |
951 | case REGMAP_ENDIAN_BIG: | |
952 | map->format.format_val = regmap_format_16_be; | |
953 | map->format.parse_val = regmap_parse_16_be; | |
8a819ff8 | 954 | map->format.parse_inplace = regmap_parse_16_be_inplace; |
141eba2e | 955 | break; |
4aa8c069 XL |
956 | case REGMAP_ENDIAN_LITTLE: |
957 | map->format.format_val = regmap_format_16_le; | |
958 | map->format.parse_val = regmap_parse_16_le; | |
959 | map->format.parse_inplace = regmap_parse_16_le_inplace; | |
960 | break; | |
141eba2e SW |
961 | case REGMAP_ENDIAN_NATIVE: |
962 | map->format.format_val = regmap_format_16_native; | |
963 | map->format.parse_val = regmap_parse_16_native; | |
964 | break; | |
965 | default: | |
8698b936 | 966 | goto err_hwlock; |
141eba2e | 967 | } |
b83a313b | 968 | break; |
ea279fc5 | 969 | case 24: |
141eba2e | 970 | if (val_endian != REGMAP_ENDIAN_BIG) |
8698b936 | 971 | goto err_hwlock; |
ea279fc5 MR |
972 | map->format.format_val = regmap_format_24; |
973 | map->format.parse_val = regmap_parse_24; | |
974 | break; | |
7d5e525b | 975 | case 32: |
141eba2e SW |
976 | switch (val_endian) { |
977 | case REGMAP_ENDIAN_BIG: | |
978 | map->format.format_val = regmap_format_32_be; | |
979 | map->format.parse_val = regmap_parse_32_be; | |
8a819ff8 | 980 | map->format.parse_inplace = regmap_parse_32_be_inplace; |
141eba2e | 981 | break; |
4aa8c069 XL |
982 | case REGMAP_ENDIAN_LITTLE: |
983 | map->format.format_val = regmap_format_32_le; | |
984 | map->format.parse_val = regmap_parse_32_le; | |
985 | map->format.parse_inplace = regmap_parse_32_le_inplace; | |
986 | break; | |
141eba2e SW |
987 | case REGMAP_ENDIAN_NATIVE: |
988 | map->format.format_val = regmap_format_32_native; | |
989 | map->format.parse_val = regmap_parse_32_native; | |
990 | break; | |
991 | default: | |
8698b936 | 992 | goto err_hwlock; |
141eba2e | 993 | } |
7d5e525b | 994 | break; |
afcc00b9 | 995 | #ifdef CONFIG_64BIT |
782035ea | 996 | case 64: |
afcc00b9 XL |
997 | switch (val_endian) { |
998 | case REGMAP_ENDIAN_BIG: | |
999 | map->format.format_val = regmap_format_64_be; | |
1000 | map->format.parse_val = regmap_parse_64_be; | |
1001 | map->format.parse_inplace = regmap_parse_64_be_inplace; | |
1002 | break; | |
1003 | case REGMAP_ENDIAN_LITTLE: | |
1004 | map->format.format_val = regmap_format_64_le; | |
1005 | map->format.parse_val = regmap_parse_64_le; | |
1006 | map->format.parse_inplace = regmap_parse_64_le_inplace; | |
1007 | break; | |
1008 | case REGMAP_ENDIAN_NATIVE: | |
1009 | map->format.format_val = regmap_format_64_native; | |
1010 | map->format.parse_val = regmap_parse_64_native; | |
1011 | break; | |
1012 | default: | |
8698b936 | 1013 | goto err_hwlock; |
afcc00b9 XL |
1014 | } |
1015 | break; | |
1016 | #endif | |
b83a313b MB |
1017 | } |
1018 | ||
141eba2e SW |
1019 | if (map->format.format_write) { |
1020 | if ((reg_endian != REGMAP_ENDIAN_BIG) || | |
1021 | (val_endian != REGMAP_ENDIAN_BIG)) | |
8698b936 | 1022 | goto err_hwlock; |
67921a1a | 1023 | map->use_single_write = true; |
141eba2e | 1024 | } |
7a647614 | 1025 | |
b83a313b MB |
1026 | if (!map->format.format_write && |
1027 | !(map->format.format_reg && map->format.format_val)) | |
8698b936 | 1028 | goto err_hwlock; |
b83a313b | 1029 | |
82159ba8 | 1030 | map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL); |
b83a313b MB |
1031 | if (map->work_buf == NULL) { |
1032 | ret = -ENOMEM; | |
8698b936 | 1033 | goto err_hwlock; |
b83a313b MB |
1034 | } |
1035 | ||
d2a5884a AS |
1036 | if (map->format.format_write) { |
1037 | map->defer_caching = false; | |
07c320dc | 1038 | map->reg_write = _regmap_bus_formatted_write; |
d2a5884a AS |
1039 | } else if (map->format.format_val) { |
1040 | map->defer_caching = true; | |
07c320dc | 1041 | map->reg_write = _regmap_bus_raw_write; |
d2a5884a AS |
1042 | } |
1043 | ||
1044 | skip_format_initialization: | |
07c320dc | 1045 | |
6863ca62 | 1046 | map->range_tree = RB_ROOT; |
e3549cd0 | 1047 | for (i = 0; i < config->num_ranges; i++) { |
6863ca62 KG |
1048 | const struct regmap_range_cfg *range_cfg = &config->ranges[i]; |
1049 | struct regmap_range_node *new; | |
1050 | ||
1051 | /* Sanity check */ | |
061adc06 MB |
1052 | if (range_cfg->range_max < range_cfg->range_min) { |
1053 | dev_err(map->dev, "Invalid range %d: %d < %d\n", i, | |
1054 | range_cfg->range_max, range_cfg->range_min); | |
6863ca62 | 1055 | goto err_range; |
061adc06 MB |
1056 | } |
1057 | ||
1058 | if (range_cfg->range_max > map->max_register) { | |
1059 | dev_err(map->dev, "Invalid range %d: %d > %d\n", i, | |
1060 | range_cfg->range_max, map->max_register); | |
1061 | goto err_range; | |
1062 | } | |
1063 | ||
1064 | if (range_cfg->selector_reg > map->max_register) { | |
1065 | dev_err(map->dev, | |
1066 | "Invalid range %d: selector out of map\n", i); | |
1067 | goto err_range; | |
1068 | } | |
1069 | ||
1070 | if (range_cfg->window_len == 0) { | |
1071 | dev_err(map->dev, "Invalid range %d: window_len 0\n", | |
1072 | i); | |
1073 | goto err_range; | |
1074 | } | |
6863ca62 KG |
1075 | |
1076 | /* Make sure, that this register range has no selector | |
1077 | or data window within its boundary */ | |
e3549cd0 | 1078 | for (j = 0; j < config->num_ranges; j++) { |
6863ca62 KG |
1079 | unsigned sel_reg = config->ranges[j].selector_reg; |
1080 | unsigned win_min = config->ranges[j].window_start; | |
1081 | unsigned win_max = win_min + | |
1082 | config->ranges[j].window_len - 1; | |
1083 | ||
f161d220 PZ |
1084 | /* Allow data window inside its own virtual range */ |
1085 | if (j == i) | |
1086 | continue; | |
1087 | ||
6863ca62 KG |
1088 | if (range_cfg->range_min <= sel_reg && |
1089 | sel_reg <= range_cfg->range_max) { | |
061adc06 MB |
1090 | dev_err(map->dev, |
1091 | "Range %d: selector for %d in window\n", | |
1092 | i, j); | |
6863ca62 KG |
1093 | goto err_range; |
1094 | } | |
1095 | ||
1096 | if (!(win_max < range_cfg->range_min || | |
1097 | win_min > range_cfg->range_max)) { | |
061adc06 MB |
1098 | dev_err(map->dev, |
1099 | "Range %d: window for %d in window\n", | |
1100 | i, j); | |
6863ca62 KG |
1101 | goto err_range; |
1102 | } | |
1103 | } | |
1104 | ||
1105 | new = kzalloc(sizeof(*new), GFP_KERNEL); | |
1106 | if (new == NULL) { | |
1107 | ret = -ENOMEM; | |
1108 | goto err_range; | |
1109 | } | |
1110 | ||
4b020b3f | 1111 | new->map = map; |
d058bb49 | 1112 | new->name = range_cfg->name; |
6863ca62 KG |
1113 | new->range_min = range_cfg->range_min; |
1114 | new->range_max = range_cfg->range_max; | |
1115 | new->selector_reg = range_cfg->selector_reg; | |
1116 | new->selector_mask = range_cfg->selector_mask; | |
1117 | new->selector_shift = range_cfg->selector_shift; | |
1118 | new->window_start = range_cfg->window_start; | |
1119 | new->window_len = range_cfg->window_len; | |
1120 | ||
53e87f88 | 1121 | if (!_regmap_range_add(map, new)) { |
061adc06 | 1122 | dev_err(map->dev, "Failed to add range %d\n", i); |
6863ca62 KG |
1123 | kfree(new); |
1124 | goto err_range; | |
1125 | } | |
1126 | ||
1127 | if (map->selector_work_buf == NULL) { | |
1128 | map->selector_work_buf = | |
1129 | kzalloc(map->format.buf_size, GFP_KERNEL); | |
1130 | if (map->selector_work_buf == NULL) { | |
1131 | ret = -ENOMEM; | |
1132 | goto err_range; | |
1133 | } | |
1134 | } | |
1135 | } | |
052d2cd1 | 1136 | |
e5e3b8ab | 1137 | ret = regcache_init(map, config); |
0ff3e62f | 1138 | if (ret != 0) |
6863ca62 KG |
1139 | goto err_range; |
1140 | ||
a7a037c8 | 1141 | if (dev) { |
6cfec04b MS |
1142 | ret = regmap_attach_dev(dev, map, config); |
1143 | if (ret != 0) | |
1144 | goto err_regcache; | |
9b947a13 DL |
1145 | } else { |
1146 | regmap_debugfs_init(map, config->name); | |
a7a037c8 | 1147 | } |
72b39f6f | 1148 | |
b83a313b MB |
1149 | return map; |
1150 | ||
6cfec04b | 1151 | err_regcache: |
72b39f6f | 1152 | regcache_exit(map); |
6863ca62 KG |
1153 | err_range: |
1154 | regmap_range_exit(map); | |
58072cbf | 1155 | kfree(map->work_buf); |
8698b936 | 1156 | err_hwlock: |
a1a68fca | 1157 | if (map->hwlock) |
267f3e4f | 1158 | hwspin_lock_free(map->hwlock); |
8253bb3f BG |
1159 | err_name: |
1160 | kfree_const(map->name); | |
b83a313b MB |
1161 | err_map: |
1162 | kfree(map); | |
1163 | err: | |
1164 | return ERR_PTR(ret); | |
1165 | } | |
3cfe7a74 | 1166 | EXPORT_SYMBOL_GPL(__regmap_init); |
b83a313b | 1167 | |
c0eb4676 MB |
1168 | static void devm_regmap_release(struct device *dev, void *res) |
1169 | { | |
1170 | regmap_exit(*(struct regmap **)res); | |
1171 | } | |
1172 | ||
3cfe7a74 NB |
1173 | struct regmap *__devm_regmap_init(struct device *dev, |
1174 | const struct regmap_bus *bus, | |
1175 | void *bus_context, | |
1176 | const struct regmap_config *config, | |
1177 | struct lock_class_key *lock_key, | |
1178 | const char *lock_name) | |
c0eb4676 MB |
1179 | { |
1180 | struct regmap **ptr, *regmap; | |
1181 | ||
1182 | ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL); | |
1183 | if (!ptr) | |
1184 | return ERR_PTR(-ENOMEM); | |
1185 | ||
3cfe7a74 NB |
1186 | regmap = __regmap_init(dev, bus, bus_context, config, |
1187 | lock_key, lock_name); | |
c0eb4676 MB |
1188 | if (!IS_ERR(regmap)) { |
1189 | *ptr = regmap; | |
1190 | devres_add(dev, ptr); | |
1191 | } else { | |
1192 | devres_free(ptr); | |
1193 | } | |
1194 | ||
1195 | return regmap; | |
1196 | } | |
3cfe7a74 | 1197 | EXPORT_SYMBOL_GPL(__devm_regmap_init); |
c0eb4676 | 1198 | |
67252287 SK |
1199 | static void regmap_field_init(struct regmap_field *rm_field, |
1200 | struct regmap *regmap, struct reg_field reg_field) | |
1201 | { | |
67252287 SK |
1202 | rm_field->regmap = regmap; |
1203 | rm_field->reg = reg_field.reg; | |
1204 | rm_field->shift = reg_field.lsb; | |
921cc294 | 1205 | rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb); |
a0102375 KM |
1206 | rm_field->id_size = reg_field.id_size; |
1207 | rm_field->id_offset = reg_field.id_offset; | |
67252287 SK |
1208 | } |
1209 | ||
1210 | /** | |
2cf8e2df | 1211 | * devm_regmap_field_alloc() - Allocate and initialise a register field. |
67252287 SK |
1212 | * |
1213 | * @dev: Device that will be interacted with | |
1214 | * @regmap: regmap bank in which this register field is located. | |
1215 | * @reg_field: Register field with in the bank. | |
1216 | * | |
1217 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1218 | * to a struct regmap_field. The regmap_field will be automatically freed | |
1219 | * by the device management code. | |
1220 | */ | |
1221 | struct regmap_field *devm_regmap_field_alloc(struct device *dev, | |
1222 | struct regmap *regmap, struct reg_field reg_field) | |
1223 | { | |
1224 | struct regmap_field *rm_field = devm_kzalloc(dev, | |
1225 | sizeof(*rm_field), GFP_KERNEL); | |
1226 | if (!rm_field) | |
1227 | return ERR_PTR(-ENOMEM); | |
1228 | ||
1229 | regmap_field_init(rm_field, regmap, reg_field); | |
1230 | ||
1231 | return rm_field; | |
1232 | ||
1233 | } | |
1234 | EXPORT_SYMBOL_GPL(devm_regmap_field_alloc); | |
1235 | ||
1236 | /** | |
2cf8e2df CK |
1237 | * devm_regmap_field_free() - Free a register field allocated using |
1238 | * devm_regmap_field_alloc. | |
67252287 SK |
1239 | * |
1240 | * @dev: Device that will be interacted with | |
1241 | * @field: regmap field which should be freed. | |
2cf8e2df CK |
1242 | * |
1243 | * Free register field allocated using devm_regmap_field_alloc(). Usually | |
1244 | * drivers need not call this function, as the memory allocated via devm | |
1245 | * will be freed as per device-driver life-cyle. | |
67252287 SK |
1246 | */ |
1247 | void devm_regmap_field_free(struct device *dev, | |
1248 | struct regmap_field *field) | |
1249 | { | |
1250 | devm_kfree(dev, field); | |
1251 | } | |
1252 | EXPORT_SYMBOL_GPL(devm_regmap_field_free); | |
1253 | ||
1254 | /** | |
2cf8e2df | 1255 | * regmap_field_alloc() - Allocate and initialise a register field. |
67252287 SK |
1256 | * |
1257 | * @regmap: regmap bank in which this register field is located. | |
1258 | * @reg_field: Register field with in the bank. | |
1259 | * | |
1260 | * The return value will be an ERR_PTR() on error or a valid pointer | |
1261 | * to a struct regmap_field. The regmap_field should be freed by the | |
1262 | * user once its finished working with it using regmap_field_free(). | |
1263 | */ | |
1264 | struct regmap_field *regmap_field_alloc(struct regmap *regmap, | |
1265 | struct reg_field reg_field) | |
1266 | { | |
1267 | struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL); | |
1268 | ||
1269 | if (!rm_field) | |
1270 | return ERR_PTR(-ENOMEM); | |
1271 | ||
1272 | regmap_field_init(rm_field, regmap, reg_field); | |
1273 | ||
1274 | return rm_field; | |
1275 | } | |
1276 | EXPORT_SYMBOL_GPL(regmap_field_alloc); | |
1277 | ||
1278 | /** | |
2cf8e2df CK |
1279 | * regmap_field_free() - Free register field allocated using |
1280 | * regmap_field_alloc. | |
67252287 SK |
1281 | * |
1282 | * @field: regmap field which should be freed. | |
1283 | */ | |
1284 | void regmap_field_free(struct regmap_field *field) | |
1285 | { | |
1286 | kfree(field); | |
1287 | } | |
1288 | EXPORT_SYMBOL_GPL(regmap_field_free); | |
1289 | ||
bf315173 | 1290 | /** |
2cf8e2df | 1291 | * regmap_reinit_cache() - Reinitialise the current register cache |
bf315173 MB |
1292 | * |
1293 | * @map: Register map to operate on. | |
1294 | * @config: New configuration. Only the cache data will be used. | |
1295 | * | |
1296 | * Discard any existing register cache for the map and initialize a | |
1297 | * new cache. This can be used to restore the cache to defaults or to | |
1298 | * update the cache configuration to reflect runtime discovery of the | |
1299 | * hardware. | |
4d879514 DP |
1300 | * |
1301 | * No explicit locking is done here, the user needs to ensure that | |
1302 | * this function will not race with other calls to regmap. | |
bf315173 MB |
1303 | */ |
1304 | int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config) | |
1305 | { | |
bf315173 | 1306 | regcache_exit(map); |
a24f64a6 | 1307 | regmap_debugfs_exit(map); |
bf315173 MB |
1308 | |
1309 | map->max_register = config->max_register; | |
1310 | map->writeable_reg = config->writeable_reg; | |
1311 | map->readable_reg = config->readable_reg; | |
1312 | map->volatile_reg = config->volatile_reg; | |
1313 | map->precious_reg = config->precious_reg; | |
cdf6b11d | 1314 | map->writeable_noinc_reg = config->writeable_noinc_reg; |
74fe7b55 | 1315 | map->readable_noinc_reg = config->readable_noinc_reg; |
bf315173 MB |
1316 | map->cache_type = config->cache_type; |
1317 | ||
d3c242e1 | 1318 | regmap_debugfs_init(map, config->name); |
a24f64a6 | 1319 | |
421e8d2d MB |
1320 | map->cache_bypass = false; |
1321 | map->cache_only = false; | |
1322 | ||
4d879514 | 1323 | return regcache_init(map, config); |
bf315173 | 1324 | } |
752a6a5f | 1325 | EXPORT_SYMBOL_GPL(regmap_reinit_cache); |
bf315173 | 1326 | |
b83a313b | 1327 | /** |
2cf8e2df CK |
1328 | * regmap_exit() - Free a previously allocated register map |
1329 | * | |
1330 | * @map: Register map to operate on. | |
b83a313b MB |
1331 | */ |
1332 | void regmap_exit(struct regmap *map) | |
1333 | { | |
7e09a979 MB |
1334 | struct regmap_async *async; |
1335 | ||
5d1729e7 | 1336 | regcache_exit(map); |
31244e39 | 1337 | regmap_debugfs_exit(map); |
6863ca62 | 1338 | regmap_range_exit(map); |
d2a5884a | 1339 | if (map->bus && map->bus->free_context) |
0135bbcc | 1340 | map->bus->free_context(map->bus_context); |
b83a313b | 1341 | kfree(map->work_buf); |
7e09a979 MB |
1342 | while (!list_empty(&map->async_free)) { |
1343 | async = list_first_entry_or_null(&map->async_free, | |
1344 | struct regmap_async, | |
1345 | list); | |
1346 | list_del(&async->list); | |
1347 | kfree(async->work_buf); | |
1348 | kfree(async); | |
1349 | } | |
a1a68fca | 1350 | if (map->hwlock) |
e8419c40 | 1351 | hwspin_lock_free(map->hwlock); |
8253bb3f | 1352 | kfree_const(map->name); |
b83a313b MB |
1353 | kfree(map); |
1354 | } | |
1355 | EXPORT_SYMBOL_GPL(regmap_exit); | |
1356 | ||
72b39f6f MB |
1357 | static int dev_get_regmap_match(struct device *dev, void *res, void *data) |
1358 | { | |
1359 | struct regmap **r = res; | |
1360 | if (!r || !*r) { | |
1361 | WARN_ON(!r || !*r); | |
1362 | return 0; | |
1363 | } | |
1364 | ||
1365 | /* If the user didn't specify a name match any */ | |
1366 | if (data) | |
1367 | return (*r)->name == data; | |
1368 | else | |
1369 | return 1; | |
1370 | } | |
1371 | ||
1372 | /** | |
2cf8e2df | 1373 | * dev_get_regmap() - Obtain the regmap (if any) for a device |
72b39f6f MB |
1374 | * |
1375 | * @dev: Device to retrieve the map for | |
1376 | * @name: Optional name for the register map, usually NULL. | |
1377 | * | |
1378 | * Returns the regmap for the device if one is present, or NULL. If | |
1379 | * name is specified then it must match the name specified when | |
1380 | * registering the device, if it is NULL then the first regmap found | |
1381 | * will be used. Devices with multiple register maps are very rare, | |
1382 | * generic code should normally not need to specify a name. | |
1383 | */ | |
1384 | struct regmap *dev_get_regmap(struct device *dev, const char *name) | |
1385 | { | |
1386 | struct regmap **r = devres_find(dev, dev_get_regmap_release, | |
1387 | dev_get_regmap_match, (void *)name); | |
1388 | ||
1389 | if (!r) | |
1390 | return NULL; | |
1391 | return *r; | |
1392 | } | |
1393 | EXPORT_SYMBOL_GPL(dev_get_regmap); | |
1394 | ||
8d7d3972 | 1395 | /** |
2cf8e2df | 1396 | * regmap_get_device() - Obtain the device from a regmap |
8d7d3972 TT |
1397 | * |
1398 | * @map: Register map to operate on. | |
1399 | * | |
1400 | * Returns the underlying device that the regmap has been created for. | |
1401 | */ | |
1402 | struct device *regmap_get_device(struct regmap *map) | |
1403 | { | |
1404 | return map->dev; | |
1405 | } | |
fa2fbe4a | 1406 | EXPORT_SYMBOL_GPL(regmap_get_device); |
8d7d3972 | 1407 | |
6863ca62 | 1408 | static int _regmap_select_page(struct regmap *map, unsigned int *reg, |
98bc7dfd | 1409 | struct regmap_range_node *range, |
6863ca62 KG |
1410 | unsigned int val_num) |
1411 | { | |
6863ca62 KG |
1412 | void *orig_work_buf; |
1413 | unsigned int win_offset; | |
1414 | unsigned int win_page; | |
1415 | bool page_chg; | |
1416 | int ret; | |
1417 | ||
98bc7dfd MB |
1418 | win_offset = (*reg - range->range_min) % range->window_len; |
1419 | win_page = (*reg - range->range_min) / range->window_len; | |
6863ca62 | 1420 | |
98bc7dfd MB |
1421 | if (val_num > 1) { |
1422 | /* Bulk write shouldn't cross range boundary */ | |
1423 | if (*reg + val_num - 1 > range->range_max) | |
1424 | return -EINVAL; | |
6863ca62 | 1425 | |
98bc7dfd MB |
1426 | /* ... or single page boundary */ |
1427 | if (val_num > range->window_len - win_offset) | |
1428 | return -EINVAL; | |
1429 | } | |
6863ca62 | 1430 | |
98bc7dfd MB |
1431 | /* It is possible to have selector register inside data window. |
1432 | In that case, selector register is located on every page and | |
1433 | it needs no page switching, when accessed alone. */ | |
1434 | if (val_num > 1 || | |
1435 | range->window_start + win_offset != range->selector_reg) { | |
1436 | /* Use separate work_buf during page switching */ | |
1437 | orig_work_buf = map->work_buf; | |
1438 | map->work_buf = map->selector_work_buf; | |
6863ca62 | 1439 | |
98bc7dfd MB |
1440 | ret = _regmap_update_bits(map, range->selector_reg, |
1441 | range->selector_mask, | |
1442 | win_page << range->selector_shift, | |
7ff0589c | 1443 | &page_chg, false); |
632a5b01 | 1444 | |
98bc7dfd | 1445 | map->work_buf = orig_work_buf; |
6863ca62 | 1446 | |
0ff3e62f | 1447 | if (ret != 0) |
98bc7dfd | 1448 | return ret; |
6863ca62 KG |
1449 | } |
1450 | ||
98bc7dfd MB |
1451 | *reg = range->window_start + win_offset; |
1452 | ||
6863ca62 KG |
1453 | return 0; |
1454 | } | |
1455 | ||
f50e38c9 TL |
1456 | static void regmap_set_work_buf_flag_mask(struct regmap *map, int max_bytes, |
1457 | unsigned long mask) | |
1458 | { | |
1459 | u8 *buf; | |
1460 | int i; | |
1461 | ||
1462 | if (!mask || !map->work_buf) | |
1463 | return; | |
1464 | ||
1465 | buf = map->work_buf; | |
1466 | ||
1467 | for (i = 0; i < max_bytes; i++) | |
1468 | buf[i] |= (mask >> (8 * i)) & 0xff; | |
1469 | } | |
1470 | ||
7ef2c6b8 CK |
1471 | static int _regmap_raw_write_impl(struct regmap *map, unsigned int reg, |
1472 | const void *val, size_t val_len) | |
b83a313b | 1473 | { |
98bc7dfd | 1474 | struct regmap_range_node *range; |
0d509f2b | 1475 | unsigned long flags; |
0d509f2b MB |
1476 | void *work_val = map->work_buf + map->format.reg_bytes + |
1477 | map->format.pad_bytes; | |
b83a313b MB |
1478 | void *buf; |
1479 | int ret = -ENOTSUPP; | |
1480 | size_t len; | |
73304781 MB |
1481 | int i; |
1482 | ||
f1b5c5c3 | 1483 | WARN_ON(!map->bus); |
d2a5884a | 1484 | |
73304781 MB |
1485 | /* Check for unwritable registers before we start */ |
1486 | if (map->writeable_reg) | |
1487 | for (i = 0; i < val_len / map->format.val_bytes; i++) | |
f01ee60f | 1488 | if (!map->writeable_reg(map->dev, |
ca747be2 | 1489 | reg + regmap_get_offset(map, i))) |
73304781 | 1490 | return -EINVAL; |
b83a313b | 1491 | |
c9157198 LD |
1492 | if (!map->cache_bypass && map->format.parse_val) { |
1493 | unsigned int ival; | |
1494 | int val_bytes = map->format.val_bytes; | |
1495 | for (i = 0; i < val_len / val_bytes; i++) { | |
5a08d156 | 1496 | ival = map->format.parse_val(val + (i * val_bytes)); |
ca747be2 XL |
1497 | ret = regcache_write(map, |
1498 | reg + regmap_get_offset(map, i), | |
f01ee60f | 1499 | ival); |
c9157198 LD |
1500 | if (ret) { |
1501 | dev_err(map->dev, | |
6d04b8ac | 1502 | "Error in caching of register: %x ret: %d\n", |
c9157198 LD |
1503 | reg + i, ret); |
1504 | return ret; | |
1505 | } | |
1506 | } | |
1507 | if (map->cache_only) { | |
1508 | map->cache_dirty = true; | |
1509 | return 0; | |
1510 | } | |
1511 | } | |
1512 | ||
98bc7dfd MB |
1513 | range = _regmap_range_lookup(map, reg); |
1514 | if (range) { | |
8a2ceac6 MB |
1515 | int val_num = val_len / map->format.val_bytes; |
1516 | int win_offset = (reg - range->range_min) % range->window_len; | |
1517 | int win_residue = range->window_len - win_offset; | |
1518 | ||
1519 | /* If the write goes beyond the end of the window split it */ | |
1520 | while (val_num > win_residue) { | |
1a61cfe3 | 1521 | dev_dbg(map->dev, "Writing window %d/%zu\n", |
8a2ceac6 | 1522 | win_residue, val_len / map->format.val_bytes); |
7ef2c6b8 CK |
1523 | ret = _regmap_raw_write_impl(map, reg, val, |
1524 | win_residue * | |
1525 | map->format.val_bytes); | |
8a2ceac6 MB |
1526 | if (ret != 0) |
1527 | return ret; | |
1528 | ||
1529 | reg += win_residue; | |
1530 | val_num -= win_residue; | |
1531 | val += win_residue * map->format.val_bytes; | |
1532 | val_len -= win_residue * map->format.val_bytes; | |
1533 | ||
1534 | win_offset = (reg - range->range_min) % | |
1535 | range->window_len; | |
1536 | win_residue = range->window_len - win_offset; | |
1537 | } | |
1538 | ||
1539 | ret = _regmap_select_page(map, ®, range, val_num); | |
0ff3e62f | 1540 | if (ret != 0) |
98bc7dfd MB |
1541 | return ret; |
1542 | } | |
6863ca62 | 1543 | |
d939fb9a | 1544 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
f50e38c9 TL |
1545 | regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, |
1546 | map->write_flag_mask); | |
6f306441 | 1547 | |
651e013e MB |
1548 | /* |
1549 | * Essentially all I/O mechanisms will be faster with a single | |
1550 | * buffer to write. Since register syncs often generate raw | |
1551 | * writes of single registers optimise that case. | |
1552 | */ | |
1553 | if (val != work_val && val_len == map->format.val_bytes) { | |
1554 | memcpy(work_val, val, map->format.val_bytes); | |
1555 | val = work_val; | |
1556 | } | |
1557 | ||
0a819809 | 1558 | if (map->async && map->bus->async_write) { |
7e09a979 | 1559 | struct regmap_async *async; |
0d509f2b | 1560 | |
c6b570d9 | 1561 | trace_regmap_async_write_start(map, reg, val_len); |
fe7d4ccd | 1562 | |
7e09a979 MB |
1563 | spin_lock_irqsave(&map->async_lock, flags); |
1564 | async = list_first_entry_or_null(&map->async_free, | |
1565 | struct regmap_async, | |
1566 | list); | |
1567 | if (async) | |
1568 | list_del(&async->list); | |
1569 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1570 | ||
1571 | if (!async) { | |
1572 | async = map->bus->async_alloc(); | |
1573 | if (!async) | |
1574 | return -ENOMEM; | |
1575 | ||
1576 | async->work_buf = kzalloc(map->format.buf_size, | |
1577 | GFP_KERNEL | GFP_DMA); | |
1578 | if (!async->work_buf) { | |
1579 | kfree(async); | |
1580 | return -ENOMEM; | |
1581 | } | |
0d509f2b MB |
1582 | } |
1583 | ||
0d509f2b MB |
1584 | async->map = map; |
1585 | ||
1586 | /* If the caller supplied the value we can use it safely. */ | |
1587 | memcpy(async->work_buf, map->work_buf, map->format.pad_bytes + | |
1588 | map->format.reg_bytes + map->format.val_bytes); | |
0d509f2b MB |
1589 | |
1590 | spin_lock_irqsave(&map->async_lock, flags); | |
1591 | list_add_tail(&async->list, &map->async_list); | |
1592 | spin_unlock_irqrestore(&map->async_lock, flags); | |
1593 | ||
04c50ccf MB |
1594 | if (val != work_val) |
1595 | ret = map->bus->async_write(map->bus_context, | |
1596 | async->work_buf, | |
1597 | map->format.reg_bytes + | |
1598 | map->format.pad_bytes, | |
1599 | val, val_len, async); | |
1600 | else | |
1601 | ret = map->bus->async_write(map->bus_context, | |
1602 | async->work_buf, | |
1603 | map->format.reg_bytes + | |
1604 | map->format.pad_bytes + | |
1605 | val_len, NULL, 0, async); | |
0d509f2b MB |
1606 | |
1607 | if (ret != 0) { | |
1608 | dev_err(map->dev, "Failed to schedule write: %d\n", | |
1609 | ret); | |
1610 | ||
1611 | spin_lock_irqsave(&map->async_lock, flags); | |
7e09a979 | 1612 | list_move(&async->list, &map->async_free); |
0d509f2b | 1613 | spin_unlock_irqrestore(&map->async_lock, flags); |
0d509f2b | 1614 | } |
f951b658 MB |
1615 | |
1616 | return ret; | |
0d509f2b MB |
1617 | } |
1618 | ||
c6b570d9 | 1619 | trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes); |
fb2736bb | 1620 | |
2547e201 MB |
1621 | /* If we're doing a single register write we can probably just |
1622 | * send the work_buf directly, otherwise try to do a gather | |
1623 | * write. | |
1624 | */ | |
0d509f2b | 1625 | if (val == work_val) |
0135bbcc | 1626 | ret = map->bus->write(map->bus_context, map->work_buf, |
82159ba8 MB |
1627 | map->format.reg_bytes + |
1628 | map->format.pad_bytes + | |
1629 | val_len); | |
2547e201 | 1630 | else if (map->bus->gather_write) |
0135bbcc | 1631 | ret = map->bus->gather_write(map->bus_context, map->work_buf, |
82159ba8 MB |
1632 | map->format.reg_bytes + |
1633 | map->format.pad_bytes, | |
b83a313b MB |
1634 | val, val_len); |
1635 | ||
2547e201 | 1636 | /* If that didn't work fall back on linearising by hand. */ |
b83a313b | 1637 | if (ret == -ENOTSUPP) { |
82159ba8 MB |
1638 | len = map->format.reg_bytes + map->format.pad_bytes + val_len; |
1639 | buf = kzalloc(len, GFP_KERNEL); | |
b83a313b MB |
1640 | if (!buf) |
1641 | return -ENOMEM; | |
1642 | ||
1643 | memcpy(buf, map->work_buf, map->format.reg_bytes); | |
82159ba8 MB |
1644 | memcpy(buf + map->format.reg_bytes + map->format.pad_bytes, |
1645 | val, val_len); | |
0135bbcc | 1646 | ret = map->bus->write(map->bus_context, buf, len); |
b83a313b MB |
1647 | |
1648 | kfree(buf); | |
815806e3 | 1649 | } else if (ret != 0 && !map->cache_bypass && map->format.parse_val) { |
f0aa1ce6 NY |
1650 | /* regcache_drop_region() takes lock that we already have, |
1651 | * thus call map->cache_ops->drop() directly | |
1652 | */ | |
1653 | if (map->cache_ops && map->cache_ops->drop) | |
1654 | map->cache_ops->drop(map, reg, reg + 1); | |
b83a313b MB |
1655 | } |
1656 | ||
c6b570d9 | 1657 | trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes); |
fb2736bb | 1658 | |
b83a313b MB |
1659 | return ret; |
1660 | } | |
1661 | ||
221ad7f2 MB |
1662 | /** |
1663 | * regmap_can_raw_write - Test if regmap_raw_write() is supported | |
1664 | * | |
1665 | * @map: Map to check. | |
1666 | */ | |
1667 | bool regmap_can_raw_write(struct regmap *map) | |
1668 | { | |
07ea400e MP |
1669 | return map->bus && map->bus->write && map->format.format_val && |
1670 | map->format.format_reg; | |
221ad7f2 MB |
1671 | } |
1672 | EXPORT_SYMBOL_GPL(regmap_can_raw_write); | |
1673 | ||
f50c9eb4 MP |
1674 | /** |
1675 | * regmap_get_raw_read_max - Get the maximum size we can read | |
1676 | * | |
1677 | * @map: Map to check. | |
1678 | */ | |
1679 | size_t regmap_get_raw_read_max(struct regmap *map) | |
1680 | { | |
1681 | return map->max_raw_read; | |
1682 | } | |
1683 | EXPORT_SYMBOL_GPL(regmap_get_raw_read_max); | |
1684 | ||
1685 | /** | |
1686 | * regmap_get_raw_write_max - Get the maximum size we can read | |
1687 | * | |
1688 | * @map: Map to check. | |
1689 | */ | |
1690 | size_t regmap_get_raw_write_max(struct regmap *map) | |
1691 | { | |
1692 | return map->max_raw_write; | |
1693 | } | |
1694 | EXPORT_SYMBOL_GPL(regmap_get_raw_write_max); | |
1695 | ||
07c320dc AS |
1696 | static int _regmap_bus_formatted_write(void *context, unsigned int reg, |
1697 | unsigned int val) | |
1698 | { | |
1699 | int ret; | |
1700 | struct regmap_range_node *range; | |
1701 | struct regmap *map = context; | |
1702 | ||
f1b5c5c3 | 1703 | WARN_ON(!map->bus || !map->format.format_write); |
07c320dc AS |
1704 | |
1705 | range = _regmap_range_lookup(map, reg); | |
1706 | if (range) { | |
1707 | ret = _regmap_select_page(map, ®, range, 1); | |
1708 | if (ret != 0) | |
1709 | return ret; | |
1710 | } | |
1711 | ||
1712 | map->format.format_write(map, reg, val); | |
1713 | ||
c6b570d9 | 1714 | trace_regmap_hw_write_start(map, reg, 1); |
07c320dc AS |
1715 | |
1716 | ret = map->bus->write(map->bus_context, map->work_buf, | |
1717 | map->format.buf_size); | |
1718 | ||
c6b570d9 | 1719 | trace_regmap_hw_write_done(map, reg, 1); |
07c320dc AS |
1720 | |
1721 | return ret; | |
1722 | } | |
1723 | ||
3ac17037 BB |
1724 | static int _regmap_bus_reg_write(void *context, unsigned int reg, |
1725 | unsigned int val) | |
1726 | { | |
1727 | struct regmap *map = context; | |
1728 | ||
1729 | return map->bus->reg_write(map->bus_context, reg, val); | |
1730 | } | |
1731 | ||
07c320dc AS |
1732 | static int _regmap_bus_raw_write(void *context, unsigned int reg, |
1733 | unsigned int val) | |
1734 | { | |
1735 | struct regmap *map = context; | |
1736 | ||
f1b5c5c3 | 1737 | WARN_ON(!map->bus || !map->format.format_val); |
07c320dc AS |
1738 | |
1739 | map->format.format_val(map->work_buf + map->format.reg_bytes | |
1740 | + map->format.pad_bytes, val, 0); | |
7ef2c6b8 CK |
1741 | return _regmap_raw_write_impl(map, reg, |
1742 | map->work_buf + | |
1743 | map->format.reg_bytes + | |
1744 | map->format.pad_bytes, | |
1745 | map->format.val_bytes); | |
07c320dc AS |
1746 | } |
1747 | ||
d2a5884a AS |
1748 | static inline void *_regmap_map_get_context(struct regmap *map) |
1749 | { | |
1750 | return (map->bus) ? map : map->bus_context; | |
1751 | } | |
1752 | ||
4d2dc095 DP |
1753 | int _regmap_write(struct regmap *map, unsigned int reg, |
1754 | unsigned int val) | |
b83a313b | 1755 | { |
fb2736bb | 1756 | int ret; |
d2a5884a | 1757 | void *context = _regmap_map_get_context(map); |
b83a313b | 1758 | |
515f2261 IN |
1759 | if (!regmap_writeable(map, reg)) |
1760 | return -EIO; | |
1761 | ||
d2a5884a | 1762 | if (!map->cache_bypass && !map->defer_caching) { |
5d1729e7 DP |
1763 | ret = regcache_write(map, reg, val); |
1764 | if (ret != 0) | |
1765 | return ret; | |
8ae0d7e8 MB |
1766 | if (map->cache_only) { |
1767 | map->cache_dirty = true; | |
5d1729e7 | 1768 | return 0; |
8ae0d7e8 | 1769 | } |
5d1729e7 DP |
1770 | } |
1771 | ||
1044c180 | 1772 | #ifdef LOG_DEVICE |
5336be84 | 1773 | if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0) |
1044c180 MB |
1774 | dev_info(map->dev, "%x <= %x\n", reg, val); |
1775 | #endif | |
1776 | ||
c6b570d9 | 1777 | trace_regmap_reg_write(map, reg, val); |
fb2736bb | 1778 | |
d2a5884a | 1779 | return map->reg_write(context, reg, val); |
b83a313b MB |
1780 | } |
1781 | ||
1782 | /** | |
2cf8e2df | 1783 | * regmap_write() - Write a value to a single register |
b83a313b MB |
1784 | * |
1785 | * @map: Register map to write to | |
1786 | * @reg: Register to write to | |
1787 | * @val: Value to be written | |
1788 | * | |
1789 | * A value of zero will be returned on success, a negative errno will | |
1790 | * be returned in error cases. | |
1791 | */ | |
1792 | int regmap_write(struct regmap *map, unsigned int reg, unsigned int val) | |
1793 | { | |
1794 | int ret; | |
1795 | ||
fcac0233 | 1796 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f SW |
1797 | return -EINVAL; |
1798 | ||
0d4529c5 | 1799 | map->lock(map->lock_arg); |
b83a313b MB |
1800 | |
1801 | ret = _regmap_write(map, reg, val); | |
1802 | ||
0d4529c5 | 1803 | map->unlock(map->lock_arg); |
b83a313b MB |
1804 | |
1805 | return ret; | |
1806 | } | |
1807 | EXPORT_SYMBOL_GPL(regmap_write); | |
1808 | ||
915f441b | 1809 | /** |
2cf8e2df | 1810 | * regmap_write_async() - Write a value to a single register asynchronously |
915f441b MB |
1811 | * |
1812 | * @map: Register map to write to | |
1813 | * @reg: Register to write to | |
1814 | * @val: Value to be written | |
1815 | * | |
1816 | * A value of zero will be returned on success, a negative errno will | |
1817 | * be returned in error cases. | |
1818 | */ | |
1819 | int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val) | |
1820 | { | |
1821 | int ret; | |
1822 | ||
fcac0233 | 1823 | if (!IS_ALIGNED(reg, map->reg_stride)) |
915f441b MB |
1824 | return -EINVAL; |
1825 | ||
1826 | map->lock(map->lock_arg); | |
1827 | ||
1828 | map->async = true; | |
1829 | ||
1830 | ret = _regmap_write(map, reg, val); | |
1831 | ||
1832 | map->async = false; | |
1833 | ||
1834 | map->unlock(map->lock_arg); | |
1835 | ||
1836 | return ret; | |
1837 | } | |
1838 | EXPORT_SYMBOL_GPL(regmap_write_async); | |
1839 | ||
7ef2c6b8 CK |
1840 | int _regmap_raw_write(struct regmap *map, unsigned int reg, |
1841 | const void *val, size_t val_len) | |
1842 | { | |
1843 | size_t val_bytes = map->format.val_bytes; | |
1844 | size_t val_count = val_len / val_bytes; | |
364e378b CK |
1845 | size_t chunk_count, chunk_bytes; |
1846 | size_t chunk_regs = val_count; | |
7ef2c6b8 CK |
1847 | int ret, i; |
1848 | ||
1849 | if (!val_count) | |
1850 | return -EINVAL; | |
1851 | ||
364e378b CK |
1852 | if (map->use_single_write) |
1853 | chunk_regs = 1; | |
1854 | else if (map->max_raw_write && val_len > map->max_raw_write) | |
1855 | chunk_regs = map->max_raw_write / val_bytes; | |
1856 | ||
1857 | chunk_count = val_count / chunk_regs; | |
1858 | chunk_bytes = chunk_regs * val_bytes; | |
7ef2c6b8 CK |
1859 | |
1860 | /* Write as many bytes as possible with chunk_size */ | |
1861 | for (i = 0; i < chunk_count; i++) { | |
364e378b | 1862 | ret = _regmap_raw_write_impl(map, reg, val, chunk_bytes); |
7ef2c6b8 CK |
1863 | if (ret) |
1864 | return ret; | |
364e378b CK |
1865 | |
1866 | reg += regmap_get_offset(map, chunk_regs); | |
1867 | val += chunk_bytes; | |
1868 | val_len -= chunk_bytes; | |
7ef2c6b8 CK |
1869 | } |
1870 | ||
1871 | /* Write remaining bytes */ | |
364e378b CK |
1872 | if (val_len) |
1873 | ret = _regmap_raw_write_impl(map, reg, val, val_len); | |
7ef2c6b8 CK |
1874 | |
1875 | return ret; | |
1876 | } | |
1877 | ||
b83a313b | 1878 | /** |
2cf8e2df | 1879 | * regmap_raw_write() - Write raw values to one or more registers |
b83a313b MB |
1880 | * |
1881 | * @map: Register map to write to | |
1882 | * @reg: Initial register to write to | |
1883 | * @val: Block of data to be written, laid out for direct transmission to the | |
1884 | * device | |
1885 | * @val_len: Length of data pointed to by val. | |
1886 | * | |
1887 | * This function is intended to be used for things like firmware | |
1888 | * download where a large block of data needs to be transferred to the | |
1889 | * device. No formatting will be done on the data provided. | |
1890 | * | |
1891 | * A value of zero will be returned on success, a negative errno will | |
1892 | * be returned in error cases. | |
1893 | */ | |
1894 | int regmap_raw_write(struct regmap *map, unsigned int reg, | |
1895 | const void *val, size_t val_len) | |
1896 | { | |
1897 | int ret; | |
1898 | ||
221ad7f2 | 1899 | if (!regmap_can_raw_write(map)) |
d2a5884a | 1900 | return -EINVAL; |
851960ba SW |
1901 | if (val_len % map->format.val_bytes) |
1902 | return -EINVAL; | |
1903 | ||
0d4529c5 | 1904 | map->lock(map->lock_arg); |
b83a313b | 1905 | |
0a819809 | 1906 | ret = _regmap_raw_write(map, reg, val, val_len); |
b83a313b | 1907 | |
0d4529c5 | 1908 | map->unlock(map->lock_arg); |
b83a313b MB |
1909 | |
1910 | return ret; | |
1911 | } | |
1912 | EXPORT_SYMBOL_GPL(regmap_raw_write); | |
1913 | ||
cdf6b11d BW |
1914 | /** |
1915 | * regmap_noinc_write(): Write data from a register without incrementing the | |
1916 | * register number | |
1917 | * | |
1918 | * @map: Register map to write to | |
1919 | * @reg: Register to write to | |
1920 | * @val: Pointer to data buffer | |
1921 | * @val_len: Length of output buffer in bytes. | |
1922 | * | |
1923 | * The regmap API usually assumes that bulk bus write operations will write a | |
1924 | * range of registers. Some devices have certain registers for which a write | |
1925 | * operation can write to an internal FIFO. | |
1926 | * | |
1927 | * The target register must be volatile but registers after it can be | |
1928 | * completely unrelated cacheable registers. | |
1929 | * | |
1930 | * This will attempt multiple writes as required to write val_len bytes. | |
1931 | * | |
1932 | * A value of zero will be returned on success, a negative errno will be | |
1933 | * returned in error cases. | |
1934 | */ | |
1935 | int regmap_noinc_write(struct regmap *map, unsigned int reg, | |
1936 | const void *val, size_t val_len) | |
1937 | { | |
1938 | size_t write_len; | |
1939 | int ret; | |
1940 | ||
1941 | if (!map->bus) | |
1942 | return -EINVAL; | |
1943 | if (!map->bus->write) | |
1944 | return -ENOTSUPP; | |
1945 | if (val_len % map->format.val_bytes) | |
1946 | return -EINVAL; | |
1947 | if (!IS_ALIGNED(reg, map->reg_stride)) | |
1948 | return -EINVAL; | |
1949 | if (val_len == 0) | |
1950 | return -EINVAL; | |
1951 | ||
1952 | map->lock(map->lock_arg); | |
1953 | ||
1954 | if (!regmap_volatile(map, reg) || !regmap_writeable_noinc(map, reg)) { | |
1955 | ret = -EINVAL; | |
1956 | goto out_unlock; | |
1957 | } | |
1958 | ||
1959 | while (val_len) { | |
1960 | if (map->max_raw_write && map->max_raw_write < val_len) | |
1961 | write_len = map->max_raw_write; | |
1962 | else | |
1963 | write_len = val_len; | |
1964 | ret = _regmap_raw_write(map, reg, val, write_len); | |
1965 | if (ret) | |
1966 | goto out_unlock; | |
1967 | val = ((u8 *)val) + write_len; | |
1968 | val_len -= write_len; | |
1969 | } | |
1970 | ||
1971 | out_unlock: | |
1972 | map->unlock(map->lock_arg); | |
1973 | return ret; | |
1974 | } | |
1975 | EXPORT_SYMBOL_GPL(regmap_noinc_write); | |
1976 | ||
67252287 | 1977 | /** |
2cf8e2df CK |
1978 | * regmap_field_update_bits_base() - Perform a read/modify/write cycle a |
1979 | * register field. | |
fdf20029 KM |
1980 | * |
1981 | * @field: Register field to write to | |
1982 | * @mask: Bitmask to change | |
1983 | * @val: Value to be written | |
28972eaa KM |
1984 | * @change: Boolean indicating if a write was done |
1985 | * @async: Boolean indicating asynchronously | |
1986 | * @force: Boolean indicating use force update | |
fdf20029 | 1987 | * |
2cf8e2df CK |
1988 | * Perform a read/modify/write cycle on the register field with change, |
1989 | * async, force option. | |
1990 | * | |
fdf20029 KM |
1991 | * A value of zero will be returned on success, a negative errno will |
1992 | * be returned in error cases. | |
1993 | */ | |
28972eaa KM |
1994 | int regmap_field_update_bits_base(struct regmap_field *field, |
1995 | unsigned int mask, unsigned int val, | |
1996 | bool *change, bool async, bool force) | |
fdf20029 KM |
1997 | { |
1998 | mask = (mask << field->shift) & field->mask; | |
1999 | ||
28972eaa KM |
2000 | return regmap_update_bits_base(field->regmap, field->reg, |
2001 | mask, val << field->shift, | |
2002 | change, async, force); | |
e874e6c7 | 2003 | } |
28972eaa | 2004 | EXPORT_SYMBOL_GPL(regmap_field_update_bits_base); |
e874e6c7 | 2005 | |
a0102375 | 2006 | /** |
2cf8e2df CK |
2007 | * regmap_fields_update_bits_base() - Perform a read/modify/write cycle a |
2008 | * register field with port ID | |
a0102375 KM |
2009 | * |
2010 | * @field: Register field to write to | |
2011 | * @id: port ID | |
2012 | * @mask: Bitmask to change | |
2013 | * @val: Value to be written | |
e126edec KM |
2014 | * @change: Boolean indicating if a write was done |
2015 | * @async: Boolean indicating asynchronously | |
2016 | * @force: Boolean indicating use force update | |
a0102375 KM |
2017 | * |
2018 | * A value of zero will be returned on success, a negative errno will | |
2019 | * be returned in error cases. | |
2020 | */ | |
e126edec KM |
2021 | int regmap_fields_update_bits_base(struct regmap_field *field, unsigned int id, |
2022 | unsigned int mask, unsigned int val, | |
2023 | bool *change, bool async, bool force) | |
a0102375 KM |
2024 | { |
2025 | if (id >= field->id_size) | |
2026 | return -EINVAL; | |
2027 | ||
2028 | mask = (mask << field->shift) & field->mask; | |
2029 | ||
e126edec KM |
2030 | return regmap_update_bits_base(field->regmap, |
2031 | field->reg + (field->id_offset * id), | |
2032 | mask, val << field->shift, | |
2033 | change, async, force); | |
a0102375 | 2034 | } |
e126edec | 2035 | EXPORT_SYMBOL_GPL(regmap_fields_update_bits_base); |
a0102375 | 2036 | |
2cf8e2df CK |
2037 | /** |
2038 | * regmap_bulk_write() - Write multiple registers to the device | |
8eaeb219 LD |
2039 | * |
2040 | * @map: Register map to write to | |
2041 | * @reg: First register to be write from | |
2042 | * @val: Block of data to be written, in native register size for device | |
2043 | * @val_count: Number of registers to write | |
2044 | * | |
2045 | * This function is intended to be used for writing a large block of | |
31b35e9e | 2046 | * data to the device either in single transfer or multiple transfer. |
8eaeb219 LD |
2047 | * |
2048 | * A value of zero will be returned on success, a negative errno will | |
2049 | * be returned in error cases. | |
2050 | */ | |
2051 | int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val, | |
2052 | size_t val_count) | |
2053 | { | |
2054 | int ret = 0, i; | |
2055 | size_t val_bytes = map->format.val_bytes; | |
8eaeb219 | 2056 | |
fcac0233 | 2057 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f | 2058 | return -EINVAL; |
8eaeb219 | 2059 | |
f4298360 | 2060 | /* |
fb44f3ce CK |
2061 | * Some devices don't support bulk write, for them we have a series of |
2062 | * single write operations. | |
f4298360 | 2063 | */ |
fb44f3ce | 2064 | if (!map->bus || !map->format.parse_inplace) { |
4999e962 | 2065 | map->lock(map->lock_arg); |
f4298360 SB |
2066 | for (i = 0; i < val_count; i++) { |
2067 | unsigned int ival; | |
2068 | ||
2069 | switch (val_bytes) { | |
2070 | case 1: | |
2071 | ival = *(u8 *)(val + (i * val_bytes)); | |
2072 | break; | |
2073 | case 2: | |
2074 | ival = *(u16 *)(val + (i * val_bytes)); | |
2075 | break; | |
2076 | case 4: | |
2077 | ival = *(u32 *)(val + (i * val_bytes)); | |
2078 | break; | |
2079 | #ifdef CONFIG_64BIT | |
2080 | case 8: | |
2081 | ival = *(u64 *)(val + (i * val_bytes)); | |
2082 | break; | |
2083 | #endif | |
2084 | default: | |
2085 | ret = -EINVAL; | |
2086 | goto out; | |
2087 | } | |
8eaeb219 | 2088 | |
ca747be2 XL |
2089 | ret = _regmap_write(map, |
2090 | reg + regmap_get_offset(map, i), | |
2091 | ival); | |
f4298360 SB |
2092 | if (ret != 0) |
2093 | goto out; | |
2094 | } | |
4999e962 TI |
2095 | out: |
2096 | map->unlock(map->lock_arg); | |
8eaeb219 | 2097 | } else { |
f4298360 SB |
2098 | void *wval; |
2099 | ||
b4a21fc2 | 2100 | wval = kmemdup(val, val_count * val_bytes, map->alloc_flags); |
b4ecfec5 | 2101 | if (!wval) |
4999e962 | 2102 | return -ENOMEM; |
b4ecfec5 | 2103 | |
8eaeb219 | 2104 | for (i = 0; i < val_count * val_bytes; i += val_bytes) |
8a819ff8 | 2105 | map->format.parse_inplace(wval + i); |
f4298360 | 2106 | |
7ef2c6b8 | 2107 | ret = regmap_raw_write(map, reg, wval, val_bytes * val_count); |
8eaeb219 | 2108 | |
8eaeb219 | 2109 | kfree(wval); |
f4298360 | 2110 | } |
8eaeb219 LD |
2111 | return ret; |
2112 | } | |
2113 | EXPORT_SYMBOL_GPL(regmap_bulk_write); | |
2114 | ||
e894c3f4 OAO |
2115 | /* |
2116 | * _regmap_raw_multi_reg_write() | |
2117 | * | |
2118 | * the (register,newvalue) pairs in regs have not been formatted, but | |
2119 | * they are all in the same page and have been changed to being page | |
b486afbd | 2120 | * relative. The page register has been written if that was necessary. |
e894c3f4 OAO |
2121 | */ |
2122 | static int _regmap_raw_multi_reg_write(struct regmap *map, | |
8019ff6c | 2123 | const struct reg_sequence *regs, |
e894c3f4 OAO |
2124 | size_t num_regs) |
2125 | { | |
2126 | int ret; | |
2127 | void *buf; | |
2128 | int i; | |
2129 | u8 *u8; | |
2130 | size_t val_bytes = map->format.val_bytes; | |
2131 | size_t reg_bytes = map->format.reg_bytes; | |
2132 | size_t pad_bytes = map->format.pad_bytes; | |
2133 | size_t pair_size = reg_bytes + pad_bytes + val_bytes; | |
2134 | size_t len = pair_size * num_regs; | |
2135 | ||
f5727cd3 XL |
2136 | if (!len) |
2137 | return -EINVAL; | |
2138 | ||
e894c3f4 OAO |
2139 | buf = kzalloc(len, GFP_KERNEL); |
2140 | if (!buf) | |
2141 | return -ENOMEM; | |
2142 | ||
2143 | /* We have to linearise by hand. */ | |
2144 | ||
2145 | u8 = buf; | |
2146 | ||
2147 | for (i = 0; i < num_regs; i++) { | |
2f9b660b MP |
2148 | unsigned int reg = regs[i].reg; |
2149 | unsigned int val = regs[i].def; | |
c6b570d9 | 2150 | trace_regmap_hw_write_start(map, reg, 1); |
e894c3f4 OAO |
2151 | map->format.format_reg(u8, reg, map->reg_shift); |
2152 | u8 += reg_bytes + pad_bytes; | |
2153 | map->format.format_val(u8, val, 0); | |
2154 | u8 += val_bytes; | |
2155 | } | |
2156 | u8 = buf; | |
2157 | *u8 |= map->write_flag_mask; | |
2158 | ||
2159 | ret = map->bus->write(map->bus_context, buf, len); | |
2160 | ||
2161 | kfree(buf); | |
2162 | ||
2163 | for (i = 0; i < num_regs; i++) { | |
2164 | int reg = regs[i].reg; | |
c6b570d9 | 2165 | trace_regmap_hw_write_done(map, reg, 1); |
e894c3f4 OAO |
2166 | } |
2167 | return ret; | |
2168 | } | |
2169 | ||
2170 | static unsigned int _regmap_register_page(struct regmap *map, | |
2171 | unsigned int reg, | |
2172 | struct regmap_range_node *range) | |
2173 | { | |
2174 | unsigned int win_page = (reg - range->range_min) / range->window_len; | |
2175 | ||
2176 | return win_page; | |
2177 | } | |
2178 | ||
2179 | static int _regmap_range_multi_paged_reg_write(struct regmap *map, | |
8019ff6c | 2180 | struct reg_sequence *regs, |
e894c3f4 OAO |
2181 | size_t num_regs) |
2182 | { | |
2183 | int ret; | |
2184 | int i, n; | |
8019ff6c | 2185 | struct reg_sequence *base; |
b48d1398 | 2186 | unsigned int this_page = 0; |
2de9d600 | 2187 | unsigned int page_change = 0; |
e894c3f4 OAO |
2188 | /* |
2189 | * the set of registers are not neccessarily in order, but | |
2190 | * since the order of write must be preserved this algorithm | |
2de9d600 NP |
2191 | * chops the set each time the page changes. This also applies |
2192 | * if there is a delay required at any point in the sequence. | |
e894c3f4 OAO |
2193 | */ |
2194 | base = regs; | |
2195 | for (i = 0, n = 0; i < num_regs; i++, n++) { | |
2196 | unsigned int reg = regs[i].reg; | |
2197 | struct regmap_range_node *range; | |
2198 | ||
2199 | range = _regmap_range_lookup(map, reg); | |
2200 | if (range) { | |
2201 | unsigned int win_page = _regmap_register_page(map, reg, | |
2202 | range); | |
2203 | ||
2204 | if (i == 0) | |
2205 | this_page = win_page; | |
2206 | if (win_page != this_page) { | |
2207 | this_page = win_page; | |
2de9d600 NP |
2208 | page_change = 1; |
2209 | } | |
2210 | } | |
2211 | ||
2212 | /* If we have both a page change and a delay make sure to | |
2213 | * write the regs and apply the delay before we change the | |
2214 | * page. | |
2215 | */ | |
2216 | ||
2217 | if (page_change || regs[i].delay_us) { | |
2218 | ||
2219 | /* For situations where the first write requires | |
2220 | * a delay we need to make sure we don't call | |
2221 | * raw_multi_reg_write with n=0 | |
2222 | * This can't occur with page breaks as we | |
2223 | * never write on the first iteration | |
2224 | */ | |
2225 | if (regs[i].delay_us && i == 0) | |
2226 | n = 1; | |
2227 | ||
e894c3f4 OAO |
2228 | ret = _regmap_raw_multi_reg_write(map, base, n); |
2229 | if (ret != 0) | |
2230 | return ret; | |
2de9d600 NP |
2231 | |
2232 | if (regs[i].delay_us) | |
2233 | udelay(regs[i].delay_us); | |
2234 | ||
e894c3f4 OAO |
2235 | base += n; |
2236 | n = 0; | |
2de9d600 NP |
2237 | |
2238 | if (page_change) { | |
2239 | ret = _regmap_select_page(map, | |
2240 | &base[n].reg, | |
2241 | range, 1); | |
2242 | if (ret != 0) | |
2243 | return ret; | |
2244 | ||
2245 | page_change = 0; | |
2246 | } | |
2247 | ||
e894c3f4 | 2248 | } |
2de9d600 | 2249 | |
e894c3f4 OAO |
2250 | } |
2251 | if (n > 0) | |
2252 | return _regmap_raw_multi_reg_write(map, base, n); | |
2253 | return 0; | |
2254 | } | |
2255 | ||
1d5b40bc | 2256 | static int _regmap_multi_reg_write(struct regmap *map, |
8019ff6c | 2257 | const struct reg_sequence *regs, |
e894c3f4 | 2258 | size_t num_regs) |
1d5b40bc | 2259 | { |
e894c3f4 OAO |
2260 | int i; |
2261 | int ret; | |
2262 | ||
2263 | if (!map->can_multi_write) { | |
2264 | for (i = 0; i < num_regs; i++) { | |
2265 | ret = _regmap_write(map, regs[i].reg, regs[i].def); | |
2266 | if (ret != 0) | |
2267 | return ret; | |
2de9d600 NP |
2268 | |
2269 | if (regs[i].delay_us) | |
2270 | udelay(regs[i].delay_us); | |
e894c3f4 OAO |
2271 | } |
2272 | return 0; | |
2273 | } | |
2274 | ||
2275 | if (!map->format.parse_inplace) | |
2276 | return -EINVAL; | |
2277 | ||
2278 | if (map->writeable_reg) | |
2279 | for (i = 0; i < num_regs; i++) { | |
2280 | int reg = regs[i].reg; | |
2281 | if (!map->writeable_reg(map->dev, reg)) | |
2282 | return -EINVAL; | |
fcac0233 | 2283 | if (!IS_ALIGNED(reg, map->reg_stride)) |
e894c3f4 OAO |
2284 | return -EINVAL; |
2285 | } | |
2286 | ||
2287 | if (!map->cache_bypass) { | |
2288 | for (i = 0; i < num_regs; i++) { | |
2289 | unsigned int val = regs[i].def; | |
2290 | unsigned int reg = regs[i].reg; | |
2291 | ret = regcache_write(map, reg, val); | |
2292 | if (ret) { | |
2293 | dev_err(map->dev, | |
2294 | "Error in caching of register: %x ret: %d\n", | |
2295 | reg, ret); | |
2296 | return ret; | |
2297 | } | |
2298 | } | |
2299 | if (map->cache_only) { | |
2300 | map->cache_dirty = true; | |
2301 | return 0; | |
2302 | } | |
2303 | } | |
2304 | ||
2305 | WARN_ON(!map->bus); | |
1d5b40bc CK |
2306 | |
2307 | for (i = 0; i < num_regs; i++) { | |
e894c3f4 OAO |
2308 | unsigned int reg = regs[i].reg; |
2309 | struct regmap_range_node *range; | |
2de9d600 NP |
2310 | |
2311 | /* Coalesce all the writes between a page break or a delay | |
2312 | * in a sequence | |
2313 | */ | |
e894c3f4 | 2314 | range = _regmap_range_lookup(map, reg); |
2de9d600 | 2315 | if (range || regs[i].delay_us) { |
8019ff6c NP |
2316 | size_t len = sizeof(struct reg_sequence)*num_regs; |
2317 | struct reg_sequence *base = kmemdup(regs, len, | |
e894c3f4 OAO |
2318 | GFP_KERNEL); |
2319 | if (!base) | |
2320 | return -ENOMEM; | |
2321 | ret = _regmap_range_multi_paged_reg_write(map, base, | |
2322 | num_regs); | |
2323 | kfree(base); | |
2324 | ||
1d5b40bc CK |
2325 | return ret; |
2326 | } | |
2327 | } | |
e894c3f4 | 2328 | return _regmap_raw_multi_reg_write(map, regs, num_regs); |
1d5b40bc CK |
2329 | } |
2330 | ||
2cf8e2df CK |
2331 | /** |
2332 | * regmap_multi_reg_write() - Write multiple registers to the device | |
e33fabd3 AO |
2333 | * |
2334 | * @map: Register map to write to | |
2335 | * @regs: Array of structures containing register,value to be written | |
2336 | * @num_regs: Number of registers to write | |
2337 | * | |
2cf8e2df CK |
2338 | * Write multiple registers to the device where the set of register, value |
2339 | * pairs are supplied in any order, possibly not all in a single range. | |
2340 | * | |
e894c3f4 | 2341 | * The 'normal' block write mode will send ultimately send data on the |
2cf8e2df | 2342 | * target bus as R,V1,V2,V3,..,Vn where successively higher registers are |
e894c3f4 OAO |
2343 | * addressed. However, this alternative block multi write mode will send |
2344 | * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device | |
2345 | * must of course support the mode. | |
e33fabd3 | 2346 | * |
e894c3f4 OAO |
2347 | * A value of zero will be returned on success, a negative errno will be |
2348 | * returned in error cases. | |
e33fabd3 | 2349 | */ |
8019ff6c | 2350 | int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs, |
f7e2cec0 | 2351 | int num_regs) |
e33fabd3 | 2352 | { |
1d5b40bc | 2353 | int ret; |
e33fabd3 AO |
2354 | |
2355 | map->lock(map->lock_arg); | |
2356 | ||
1d5b40bc CK |
2357 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
2358 | ||
e33fabd3 AO |
2359 | map->unlock(map->lock_arg); |
2360 | ||
2361 | return ret; | |
2362 | } | |
2363 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write); | |
2364 | ||
2cf8e2df CK |
2365 | /** |
2366 | * regmap_multi_reg_write_bypassed() - Write multiple registers to the | |
2367 | * device but not the cache | |
e33fabd3 AO |
2368 | * |
2369 | * @map: Register map to write to | |
2370 | * @regs: Array of structures containing register,value to be written | |
2371 | * @num_regs: Number of registers to write | |
2372 | * | |
2cf8e2df CK |
2373 | * Write multiple registers to the device but not the cache where the set |
2374 | * of register are supplied in any order. | |
2375 | * | |
e33fabd3 AO |
2376 | * This function is intended to be used for writing a large block of data |
2377 | * atomically to the device in single transfer for those I2C client devices | |
2378 | * that implement this alternative block write mode. | |
2379 | * | |
2380 | * A value of zero will be returned on success, a negative errno will | |
2381 | * be returned in error cases. | |
2382 | */ | |
1d5b40bc | 2383 | int regmap_multi_reg_write_bypassed(struct regmap *map, |
8019ff6c | 2384 | const struct reg_sequence *regs, |
1d5b40bc | 2385 | int num_regs) |
e33fabd3 | 2386 | { |
1d5b40bc CK |
2387 | int ret; |
2388 | bool bypass; | |
e33fabd3 AO |
2389 | |
2390 | map->lock(map->lock_arg); | |
2391 | ||
1d5b40bc CK |
2392 | bypass = map->cache_bypass; |
2393 | map->cache_bypass = true; | |
2394 | ||
2395 | ret = _regmap_multi_reg_write(map, regs, num_regs); | |
2396 | ||
2397 | map->cache_bypass = bypass; | |
2398 | ||
e33fabd3 AO |
2399 | map->unlock(map->lock_arg); |
2400 | ||
2401 | return ret; | |
2402 | } | |
1d5b40bc | 2403 | EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed); |
e33fabd3 | 2404 | |
0d509f2b | 2405 | /** |
2cf8e2df CK |
2406 | * regmap_raw_write_async() - Write raw values to one or more registers |
2407 | * asynchronously | |
0d509f2b MB |
2408 | * |
2409 | * @map: Register map to write to | |
2410 | * @reg: Initial register to write to | |
2411 | * @val: Block of data to be written, laid out for direct transmission to the | |
2412 | * device. Must be valid until regmap_async_complete() is called. | |
2413 | * @val_len: Length of data pointed to by val. | |
2414 | * | |
2415 | * This function is intended to be used for things like firmware | |
2416 | * download where a large block of data needs to be transferred to the | |
2417 | * device. No formatting will be done on the data provided. | |
2418 | * | |
2419 | * If supported by the underlying bus the write will be scheduled | |
2420 | * asynchronously, helping maximise I/O speed on higher speed buses | |
2421 | * like SPI. regmap_async_complete() can be called to ensure that all | |
2422 | * asynchrnous writes have been completed. | |
2423 | * | |
2424 | * A value of zero will be returned on success, a negative errno will | |
2425 | * be returned in error cases. | |
2426 | */ | |
2427 | int regmap_raw_write_async(struct regmap *map, unsigned int reg, | |
2428 | const void *val, size_t val_len) | |
2429 | { | |
2430 | int ret; | |
2431 | ||
2432 | if (val_len % map->format.val_bytes) | |
2433 | return -EINVAL; | |
fcac0233 | 2434 | if (!IS_ALIGNED(reg, map->reg_stride)) |
0d509f2b MB |
2435 | return -EINVAL; |
2436 | ||
2437 | map->lock(map->lock_arg); | |
2438 | ||
0a819809 MB |
2439 | map->async = true; |
2440 | ||
2441 | ret = _regmap_raw_write(map, reg, val, val_len); | |
2442 | ||
2443 | map->async = false; | |
0d509f2b MB |
2444 | |
2445 | map->unlock(map->lock_arg); | |
2446 | ||
2447 | return ret; | |
2448 | } | |
2449 | EXPORT_SYMBOL_GPL(regmap_raw_write_async); | |
2450 | ||
b83a313b MB |
2451 | static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val, |
2452 | unsigned int val_len) | |
2453 | { | |
98bc7dfd | 2454 | struct regmap_range_node *range; |
b83a313b MB |
2455 | int ret; |
2456 | ||
f1b5c5c3 | 2457 | WARN_ON(!map->bus); |
d2a5884a | 2458 | |
bb2bb45d MB |
2459 | if (!map->bus || !map->bus->read) |
2460 | return -EINVAL; | |
2461 | ||
98bc7dfd MB |
2462 | range = _regmap_range_lookup(map, reg); |
2463 | if (range) { | |
2464 | ret = _regmap_select_page(map, ®, range, | |
2465 | val_len / map->format.val_bytes); | |
0ff3e62f | 2466 | if (ret != 0) |
98bc7dfd MB |
2467 | return ret; |
2468 | } | |
6863ca62 | 2469 | |
d939fb9a | 2470 | map->format.format_reg(map->work_buf, reg, map->reg_shift); |
f50e38c9 TL |
2471 | regmap_set_work_buf_flag_mask(map, map->format.reg_bytes, |
2472 | map->read_flag_mask); | |
c6b570d9 | 2473 | trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes); |
fb2736bb | 2474 | |
0135bbcc | 2475 | ret = map->bus->read(map->bus_context, map->work_buf, |
82159ba8 | 2476 | map->format.reg_bytes + map->format.pad_bytes, |
40c5cc26 | 2477 | val, val_len); |
b83a313b | 2478 | |
c6b570d9 | 2479 | trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes); |
fb2736bb MB |
2480 | |
2481 | return ret; | |
b83a313b MB |
2482 | } |
2483 | ||
3ac17037 BB |
2484 | static int _regmap_bus_reg_read(void *context, unsigned int reg, |
2485 | unsigned int *val) | |
2486 | { | |
2487 | struct regmap *map = context; | |
2488 | ||
2489 | return map->bus->reg_read(map->bus_context, reg, val); | |
2490 | } | |
2491 | ||
ad278406 AS |
2492 | static int _regmap_bus_read(void *context, unsigned int reg, |
2493 | unsigned int *val) | |
2494 | { | |
2495 | int ret; | |
2496 | struct regmap *map = context; | |
4c90f297 KA |
2497 | void *work_val = map->work_buf + map->format.reg_bytes + |
2498 | map->format.pad_bytes; | |
ad278406 AS |
2499 | |
2500 | if (!map->format.parse_val) | |
2501 | return -EINVAL; | |
2502 | ||
4c90f297 | 2503 | ret = _regmap_raw_read(map, reg, work_val, map->format.val_bytes); |
ad278406 | 2504 | if (ret == 0) |
4c90f297 | 2505 | *val = map->format.parse_val(work_val); |
ad278406 AS |
2506 | |
2507 | return ret; | |
2508 | } | |
2509 | ||
b83a313b MB |
2510 | static int _regmap_read(struct regmap *map, unsigned int reg, |
2511 | unsigned int *val) | |
2512 | { | |
2513 | int ret; | |
d2a5884a AS |
2514 | void *context = _regmap_map_get_context(map); |
2515 | ||
5d1729e7 DP |
2516 | if (!map->cache_bypass) { |
2517 | ret = regcache_read(map, reg, val); | |
2518 | if (ret == 0) | |
2519 | return 0; | |
2520 | } | |
2521 | ||
2522 | if (map->cache_only) | |
2523 | return -EBUSY; | |
2524 | ||
d4807ad2 MS |
2525 | if (!regmap_readable(map, reg)) |
2526 | return -EIO; | |
2527 | ||
d2a5884a | 2528 | ret = map->reg_read(context, reg, val); |
fb2736bb | 2529 | if (ret == 0) { |
1044c180 | 2530 | #ifdef LOG_DEVICE |
5336be84 | 2531 | if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0) |
1044c180 MB |
2532 | dev_info(map->dev, "%x => %x\n", reg, *val); |
2533 | #endif | |
2534 | ||
c6b570d9 | 2535 | trace_regmap_reg_read(map, reg, *val); |
b83a313b | 2536 | |
ad278406 AS |
2537 | if (!map->cache_bypass) |
2538 | regcache_write(map, reg, *val); | |
2539 | } | |
f2985367 | 2540 | |
b83a313b MB |
2541 | return ret; |
2542 | } | |
2543 | ||
2544 | /** | |
2cf8e2df | 2545 | * regmap_read() - Read a value from a single register |
b83a313b | 2546 | * |
0093380c | 2547 | * @map: Register map to read from |
b83a313b MB |
2548 | * @reg: Register to be read from |
2549 | * @val: Pointer to store read value | |
2550 | * | |
2551 | * A value of zero will be returned on success, a negative errno will | |
2552 | * be returned in error cases. | |
2553 | */ | |
2554 | int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val) | |
2555 | { | |
2556 | int ret; | |
2557 | ||
fcac0233 | 2558 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f SW |
2559 | return -EINVAL; |
2560 | ||
0d4529c5 | 2561 | map->lock(map->lock_arg); |
b83a313b MB |
2562 | |
2563 | ret = _regmap_read(map, reg, val); | |
2564 | ||
0d4529c5 | 2565 | map->unlock(map->lock_arg); |
b83a313b MB |
2566 | |
2567 | return ret; | |
2568 | } | |
2569 | EXPORT_SYMBOL_GPL(regmap_read); | |
2570 | ||
2571 | /** | |
2cf8e2df | 2572 | * regmap_raw_read() - Read raw data from the device |
b83a313b | 2573 | * |
0093380c | 2574 | * @map: Register map to read from |
b83a313b MB |
2575 | * @reg: First register to be read from |
2576 | * @val: Pointer to store read value | |
2577 | * @val_len: Size of data to read | |
2578 | * | |
2579 | * A value of zero will be returned on success, a negative errno will | |
2580 | * be returned in error cases. | |
2581 | */ | |
2582 | int regmap_raw_read(struct regmap *map, unsigned int reg, void *val, | |
2583 | size_t val_len) | |
2584 | { | |
b8fb5ab1 MB |
2585 | size_t val_bytes = map->format.val_bytes; |
2586 | size_t val_count = val_len / val_bytes; | |
2587 | unsigned int v; | |
2588 | int ret, i; | |
04e016ad | 2589 | |
d2a5884a AS |
2590 | if (!map->bus) |
2591 | return -EINVAL; | |
851960ba SW |
2592 | if (val_len % map->format.val_bytes) |
2593 | return -EINVAL; | |
fcac0233 | 2594 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f | 2595 | return -EINVAL; |
fa3eec77 MB |
2596 | if (val_count == 0) |
2597 | return -EINVAL; | |
851960ba | 2598 | |
0d4529c5 | 2599 | map->lock(map->lock_arg); |
b83a313b | 2600 | |
b8fb5ab1 MB |
2601 | if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass || |
2602 | map->cache_type == REGCACHE_NONE) { | |
1b079ca2 CK |
2603 | size_t chunk_count, chunk_bytes; |
2604 | size_t chunk_regs = val_count; | |
0645ba43 | 2605 | |
9a16ea90 MP |
2606 | if (!map->bus->read) { |
2607 | ret = -ENOTSUPP; | |
2608 | goto out; | |
2609 | } | |
2610 | ||
1b079ca2 CK |
2611 | if (map->use_single_read) |
2612 | chunk_regs = 1; | |
2613 | else if (map->max_raw_read && val_len > map->max_raw_read) | |
2614 | chunk_regs = map->max_raw_read / val_bytes; | |
9a16ea90 | 2615 | |
1b079ca2 CK |
2616 | chunk_count = val_count / chunk_regs; |
2617 | chunk_bytes = chunk_regs * val_bytes; | |
2618 | ||
2619 | /* Read bytes that fit into whole chunks */ | |
0645ba43 | 2620 | for (i = 0; i < chunk_count; i++) { |
1b079ca2 | 2621 | ret = _regmap_raw_read(map, reg, val, chunk_bytes); |
0645ba43 | 2622 | if (ret != 0) |
1b079ca2 CK |
2623 | goto out; |
2624 | ||
2625 | reg += regmap_get_offset(map, chunk_regs); | |
2626 | val += chunk_bytes; | |
2627 | val_len -= chunk_bytes; | |
0645ba43 | 2628 | } |
b8fb5ab1 | 2629 | |
0645ba43 | 2630 | /* Read remaining bytes */ |
1b079ca2 CK |
2631 | if (val_len) { |
2632 | ret = _regmap_raw_read(map, reg, val, val_len); | |
0645ba43 | 2633 | if (ret != 0) |
1b079ca2 | 2634 | goto out; |
0645ba43 | 2635 | } |
b8fb5ab1 MB |
2636 | } else { |
2637 | /* Otherwise go word by word for the cache; should be low | |
2638 | * cost as we expect to hit the cache. | |
2639 | */ | |
2640 | for (i = 0; i < val_count; i++) { | |
ca747be2 | 2641 | ret = _regmap_read(map, reg + regmap_get_offset(map, i), |
f01ee60f | 2642 | &v); |
b8fb5ab1 MB |
2643 | if (ret != 0) |
2644 | goto out; | |
2645 | ||
d939fb9a | 2646 | map->format.format_val(val + (i * val_bytes), v, 0); |
b8fb5ab1 MB |
2647 | } |
2648 | } | |
b83a313b | 2649 | |
b8fb5ab1 | 2650 | out: |
0d4529c5 | 2651 | map->unlock(map->lock_arg); |
b83a313b MB |
2652 | |
2653 | return ret; | |
2654 | } | |
2655 | EXPORT_SYMBOL_GPL(regmap_raw_read); | |
2656 | ||
67252287 | 2657 | /** |
74fe7b55 CDL |
2658 | * regmap_noinc_read(): Read data from a register without incrementing the |
2659 | * register number | |
2660 | * | |
2661 | * @map: Register map to read from | |
2662 | * @reg: Register to read from | |
2663 | * @val: Pointer to data buffer | |
2664 | * @val_len: Length of output buffer in bytes. | |
2665 | * | |
2666 | * The regmap API usually assumes that bulk bus read operations will read a | |
2667 | * range of registers. Some devices have certain registers for which a read | |
2668 | * operation read will read from an internal FIFO. | |
2669 | * | |
2670 | * The target register must be volatile but registers after it can be | |
2671 | * completely unrelated cacheable registers. | |
2672 | * | |
2673 | * This will attempt multiple reads as required to read val_len bytes. | |
2674 | * | |
2675 | * A value of zero will be returned on success, a negative errno will be | |
2676 | * returned in error cases. | |
2677 | */ | |
2678 | int regmap_noinc_read(struct regmap *map, unsigned int reg, | |
2679 | void *val, size_t val_len) | |
2680 | { | |
2681 | size_t read_len; | |
2682 | int ret; | |
2683 | ||
2684 | if (!map->bus) | |
2685 | return -EINVAL; | |
2686 | if (!map->bus->read) | |
2687 | return -ENOTSUPP; | |
2688 | if (val_len % map->format.val_bytes) | |
2689 | return -EINVAL; | |
2690 | if (!IS_ALIGNED(reg, map->reg_stride)) | |
2691 | return -EINVAL; | |
2692 | if (val_len == 0) | |
2693 | return -EINVAL; | |
2694 | ||
2695 | map->lock(map->lock_arg); | |
2696 | ||
2697 | if (!regmap_volatile(map, reg) || !regmap_readable_noinc(map, reg)) { | |
2698 | ret = -EINVAL; | |
2699 | goto out_unlock; | |
2700 | } | |
2701 | ||
2702 | while (val_len) { | |
2703 | if (map->max_raw_read && map->max_raw_read < val_len) | |
2704 | read_len = map->max_raw_read; | |
2705 | else | |
2706 | read_len = val_len; | |
2707 | ret = _regmap_raw_read(map, reg, val, read_len); | |
2708 | if (ret) | |
2709 | goto out_unlock; | |
2710 | val = ((u8 *)val) + read_len; | |
2711 | val_len -= read_len; | |
2712 | } | |
2713 | ||
2714 | out_unlock: | |
2715 | map->unlock(map->lock_arg); | |
2716 | return ret; | |
2717 | } | |
2718 | EXPORT_SYMBOL_GPL(regmap_noinc_read); | |
2719 | ||
2720 | /** | |
2721 | * regmap_field_read(): Read a value to a single register field | |
67252287 SK |
2722 | * |
2723 | * @field: Register field to read from | |
2724 | * @val: Pointer to store read value | |
2725 | * | |
2726 | * A value of zero will be returned on success, a negative errno will | |
2727 | * be returned in error cases. | |
2728 | */ | |
2729 | int regmap_field_read(struct regmap_field *field, unsigned int *val) | |
2730 | { | |
2731 | int ret; | |
2732 | unsigned int reg_val; | |
2733 | ret = regmap_read(field->regmap, field->reg, ®_val); | |
2734 | if (ret != 0) | |
2735 | return ret; | |
2736 | ||
2737 | reg_val &= field->mask; | |
2738 | reg_val >>= field->shift; | |
2739 | *val = reg_val; | |
2740 | ||
2741 | return ret; | |
2742 | } | |
2743 | EXPORT_SYMBOL_GPL(regmap_field_read); | |
2744 | ||
a0102375 | 2745 | /** |
2cf8e2df | 2746 | * regmap_fields_read() - Read a value to a single register field with port ID |
a0102375 KM |
2747 | * |
2748 | * @field: Register field to read from | |
2749 | * @id: port ID | |
2750 | * @val: Pointer to store read value | |
2751 | * | |
2752 | * A value of zero will be returned on success, a negative errno will | |
2753 | * be returned in error cases. | |
2754 | */ | |
2755 | int regmap_fields_read(struct regmap_field *field, unsigned int id, | |
2756 | unsigned int *val) | |
2757 | { | |
2758 | int ret; | |
2759 | unsigned int reg_val; | |
2760 | ||
2761 | if (id >= field->id_size) | |
2762 | return -EINVAL; | |
2763 | ||
2764 | ret = regmap_read(field->regmap, | |
2765 | field->reg + (field->id_offset * id), | |
2766 | ®_val); | |
2767 | if (ret != 0) | |
2768 | return ret; | |
2769 | ||
2770 | reg_val &= field->mask; | |
2771 | reg_val >>= field->shift; | |
2772 | *val = reg_val; | |
2773 | ||
2774 | return ret; | |
2775 | } | |
2776 | EXPORT_SYMBOL_GPL(regmap_fields_read); | |
2777 | ||
b83a313b | 2778 | /** |
2cf8e2df | 2779 | * regmap_bulk_read() - Read multiple registers from the device |
b83a313b | 2780 | * |
0093380c | 2781 | * @map: Register map to read from |
b83a313b MB |
2782 | * @reg: First register to be read from |
2783 | * @val: Pointer to store read value, in native register size for device | |
2784 | * @val_count: Number of registers to read | |
2785 | * | |
2786 | * A value of zero will be returned on success, a negative errno will | |
2787 | * be returned in error cases. | |
2788 | */ | |
2789 | int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val, | |
2790 | size_t val_count) | |
2791 | { | |
2792 | int ret, i; | |
2793 | size_t val_bytes = map->format.val_bytes; | |
82cd9965 | 2794 | bool vol = regmap_volatile_range(map, reg, val_count); |
5d1729e7 | 2795 | |
fcac0233 | 2796 | if (!IS_ALIGNED(reg, map->reg_stride)) |
f01ee60f | 2797 | return -EINVAL; |
186ba2ee CK |
2798 | if (val_count == 0) |
2799 | return -EINVAL; | |
b83a313b | 2800 | |
3b58ee13 | 2801 | if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) { |
0645ba43 CK |
2802 | ret = regmap_raw_read(map, reg, val, val_bytes * val_count); |
2803 | if (ret != 0) | |
2804 | return ret; | |
de2d808f MB |
2805 | |
2806 | for (i = 0; i < val_count * val_bytes; i += val_bytes) | |
8a819ff8 | 2807 | map->format.parse_inplace(val + i); |
de2d808f | 2808 | } else { |
9ae27a8d CK |
2809 | #ifdef CONFIG_64BIT |
2810 | u64 *u64 = val; | |
2811 | #endif | |
2812 | u32 *u32 = val; | |
2813 | u16 *u16 = val; | |
2814 | u8 *u8 = val; | |
2815 | ||
186ba2ee CK |
2816 | map->lock(map->lock_arg); |
2817 | ||
de2d808f | 2818 | for (i = 0; i < val_count; i++) { |
6560ffd1 | 2819 | unsigned int ival; |
d5b98eb1 | 2820 | |
186ba2ee CK |
2821 | ret = _regmap_read(map, reg + regmap_get_offset(map, i), |
2822 | &ival); | |
de2d808f | 2823 | if (ret != 0) |
186ba2ee | 2824 | goto out; |
d5b98eb1 | 2825 | |
9ae27a8d | 2826 | switch (map->format.val_bytes) { |
afcc00b9 | 2827 | #ifdef CONFIG_64BIT |
9ae27a8d CK |
2828 | case 8: |
2829 | u64[i] = ival; | |
2830 | break; | |
afcc00b9 | 2831 | #endif |
9ae27a8d CK |
2832 | case 4: |
2833 | u32[i] = ival; | |
2834 | break; | |
2835 | case 2: | |
2836 | u16[i] = ival; | |
2837 | break; | |
2838 | case 1: | |
2839 | u8[i] = ival; | |
2840 | break; | |
2841 | default: | |
186ba2ee CK |
2842 | ret = -EINVAL; |
2843 | goto out; | |
d5b98eb1 | 2844 | } |
de2d808f | 2845 | } |
186ba2ee CK |
2846 | |
2847 | out: | |
2848 | map->unlock(map->lock_arg); | |
de2d808f | 2849 | } |
b83a313b | 2850 | |
186ba2ee | 2851 | return ret; |
b83a313b MB |
2852 | } |
2853 | EXPORT_SYMBOL_GPL(regmap_bulk_read); | |
2854 | ||
018690d3 MB |
2855 | static int _regmap_update_bits(struct regmap *map, unsigned int reg, |
2856 | unsigned int mask, unsigned int val, | |
7ff0589c | 2857 | bool *change, bool force_write) |
b83a313b MB |
2858 | { |
2859 | int ret; | |
d91e8db2 | 2860 | unsigned int tmp, orig; |
b83a313b | 2861 | |
77792b11 JR |
2862 | if (change) |
2863 | *change = false; | |
b83a313b | 2864 | |
77792b11 JR |
2865 | if (regmap_volatile(map, reg) && map->reg_update_bits) { |
2866 | ret = map->reg_update_bits(map->bus_context, reg, mask, val); | |
2867 | if (ret == 0 && change) | |
e2f74dc6 | 2868 | *change = true; |
018690d3 | 2869 | } else { |
77792b11 JR |
2870 | ret = _regmap_read(map, reg, &orig); |
2871 | if (ret != 0) | |
2872 | return ret; | |
2873 | ||
2874 | tmp = orig & ~mask; | |
2875 | tmp |= val & mask; | |
2876 | ||
2877 | if (force_write || (tmp != orig)) { | |
2878 | ret = _regmap_write(map, reg, tmp); | |
2879 | if (ret == 0 && change) | |
2880 | *change = true; | |
2881 | } | |
018690d3 | 2882 | } |
b83a313b | 2883 | |
b83a313b MB |
2884 | return ret; |
2885 | } | |
018690d3 MB |
2886 | |
2887 | /** | |
2cf8e2df | 2888 | * regmap_update_bits_base() - Perform a read/modify/write cycle on a register |
915f441b MB |
2889 | * |
2890 | * @map: Register map to update | |
2891 | * @reg: Register to update | |
2892 | * @mask: Bitmask to change | |
2893 | * @val: New value for bitmask | |
2894 | * @change: Boolean indicating if a write was done | |
91d31b9f KM |
2895 | * @async: Boolean indicating asynchronously |
2896 | * @force: Boolean indicating use force update | |
915f441b | 2897 | * |
2cf8e2df CK |
2898 | * Perform a read/modify/write cycle on a register map with change, async, force |
2899 | * options. | |
2900 | * | |
2901 | * If async is true: | |
2902 | * | |
2903 | * With most buses the read must be done synchronously so this is most useful | |
2904 | * for devices with a cache which do not need to interact with the hardware to | |
2905 | * determine the current register value. | |
915f441b MB |
2906 | * |
2907 | * Returns zero for success, a negative number on error. | |
2908 | */ | |
91d31b9f KM |
2909 | int regmap_update_bits_base(struct regmap *map, unsigned int reg, |
2910 | unsigned int mask, unsigned int val, | |
2911 | bool *change, bool async, bool force) | |
915f441b MB |
2912 | { |
2913 | int ret; | |
2914 | ||
2915 | map->lock(map->lock_arg); | |
2916 | ||
91d31b9f | 2917 | map->async = async; |
915f441b | 2918 | |
91d31b9f | 2919 | ret = _regmap_update_bits(map, reg, mask, val, change, force); |
915f441b MB |
2920 | |
2921 | map->async = false; | |
2922 | ||
2923 | map->unlock(map->lock_arg); | |
2924 | ||
2925 | return ret; | |
2926 | } | |
91d31b9f | 2927 | EXPORT_SYMBOL_GPL(regmap_update_bits_base); |
915f441b | 2928 | |
0d509f2b MB |
2929 | void regmap_async_complete_cb(struct regmap_async *async, int ret) |
2930 | { | |
2931 | struct regmap *map = async->map; | |
2932 | bool wake; | |
2933 | ||
c6b570d9 | 2934 | trace_regmap_async_io_complete(map); |
fe7d4ccd | 2935 | |
0d509f2b | 2936 | spin_lock(&map->async_lock); |
7e09a979 | 2937 | list_move(&async->list, &map->async_free); |
0d509f2b MB |
2938 | wake = list_empty(&map->async_list); |
2939 | ||
2940 | if (ret != 0) | |
2941 | map->async_ret = ret; | |
2942 | ||
2943 | spin_unlock(&map->async_lock); | |
2944 | ||
0d509f2b MB |
2945 | if (wake) |
2946 | wake_up(&map->async_waitq); | |
2947 | } | |
f804fb56 | 2948 | EXPORT_SYMBOL_GPL(regmap_async_complete_cb); |
0d509f2b MB |
2949 | |
2950 | static int regmap_async_is_done(struct regmap *map) | |
2951 | { | |
2952 | unsigned long flags; | |
2953 | int ret; | |
2954 | ||
2955 | spin_lock_irqsave(&map->async_lock, flags); | |
2956 | ret = list_empty(&map->async_list); | |
2957 | spin_unlock_irqrestore(&map->async_lock, flags); | |
2958 | ||
2959 | return ret; | |
2960 | } | |
2961 | ||
2962 | /** | |
2cf8e2df | 2963 | * regmap_async_complete - Ensure all asynchronous I/O has completed. |
0d509f2b MB |
2964 | * |
2965 | * @map: Map to operate on. | |
2966 | * | |
2967 | * Blocks until any pending asynchronous I/O has completed. Returns | |
2968 | * an error code for any failed I/O operations. | |
2969 | */ | |
2970 | int regmap_async_complete(struct regmap *map) | |
2971 | { | |
2972 | unsigned long flags; | |
2973 | int ret; | |
2974 | ||
2975 | /* Nothing to do with no async support */ | |
f2e055e7 | 2976 | if (!map->bus || !map->bus->async_write) |
0d509f2b MB |
2977 | return 0; |
2978 | ||
c6b570d9 | 2979 | trace_regmap_async_complete_start(map); |
fe7d4ccd | 2980 | |
0d509f2b MB |
2981 | wait_event(map->async_waitq, regmap_async_is_done(map)); |
2982 | ||
2983 | spin_lock_irqsave(&map->async_lock, flags); | |
2984 | ret = map->async_ret; | |
2985 | map->async_ret = 0; | |
2986 | spin_unlock_irqrestore(&map->async_lock, flags); | |
2987 | ||
c6b570d9 | 2988 | trace_regmap_async_complete_done(map); |
fe7d4ccd | 2989 | |
0d509f2b MB |
2990 | return ret; |
2991 | } | |
f88948ef | 2992 | EXPORT_SYMBOL_GPL(regmap_async_complete); |
0d509f2b | 2993 | |
22f0d90a | 2994 | /** |
2cf8e2df CK |
2995 | * regmap_register_patch - Register and apply register updates to be applied |
2996 | * on device initialistion | |
22f0d90a MB |
2997 | * |
2998 | * @map: Register map to apply updates to. | |
2999 | * @regs: Values to update. | |
3000 | * @num_regs: Number of entries in regs. | |
3001 | * | |
3002 | * Register a set of register updates to be applied to the device | |
3003 | * whenever the device registers are synchronised with the cache and | |
3004 | * apply them immediately. Typically this is used to apply | |
3005 | * corrections to be applied to the device defaults on startup, such | |
3006 | * as the updates some vendors provide to undocumented registers. | |
56fb1c74 MB |
3007 | * |
3008 | * The caller must ensure that this function cannot be called | |
3009 | * concurrently with either itself or regcache_sync(). | |
22f0d90a | 3010 | */ |
8019ff6c | 3011 | int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs, |
22f0d90a MB |
3012 | int num_regs) |
3013 | { | |
8019ff6c | 3014 | struct reg_sequence *p; |
6bf13103 | 3015 | int ret; |
22f0d90a MB |
3016 | bool bypass; |
3017 | ||
bd60e381 CZ |
3018 | if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n", |
3019 | num_regs)) | |
3020 | return 0; | |
3021 | ||
aab13ebc | 3022 | p = krealloc(map->patch, |
8019ff6c | 3023 | sizeof(struct reg_sequence) * (map->patch_regs + num_regs), |
aab13ebc MB |
3024 | GFP_KERNEL); |
3025 | if (p) { | |
3026 | memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs)); | |
3027 | map->patch = p; | |
3028 | map->patch_regs += num_regs; | |
22f0d90a | 3029 | } else { |
56fb1c74 | 3030 | return -ENOMEM; |
22f0d90a MB |
3031 | } |
3032 | ||
0d4529c5 | 3033 | map->lock(map->lock_arg); |
22f0d90a MB |
3034 | |
3035 | bypass = map->cache_bypass; | |
3036 | ||
3037 | map->cache_bypass = true; | |
1a25f261 | 3038 | map->async = true; |
22f0d90a | 3039 | |
6bf13103 | 3040 | ret = _regmap_multi_reg_write(map, regs, num_regs); |
22f0d90a | 3041 | |
1a25f261 | 3042 | map->async = false; |
22f0d90a MB |
3043 | map->cache_bypass = bypass; |
3044 | ||
0d4529c5 | 3045 | map->unlock(map->lock_arg); |
22f0d90a | 3046 | |
1a25f261 MB |
3047 | regmap_async_complete(map); |
3048 | ||
22f0d90a MB |
3049 | return ret; |
3050 | } | |
3051 | EXPORT_SYMBOL_GPL(regmap_register_patch); | |
3052 | ||
2cf8e2df CK |
3053 | /** |
3054 | * regmap_get_val_bytes() - Report the size of a register value | |
3055 | * | |
3056 | * @map: Register map to operate on. | |
a6539c32 MB |
3057 | * |
3058 | * Report the size of a register value, mainly intended to for use by | |
3059 | * generic infrastructure built on top of regmap. | |
3060 | */ | |
3061 | int regmap_get_val_bytes(struct regmap *map) | |
3062 | { | |
3063 | if (map->format.format_write) | |
3064 | return -EINVAL; | |
3065 | ||
3066 | return map->format.val_bytes; | |
3067 | } | |
3068 | EXPORT_SYMBOL_GPL(regmap_get_val_bytes); | |
3069 | ||
668abc72 | 3070 | /** |
2cf8e2df CK |
3071 | * regmap_get_max_register() - Report the max register value |
3072 | * | |
3073 | * @map: Register map to operate on. | |
668abc72 SK |
3074 | * |
3075 | * Report the max register value, mainly intended to for use by | |
3076 | * generic infrastructure built on top of regmap. | |
3077 | */ | |
3078 | int regmap_get_max_register(struct regmap *map) | |
3079 | { | |
3080 | return map->max_register ? map->max_register : -EINVAL; | |
3081 | } | |
3082 | EXPORT_SYMBOL_GPL(regmap_get_max_register); | |
3083 | ||
a2f776cb | 3084 | /** |
2cf8e2df CK |
3085 | * regmap_get_reg_stride() - Report the register address stride |
3086 | * | |
3087 | * @map: Register map to operate on. | |
a2f776cb SK |
3088 | * |
3089 | * Report the register address stride, mainly intended to for use by | |
3090 | * generic infrastructure built on top of regmap. | |
3091 | */ | |
3092 | int regmap_get_reg_stride(struct regmap *map) | |
3093 | { | |
3094 | return map->reg_stride; | |
3095 | } | |
3096 | EXPORT_SYMBOL_GPL(regmap_get_reg_stride); | |
3097 | ||
13ff50c8 NC |
3098 | int regmap_parse_val(struct regmap *map, const void *buf, |
3099 | unsigned int *val) | |
3100 | { | |
3101 | if (!map->format.parse_val) | |
3102 | return -EINVAL; | |
3103 | ||
3104 | *val = map->format.parse_val(buf); | |
3105 | ||
3106 | return 0; | |
3107 | } | |
3108 | EXPORT_SYMBOL_GPL(regmap_parse_val); | |
3109 | ||
31244e39 MB |
3110 | static int __init regmap_initcall(void) |
3111 | { | |
3112 | regmap_debugfs_initcall(); | |
3113 | ||
3114 | return 0; | |
3115 | } | |
3116 | postcore_initcall(regmap_initcall); |