Merge remote-tracking branch 'regulator/topic/max8952' into v3.9-rc8
[linux-2.6-block.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
0d509f2b
MB
45static void async_cleanup(struct work_struct *work)
46{
47 struct regmap_async *async = container_of(work, struct regmap_async,
48 cleanup);
49
50 kfree(async->work_buf);
51 kfree(async);
52}
53
76aad392
DC
54bool regmap_reg_in_ranges(unsigned int reg,
55 const struct regmap_range *ranges,
56 unsigned int nranges)
57{
58 const struct regmap_range *r;
59 int i;
60
61 for (i = 0, r = ranges; i < nranges; i++, r++)
62 if (regmap_reg_in_range(reg, r))
63 return true;
64 return false;
65}
66EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
67
68static bool _regmap_check_range_table(struct regmap *map,
69 unsigned int reg,
70 const struct regmap_access_table *table)
71{
72 /* Check "no ranges" first */
73 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
74 return false;
75
76 /* In case zero "yes ranges" are supplied, any reg is OK */
77 if (!table->n_yes_ranges)
78 return true;
79
80 return regmap_reg_in_ranges(reg, table->yes_ranges,
81 table->n_yes_ranges);
82}
83
8de2f081
MB
84bool regmap_writeable(struct regmap *map, unsigned int reg)
85{
86 if (map->max_register && reg > map->max_register)
87 return false;
88
89 if (map->writeable_reg)
90 return map->writeable_reg(map->dev, reg);
91
76aad392
DC
92 if (map->wr_table)
93 return _regmap_check_range_table(map, reg, map->wr_table);
94
8de2f081
MB
95 return true;
96}
97
98bool regmap_readable(struct regmap *map, unsigned int reg)
99{
100 if (map->max_register && reg > map->max_register)
101 return false;
102
4191f197
WS
103 if (map->format.format_write)
104 return false;
105
8de2f081
MB
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
108
76aad392
DC
109 if (map->rd_table)
110 return _regmap_check_range_table(map, reg, map->rd_table);
111
8de2f081
MB
112 return true;
113}
114
115bool regmap_volatile(struct regmap *map, unsigned int reg)
116{
4191f197 117 if (!regmap_readable(map, reg))
8de2f081
MB
118 return false;
119
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
122
76aad392
DC
123 if (map->volatile_table)
124 return _regmap_check_range_table(map, reg, map->volatile_table);
125
8de2f081
MB
126 return true;
127}
128
129bool regmap_precious(struct regmap *map, unsigned int reg)
130{
4191f197 131 if (!regmap_readable(map, reg))
8de2f081
MB
132 return false;
133
134 if (map->precious_reg)
135 return map->precious_reg(map->dev, reg);
136
76aad392
DC
137 if (map->precious_table)
138 return _regmap_check_range_table(map, reg, map->precious_table);
139
8de2f081
MB
140 return false;
141}
142
82cd9965 143static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 144 size_t num)
82cd9965
LPC
145{
146 unsigned int i;
147
148 for (i = 0; i < num; i++)
149 if (!regmap_volatile(map, reg + i))
150 return false;
151
152 return true;
153}
154
9aa50750
WS
155static void regmap_format_2_6_write(struct regmap *map,
156 unsigned int reg, unsigned int val)
157{
158 u8 *out = map->work_buf;
159
160 *out = (reg << 6) | val;
161}
162
b83a313b
MB
163static void regmap_format_4_12_write(struct regmap *map,
164 unsigned int reg, unsigned int val)
165{
166 __be16 *out = map->work_buf;
167 *out = cpu_to_be16((reg << 12) | val);
168}
169
170static void regmap_format_7_9_write(struct regmap *map,
171 unsigned int reg, unsigned int val)
172{
173 __be16 *out = map->work_buf;
174 *out = cpu_to_be16((reg << 9) | val);
175}
176
7e5ec63e
LPC
177static void regmap_format_10_14_write(struct regmap *map,
178 unsigned int reg, unsigned int val)
179{
180 u8 *out = map->work_buf;
181
182 out[2] = val;
183 out[1] = (val >> 8) | (reg << 6);
184 out[0] = reg >> 2;
185}
186
d939fb9a 187static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
188{
189 u8 *b = buf;
190
d939fb9a 191 b[0] = val << shift;
b83a313b
MB
192}
193
141eba2e 194static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
195{
196 __be16 *b = buf;
197
d939fb9a 198 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
199}
200
141eba2e
SW
201static void regmap_format_16_native(void *buf, unsigned int val,
202 unsigned int shift)
203{
204 *(u16 *)buf = val << shift;
205}
206
d939fb9a 207static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
208{
209 u8 *b = buf;
210
d939fb9a
MR
211 val <<= shift;
212
ea279fc5
MR
213 b[0] = val >> 16;
214 b[1] = val >> 8;
215 b[2] = val;
216}
217
141eba2e 218static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
219{
220 __be32 *b = buf;
221
d939fb9a 222 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
223}
224
141eba2e
SW
225static void regmap_format_32_native(void *buf, unsigned int val,
226 unsigned int shift)
227{
228 *(u32 *)buf = val << shift;
229}
230
b83a313b
MB
231static unsigned int regmap_parse_8(void *buf)
232{
233 u8 *b = buf;
234
235 return b[0];
236}
237
141eba2e 238static unsigned int regmap_parse_16_be(void *buf)
b83a313b
MB
239{
240 __be16 *b = buf;
241
242 b[0] = be16_to_cpu(b[0]);
243
244 return b[0];
245}
246
141eba2e
SW
247static unsigned int regmap_parse_16_native(void *buf)
248{
249 return *(u16 *)buf;
250}
251
ea279fc5
MR
252static unsigned int regmap_parse_24(void *buf)
253{
254 u8 *b = buf;
255 unsigned int ret = b[2];
256 ret |= ((unsigned int)b[1]) << 8;
257 ret |= ((unsigned int)b[0]) << 16;
258
259 return ret;
260}
261
141eba2e 262static unsigned int regmap_parse_32_be(void *buf)
7d5e525b
MB
263{
264 __be32 *b = buf;
265
266 b[0] = be32_to_cpu(b[0]);
267
268 return b[0];
269}
270
141eba2e
SW
271static unsigned int regmap_parse_32_native(void *buf)
272{
273 return *(u32 *)buf;
274}
275
0d4529c5 276static void regmap_lock_mutex(void *__map)
bacdbe07 277{
0d4529c5 278 struct regmap *map = __map;
bacdbe07
SW
279 mutex_lock(&map->mutex);
280}
281
0d4529c5 282static void regmap_unlock_mutex(void *__map)
bacdbe07 283{
0d4529c5 284 struct regmap *map = __map;
bacdbe07
SW
285 mutex_unlock(&map->mutex);
286}
287
0d4529c5 288static void regmap_lock_spinlock(void *__map)
bacdbe07 289{
0d4529c5 290 struct regmap *map = __map;
bacdbe07
SW
291 spin_lock(&map->spinlock);
292}
293
0d4529c5 294static void regmap_unlock_spinlock(void *__map)
bacdbe07 295{
0d4529c5 296 struct regmap *map = __map;
bacdbe07
SW
297 spin_unlock(&map->spinlock);
298}
299
72b39f6f
MB
300static void dev_get_regmap_release(struct device *dev, void *res)
301{
302 /*
303 * We don't actually have anything to do here; the goal here
304 * is not to manage the regmap but to provide a simple way to
305 * get the regmap back given a struct device.
306 */
307}
308
6863ca62
KG
309static bool _regmap_range_add(struct regmap *map,
310 struct regmap_range_node *data)
311{
312 struct rb_root *root = &map->range_tree;
313 struct rb_node **new = &(root->rb_node), *parent = NULL;
314
315 while (*new) {
316 struct regmap_range_node *this =
317 container_of(*new, struct regmap_range_node, node);
318
319 parent = *new;
320 if (data->range_max < this->range_min)
321 new = &((*new)->rb_left);
322 else if (data->range_min > this->range_max)
323 new = &((*new)->rb_right);
324 else
325 return false;
326 }
327
328 rb_link_node(&data->node, parent, new);
329 rb_insert_color(&data->node, root);
330
331 return true;
332}
333
334static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
335 unsigned int reg)
336{
337 struct rb_node *node = map->range_tree.rb_node;
338
339 while (node) {
340 struct regmap_range_node *this =
341 container_of(node, struct regmap_range_node, node);
342
343 if (reg < this->range_min)
344 node = node->rb_left;
345 else if (reg > this->range_max)
346 node = node->rb_right;
347 else
348 return this;
349 }
350
351 return NULL;
352}
353
354static void regmap_range_exit(struct regmap *map)
355{
356 struct rb_node *next;
357 struct regmap_range_node *range_node;
358
359 next = rb_first(&map->range_tree);
360 while (next) {
361 range_node = rb_entry(next, struct regmap_range_node, node);
362 next = rb_next(&range_node->node);
363 rb_erase(&range_node->node, &map->range_tree);
364 kfree(range_node);
365 }
366
367 kfree(map->selector_work_buf);
368}
369
b83a313b
MB
370/**
371 * regmap_init(): Initialise register map
372 *
373 * @dev: Device that will be interacted with
374 * @bus: Bus-specific callbacks to use with device
0135bbcc 375 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
376 * @config: Configuration for register map
377 *
378 * The return value will be an ERR_PTR() on error or a valid pointer to
379 * a struct regmap. This function should generally not be called
380 * directly, it should be called by bus-specific init functions.
381 */
382struct regmap *regmap_init(struct device *dev,
383 const struct regmap_bus *bus,
0135bbcc 384 void *bus_context,
b83a313b
MB
385 const struct regmap_config *config)
386{
72b39f6f 387 struct regmap *map, **m;
b83a313b 388 int ret = -EINVAL;
141eba2e 389 enum regmap_endian reg_endian, val_endian;
6863ca62 390 int i, j;
b83a313b 391
d2a5884a 392 if (!config)
abbb18fb 393 goto err;
b83a313b
MB
394
395 map = kzalloc(sizeof(*map), GFP_KERNEL);
396 if (map == NULL) {
397 ret = -ENOMEM;
398 goto err;
399 }
400
0d4529c5
DC
401 if (config->lock && config->unlock) {
402 map->lock = config->lock;
403 map->unlock = config->unlock;
404 map->lock_arg = config->lock_arg;
bacdbe07 405 } else {
d2a5884a
AS
406 if ((bus && bus->fast_io) ||
407 config->fast_io) {
0d4529c5
DC
408 spin_lock_init(&map->spinlock);
409 map->lock = regmap_lock_spinlock;
410 map->unlock = regmap_unlock_spinlock;
411 } else {
412 mutex_init(&map->mutex);
413 map->lock = regmap_lock_mutex;
414 map->unlock = regmap_unlock_mutex;
415 }
416 map->lock_arg = map;
bacdbe07 417 }
c212accc 418 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 419 map->format.pad_bytes = config->pad_bits / 8;
c212accc 420 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
421 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
422 config->val_bits + config->pad_bits, 8);
d939fb9a 423 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
424 if (config->reg_stride)
425 map->reg_stride = config->reg_stride;
426 else
427 map->reg_stride = 1;
2e33caf1 428 map->use_single_rw = config->use_single_rw;
b83a313b
MB
429 map->dev = dev;
430 map->bus = bus;
0135bbcc 431 map->bus_context = bus_context;
2e2ae66d 432 map->max_register = config->max_register;
76aad392
DC
433 map->wr_table = config->wr_table;
434 map->rd_table = config->rd_table;
435 map->volatile_table = config->volatile_table;
436 map->precious_table = config->precious_table;
2e2ae66d
MB
437 map->writeable_reg = config->writeable_reg;
438 map->readable_reg = config->readable_reg;
439 map->volatile_reg = config->volatile_reg;
2efe1642 440 map->precious_reg = config->precious_reg;
5d1729e7 441 map->cache_type = config->cache_type;
72b39f6f 442 map->name = config->name;
b83a313b 443
0d509f2b
MB
444 spin_lock_init(&map->async_lock);
445 INIT_LIST_HEAD(&map->async_list);
446 init_waitqueue_head(&map->async_waitq);
447
6f306441
LPC
448 if (config->read_flag_mask || config->write_flag_mask) {
449 map->read_flag_mask = config->read_flag_mask;
450 map->write_flag_mask = config->write_flag_mask;
d2a5884a 451 } else if (bus) {
6f306441
LPC
452 map->read_flag_mask = bus->read_flag_mask;
453 }
454
d2a5884a
AS
455 if (!bus) {
456 map->reg_read = config->reg_read;
457 map->reg_write = config->reg_write;
458
459 map->defer_caching = false;
460 goto skip_format_initialization;
461 } else {
462 map->reg_read = _regmap_bus_read;
463 }
ad278406 464
141eba2e
SW
465 reg_endian = config->reg_format_endian;
466 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
467 reg_endian = bus->reg_format_endian_default;
468 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
469 reg_endian = REGMAP_ENDIAN_BIG;
470
471 val_endian = config->val_format_endian;
472 if (val_endian == REGMAP_ENDIAN_DEFAULT)
473 val_endian = bus->val_format_endian_default;
474 if (val_endian == REGMAP_ENDIAN_DEFAULT)
475 val_endian = REGMAP_ENDIAN_BIG;
476
d939fb9a 477 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
478 case 2:
479 switch (config->val_bits) {
480 case 6:
481 map->format.format_write = regmap_format_2_6_write;
482 break;
483 default:
484 goto err_map;
485 }
486 break;
487
b83a313b
MB
488 case 4:
489 switch (config->val_bits) {
490 case 12:
491 map->format.format_write = regmap_format_4_12_write;
492 break;
493 default:
494 goto err_map;
495 }
496 break;
497
498 case 7:
499 switch (config->val_bits) {
500 case 9:
501 map->format.format_write = regmap_format_7_9_write;
502 break;
503 default:
504 goto err_map;
505 }
506 break;
507
7e5ec63e
LPC
508 case 10:
509 switch (config->val_bits) {
510 case 14:
511 map->format.format_write = regmap_format_10_14_write;
512 break;
513 default:
514 goto err_map;
515 }
516 break;
517
b83a313b
MB
518 case 8:
519 map->format.format_reg = regmap_format_8;
520 break;
521
522 case 16:
141eba2e
SW
523 switch (reg_endian) {
524 case REGMAP_ENDIAN_BIG:
525 map->format.format_reg = regmap_format_16_be;
526 break;
527 case REGMAP_ENDIAN_NATIVE:
528 map->format.format_reg = regmap_format_16_native;
529 break;
530 default:
531 goto err_map;
532 }
b83a313b
MB
533 break;
534
237019e7
LPC
535 case 24:
536 if (reg_endian != REGMAP_ENDIAN_BIG)
537 goto err_map;
538 map->format.format_reg = regmap_format_24;
539 break;
540
7d5e525b 541 case 32:
141eba2e
SW
542 switch (reg_endian) {
543 case REGMAP_ENDIAN_BIG:
544 map->format.format_reg = regmap_format_32_be;
545 break;
546 case REGMAP_ENDIAN_NATIVE:
547 map->format.format_reg = regmap_format_32_native;
548 break;
549 default:
550 goto err_map;
551 }
7d5e525b
MB
552 break;
553
b83a313b
MB
554 default:
555 goto err_map;
556 }
557
558 switch (config->val_bits) {
559 case 8:
560 map->format.format_val = regmap_format_8;
561 map->format.parse_val = regmap_parse_8;
562 break;
563 case 16:
141eba2e
SW
564 switch (val_endian) {
565 case REGMAP_ENDIAN_BIG:
566 map->format.format_val = regmap_format_16_be;
567 map->format.parse_val = regmap_parse_16_be;
568 break;
569 case REGMAP_ENDIAN_NATIVE:
570 map->format.format_val = regmap_format_16_native;
571 map->format.parse_val = regmap_parse_16_native;
572 break;
573 default:
574 goto err_map;
575 }
b83a313b 576 break;
ea279fc5 577 case 24:
141eba2e
SW
578 if (val_endian != REGMAP_ENDIAN_BIG)
579 goto err_map;
ea279fc5
MR
580 map->format.format_val = regmap_format_24;
581 map->format.parse_val = regmap_parse_24;
582 break;
7d5e525b 583 case 32:
141eba2e
SW
584 switch (val_endian) {
585 case REGMAP_ENDIAN_BIG:
586 map->format.format_val = regmap_format_32_be;
587 map->format.parse_val = regmap_parse_32_be;
588 break;
589 case REGMAP_ENDIAN_NATIVE:
590 map->format.format_val = regmap_format_32_native;
591 map->format.parse_val = regmap_parse_32_native;
592 break;
593 default:
594 goto err_map;
595 }
7d5e525b 596 break;
b83a313b
MB
597 }
598
141eba2e
SW
599 if (map->format.format_write) {
600 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
601 (val_endian != REGMAP_ENDIAN_BIG))
602 goto err_map;
7a647614 603 map->use_single_rw = true;
141eba2e 604 }
7a647614 605
b83a313b
MB
606 if (!map->format.format_write &&
607 !(map->format.format_reg && map->format.format_val))
608 goto err_map;
609
82159ba8 610 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
611 if (map->work_buf == NULL) {
612 ret = -ENOMEM;
5204f5e3 613 goto err_map;
b83a313b
MB
614 }
615
d2a5884a
AS
616 if (map->format.format_write) {
617 map->defer_caching = false;
07c320dc 618 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
619 } else if (map->format.format_val) {
620 map->defer_caching = true;
07c320dc 621 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
622 }
623
624skip_format_initialization:
07c320dc 625
6863ca62 626 map->range_tree = RB_ROOT;
e3549cd0 627 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
628 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
629 struct regmap_range_node *new;
630
631 /* Sanity check */
061adc06
MB
632 if (range_cfg->range_max < range_cfg->range_min) {
633 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
634 range_cfg->range_max, range_cfg->range_min);
6863ca62 635 goto err_range;
061adc06
MB
636 }
637
638 if (range_cfg->range_max > map->max_register) {
639 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
640 range_cfg->range_max, map->max_register);
641 goto err_range;
642 }
643
644 if (range_cfg->selector_reg > map->max_register) {
645 dev_err(map->dev,
646 "Invalid range %d: selector out of map\n", i);
647 goto err_range;
648 }
649
650 if (range_cfg->window_len == 0) {
651 dev_err(map->dev, "Invalid range %d: window_len 0\n",
652 i);
653 goto err_range;
654 }
6863ca62
KG
655
656 /* Make sure, that this register range has no selector
657 or data window within its boundary */
e3549cd0 658 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
659 unsigned sel_reg = config->ranges[j].selector_reg;
660 unsigned win_min = config->ranges[j].window_start;
661 unsigned win_max = win_min +
662 config->ranges[j].window_len - 1;
663
664 if (range_cfg->range_min <= sel_reg &&
665 sel_reg <= range_cfg->range_max) {
061adc06
MB
666 dev_err(map->dev,
667 "Range %d: selector for %d in window\n",
668 i, j);
6863ca62
KG
669 goto err_range;
670 }
671
672 if (!(win_max < range_cfg->range_min ||
673 win_min > range_cfg->range_max)) {
061adc06
MB
674 dev_err(map->dev,
675 "Range %d: window for %d in window\n",
676 i, j);
6863ca62
KG
677 goto err_range;
678 }
679 }
680
681 new = kzalloc(sizeof(*new), GFP_KERNEL);
682 if (new == NULL) {
683 ret = -ENOMEM;
684 goto err_range;
685 }
686
4b020b3f 687 new->map = map;
d058bb49 688 new->name = range_cfg->name;
6863ca62
KG
689 new->range_min = range_cfg->range_min;
690 new->range_max = range_cfg->range_max;
691 new->selector_reg = range_cfg->selector_reg;
692 new->selector_mask = range_cfg->selector_mask;
693 new->selector_shift = range_cfg->selector_shift;
694 new->window_start = range_cfg->window_start;
695 new->window_len = range_cfg->window_len;
696
697 if (_regmap_range_add(map, new) == false) {
061adc06 698 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
699 kfree(new);
700 goto err_range;
701 }
702
703 if (map->selector_work_buf == NULL) {
704 map->selector_work_buf =
705 kzalloc(map->format.buf_size, GFP_KERNEL);
706 if (map->selector_work_buf == NULL) {
707 ret = -ENOMEM;
708 goto err_range;
709 }
710 }
711 }
052d2cd1 712
c6432ea9
DP
713 regmap_debugfs_init(map, config->name);
714
e5e3b8ab 715 ret = regcache_init(map, config);
0ff3e62f 716 if (ret != 0)
6863ca62
KG
717 goto err_range;
718
72b39f6f
MB
719 /* Add a devres resource for dev_get_regmap() */
720 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
721 if (!m) {
722 ret = -ENOMEM;
6863ca62 723 goto err_debugfs;
72b39f6f
MB
724 }
725 *m = map;
726 devres_add(dev, m);
727
b83a313b
MB
728 return map;
729
bfaa25f3
SW
730err_debugfs:
731 regmap_debugfs_exit(map);
72b39f6f 732 regcache_exit(map);
6863ca62
KG
733err_range:
734 regmap_range_exit(map);
58072cbf 735 kfree(map->work_buf);
b83a313b
MB
736err_map:
737 kfree(map);
738err:
739 return ERR_PTR(ret);
740}
741EXPORT_SYMBOL_GPL(regmap_init);
742
c0eb4676
MB
743static void devm_regmap_release(struct device *dev, void *res)
744{
745 regmap_exit(*(struct regmap **)res);
746}
747
748/**
749 * devm_regmap_init(): Initialise managed register map
750 *
751 * @dev: Device that will be interacted with
752 * @bus: Bus-specific callbacks to use with device
0135bbcc 753 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
754 * @config: Configuration for register map
755 *
756 * The return value will be an ERR_PTR() on error or a valid pointer
757 * to a struct regmap. This function should generally not be called
758 * directly, it should be called by bus-specific init functions. The
759 * map will be automatically freed by the device management code.
760 */
761struct regmap *devm_regmap_init(struct device *dev,
762 const struct regmap_bus *bus,
0135bbcc 763 void *bus_context,
c0eb4676
MB
764 const struct regmap_config *config)
765{
766 struct regmap **ptr, *regmap;
767
768 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
769 if (!ptr)
770 return ERR_PTR(-ENOMEM);
771
0135bbcc 772 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
773 if (!IS_ERR(regmap)) {
774 *ptr = regmap;
775 devres_add(dev, ptr);
776 } else {
777 devres_free(ptr);
778 }
779
780 return regmap;
781}
782EXPORT_SYMBOL_GPL(devm_regmap_init);
783
bf315173
MB
784/**
785 * regmap_reinit_cache(): Reinitialise the current register cache
786 *
787 * @map: Register map to operate on.
788 * @config: New configuration. Only the cache data will be used.
789 *
790 * Discard any existing register cache for the map and initialize a
791 * new cache. This can be used to restore the cache to defaults or to
792 * update the cache configuration to reflect runtime discovery of the
793 * hardware.
4d879514
DP
794 *
795 * No explicit locking is done here, the user needs to ensure that
796 * this function will not race with other calls to regmap.
bf315173
MB
797 */
798int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
799{
bf315173 800 regcache_exit(map);
a24f64a6 801 regmap_debugfs_exit(map);
bf315173
MB
802
803 map->max_register = config->max_register;
804 map->writeable_reg = config->writeable_reg;
805 map->readable_reg = config->readable_reg;
806 map->volatile_reg = config->volatile_reg;
807 map->precious_reg = config->precious_reg;
808 map->cache_type = config->cache_type;
809
d3c242e1 810 regmap_debugfs_init(map, config->name);
a24f64a6 811
421e8d2d
MB
812 map->cache_bypass = false;
813 map->cache_only = false;
814
4d879514 815 return regcache_init(map, config);
bf315173 816}
752a6a5f 817EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 818
b83a313b
MB
819/**
820 * regmap_exit(): Free a previously allocated register map
821 */
822void regmap_exit(struct regmap *map)
823{
5d1729e7 824 regcache_exit(map);
31244e39 825 regmap_debugfs_exit(map);
6863ca62 826 regmap_range_exit(map);
d2a5884a 827 if (map->bus && map->bus->free_context)
0135bbcc 828 map->bus->free_context(map->bus_context);
b83a313b 829 kfree(map->work_buf);
b83a313b
MB
830 kfree(map);
831}
832EXPORT_SYMBOL_GPL(regmap_exit);
833
72b39f6f
MB
834static int dev_get_regmap_match(struct device *dev, void *res, void *data)
835{
836 struct regmap **r = res;
837 if (!r || !*r) {
838 WARN_ON(!r || !*r);
839 return 0;
840 }
841
842 /* If the user didn't specify a name match any */
843 if (data)
844 return (*r)->name == data;
845 else
846 return 1;
847}
848
849/**
850 * dev_get_regmap(): Obtain the regmap (if any) for a device
851 *
852 * @dev: Device to retrieve the map for
853 * @name: Optional name for the register map, usually NULL.
854 *
855 * Returns the regmap for the device if one is present, or NULL. If
856 * name is specified then it must match the name specified when
857 * registering the device, if it is NULL then the first regmap found
858 * will be used. Devices with multiple register maps are very rare,
859 * generic code should normally not need to specify a name.
860 */
861struct regmap *dev_get_regmap(struct device *dev, const char *name)
862{
863 struct regmap **r = devres_find(dev, dev_get_regmap_release,
864 dev_get_regmap_match, (void *)name);
865
866 if (!r)
867 return NULL;
868 return *r;
869}
870EXPORT_SYMBOL_GPL(dev_get_regmap);
871
6863ca62 872static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 873 struct regmap_range_node *range,
6863ca62
KG
874 unsigned int val_num)
875{
6863ca62
KG
876 void *orig_work_buf;
877 unsigned int win_offset;
878 unsigned int win_page;
879 bool page_chg;
880 int ret;
881
98bc7dfd
MB
882 win_offset = (*reg - range->range_min) % range->window_len;
883 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 884
98bc7dfd
MB
885 if (val_num > 1) {
886 /* Bulk write shouldn't cross range boundary */
887 if (*reg + val_num - 1 > range->range_max)
888 return -EINVAL;
6863ca62 889
98bc7dfd
MB
890 /* ... or single page boundary */
891 if (val_num > range->window_len - win_offset)
892 return -EINVAL;
893 }
6863ca62 894
98bc7dfd
MB
895 /* It is possible to have selector register inside data window.
896 In that case, selector register is located on every page and
897 it needs no page switching, when accessed alone. */
898 if (val_num > 1 ||
899 range->window_start + win_offset != range->selector_reg) {
900 /* Use separate work_buf during page switching */
901 orig_work_buf = map->work_buf;
902 map->work_buf = map->selector_work_buf;
6863ca62 903
98bc7dfd
MB
904 ret = _regmap_update_bits(map, range->selector_reg,
905 range->selector_mask,
906 win_page << range->selector_shift,
907 &page_chg);
632a5b01 908
98bc7dfd 909 map->work_buf = orig_work_buf;
6863ca62 910
0ff3e62f 911 if (ret != 0)
98bc7dfd 912 return ret;
6863ca62
KG
913 }
914
98bc7dfd
MB
915 *reg = range->window_start + win_offset;
916
6863ca62
KG
917 return 0;
918}
919
b83a313b 920static int _regmap_raw_write(struct regmap *map, unsigned int reg,
0d509f2b 921 const void *val, size_t val_len, bool async)
b83a313b 922{
98bc7dfd 923 struct regmap_range_node *range;
0d509f2b 924 unsigned long flags;
6f306441 925 u8 *u8 = map->work_buf;
0d509f2b
MB
926 void *work_val = map->work_buf + map->format.reg_bytes +
927 map->format.pad_bytes;
b83a313b
MB
928 void *buf;
929 int ret = -ENOTSUPP;
930 size_t len;
73304781
MB
931 int i;
932
d2a5884a
AS
933 BUG_ON(!map->bus);
934
73304781
MB
935 /* Check for unwritable registers before we start */
936 if (map->writeable_reg)
937 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
938 if (!map->writeable_reg(map->dev,
939 reg + (i * map->reg_stride)))
73304781 940 return -EINVAL;
b83a313b 941
c9157198
LD
942 if (!map->cache_bypass && map->format.parse_val) {
943 unsigned int ival;
944 int val_bytes = map->format.val_bytes;
945 for (i = 0; i < val_len / val_bytes; i++) {
51a246aa
MB
946 memcpy(map->work_buf, val + (i * val_bytes), val_bytes);
947 ival = map->format.parse_val(map->work_buf);
f01ee60f
SW
948 ret = regcache_write(map, reg + (i * map->reg_stride),
949 ival);
c9157198
LD
950 if (ret) {
951 dev_err(map->dev,
6d04b8ac 952 "Error in caching of register: %x ret: %d\n",
c9157198
LD
953 reg + i, ret);
954 return ret;
955 }
956 }
957 if (map->cache_only) {
958 map->cache_dirty = true;
959 return 0;
960 }
961 }
962
98bc7dfd
MB
963 range = _regmap_range_lookup(map, reg);
964 if (range) {
8a2ceac6
MB
965 int val_num = val_len / map->format.val_bytes;
966 int win_offset = (reg - range->range_min) % range->window_len;
967 int win_residue = range->window_len - win_offset;
968
969 /* If the write goes beyond the end of the window split it */
970 while (val_num > win_residue) {
1a61cfe3 971 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
972 win_residue, val_len / map->format.val_bytes);
973 ret = _regmap_raw_write(map, reg, val, win_residue *
0d509f2b 974 map->format.val_bytes, async);
8a2ceac6
MB
975 if (ret != 0)
976 return ret;
977
978 reg += win_residue;
979 val_num -= win_residue;
980 val += win_residue * map->format.val_bytes;
981 val_len -= win_residue * map->format.val_bytes;
982
983 win_offset = (reg - range->range_min) %
984 range->window_len;
985 win_residue = range->window_len - win_offset;
986 }
987
988 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 989 if (ret != 0)
98bc7dfd
MB
990 return ret;
991 }
6863ca62 992
d939fb9a 993 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 994
6f306441
LPC
995 u8[0] |= map->write_flag_mask;
996
0d509f2b
MB
997 if (async && map->bus->async_write) {
998 struct regmap_async *async = map->bus->async_alloc();
999 if (!async)
1000 return -ENOMEM;
1001
1002 async->work_buf = kzalloc(map->format.buf_size,
1003 GFP_KERNEL | GFP_DMA);
1004 if (!async->work_buf) {
1005 kfree(async);
1006 return -ENOMEM;
1007 }
1008
1009 INIT_WORK(&async->cleanup, async_cleanup);
1010 async->map = map;
1011
1012 /* If the caller supplied the value we can use it safely. */
1013 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1014 map->format.reg_bytes + map->format.val_bytes);
1015 if (val == work_val)
1016 val = async->work_buf + map->format.pad_bytes +
1017 map->format.reg_bytes;
1018
1019 spin_lock_irqsave(&map->async_lock, flags);
1020 list_add_tail(&async->list, &map->async_list);
1021 spin_unlock_irqrestore(&map->async_lock, flags);
1022
1023 ret = map->bus->async_write(map->bus_context, async->work_buf,
1024 map->format.reg_bytes +
1025 map->format.pad_bytes,
1026 val, val_len, async);
1027
1028 if (ret != 0) {
1029 dev_err(map->dev, "Failed to schedule write: %d\n",
1030 ret);
1031
1032 spin_lock_irqsave(&map->async_lock, flags);
1033 list_del(&async->list);
1034 spin_unlock_irqrestore(&map->async_lock, flags);
1035
1036 kfree(async->work_buf);
1037 kfree(async);
1038 }
f951b658
MB
1039
1040 return ret;
0d509f2b
MB
1041 }
1042
fb2736bb
MB
1043 trace_regmap_hw_write_start(map->dev, reg,
1044 val_len / map->format.val_bytes);
1045
2547e201
MB
1046 /* If we're doing a single register write we can probably just
1047 * send the work_buf directly, otherwise try to do a gather
1048 * write.
1049 */
0d509f2b 1050 if (val == work_val)
0135bbcc 1051 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1052 map->format.reg_bytes +
1053 map->format.pad_bytes +
1054 val_len);
2547e201 1055 else if (map->bus->gather_write)
0135bbcc 1056 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1057 map->format.reg_bytes +
1058 map->format.pad_bytes,
b83a313b
MB
1059 val, val_len);
1060
2547e201 1061 /* If that didn't work fall back on linearising by hand. */
b83a313b 1062 if (ret == -ENOTSUPP) {
82159ba8
MB
1063 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1064 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1065 if (!buf)
1066 return -ENOMEM;
1067
1068 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1069 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1070 val, val_len);
0135bbcc 1071 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1072
1073 kfree(buf);
1074 }
1075
fb2736bb
MB
1076 trace_regmap_hw_write_done(map->dev, reg,
1077 val_len / map->format.val_bytes);
1078
b83a313b
MB
1079 return ret;
1080}
1081
07c320dc
AS
1082static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1083 unsigned int val)
1084{
1085 int ret;
1086 struct regmap_range_node *range;
1087 struct regmap *map = context;
1088
d2a5884a 1089 BUG_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1090
1091 range = _regmap_range_lookup(map, reg);
1092 if (range) {
1093 ret = _regmap_select_page(map, &reg, range, 1);
1094 if (ret != 0)
1095 return ret;
1096 }
1097
1098 map->format.format_write(map, reg, val);
1099
1100 trace_regmap_hw_write_start(map->dev, reg, 1);
1101
1102 ret = map->bus->write(map->bus_context, map->work_buf,
1103 map->format.buf_size);
1104
1105 trace_regmap_hw_write_done(map->dev, reg, 1);
1106
1107 return ret;
1108}
1109
1110static int _regmap_bus_raw_write(void *context, unsigned int reg,
1111 unsigned int val)
1112{
1113 struct regmap *map = context;
1114
d2a5884a 1115 BUG_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1116
1117 map->format.format_val(map->work_buf + map->format.reg_bytes
1118 + map->format.pad_bytes, val, 0);
1119 return _regmap_raw_write(map, reg,
1120 map->work_buf +
1121 map->format.reg_bytes +
1122 map->format.pad_bytes,
0d509f2b 1123 map->format.val_bytes, false);
07c320dc
AS
1124}
1125
d2a5884a
AS
1126static inline void *_regmap_map_get_context(struct regmap *map)
1127{
1128 return (map->bus) ? map : map->bus_context;
1129}
1130
4d2dc095
DP
1131int _regmap_write(struct regmap *map, unsigned int reg,
1132 unsigned int val)
b83a313b 1133{
fb2736bb 1134 int ret;
d2a5884a 1135 void *context = _regmap_map_get_context(map);
b83a313b 1136
d2a5884a 1137 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1138 ret = regcache_write(map, reg, val);
1139 if (ret != 0)
1140 return ret;
8ae0d7e8
MB
1141 if (map->cache_only) {
1142 map->cache_dirty = true;
5d1729e7 1143 return 0;
8ae0d7e8 1144 }
5d1729e7
DP
1145 }
1146
1044c180
MB
1147#ifdef LOG_DEVICE
1148 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1149 dev_info(map->dev, "%x <= %x\n", reg, val);
1150#endif
1151
fb2736bb
MB
1152 trace_regmap_reg_write(map->dev, reg, val);
1153
d2a5884a 1154 return map->reg_write(context, reg, val);
b83a313b
MB
1155}
1156
1157/**
1158 * regmap_write(): Write a value to a single register
1159 *
1160 * @map: Register map to write to
1161 * @reg: Register to write to
1162 * @val: Value to be written
1163 *
1164 * A value of zero will be returned on success, a negative errno will
1165 * be returned in error cases.
1166 */
1167int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1168{
1169 int ret;
1170
f01ee60f
SW
1171 if (reg % map->reg_stride)
1172 return -EINVAL;
1173
0d4529c5 1174 map->lock(map->lock_arg);
b83a313b
MB
1175
1176 ret = _regmap_write(map, reg, val);
1177
0d4529c5 1178 map->unlock(map->lock_arg);
b83a313b
MB
1179
1180 return ret;
1181}
1182EXPORT_SYMBOL_GPL(regmap_write);
1183
1184/**
1185 * regmap_raw_write(): Write raw values to one or more registers
1186 *
1187 * @map: Register map to write to
1188 * @reg: Initial register to write to
1189 * @val: Block of data to be written, laid out for direct transmission to the
1190 * device
1191 * @val_len: Length of data pointed to by val.
1192 *
1193 * This function is intended to be used for things like firmware
1194 * download where a large block of data needs to be transferred to the
1195 * device. No formatting will be done on the data provided.
1196 *
1197 * A value of zero will be returned on success, a negative errno will
1198 * be returned in error cases.
1199 */
1200int regmap_raw_write(struct regmap *map, unsigned int reg,
1201 const void *val, size_t val_len)
1202{
1203 int ret;
1204
d2a5884a
AS
1205 if (!map->bus)
1206 return -EINVAL;
851960ba
SW
1207 if (val_len % map->format.val_bytes)
1208 return -EINVAL;
f01ee60f
SW
1209 if (reg % map->reg_stride)
1210 return -EINVAL;
851960ba 1211
0d4529c5 1212 map->lock(map->lock_arg);
b83a313b 1213
0d509f2b 1214 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 1215
0d4529c5 1216 map->unlock(map->lock_arg);
b83a313b
MB
1217
1218 return ret;
1219}
1220EXPORT_SYMBOL_GPL(regmap_raw_write);
1221
8eaeb219
LD
1222/*
1223 * regmap_bulk_write(): Write multiple registers to the device
1224 *
1225 * @map: Register map to write to
1226 * @reg: First register to be write from
1227 * @val: Block of data to be written, in native register size for device
1228 * @val_count: Number of registers to write
1229 *
1230 * This function is intended to be used for writing a large block of
31b35e9e 1231 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1232 *
1233 * A value of zero will be returned on success, a negative errno will
1234 * be returned in error cases.
1235 */
1236int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1237 size_t val_count)
1238{
1239 int ret = 0, i;
1240 size_t val_bytes = map->format.val_bytes;
1241 void *wval;
1242
d2a5884a
AS
1243 if (!map->bus)
1244 return -EINVAL;
8eaeb219
LD
1245 if (!map->format.parse_val)
1246 return -EINVAL;
f01ee60f
SW
1247 if (reg % map->reg_stride)
1248 return -EINVAL;
8eaeb219 1249
0d4529c5 1250 map->lock(map->lock_arg);
8eaeb219
LD
1251
1252 /* No formatting is require if val_byte is 1 */
1253 if (val_bytes == 1) {
1254 wval = (void *)val;
1255 } else {
1256 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1257 if (!wval) {
1258 ret = -ENOMEM;
1259 dev_err(map->dev, "Error in memory allocation\n");
1260 goto out;
1261 }
1262 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1263 map->format.parse_val(wval + i);
1264 }
2e33caf1
AJ
1265 /*
1266 * Some devices does not support bulk write, for
1267 * them we have a series of single write operations.
1268 */
1269 if (map->use_single_rw) {
1270 for (i = 0; i < val_count; i++) {
1271 ret = regmap_raw_write(map,
0d509f2b
MB
1272 reg + (i * map->reg_stride),
1273 val + (i * val_bytes),
1274 val_bytes);
2e33caf1
AJ
1275 if (ret != 0)
1276 return ret;
1277 }
1278 } else {
0d509f2b
MB
1279 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count,
1280 false);
2e33caf1 1281 }
8eaeb219
LD
1282
1283 if (val_bytes != 1)
1284 kfree(wval);
1285
1286out:
0d4529c5 1287 map->unlock(map->lock_arg);
8eaeb219
LD
1288 return ret;
1289}
1290EXPORT_SYMBOL_GPL(regmap_bulk_write);
1291
0d509f2b
MB
1292/**
1293 * regmap_raw_write_async(): Write raw values to one or more registers
1294 * asynchronously
1295 *
1296 * @map: Register map to write to
1297 * @reg: Initial register to write to
1298 * @val: Block of data to be written, laid out for direct transmission to the
1299 * device. Must be valid until regmap_async_complete() is called.
1300 * @val_len: Length of data pointed to by val.
1301 *
1302 * This function is intended to be used for things like firmware
1303 * download where a large block of data needs to be transferred to the
1304 * device. No formatting will be done on the data provided.
1305 *
1306 * If supported by the underlying bus the write will be scheduled
1307 * asynchronously, helping maximise I/O speed on higher speed buses
1308 * like SPI. regmap_async_complete() can be called to ensure that all
1309 * asynchrnous writes have been completed.
1310 *
1311 * A value of zero will be returned on success, a negative errno will
1312 * be returned in error cases.
1313 */
1314int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1315 const void *val, size_t val_len)
1316{
1317 int ret;
1318
1319 if (val_len % map->format.val_bytes)
1320 return -EINVAL;
1321 if (reg % map->reg_stride)
1322 return -EINVAL;
1323
1324 map->lock(map->lock_arg);
1325
1326 ret = _regmap_raw_write(map, reg, val, val_len, true);
1327
1328 map->unlock(map->lock_arg);
1329
1330 return ret;
1331}
1332EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1333
b83a313b
MB
1334static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1335 unsigned int val_len)
1336{
98bc7dfd 1337 struct regmap_range_node *range;
b83a313b
MB
1338 u8 *u8 = map->work_buf;
1339 int ret;
1340
d2a5884a
AS
1341 BUG_ON(!map->bus);
1342
98bc7dfd
MB
1343 range = _regmap_range_lookup(map, reg);
1344 if (range) {
1345 ret = _regmap_select_page(map, &reg, range,
1346 val_len / map->format.val_bytes);
0ff3e62f 1347 if (ret != 0)
98bc7dfd
MB
1348 return ret;
1349 }
6863ca62 1350
d939fb9a 1351 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1352
1353 /*
6f306441 1354 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1355 * register addresss; since it's always the high bits for all
1356 * current formats we can do this here rather than in
1357 * formatting. This may break if we get interesting formats.
1358 */
6f306441 1359 u8[0] |= map->read_flag_mask;
b83a313b 1360
fb2736bb
MB
1361 trace_regmap_hw_read_start(map->dev, reg,
1362 val_len / map->format.val_bytes);
1363
0135bbcc 1364 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1365 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1366 val, val_len);
b83a313b 1367
fb2736bb
MB
1368 trace_regmap_hw_read_done(map->dev, reg,
1369 val_len / map->format.val_bytes);
1370
1371 return ret;
b83a313b
MB
1372}
1373
ad278406
AS
1374static int _regmap_bus_read(void *context, unsigned int reg,
1375 unsigned int *val)
1376{
1377 int ret;
1378 struct regmap *map = context;
1379
1380 if (!map->format.parse_val)
1381 return -EINVAL;
1382
1383 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1384 if (ret == 0)
1385 *val = map->format.parse_val(map->work_buf);
1386
1387 return ret;
1388}
1389
b83a313b
MB
1390static int _regmap_read(struct regmap *map, unsigned int reg,
1391 unsigned int *val)
1392{
1393 int ret;
d2a5884a
AS
1394 void *context = _regmap_map_get_context(map);
1395
ad278406 1396 BUG_ON(!map->reg_read);
b83a313b 1397
5d1729e7
DP
1398 if (!map->cache_bypass) {
1399 ret = regcache_read(map, reg, val);
1400 if (ret == 0)
1401 return 0;
1402 }
1403
1404 if (map->cache_only)
1405 return -EBUSY;
1406
d2a5884a 1407 ret = map->reg_read(context, reg, val);
fb2736bb 1408 if (ret == 0) {
1044c180
MB
1409#ifdef LOG_DEVICE
1410 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1411 dev_info(map->dev, "%x => %x\n", reg, *val);
1412#endif
1413
fb2736bb 1414 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1415
ad278406
AS
1416 if (!map->cache_bypass)
1417 regcache_write(map, reg, *val);
1418 }
f2985367 1419
b83a313b
MB
1420 return ret;
1421}
1422
1423/**
1424 * regmap_read(): Read a value from a single register
1425 *
1426 * @map: Register map to write to
1427 * @reg: Register to be read from
1428 * @val: Pointer to store read value
1429 *
1430 * A value of zero will be returned on success, a negative errno will
1431 * be returned in error cases.
1432 */
1433int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1434{
1435 int ret;
1436
f01ee60f
SW
1437 if (reg % map->reg_stride)
1438 return -EINVAL;
1439
0d4529c5 1440 map->lock(map->lock_arg);
b83a313b
MB
1441
1442 ret = _regmap_read(map, reg, val);
1443
0d4529c5 1444 map->unlock(map->lock_arg);
b83a313b
MB
1445
1446 return ret;
1447}
1448EXPORT_SYMBOL_GPL(regmap_read);
1449
1450/**
1451 * regmap_raw_read(): Read raw data from the device
1452 *
1453 * @map: Register map to write to
1454 * @reg: First register to be read from
1455 * @val: Pointer to store read value
1456 * @val_len: Size of data to read
1457 *
1458 * A value of zero will be returned on success, a negative errno will
1459 * be returned in error cases.
1460 */
1461int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1462 size_t val_len)
1463{
b8fb5ab1
MB
1464 size_t val_bytes = map->format.val_bytes;
1465 size_t val_count = val_len / val_bytes;
1466 unsigned int v;
1467 int ret, i;
04e016ad 1468
d2a5884a
AS
1469 if (!map->bus)
1470 return -EINVAL;
851960ba
SW
1471 if (val_len % map->format.val_bytes)
1472 return -EINVAL;
f01ee60f
SW
1473 if (reg % map->reg_stride)
1474 return -EINVAL;
851960ba 1475
0d4529c5 1476 map->lock(map->lock_arg);
b83a313b 1477
b8fb5ab1
MB
1478 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1479 map->cache_type == REGCACHE_NONE) {
1480 /* Physical block read if there's no cache involved */
1481 ret = _regmap_raw_read(map, reg, val, val_len);
1482
1483 } else {
1484 /* Otherwise go word by word for the cache; should be low
1485 * cost as we expect to hit the cache.
1486 */
1487 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1488 ret = _regmap_read(map, reg + (i * map->reg_stride),
1489 &v);
b8fb5ab1
MB
1490 if (ret != 0)
1491 goto out;
1492
d939fb9a 1493 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1494 }
1495 }
b83a313b 1496
b8fb5ab1 1497 out:
0d4529c5 1498 map->unlock(map->lock_arg);
b83a313b
MB
1499
1500 return ret;
1501}
1502EXPORT_SYMBOL_GPL(regmap_raw_read);
1503
1504/**
1505 * regmap_bulk_read(): Read multiple registers from the device
1506 *
1507 * @map: Register map to write to
1508 * @reg: First register to be read from
1509 * @val: Pointer to store read value, in native register size for device
1510 * @val_count: Number of registers to read
1511 *
1512 * A value of zero will be returned on success, a negative errno will
1513 * be returned in error cases.
1514 */
1515int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1516 size_t val_count)
1517{
1518 int ret, i;
1519 size_t val_bytes = map->format.val_bytes;
82cd9965 1520 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1521
d2a5884a
AS
1522 if (!map->bus)
1523 return -EINVAL;
b83a313b
MB
1524 if (!map->format.parse_val)
1525 return -EINVAL;
f01ee60f
SW
1526 if (reg % map->reg_stride)
1527 return -EINVAL;
b83a313b 1528
de2d808f 1529 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1530 /*
1531 * Some devices does not support bulk read, for
1532 * them we have a series of single read operations.
1533 */
1534 if (map->use_single_rw) {
1535 for (i = 0; i < val_count; i++) {
1536 ret = regmap_raw_read(map,
1537 reg + (i * map->reg_stride),
1538 val + (i * val_bytes),
1539 val_bytes);
1540 if (ret != 0)
1541 return ret;
1542 }
1543 } else {
1544 ret = regmap_raw_read(map, reg, val,
1545 val_bytes * val_count);
1546 if (ret != 0)
1547 return ret;
1548 }
de2d808f
MB
1549
1550 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1551 map->format.parse_val(val + i);
1552 } else {
1553 for (i = 0; i < val_count; i++) {
6560ffd1 1554 unsigned int ival;
f01ee60f 1555 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1556 &ival);
de2d808f
MB
1557 if (ret != 0)
1558 return ret;
6560ffd1 1559 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1560 }
1561 }
b83a313b
MB
1562
1563 return 0;
1564}
1565EXPORT_SYMBOL_GPL(regmap_bulk_read);
1566
018690d3
MB
1567static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1568 unsigned int mask, unsigned int val,
1569 bool *change)
b83a313b
MB
1570{
1571 int ret;
d91e8db2 1572 unsigned int tmp, orig;
b83a313b 1573
d91e8db2 1574 ret = _regmap_read(map, reg, &orig);
b83a313b 1575 if (ret != 0)
fc3ebd78 1576 return ret;
b83a313b 1577
d91e8db2 1578 tmp = orig & ~mask;
b83a313b
MB
1579 tmp |= val & mask;
1580
018690d3 1581 if (tmp != orig) {
d91e8db2 1582 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1583 *change = true;
1584 } else {
1585 *change = false;
1586 }
b83a313b 1587
b83a313b
MB
1588 return ret;
1589}
018690d3
MB
1590
1591/**
1592 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1593 *
1594 * @map: Register map to update
1595 * @reg: Register to update
1596 * @mask: Bitmask to change
1597 * @val: New value for bitmask
1598 *
1599 * Returns zero for success, a negative number on error.
1600 */
1601int regmap_update_bits(struct regmap *map, unsigned int reg,
1602 unsigned int mask, unsigned int val)
1603{
1604 bool change;
fc3ebd78
KG
1605 int ret;
1606
0d4529c5 1607 map->lock(map->lock_arg);
fc3ebd78 1608 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1609 map->unlock(map->lock_arg);
fc3ebd78
KG
1610
1611 return ret;
018690d3 1612}
b83a313b 1613EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1614
018690d3
MB
1615/**
1616 * regmap_update_bits_check: Perform a read/modify/write cycle on the
1617 * register map and report if updated
1618 *
1619 * @map: Register map to update
1620 * @reg: Register to update
1621 * @mask: Bitmask to change
1622 * @val: New value for bitmask
1623 * @change: Boolean indicating if a write was done
1624 *
1625 * Returns zero for success, a negative number on error.
1626 */
1627int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1628 unsigned int mask, unsigned int val,
1629 bool *change)
1630{
fc3ebd78
KG
1631 int ret;
1632
0d4529c5 1633 map->lock(map->lock_arg);
fc3ebd78 1634 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 1635 map->unlock(map->lock_arg);
fc3ebd78 1636 return ret;
018690d3
MB
1637}
1638EXPORT_SYMBOL_GPL(regmap_update_bits_check);
1639
0d509f2b
MB
1640void regmap_async_complete_cb(struct regmap_async *async, int ret)
1641{
1642 struct regmap *map = async->map;
1643 bool wake;
1644
1645 spin_lock(&map->async_lock);
1646
1647 list_del(&async->list);
1648 wake = list_empty(&map->async_list);
1649
1650 if (ret != 0)
1651 map->async_ret = ret;
1652
1653 spin_unlock(&map->async_lock);
1654
1655 schedule_work(&async->cleanup);
1656
1657 if (wake)
1658 wake_up(&map->async_waitq);
1659}
f804fb56 1660EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
1661
1662static int regmap_async_is_done(struct regmap *map)
1663{
1664 unsigned long flags;
1665 int ret;
1666
1667 spin_lock_irqsave(&map->async_lock, flags);
1668 ret = list_empty(&map->async_list);
1669 spin_unlock_irqrestore(&map->async_lock, flags);
1670
1671 return ret;
1672}
1673
1674/**
1675 * regmap_async_complete: Ensure all asynchronous I/O has completed.
1676 *
1677 * @map: Map to operate on.
1678 *
1679 * Blocks until any pending asynchronous I/O has completed. Returns
1680 * an error code for any failed I/O operations.
1681 */
1682int regmap_async_complete(struct regmap *map)
1683{
1684 unsigned long flags;
1685 int ret;
1686
1687 /* Nothing to do with no async support */
1688 if (!map->bus->async_write)
1689 return 0;
1690
1691 wait_event(map->async_waitq, regmap_async_is_done(map));
1692
1693 spin_lock_irqsave(&map->async_lock, flags);
1694 ret = map->async_ret;
1695 map->async_ret = 0;
1696 spin_unlock_irqrestore(&map->async_lock, flags);
1697
1698 return ret;
1699}
f88948ef 1700EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 1701
22f0d90a
MB
1702/**
1703 * regmap_register_patch: Register and apply register updates to be applied
1704 * on device initialistion
1705 *
1706 * @map: Register map to apply updates to.
1707 * @regs: Values to update.
1708 * @num_regs: Number of entries in regs.
1709 *
1710 * Register a set of register updates to be applied to the device
1711 * whenever the device registers are synchronised with the cache and
1712 * apply them immediately. Typically this is used to apply
1713 * corrections to be applied to the device defaults on startup, such
1714 * as the updates some vendors provide to undocumented registers.
1715 */
1716int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
1717 int num_regs)
1718{
1719 int i, ret;
1720 bool bypass;
1721
1722 /* If needed the implementation can be extended to support this */
1723 if (map->patch)
1724 return -EBUSY;
1725
0d4529c5 1726 map->lock(map->lock_arg);
22f0d90a
MB
1727
1728 bypass = map->cache_bypass;
1729
1730 map->cache_bypass = true;
1731
1732 /* Write out first; it's useful to apply even if we fail later. */
1733 for (i = 0; i < num_regs; i++) {
1734 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1735 if (ret != 0) {
1736 dev_err(map->dev, "Failed to write %x = %x: %d\n",
1737 regs[i].reg, regs[i].def, ret);
1738 goto out;
1739 }
1740 }
1741
2a14d7d9 1742 map->patch = kcalloc(num_regs, sizeof(struct reg_default), GFP_KERNEL);
22f0d90a
MB
1743 if (map->patch != NULL) {
1744 memcpy(map->patch, regs,
1745 num_regs * sizeof(struct reg_default));
1746 map->patch_regs = num_regs;
1747 } else {
1748 ret = -ENOMEM;
1749 }
1750
1751out:
1752 map->cache_bypass = bypass;
1753
0d4529c5 1754 map->unlock(map->lock_arg);
22f0d90a
MB
1755
1756 return ret;
1757}
1758EXPORT_SYMBOL_GPL(regmap_register_patch);
1759
eae4b51b 1760/*
a6539c32
MB
1761 * regmap_get_val_bytes(): Report the size of a register value
1762 *
1763 * Report the size of a register value, mainly intended to for use by
1764 * generic infrastructure built on top of regmap.
1765 */
1766int regmap_get_val_bytes(struct regmap *map)
1767{
1768 if (map->format.format_write)
1769 return -EINVAL;
1770
1771 return map->format.val_bytes;
1772}
1773EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
1774
31244e39
MB
1775static int __init regmap_initcall(void)
1776{
1777 regmap_debugfs_initcall();
1778
1779 return 0;
1780}
1781postcore_initcall(regmap_initcall);