regmap: Allow installing custom reg_update_bits function
[linux-2.6-block.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
d647c199 18#include <linux/of.h>
6863ca62 19#include <linux/rbtree.h>
30b2a553 20#include <linux/sched.h>
2de9d600 21#include <linux/delay.h>
b83a313b 22
fb2736bb 23#define CREATE_TRACE_POINTS
f58078da 24#include "trace.h"
fb2736bb 25
93de9124 26#include "internal.h"
b83a313b 27
1044c180
MB
28/*
29 * Sometimes for failures during very early init the trace
30 * infrastructure isn't available early enough to be used. For this
31 * sort of problem defining LOG_DEVICE will add printks for basic
32 * register I/O on a specific device.
33 */
34#undef LOG_DEVICE
35
36static int _regmap_update_bits(struct regmap *map, unsigned int reg,
37 unsigned int mask, unsigned int val,
7ff0589c 38 bool *change, bool force_write);
1044c180 39
3ac17037
BB
40static int _regmap_bus_reg_read(void *context, unsigned int reg,
41 unsigned int *val);
ad278406
AS
42static int _regmap_bus_read(void *context, unsigned int reg,
43 unsigned int *val);
07c320dc
AS
44static int _regmap_bus_formatted_write(void *context, unsigned int reg,
45 unsigned int val);
3ac17037
BB
46static int _regmap_bus_reg_write(void *context, unsigned int reg,
47 unsigned int val);
07c320dc
AS
48static int _regmap_bus_raw_write(void *context, unsigned int reg,
49 unsigned int val);
ad278406 50
76aad392
DC
51bool regmap_reg_in_ranges(unsigned int reg,
52 const struct regmap_range *ranges,
53 unsigned int nranges)
54{
55 const struct regmap_range *r;
56 int i;
57
58 for (i = 0, r = ranges; i < nranges; i++, r++)
59 if (regmap_reg_in_range(reg, r))
60 return true;
61 return false;
62}
63EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
64
154881e5
MB
65bool regmap_check_range_table(struct regmap *map, unsigned int reg,
66 const struct regmap_access_table *table)
76aad392
DC
67{
68 /* Check "no ranges" first */
69 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
70 return false;
71
72 /* In case zero "yes ranges" are supplied, any reg is OK */
73 if (!table->n_yes_ranges)
74 return true;
75
76 return regmap_reg_in_ranges(reg, table->yes_ranges,
77 table->n_yes_ranges);
78}
154881e5 79EXPORT_SYMBOL_GPL(regmap_check_range_table);
76aad392 80
8de2f081
MB
81bool regmap_writeable(struct regmap *map, unsigned int reg)
82{
83 if (map->max_register && reg > map->max_register)
84 return false;
85
86 if (map->writeable_reg)
87 return map->writeable_reg(map->dev, reg);
88
76aad392 89 if (map->wr_table)
154881e5 90 return regmap_check_range_table(map, reg, map->wr_table);
76aad392 91
8de2f081
MB
92 return true;
93}
94
95bool regmap_readable(struct regmap *map, unsigned int reg)
96{
04dc91ce
LPC
97 if (!map->reg_read)
98 return false;
99
8de2f081
MB
100 if (map->max_register && reg > map->max_register)
101 return false;
102
4191f197
WS
103 if (map->format.format_write)
104 return false;
105
8de2f081
MB
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
108
76aad392 109 if (map->rd_table)
154881e5 110 return regmap_check_range_table(map, reg, map->rd_table);
76aad392 111
8de2f081
MB
112 return true;
113}
114
115bool regmap_volatile(struct regmap *map, unsigned int reg)
116{
5844a8b9 117 if (!map->format.format_write && !regmap_readable(map, reg))
8de2f081
MB
118 return false;
119
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
122
76aad392 123 if (map->volatile_table)
154881e5 124 return regmap_check_range_table(map, reg, map->volatile_table);
76aad392 125
b92be6fe
MB
126 if (map->cache_ops)
127 return false;
128 else
129 return true;
8de2f081
MB
130}
131
132bool regmap_precious(struct regmap *map, unsigned int reg)
133{
4191f197 134 if (!regmap_readable(map, reg))
8de2f081
MB
135 return false;
136
137 if (map->precious_reg)
138 return map->precious_reg(map->dev, reg);
139
76aad392 140 if (map->precious_table)
154881e5 141 return regmap_check_range_table(map, reg, map->precious_table);
76aad392 142
8de2f081
MB
143 return false;
144}
145
82cd9965 146static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 147 size_t num)
82cd9965
LPC
148{
149 unsigned int i;
150
151 for (i = 0; i < num; i++)
152 if (!regmap_volatile(map, reg + i))
153 return false;
154
155 return true;
156}
157
9aa50750
WS
158static void regmap_format_2_6_write(struct regmap *map,
159 unsigned int reg, unsigned int val)
160{
161 u8 *out = map->work_buf;
162
163 *out = (reg << 6) | val;
164}
165
b83a313b
MB
166static void regmap_format_4_12_write(struct regmap *map,
167 unsigned int reg, unsigned int val)
168{
169 __be16 *out = map->work_buf;
170 *out = cpu_to_be16((reg << 12) | val);
171}
172
173static void regmap_format_7_9_write(struct regmap *map,
174 unsigned int reg, unsigned int val)
175{
176 __be16 *out = map->work_buf;
177 *out = cpu_to_be16((reg << 9) | val);
178}
179
7e5ec63e
LPC
180static void regmap_format_10_14_write(struct regmap *map,
181 unsigned int reg, unsigned int val)
182{
183 u8 *out = map->work_buf;
184
185 out[2] = val;
186 out[1] = (val >> 8) | (reg << 6);
187 out[0] = reg >> 2;
188}
189
d939fb9a 190static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
191{
192 u8 *b = buf;
193
d939fb9a 194 b[0] = val << shift;
b83a313b
MB
195}
196
141eba2e 197static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
MB
198{
199 __be16 *b = buf;
200
d939fb9a 201 b[0] = cpu_to_be16(val << shift);
b83a313b
MB
202}
203
4aa8c069
XL
204static void regmap_format_16_le(void *buf, unsigned int val, unsigned int shift)
205{
206 __le16 *b = buf;
207
208 b[0] = cpu_to_le16(val << shift);
209}
210
141eba2e
SW
211static void regmap_format_16_native(void *buf, unsigned int val,
212 unsigned int shift)
213{
214 *(u16 *)buf = val << shift;
215}
216
d939fb9a 217static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
218{
219 u8 *b = buf;
220
d939fb9a
MR
221 val <<= shift;
222
ea279fc5
MR
223 b[0] = val >> 16;
224 b[1] = val >> 8;
225 b[2] = val;
226}
227
141eba2e 228static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
229{
230 __be32 *b = buf;
231
d939fb9a 232 b[0] = cpu_to_be32(val << shift);
7d5e525b
MB
233}
234
4aa8c069
XL
235static void regmap_format_32_le(void *buf, unsigned int val, unsigned int shift)
236{
237 __le32 *b = buf;
238
239 b[0] = cpu_to_le32(val << shift);
240}
241
141eba2e
SW
242static void regmap_format_32_native(void *buf, unsigned int val,
243 unsigned int shift)
244{
245 *(u32 *)buf = val << shift;
246}
247
8a819ff8 248static void regmap_parse_inplace_noop(void *buf)
b83a313b 249{
8a819ff8
MB
250}
251
252static unsigned int regmap_parse_8(const void *buf)
253{
254 const u8 *b = buf;
b83a313b
MB
255
256 return b[0];
257}
258
8a819ff8
MB
259static unsigned int regmap_parse_16_be(const void *buf)
260{
261 const __be16 *b = buf;
262
263 return be16_to_cpu(b[0]);
264}
265
4aa8c069
XL
266static unsigned int regmap_parse_16_le(const void *buf)
267{
268 const __le16 *b = buf;
269
270 return le16_to_cpu(b[0]);
271}
272
8a819ff8 273static void regmap_parse_16_be_inplace(void *buf)
b83a313b
MB
274{
275 __be16 *b = buf;
276
277 b[0] = be16_to_cpu(b[0]);
b83a313b
MB
278}
279
4aa8c069
XL
280static void regmap_parse_16_le_inplace(void *buf)
281{
282 __le16 *b = buf;
283
284 b[0] = le16_to_cpu(b[0]);
285}
286
8a819ff8 287static unsigned int regmap_parse_16_native(const void *buf)
141eba2e
SW
288{
289 return *(u16 *)buf;
290}
291
8a819ff8 292static unsigned int regmap_parse_24(const void *buf)
ea279fc5 293{
8a819ff8 294 const u8 *b = buf;
ea279fc5
MR
295 unsigned int ret = b[2];
296 ret |= ((unsigned int)b[1]) << 8;
297 ret |= ((unsigned int)b[0]) << 16;
298
299 return ret;
300}
301
8a819ff8
MB
302static unsigned int regmap_parse_32_be(const void *buf)
303{
304 const __be32 *b = buf;
305
306 return be32_to_cpu(b[0]);
307}
308
4aa8c069
XL
309static unsigned int regmap_parse_32_le(const void *buf)
310{
311 const __le32 *b = buf;
312
313 return le32_to_cpu(b[0]);
314}
315
8a819ff8 316static void regmap_parse_32_be_inplace(void *buf)
7d5e525b
MB
317{
318 __be32 *b = buf;
319
320 b[0] = be32_to_cpu(b[0]);
7d5e525b
MB
321}
322
4aa8c069
XL
323static void regmap_parse_32_le_inplace(void *buf)
324{
325 __le32 *b = buf;
326
327 b[0] = le32_to_cpu(b[0]);
328}
329
8a819ff8 330static unsigned int regmap_parse_32_native(const void *buf)
141eba2e
SW
331{
332 return *(u32 *)buf;
333}
334
0d4529c5 335static void regmap_lock_mutex(void *__map)
bacdbe07 336{
0d4529c5 337 struct regmap *map = __map;
bacdbe07
SW
338 mutex_lock(&map->mutex);
339}
340
0d4529c5 341static void regmap_unlock_mutex(void *__map)
bacdbe07 342{
0d4529c5 343 struct regmap *map = __map;
bacdbe07
SW
344 mutex_unlock(&map->mutex);
345}
346
0d4529c5 347static void regmap_lock_spinlock(void *__map)
b4519c71 348__acquires(&map->spinlock)
bacdbe07 349{
0d4529c5 350 struct regmap *map = __map;
92ab1aab
LPC
351 unsigned long flags;
352
353 spin_lock_irqsave(&map->spinlock, flags);
354 map->spinlock_flags = flags;
bacdbe07
SW
355}
356
0d4529c5 357static void regmap_unlock_spinlock(void *__map)
b4519c71 358__releases(&map->spinlock)
bacdbe07 359{
0d4529c5 360 struct regmap *map = __map;
92ab1aab 361 spin_unlock_irqrestore(&map->spinlock, map->spinlock_flags);
bacdbe07
SW
362}
363
72b39f6f
MB
364static void dev_get_regmap_release(struct device *dev, void *res)
365{
366 /*
367 * We don't actually have anything to do here; the goal here
368 * is not to manage the regmap but to provide a simple way to
369 * get the regmap back given a struct device.
370 */
371}
372
6863ca62
KG
373static bool _regmap_range_add(struct regmap *map,
374 struct regmap_range_node *data)
375{
376 struct rb_root *root = &map->range_tree;
377 struct rb_node **new = &(root->rb_node), *parent = NULL;
378
379 while (*new) {
380 struct regmap_range_node *this =
381 container_of(*new, struct regmap_range_node, node);
382
383 parent = *new;
384 if (data->range_max < this->range_min)
385 new = &((*new)->rb_left);
386 else if (data->range_min > this->range_max)
387 new = &((*new)->rb_right);
388 else
389 return false;
390 }
391
392 rb_link_node(&data->node, parent, new);
393 rb_insert_color(&data->node, root);
394
395 return true;
396}
397
398static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
399 unsigned int reg)
400{
401 struct rb_node *node = map->range_tree.rb_node;
402
403 while (node) {
404 struct regmap_range_node *this =
405 container_of(node, struct regmap_range_node, node);
406
407 if (reg < this->range_min)
408 node = node->rb_left;
409 else if (reg > this->range_max)
410 node = node->rb_right;
411 else
412 return this;
413 }
414
415 return NULL;
416}
417
418static void regmap_range_exit(struct regmap *map)
419{
420 struct rb_node *next;
421 struct regmap_range_node *range_node;
422
423 next = rb_first(&map->range_tree);
424 while (next) {
425 range_node = rb_entry(next, struct regmap_range_node, node);
426 next = rb_next(&range_node->node);
427 rb_erase(&range_node->node, &map->range_tree);
428 kfree(range_node);
429 }
430
431 kfree(map->selector_work_buf);
432}
433
6cfec04b
MS
434int regmap_attach_dev(struct device *dev, struct regmap *map,
435 const struct regmap_config *config)
436{
437 struct regmap **m;
438
439 map->dev = dev;
440
441 regmap_debugfs_init(map, config->name);
442
443 /* Add a devres resource for dev_get_regmap() */
444 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
445 if (!m) {
446 regmap_debugfs_exit(map);
447 return -ENOMEM;
448 }
449 *m = map;
450 devres_add(dev, m);
451
452 return 0;
453}
454EXPORT_SYMBOL_GPL(regmap_attach_dev);
455
cf673fbc
GU
456static enum regmap_endian regmap_get_reg_endian(const struct regmap_bus *bus,
457 const struct regmap_config *config)
458{
459 enum regmap_endian endian;
460
461 /* Retrieve the endianness specification from the regmap config */
462 endian = config->reg_format_endian;
463
464 /* If the regmap config specified a non-default value, use that */
465 if (endian != REGMAP_ENDIAN_DEFAULT)
466 return endian;
467
468 /* Retrieve the endianness specification from the bus config */
469 if (bus && bus->reg_format_endian_default)
470 endian = bus->reg_format_endian_default;
d647c199 471
cf673fbc
GU
472 /* If the bus specified a non-default value, use that */
473 if (endian != REGMAP_ENDIAN_DEFAULT)
474 return endian;
475
476 /* Use this if no other value was found */
477 return REGMAP_ENDIAN_BIG;
478}
479
3c174d29
GR
480enum regmap_endian regmap_get_val_endian(struct device *dev,
481 const struct regmap_bus *bus,
482 const struct regmap_config *config)
d647c199 483{
6e64b6cc 484 struct device_node *np;
cf673fbc 485 enum regmap_endian endian;
d647c199 486
45e1a279 487 /* Retrieve the endianness specification from the regmap config */
cf673fbc 488 endian = config->val_format_endian;
d647c199 489
45e1a279 490 /* If the regmap config specified a non-default value, use that */
cf673fbc
GU
491 if (endian != REGMAP_ENDIAN_DEFAULT)
492 return endian;
d647c199 493
6e64b6cc
PD
494 /* If the dev and dev->of_node exist try to get endianness from DT */
495 if (dev && dev->of_node) {
496 np = dev->of_node;
d647c199 497
6e64b6cc
PD
498 /* Parse the device's DT node for an endianness specification */
499 if (of_property_read_bool(np, "big-endian"))
500 endian = REGMAP_ENDIAN_BIG;
501 else if (of_property_read_bool(np, "little-endian"))
502 endian = REGMAP_ENDIAN_LITTLE;
503
504 /* If the endianness was specified in DT, use that */
505 if (endian != REGMAP_ENDIAN_DEFAULT)
506 return endian;
507 }
45e1a279
SW
508
509 /* Retrieve the endianness specification from the bus config */
cf673fbc
GU
510 if (bus && bus->val_format_endian_default)
511 endian = bus->val_format_endian_default;
d647c199 512
45e1a279 513 /* If the bus specified a non-default value, use that */
cf673fbc
GU
514 if (endian != REGMAP_ENDIAN_DEFAULT)
515 return endian;
45e1a279
SW
516
517 /* Use this if no other value was found */
cf673fbc 518 return REGMAP_ENDIAN_BIG;
d647c199 519}
3c174d29 520EXPORT_SYMBOL_GPL(regmap_get_val_endian);
d647c199 521
3cfe7a74
NB
522struct regmap *__regmap_init(struct device *dev,
523 const struct regmap_bus *bus,
524 void *bus_context,
525 const struct regmap_config *config,
526 struct lock_class_key *lock_key,
527 const char *lock_name)
b83a313b 528{
6cfec04b 529 struct regmap *map;
b83a313b 530 int ret = -EINVAL;
141eba2e 531 enum regmap_endian reg_endian, val_endian;
6863ca62 532 int i, j;
b83a313b 533
d2a5884a 534 if (!config)
abbb18fb 535 goto err;
b83a313b
MB
536
537 map = kzalloc(sizeof(*map), GFP_KERNEL);
538 if (map == NULL) {
539 ret = -ENOMEM;
540 goto err;
541 }
542
0d4529c5
DC
543 if (config->lock && config->unlock) {
544 map->lock = config->lock;
545 map->unlock = config->unlock;
546 map->lock_arg = config->lock_arg;
bacdbe07 547 } else {
d2a5884a
AS
548 if ((bus && bus->fast_io) ||
549 config->fast_io) {
0d4529c5
DC
550 spin_lock_init(&map->spinlock);
551 map->lock = regmap_lock_spinlock;
552 map->unlock = regmap_unlock_spinlock;
3cfe7a74
NB
553 lockdep_set_class_and_name(&map->spinlock,
554 lock_key, lock_name);
0d4529c5
DC
555 } else {
556 mutex_init(&map->mutex);
557 map->lock = regmap_lock_mutex;
558 map->unlock = regmap_unlock_mutex;
3cfe7a74
NB
559 lockdep_set_class_and_name(&map->mutex,
560 lock_key, lock_name);
0d4529c5
DC
561 }
562 map->lock_arg = map;
bacdbe07 563 }
c212accc 564 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 565 map->format.pad_bytes = config->pad_bits / 8;
c212accc 566 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
567 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
568 config->val_bits + config->pad_bits, 8);
d939fb9a 569 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
570 if (config->reg_stride)
571 map->reg_stride = config->reg_stride;
572 else
573 map->reg_stride = 1;
67921a1a
MP
574 map->use_single_read = config->use_single_rw || !bus || !bus->read;
575 map->use_single_write = config->use_single_rw || !bus || !bus->write;
9c9f7f67 576 map->can_multi_write = config->can_multi_write && bus && bus->write;
17649c90
SS
577 if (bus) {
578 map->max_raw_read = bus->max_raw_read;
579 map->max_raw_write = bus->max_raw_write;
580 }
b83a313b
MB
581 map->dev = dev;
582 map->bus = bus;
0135bbcc 583 map->bus_context = bus_context;
2e2ae66d 584 map->max_register = config->max_register;
76aad392
DC
585 map->wr_table = config->wr_table;
586 map->rd_table = config->rd_table;
587 map->volatile_table = config->volatile_table;
588 map->precious_table = config->precious_table;
2e2ae66d
MB
589 map->writeable_reg = config->writeable_reg;
590 map->readable_reg = config->readable_reg;
591 map->volatile_reg = config->volatile_reg;
2efe1642 592 map->precious_reg = config->precious_reg;
5d1729e7 593 map->cache_type = config->cache_type;
72b39f6f 594 map->name = config->name;
b83a313b 595
0d509f2b
MB
596 spin_lock_init(&map->async_lock);
597 INIT_LIST_HEAD(&map->async_list);
7e09a979 598 INIT_LIST_HEAD(&map->async_free);
0d509f2b
MB
599 init_waitqueue_head(&map->async_waitq);
600
6f306441
LPC
601 if (config->read_flag_mask || config->write_flag_mask) {
602 map->read_flag_mask = config->read_flag_mask;
603 map->write_flag_mask = config->write_flag_mask;
d2a5884a 604 } else if (bus) {
6f306441
LPC
605 map->read_flag_mask = bus->read_flag_mask;
606 }
607
d2a5884a
AS
608 if (!bus) {
609 map->reg_read = config->reg_read;
610 map->reg_write = config->reg_write;
611
3ac17037
BB
612 map->defer_caching = false;
613 goto skip_format_initialization;
614 } else if (!bus->read || !bus->write) {
615 map->reg_read = _regmap_bus_reg_read;
616 map->reg_write = _regmap_bus_reg_write;
617
d2a5884a
AS
618 map->defer_caching = false;
619 goto skip_format_initialization;
620 } else {
621 map->reg_read = _regmap_bus_read;
7741c373 622 map->reg_update_bits = bus->reg_update_bits;
d2a5884a 623 }
ad278406 624
cf673fbc
GU
625 reg_endian = regmap_get_reg_endian(bus, config);
626 val_endian = regmap_get_val_endian(dev, bus, config);
141eba2e 627
d939fb9a 628 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
629 case 2:
630 switch (config->val_bits) {
631 case 6:
632 map->format.format_write = regmap_format_2_6_write;
633 break;
634 default:
635 goto err_map;
636 }
637 break;
638
b83a313b
MB
639 case 4:
640 switch (config->val_bits) {
641 case 12:
642 map->format.format_write = regmap_format_4_12_write;
643 break;
644 default:
645 goto err_map;
646 }
647 break;
648
649 case 7:
650 switch (config->val_bits) {
651 case 9:
652 map->format.format_write = regmap_format_7_9_write;
653 break;
654 default:
655 goto err_map;
656 }
657 break;
658
7e5ec63e
LPC
659 case 10:
660 switch (config->val_bits) {
661 case 14:
662 map->format.format_write = regmap_format_10_14_write;
663 break;
664 default:
665 goto err_map;
666 }
667 break;
668
b83a313b
MB
669 case 8:
670 map->format.format_reg = regmap_format_8;
671 break;
672
673 case 16:
141eba2e
SW
674 switch (reg_endian) {
675 case REGMAP_ENDIAN_BIG:
676 map->format.format_reg = regmap_format_16_be;
677 break;
678 case REGMAP_ENDIAN_NATIVE:
679 map->format.format_reg = regmap_format_16_native;
680 break;
681 default:
682 goto err_map;
683 }
b83a313b
MB
684 break;
685
237019e7
LPC
686 case 24:
687 if (reg_endian != REGMAP_ENDIAN_BIG)
688 goto err_map;
689 map->format.format_reg = regmap_format_24;
690 break;
691
7d5e525b 692 case 32:
141eba2e
SW
693 switch (reg_endian) {
694 case REGMAP_ENDIAN_BIG:
695 map->format.format_reg = regmap_format_32_be;
696 break;
697 case REGMAP_ENDIAN_NATIVE:
698 map->format.format_reg = regmap_format_32_native;
699 break;
700 default:
701 goto err_map;
702 }
7d5e525b
MB
703 break;
704
b83a313b
MB
705 default:
706 goto err_map;
707 }
708
8a819ff8
MB
709 if (val_endian == REGMAP_ENDIAN_NATIVE)
710 map->format.parse_inplace = regmap_parse_inplace_noop;
711
b83a313b
MB
712 switch (config->val_bits) {
713 case 8:
714 map->format.format_val = regmap_format_8;
715 map->format.parse_val = regmap_parse_8;
8a819ff8 716 map->format.parse_inplace = regmap_parse_inplace_noop;
b83a313b
MB
717 break;
718 case 16:
141eba2e
SW
719 switch (val_endian) {
720 case REGMAP_ENDIAN_BIG:
721 map->format.format_val = regmap_format_16_be;
722 map->format.parse_val = regmap_parse_16_be;
8a819ff8 723 map->format.parse_inplace = regmap_parse_16_be_inplace;
141eba2e 724 break;
4aa8c069
XL
725 case REGMAP_ENDIAN_LITTLE:
726 map->format.format_val = regmap_format_16_le;
727 map->format.parse_val = regmap_parse_16_le;
728 map->format.parse_inplace = regmap_parse_16_le_inplace;
729 break;
141eba2e
SW
730 case REGMAP_ENDIAN_NATIVE:
731 map->format.format_val = regmap_format_16_native;
732 map->format.parse_val = regmap_parse_16_native;
733 break;
734 default:
735 goto err_map;
736 }
b83a313b 737 break;
ea279fc5 738 case 24:
141eba2e
SW
739 if (val_endian != REGMAP_ENDIAN_BIG)
740 goto err_map;
ea279fc5
MR
741 map->format.format_val = regmap_format_24;
742 map->format.parse_val = regmap_parse_24;
743 break;
7d5e525b 744 case 32:
141eba2e
SW
745 switch (val_endian) {
746 case REGMAP_ENDIAN_BIG:
747 map->format.format_val = regmap_format_32_be;
748 map->format.parse_val = regmap_parse_32_be;
8a819ff8 749 map->format.parse_inplace = regmap_parse_32_be_inplace;
141eba2e 750 break;
4aa8c069
XL
751 case REGMAP_ENDIAN_LITTLE:
752 map->format.format_val = regmap_format_32_le;
753 map->format.parse_val = regmap_parse_32_le;
754 map->format.parse_inplace = regmap_parse_32_le_inplace;
755 break;
141eba2e
SW
756 case REGMAP_ENDIAN_NATIVE:
757 map->format.format_val = regmap_format_32_native;
758 map->format.parse_val = regmap_parse_32_native;
759 break;
760 default:
761 goto err_map;
762 }
7d5e525b 763 break;
b83a313b
MB
764 }
765
141eba2e
SW
766 if (map->format.format_write) {
767 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
768 (val_endian != REGMAP_ENDIAN_BIG))
769 goto err_map;
67921a1a 770 map->use_single_write = true;
141eba2e 771 }
7a647614 772
b83a313b
MB
773 if (!map->format.format_write &&
774 !(map->format.format_reg && map->format.format_val))
775 goto err_map;
776
82159ba8 777 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
778 if (map->work_buf == NULL) {
779 ret = -ENOMEM;
5204f5e3 780 goto err_map;
b83a313b
MB
781 }
782
d2a5884a
AS
783 if (map->format.format_write) {
784 map->defer_caching = false;
07c320dc 785 map->reg_write = _regmap_bus_formatted_write;
d2a5884a
AS
786 } else if (map->format.format_val) {
787 map->defer_caching = true;
07c320dc 788 map->reg_write = _regmap_bus_raw_write;
d2a5884a
AS
789 }
790
791skip_format_initialization:
07c320dc 792
6863ca62 793 map->range_tree = RB_ROOT;
e3549cd0 794 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
795 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
796 struct regmap_range_node *new;
797
798 /* Sanity check */
061adc06
MB
799 if (range_cfg->range_max < range_cfg->range_min) {
800 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
801 range_cfg->range_max, range_cfg->range_min);
6863ca62 802 goto err_range;
061adc06
MB
803 }
804
805 if (range_cfg->range_max > map->max_register) {
806 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
807 range_cfg->range_max, map->max_register);
808 goto err_range;
809 }
810
811 if (range_cfg->selector_reg > map->max_register) {
812 dev_err(map->dev,
813 "Invalid range %d: selector out of map\n", i);
814 goto err_range;
815 }
816
817 if (range_cfg->window_len == 0) {
818 dev_err(map->dev, "Invalid range %d: window_len 0\n",
819 i);
820 goto err_range;
821 }
6863ca62
KG
822
823 /* Make sure, that this register range has no selector
824 or data window within its boundary */
e3549cd0 825 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
826 unsigned sel_reg = config->ranges[j].selector_reg;
827 unsigned win_min = config->ranges[j].window_start;
828 unsigned win_max = win_min +
829 config->ranges[j].window_len - 1;
830
f161d220
PZ
831 /* Allow data window inside its own virtual range */
832 if (j == i)
833 continue;
834
6863ca62
KG
835 if (range_cfg->range_min <= sel_reg &&
836 sel_reg <= range_cfg->range_max) {
061adc06
MB
837 dev_err(map->dev,
838 "Range %d: selector for %d in window\n",
839 i, j);
6863ca62
KG
840 goto err_range;
841 }
842
843 if (!(win_max < range_cfg->range_min ||
844 win_min > range_cfg->range_max)) {
061adc06
MB
845 dev_err(map->dev,
846 "Range %d: window for %d in window\n",
847 i, j);
6863ca62
KG
848 goto err_range;
849 }
850 }
851
852 new = kzalloc(sizeof(*new), GFP_KERNEL);
853 if (new == NULL) {
854 ret = -ENOMEM;
855 goto err_range;
856 }
857
4b020b3f 858 new->map = map;
d058bb49 859 new->name = range_cfg->name;
6863ca62
KG
860 new->range_min = range_cfg->range_min;
861 new->range_max = range_cfg->range_max;
862 new->selector_reg = range_cfg->selector_reg;
863 new->selector_mask = range_cfg->selector_mask;
864 new->selector_shift = range_cfg->selector_shift;
865 new->window_start = range_cfg->window_start;
866 new->window_len = range_cfg->window_len;
867
53e87f88 868 if (!_regmap_range_add(map, new)) {
061adc06 869 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
870 kfree(new);
871 goto err_range;
872 }
873
874 if (map->selector_work_buf == NULL) {
875 map->selector_work_buf =
876 kzalloc(map->format.buf_size, GFP_KERNEL);
877 if (map->selector_work_buf == NULL) {
878 ret = -ENOMEM;
879 goto err_range;
880 }
881 }
882 }
052d2cd1 883
e5e3b8ab 884 ret = regcache_init(map, config);
0ff3e62f 885 if (ret != 0)
6863ca62
KG
886 goto err_range;
887
a7a037c8 888 if (dev) {
6cfec04b
MS
889 ret = regmap_attach_dev(dev, map, config);
890 if (ret != 0)
891 goto err_regcache;
a7a037c8 892 }
72b39f6f 893
b83a313b
MB
894 return map;
895
6cfec04b 896err_regcache:
72b39f6f 897 regcache_exit(map);
6863ca62
KG
898err_range:
899 regmap_range_exit(map);
58072cbf 900 kfree(map->work_buf);
b83a313b
MB
901err_map:
902 kfree(map);
903err:
904 return ERR_PTR(ret);
905}
3cfe7a74 906EXPORT_SYMBOL_GPL(__regmap_init);
b83a313b 907
c0eb4676
MB
908static void devm_regmap_release(struct device *dev, void *res)
909{
910 regmap_exit(*(struct regmap **)res);
911}
912
3cfe7a74
NB
913struct regmap *__devm_regmap_init(struct device *dev,
914 const struct regmap_bus *bus,
915 void *bus_context,
916 const struct regmap_config *config,
917 struct lock_class_key *lock_key,
918 const char *lock_name)
c0eb4676
MB
919{
920 struct regmap **ptr, *regmap;
921
922 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
923 if (!ptr)
924 return ERR_PTR(-ENOMEM);
925
3cfe7a74
NB
926 regmap = __regmap_init(dev, bus, bus_context, config,
927 lock_key, lock_name);
c0eb4676
MB
928 if (!IS_ERR(regmap)) {
929 *ptr = regmap;
930 devres_add(dev, ptr);
931 } else {
932 devres_free(ptr);
933 }
934
935 return regmap;
936}
3cfe7a74 937EXPORT_SYMBOL_GPL(__devm_regmap_init);
c0eb4676 938
67252287
SK
939static void regmap_field_init(struct regmap_field *rm_field,
940 struct regmap *regmap, struct reg_field reg_field)
941{
67252287
SK
942 rm_field->regmap = regmap;
943 rm_field->reg = reg_field.reg;
944 rm_field->shift = reg_field.lsb;
921cc294 945 rm_field->mask = GENMASK(reg_field.msb, reg_field.lsb);
a0102375
KM
946 rm_field->id_size = reg_field.id_size;
947 rm_field->id_offset = reg_field.id_offset;
67252287
SK
948}
949
950/**
951 * devm_regmap_field_alloc(): Allocate and initialise a register field
952 * in a register map.
953 *
954 * @dev: Device that will be interacted with
955 * @regmap: regmap bank in which this register field is located.
956 * @reg_field: Register field with in the bank.
957 *
958 * The return value will be an ERR_PTR() on error or a valid pointer
959 * to a struct regmap_field. The regmap_field will be automatically freed
960 * by the device management code.
961 */
962struct regmap_field *devm_regmap_field_alloc(struct device *dev,
963 struct regmap *regmap, struct reg_field reg_field)
964{
965 struct regmap_field *rm_field = devm_kzalloc(dev,
966 sizeof(*rm_field), GFP_KERNEL);
967 if (!rm_field)
968 return ERR_PTR(-ENOMEM);
969
970 regmap_field_init(rm_field, regmap, reg_field);
971
972 return rm_field;
973
974}
975EXPORT_SYMBOL_GPL(devm_regmap_field_alloc);
976
977/**
978 * devm_regmap_field_free(): Free register field allocated using
979 * devm_regmap_field_alloc. Usally drivers need not call this function,
980 * as the memory allocated via devm will be freed as per device-driver
981 * life-cyle.
982 *
983 * @dev: Device that will be interacted with
984 * @field: regmap field which should be freed.
985 */
986void devm_regmap_field_free(struct device *dev,
987 struct regmap_field *field)
988{
989 devm_kfree(dev, field);
990}
991EXPORT_SYMBOL_GPL(devm_regmap_field_free);
992
993/**
994 * regmap_field_alloc(): Allocate and initialise a register field
995 * in a register map.
996 *
997 * @regmap: regmap bank in which this register field is located.
998 * @reg_field: Register field with in the bank.
999 *
1000 * The return value will be an ERR_PTR() on error or a valid pointer
1001 * to a struct regmap_field. The regmap_field should be freed by the
1002 * user once its finished working with it using regmap_field_free().
1003 */
1004struct regmap_field *regmap_field_alloc(struct regmap *regmap,
1005 struct reg_field reg_field)
1006{
1007 struct regmap_field *rm_field = kzalloc(sizeof(*rm_field), GFP_KERNEL);
1008
1009 if (!rm_field)
1010 return ERR_PTR(-ENOMEM);
1011
1012 regmap_field_init(rm_field, regmap, reg_field);
1013
1014 return rm_field;
1015}
1016EXPORT_SYMBOL_GPL(regmap_field_alloc);
1017
1018/**
1019 * regmap_field_free(): Free register field allocated using regmap_field_alloc
1020 *
1021 * @field: regmap field which should be freed.
1022 */
1023void regmap_field_free(struct regmap_field *field)
1024{
1025 kfree(field);
1026}
1027EXPORT_SYMBOL_GPL(regmap_field_free);
1028
bf315173
MB
1029/**
1030 * regmap_reinit_cache(): Reinitialise the current register cache
1031 *
1032 * @map: Register map to operate on.
1033 * @config: New configuration. Only the cache data will be used.
1034 *
1035 * Discard any existing register cache for the map and initialize a
1036 * new cache. This can be used to restore the cache to defaults or to
1037 * update the cache configuration to reflect runtime discovery of the
1038 * hardware.
4d879514
DP
1039 *
1040 * No explicit locking is done here, the user needs to ensure that
1041 * this function will not race with other calls to regmap.
bf315173
MB
1042 */
1043int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
1044{
bf315173 1045 regcache_exit(map);
a24f64a6 1046 regmap_debugfs_exit(map);
bf315173
MB
1047
1048 map->max_register = config->max_register;
1049 map->writeable_reg = config->writeable_reg;
1050 map->readable_reg = config->readable_reg;
1051 map->volatile_reg = config->volatile_reg;
1052 map->precious_reg = config->precious_reg;
1053 map->cache_type = config->cache_type;
1054
d3c242e1 1055 regmap_debugfs_init(map, config->name);
a24f64a6 1056
421e8d2d
MB
1057 map->cache_bypass = false;
1058 map->cache_only = false;
1059
4d879514 1060 return regcache_init(map, config);
bf315173 1061}
752a6a5f 1062EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 1063
b83a313b
MB
1064/**
1065 * regmap_exit(): Free a previously allocated register map
1066 */
1067void regmap_exit(struct regmap *map)
1068{
7e09a979
MB
1069 struct regmap_async *async;
1070
5d1729e7 1071 regcache_exit(map);
31244e39 1072 regmap_debugfs_exit(map);
6863ca62 1073 regmap_range_exit(map);
d2a5884a 1074 if (map->bus && map->bus->free_context)
0135bbcc 1075 map->bus->free_context(map->bus_context);
b83a313b 1076 kfree(map->work_buf);
7e09a979
MB
1077 while (!list_empty(&map->async_free)) {
1078 async = list_first_entry_or_null(&map->async_free,
1079 struct regmap_async,
1080 list);
1081 list_del(&async->list);
1082 kfree(async->work_buf);
1083 kfree(async);
1084 }
b83a313b
MB
1085 kfree(map);
1086}
1087EXPORT_SYMBOL_GPL(regmap_exit);
1088
72b39f6f
MB
1089static int dev_get_regmap_match(struct device *dev, void *res, void *data)
1090{
1091 struct regmap **r = res;
1092 if (!r || !*r) {
1093 WARN_ON(!r || !*r);
1094 return 0;
1095 }
1096
1097 /* If the user didn't specify a name match any */
1098 if (data)
1099 return (*r)->name == data;
1100 else
1101 return 1;
1102}
1103
1104/**
1105 * dev_get_regmap(): Obtain the regmap (if any) for a device
1106 *
1107 * @dev: Device to retrieve the map for
1108 * @name: Optional name for the register map, usually NULL.
1109 *
1110 * Returns the regmap for the device if one is present, or NULL. If
1111 * name is specified then it must match the name specified when
1112 * registering the device, if it is NULL then the first regmap found
1113 * will be used. Devices with multiple register maps are very rare,
1114 * generic code should normally not need to specify a name.
1115 */
1116struct regmap *dev_get_regmap(struct device *dev, const char *name)
1117{
1118 struct regmap **r = devres_find(dev, dev_get_regmap_release,
1119 dev_get_regmap_match, (void *)name);
1120
1121 if (!r)
1122 return NULL;
1123 return *r;
1124}
1125EXPORT_SYMBOL_GPL(dev_get_regmap);
1126
8d7d3972
TT
1127/**
1128 * regmap_get_device(): Obtain the device from a regmap
1129 *
1130 * @map: Register map to operate on.
1131 *
1132 * Returns the underlying device that the regmap has been created for.
1133 */
1134struct device *regmap_get_device(struct regmap *map)
1135{
1136 return map->dev;
1137}
fa2fbe4a 1138EXPORT_SYMBOL_GPL(regmap_get_device);
8d7d3972 1139
6863ca62 1140static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 1141 struct regmap_range_node *range,
6863ca62
KG
1142 unsigned int val_num)
1143{
6863ca62
KG
1144 void *orig_work_buf;
1145 unsigned int win_offset;
1146 unsigned int win_page;
1147 bool page_chg;
1148 int ret;
1149
98bc7dfd
MB
1150 win_offset = (*reg - range->range_min) % range->window_len;
1151 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 1152
98bc7dfd
MB
1153 if (val_num > 1) {
1154 /* Bulk write shouldn't cross range boundary */
1155 if (*reg + val_num - 1 > range->range_max)
1156 return -EINVAL;
6863ca62 1157
98bc7dfd
MB
1158 /* ... or single page boundary */
1159 if (val_num > range->window_len - win_offset)
1160 return -EINVAL;
1161 }
6863ca62 1162
98bc7dfd
MB
1163 /* It is possible to have selector register inside data window.
1164 In that case, selector register is located on every page and
1165 it needs no page switching, when accessed alone. */
1166 if (val_num > 1 ||
1167 range->window_start + win_offset != range->selector_reg) {
1168 /* Use separate work_buf during page switching */
1169 orig_work_buf = map->work_buf;
1170 map->work_buf = map->selector_work_buf;
6863ca62 1171
98bc7dfd
MB
1172 ret = _regmap_update_bits(map, range->selector_reg,
1173 range->selector_mask,
1174 win_page << range->selector_shift,
7ff0589c 1175 &page_chg, false);
632a5b01 1176
98bc7dfd 1177 map->work_buf = orig_work_buf;
6863ca62 1178
0ff3e62f 1179 if (ret != 0)
98bc7dfd 1180 return ret;
6863ca62
KG
1181 }
1182
98bc7dfd
MB
1183 *reg = range->window_start + win_offset;
1184
6863ca62
KG
1185 return 0;
1186}
1187
584de329 1188int _regmap_raw_write(struct regmap *map, unsigned int reg,
0a819809 1189 const void *val, size_t val_len)
b83a313b 1190{
98bc7dfd 1191 struct regmap_range_node *range;
0d509f2b 1192 unsigned long flags;
6f306441 1193 u8 *u8 = map->work_buf;
0d509f2b
MB
1194 void *work_val = map->work_buf + map->format.reg_bytes +
1195 map->format.pad_bytes;
b83a313b
MB
1196 void *buf;
1197 int ret = -ENOTSUPP;
1198 size_t len;
73304781
MB
1199 int i;
1200
f1b5c5c3 1201 WARN_ON(!map->bus);
d2a5884a 1202
73304781
MB
1203 /* Check for unwritable registers before we start */
1204 if (map->writeable_reg)
1205 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
1206 if (!map->writeable_reg(map->dev,
1207 reg + (i * map->reg_stride)))
73304781 1208 return -EINVAL;
b83a313b 1209
c9157198
LD
1210 if (!map->cache_bypass && map->format.parse_val) {
1211 unsigned int ival;
1212 int val_bytes = map->format.val_bytes;
1213 for (i = 0; i < val_len / val_bytes; i++) {
5a08d156 1214 ival = map->format.parse_val(val + (i * val_bytes));
f01ee60f
SW
1215 ret = regcache_write(map, reg + (i * map->reg_stride),
1216 ival);
c9157198
LD
1217 if (ret) {
1218 dev_err(map->dev,
6d04b8ac 1219 "Error in caching of register: %x ret: %d\n",
c9157198
LD
1220 reg + i, ret);
1221 return ret;
1222 }
1223 }
1224 if (map->cache_only) {
1225 map->cache_dirty = true;
1226 return 0;
1227 }
1228 }
1229
98bc7dfd
MB
1230 range = _regmap_range_lookup(map, reg);
1231 if (range) {
8a2ceac6
MB
1232 int val_num = val_len / map->format.val_bytes;
1233 int win_offset = (reg - range->range_min) % range->window_len;
1234 int win_residue = range->window_len - win_offset;
1235
1236 /* If the write goes beyond the end of the window split it */
1237 while (val_num > win_residue) {
1a61cfe3 1238 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
1239 win_residue, val_len / map->format.val_bytes);
1240 ret = _regmap_raw_write(map, reg, val, win_residue *
0a819809 1241 map->format.val_bytes);
8a2ceac6
MB
1242 if (ret != 0)
1243 return ret;
1244
1245 reg += win_residue;
1246 val_num -= win_residue;
1247 val += win_residue * map->format.val_bytes;
1248 val_len -= win_residue * map->format.val_bytes;
1249
1250 win_offset = (reg - range->range_min) %
1251 range->window_len;
1252 win_residue = range->window_len - win_offset;
1253 }
1254
1255 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 1256 if (ret != 0)
98bc7dfd
MB
1257 return ret;
1258 }
6863ca62 1259
d939fb9a 1260 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 1261
6f306441
LPC
1262 u8[0] |= map->write_flag_mask;
1263
651e013e
MB
1264 /*
1265 * Essentially all I/O mechanisms will be faster with a single
1266 * buffer to write. Since register syncs often generate raw
1267 * writes of single registers optimise that case.
1268 */
1269 if (val != work_val && val_len == map->format.val_bytes) {
1270 memcpy(work_val, val, map->format.val_bytes);
1271 val = work_val;
1272 }
1273
0a819809 1274 if (map->async && map->bus->async_write) {
7e09a979 1275 struct regmap_async *async;
0d509f2b 1276
c6b570d9 1277 trace_regmap_async_write_start(map, reg, val_len);
fe7d4ccd 1278
7e09a979
MB
1279 spin_lock_irqsave(&map->async_lock, flags);
1280 async = list_first_entry_or_null(&map->async_free,
1281 struct regmap_async,
1282 list);
1283 if (async)
1284 list_del(&async->list);
1285 spin_unlock_irqrestore(&map->async_lock, flags);
1286
1287 if (!async) {
1288 async = map->bus->async_alloc();
1289 if (!async)
1290 return -ENOMEM;
1291
1292 async->work_buf = kzalloc(map->format.buf_size,
1293 GFP_KERNEL | GFP_DMA);
1294 if (!async->work_buf) {
1295 kfree(async);
1296 return -ENOMEM;
1297 }
0d509f2b
MB
1298 }
1299
0d509f2b
MB
1300 async->map = map;
1301
1302 /* If the caller supplied the value we can use it safely. */
1303 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
1304 map->format.reg_bytes + map->format.val_bytes);
0d509f2b
MB
1305
1306 spin_lock_irqsave(&map->async_lock, flags);
1307 list_add_tail(&async->list, &map->async_list);
1308 spin_unlock_irqrestore(&map->async_lock, flags);
1309
04c50ccf
MB
1310 if (val != work_val)
1311 ret = map->bus->async_write(map->bus_context,
1312 async->work_buf,
1313 map->format.reg_bytes +
1314 map->format.pad_bytes,
1315 val, val_len, async);
1316 else
1317 ret = map->bus->async_write(map->bus_context,
1318 async->work_buf,
1319 map->format.reg_bytes +
1320 map->format.pad_bytes +
1321 val_len, NULL, 0, async);
0d509f2b
MB
1322
1323 if (ret != 0) {
1324 dev_err(map->dev, "Failed to schedule write: %d\n",
1325 ret);
1326
1327 spin_lock_irqsave(&map->async_lock, flags);
7e09a979 1328 list_move(&async->list, &map->async_free);
0d509f2b 1329 spin_unlock_irqrestore(&map->async_lock, flags);
0d509f2b 1330 }
f951b658
MB
1331
1332 return ret;
0d509f2b
MB
1333 }
1334
c6b570d9 1335 trace_regmap_hw_write_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 1336
2547e201
MB
1337 /* If we're doing a single register write we can probably just
1338 * send the work_buf directly, otherwise try to do a gather
1339 * write.
1340 */
0d509f2b 1341 if (val == work_val)
0135bbcc 1342 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1343 map->format.reg_bytes +
1344 map->format.pad_bytes +
1345 val_len);
2547e201 1346 else if (map->bus->gather_write)
0135bbcc 1347 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1348 map->format.reg_bytes +
1349 map->format.pad_bytes,
b83a313b
MB
1350 val, val_len);
1351
2547e201 1352 /* If that didn't work fall back on linearising by hand. */
b83a313b 1353 if (ret == -ENOTSUPP) {
82159ba8
MB
1354 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1355 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1356 if (!buf)
1357 return -ENOMEM;
1358
1359 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1360 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1361 val, val_len);
0135bbcc 1362 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1363
1364 kfree(buf);
1365 }
1366
c6b570d9 1367 trace_regmap_hw_write_done(map, reg, val_len / map->format.val_bytes);
fb2736bb 1368
b83a313b
MB
1369 return ret;
1370}
1371
221ad7f2
MB
1372/**
1373 * regmap_can_raw_write - Test if regmap_raw_write() is supported
1374 *
1375 * @map: Map to check.
1376 */
1377bool regmap_can_raw_write(struct regmap *map)
1378{
07ea400e
MP
1379 return map->bus && map->bus->write && map->format.format_val &&
1380 map->format.format_reg;
221ad7f2
MB
1381}
1382EXPORT_SYMBOL_GPL(regmap_can_raw_write);
1383
f50c9eb4
MP
1384/**
1385 * regmap_get_raw_read_max - Get the maximum size we can read
1386 *
1387 * @map: Map to check.
1388 */
1389size_t regmap_get_raw_read_max(struct regmap *map)
1390{
1391 return map->max_raw_read;
1392}
1393EXPORT_SYMBOL_GPL(regmap_get_raw_read_max);
1394
1395/**
1396 * regmap_get_raw_write_max - Get the maximum size we can read
1397 *
1398 * @map: Map to check.
1399 */
1400size_t regmap_get_raw_write_max(struct regmap *map)
1401{
1402 return map->max_raw_write;
1403}
1404EXPORT_SYMBOL_GPL(regmap_get_raw_write_max);
1405
07c320dc
AS
1406static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1407 unsigned int val)
1408{
1409 int ret;
1410 struct regmap_range_node *range;
1411 struct regmap *map = context;
1412
f1b5c5c3 1413 WARN_ON(!map->bus || !map->format.format_write);
07c320dc
AS
1414
1415 range = _regmap_range_lookup(map, reg);
1416 if (range) {
1417 ret = _regmap_select_page(map, &reg, range, 1);
1418 if (ret != 0)
1419 return ret;
1420 }
1421
1422 map->format.format_write(map, reg, val);
1423
c6b570d9 1424 trace_regmap_hw_write_start(map, reg, 1);
07c320dc
AS
1425
1426 ret = map->bus->write(map->bus_context, map->work_buf,
1427 map->format.buf_size);
1428
c6b570d9 1429 trace_regmap_hw_write_done(map, reg, 1);
07c320dc
AS
1430
1431 return ret;
1432}
1433
3ac17037
BB
1434static int _regmap_bus_reg_write(void *context, unsigned int reg,
1435 unsigned int val)
1436{
1437 struct regmap *map = context;
1438
1439 return map->bus->reg_write(map->bus_context, reg, val);
1440}
1441
07c320dc
AS
1442static int _regmap_bus_raw_write(void *context, unsigned int reg,
1443 unsigned int val)
1444{
1445 struct regmap *map = context;
1446
f1b5c5c3 1447 WARN_ON(!map->bus || !map->format.format_val);
07c320dc
AS
1448
1449 map->format.format_val(map->work_buf + map->format.reg_bytes
1450 + map->format.pad_bytes, val, 0);
1451 return _regmap_raw_write(map, reg,
1452 map->work_buf +
1453 map->format.reg_bytes +
1454 map->format.pad_bytes,
0a819809 1455 map->format.val_bytes);
07c320dc
AS
1456}
1457
d2a5884a
AS
1458static inline void *_regmap_map_get_context(struct regmap *map)
1459{
1460 return (map->bus) ? map : map->bus_context;
1461}
1462
4d2dc095
DP
1463int _regmap_write(struct regmap *map, unsigned int reg,
1464 unsigned int val)
b83a313b 1465{
fb2736bb 1466 int ret;
d2a5884a 1467 void *context = _regmap_map_get_context(map);
b83a313b 1468
515f2261
IN
1469 if (!regmap_writeable(map, reg))
1470 return -EIO;
1471
d2a5884a 1472 if (!map->cache_bypass && !map->defer_caching) {
5d1729e7
DP
1473 ret = regcache_write(map, reg, val);
1474 if (ret != 0)
1475 return ret;
8ae0d7e8
MB
1476 if (map->cache_only) {
1477 map->cache_dirty = true;
5d1729e7 1478 return 0;
8ae0d7e8 1479 }
5d1729e7
DP
1480 }
1481
1044c180 1482#ifdef LOG_DEVICE
5336be84 1483 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
1484 dev_info(map->dev, "%x <= %x\n", reg, val);
1485#endif
1486
c6b570d9 1487 trace_regmap_reg_write(map, reg, val);
fb2736bb 1488
d2a5884a 1489 return map->reg_write(context, reg, val);
b83a313b
MB
1490}
1491
1492/**
1493 * regmap_write(): Write a value to a single register
1494 *
1495 * @map: Register map to write to
1496 * @reg: Register to write to
1497 * @val: Value to be written
1498 *
1499 * A value of zero will be returned on success, a negative errno will
1500 * be returned in error cases.
1501 */
1502int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1503{
1504 int ret;
1505
f01ee60f
SW
1506 if (reg % map->reg_stride)
1507 return -EINVAL;
1508
0d4529c5 1509 map->lock(map->lock_arg);
b83a313b
MB
1510
1511 ret = _regmap_write(map, reg, val);
1512
0d4529c5 1513 map->unlock(map->lock_arg);
b83a313b
MB
1514
1515 return ret;
1516}
1517EXPORT_SYMBOL_GPL(regmap_write);
1518
915f441b
MB
1519/**
1520 * regmap_write_async(): Write a value to a single register asynchronously
1521 *
1522 * @map: Register map to write to
1523 * @reg: Register to write to
1524 * @val: Value to be written
1525 *
1526 * A value of zero will be returned on success, a negative errno will
1527 * be returned in error cases.
1528 */
1529int regmap_write_async(struct regmap *map, unsigned int reg, unsigned int val)
1530{
1531 int ret;
1532
1533 if (reg % map->reg_stride)
1534 return -EINVAL;
1535
1536 map->lock(map->lock_arg);
1537
1538 map->async = true;
1539
1540 ret = _regmap_write(map, reg, val);
1541
1542 map->async = false;
1543
1544 map->unlock(map->lock_arg);
1545
1546 return ret;
1547}
1548EXPORT_SYMBOL_GPL(regmap_write_async);
1549
b83a313b
MB
1550/**
1551 * regmap_raw_write(): Write raw values to one or more registers
1552 *
1553 * @map: Register map to write to
1554 * @reg: Initial register to write to
1555 * @val: Block of data to be written, laid out for direct transmission to the
1556 * device
1557 * @val_len: Length of data pointed to by val.
1558 *
1559 * This function is intended to be used for things like firmware
1560 * download where a large block of data needs to be transferred to the
1561 * device. No formatting will be done on the data provided.
1562 *
1563 * A value of zero will be returned on success, a negative errno will
1564 * be returned in error cases.
1565 */
1566int regmap_raw_write(struct regmap *map, unsigned int reg,
1567 const void *val, size_t val_len)
1568{
1569 int ret;
1570
221ad7f2 1571 if (!regmap_can_raw_write(map))
d2a5884a 1572 return -EINVAL;
851960ba
SW
1573 if (val_len % map->format.val_bytes)
1574 return -EINVAL;
c335931e
MP
1575 if (map->max_raw_write && map->max_raw_write > val_len)
1576 return -E2BIG;
851960ba 1577
0d4529c5 1578 map->lock(map->lock_arg);
b83a313b 1579
0a819809 1580 ret = _regmap_raw_write(map, reg, val, val_len);
b83a313b 1581
0d4529c5 1582 map->unlock(map->lock_arg);
b83a313b
MB
1583
1584 return ret;
1585}
1586EXPORT_SYMBOL_GPL(regmap_raw_write);
1587
67252287
SK
1588/**
1589 * regmap_field_write(): Write a value to a single register field
1590 *
1591 * @field: Register field to write to
1592 * @val: Value to be written
1593 *
1594 * A value of zero will be returned on success, a negative errno will
1595 * be returned in error cases.
1596 */
1597int regmap_field_write(struct regmap_field *field, unsigned int val)
1598{
1599 return regmap_update_bits(field->regmap, field->reg,
1600 field->mask, val << field->shift);
1601}
1602EXPORT_SYMBOL_GPL(regmap_field_write);
1603
fdf20029
KM
1604/**
1605 * regmap_field_update_bits(): Perform a read/modify/write cycle
1606 * on the register field
1607 *
1608 * @field: Register field to write to
1609 * @mask: Bitmask to change
1610 * @val: Value to be written
1611 *
1612 * A value of zero will be returned on success, a negative errno will
1613 * be returned in error cases.
1614 */
1615int regmap_field_update_bits(struct regmap_field *field, unsigned int mask, unsigned int val)
1616{
1617 mask = (mask << field->shift) & field->mask;
1618
1619 return regmap_update_bits(field->regmap, field->reg,
1620 mask, val << field->shift);
1621}
1622EXPORT_SYMBOL_GPL(regmap_field_update_bits);
1623
a0102375
KM
1624/**
1625 * regmap_fields_write(): Write a value to a single register field with port ID
1626 *
1627 * @field: Register field to write to
1628 * @id: port ID
1629 * @val: Value to be written
1630 *
1631 * A value of zero will be returned on success, a negative errno will
1632 * be returned in error cases.
1633 */
1634int regmap_fields_write(struct regmap_field *field, unsigned int id,
1635 unsigned int val)
1636{
1637 if (id >= field->id_size)
1638 return -EINVAL;
1639
1640 return regmap_update_bits(field->regmap,
1641 field->reg + (field->id_offset * id),
1642 field->mask, val << field->shift);
1643}
1644EXPORT_SYMBOL_GPL(regmap_fields_write);
1645
e874e6c7
KM
1646int regmap_fields_force_write(struct regmap_field *field, unsigned int id,
1647 unsigned int val)
1648{
1649 if (id >= field->id_size)
1650 return -EINVAL;
1651
1652 return regmap_write_bits(field->regmap,
1653 field->reg + (field->id_offset * id),
1654 field->mask, val << field->shift);
1655}
1656EXPORT_SYMBOL_GPL(regmap_fields_force_write);
1657
a0102375
KM
1658/**
1659 * regmap_fields_update_bits(): Perform a read/modify/write cycle
1660 * on the register field
1661 *
1662 * @field: Register field to write to
1663 * @id: port ID
1664 * @mask: Bitmask to change
1665 * @val: Value to be written
1666 *
1667 * A value of zero will be returned on success, a negative errno will
1668 * be returned in error cases.
1669 */
1670int regmap_fields_update_bits(struct regmap_field *field, unsigned int id,
1671 unsigned int mask, unsigned int val)
1672{
1673 if (id >= field->id_size)
1674 return -EINVAL;
1675
1676 mask = (mask << field->shift) & field->mask;
1677
1678 return regmap_update_bits(field->regmap,
1679 field->reg + (field->id_offset * id),
1680 mask, val << field->shift);
1681}
1682EXPORT_SYMBOL_GPL(regmap_fields_update_bits);
1683
8eaeb219
LD
1684/*
1685 * regmap_bulk_write(): Write multiple registers to the device
1686 *
1687 * @map: Register map to write to
1688 * @reg: First register to be write from
1689 * @val: Block of data to be written, in native register size for device
1690 * @val_count: Number of registers to write
1691 *
1692 * This function is intended to be used for writing a large block of
31b35e9e 1693 * data to the device either in single transfer or multiple transfer.
8eaeb219
LD
1694 *
1695 * A value of zero will be returned on success, a negative errno will
1696 * be returned in error cases.
1697 */
1698int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1699 size_t val_count)
1700{
1701 int ret = 0, i;
1702 size_t val_bytes = map->format.val_bytes;
adaac459 1703 size_t total_size = val_bytes * val_count;
8eaeb219 1704
f4298360 1705 if (map->bus && !map->format.parse_inplace)
8eaeb219 1706 return -EINVAL;
f01ee60f
SW
1707 if (reg % map->reg_stride)
1708 return -EINVAL;
8eaeb219 1709
f4298360
SB
1710 /*
1711 * Some devices don't support bulk write, for
c594b7f2
MP
1712 * them we have a series of single write operations in the first two if
1713 * blocks.
1714 *
1715 * The first if block is used for memory mapped io. It does not allow
1716 * val_bytes of 3 for example.
1717 * The second one is used for busses which do not have this limitation
1718 * and can write arbitrary value lengths.
f4298360 1719 */
c594b7f2 1720 if (!map->bus) {
4999e962 1721 map->lock(map->lock_arg);
f4298360
SB
1722 for (i = 0; i < val_count; i++) {
1723 unsigned int ival;
1724
1725 switch (val_bytes) {
1726 case 1:
1727 ival = *(u8 *)(val + (i * val_bytes));
1728 break;
1729 case 2:
1730 ival = *(u16 *)(val + (i * val_bytes));
1731 break;
1732 case 4:
1733 ival = *(u32 *)(val + (i * val_bytes));
1734 break;
1735#ifdef CONFIG_64BIT
1736 case 8:
1737 ival = *(u64 *)(val + (i * val_bytes));
1738 break;
1739#endif
1740 default:
1741 ret = -EINVAL;
1742 goto out;
1743 }
8eaeb219 1744
f4298360
SB
1745 ret = _regmap_write(map, reg + (i * map->reg_stride),
1746 ival);
1747 if (ret != 0)
1748 goto out;
1749 }
4999e962
TI
1750out:
1751 map->unlock(map->lock_arg);
adaac459
MP
1752 } else if (map->use_single_write ||
1753 (map->max_raw_write && map->max_raw_write < total_size)) {
1754 int chunk_stride = map->reg_stride;
1755 size_t chunk_size = val_bytes;
1756 size_t chunk_count = val_count;
1757
1758 if (!map->use_single_write) {
1759 chunk_size = map->max_raw_write;
1760 if (chunk_size % val_bytes)
1761 chunk_size -= chunk_size % val_bytes;
1762 chunk_count = total_size / chunk_size;
1763 chunk_stride *= chunk_size / val_bytes;
1764 }
1765
c594b7f2 1766 map->lock(map->lock_arg);
adaac459
MP
1767 /* Write as many bytes as possible with chunk_size */
1768 for (i = 0; i < chunk_count; i++) {
c594b7f2 1769 ret = _regmap_raw_write(map,
adaac459
MP
1770 reg + (i * chunk_stride),
1771 val + (i * chunk_size),
1772 chunk_size);
c594b7f2
MP
1773 if (ret)
1774 break;
1775 }
adaac459
MP
1776
1777 /* Write remaining bytes */
1778 if (!ret && chunk_size * i < total_size) {
1779 ret = _regmap_raw_write(map, reg + (i * chunk_stride),
1780 val + (i * chunk_size),
1781 total_size - i * chunk_size);
1782 }
c594b7f2 1783 map->unlock(map->lock_arg);
8eaeb219 1784 } else {
f4298360
SB
1785 void *wval;
1786
d6b41cb0
XL
1787 if (!val_count)
1788 return -EINVAL;
1789
8eaeb219
LD
1790 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1791 if (!wval) {
8eaeb219 1792 dev_err(map->dev, "Error in memory allocation\n");
4999e962 1793 return -ENOMEM;
8eaeb219
LD
1794 }
1795 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 1796 map->format.parse_inplace(wval + i);
f4298360 1797
4999e962 1798 map->lock(map->lock_arg);
0a819809 1799 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count);
4999e962 1800 map->unlock(map->lock_arg);
8eaeb219 1801
8eaeb219 1802 kfree(wval);
f4298360 1803 }
8eaeb219
LD
1804 return ret;
1805}
1806EXPORT_SYMBOL_GPL(regmap_bulk_write);
1807
e894c3f4
OAO
1808/*
1809 * _regmap_raw_multi_reg_write()
1810 *
1811 * the (register,newvalue) pairs in regs have not been formatted, but
1812 * they are all in the same page and have been changed to being page
b486afbd 1813 * relative. The page register has been written if that was necessary.
e894c3f4
OAO
1814 */
1815static int _regmap_raw_multi_reg_write(struct regmap *map,
8019ff6c 1816 const struct reg_sequence *regs,
e894c3f4
OAO
1817 size_t num_regs)
1818{
1819 int ret;
1820 void *buf;
1821 int i;
1822 u8 *u8;
1823 size_t val_bytes = map->format.val_bytes;
1824 size_t reg_bytes = map->format.reg_bytes;
1825 size_t pad_bytes = map->format.pad_bytes;
1826 size_t pair_size = reg_bytes + pad_bytes + val_bytes;
1827 size_t len = pair_size * num_regs;
1828
f5727cd3
XL
1829 if (!len)
1830 return -EINVAL;
1831
e894c3f4
OAO
1832 buf = kzalloc(len, GFP_KERNEL);
1833 if (!buf)
1834 return -ENOMEM;
1835
1836 /* We have to linearise by hand. */
1837
1838 u8 = buf;
1839
1840 for (i = 0; i < num_regs; i++) {
2f9b660b
MP
1841 unsigned int reg = regs[i].reg;
1842 unsigned int val = regs[i].def;
c6b570d9 1843 trace_regmap_hw_write_start(map, reg, 1);
e894c3f4
OAO
1844 map->format.format_reg(u8, reg, map->reg_shift);
1845 u8 += reg_bytes + pad_bytes;
1846 map->format.format_val(u8, val, 0);
1847 u8 += val_bytes;
1848 }
1849 u8 = buf;
1850 *u8 |= map->write_flag_mask;
1851
1852 ret = map->bus->write(map->bus_context, buf, len);
1853
1854 kfree(buf);
1855
1856 for (i = 0; i < num_regs; i++) {
1857 int reg = regs[i].reg;
c6b570d9 1858 trace_regmap_hw_write_done(map, reg, 1);
e894c3f4
OAO
1859 }
1860 return ret;
1861}
1862
1863static unsigned int _regmap_register_page(struct regmap *map,
1864 unsigned int reg,
1865 struct regmap_range_node *range)
1866{
1867 unsigned int win_page = (reg - range->range_min) / range->window_len;
1868
1869 return win_page;
1870}
1871
1872static int _regmap_range_multi_paged_reg_write(struct regmap *map,
8019ff6c 1873 struct reg_sequence *regs,
e894c3f4
OAO
1874 size_t num_regs)
1875{
1876 int ret;
1877 int i, n;
8019ff6c 1878 struct reg_sequence *base;
b48d1398 1879 unsigned int this_page = 0;
2de9d600 1880 unsigned int page_change = 0;
e894c3f4
OAO
1881 /*
1882 * the set of registers are not neccessarily in order, but
1883 * since the order of write must be preserved this algorithm
2de9d600
NP
1884 * chops the set each time the page changes. This also applies
1885 * if there is a delay required at any point in the sequence.
e894c3f4
OAO
1886 */
1887 base = regs;
1888 for (i = 0, n = 0; i < num_regs; i++, n++) {
1889 unsigned int reg = regs[i].reg;
1890 struct regmap_range_node *range;
1891
1892 range = _regmap_range_lookup(map, reg);
1893 if (range) {
1894 unsigned int win_page = _regmap_register_page(map, reg,
1895 range);
1896
1897 if (i == 0)
1898 this_page = win_page;
1899 if (win_page != this_page) {
1900 this_page = win_page;
2de9d600
NP
1901 page_change = 1;
1902 }
1903 }
1904
1905 /* If we have both a page change and a delay make sure to
1906 * write the regs and apply the delay before we change the
1907 * page.
1908 */
1909
1910 if (page_change || regs[i].delay_us) {
1911
1912 /* For situations where the first write requires
1913 * a delay we need to make sure we don't call
1914 * raw_multi_reg_write with n=0
1915 * This can't occur with page breaks as we
1916 * never write on the first iteration
1917 */
1918 if (regs[i].delay_us && i == 0)
1919 n = 1;
1920
e894c3f4
OAO
1921 ret = _regmap_raw_multi_reg_write(map, base, n);
1922 if (ret != 0)
1923 return ret;
2de9d600
NP
1924
1925 if (regs[i].delay_us)
1926 udelay(regs[i].delay_us);
1927
e894c3f4
OAO
1928 base += n;
1929 n = 0;
2de9d600
NP
1930
1931 if (page_change) {
1932 ret = _regmap_select_page(map,
1933 &base[n].reg,
1934 range, 1);
1935 if (ret != 0)
1936 return ret;
1937
1938 page_change = 0;
1939 }
1940
e894c3f4 1941 }
2de9d600 1942
e894c3f4
OAO
1943 }
1944 if (n > 0)
1945 return _regmap_raw_multi_reg_write(map, base, n);
1946 return 0;
1947}
1948
1d5b40bc 1949static int _regmap_multi_reg_write(struct regmap *map,
8019ff6c 1950 const struct reg_sequence *regs,
e894c3f4 1951 size_t num_regs)
1d5b40bc 1952{
e894c3f4
OAO
1953 int i;
1954 int ret;
1955
1956 if (!map->can_multi_write) {
1957 for (i = 0; i < num_regs; i++) {
1958 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1959 if (ret != 0)
1960 return ret;
2de9d600
NP
1961
1962 if (regs[i].delay_us)
1963 udelay(regs[i].delay_us);
e894c3f4
OAO
1964 }
1965 return 0;
1966 }
1967
1968 if (!map->format.parse_inplace)
1969 return -EINVAL;
1970
1971 if (map->writeable_reg)
1972 for (i = 0; i < num_regs; i++) {
1973 int reg = regs[i].reg;
1974 if (!map->writeable_reg(map->dev, reg))
1975 return -EINVAL;
1976 if (reg % map->reg_stride)
1977 return -EINVAL;
1978 }
1979
1980 if (!map->cache_bypass) {
1981 for (i = 0; i < num_regs; i++) {
1982 unsigned int val = regs[i].def;
1983 unsigned int reg = regs[i].reg;
1984 ret = regcache_write(map, reg, val);
1985 if (ret) {
1986 dev_err(map->dev,
1987 "Error in caching of register: %x ret: %d\n",
1988 reg, ret);
1989 return ret;
1990 }
1991 }
1992 if (map->cache_only) {
1993 map->cache_dirty = true;
1994 return 0;
1995 }
1996 }
1997
1998 WARN_ON(!map->bus);
1d5b40bc
CK
1999
2000 for (i = 0; i < num_regs; i++) {
e894c3f4
OAO
2001 unsigned int reg = regs[i].reg;
2002 struct regmap_range_node *range;
2de9d600
NP
2003
2004 /* Coalesce all the writes between a page break or a delay
2005 * in a sequence
2006 */
e894c3f4 2007 range = _regmap_range_lookup(map, reg);
2de9d600 2008 if (range || regs[i].delay_us) {
8019ff6c
NP
2009 size_t len = sizeof(struct reg_sequence)*num_regs;
2010 struct reg_sequence *base = kmemdup(regs, len,
e894c3f4
OAO
2011 GFP_KERNEL);
2012 if (!base)
2013 return -ENOMEM;
2014 ret = _regmap_range_multi_paged_reg_write(map, base,
2015 num_regs);
2016 kfree(base);
2017
1d5b40bc
CK
2018 return ret;
2019 }
2020 }
e894c3f4 2021 return _regmap_raw_multi_reg_write(map, regs, num_regs);
1d5b40bc
CK
2022}
2023
e33fabd3
AO
2024/*
2025 * regmap_multi_reg_write(): Write multiple registers to the device
2026 *
e894c3f4
OAO
2027 * where the set of register,value pairs are supplied in any order,
2028 * possibly not all in a single range.
e33fabd3
AO
2029 *
2030 * @map: Register map to write to
2031 * @regs: Array of structures containing register,value to be written
2032 * @num_regs: Number of registers to write
2033 *
e894c3f4
OAO
2034 * The 'normal' block write mode will send ultimately send data on the
2035 * target bus as R,V1,V2,V3,..,Vn where successively higer registers are
2036 * addressed. However, this alternative block multi write mode will send
2037 * the data as R1,V1,R2,V2,..,Rn,Vn on the target bus. The target device
2038 * must of course support the mode.
e33fabd3 2039 *
e894c3f4
OAO
2040 * A value of zero will be returned on success, a negative errno will be
2041 * returned in error cases.
e33fabd3 2042 */
8019ff6c 2043int regmap_multi_reg_write(struct regmap *map, const struct reg_sequence *regs,
f7e2cec0 2044 int num_regs)
e33fabd3 2045{
1d5b40bc 2046 int ret;
e33fabd3
AO
2047
2048 map->lock(map->lock_arg);
2049
1d5b40bc
CK
2050 ret = _regmap_multi_reg_write(map, regs, num_regs);
2051
e33fabd3
AO
2052 map->unlock(map->lock_arg);
2053
2054 return ret;
2055}
2056EXPORT_SYMBOL_GPL(regmap_multi_reg_write);
2057
1d5b40bc
CK
2058/*
2059 * regmap_multi_reg_write_bypassed(): Write multiple registers to the
2060 * device but not the cache
2061 *
e33fabd3
AO
2062 * where the set of register are supplied in any order
2063 *
2064 * @map: Register map to write to
2065 * @regs: Array of structures containing register,value to be written
2066 * @num_regs: Number of registers to write
2067 *
2068 * This function is intended to be used for writing a large block of data
2069 * atomically to the device in single transfer for those I2C client devices
2070 * that implement this alternative block write mode.
2071 *
2072 * A value of zero will be returned on success, a negative errno will
2073 * be returned in error cases.
2074 */
1d5b40bc 2075int regmap_multi_reg_write_bypassed(struct regmap *map,
8019ff6c 2076 const struct reg_sequence *regs,
1d5b40bc 2077 int num_regs)
e33fabd3 2078{
1d5b40bc
CK
2079 int ret;
2080 bool bypass;
e33fabd3
AO
2081
2082 map->lock(map->lock_arg);
2083
1d5b40bc
CK
2084 bypass = map->cache_bypass;
2085 map->cache_bypass = true;
2086
2087 ret = _regmap_multi_reg_write(map, regs, num_regs);
2088
2089 map->cache_bypass = bypass;
2090
e33fabd3
AO
2091 map->unlock(map->lock_arg);
2092
2093 return ret;
2094}
1d5b40bc 2095EXPORT_SYMBOL_GPL(regmap_multi_reg_write_bypassed);
e33fabd3 2096
0d509f2b
MB
2097/**
2098 * regmap_raw_write_async(): Write raw values to one or more registers
2099 * asynchronously
2100 *
2101 * @map: Register map to write to
2102 * @reg: Initial register to write to
2103 * @val: Block of data to be written, laid out for direct transmission to the
2104 * device. Must be valid until regmap_async_complete() is called.
2105 * @val_len: Length of data pointed to by val.
2106 *
2107 * This function is intended to be used for things like firmware
2108 * download where a large block of data needs to be transferred to the
2109 * device. No formatting will be done on the data provided.
2110 *
2111 * If supported by the underlying bus the write will be scheduled
2112 * asynchronously, helping maximise I/O speed on higher speed buses
2113 * like SPI. regmap_async_complete() can be called to ensure that all
2114 * asynchrnous writes have been completed.
2115 *
2116 * A value of zero will be returned on success, a negative errno will
2117 * be returned in error cases.
2118 */
2119int regmap_raw_write_async(struct regmap *map, unsigned int reg,
2120 const void *val, size_t val_len)
2121{
2122 int ret;
2123
2124 if (val_len % map->format.val_bytes)
2125 return -EINVAL;
2126 if (reg % map->reg_stride)
2127 return -EINVAL;
2128
2129 map->lock(map->lock_arg);
2130
0a819809
MB
2131 map->async = true;
2132
2133 ret = _regmap_raw_write(map, reg, val, val_len);
2134
2135 map->async = false;
0d509f2b
MB
2136
2137 map->unlock(map->lock_arg);
2138
2139 return ret;
2140}
2141EXPORT_SYMBOL_GPL(regmap_raw_write_async);
2142
b83a313b
MB
2143static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2144 unsigned int val_len)
2145{
98bc7dfd 2146 struct regmap_range_node *range;
b83a313b
MB
2147 u8 *u8 = map->work_buf;
2148 int ret;
2149
f1b5c5c3 2150 WARN_ON(!map->bus);
d2a5884a 2151
98bc7dfd
MB
2152 range = _regmap_range_lookup(map, reg);
2153 if (range) {
2154 ret = _regmap_select_page(map, &reg, range,
2155 val_len / map->format.val_bytes);
0ff3e62f 2156 if (ret != 0)
98bc7dfd
MB
2157 return ret;
2158 }
6863ca62 2159
d939fb9a 2160 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
2161
2162 /*
6f306441 2163 * Some buses or devices flag reads by setting the high bits in the
b486afbd 2164 * register address; since it's always the high bits for all
b83a313b
MB
2165 * current formats we can do this here rather than in
2166 * formatting. This may break if we get interesting formats.
2167 */
6f306441 2168 u8[0] |= map->read_flag_mask;
b83a313b 2169
c6b570d9 2170 trace_regmap_hw_read_start(map, reg, val_len / map->format.val_bytes);
fb2736bb 2171
0135bbcc 2172 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 2173 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 2174 val, val_len);
b83a313b 2175
c6b570d9 2176 trace_regmap_hw_read_done(map, reg, val_len / map->format.val_bytes);
fb2736bb
MB
2177
2178 return ret;
b83a313b
MB
2179}
2180
3ac17037
BB
2181static int _regmap_bus_reg_read(void *context, unsigned int reg,
2182 unsigned int *val)
2183{
2184 struct regmap *map = context;
2185
2186 return map->bus->reg_read(map->bus_context, reg, val);
2187}
2188
ad278406
AS
2189static int _regmap_bus_read(void *context, unsigned int reg,
2190 unsigned int *val)
2191{
2192 int ret;
2193 struct regmap *map = context;
2194
2195 if (!map->format.parse_val)
2196 return -EINVAL;
2197
2198 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
2199 if (ret == 0)
2200 *val = map->format.parse_val(map->work_buf);
2201
2202 return ret;
2203}
2204
b83a313b
MB
2205static int _regmap_read(struct regmap *map, unsigned int reg,
2206 unsigned int *val)
2207{
2208 int ret;
d2a5884a
AS
2209 void *context = _regmap_map_get_context(map);
2210
5d1729e7
DP
2211 if (!map->cache_bypass) {
2212 ret = regcache_read(map, reg, val);
2213 if (ret == 0)
2214 return 0;
2215 }
2216
2217 if (map->cache_only)
2218 return -EBUSY;
2219
d4807ad2
MS
2220 if (!regmap_readable(map, reg))
2221 return -EIO;
2222
d2a5884a 2223 ret = map->reg_read(context, reg, val);
fb2736bb 2224 if (ret == 0) {
1044c180 2225#ifdef LOG_DEVICE
5336be84 2226 if (map->dev && strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1044c180
MB
2227 dev_info(map->dev, "%x => %x\n", reg, *val);
2228#endif
2229
c6b570d9 2230 trace_regmap_reg_read(map, reg, *val);
b83a313b 2231
ad278406
AS
2232 if (!map->cache_bypass)
2233 regcache_write(map, reg, *val);
2234 }
f2985367 2235
b83a313b
MB
2236 return ret;
2237}
2238
2239/**
2240 * regmap_read(): Read a value from a single register
2241 *
0093380c 2242 * @map: Register map to read from
b83a313b
MB
2243 * @reg: Register to be read from
2244 * @val: Pointer to store read value
2245 *
2246 * A value of zero will be returned on success, a negative errno will
2247 * be returned in error cases.
2248 */
2249int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
2250{
2251 int ret;
2252
f01ee60f
SW
2253 if (reg % map->reg_stride)
2254 return -EINVAL;
2255
0d4529c5 2256 map->lock(map->lock_arg);
b83a313b
MB
2257
2258 ret = _regmap_read(map, reg, val);
2259
0d4529c5 2260 map->unlock(map->lock_arg);
b83a313b
MB
2261
2262 return ret;
2263}
2264EXPORT_SYMBOL_GPL(regmap_read);
2265
2266/**
2267 * regmap_raw_read(): Read raw data from the device
2268 *
0093380c 2269 * @map: Register map to read from
b83a313b
MB
2270 * @reg: First register to be read from
2271 * @val: Pointer to store read value
2272 * @val_len: Size of data to read
2273 *
2274 * A value of zero will be returned on success, a negative errno will
2275 * be returned in error cases.
2276 */
2277int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
2278 size_t val_len)
2279{
b8fb5ab1
MB
2280 size_t val_bytes = map->format.val_bytes;
2281 size_t val_count = val_len / val_bytes;
2282 unsigned int v;
2283 int ret, i;
04e016ad 2284
d2a5884a
AS
2285 if (!map->bus)
2286 return -EINVAL;
851960ba
SW
2287 if (val_len % map->format.val_bytes)
2288 return -EINVAL;
f01ee60f
SW
2289 if (reg % map->reg_stride)
2290 return -EINVAL;
fa3eec77
MB
2291 if (val_count == 0)
2292 return -EINVAL;
851960ba 2293
0d4529c5 2294 map->lock(map->lock_arg);
b83a313b 2295
b8fb5ab1
MB
2296 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
2297 map->cache_type == REGCACHE_NONE) {
9a16ea90
MP
2298 if (!map->bus->read) {
2299 ret = -ENOTSUPP;
2300 goto out;
2301 }
c335931e
MP
2302 if (map->max_raw_read && map->max_raw_read < val_len) {
2303 ret = -E2BIG;
2304 goto out;
2305 }
9a16ea90 2306
b8fb5ab1
MB
2307 /* Physical block read if there's no cache involved */
2308 ret = _regmap_raw_read(map, reg, val, val_len);
2309
2310 } else {
2311 /* Otherwise go word by word for the cache; should be low
2312 * cost as we expect to hit the cache.
2313 */
2314 for (i = 0; i < val_count; i++) {
f01ee60f
SW
2315 ret = _regmap_read(map, reg + (i * map->reg_stride),
2316 &v);
b8fb5ab1
MB
2317 if (ret != 0)
2318 goto out;
2319
d939fb9a 2320 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
2321 }
2322 }
b83a313b 2323
b8fb5ab1 2324 out:
0d4529c5 2325 map->unlock(map->lock_arg);
b83a313b
MB
2326
2327 return ret;
2328}
2329EXPORT_SYMBOL_GPL(regmap_raw_read);
2330
67252287
SK
2331/**
2332 * regmap_field_read(): Read a value to a single register field
2333 *
2334 * @field: Register field to read from
2335 * @val: Pointer to store read value
2336 *
2337 * A value of zero will be returned on success, a negative errno will
2338 * be returned in error cases.
2339 */
2340int regmap_field_read(struct regmap_field *field, unsigned int *val)
2341{
2342 int ret;
2343 unsigned int reg_val;
2344 ret = regmap_read(field->regmap, field->reg, &reg_val);
2345 if (ret != 0)
2346 return ret;
2347
2348 reg_val &= field->mask;
2349 reg_val >>= field->shift;
2350 *val = reg_val;
2351
2352 return ret;
2353}
2354EXPORT_SYMBOL_GPL(regmap_field_read);
2355
a0102375
KM
2356/**
2357 * regmap_fields_read(): Read a value to a single register field with port ID
2358 *
2359 * @field: Register field to read from
2360 * @id: port ID
2361 * @val: Pointer to store read value
2362 *
2363 * A value of zero will be returned on success, a negative errno will
2364 * be returned in error cases.
2365 */
2366int regmap_fields_read(struct regmap_field *field, unsigned int id,
2367 unsigned int *val)
2368{
2369 int ret;
2370 unsigned int reg_val;
2371
2372 if (id >= field->id_size)
2373 return -EINVAL;
2374
2375 ret = regmap_read(field->regmap,
2376 field->reg + (field->id_offset * id),
2377 &reg_val);
2378 if (ret != 0)
2379 return ret;
2380
2381 reg_val &= field->mask;
2382 reg_val >>= field->shift;
2383 *val = reg_val;
2384
2385 return ret;
2386}
2387EXPORT_SYMBOL_GPL(regmap_fields_read);
2388
b83a313b
MB
2389/**
2390 * regmap_bulk_read(): Read multiple registers from the device
2391 *
0093380c 2392 * @map: Register map to read from
b83a313b
MB
2393 * @reg: First register to be read from
2394 * @val: Pointer to store read value, in native register size for device
2395 * @val_count: Number of registers to read
2396 *
2397 * A value of zero will be returned on success, a negative errno will
2398 * be returned in error cases.
2399 */
2400int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
2401 size_t val_count)
2402{
2403 int ret, i;
2404 size_t val_bytes = map->format.val_bytes;
82cd9965 2405 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 2406
f01ee60f
SW
2407 if (reg % map->reg_stride)
2408 return -EINVAL;
b83a313b 2409
3b58ee13 2410 if (map->bus && map->format.parse_inplace && (vol || map->cache_type == REGCACHE_NONE)) {
2e33caf1
AJ
2411 /*
2412 * Some devices does not support bulk read, for
2413 * them we have a series of single read operations.
2414 */
adaac459
MP
2415 size_t total_size = val_bytes * val_count;
2416
2417 if (!map->use_single_read &&
2418 (!map->max_raw_read || map->max_raw_read > total_size)) {
2e33caf1
AJ
2419 ret = regmap_raw_read(map, reg, val,
2420 val_bytes * val_count);
2421 if (ret != 0)
2422 return ret;
adaac459
MP
2423 } else {
2424 /*
2425 * Some devices do not support bulk read or do not
2426 * support large bulk reads, for them we have a series
2427 * of read operations.
2428 */
2429 int chunk_stride = map->reg_stride;
2430 size_t chunk_size = val_bytes;
2431 size_t chunk_count = val_count;
2432
2433 if (!map->use_single_read) {
2434 chunk_size = map->max_raw_read;
2435 if (chunk_size % val_bytes)
2436 chunk_size -= chunk_size % val_bytes;
2437 chunk_count = total_size / chunk_size;
2438 chunk_stride *= chunk_size / val_bytes;
2439 }
2440
2441 /* Read bytes that fit into a multiple of chunk_size */
2442 for (i = 0; i < chunk_count; i++) {
2443 ret = regmap_raw_read(map,
2444 reg + (i * chunk_stride),
2445 val + (i * chunk_size),
2446 chunk_size);
2447 if (ret != 0)
2448 return ret;
2449 }
2450
2451 /* Read remaining bytes */
2452 if (chunk_size * i < total_size) {
2453 ret = regmap_raw_read(map,
2454 reg + (i * chunk_stride),
2455 val + (i * chunk_size),
2456 total_size - i * chunk_size);
2457 if (ret != 0)
2458 return ret;
2459 }
2e33caf1 2460 }
de2d808f
MB
2461
2462 for (i = 0; i < val_count * val_bytes; i += val_bytes)
8a819ff8 2463 map->format.parse_inplace(val + i);
de2d808f
MB
2464 } else {
2465 for (i = 0; i < val_count; i++) {
6560ffd1 2466 unsigned int ival;
f01ee60f 2467 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 2468 &ival);
de2d808f
MB
2469 if (ret != 0)
2470 return ret;
d5b98eb1
MB
2471
2472 if (map->format.format_val) {
2473 map->format.format_val(val + (i * val_bytes), ival, 0);
2474 } else {
2475 /* Devices providing read and write
2476 * operations can use the bulk I/O
2477 * functions if they define a val_bytes,
2478 * we assume that the values are native
2479 * endian.
2480 */
2481 u32 *u32 = val;
2482 u16 *u16 = val;
2483 u8 *u8 = val;
2484
2485 switch (map->format.val_bytes) {
2486 case 4:
2487 u32[i] = ival;
2488 break;
2489 case 2:
2490 u16[i] = ival;
2491 break;
2492 case 1:
2493 u8[i] = ival;
2494 break;
2495 default:
2496 return -EINVAL;
2497 }
2498 }
de2d808f
MB
2499 }
2500 }
b83a313b
MB
2501
2502 return 0;
2503}
2504EXPORT_SYMBOL_GPL(regmap_bulk_read);
2505
018690d3
MB
2506static int _regmap_update_bits(struct regmap *map, unsigned int reg,
2507 unsigned int mask, unsigned int val,
7ff0589c 2508 bool *change, bool force_write)
b83a313b
MB
2509{
2510 int ret;
d91e8db2 2511 unsigned int tmp, orig;
b83a313b 2512
7741c373
JR
2513 if (map->reg_update_bits) {
2514 ret = map->reg_update_bits(map->bus_context, reg, mask, val,
2515 change, force_write);
2516 if (ret != 0)
2517 return ret;
2518
2519 /* Fix up the cache by read/modify/write */
2520 if (!map->cache_bypass && !map->defer_caching) {
2521 ret = regcache_read(map, reg, &orig);
2522 if (ret != 0)
2523 return ret;
2524
2525 tmp = orig & ~mask;
2526 tmp |= val & mask;
2527
2528 ret = regcache_write(map, reg, tmp);
2529 if (ret != 0)
2530 return ret;
2531 if (map->cache_only)
2532 map->cache_dirty = true;
2533 }
2534 return ret;
2535 }
2536
d91e8db2 2537 ret = _regmap_read(map, reg, &orig);
b83a313b 2538 if (ret != 0)
fc3ebd78 2539 return ret;
b83a313b 2540
d91e8db2 2541 tmp = orig & ~mask;
b83a313b
MB
2542 tmp |= val & mask;
2543
7ff0589c 2544 if (force_write || (tmp != orig)) {
d91e8db2 2545 ret = _regmap_write(map, reg, tmp);
e2f74dc6
XL
2546 if (change)
2547 *change = true;
018690d3 2548 } else {
e2f74dc6
XL
2549 if (change)
2550 *change = false;
018690d3 2551 }
b83a313b 2552
b83a313b
MB
2553 return ret;
2554}
018690d3
MB
2555
2556/**
2557 * regmap_update_bits: Perform a read/modify/write cycle on the register map
2558 *
2559 * @map: Register map to update
2560 * @reg: Register to update
2561 * @mask: Bitmask to change
2562 * @val: New value for bitmask
2563 *
2564 * Returns zero for success, a negative number on error.
2565 */
2566int regmap_update_bits(struct regmap *map, unsigned int reg,
2567 unsigned int mask, unsigned int val)
2568{
fc3ebd78
KG
2569 int ret;
2570
0d4529c5 2571 map->lock(map->lock_arg);
7ff0589c 2572 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
0d4529c5 2573 map->unlock(map->lock_arg);
fc3ebd78
KG
2574
2575 return ret;
018690d3 2576}
b83a313b 2577EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 2578
fd4b7286
KM
2579/**
2580 * regmap_write_bits: Perform a read/modify/write cycle on the register map
2581 *
2582 * @map: Register map to update
2583 * @reg: Register to update
2584 * @mask: Bitmask to change
2585 * @val: New value for bitmask
2586 *
2587 * Returns zero for success, a negative number on error.
2588 */
2589int regmap_write_bits(struct regmap *map, unsigned int reg,
2590 unsigned int mask, unsigned int val)
2591{
2592 int ret;
2593
2594 map->lock(map->lock_arg);
2595 ret = _regmap_update_bits(map, reg, mask, val, NULL, true);
2596 map->unlock(map->lock_arg);
2597
2598 return ret;
2599}
2600EXPORT_SYMBOL_GPL(regmap_write_bits);
2601
915f441b
MB
2602/**
2603 * regmap_update_bits_async: Perform a read/modify/write cycle on the register
2604 * map asynchronously
2605 *
2606 * @map: Register map to update
2607 * @reg: Register to update
2608 * @mask: Bitmask to change
2609 * @val: New value for bitmask
2610 *
2611 * With most buses the read must be done synchronously so this is most
2612 * useful for devices with a cache which do not need to interact with
2613 * the hardware to determine the current register value.
2614 *
2615 * Returns zero for success, a negative number on error.
2616 */
2617int regmap_update_bits_async(struct regmap *map, unsigned int reg,
2618 unsigned int mask, unsigned int val)
2619{
915f441b
MB
2620 int ret;
2621
2622 map->lock(map->lock_arg);
2623
2624 map->async = true;
2625
7ff0589c 2626 ret = _regmap_update_bits(map, reg, mask, val, NULL, false);
915f441b
MB
2627
2628 map->async = false;
2629
2630 map->unlock(map->lock_arg);
2631
2632 return ret;
2633}
2634EXPORT_SYMBOL_GPL(regmap_update_bits_async);
2635
018690d3
MB
2636/**
2637 * regmap_update_bits_check: Perform a read/modify/write cycle on the
2638 * register map and report if updated
2639 *
2640 * @map: Register map to update
2641 * @reg: Register to update
2642 * @mask: Bitmask to change
2643 * @val: New value for bitmask
2644 * @change: Boolean indicating if a write was done
2645 *
2646 * Returns zero for success, a negative number on error.
2647 */
2648int regmap_update_bits_check(struct regmap *map, unsigned int reg,
2649 unsigned int mask, unsigned int val,
2650 bool *change)
2651{
fc3ebd78
KG
2652 int ret;
2653
0d4529c5 2654 map->lock(map->lock_arg);
7ff0589c 2655 ret = _regmap_update_bits(map, reg, mask, val, change, false);
0d4529c5 2656 map->unlock(map->lock_arg);
fc3ebd78 2657 return ret;
018690d3
MB
2658}
2659EXPORT_SYMBOL_GPL(regmap_update_bits_check);
2660
915f441b
MB
2661/**
2662 * regmap_update_bits_check_async: Perform a read/modify/write cycle on the
2663 * register map asynchronously and report if
2664 * updated
2665 *
2666 * @map: Register map to update
2667 * @reg: Register to update
2668 * @mask: Bitmask to change
2669 * @val: New value for bitmask
2670 * @change: Boolean indicating if a write was done
2671 *
2672 * With most buses the read must be done synchronously so this is most
2673 * useful for devices with a cache which do not need to interact with
2674 * the hardware to determine the current register value.
2675 *
2676 * Returns zero for success, a negative number on error.
2677 */
2678int regmap_update_bits_check_async(struct regmap *map, unsigned int reg,
2679 unsigned int mask, unsigned int val,
2680 bool *change)
2681{
2682 int ret;
2683
2684 map->lock(map->lock_arg);
2685
2686 map->async = true;
2687
7ff0589c 2688 ret = _regmap_update_bits(map, reg, mask, val, change, false);
915f441b
MB
2689
2690 map->async = false;
2691
2692 map->unlock(map->lock_arg);
2693
2694 return ret;
2695}
2696EXPORT_SYMBOL_GPL(regmap_update_bits_check_async);
2697
0d509f2b
MB
2698void regmap_async_complete_cb(struct regmap_async *async, int ret)
2699{
2700 struct regmap *map = async->map;
2701 bool wake;
2702
c6b570d9 2703 trace_regmap_async_io_complete(map);
fe7d4ccd 2704
0d509f2b 2705 spin_lock(&map->async_lock);
7e09a979 2706 list_move(&async->list, &map->async_free);
0d509f2b
MB
2707 wake = list_empty(&map->async_list);
2708
2709 if (ret != 0)
2710 map->async_ret = ret;
2711
2712 spin_unlock(&map->async_lock);
2713
0d509f2b
MB
2714 if (wake)
2715 wake_up(&map->async_waitq);
2716}
f804fb56 2717EXPORT_SYMBOL_GPL(regmap_async_complete_cb);
0d509f2b
MB
2718
2719static int regmap_async_is_done(struct regmap *map)
2720{
2721 unsigned long flags;
2722 int ret;
2723
2724 spin_lock_irqsave(&map->async_lock, flags);
2725 ret = list_empty(&map->async_list);
2726 spin_unlock_irqrestore(&map->async_lock, flags);
2727
2728 return ret;
2729}
2730
2731/**
2732 * regmap_async_complete: Ensure all asynchronous I/O has completed.
2733 *
2734 * @map: Map to operate on.
2735 *
2736 * Blocks until any pending asynchronous I/O has completed. Returns
2737 * an error code for any failed I/O operations.
2738 */
2739int regmap_async_complete(struct regmap *map)
2740{
2741 unsigned long flags;
2742 int ret;
2743
2744 /* Nothing to do with no async support */
f2e055e7 2745 if (!map->bus || !map->bus->async_write)
0d509f2b
MB
2746 return 0;
2747
c6b570d9 2748 trace_regmap_async_complete_start(map);
fe7d4ccd 2749
0d509f2b
MB
2750 wait_event(map->async_waitq, regmap_async_is_done(map));
2751
2752 spin_lock_irqsave(&map->async_lock, flags);
2753 ret = map->async_ret;
2754 map->async_ret = 0;
2755 spin_unlock_irqrestore(&map->async_lock, flags);
2756
c6b570d9 2757 trace_regmap_async_complete_done(map);
fe7d4ccd 2758
0d509f2b
MB
2759 return ret;
2760}
f88948ef 2761EXPORT_SYMBOL_GPL(regmap_async_complete);
0d509f2b 2762
22f0d90a
MB
2763/**
2764 * regmap_register_patch: Register and apply register updates to be applied
2765 * on device initialistion
2766 *
2767 * @map: Register map to apply updates to.
2768 * @regs: Values to update.
2769 * @num_regs: Number of entries in regs.
2770 *
2771 * Register a set of register updates to be applied to the device
2772 * whenever the device registers are synchronised with the cache and
2773 * apply them immediately. Typically this is used to apply
2774 * corrections to be applied to the device defaults on startup, such
2775 * as the updates some vendors provide to undocumented registers.
56fb1c74
MB
2776 *
2777 * The caller must ensure that this function cannot be called
2778 * concurrently with either itself or regcache_sync().
22f0d90a 2779 */
8019ff6c 2780int regmap_register_patch(struct regmap *map, const struct reg_sequence *regs,
22f0d90a
MB
2781 int num_regs)
2782{
8019ff6c 2783 struct reg_sequence *p;
6bf13103 2784 int ret;
22f0d90a
MB
2785 bool bypass;
2786
bd60e381
CZ
2787 if (WARN_ONCE(num_regs <= 0, "invalid registers number (%d)\n",
2788 num_regs))
2789 return 0;
2790
aab13ebc 2791 p = krealloc(map->patch,
8019ff6c 2792 sizeof(struct reg_sequence) * (map->patch_regs + num_regs),
aab13ebc
MB
2793 GFP_KERNEL);
2794 if (p) {
2795 memcpy(p + map->patch_regs, regs, num_regs * sizeof(*regs));
2796 map->patch = p;
2797 map->patch_regs += num_regs;
22f0d90a 2798 } else {
56fb1c74 2799 return -ENOMEM;
22f0d90a
MB
2800 }
2801
0d4529c5 2802 map->lock(map->lock_arg);
22f0d90a
MB
2803
2804 bypass = map->cache_bypass;
2805
2806 map->cache_bypass = true;
1a25f261 2807 map->async = true;
22f0d90a 2808
6bf13103 2809 ret = _regmap_multi_reg_write(map, regs, num_regs);
22f0d90a 2810
1a25f261 2811 map->async = false;
22f0d90a
MB
2812 map->cache_bypass = bypass;
2813
0d4529c5 2814 map->unlock(map->lock_arg);
22f0d90a 2815
1a25f261
MB
2816 regmap_async_complete(map);
2817
22f0d90a
MB
2818 return ret;
2819}
2820EXPORT_SYMBOL_GPL(regmap_register_patch);
2821
eae4b51b 2822/*
a6539c32
MB
2823 * regmap_get_val_bytes(): Report the size of a register value
2824 *
2825 * Report the size of a register value, mainly intended to for use by
2826 * generic infrastructure built on top of regmap.
2827 */
2828int regmap_get_val_bytes(struct regmap *map)
2829{
2830 if (map->format.format_write)
2831 return -EINVAL;
2832
2833 return map->format.val_bytes;
2834}
2835EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
2836
668abc72
SK
2837/**
2838 * regmap_get_max_register(): Report the max register value
2839 *
2840 * Report the max register value, mainly intended to for use by
2841 * generic infrastructure built on top of regmap.
2842 */
2843int regmap_get_max_register(struct regmap *map)
2844{
2845 return map->max_register ? map->max_register : -EINVAL;
2846}
2847EXPORT_SYMBOL_GPL(regmap_get_max_register);
2848
a2f776cb
SK
2849/**
2850 * regmap_get_reg_stride(): Report the register address stride
2851 *
2852 * Report the register address stride, mainly intended to for use by
2853 * generic infrastructure built on top of regmap.
2854 */
2855int regmap_get_reg_stride(struct regmap *map)
2856{
2857 return map->reg_stride;
2858}
2859EXPORT_SYMBOL_GPL(regmap_get_reg_stride);
2860
13ff50c8
NC
2861int regmap_parse_val(struct regmap *map, const void *buf,
2862 unsigned int *val)
2863{
2864 if (!map->format.parse_val)
2865 return -EINVAL;
2866
2867 *val = map->format.parse_val(buf);
2868
2869 return 0;
2870}
2871EXPORT_SYMBOL_GPL(regmap_parse_val);
2872
31244e39
MB
2873static int __init regmap_initcall(void)
2874{
2875 regmap_debugfs_initcall();
2876
2877 return 0;
2878}
2879postcore_initcall(regmap_initcall);