regmap: include linux/sched.h to fix build
[linux-block.git] / drivers / base / regmap / regmap.c
CommitLineData
b83a313b
MB
1/*
2 * Register map access API
3 *
4 * Copyright 2011 Wolfson Microelectronics plc
5 *
6 * Author: Mark Brown <broonie@opensource.wolfsonmicro.com>
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
f5d6eba7 13#include <linux/device.h>
b83a313b 14#include <linux/slab.h>
19694b5e 15#include <linux/export.h>
b83a313b
MB
16#include <linux/mutex.h>
17#include <linux/err.h>
6863ca62 18#include <linux/rbtree.h>
30b2a553 19#include <linux/sched.h>
b83a313b 20
fb2736bb
MB
21#define CREATE_TRACE_POINTS
22#include <trace/events/regmap.h>
23
93de9124 24#include "internal.h"
b83a313b 25
1044c180
MB
26/*
27 * Sometimes for failures during very early init the trace
28 * infrastructure isn't available early enough to be used. For this
29 * sort of problem defining LOG_DEVICE will add printks for basic
30 * register I/O on a specific device.
31 */
32#undef LOG_DEVICE
33
34static int _regmap_update_bits(struct regmap *map, unsigned int reg,
35 unsigned int mask, unsigned int val,
36 bool *change);
37
ad278406
AS
38static int _regmap_bus_read(void *context, unsigned int reg,
39 unsigned int *val);
07c320dc
AS
40static int _regmap_bus_formatted_write(void *context, unsigned int reg,
41 unsigned int val);
42static int _regmap_bus_raw_write(void *context, unsigned int reg,
43 unsigned int val);
ad278406 44
0d509f2b
MB
45static void async_cleanup(struct work_struct *work)
46{
47 struct regmap_async *async = container_of(work, struct regmap_async,
48 cleanup);
49
50 kfree(async->work_buf);
51 kfree(async);
52}
53
76aad392
DC
54bool regmap_reg_in_ranges(unsigned int reg,
55 const struct regmap_range *ranges,
56 unsigned int nranges)
57{
58 const struct regmap_range *r;
59 int i;
60
61 for (i = 0, r = ranges; i < nranges; i++, r++)
62 if (regmap_reg_in_range(reg, r))
63 return true;
64 return false;
65}
66EXPORT_SYMBOL_GPL(regmap_reg_in_ranges);
67
68static bool _regmap_check_range_table(struct regmap *map,
69 unsigned int reg,
70 const struct regmap_access_table *table)
71{
72 /* Check "no ranges" first */
73 if (regmap_reg_in_ranges(reg, table->no_ranges, table->n_no_ranges))
74 return false;
75
76 /* In case zero "yes ranges" are supplied, any reg is OK */
77 if (!table->n_yes_ranges)
78 return true;
79
80 return regmap_reg_in_ranges(reg, table->yes_ranges,
81 table->n_yes_ranges);
82}
83
8de2f081
MB
84bool regmap_writeable(struct regmap *map, unsigned int reg)
85{
86 if (map->max_register && reg > map->max_register)
87 return false;
88
89 if (map->writeable_reg)
90 return map->writeable_reg(map->dev, reg);
91
76aad392
DC
92 if (map->wr_table)
93 return _regmap_check_range_table(map, reg, map->wr_table);
94
8de2f081
MB
95 return true;
96}
97
98bool regmap_readable(struct regmap *map, unsigned int reg)
99{
100 if (map->max_register && reg > map->max_register)
101 return false;
102
4191f197
WS
103 if (map->format.format_write)
104 return false;
105
8de2f081
MB
106 if (map->readable_reg)
107 return map->readable_reg(map->dev, reg);
108
76aad392
DC
109 if (map->rd_table)
110 return _regmap_check_range_table(map, reg, map->rd_table);
111
8de2f081
MB
112 return true;
113}
114
115bool regmap_volatile(struct regmap *map, unsigned int reg)
116{
4191f197 117 if (!regmap_readable(map, reg))
8de2f081
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118 return false;
119
120 if (map->volatile_reg)
121 return map->volatile_reg(map->dev, reg);
122
76aad392
DC
123 if (map->volatile_table)
124 return _regmap_check_range_table(map, reg, map->volatile_table);
125
8de2f081
MB
126 return true;
127}
128
129bool regmap_precious(struct regmap *map, unsigned int reg)
130{
4191f197 131 if (!regmap_readable(map, reg))
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132 return false;
133
134 if (map->precious_reg)
135 return map->precious_reg(map->dev, reg);
136
76aad392
DC
137 if (map->precious_table)
138 return _regmap_check_range_table(map, reg, map->precious_table);
139
8de2f081
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140 return false;
141}
142
82cd9965 143static bool regmap_volatile_range(struct regmap *map, unsigned int reg,
a8f28cfa 144 size_t num)
82cd9965
LPC
145{
146 unsigned int i;
147
148 for (i = 0; i < num; i++)
149 if (!regmap_volatile(map, reg + i))
150 return false;
151
152 return true;
153}
154
9aa50750
WS
155static void regmap_format_2_6_write(struct regmap *map,
156 unsigned int reg, unsigned int val)
157{
158 u8 *out = map->work_buf;
159
160 *out = (reg << 6) | val;
161}
162
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163static void regmap_format_4_12_write(struct regmap *map,
164 unsigned int reg, unsigned int val)
165{
166 __be16 *out = map->work_buf;
167 *out = cpu_to_be16((reg << 12) | val);
168}
169
170static void regmap_format_7_9_write(struct regmap *map,
171 unsigned int reg, unsigned int val)
172{
173 __be16 *out = map->work_buf;
174 *out = cpu_to_be16((reg << 9) | val);
175}
176
7e5ec63e
LPC
177static void regmap_format_10_14_write(struct regmap *map,
178 unsigned int reg, unsigned int val)
179{
180 u8 *out = map->work_buf;
181
182 out[2] = val;
183 out[1] = (val >> 8) | (reg << 6);
184 out[0] = reg >> 2;
185}
186
d939fb9a 187static void regmap_format_8(void *buf, unsigned int val, unsigned int shift)
b83a313b
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188{
189 u8 *b = buf;
190
d939fb9a 191 b[0] = val << shift;
b83a313b
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192}
193
141eba2e 194static void regmap_format_16_be(void *buf, unsigned int val, unsigned int shift)
b83a313b
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195{
196 __be16 *b = buf;
197
d939fb9a 198 b[0] = cpu_to_be16(val << shift);
b83a313b
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199}
200
141eba2e
SW
201static void regmap_format_16_native(void *buf, unsigned int val,
202 unsigned int shift)
203{
204 *(u16 *)buf = val << shift;
205}
206
d939fb9a 207static void regmap_format_24(void *buf, unsigned int val, unsigned int shift)
ea279fc5
MR
208{
209 u8 *b = buf;
210
d939fb9a
MR
211 val <<= shift;
212
ea279fc5
MR
213 b[0] = val >> 16;
214 b[1] = val >> 8;
215 b[2] = val;
216}
217
141eba2e 218static void regmap_format_32_be(void *buf, unsigned int val, unsigned int shift)
7d5e525b
MB
219{
220 __be32 *b = buf;
221
d939fb9a 222 b[0] = cpu_to_be32(val << shift);
7d5e525b
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223}
224
141eba2e
SW
225static void regmap_format_32_native(void *buf, unsigned int val,
226 unsigned int shift)
227{
228 *(u32 *)buf = val << shift;
229}
230
b83a313b
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231static unsigned int regmap_parse_8(void *buf)
232{
233 u8 *b = buf;
234
235 return b[0];
236}
237
141eba2e 238static unsigned int regmap_parse_16_be(void *buf)
b83a313b
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239{
240 __be16 *b = buf;
241
242 b[0] = be16_to_cpu(b[0]);
243
244 return b[0];
245}
246
141eba2e
SW
247static unsigned int regmap_parse_16_native(void *buf)
248{
249 return *(u16 *)buf;
250}
251
ea279fc5
MR
252static unsigned int regmap_parse_24(void *buf)
253{
254 u8 *b = buf;
255 unsigned int ret = b[2];
256 ret |= ((unsigned int)b[1]) << 8;
257 ret |= ((unsigned int)b[0]) << 16;
258
259 return ret;
260}
261
141eba2e 262static unsigned int regmap_parse_32_be(void *buf)
7d5e525b
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263{
264 __be32 *b = buf;
265
266 b[0] = be32_to_cpu(b[0]);
267
268 return b[0];
269}
270
141eba2e
SW
271static unsigned int regmap_parse_32_native(void *buf)
272{
273 return *(u32 *)buf;
274}
275
0d4529c5 276static void regmap_lock_mutex(void *__map)
bacdbe07 277{
0d4529c5 278 struct regmap *map = __map;
bacdbe07
SW
279 mutex_lock(&map->mutex);
280}
281
0d4529c5 282static void regmap_unlock_mutex(void *__map)
bacdbe07 283{
0d4529c5 284 struct regmap *map = __map;
bacdbe07
SW
285 mutex_unlock(&map->mutex);
286}
287
0d4529c5 288static void regmap_lock_spinlock(void *__map)
bacdbe07 289{
0d4529c5 290 struct regmap *map = __map;
bacdbe07
SW
291 spin_lock(&map->spinlock);
292}
293
0d4529c5 294static void regmap_unlock_spinlock(void *__map)
bacdbe07 295{
0d4529c5 296 struct regmap *map = __map;
bacdbe07
SW
297 spin_unlock(&map->spinlock);
298}
299
72b39f6f
MB
300static void dev_get_regmap_release(struct device *dev, void *res)
301{
302 /*
303 * We don't actually have anything to do here; the goal here
304 * is not to manage the regmap but to provide a simple way to
305 * get the regmap back given a struct device.
306 */
307}
308
6863ca62
KG
309static bool _regmap_range_add(struct regmap *map,
310 struct regmap_range_node *data)
311{
312 struct rb_root *root = &map->range_tree;
313 struct rb_node **new = &(root->rb_node), *parent = NULL;
314
315 while (*new) {
316 struct regmap_range_node *this =
317 container_of(*new, struct regmap_range_node, node);
318
319 parent = *new;
320 if (data->range_max < this->range_min)
321 new = &((*new)->rb_left);
322 else if (data->range_min > this->range_max)
323 new = &((*new)->rb_right);
324 else
325 return false;
326 }
327
328 rb_link_node(&data->node, parent, new);
329 rb_insert_color(&data->node, root);
330
331 return true;
332}
333
334static struct regmap_range_node *_regmap_range_lookup(struct regmap *map,
335 unsigned int reg)
336{
337 struct rb_node *node = map->range_tree.rb_node;
338
339 while (node) {
340 struct regmap_range_node *this =
341 container_of(node, struct regmap_range_node, node);
342
343 if (reg < this->range_min)
344 node = node->rb_left;
345 else if (reg > this->range_max)
346 node = node->rb_right;
347 else
348 return this;
349 }
350
351 return NULL;
352}
353
354static void regmap_range_exit(struct regmap *map)
355{
356 struct rb_node *next;
357 struct regmap_range_node *range_node;
358
359 next = rb_first(&map->range_tree);
360 while (next) {
361 range_node = rb_entry(next, struct regmap_range_node, node);
362 next = rb_next(&range_node->node);
363 rb_erase(&range_node->node, &map->range_tree);
364 kfree(range_node);
365 }
366
367 kfree(map->selector_work_buf);
368}
369
b83a313b
MB
370/**
371 * regmap_init(): Initialise register map
372 *
373 * @dev: Device that will be interacted with
374 * @bus: Bus-specific callbacks to use with device
0135bbcc 375 * @bus_context: Data passed to bus-specific callbacks
b83a313b
MB
376 * @config: Configuration for register map
377 *
378 * The return value will be an ERR_PTR() on error or a valid pointer to
379 * a struct regmap. This function should generally not be called
380 * directly, it should be called by bus-specific init functions.
381 */
382struct regmap *regmap_init(struct device *dev,
383 const struct regmap_bus *bus,
0135bbcc 384 void *bus_context,
b83a313b
MB
385 const struct regmap_config *config)
386{
72b39f6f 387 struct regmap *map, **m;
b83a313b 388 int ret = -EINVAL;
141eba2e 389 enum regmap_endian reg_endian, val_endian;
6863ca62 390 int i, j;
b83a313b
MB
391
392 if (!bus || !config)
abbb18fb 393 goto err;
b83a313b
MB
394
395 map = kzalloc(sizeof(*map), GFP_KERNEL);
396 if (map == NULL) {
397 ret = -ENOMEM;
398 goto err;
399 }
400
0d4529c5
DC
401 if (config->lock && config->unlock) {
402 map->lock = config->lock;
403 map->unlock = config->unlock;
404 map->lock_arg = config->lock_arg;
bacdbe07 405 } else {
0d4529c5
DC
406 if (bus->fast_io) {
407 spin_lock_init(&map->spinlock);
408 map->lock = regmap_lock_spinlock;
409 map->unlock = regmap_unlock_spinlock;
410 } else {
411 mutex_init(&map->mutex);
412 map->lock = regmap_lock_mutex;
413 map->unlock = regmap_unlock_mutex;
414 }
415 map->lock_arg = map;
bacdbe07 416 }
c212accc 417 map->format.reg_bytes = DIV_ROUND_UP(config->reg_bits, 8);
82159ba8 418 map->format.pad_bytes = config->pad_bits / 8;
c212accc 419 map->format.val_bytes = DIV_ROUND_UP(config->val_bits, 8);
5494a98f
FE
420 map->format.buf_size = DIV_ROUND_UP(config->reg_bits +
421 config->val_bits + config->pad_bits, 8);
d939fb9a 422 map->reg_shift = config->pad_bits % 8;
f01ee60f
SW
423 if (config->reg_stride)
424 map->reg_stride = config->reg_stride;
425 else
426 map->reg_stride = 1;
2e33caf1 427 map->use_single_rw = config->use_single_rw;
b83a313b
MB
428 map->dev = dev;
429 map->bus = bus;
0135bbcc 430 map->bus_context = bus_context;
2e2ae66d 431 map->max_register = config->max_register;
76aad392
DC
432 map->wr_table = config->wr_table;
433 map->rd_table = config->rd_table;
434 map->volatile_table = config->volatile_table;
435 map->precious_table = config->precious_table;
2e2ae66d
MB
436 map->writeable_reg = config->writeable_reg;
437 map->readable_reg = config->readable_reg;
438 map->volatile_reg = config->volatile_reg;
2efe1642 439 map->precious_reg = config->precious_reg;
5d1729e7 440 map->cache_type = config->cache_type;
72b39f6f 441 map->name = config->name;
b83a313b 442
0d509f2b
MB
443 spin_lock_init(&map->async_lock);
444 INIT_LIST_HEAD(&map->async_list);
445 init_waitqueue_head(&map->async_waitq);
446
6f306441
LPC
447 if (config->read_flag_mask || config->write_flag_mask) {
448 map->read_flag_mask = config->read_flag_mask;
449 map->write_flag_mask = config->write_flag_mask;
450 } else {
451 map->read_flag_mask = bus->read_flag_mask;
452 }
453
ad278406
AS
454 map->reg_read = _regmap_bus_read;
455
141eba2e
SW
456 reg_endian = config->reg_format_endian;
457 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
458 reg_endian = bus->reg_format_endian_default;
459 if (reg_endian == REGMAP_ENDIAN_DEFAULT)
460 reg_endian = REGMAP_ENDIAN_BIG;
461
462 val_endian = config->val_format_endian;
463 if (val_endian == REGMAP_ENDIAN_DEFAULT)
464 val_endian = bus->val_format_endian_default;
465 if (val_endian == REGMAP_ENDIAN_DEFAULT)
466 val_endian = REGMAP_ENDIAN_BIG;
467
d939fb9a 468 switch (config->reg_bits + map->reg_shift) {
9aa50750
WS
469 case 2:
470 switch (config->val_bits) {
471 case 6:
472 map->format.format_write = regmap_format_2_6_write;
473 break;
474 default:
475 goto err_map;
476 }
477 break;
478
b83a313b
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479 case 4:
480 switch (config->val_bits) {
481 case 12:
482 map->format.format_write = regmap_format_4_12_write;
483 break;
484 default:
485 goto err_map;
486 }
487 break;
488
489 case 7:
490 switch (config->val_bits) {
491 case 9:
492 map->format.format_write = regmap_format_7_9_write;
493 break;
494 default:
495 goto err_map;
496 }
497 break;
498
7e5ec63e
LPC
499 case 10:
500 switch (config->val_bits) {
501 case 14:
502 map->format.format_write = regmap_format_10_14_write;
503 break;
504 default:
505 goto err_map;
506 }
507 break;
508
b83a313b
MB
509 case 8:
510 map->format.format_reg = regmap_format_8;
511 break;
512
513 case 16:
141eba2e
SW
514 switch (reg_endian) {
515 case REGMAP_ENDIAN_BIG:
516 map->format.format_reg = regmap_format_16_be;
517 break;
518 case REGMAP_ENDIAN_NATIVE:
519 map->format.format_reg = regmap_format_16_native;
520 break;
521 default:
522 goto err_map;
523 }
b83a313b
MB
524 break;
525
7d5e525b 526 case 32:
141eba2e
SW
527 switch (reg_endian) {
528 case REGMAP_ENDIAN_BIG:
529 map->format.format_reg = regmap_format_32_be;
530 break;
531 case REGMAP_ENDIAN_NATIVE:
532 map->format.format_reg = regmap_format_32_native;
533 break;
534 default:
535 goto err_map;
536 }
7d5e525b
MB
537 break;
538
b83a313b
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539 default:
540 goto err_map;
541 }
542
543 switch (config->val_bits) {
544 case 8:
545 map->format.format_val = regmap_format_8;
546 map->format.parse_val = regmap_parse_8;
547 break;
548 case 16:
141eba2e
SW
549 switch (val_endian) {
550 case REGMAP_ENDIAN_BIG:
551 map->format.format_val = regmap_format_16_be;
552 map->format.parse_val = regmap_parse_16_be;
553 break;
554 case REGMAP_ENDIAN_NATIVE:
555 map->format.format_val = regmap_format_16_native;
556 map->format.parse_val = regmap_parse_16_native;
557 break;
558 default:
559 goto err_map;
560 }
b83a313b 561 break;
ea279fc5 562 case 24:
141eba2e
SW
563 if (val_endian != REGMAP_ENDIAN_BIG)
564 goto err_map;
ea279fc5
MR
565 map->format.format_val = regmap_format_24;
566 map->format.parse_val = regmap_parse_24;
567 break;
7d5e525b 568 case 32:
141eba2e
SW
569 switch (val_endian) {
570 case REGMAP_ENDIAN_BIG:
571 map->format.format_val = regmap_format_32_be;
572 map->format.parse_val = regmap_parse_32_be;
573 break;
574 case REGMAP_ENDIAN_NATIVE:
575 map->format.format_val = regmap_format_32_native;
576 map->format.parse_val = regmap_parse_32_native;
577 break;
578 default:
579 goto err_map;
580 }
7d5e525b 581 break;
b83a313b
MB
582 }
583
141eba2e
SW
584 if (map->format.format_write) {
585 if ((reg_endian != REGMAP_ENDIAN_BIG) ||
586 (val_endian != REGMAP_ENDIAN_BIG))
587 goto err_map;
7a647614 588 map->use_single_rw = true;
141eba2e 589 }
7a647614 590
b83a313b
MB
591 if (!map->format.format_write &&
592 !(map->format.format_reg && map->format.format_val))
593 goto err_map;
594
82159ba8 595 map->work_buf = kzalloc(map->format.buf_size, GFP_KERNEL);
b83a313b
MB
596 if (map->work_buf == NULL) {
597 ret = -ENOMEM;
5204f5e3 598 goto err_map;
b83a313b
MB
599 }
600
07c320dc
AS
601 if (map->format.format_write)
602 map->reg_write = _regmap_bus_formatted_write;
603 else if (map->format.format_val)
604 map->reg_write = _regmap_bus_raw_write;
605
6863ca62 606 map->range_tree = RB_ROOT;
e3549cd0 607 for (i = 0; i < config->num_ranges; i++) {
6863ca62
KG
608 const struct regmap_range_cfg *range_cfg = &config->ranges[i];
609 struct regmap_range_node *new;
610
611 /* Sanity check */
061adc06
MB
612 if (range_cfg->range_max < range_cfg->range_min) {
613 dev_err(map->dev, "Invalid range %d: %d < %d\n", i,
614 range_cfg->range_max, range_cfg->range_min);
6863ca62 615 goto err_range;
061adc06
MB
616 }
617
618 if (range_cfg->range_max > map->max_register) {
619 dev_err(map->dev, "Invalid range %d: %d > %d\n", i,
620 range_cfg->range_max, map->max_register);
621 goto err_range;
622 }
623
624 if (range_cfg->selector_reg > map->max_register) {
625 dev_err(map->dev,
626 "Invalid range %d: selector out of map\n", i);
627 goto err_range;
628 }
629
630 if (range_cfg->window_len == 0) {
631 dev_err(map->dev, "Invalid range %d: window_len 0\n",
632 i);
633 goto err_range;
634 }
6863ca62
KG
635
636 /* Make sure, that this register range has no selector
637 or data window within its boundary */
e3549cd0 638 for (j = 0; j < config->num_ranges; j++) {
6863ca62
KG
639 unsigned sel_reg = config->ranges[j].selector_reg;
640 unsigned win_min = config->ranges[j].window_start;
641 unsigned win_max = win_min +
642 config->ranges[j].window_len - 1;
643
644 if (range_cfg->range_min <= sel_reg &&
645 sel_reg <= range_cfg->range_max) {
061adc06
MB
646 dev_err(map->dev,
647 "Range %d: selector for %d in window\n",
648 i, j);
6863ca62
KG
649 goto err_range;
650 }
651
652 if (!(win_max < range_cfg->range_min ||
653 win_min > range_cfg->range_max)) {
061adc06
MB
654 dev_err(map->dev,
655 "Range %d: window for %d in window\n",
656 i, j);
6863ca62
KG
657 goto err_range;
658 }
659 }
660
661 new = kzalloc(sizeof(*new), GFP_KERNEL);
662 if (new == NULL) {
663 ret = -ENOMEM;
664 goto err_range;
665 }
666
4b020b3f 667 new->map = map;
d058bb49 668 new->name = range_cfg->name;
6863ca62
KG
669 new->range_min = range_cfg->range_min;
670 new->range_max = range_cfg->range_max;
671 new->selector_reg = range_cfg->selector_reg;
672 new->selector_mask = range_cfg->selector_mask;
673 new->selector_shift = range_cfg->selector_shift;
674 new->window_start = range_cfg->window_start;
675 new->window_len = range_cfg->window_len;
676
677 if (_regmap_range_add(map, new) == false) {
061adc06 678 dev_err(map->dev, "Failed to add range %d\n", i);
6863ca62
KG
679 kfree(new);
680 goto err_range;
681 }
682
683 if (map->selector_work_buf == NULL) {
684 map->selector_work_buf =
685 kzalloc(map->format.buf_size, GFP_KERNEL);
686 if (map->selector_work_buf == NULL) {
687 ret = -ENOMEM;
688 goto err_range;
689 }
690 }
691 }
052d2cd1 692
e5e3b8ab 693 ret = regcache_init(map, config);
0ff3e62f 694 if (ret != 0)
6863ca62
KG
695 goto err_range;
696
697 regmap_debugfs_init(map, config->name);
5d1729e7 698
72b39f6f
MB
699 /* Add a devres resource for dev_get_regmap() */
700 m = devres_alloc(dev_get_regmap_release, sizeof(*m), GFP_KERNEL);
701 if (!m) {
702 ret = -ENOMEM;
6863ca62 703 goto err_debugfs;
72b39f6f
MB
704 }
705 *m = map;
706 devres_add(dev, m);
707
b83a313b
MB
708 return map;
709
bfaa25f3
SW
710err_debugfs:
711 regmap_debugfs_exit(map);
72b39f6f 712 regcache_exit(map);
6863ca62
KG
713err_range:
714 regmap_range_exit(map);
58072cbf 715 kfree(map->work_buf);
b83a313b
MB
716err_map:
717 kfree(map);
718err:
719 return ERR_PTR(ret);
720}
721EXPORT_SYMBOL_GPL(regmap_init);
722
c0eb4676
MB
723static void devm_regmap_release(struct device *dev, void *res)
724{
725 regmap_exit(*(struct regmap **)res);
726}
727
728/**
729 * devm_regmap_init(): Initialise managed register map
730 *
731 * @dev: Device that will be interacted with
732 * @bus: Bus-specific callbacks to use with device
0135bbcc 733 * @bus_context: Data passed to bus-specific callbacks
c0eb4676
MB
734 * @config: Configuration for register map
735 *
736 * The return value will be an ERR_PTR() on error or a valid pointer
737 * to a struct regmap. This function should generally not be called
738 * directly, it should be called by bus-specific init functions. The
739 * map will be automatically freed by the device management code.
740 */
741struct regmap *devm_regmap_init(struct device *dev,
742 const struct regmap_bus *bus,
0135bbcc 743 void *bus_context,
c0eb4676
MB
744 const struct regmap_config *config)
745{
746 struct regmap **ptr, *regmap;
747
748 ptr = devres_alloc(devm_regmap_release, sizeof(*ptr), GFP_KERNEL);
749 if (!ptr)
750 return ERR_PTR(-ENOMEM);
751
0135bbcc 752 regmap = regmap_init(dev, bus, bus_context, config);
c0eb4676
MB
753 if (!IS_ERR(regmap)) {
754 *ptr = regmap;
755 devres_add(dev, ptr);
756 } else {
757 devres_free(ptr);
758 }
759
760 return regmap;
761}
762EXPORT_SYMBOL_GPL(devm_regmap_init);
763
bf315173
MB
764/**
765 * regmap_reinit_cache(): Reinitialise the current register cache
766 *
767 * @map: Register map to operate on.
768 * @config: New configuration. Only the cache data will be used.
769 *
770 * Discard any existing register cache for the map and initialize a
771 * new cache. This can be used to restore the cache to defaults or to
772 * update the cache configuration to reflect runtime discovery of the
773 * hardware.
4d879514
DP
774 *
775 * No explicit locking is done here, the user needs to ensure that
776 * this function will not race with other calls to regmap.
bf315173
MB
777 */
778int regmap_reinit_cache(struct regmap *map, const struct regmap_config *config)
779{
bf315173 780 regcache_exit(map);
a24f64a6 781 regmap_debugfs_exit(map);
bf315173
MB
782
783 map->max_register = config->max_register;
784 map->writeable_reg = config->writeable_reg;
785 map->readable_reg = config->readable_reg;
786 map->volatile_reg = config->volatile_reg;
787 map->precious_reg = config->precious_reg;
788 map->cache_type = config->cache_type;
789
d3c242e1 790 regmap_debugfs_init(map, config->name);
a24f64a6 791
421e8d2d
MB
792 map->cache_bypass = false;
793 map->cache_only = false;
794
4d879514 795 return regcache_init(map, config);
bf315173 796}
752a6a5f 797EXPORT_SYMBOL_GPL(regmap_reinit_cache);
bf315173 798
b83a313b
MB
799/**
800 * regmap_exit(): Free a previously allocated register map
801 */
802void regmap_exit(struct regmap *map)
803{
5d1729e7 804 regcache_exit(map);
31244e39 805 regmap_debugfs_exit(map);
6863ca62 806 regmap_range_exit(map);
0135bbcc
SW
807 if (map->bus->free_context)
808 map->bus->free_context(map->bus_context);
b83a313b 809 kfree(map->work_buf);
b83a313b
MB
810 kfree(map);
811}
812EXPORT_SYMBOL_GPL(regmap_exit);
813
72b39f6f
MB
814static int dev_get_regmap_match(struct device *dev, void *res, void *data)
815{
816 struct regmap **r = res;
817 if (!r || !*r) {
818 WARN_ON(!r || !*r);
819 return 0;
820 }
821
822 /* If the user didn't specify a name match any */
823 if (data)
824 return (*r)->name == data;
825 else
826 return 1;
827}
828
829/**
830 * dev_get_regmap(): Obtain the regmap (if any) for a device
831 *
832 * @dev: Device to retrieve the map for
833 * @name: Optional name for the register map, usually NULL.
834 *
835 * Returns the regmap for the device if one is present, or NULL. If
836 * name is specified then it must match the name specified when
837 * registering the device, if it is NULL then the first regmap found
838 * will be used. Devices with multiple register maps are very rare,
839 * generic code should normally not need to specify a name.
840 */
841struct regmap *dev_get_regmap(struct device *dev, const char *name)
842{
843 struct regmap **r = devres_find(dev, dev_get_regmap_release,
844 dev_get_regmap_match, (void *)name);
845
846 if (!r)
847 return NULL;
848 return *r;
849}
850EXPORT_SYMBOL_GPL(dev_get_regmap);
851
6863ca62 852static int _regmap_select_page(struct regmap *map, unsigned int *reg,
98bc7dfd 853 struct regmap_range_node *range,
6863ca62
KG
854 unsigned int val_num)
855{
6863ca62
KG
856 void *orig_work_buf;
857 unsigned int win_offset;
858 unsigned int win_page;
859 bool page_chg;
860 int ret;
861
98bc7dfd
MB
862 win_offset = (*reg - range->range_min) % range->window_len;
863 win_page = (*reg - range->range_min) / range->window_len;
6863ca62 864
98bc7dfd
MB
865 if (val_num > 1) {
866 /* Bulk write shouldn't cross range boundary */
867 if (*reg + val_num - 1 > range->range_max)
868 return -EINVAL;
6863ca62 869
98bc7dfd
MB
870 /* ... or single page boundary */
871 if (val_num > range->window_len - win_offset)
872 return -EINVAL;
873 }
6863ca62 874
98bc7dfd
MB
875 /* It is possible to have selector register inside data window.
876 In that case, selector register is located on every page and
877 it needs no page switching, when accessed alone. */
878 if (val_num > 1 ||
879 range->window_start + win_offset != range->selector_reg) {
880 /* Use separate work_buf during page switching */
881 orig_work_buf = map->work_buf;
882 map->work_buf = map->selector_work_buf;
6863ca62 883
98bc7dfd
MB
884 ret = _regmap_update_bits(map, range->selector_reg,
885 range->selector_mask,
886 win_page << range->selector_shift,
887 &page_chg);
632a5b01 888
98bc7dfd 889 map->work_buf = orig_work_buf;
6863ca62 890
0ff3e62f 891 if (ret != 0)
98bc7dfd 892 return ret;
6863ca62
KG
893 }
894
98bc7dfd
MB
895 *reg = range->window_start + win_offset;
896
6863ca62
KG
897 return 0;
898}
899
b83a313b 900static int _regmap_raw_write(struct regmap *map, unsigned int reg,
0d509f2b 901 const void *val, size_t val_len, bool async)
b83a313b 902{
98bc7dfd 903 struct regmap_range_node *range;
0d509f2b 904 unsigned long flags;
6f306441 905 u8 *u8 = map->work_buf;
0d509f2b
MB
906 void *work_val = map->work_buf + map->format.reg_bytes +
907 map->format.pad_bytes;
b83a313b
MB
908 void *buf;
909 int ret = -ENOTSUPP;
910 size_t len;
73304781
MB
911 int i;
912
913 /* Check for unwritable registers before we start */
914 if (map->writeable_reg)
915 for (i = 0; i < val_len / map->format.val_bytes; i++)
f01ee60f
SW
916 if (!map->writeable_reg(map->dev,
917 reg + (i * map->reg_stride)))
73304781 918 return -EINVAL;
b83a313b 919
c9157198
LD
920 if (!map->cache_bypass && map->format.parse_val) {
921 unsigned int ival;
922 int val_bytes = map->format.val_bytes;
923 for (i = 0; i < val_len / val_bytes; i++) {
924 memcpy(map->work_buf, val + (i * val_bytes), val_bytes);
925 ival = map->format.parse_val(map->work_buf);
f01ee60f
SW
926 ret = regcache_write(map, reg + (i * map->reg_stride),
927 ival);
c9157198
LD
928 if (ret) {
929 dev_err(map->dev,
6d04b8ac 930 "Error in caching of register: %x ret: %d\n",
c9157198
LD
931 reg + i, ret);
932 return ret;
933 }
934 }
935 if (map->cache_only) {
936 map->cache_dirty = true;
937 return 0;
938 }
939 }
940
98bc7dfd
MB
941 range = _regmap_range_lookup(map, reg);
942 if (range) {
8a2ceac6
MB
943 int val_num = val_len / map->format.val_bytes;
944 int win_offset = (reg - range->range_min) % range->window_len;
945 int win_residue = range->window_len - win_offset;
946
947 /* If the write goes beyond the end of the window split it */
948 while (val_num > win_residue) {
1a61cfe3 949 dev_dbg(map->dev, "Writing window %d/%zu\n",
8a2ceac6
MB
950 win_residue, val_len / map->format.val_bytes);
951 ret = _regmap_raw_write(map, reg, val, win_residue *
0d509f2b 952 map->format.val_bytes, async);
8a2ceac6
MB
953 if (ret != 0)
954 return ret;
955
956 reg += win_residue;
957 val_num -= win_residue;
958 val += win_residue * map->format.val_bytes;
959 val_len -= win_residue * map->format.val_bytes;
960
961 win_offset = (reg - range->range_min) %
962 range->window_len;
963 win_residue = range->window_len - win_offset;
964 }
965
966 ret = _regmap_select_page(map, &reg, range, val_num);
0ff3e62f 967 if (ret != 0)
98bc7dfd
MB
968 return ret;
969 }
6863ca62 970
d939fb9a 971 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b 972
6f306441
LPC
973 u8[0] |= map->write_flag_mask;
974
0d509f2b
MB
975 if (async && map->bus->async_write) {
976 struct regmap_async *async = map->bus->async_alloc();
977 if (!async)
978 return -ENOMEM;
979
980 async->work_buf = kzalloc(map->format.buf_size,
981 GFP_KERNEL | GFP_DMA);
982 if (!async->work_buf) {
983 kfree(async);
984 return -ENOMEM;
985 }
986
987 INIT_WORK(&async->cleanup, async_cleanup);
988 async->map = map;
989
990 /* If the caller supplied the value we can use it safely. */
991 memcpy(async->work_buf, map->work_buf, map->format.pad_bytes +
992 map->format.reg_bytes + map->format.val_bytes);
993 if (val == work_val)
994 val = async->work_buf + map->format.pad_bytes +
995 map->format.reg_bytes;
996
997 spin_lock_irqsave(&map->async_lock, flags);
998 list_add_tail(&async->list, &map->async_list);
999 spin_unlock_irqrestore(&map->async_lock, flags);
1000
1001 ret = map->bus->async_write(map->bus_context, async->work_buf,
1002 map->format.reg_bytes +
1003 map->format.pad_bytes,
1004 val, val_len, async);
1005
1006 if (ret != 0) {
1007 dev_err(map->dev, "Failed to schedule write: %d\n",
1008 ret);
1009
1010 spin_lock_irqsave(&map->async_lock, flags);
1011 list_del(&async->list);
1012 spin_unlock_irqrestore(&map->async_lock, flags);
1013
1014 kfree(async->work_buf);
1015 kfree(async);
1016 }
1017 }
1018
fb2736bb
MB
1019 trace_regmap_hw_write_start(map->dev, reg,
1020 val_len / map->format.val_bytes);
1021
2547e201
MB
1022 /* If we're doing a single register write we can probably just
1023 * send the work_buf directly, otherwise try to do a gather
1024 * write.
1025 */
0d509f2b 1026 if (val == work_val)
0135bbcc 1027 ret = map->bus->write(map->bus_context, map->work_buf,
82159ba8
MB
1028 map->format.reg_bytes +
1029 map->format.pad_bytes +
1030 val_len);
2547e201 1031 else if (map->bus->gather_write)
0135bbcc 1032 ret = map->bus->gather_write(map->bus_context, map->work_buf,
82159ba8
MB
1033 map->format.reg_bytes +
1034 map->format.pad_bytes,
b83a313b
MB
1035 val, val_len);
1036
2547e201 1037 /* If that didn't work fall back on linearising by hand. */
b83a313b 1038 if (ret == -ENOTSUPP) {
82159ba8
MB
1039 len = map->format.reg_bytes + map->format.pad_bytes + val_len;
1040 buf = kzalloc(len, GFP_KERNEL);
b83a313b
MB
1041 if (!buf)
1042 return -ENOMEM;
1043
1044 memcpy(buf, map->work_buf, map->format.reg_bytes);
82159ba8
MB
1045 memcpy(buf + map->format.reg_bytes + map->format.pad_bytes,
1046 val, val_len);
0135bbcc 1047 ret = map->bus->write(map->bus_context, buf, len);
b83a313b
MB
1048
1049 kfree(buf);
1050 }
1051
fb2736bb
MB
1052 trace_regmap_hw_write_done(map->dev, reg,
1053 val_len / map->format.val_bytes);
1054
b83a313b
MB
1055 return ret;
1056}
1057
07c320dc
AS
1058static int _regmap_bus_formatted_write(void *context, unsigned int reg,
1059 unsigned int val)
1060{
1061 int ret;
1062 struct regmap_range_node *range;
1063 struct regmap *map = context;
1064
1065 BUG_ON(!map->format.format_write);
1066
1067 range = _regmap_range_lookup(map, reg);
1068 if (range) {
1069 ret = _regmap_select_page(map, &reg, range, 1);
1070 if (ret != 0)
1071 return ret;
1072 }
1073
1074 map->format.format_write(map, reg, val);
1075
1076 trace_regmap_hw_write_start(map->dev, reg, 1);
1077
1078 ret = map->bus->write(map->bus_context, map->work_buf,
1079 map->format.buf_size);
1080
1081 trace_regmap_hw_write_done(map->dev, reg, 1);
1082
1083 return ret;
1084}
1085
1086static int _regmap_bus_raw_write(void *context, unsigned int reg,
1087 unsigned int val)
1088{
1089 struct regmap *map = context;
1090
1091 BUG_ON(!map->format.format_val);
1092
1093 map->format.format_val(map->work_buf + map->format.reg_bytes
1094 + map->format.pad_bytes, val, 0);
1095 return _regmap_raw_write(map, reg,
1096 map->work_buf +
1097 map->format.reg_bytes +
1098 map->format.pad_bytes,
0d509f2b 1099 map->format.val_bytes, false);
07c320dc
AS
1100}
1101
4d2dc095
DP
1102int _regmap_write(struct regmap *map, unsigned int reg,
1103 unsigned int val)
b83a313b 1104{
fb2736bb 1105 int ret;
b83a313b 1106
c9157198 1107 if (!map->cache_bypass && map->format.format_write) {
5d1729e7
DP
1108 ret = regcache_write(map, reg, val);
1109 if (ret != 0)
1110 return ret;
8ae0d7e8
MB
1111 if (map->cache_only) {
1112 map->cache_dirty = true;
5d1729e7 1113 return 0;
8ae0d7e8 1114 }
5d1729e7
DP
1115 }
1116
1044c180
MB
1117#ifdef LOG_DEVICE
1118 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1119 dev_info(map->dev, "%x <= %x\n", reg, val);
1120#endif
1121
fb2736bb
MB
1122 trace_regmap_reg_write(map->dev, reg, val);
1123
07c320dc 1124 return map->reg_write(map, reg, val);
b83a313b
MB
1125}
1126
1127/**
1128 * regmap_write(): Write a value to a single register
1129 *
1130 * @map: Register map to write to
1131 * @reg: Register to write to
1132 * @val: Value to be written
1133 *
1134 * A value of zero will be returned on success, a negative errno will
1135 * be returned in error cases.
1136 */
1137int regmap_write(struct regmap *map, unsigned int reg, unsigned int val)
1138{
1139 int ret;
1140
f01ee60f
SW
1141 if (reg % map->reg_stride)
1142 return -EINVAL;
1143
0d4529c5 1144 map->lock(map->lock_arg);
b83a313b
MB
1145
1146 ret = _regmap_write(map, reg, val);
1147
0d4529c5 1148 map->unlock(map->lock_arg);
b83a313b
MB
1149
1150 return ret;
1151}
1152EXPORT_SYMBOL_GPL(regmap_write);
1153
1154/**
1155 * regmap_raw_write(): Write raw values to one or more registers
1156 *
1157 * @map: Register map to write to
1158 * @reg: Initial register to write to
1159 * @val: Block of data to be written, laid out for direct transmission to the
1160 * device
1161 * @val_len: Length of data pointed to by val.
1162 *
1163 * This function is intended to be used for things like firmware
1164 * download where a large block of data needs to be transferred to the
1165 * device. No formatting will be done on the data provided.
1166 *
1167 * A value of zero will be returned on success, a negative errno will
1168 * be returned in error cases.
1169 */
1170int regmap_raw_write(struct regmap *map, unsigned int reg,
1171 const void *val, size_t val_len)
1172{
1173 int ret;
1174
851960ba
SW
1175 if (val_len % map->format.val_bytes)
1176 return -EINVAL;
f01ee60f
SW
1177 if (reg % map->reg_stride)
1178 return -EINVAL;
851960ba 1179
0d4529c5 1180 map->lock(map->lock_arg);
b83a313b 1181
0d509f2b 1182 ret = _regmap_raw_write(map, reg, val, val_len, false);
b83a313b 1183
0d4529c5 1184 map->unlock(map->lock_arg);
b83a313b
MB
1185
1186 return ret;
1187}
1188EXPORT_SYMBOL_GPL(regmap_raw_write);
1189
8eaeb219
LD
1190/*
1191 * regmap_bulk_write(): Write multiple registers to the device
1192 *
1193 * @map: Register map to write to
1194 * @reg: First register to be write from
1195 * @val: Block of data to be written, in native register size for device
1196 * @val_count: Number of registers to write
1197 *
1198 * This function is intended to be used for writing a large block of
1199 * data to be device either in single transfer or multiple transfer.
1200 *
1201 * A value of zero will be returned on success, a negative errno will
1202 * be returned in error cases.
1203 */
1204int regmap_bulk_write(struct regmap *map, unsigned int reg, const void *val,
1205 size_t val_count)
1206{
1207 int ret = 0, i;
1208 size_t val_bytes = map->format.val_bytes;
1209 void *wval;
1210
1211 if (!map->format.parse_val)
1212 return -EINVAL;
f01ee60f
SW
1213 if (reg % map->reg_stride)
1214 return -EINVAL;
8eaeb219 1215
0d4529c5 1216 map->lock(map->lock_arg);
8eaeb219
LD
1217
1218 /* No formatting is require if val_byte is 1 */
1219 if (val_bytes == 1) {
1220 wval = (void *)val;
1221 } else {
1222 wval = kmemdup(val, val_count * val_bytes, GFP_KERNEL);
1223 if (!wval) {
1224 ret = -ENOMEM;
1225 dev_err(map->dev, "Error in memory allocation\n");
1226 goto out;
1227 }
1228 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1229 map->format.parse_val(wval + i);
1230 }
2e33caf1
AJ
1231 /*
1232 * Some devices does not support bulk write, for
1233 * them we have a series of single write operations.
1234 */
1235 if (map->use_single_rw) {
1236 for (i = 0; i < val_count; i++) {
1237 ret = regmap_raw_write(map,
0d509f2b
MB
1238 reg + (i * map->reg_stride),
1239 val + (i * val_bytes),
1240 val_bytes);
2e33caf1
AJ
1241 if (ret != 0)
1242 return ret;
1243 }
1244 } else {
0d509f2b
MB
1245 ret = _regmap_raw_write(map, reg, wval, val_bytes * val_count,
1246 false);
2e33caf1 1247 }
8eaeb219
LD
1248
1249 if (val_bytes != 1)
1250 kfree(wval);
1251
1252out:
0d4529c5 1253 map->unlock(map->lock_arg);
8eaeb219
LD
1254 return ret;
1255}
1256EXPORT_SYMBOL_GPL(regmap_bulk_write);
1257
0d509f2b
MB
1258/**
1259 * regmap_raw_write_async(): Write raw values to one or more registers
1260 * asynchronously
1261 *
1262 * @map: Register map to write to
1263 * @reg: Initial register to write to
1264 * @val: Block of data to be written, laid out for direct transmission to the
1265 * device. Must be valid until regmap_async_complete() is called.
1266 * @val_len: Length of data pointed to by val.
1267 *
1268 * This function is intended to be used for things like firmware
1269 * download where a large block of data needs to be transferred to the
1270 * device. No formatting will be done on the data provided.
1271 *
1272 * If supported by the underlying bus the write will be scheduled
1273 * asynchronously, helping maximise I/O speed on higher speed buses
1274 * like SPI. regmap_async_complete() can be called to ensure that all
1275 * asynchrnous writes have been completed.
1276 *
1277 * A value of zero will be returned on success, a negative errno will
1278 * be returned in error cases.
1279 */
1280int regmap_raw_write_async(struct regmap *map, unsigned int reg,
1281 const void *val, size_t val_len)
1282{
1283 int ret;
1284
1285 if (val_len % map->format.val_bytes)
1286 return -EINVAL;
1287 if (reg % map->reg_stride)
1288 return -EINVAL;
1289
1290 map->lock(map->lock_arg);
1291
1292 ret = _regmap_raw_write(map, reg, val, val_len, true);
1293
1294 map->unlock(map->lock_arg);
1295
1296 return ret;
1297}
1298EXPORT_SYMBOL_GPL(regmap_raw_write_async);
1299
b83a313b
MB
1300static int _regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1301 unsigned int val_len)
1302{
98bc7dfd 1303 struct regmap_range_node *range;
b83a313b
MB
1304 u8 *u8 = map->work_buf;
1305 int ret;
1306
98bc7dfd
MB
1307 range = _regmap_range_lookup(map, reg);
1308 if (range) {
1309 ret = _regmap_select_page(map, &reg, range,
1310 val_len / map->format.val_bytes);
0ff3e62f 1311 if (ret != 0)
98bc7dfd
MB
1312 return ret;
1313 }
6863ca62 1314
d939fb9a 1315 map->format.format_reg(map->work_buf, reg, map->reg_shift);
b83a313b
MB
1316
1317 /*
6f306441 1318 * Some buses or devices flag reads by setting the high bits in the
b83a313b
MB
1319 * register addresss; since it's always the high bits for all
1320 * current formats we can do this here rather than in
1321 * formatting. This may break if we get interesting formats.
1322 */
6f306441 1323 u8[0] |= map->read_flag_mask;
b83a313b 1324
fb2736bb
MB
1325 trace_regmap_hw_read_start(map->dev, reg,
1326 val_len / map->format.val_bytes);
1327
0135bbcc 1328 ret = map->bus->read(map->bus_context, map->work_buf,
82159ba8 1329 map->format.reg_bytes + map->format.pad_bytes,
40c5cc26 1330 val, val_len);
b83a313b 1331
fb2736bb
MB
1332 trace_regmap_hw_read_done(map->dev, reg,
1333 val_len / map->format.val_bytes);
1334
1335 return ret;
b83a313b
MB
1336}
1337
ad278406
AS
1338static int _regmap_bus_read(void *context, unsigned int reg,
1339 unsigned int *val)
1340{
1341 int ret;
1342 struct regmap *map = context;
1343
1344 if (!map->format.parse_val)
1345 return -EINVAL;
1346
1347 ret = _regmap_raw_read(map, reg, map->work_buf, map->format.val_bytes);
1348 if (ret == 0)
1349 *val = map->format.parse_val(map->work_buf);
1350
1351 return ret;
1352}
1353
b83a313b
MB
1354static int _regmap_read(struct regmap *map, unsigned int reg,
1355 unsigned int *val)
1356{
1357 int ret;
ad278406 1358 BUG_ON(!map->reg_read);
b83a313b 1359
5d1729e7
DP
1360 if (!map->cache_bypass) {
1361 ret = regcache_read(map, reg, val);
1362 if (ret == 0)
1363 return 0;
1364 }
1365
1366 if (map->cache_only)
1367 return -EBUSY;
1368
ad278406 1369 ret = map->reg_read(map, reg, val);
fb2736bb 1370 if (ret == 0) {
1044c180
MB
1371#ifdef LOG_DEVICE
1372 if (strcmp(dev_name(map->dev), LOG_DEVICE) == 0)
1373 dev_info(map->dev, "%x => %x\n", reg, *val);
1374#endif
1375
fb2736bb 1376 trace_regmap_reg_read(map->dev, reg, *val);
b83a313b 1377
ad278406
AS
1378 if (!map->cache_bypass)
1379 regcache_write(map, reg, *val);
1380 }
f2985367 1381
b83a313b
MB
1382 return ret;
1383}
1384
1385/**
1386 * regmap_read(): Read a value from a single register
1387 *
1388 * @map: Register map to write to
1389 * @reg: Register to be read from
1390 * @val: Pointer to store read value
1391 *
1392 * A value of zero will be returned on success, a negative errno will
1393 * be returned in error cases.
1394 */
1395int regmap_read(struct regmap *map, unsigned int reg, unsigned int *val)
1396{
1397 int ret;
1398
f01ee60f
SW
1399 if (reg % map->reg_stride)
1400 return -EINVAL;
1401
0d4529c5 1402 map->lock(map->lock_arg);
b83a313b
MB
1403
1404 ret = _regmap_read(map, reg, val);
1405
0d4529c5 1406 map->unlock(map->lock_arg);
b83a313b
MB
1407
1408 return ret;
1409}
1410EXPORT_SYMBOL_GPL(regmap_read);
1411
1412/**
1413 * regmap_raw_read(): Read raw data from the device
1414 *
1415 * @map: Register map to write to
1416 * @reg: First register to be read from
1417 * @val: Pointer to store read value
1418 * @val_len: Size of data to read
1419 *
1420 * A value of zero will be returned on success, a negative errno will
1421 * be returned in error cases.
1422 */
1423int regmap_raw_read(struct regmap *map, unsigned int reg, void *val,
1424 size_t val_len)
1425{
b8fb5ab1
MB
1426 size_t val_bytes = map->format.val_bytes;
1427 size_t val_count = val_len / val_bytes;
1428 unsigned int v;
1429 int ret, i;
04e016ad 1430
851960ba
SW
1431 if (val_len % map->format.val_bytes)
1432 return -EINVAL;
f01ee60f
SW
1433 if (reg % map->reg_stride)
1434 return -EINVAL;
851960ba 1435
0d4529c5 1436 map->lock(map->lock_arg);
b83a313b 1437
b8fb5ab1
MB
1438 if (regmap_volatile_range(map, reg, val_count) || map->cache_bypass ||
1439 map->cache_type == REGCACHE_NONE) {
1440 /* Physical block read if there's no cache involved */
1441 ret = _regmap_raw_read(map, reg, val, val_len);
1442
1443 } else {
1444 /* Otherwise go word by word for the cache; should be low
1445 * cost as we expect to hit the cache.
1446 */
1447 for (i = 0; i < val_count; i++) {
f01ee60f
SW
1448 ret = _regmap_read(map, reg + (i * map->reg_stride),
1449 &v);
b8fb5ab1
MB
1450 if (ret != 0)
1451 goto out;
1452
d939fb9a 1453 map->format.format_val(val + (i * val_bytes), v, 0);
b8fb5ab1
MB
1454 }
1455 }
b83a313b 1456
b8fb5ab1 1457 out:
0d4529c5 1458 map->unlock(map->lock_arg);
b83a313b
MB
1459
1460 return ret;
1461}
1462EXPORT_SYMBOL_GPL(regmap_raw_read);
1463
1464/**
1465 * regmap_bulk_read(): Read multiple registers from the device
1466 *
1467 * @map: Register map to write to
1468 * @reg: First register to be read from
1469 * @val: Pointer to store read value, in native register size for device
1470 * @val_count: Number of registers to read
1471 *
1472 * A value of zero will be returned on success, a negative errno will
1473 * be returned in error cases.
1474 */
1475int regmap_bulk_read(struct regmap *map, unsigned int reg, void *val,
1476 size_t val_count)
1477{
1478 int ret, i;
1479 size_t val_bytes = map->format.val_bytes;
82cd9965 1480 bool vol = regmap_volatile_range(map, reg, val_count);
5d1729e7 1481
b83a313b
MB
1482 if (!map->format.parse_val)
1483 return -EINVAL;
f01ee60f
SW
1484 if (reg % map->reg_stride)
1485 return -EINVAL;
b83a313b 1486
de2d808f 1487 if (vol || map->cache_type == REGCACHE_NONE) {
2e33caf1
AJ
1488 /*
1489 * Some devices does not support bulk read, for
1490 * them we have a series of single read operations.
1491 */
1492 if (map->use_single_rw) {
1493 for (i = 0; i < val_count; i++) {
1494 ret = regmap_raw_read(map,
1495 reg + (i * map->reg_stride),
1496 val + (i * val_bytes),
1497 val_bytes);
1498 if (ret != 0)
1499 return ret;
1500 }
1501 } else {
1502 ret = regmap_raw_read(map, reg, val,
1503 val_bytes * val_count);
1504 if (ret != 0)
1505 return ret;
1506 }
de2d808f
MB
1507
1508 for (i = 0; i < val_count * val_bytes; i += val_bytes)
1509 map->format.parse_val(val + i);
1510 } else {
1511 for (i = 0; i < val_count; i++) {
6560ffd1 1512 unsigned int ival;
f01ee60f 1513 ret = regmap_read(map, reg + (i * map->reg_stride),
25061d28 1514 &ival);
de2d808f
MB
1515 if (ret != 0)
1516 return ret;
6560ffd1 1517 memcpy(val + (i * val_bytes), &ival, val_bytes);
de2d808f
MB
1518 }
1519 }
b83a313b
MB
1520
1521 return 0;
1522}
1523EXPORT_SYMBOL_GPL(regmap_bulk_read);
1524
018690d3
MB
1525static int _regmap_update_bits(struct regmap *map, unsigned int reg,
1526 unsigned int mask, unsigned int val,
1527 bool *change)
b83a313b
MB
1528{
1529 int ret;
d91e8db2 1530 unsigned int tmp, orig;
b83a313b 1531
d91e8db2 1532 ret = _regmap_read(map, reg, &orig);
b83a313b 1533 if (ret != 0)
fc3ebd78 1534 return ret;
b83a313b 1535
d91e8db2 1536 tmp = orig & ~mask;
b83a313b
MB
1537 tmp |= val & mask;
1538
018690d3 1539 if (tmp != orig) {
d91e8db2 1540 ret = _regmap_write(map, reg, tmp);
018690d3
MB
1541 *change = true;
1542 } else {
1543 *change = false;
1544 }
b83a313b 1545
b83a313b
MB
1546 return ret;
1547}
018690d3
MB
1548
1549/**
1550 * regmap_update_bits: Perform a read/modify/write cycle on the register map
1551 *
1552 * @map: Register map to update
1553 * @reg: Register to update
1554 * @mask: Bitmask to change
1555 * @val: New value for bitmask
1556 *
1557 * Returns zero for success, a negative number on error.
1558 */
1559int regmap_update_bits(struct regmap *map, unsigned int reg,
1560 unsigned int mask, unsigned int val)
1561{
1562 bool change;
fc3ebd78
KG
1563 int ret;
1564
0d4529c5 1565 map->lock(map->lock_arg);
fc3ebd78 1566 ret = _regmap_update_bits(map, reg, mask, val, &change);
0d4529c5 1567 map->unlock(map->lock_arg);
fc3ebd78
KG
1568
1569 return ret;
018690d3 1570}
b83a313b 1571EXPORT_SYMBOL_GPL(regmap_update_bits);
31244e39 1572
018690d3
MB
1573/**
1574 * regmap_update_bits_check: Perform a read/modify/write cycle on the
1575 * register map and report if updated
1576 *
1577 * @map: Register map to update
1578 * @reg: Register to update
1579 * @mask: Bitmask to change
1580 * @val: New value for bitmask
1581 * @change: Boolean indicating if a write was done
1582 *
1583 * Returns zero for success, a negative number on error.
1584 */
1585int regmap_update_bits_check(struct regmap *map, unsigned int reg,
1586 unsigned int mask, unsigned int val,
1587 bool *change)
1588{
fc3ebd78
KG
1589 int ret;
1590
0d4529c5 1591 map->lock(map->lock_arg);
fc3ebd78 1592 ret = _regmap_update_bits(map, reg, mask, val, change);
0d4529c5 1593 map->unlock(map->lock_arg);
fc3ebd78 1594 return ret;
018690d3
MB
1595}
1596EXPORT_SYMBOL_GPL(regmap_update_bits_check);
1597
0d509f2b
MB
1598void regmap_async_complete_cb(struct regmap_async *async, int ret)
1599{
1600 struct regmap *map = async->map;
1601 bool wake;
1602
1603 spin_lock(&map->async_lock);
1604
1605 list_del(&async->list);
1606 wake = list_empty(&map->async_list);
1607
1608 if (ret != 0)
1609 map->async_ret = ret;
1610
1611 spin_unlock(&map->async_lock);
1612
1613 schedule_work(&async->cleanup);
1614
1615 if (wake)
1616 wake_up(&map->async_waitq);
1617}
1618
1619static int regmap_async_is_done(struct regmap *map)
1620{
1621 unsigned long flags;
1622 int ret;
1623
1624 spin_lock_irqsave(&map->async_lock, flags);
1625 ret = list_empty(&map->async_list);
1626 spin_unlock_irqrestore(&map->async_lock, flags);
1627
1628 return ret;
1629}
1630
1631/**
1632 * regmap_async_complete: Ensure all asynchronous I/O has completed.
1633 *
1634 * @map: Map to operate on.
1635 *
1636 * Blocks until any pending asynchronous I/O has completed. Returns
1637 * an error code for any failed I/O operations.
1638 */
1639int regmap_async_complete(struct regmap *map)
1640{
1641 unsigned long flags;
1642 int ret;
1643
1644 /* Nothing to do with no async support */
1645 if (!map->bus->async_write)
1646 return 0;
1647
1648 wait_event(map->async_waitq, regmap_async_is_done(map));
1649
1650 spin_lock_irqsave(&map->async_lock, flags);
1651 ret = map->async_ret;
1652 map->async_ret = 0;
1653 spin_unlock_irqrestore(&map->async_lock, flags);
1654
1655 return ret;
1656}
1657
22f0d90a
MB
1658/**
1659 * regmap_register_patch: Register and apply register updates to be applied
1660 * on device initialistion
1661 *
1662 * @map: Register map to apply updates to.
1663 * @regs: Values to update.
1664 * @num_regs: Number of entries in regs.
1665 *
1666 * Register a set of register updates to be applied to the device
1667 * whenever the device registers are synchronised with the cache and
1668 * apply them immediately. Typically this is used to apply
1669 * corrections to be applied to the device defaults on startup, such
1670 * as the updates some vendors provide to undocumented registers.
1671 */
1672int regmap_register_patch(struct regmap *map, const struct reg_default *regs,
1673 int num_regs)
1674{
1675 int i, ret;
1676 bool bypass;
1677
1678 /* If needed the implementation can be extended to support this */
1679 if (map->patch)
1680 return -EBUSY;
1681
0d4529c5 1682 map->lock(map->lock_arg);
22f0d90a
MB
1683
1684 bypass = map->cache_bypass;
1685
1686 map->cache_bypass = true;
1687
1688 /* Write out first; it's useful to apply even if we fail later. */
1689 for (i = 0; i < num_regs; i++) {
1690 ret = _regmap_write(map, regs[i].reg, regs[i].def);
1691 if (ret != 0) {
1692 dev_err(map->dev, "Failed to write %x = %x: %d\n",
1693 regs[i].reg, regs[i].def, ret);
1694 goto out;
1695 }
1696 }
1697
2a14d7d9 1698 map->patch = kcalloc(num_regs, sizeof(struct reg_default), GFP_KERNEL);
22f0d90a
MB
1699 if (map->patch != NULL) {
1700 memcpy(map->patch, regs,
1701 num_regs * sizeof(struct reg_default));
1702 map->patch_regs = num_regs;
1703 } else {
1704 ret = -ENOMEM;
1705 }
1706
1707out:
1708 map->cache_bypass = bypass;
1709
0d4529c5 1710 map->unlock(map->lock_arg);
22f0d90a
MB
1711
1712 return ret;
1713}
1714EXPORT_SYMBOL_GPL(regmap_register_patch);
1715
eae4b51b 1716/*
a6539c32
MB
1717 * regmap_get_val_bytes(): Report the size of a register value
1718 *
1719 * Report the size of a register value, mainly intended to for use by
1720 * generic infrastructure built on top of regmap.
1721 */
1722int regmap_get_val_bytes(struct regmap *map)
1723{
1724 if (map->format.format_write)
1725 return -EINVAL;
1726
1727 return map->format.val_bytes;
1728}
1729EXPORT_SYMBOL_GPL(regmap_get_val_bytes);
1730
31244e39
MB
1731static int __init regmap_initcall(void)
1732{
1733 regmap_debugfs_initcall();
1734
1735 return 0;
1736}
1737postcore_initcall(regmap_initcall);