projects / linux-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
Merge tag 'fuse-update-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi...
[linux-block.git] / drivers / atm / zatm.c
CommitLineData
09c434b8 1// SPDX-License-Identifier: GPL-2.0-only
1da177e4
LT		 2/* drivers/atm/zatm.c - ZeitNet ZN122x device driver */
3
4/* Written 1995-2000 by Werner Almesberger, EPFL LRC/ICA */
5
6
1da177e4 7#include <linux/module.h>
1da177e4
LT		 8#include <linux/kernel.h>
9#include <linux/mm.h>
10#include <linux/pci.h>
11#include <linux/errno.h>
12#include <linux/atm.h>
13#include <linux/atmdev.h>
14#include <linux/sonet.h>
15#include <linux/skbuff.h>
16#include <linux/netdevice.h>
17#include <linux/delay.h>
1da177e4
LT		 18#include <linux/uio.h>
19#include <linux/init.h>
a6b7a407 20#include <linux/interrupt.h>
4aa49d13 21#include <linux/dma-mapping.h>
1da177e4
LT		 22#include <linux/atm_zatm.h>
23#include <linux/capability.h>
24#include <linux/bitops.h>
25#include <linux/wait.h>
5a0e3ad6 26#include <linux/slab.h>
1da177e4 27#include <asm/byteorder.h>
1da177e4
LT		 28#include <asm/string.h>
29#include <asm/io.h>
60063497 30#include <linux/atomic.h>
7c0f6ba6 31#include <linux/uaccess.h>
2be147f7 32#include <linux/nospec.h>
1da177e4
LT		 33
34#include "uPD98401.h"
35#include "uPD98402.h"
36#include "zeprom.h"
37#include "zatm.h"
38
39
40/*
41 * TODO:
42 *
43 * Minor features
44 * - support 64 kB SDUs (will have to use multibuffer batches then :-( )
45 * - proper use of CDV, credit = max(1,CDVT*PCR)
46 * - AAL0
47 * - better receive timestamps
48 * - OAM
49 */
50
51#define ZATM_COPPER 1
52
53#if 0
54#define DPRINTK(format,args...) printk(KERN_DEBUG format,##args)
55#else
56#define DPRINTK(format,args...)
57#endif
58
59#ifndef CONFIG_ATM_ZATM_DEBUG
60
61
62#define NULLCHECK(x)
63
64#define EVENT(s,a,b)
65
66
67static void event_dump(void)
68{
69}
70
71
72#else
73
74
75/*
76 * NULL pointer checking
77 */
78
79#define NULLCHECK(x) \
80 if ((unsigned long) (x) < 0x30) printk(KERN_CRIT #x "==0x%x\n", (int) (x))
81
82/*
83 * Very extensive activity logging. Greatly improves bug detection speed but
84 * costs a few Mbps if enabled.
85 */
86
87#define EV 64
88
89static const char *ev[EV];
90static unsigned long ev_a[EV],ev_b[EV];
91static int ec = 0;
92
93
94static void EVENT(const char *s,unsigned long a,unsigned long b)
95{
96 ev[ec] = s;
97 ev_a[ec] = a;
98 ev_b[ec] = b;
99 ec = (ec+1) % EV;
100}
101
102
103static void event_dump(void)
104{
105 int n,i;
106
107 printk(KERN_NOTICE "----- event dump follows -----\n");
108 for (n = 0; n < EV; n++) {
109 i = (ec+n) % EV;
110 printk(KERN_NOTICE);
111 printk(ev[i] ? ev[i] : "(null)",ev_a[i],ev_b[i]);
112 }
113 printk(KERN_NOTICE "----- event dump ends here -----\n");
114}
115
116
117#endif /* CONFIG_ATM_ZATM_DEBUG */
118
119
120#define RING_BUSY 1 /* indication from do_tx that PDU has to be
121 backlogged */
122
123static struct atm_dev *zatm_boards = NULL;
124static unsigned long dummy[2] = {0,0};
125
126
127#define zin_n(r) inl(zatm_dev->base+r*4)
128#define zin(r) inl(zatm_dev->base+uPD98401_##r*4)
129#define zout(v,r) outl(v,zatm_dev->base+uPD98401_##r*4)
64b9d16e 130#define zwait() do {} while (zin(CMR) & uPD98401_BUSY)
1da177e4
LT		 131
132/* RX0, RX1, TX0, TX1 */
133static const int mbx_entries[NR_MBX] = { 1024,1024,1024,1024 };
134static const int mbx_esize[NR_MBX] = { 16,16,4,4 }; /* entry size in bytes */
135
136#define MBX_SIZE(i) (mbx_entries[i]*mbx_esize[i])
137
138
139/*-------------------------------- utilities --------------------------------*/
140
141
142static void zpokel(struct zatm_dev *zatm_dev,u32 value,u32 addr)
143{
64b9d16e 144 zwait();
1da177e4
LT		 145 zout(value,CER);
146 zout(uPD98401_IND_ACC | uPD98401_IA_BALL |
147 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
148}
149
150
151static u32 zpeekl(struct zatm_dev *zatm_dev,u32 addr)
152{
64b9d16e 153 zwait();
1da177e4
LT		 154 zout(uPD98401_IND_ACC | uPD98401_IA_BALL | uPD98401_IA_RW |
155 (uPD98401_IA_TGT_CM << uPD98401_IA_TGT_SHIFT) | addr,CMR);
64b9d16e 156 zwait();
1da177e4
LT		 157 return zin(CER);
158}
159
160
161/*------------------------------- free lists --------------------------------*/
162
163
164/*
165 * Free buffer head structure:
166 * [0] pointer to buffer (for SAR)
167 * [1] buffer descr link pointer (for SAR)
168 * [2] back pointer to skb (for poll_rx)
169 * [3] data
170 * ...
171 */
172
173struct rx_buffer_head {
174 u32 buffer; /* pointer to buffer (for SAR) */
175 u32 link; /* buffer descriptor link pointer (for SAR) */
176 struct sk_buff *skb; /* back pointer to skb (for poll_rx) */
177};
178
179
180static void refill_pool(struct atm_dev *dev,int pool)
181{
182 struct zatm_dev *zatm_dev;
183 struct sk_buff *skb;
184 struct rx_buffer_head *first;
185 unsigned long flags;
186 int align,offset,free,count,size;
187
188 EVENT("refill_pool\n",0,0);
189 zatm_dev = ZATM_DEV(dev);
190 size = (64 << (pool <= ZATM_AAL5_POOL_BASE ? 0 :
191 pool-ZATM_AAL5_POOL_BASE))+sizeof(struct rx_buffer_head);
192 if (size < PAGE_SIZE) {
193 align = 32; /* for 32 byte alignment */
194 offset = sizeof(struct rx_buffer_head);
195 }
196 else {
197 align = 4096;
198 offset = zatm_dev->pool_info[pool].offset+
199 sizeof(struct rx_buffer_head);
200 }
201 size += align;
202 spin_lock_irqsave(&zatm_dev->lock, flags);
203 free = zpeekl(zatm_dev,zatm_dev->pool_base+2*pool) &
204 uPD98401_RXFP_REMAIN;
205 spin_unlock_irqrestore(&zatm_dev->lock, flags);
206 if (free >= zatm_dev->pool_info[pool].low_water) return;
207 EVENT("starting ... POOL: 0x%x, 0x%x\n",
208 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
209 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
210 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
211 count = 0;
212 first = NULL;
213 while (free < zatm_dev->pool_info[pool].high_water) {
214 struct rx_buffer_head *head;
215
216 skb = alloc_skb(size,GFP_ATOMIC);
217 if (!skb) {
218 printk(KERN_WARNING DEV_LABEL "(Itf %d): got no new "
219 "skb (%d) with %d free\n",dev->number,size,free);
220 break;
221 }
222 skb_reserve(skb,(unsigned char *) ((((unsigned long) skb->data+
223 align+offset-1) & ~(unsigned long) (align-1))-offset)-
224 skb->data);
225 head = (struct rx_buffer_head *) skb->data;
226 skb_reserve(skb,sizeof(struct rx_buffer_head));
227 if (!first) first = head;
228 count++;
229 head->buffer = virt_to_bus(skb->data);
230 head->link = 0;
231 head->skb = skb;
232 EVENT("enq skb 0x%08lx/0x%08lx\n",(unsigned long) skb,
233 (unsigned long) head);
234 spin_lock_irqsave(&zatm_dev->lock, flags);
235 if (zatm_dev->last_free[pool])
236 ((struct rx_buffer_head *) (zatm_dev->last_free[pool]->
237 data))[-1].link = virt_to_bus(head);
238 zatm_dev->last_free[pool] = skb;
239 skb_queue_tail(&zatm_dev->pool[pool],skb);
240 spin_unlock_irqrestore(&zatm_dev->lock, flags);
241 free++;
242 }
243 if (first) {
244 spin_lock_irqsave(&zatm_dev->lock, flags);
64b9d16e 245 zwait();
1da177e4
LT		 246 zout(virt_to_bus(first),CER);
247 zout(uPD98401_ADD_BAT | (pool << uPD98401_POOL_SHIFT) | count,
248 CMR);
249 spin_unlock_irqrestore(&zatm_dev->lock, flags);
250 EVENT ("POOL: 0x%x, 0x%x\n",
251 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool),
252 zpeekl(zatm_dev,zatm_dev->pool_base+2*pool+1));
253 EVENT("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
254 }
255}
256
257
258static void drain_free(struct atm_dev *dev,int pool)
259{
260 skb_queue_purge(&ZATM_DEV(dev)->pool[pool]);
261}
262
263
264static int pool_index(int max_pdu)
265{
266 int i;
267
268 if (max_pdu % ATM_CELL_PAYLOAD)
269 printk(KERN_ERR DEV_LABEL ": driver error in pool_index: "
270 "max_pdu is %d\n",max_pdu);
271 if (max_pdu > 65536) return -1;
272 for (i = 0; (64 << i) < max_pdu; i++);
273 return i+ZATM_AAL5_POOL_BASE;
274}
275
276
277/* use_pool isn't reentrant */
278
279
280static void use_pool(struct atm_dev *dev,int pool)
281{
282 struct zatm_dev *zatm_dev;
283 unsigned long flags;
284 int size;
285
286 zatm_dev = ZATM_DEV(dev);
287 if (!(zatm_dev->pool_info[pool].ref_count++)) {
288 skb_queue_head_init(&zatm_dev->pool[pool]);
289 size = pool-ZATM_AAL5_POOL_BASE;
290 if (size < 0) size = 0; /* 64B... */
291 else if (size > 10) size = 10; /* ... 64kB */
292 spin_lock_irqsave(&zatm_dev->lock, flags);
293 zpokel(zatm_dev,((zatm_dev->pool_info[pool].low_water/4) <<
294 uPD98401_RXFP_ALERT_SHIFT) |
295 (1 << uPD98401_RXFP_BTSZ_SHIFT) |
296 (size << uPD98401_RXFP_BFSZ_SHIFT),
297 zatm_dev->pool_base+pool*2);
298 zpokel(zatm_dev,(unsigned long) dummy,zatm_dev->pool_base+
299 pool*2+1);
300 spin_unlock_irqrestore(&zatm_dev->lock, flags);
301 zatm_dev->last_free[pool] = NULL;
302 refill_pool(dev,pool);
303 }
304 DPRINTK("pool %d: %d\n",pool,zatm_dev->pool_info[pool].ref_count);
305}
306
307
308static void unuse_pool(struct atm_dev *dev,int pool)
309{
310 if (!(--ZATM_DEV(dev)->pool_info[pool].ref_count))
311 drain_free(dev,pool);
312}
313
314/*----------------------------------- RX ------------------------------------*/
315
316
317#if 0
318static void exception(struct atm_vcc *vcc)
319{
320 static int count = 0;
321 struct zatm_dev *zatm_dev = ZATM_DEV(vcc->dev);
322 struct zatm_vcc *zatm_vcc = ZATM_VCC(vcc);
323 unsigned long *qrp;
324 int i;
325
326 if (count++ > 2) return;
327 for (i = 0; i < 8; i++)
328 printk("TX%d: 0x%08lx\n",i,
329 zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+i));
330 for (i = 0; i < 5; i++)
331 printk("SH%d: 0x%08lx\n",i,
332 zpeekl(zatm_dev,uPD98401_IM(zatm_vcc->shaper)+16*i));
333 qrp = (unsigned long *) zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
334 uPD98401_TXVC_QRP);
335 printk("qrp=0x%08lx\n",(unsigned long) qrp);
336 for (i = 0; i < 4; i++) printk("QRP[%d]: 0x%08lx",i,qrp[i]);
337}
338#endif
339
340
341static const char *err_txt[] = {
342 "No error",
343 "RX buf underflow",
344 "RX FIFO overrun",
345 "Maximum len violation",
346 "CRC error",
347 "User abort",
348 "Length violation",
349 "T1 error",
350 "Deactivated",
351 "???",
352 "???",
353 "???",
354 "???",
355 "???",
356 "???",
357 "???"
358};
359
360
361static void poll_rx(struct atm_dev *dev,int mbx)
362{
363 struct zatm_dev *zatm_dev;
364 unsigned long pos;
365 u32 x;
366 int error;
367
368 EVENT("poll_rx\n",0,0);
369 zatm_dev = ZATM_DEV(dev);
370 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
371 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
372 u32 *here;
373 struct sk_buff *skb;
374 struct atm_vcc *vcc;
375 int cells,size,chan;
376
377 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
378 here = (u32 *) pos;
379 if (((pos += 16) & 0xffff) == zatm_dev->mbx_end[mbx])
380 pos = zatm_dev->mbx_start[mbx];
381 cells = here[0] & uPD98401_AAL5_SIZE;
382#if 0
383printk("RX IND: 0x%x, 0x%x, 0x%x, 0x%x\n",here[0],here[1],here[2],here[3]);
384{
385unsigned long *x;
386 printk("POOL: 0x%08x, 0x%08x\n",zpeekl(zatm_dev,
387 zatm_dev->pool_base),
388 zpeekl(zatm_dev,zatm_dev->pool_base+1));
389 x = (unsigned long *) here[2];
390 printk("[0..3] = 0x%08lx, 0x%08lx, 0x%08lx, 0x%08lx\n",
391 x[0],x[1],x[2],x[3]);
392}
393#endif
394 error = 0;
395 if (here[3] & uPD98401_AAL5_ERR) {
396 error = (here[3] & uPD98401_AAL5_ES) >>
397 uPD98401_AAL5_ES_SHIFT;
398 if (error == uPD98401_AAL5_ES_DEACT ||
399 error == uPD98401_AAL5_ES_FREE) continue;
400 }
401EVENT("error code 0x%x/0x%x\n",(here[3] & uPD98401_AAL5_ES) >>
402 uPD98401_AAL5_ES_SHIFT,error);
403 skb = ((struct rx_buffer_head *) bus_to_virt(here[2]))->skb;
a61bbcf2 404 __net_timestamp(skb);
1da177e4
LT		 405#if 0
406printk("[-3..0] 0x%08lx 0x%08lx 0x%08lx 0x%08lx\n",((unsigned *) skb->data)[-3],
407 ((unsigned *) skb->data)[-2],((unsigned *) skb->data)[-1],
408 ((unsigned *) skb->data)[0]);
409#endif
410 EVENT("skb 0x%lx, here 0x%lx\n",(unsigned long) skb,
411 (unsigned long) here);
412#if 0
413printk("dummy: 0x%08lx, 0x%08lx\n",dummy[0],dummy[1]);
414#endif
415 size = error ? 0 : ntohs(((__be16 *) skb->data)[cells*
416 ATM_CELL_PAYLOAD/sizeof(u16)-3]);
417 EVENT("got skb 0x%lx, size %d\n",(unsigned long) skb,size);
418 chan = (here[3] & uPD98401_AAL5_CHAN) >>
419 uPD98401_AAL5_CHAN_SHIFT;
420 if (chan < zatm_dev->chans && zatm_dev->rx_map[chan]) {
d70063c4 421 int pos;
1da177e4 422 vcc = zatm_dev->rx_map[chan];
d70063c4 423 pos = ZATM_VCC(vcc)->pool;
8728b834
DM		 424 if (skb == zatm_dev->last_free[pos])
425 zatm_dev->last_free[pos] = NULL;
426 skb_unlink(skb, zatm_dev->pool + pos);
1da177e4
LT		 427 }
428 else {
429 printk(KERN_ERR DEV_LABEL "(itf %d): RX indication "
430 "for non-existing channel\n",dev->number);
431 size = 0;
432 vcc = NULL;
433 event_dump();
434 }
435 if (error) {
436 static unsigned long silence = 0;
437 static int last_error = 0;
438
439 if (error != last_error ||
440 time_after(jiffies, silence) || silence == 0){
441 printk(KERN_WARNING DEV_LABEL "(itf %d): "
442 "chan %d error %s\n",dev->number,chan,
443 err_txt[error]);
444 last_error = error;
445 silence = (jiffies+2*HZ)|1;
446 }
447 size = 0;
448 }
449 if (size && (size > cells*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER ||
450 size <= (cells-1)*ATM_CELL_PAYLOAD-ATM_AAL5_TRAILER)) {
451 printk(KERN_ERR DEV_LABEL "(itf %d): size %d with %d "
452 "cells\n",dev->number,size,cells);
453 size = 0;
454 event_dump();
455 }
456 if (size > ATM_MAX_AAL5_PDU) {
457 printk(KERN_ERR DEV_LABEL "(itf %d): size too big "
458 "(%d)\n",dev->number,size);
459 size = 0;
460 event_dump();
461 }
462 if (!size) {
463 dev_kfree_skb_irq(skb);
464 if (vcc) atomic_inc(&vcc->stats->rx_err);
465 continue;
466 }
467 if (!atm_charge(vcc,skb->truesize)) {
468 dev_kfree_skb_irq(skb);
469 continue;
470 }
471 skb->len = size;
472 ATM_SKB(skb)->vcc = vcc;
473 vcc->push(vcc,skb);
474 atomic_inc(&vcc->stats->rx);
475 }
476 zout(pos & 0xffff,MTA(mbx));
477#if 0 /* probably a stupid idea */
478 refill_pool(dev,zatm_vcc->pool);
479 /* maybe this saves us a few interrupts */
480#endif
481}
482
483
484static int open_rx_first(struct atm_vcc *vcc)
485{
486 struct zatm_dev *zatm_dev;
487 struct zatm_vcc *zatm_vcc;
488 unsigned long flags;
489 unsigned short chan;
490 int cells;
491
492 DPRINTK("open_rx_first (0x%x)\n",inb_p(0xc053));
493 zatm_dev = ZATM_DEV(vcc->dev);
494 zatm_vcc = ZATM_VCC(vcc);
495 zatm_vcc->rx_chan = 0;
496 if (vcc->qos.rxtp.traffic_class == ATM_NONE) return 0;
497 if (vcc->qos.aal == ATM_AAL5) {
498 if (vcc->qos.rxtp.max_sdu > 65464)
499 vcc->qos.rxtp.max_sdu = 65464;
500 /* fix this - we may want to receive 64kB SDUs
501 later */
6a19309d
JL		 502 cells = DIV_ROUND_UP(vcc->qos.rxtp.max_sdu + ATM_AAL5_TRAILER,
503 ATM_CELL_PAYLOAD);
1da177e4
LT		 504 zatm_vcc->pool = pool_index(cells*ATM_CELL_PAYLOAD);
505 }
506 else {
507 cells = 1;
508 zatm_vcc->pool = ZATM_AAL0_POOL;
509 }
510 if (zatm_vcc->pool < 0) return -EMSGSIZE;
511 spin_lock_irqsave(&zatm_dev->lock, flags);
64b9d16e 512 zwait();
1da177e4 513 zout(uPD98401_OPEN_CHAN,CMR);
64b9d16e 514 zwait();
1da177e4
LT		 515 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
516 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
517 spin_unlock_irqrestore(&zatm_dev->lock, flags);
518 DPRINTK("chan is %d\n",chan);
519 if (!chan) return -EAGAIN;
520 use_pool(vcc->dev,zatm_vcc->pool);
521 DPRINTK("pool %d\n",zatm_vcc->pool);
522 /* set up VC descriptor */
523 spin_lock_irqsave(&zatm_dev->lock, flags);
524 zpokel(zatm_dev,zatm_vcc->pool << uPD98401_RXVC_POOL_SHIFT,
525 chan*VC_SIZE/4);
526 zpokel(zatm_dev,uPD98401_RXVC_OD | (vcc->qos.aal == ATM_AAL5 ?
527 uPD98401_RXVC_AR : 0) | cells,chan*VC_SIZE/4+1);
528 zpokel(zatm_dev,0,chan*VC_SIZE/4+2);
529 zatm_vcc->rx_chan = chan;
530 zatm_dev->rx_map[chan] = vcc;
531 spin_unlock_irqrestore(&zatm_dev->lock, flags);
532 return 0;
533}
534
535
536static int open_rx_second(struct atm_vcc *vcc)
537{
538 struct zatm_dev *zatm_dev;
539 struct zatm_vcc *zatm_vcc;
540 unsigned long flags;
541 int pos,shift;
542
543 DPRINTK("open_rx_second (0x%x)\n",inb_p(0xc053));
544 zatm_dev = ZATM_DEV(vcc->dev);
545 zatm_vcc = ZATM_VCC(vcc);
546 if (!zatm_vcc->rx_chan) return 0;
547 spin_lock_irqsave(&zatm_dev->lock, flags);
548 /* should also handle VPI @@@ */
549 pos = vcc->vci >> 1;
550 shift = (1-(vcc->vci & 1)) << 4;
551 zpokel(zatm_dev,(zpeekl(zatm_dev,pos) & ~(0xffff << shift)) |
552 ((zatm_vcc->rx_chan | uPD98401_RXLT_ENBL) << shift),pos);
553 spin_unlock_irqrestore(&zatm_dev->lock, flags);
554 return 0;
555}
556
557
558static void close_rx(struct atm_vcc *vcc)
559{
560 struct zatm_dev *zatm_dev;
561 struct zatm_vcc *zatm_vcc;
562 unsigned long flags;
563 int pos,shift;
564
565 zatm_vcc = ZATM_VCC(vcc);
566 zatm_dev = ZATM_DEV(vcc->dev);
567 if (!zatm_vcc->rx_chan) return;
568 DPRINTK("close_rx\n");
569 /* disable receiver */
570 if (vcc->vpi != ATM_VPI_UNSPEC && vcc->vci != ATM_VCI_UNSPEC) {
571 spin_lock_irqsave(&zatm_dev->lock, flags);
572 pos = vcc->vci >> 1;
573 shift = (1-(vcc->vci & 1)) << 4;
574 zpokel(zatm_dev,zpeekl(zatm_dev,pos) & ~(0xffff << shift),pos);
64b9d16e 575 zwait();
1da177e4 576 zout(uPD98401_NOP,CMR);
64b9d16e 577 zwait();
1da177e4
LT		 578 zout(uPD98401_NOP,CMR);
579 spin_unlock_irqrestore(&zatm_dev->lock, flags);
580 }
581 spin_lock_irqsave(&zatm_dev->lock, flags);
64b9d16e 582 zwait();
1da177e4
LT		 583 zout(uPD98401_DEACT_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
584 uPD98401_CHAN_ADDR_SHIFT),CMR);
64b9d16e 585 zwait();
1da177e4
LT		 586 udelay(10); /* why oh why ... ? */
587 zout(uPD98401_CLOSE_CHAN | uPD98401_CHAN_RT | (zatm_vcc->rx_chan <<
588 uPD98401_CHAN_ADDR_SHIFT),CMR);
64b9d16e 589 zwait();
1da177e4
LT		 590 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
591 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close RX channel "
592 "%d\n",vcc->dev->number,zatm_vcc->rx_chan);
593 spin_unlock_irqrestore(&zatm_dev->lock, flags);
594 zatm_dev->rx_map[zatm_vcc->rx_chan] = NULL;
595 zatm_vcc->rx_chan = 0;
596 unuse_pool(vcc->dev,zatm_vcc->pool);
597}
598
599
600static int start_rx(struct atm_dev *dev)
601{
602 struct zatm_dev *zatm_dev;
0f0d0ed0 603 int i;
1da177e4 604
cf9932a9 605 DPRINTK("start_rx\n");
1da177e4 606 zatm_dev = ZATM_DEV(dev);
0f0d0ed0
ME		 607 zatm_dev->rx_map = kcalloc(zatm_dev->chans,
608 sizeof(*zatm_dev->rx_map),
609 GFP_KERNEL);
1da177e4 610 if (!zatm_dev->rx_map) return -ENOMEM;
1da177e4
LT		 611 /* set VPI/VCI split (use all VCIs and give what's left to VPIs) */
612 zpokel(zatm_dev,(1 << dev->ci_range.vci_bits)-1,uPD98401_VRR);
613 /* prepare free buffer pools */
614 for (i = 0; i <= ZATM_LAST_POOL; i++) {
615 zatm_dev->pool_info[i].ref_count = 0;
616 zatm_dev->pool_info[i].rqa_count = 0;
617 zatm_dev->pool_info[i].rqu_count = 0;
618 zatm_dev->pool_info[i].low_water = LOW_MARK;
619 zatm_dev->pool_info[i].high_water = HIGH_MARK;
620 zatm_dev->pool_info[i].offset = 0;
621 zatm_dev->pool_info[i].next_off = 0;
622 zatm_dev->pool_info[i].next_cnt = 0;
623 zatm_dev->pool_info[i].next_thres = OFF_CNG_THRES;
624 }
625 return 0;
626}
627
628
629/*----------------------------------- TX ------------------------------------*/
630
631
632static int do_tx(struct sk_buff *skb)
633{
634 struct atm_vcc *vcc;
635 struct zatm_dev *zatm_dev;
636 struct zatm_vcc *zatm_vcc;
637 u32 *dsc;
638 unsigned long flags;
639
640 EVENT("do_tx\n",0,0);
641 DPRINTK("sending skb %p\n",skb);
642 vcc = ATM_SKB(skb)->vcc;
643 zatm_dev = ZATM_DEV(vcc->dev);
644 zatm_vcc = ZATM_VCC(vcc);
645 EVENT("iovcnt=%d\n",skb_shinfo(skb)->nr_frags,0);
646 spin_lock_irqsave(&zatm_dev->lock, flags);
647 if (!skb_shinfo(skb)->nr_frags) {
648 if (zatm_vcc->txing == RING_ENTRIES-1) {
649 spin_unlock_irqrestore(&zatm_dev->lock, flags);
650 return RING_BUSY;
651 }
652 zatm_vcc->txing++;
653 dsc = zatm_vcc->ring+zatm_vcc->ring_curr;
654 zatm_vcc->ring_curr = (zatm_vcc->ring_curr+RING_WORDS) &
655 (RING_ENTRIES*RING_WORDS-1);
656 dsc[1] = 0;
657 dsc[2] = skb->len;
658 dsc[3] = virt_to_bus(skb->data);
659 mb();
660 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP | uPD98401_TXPD_SM
661 | (vcc->qos.aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
662 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
663 uPD98401_CLPM_1 : uPD98401_CLPM_0));
664 EVENT("dsc (0x%lx)\n",(unsigned long) dsc,0);
665 }
666 else {
667printk("NONONONOO!!!!\n");
668 dsc = NULL;
669#if 0
670 u32 *put;
671 int i;
672
79a34648
JJ		 673 dsc = kmalloc(uPD98401_TXPD_SIZE * 2 +
674 uPD98401_TXBD_SIZE * ATM_SKB(skb)->iovcnt, GFP_ATOMIC);
1da177e4 675 if (!dsc) {
79a34648
JJ		 676 if (vcc->pop)
677 vcc->pop(vcc, skb);
678 else
679 dev_kfree_skb_irq(skb);
1da177e4
LT		 680 return -EAGAIN;
681 }
682 /* @@@ should check alignment */
683 put = dsc+8;
684 dsc[0] = uPD98401_TXPD_V | uPD98401_TXPD_DP |
685 (vcc->aal == ATM_AAL5 ? uPD98401_TXPD_AAL5 : 0 |
686 (ATM_SKB(skb)->atm_options & ATM_ATMOPT_CLP ?
687 uPD98401_CLPM_1 : uPD98401_CLPM_0));
688 dsc[1] = 0;
79a34648 689 dsc[2] = ATM_SKB(skb)->iovcnt * uPD98401_TXBD_SIZE;
1da177e4
LT		 690 dsc[3] = virt_to_bus(put);
691 for (i = 0; i < ATM_SKB(skb)->iovcnt; i++) {
692 *put++ = ((struct iovec *) skb->data)[i].iov_len;
693 *put++ = virt_to_bus(((struct iovec *)
694 skb->data)[i].iov_base);
695 }
696 put[-2] |= uPD98401_TXBD_LAST;
697#endif
698 }
699 ZATM_PRV_DSC(skb) = dsc;
700 skb_queue_tail(&zatm_vcc->tx_queue,skb);
701 DPRINTK("QRP=0x%08lx\n",zpeekl(zatm_dev,zatm_vcc->tx_chan*VC_SIZE/4+
702 uPD98401_TXVC_QRP));
64b9d16e 703 zwait();
1da177e4
LT		 704 zout(uPD98401_TX_READY | (zatm_vcc->tx_chan <<
705 uPD98401_CHAN_ADDR_SHIFT),CMR);
706 spin_unlock_irqrestore(&zatm_dev->lock, flags);
707 EVENT("done\n",0,0);
708 return 0;
709}
710
711
712static inline void dequeue_tx(struct atm_vcc *vcc)
713{
714 struct zatm_vcc *zatm_vcc;
715 struct sk_buff *skb;
716
717 EVENT("dequeue_tx\n",0,0);
718 zatm_vcc = ZATM_VCC(vcc);
719 skb = skb_dequeue(&zatm_vcc->tx_queue);
720 if (!skb) {
721 printk(KERN_CRIT DEV_LABEL "(itf %d): dequeue_tx but not "
722 "txing\n",vcc->dev->number);
723 return;
724 }
725#if 0 /* @@@ would fail on CLP */
726if (*ZATM_PRV_DSC(skb) != (uPD98401_TXPD_V | uPD98401_TXPD_DP |
727 uPD98401_TXPD_SM | uPD98401_TXPD_AAL5)) printk("@#*$!!!! (%08x)\n",
728 *ZATM_PRV_DSC(skb));
729#endif
730 *ZATM_PRV_DSC(skb) = 0; /* mark as invalid */
731 zatm_vcc->txing--;
732 if (vcc->pop) vcc->pop(vcc,skb);
733 else dev_kfree_skb_irq(skb);
734 while ((skb = skb_dequeue(&zatm_vcc->backlog)))
735 if (do_tx(skb) == RING_BUSY) {
736 skb_queue_head(&zatm_vcc->backlog,skb);
737 break;
738 }
739 atomic_inc(&vcc->stats->tx);
740 wake_up(&zatm_vcc->tx_wait);
741}
742
743
744static void poll_tx(struct atm_dev *dev,int mbx)
745{
746 struct zatm_dev *zatm_dev;
747 unsigned long pos;
748 u32 x;
749
750 EVENT("poll_tx\n",0,0);
751 zatm_dev = ZATM_DEV(dev);
752 pos = (zatm_dev->mbx_start[mbx] & ~0xffffUL) | zin(MTA(mbx));
753 while (x = zin(MWA(mbx)), (pos & 0xffff) != x) {
754 int chan;
755
756#if 1
757 u32 data,*addr;
758
759 EVENT("MBX: host 0x%lx, nic 0x%x\n",pos,x);
760 addr = (u32 *) pos;
761 data = *addr;
762 chan = (data & uPD98401_TXI_CONN) >> uPD98401_TXI_CONN_SHIFT;
763 EVENT("addr = 0x%lx, data = 0x%08x,",(unsigned long) addr,
764 data);
765 EVENT("chan = %d\n",chan,0);
766#else
767NO !
768 chan = (zatm_dev->mbx_start[mbx][pos >> 2] & uPD98401_TXI_CONN)
769 >> uPD98401_TXI_CONN_SHIFT;
770#endif
771 if (chan < zatm_dev->chans && zatm_dev->tx_map[chan])
772 dequeue_tx(zatm_dev->tx_map[chan]);
773 else {
774 printk(KERN_CRIT DEV_LABEL "(itf %d): TX indication "
775 "for non-existing channel %d\n",dev->number,chan);
776 event_dump();
777 }
778 if (((pos += 4) & 0xffff) == zatm_dev->mbx_end[mbx])
779 pos = zatm_dev->mbx_start[mbx];
780 }
781 zout(pos & 0xffff,MTA(mbx));
782}
783
784
785/*
786 * BUG BUG BUG: Doesn't handle "new-style" rate specification yet.
787 */
788
789static int alloc_shaper(struct atm_dev *dev,int *pcr,int min,int max,int ubr)
790{
791 struct zatm_dev *zatm_dev;
792 unsigned long flags;
793 unsigned long i,m,c;
794 int shaper;
795
796 DPRINTK("alloc_shaper (min = %d, max = %d)\n",min,max);
797 zatm_dev = ZATM_DEV(dev);
798 if (!zatm_dev->free_shapers) return -EAGAIN;
799 for (shaper = 0; !((zatm_dev->free_shapers >> shaper) & 1); shaper++);
800 zatm_dev->free_shapers &= ~1 << shaper;
801 if (ubr) {
802 c = 5;
803 i = m = 1;
804 zatm_dev->ubr_ref_cnt++;
805 zatm_dev->ubr = shaper;
3e0c0ac8 806 *pcr = 0;
1da177e4
LT		 807 }
808 else {
809 if (min) {
810 if (min <= 255) {
811 i = min;
812 m = ATM_OC3_PCR;
813 }
814 else {
815 i = 255;
816 m = ATM_OC3_PCR*255/min;
817 }
818 }
819 else {
820 if (max > zatm_dev->tx_bw) max = zatm_dev->tx_bw;
821 if (max <= 255) {
822 i = max;
823 m = ATM_OC3_PCR;
824 }
825 else {
826 i = 255;
6a19309d 827 m = DIV_ROUND_UP(ATM_OC3_PCR*255, max);
1da177e4
LT		 828 }
829 }
830 if (i > m) {
831 printk(KERN_CRIT DEV_LABEL "shaper algorithm botched "
832 "[%d,%d] -> i=%ld,m=%ld\n",min,max,i,m);
833 m = i;
834 }
835 *pcr = i*ATM_OC3_PCR/m;
836 c = 20; /* @@@ should use max_cdv ! */
837 if ((min && *pcr < min) || (max && *pcr > max)) return -EINVAL;
838 if (zatm_dev->tx_bw < *pcr) return -EAGAIN;
839 zatm_dev->tx_bw -= *pcr;
840 }
841 spin_lock_irqsave(&zatm_dev->lock, flags);
842 DPRINTK("i = %d, m = %d, PCR = %d\n",i,m,*pcr);
843 zpokel(zatm_dev,(i << uPD98401_IM_I_SHIFT) | m,uPD98401_IM(shaper));
844 zpokel(zatm_dev,c << uPD98401_PC_C_SHIFT,uPD98401_PC(shaper));
845 zpokel(zatm_dev,0,uPD98401_X(shaper));
846 zpokel(zatm_dev,0,uPD98401_Y(shaper));
847 zpokel(zatm_dev,uPD98401_PS_E,uPD98401_PS(shaper));
848 spin_unlock_irqrestore(&zatm_dev->lock, flags);
849 return shaper;
850}
851
852
853static void dealloc_shaper(struct atm_dev *dev,int shaper)
854{
855 struct zatm_dev *zatm_dev;
856 unsigned long flags;
857
858 zatm_dev = ZATM_DEV(dev);
859 if (shaper == zatm_dev->ubr) {
860 if (--zatm_dev->ubr_ref_cnt) return;
861 zatm_dev->ubr = -1;
862 }
863 spin_lock_irqsave(&zatm_dev->lock, flags);
864 zpokel(zatm_dev,zpeekl(zatm_dev,uPD98401_PS(shaper)) & ~uPD98401_PS_E,
865 uPD98401_PS(shaper));
866 spin_unlock_irqrestore(&zatm_dev->lock, flags);
867 zatm_dev->free_shapers |= 1 << shaper;
868}
869
870
871static void close_tx(struct atm_vcc *vcc)
872{
873 struct zatm_dev *zatm_dev;
874 struct zatm_vcc *zatm_vcc;
875 unsigned long flags;
876 int chan;
877
878 zatm_vcc = ZATM_VCC(vcc);
879 zatm_dev = ZATM_DEV(vcc->dev);
880 chan = zatm_vcc->tx_chan;
881 if (!chan) return;
882 DPRINTK("close_tx\n");
883 if (skb_peek(&zatm_vcc->backlog)) {
884 printk("waiting for backlog to drain ...\n");
885 event_dump();
886 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->backlog));
887 }
888 if (skb_peek(&zatm_vcc->tx_queue)) {
889 printk("waiting for TX queue to drain ...\n");
890 event_dump();
891 wait_event(zatm_vcc->tx_wait, !skb_peek(&zatm_vcc->tx_queue));
892 }
893 spin_lock_irqsave(&zatm_dev->lock, flags);
894#if 0
64b9d16e 895 zwait();
1da177e4
LT		 896 zout(uPD98401_DEACT_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
897#endif
64b9d16e 898 zwait();
1da177e4 899 zout(uPD98401_CLOSE_CHAN | (chan << uPD98401_CHAN_ADDR_SHIFT),CMR);
64b9d16e 900 zwait();
1da177e4
LT		 901 if (!(zin(CMR) & uPD98401_CHAN_ADDR))
902 printk(KERN_CRIT DEV_LABEL "(itf %d): can't close TX channel "
903 "%d\n",vcc->dev->number,chan);
904 spin_unlock_irqrestore(&zatm_dev->lock, flags);
905 zatm_vcc->tx_chan = 0;
906 zatm_dev->tx_map[chan] = NULL;
907 if (zatm_vcc->shaper != zatm_dev->ubr) {
908 zatm_dev->tx_bw += vcc->qos.txtp.min_pcr;
909 dealloc_shaper(vcc->dev,zatm_vcc->shaper);
910 }
a2c1aa54 911 kfree(zatm_vcc->ring);
1da177e4
LT		 912}
913
914
915static int open_tx_first(struct atm_vcc *vcc)
916{
917 struct zatm_dev *zatm_dev;
918 struct zatm_vcc *zatm_vcc;
919 unsigned long flags;
920 u32 *loop;
921 unsigned short chan;
a6343afb 922 int unlimited;
1da177e4
LT		 923
924 DPRINTK("open_tx_first\n");
925 zatm_dev = ZATM_DEV(vcc->dev);
926 zatm_vcc = ZATM_VCC(vcc);
927 zatm_vcc->tx_chan = 0;
928 if (vcc->qos.txtp.traffic_class == ATM_NONE) return 0;
929 spin_lock_irqsave(&zatm_dev->lock, flags);
64b9d16e 930 zwait();
1da177e4 931 zout(uPD98401_OPEN_CHAN,CMR);
64b9d16e 932 zwait();
1da177e4
LT		 933 DPRINTK("0x%x 0x%x\n",zin(CMR),zin(CER));
934 chan = (zin(CMR) & uPD98401_CHAN_ADDR) >> uPD98401_CHAN_ADDR_SHIFT;
935 spin_unlock_irqrestore(&zatm_dev->lock, flags);
936 DPRINTK("chan is %d\n",chan);
937 if (!chan) return -EAGAIN;
938 unlimited = vcc->qos.txtp.traffic_class == ATM_UBR &&
939 (!vcc->qos.txtp.max_pcr || vcc->qos.txtp.max_pcr == ATM_MAX_PCR ||
940 vcc->qos.txtp.max_pcr >= ATM_OC3_PCR);
941 if (unlimited && zatm_dev->ubr != -1) zatm_vcc->shaper = zatm_dev->ubr;
942 else {
a6343afb
JG		 943 int uninitialized_var(pcr);
944
1da177e4
LT		 945 if (unlimited) vcc->qos.txtp.max_sdu = ATM_MAX_AAL5_PDU;
946 if ((zatm_vcc->shaper = alloc_shaper(vcc->dev,&pcr,
947 vcc->qos.txtp.min_pcr,vcc->qos.txtp.max_pcr,unlimited))
948 < 0) {
949 close_tx(vcc);
950 return zatm_vcc->shaper;
951 }
952 if (pcr > ATM_OC3_PCR) pcr = ATM_OC3_PCR;
953 vcc->qos.txtp.min_pcr = vcc->qos.txtp.max_pcr = pcr;
954 }
955 zatm_vcc->tx_chan = chan;
956 skb_queue_head_init(&zatm_vcc->tx_queue);
957 init_waitqueue_head(&zatm_vcc->tx_wait);
958 /* initialize ring */
0c1cca1d 959 zatm_vcc->ring = kzalloc(RING_SIZE,GFP_KERNEL);
1da177e4 960 if (!zatm_vcc->ring) return -ENOMEM;
1da177e4
LT		 961 loop = zatm_vcc->ring+RING_ENTRIES*RING_WORDS;
962 loop[0] = uPD98401_TXPD_V;
963 loop[1] = loop[2] = 0;
964 loop[3] = virt_to_bus(zatm_vcc->ring);
965 zatm_vcc->ring_curr = 0;
966 zatm_vcc->txing = 0;
967 skb_queue_head_init(&zatm_vcc->backlog);
968 zpokel(zatm_dev,virt_to_bus(zatm_vcc->ring),
969 chan*VC_SIZE/4+uPD98401_TXVC_QRP);
970 return 0;
971}
972
973
974static int open_tx_second(struct atm_vcc *vcc)
975{
976 struct zatm_dev *zatm_dev;
977 struct zatm_vcc *zatm_vcc;
978 unsigned long flags;
979
980 DPRINTK("open_tx_second\n");
981 zatm_dev = ZATM_DEV(vcc->dev);
982 zatm_vcc = ZATM_VCC(vcc);
983 if (!zatm_vcc->tx_chan) return 0;
984 /* set up VC descriptor */
985 spin_lock_irqsave(&zatm_dev->lock, flags);
986 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4);
987 zpokel(zatm_dev,uPD98401_TXVC_L | (zatm_vcc->shaper <<
988 uPD98401_TXVC_SHP_SHIFT) | (vcc->vpi << uPD98401_TXVC_VPI_SHIFT) |
989 vcc->vci,zatm_vcc->tx_chan*VC_SIZE/4+1);
990 zpokel(zatm_dev,0,zatm_vcc->tx_chan*VC_SIZE/4+2);
991 spin_unlock_irqrestore(&zatm_dev->lock, flags);
992 zatm_dev->tx_map[zatm_vcc->tx_chan] = vcc;
993 return 0;
994}
995
996
997static int start_tx(struct atm_dev *dev)
998{
999 struct zatm_dev *zatm_dev;
1000 int i;
1001
1002 DPRINTK("start_tx\n");
1003 zatm_dev = ZATM_DEV(dev);
32230ac1
ME		 1004 zatm_dev->tx_map = kmalloc_array(zatm_dev->chans,
1005 sizeof(*zatm_dev->tx_map),
1006 GFP_KERNEL);
1da177e4
LT		 1007 if (!zatm_dev->tx_map) return -ENOMEM;
1008 zatm_dev->tx_bw = ATM_OC3_PCR;
1009 zatm_dev->free_shapers = (1 << NR_SHAPERS)-1;
1010 zatm_dev->ubr = -1;
1011 zatm_dev->ubr_ref_cnt = 0;
1012 /* initialize shapers */
1013 for (i = 0; i < NR_SHAPERS; i++) zpokel(zatm_dev,0,uPD98401_PS(i));
1014 return 0;
1015}
1016
1017
1018/*------------------------------- interrupts --------------------------------*/
1019
1020
7d12e780 1021static irqreturn_t zatm_int(int irq,void *dev_id)
1da177e4
LT		 1022{
1023 struct atm_dev *dev;
1024 struct zatm_dev *zatm_dev;
1025 u32 reason;
1026 int handled = 0;
1027
1028 dev = dev_id;
1029 zatm_dev = ZATM_DEV(dev);
1030 while ((reason = zin(GSR))) {
1031 handled = 1;
1032 EVENT("reason 0x%x\n",reason,0);
1033 if (reason & uPD98401_INT_PI) {
1034 EVENT("PHY int\n",0,0);
1035 dev->phy->interrupt(dev);
1036 }
1037 if (reason & uPD98401_INT_RQA) {
1038 unsigned long pools;
1039 int i;
1040
1041 pools = zin(RQA);
1042 EVENT("RQA (0x%08x)\n",pools,0);
1043 for (i = 0; pools; i++) {
1044 if (pools & 1) {
1045 refill_pool(dev,i);
1046 zatm_dev->pool_info[i].rqa_count++;
1047 }
1048 pools >>= 1;
1049 }
1050 }
1051 if (reason & uPD98401_INT_RQU) {
1052 unsigned long pools;
1053 int i;
1054 pools = zin(RQU);
1055 printk(KERN_WARNING DEV_LABEL "(itf %d): RQU 0x%08lx\n",
1056 dev->number,pools);
1057 event_dump();
1058 for (i = 0; pools; i++) {
1059 if (pools & 1) {
1060 refill_pool(dev,i);
1061 zatm_dev->pool_info[i].rqu_count++;
1062 }
1063 pools >>= 1;
1064 }
1065 }
1066 /* don't handle RD */
1067 if (reason & uPD98401_INT_SPE)
1068 printk(KERN_ALERT DEV_LABEL "(itf %d): system parity "
1069 "error at 0x%08x\n",dev->number,zin(ADDR));
1070 if (reason & uPD98401_INT_CPE)
1071 printk(KERN_ALERT DEV_LABEL "(itf %d): control memory "
1072 "parity error at 0x%08x\n",dev->number,zin(ADDR));
1073 if (reason & uPD98401_INT_SBE) {
1074 printk(KERN_ALERT DEV_LABEL "(itf %d): system bus "
1075 "error at 0x%08x\n",dev->number,zin(ADDR));
1076 event_dump();
1077 }
1078 /* don't handle IND */
1079 if (reason & uPD98401_INT_MF) {
1080 printk(KERN_CRIT DEV_LABEL "(itf %d): mailbox full "
1081 "(0x%x)\n",dev->number,(reason & uPD98401_INT_MF)
1082 >> uPD98401_INT_MF_SHIFT);
1083 event_dump();
1084 /* @@@ should try to recover */
1085 }
1086 if (reason & uPD98401_INT_MM) {
1087 if (reason & 1) poll_rx(dev,0);
1088 if (reason & 2) poll_rx(dev,1);
1089 if (reason & 4) poll_tx(dev,2);
1090 if (reason & 8) poll_tx(dev,3);
1091 }
1092 /* @@@ handle RCRn */
1093 }
1094 return IRQ_RETVAL(handled);
1095}
1096
1097
1098/*----------------------------- (E)EPROM access -----------------------------*/
1099
1100
6c44512d
GKH		 1101static void eprom_set(struct zatm_dev *zatm_dev, unsigned long value,
1102 unsigned short cmd)
1da177e4
LT		 1103{
1104 int error;
1105
1106 if ((error = pci_write_config_dword(zatm_dev->pci_dev,cmd,value)))
1107 printk(KERN_ERR DEV_LABEL ": PCI write failed (0x%02x)\n",
1108 error);
1109}
1110
1111
6c44512d 1112static unsigned long eprom_get(struct zatm_dev *zatm_dev, unsigned short cmd)
1da177e4
LT		 1113{
1114 unsigned int value;
1115 int error;
1116
1117 if ((error = pci_read_config_dword(zatm_dev->pci_dev,cmd,&value)))
1118 printk(KERN_ERR DEV_LABEL ": PCI read failed (0x%02x)\n",
1119 error);
1120 return value;
1121}
1122
1123
6c44512d
GKH		 1124static void eprom_put_bits(struct zatm_dev *zatm_dev, unsigned long data,
1125 int bits, unsigned short cmd)
1da177e4
LT		 1126{
1127 unsigned long value;
1128 int i;
1129
1130 for (i = bits-1; i >= 0; i--) {
1131 value = ZEPROM_CS | (((data >> i) & 1) ? ZEPROM_DI : 0);
1132 eprom_set(zatm_dev,value,cmd);
1133 eprom_set(zatm_dev,value | ZEPROM_SK,cmd);
1134 eprom_set(zatm_dev,value,cmd);
1135 }
1136}
1137
1138
6c44512d
GKH		 1139static void eprom_get_byte(struct zatm_dev *zatm_dev, unsigned char *byte,
1140 unsigned short cmd)
1da177e4
LT		 1141{
1142 int i;
1143
1144 *byte = 0;
1145 for (i = 8; i; i--) {
1146 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1147 eprom_set(zatm_dev,ZEPROM_CS | ZEPROM_SK,cmd);
1148 *byte <<= 1;
1149 if (eprom_get(zatm_dev,cmd) & ZEPROM_DO) *byte |= 1;
1150 eprom_set(zatm_dev,ZEPROM_CS,cmd);
1151 }
1152}
1153
1154
f9c6442a
IB		 1155static int eprom_try_esi(struct atm_dev *dev, unsigned short cmd, int offset,
1156 int swap)
1da177e4
LT		 1157{
1158 unsigned char buf[ZEPROM_SIZE];
1159 struct zatm_dev *zatm_dev;
1160 int i;
1161
1162 zatm_dev = ZATM_DEV(dev);
1163 for (i = 0; i < ZEPROM_SIZE; i += 2) {
1164 eprom_set(zatm_dev,ZEPROM_CS,cmd); /* select EPROM */
1165 eprom_put_bits(zatm_dev,ZEPROM_CMD_READ,ZEPROM_CMD_LEN,cmd);
1166 eprom_put_bits(zatm_dev,i >> 1,ZEPROM_ADDR_LEN,cmd);
1167 eprom_get_byte(zatm_dev,buf+i+swap,cmd);
1168 eprom_get_byte(zatm_dev,buf+i+1-swap,cmd);
1169 eprom_set(zatm_dev,0,cmd); /* deselect EPROM */
1170 }
1171 memcpy(dev->esi,buf+offset,ESI_LEN);
1172 return memcmp(dev->esi,"\0\0\0\0\0",ESI_LEN); /* assumes ESI_LEN == 6 */
1173}
1174
1175
6c44512d 1176static void eprom_get_esi(struct atm_dev *dev)
1da177e4
LT		 1177{
1178 if (eprom_try_esi(dev,ZEPROM_V1_REG,ZEPROM_V1_ESI_OFF,1)) return;
1179 (void) eprom_try_esi(dev,ZEPROM_V2_REG,ZEPROM_V2_ESI_OFF,0);
1180}
1181
1182
1183/*--------------------------------- entries ---------------------------------*/
1184
1185
6c44512d 1186static int zatm_init(struct atm_dev *dev)
1da177e4
LT		 1187{
1188 struct zatm_dev *zatm_dev;
1189 struct pci_dev *pci_dev;
1190 unsigned short command;
1da177e4
LT		 1191 int error,i,last;
1192 unsigned long t0,t1,t2;
1193
1194 DPRINTK(">zatm_init\n");
1195 zatm_dev = ZATM_DEV(dev);
1196 spin_lock_init(&zatm_dev->lock);
1197 pci_dev = zatm_dev->pci_dev;
1198 zatm_dev->base = pci_resource_start(pci_dev, 0);
1199 zatm_dev->irq = pci_dev->irq;
44c10138 1200 if ((error = pci_read_config_word(pci_dev,PCI_COMMAND,&command))) {
1da177e4
LT		 1201 printk(KERN_ERR DEV_LABEL "(itf %d): init error 0x%02x\n",
1202 dev->number,error);
1203 return -EINVAL;
1204 }
1205 if ((error = pci_write_config_word(pci_dev,PCI_COMMAND,
1206 command | PCI_COMMAND_IO | PCI_COMMAND_MASTER))) {
1207 printk(KERN_ERR DEV_LABEL "(itf %d): can't enable IO (0x%02x)"
1208 "\n",dev->number,error);
1209 return -EIO;
1210 }
1211 eprom_get_esi(dev);
1212 printk(KERN_NOTICE DEV_LABEL "(itf %d): rev.%d,base=0x%x,irq=%d,",
44c10138 1213 dev->number,pci_dev->revision,zatm_dev->base,zatm_dev->irq);
1da177e4
LT		 1214 /* reset uPD98401 */
1215 zout(0,SWR);
1216 while (!(zin(GSR) & uPD98401_INT_IND));
1217 zout(uPD98401_GMR_ONE /*uPD98401_BURST4*/,GMR);
1218 last = MAX_CRAM_SIZE;
1219 for (i = last-RAM_INCREMENT; i >= 0; i -= RAM_INCREMENT) {
1220 zpokel(zatm_dev,0x55555555,i);
1221 if (zpeekl(zatm_dev,i) != 0x55555555) last = i;
1222 else {
1223 zpokel(zatm_dev,0xAAAAAAAA,i);
1224 if (zpeekl(zatm_dev,i) != 0xAAAAAAAA) last = i;
1225 else zpokel(zatm_dev,i,i);
1226 }
1227 }
1228 for (i = 0; i < last; i += RAM_INCREMENT)
1229 if (zpeekl(zatm_dev,i) != i) break;
1230 zatm_dev->mem = i << 2;
1231 while (i) zpokel(zatm_dev,0,--i);
1232 /* reset again to rebuild memory pointers */
1233 zout(0,SWR);
1234 while (!(zin(GSR) & uPD98401_INT_IND));
1235 zout(uPD98401_GMR_ONE | uPD98401_BURST8 | uPD98401_BURST4 |
1236 uPD98401_BURST2 | uPD98401_GMR_PM | uPD98401_GMR_DR,GMR);
1237 /* TODO: should shrink allocation now */
1238 printk("mem=%dkB,%s (",zatm_dev->mem >> 10,zatm_dev->copper ? "UTP" :
1239 "MMF");
1240 for (i = 0; i < ESI_LEN; i++)
1241 printk("%02X%s",dev->esi[i],i == ESI_LEN-1 ? ")\n" : "-");
1242 do {
1243 unsigned long flags;
1244
1245 spin_lock_irqsave(&zatm_dev->lock, flags);
1246 t0 = zpeekl(zatm_dev,uPD98401_TSR);
1247 udelay(10);
1248 t1 = zpeekl(zatm_dev,uPD98401_TSR);
1249 udelay(1010);
1250 t2 = zpeekl(zatm_dev,uPD98401_TSR);
1251 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1252 }
1253 while (t0 > t1 || t1 > t2); /* loop if wrapping ... */
1254 zatm_dev->khz = t2-2*t1+t0;
1255 printk(KERN_NOTICE DEV_LABEL "(itf %d): uPD98401 %d.%d at %d.%03d "
1256 "MHz\n",dev->number,
1257 (zin(VER) & uPD98401_MAJOR) >> uPD98401_MAJOR_SHIFT,
1258 zin(VER) & uPD98401_MINOR,zatm_dev->khz/1000,zatm_dev->khz % 1000);
1259 return uPD98402_init(dev);
1260}
1261
1262
6c44512d 1263static int zatm_start(struct atm_dev *dev)
1da177e4 1264{
4aa49d13
FR		 1265 struct zatm_dev *zatm_dev = ZATM_DEV(dev);
1266 struct pci_dev *pdev = zatm_dev->pci_dev;
1da177e4
LT		 1267 unsigned long curr;
1268 int pools,vccs,rx;
4aa49d13 1269 int error, i, ld;
1da177e4
LT		 1270
1271 DPRINTK("zatm_start\n");
1da177e4 1272 zatm_dev->rx_map = zatm_dev->tx_map = NULL;
4aa49d13
FR		 1273 for (i = 0; i < NR_MBX; i++)
1274 zatm_dev->mbx_start[i] = 0;
dace1453 1275 error = request_irq(zatm_dev->irq, zatm_int, IRQF_SHARED, DEV_LABEL, dev);
4aa49d13
FR		 1276 if (error < 0) {
1277 printk(KERN_ERR DEV_LABEL "(itf %d): IRQ%d is already in use\n",
1278 dev->number,zatm_dev->irq);
1279 goto done;
1da177e4 1280 }
1da177e4
LT		 1281 /* define memory regions */
1282 pools = NR_POOLS;
1283 if (NR_SHAPERS*SHAPER_SIZE > pools*POOL_SIZE)
1284 pools = NR_SHAPERS*SHAPER_SIZE/POOL_SIZE;
1285 vccs = (zatm_dev->mem-NR_SHAPERS*SHAPER_SIZE-pools*POOL_SIZE)/
1286 (2*VC_SIZE+RX_SIZE);
1287 ld = -1;
1288 for (rx = 1; rx < vccs; rx <<= 1) ld++;
1289 dev->ci_range.vpi_bits = 0; /* @@@ no VPI for now */
1290 dev->ci_range.vci_bits = ld;
1291 dev->link_rate = ATM_OC3_PCR;
1292 zatm_dev->chans = vccs; /* ??? */
1293 curr = rx*RX_SIZE/4;
1294 DPRINTK("RX pool 0x%08lx\n",curr);
1295 zpokel(zatm_dev,curr,uPD98401_PMA); /* receive pool */
1296 zatm_dev->pool_base = curr;
1297 curr += pools*POOL_SIZE/4;
1298 DPRINTK("Shapers 0x%08lx\n",curr);
1299 zpokel(zatm_dev,curr,uPD98401_SMA); /* shapers */
1300 curr += NR_SHAPERS*SHAPER_SIZE/4;
1301 DPRINTK("Free 0x%08lx\n",curr);
1302 zpokel(zatm_dev,curr,uPD98401_TOS); /* free pool */
1303 printk(KERN_INFO DEV_LABEL "(itf %d): %d shapers, %d pools, %d RX, "
1304 "%ld VCs\n",dev->number,NR_SHAPERS,pools,rx,
1305 (zatm_dev->mem-curr*4)/VC_SIZE);
1306 /* create mailboxes */
4aa49d13
FR		 1307 for (i = 0; i < NR_MBX; i++) {
1308 void *mbx;
1309 dma_addr_t mbx_dma;
1310
1311 if (!mbx_entries[i])
1312 continue;
ede58ef2
C		 1313 mbx = dma_alloc_coherent(&pdev->dev,
1314 2 * MBX_SIZE(i), &mbx_dma, GFP_KERNEL);
4aa49d13
FR		 1315 if (!mbx) {
1316 error = -ENOMEM;
1317 goto out;
1318 }
1319 /*
ede58ef2 1320 * Alignment provided by dma_alloc_coherent() isn't enough
4aa49d13
FR		 1321 * for this device.
1322 */
1323 if (((unsigned long)mbx ^ mbx_dma) & 0xffff) {
1324 printk(KERN_ERR DEV_LABEL "(itf %d): system "
1325 "bus incompatible with driver\n", dev->number);
ede58ef2 1326 dma_free_coherent(&pdev->dev, 2*MBX_SIZE(i), mbx, mbx_dma);
4aa49d13
FR		 1327 error = -ENODEV;
1328 goto out;
1da177e4 1329 }
4aa49d13
FR		 1330 DPRINTK("mbx@0x%08lx-0x%08lx\n", mbx, mbx + MBX_SIZE(i));
1331 zatm_dev->mbx_start[i] = (unsigned long)mbx;
1332 zatm_dev->mbx_dma[i] = mbx_dma;
1333 zatm_dev->mbx_end[i] = (zatm_dev->mbx_start[i] + MBX_SIZE(i)) &
1334 0xffff;
1335 zout(mbx_dma >> 16, MSH(i));
1336 zout(mbx_dma, MSL(i));
1337 zout(zatm_dev->mbx_end[i], MBA(i));
1338 zout((unsigned long)mbx & 0xffff, MTA(i));
1339 zout((unsigned long)mbx & 0xffff, MWA(i));
1340 }
1da177e4 1341 error = start_tx(dev);
4aa49d13
FR		 1342 if (error)
1343 goto out;
1da177e4 1344 error = start_rx(dev);
4aa49d13
FR		 1345 if (error)
1346 goto out_tx;
1da177e4 1347 error = dev->phy->start(dev);
4aa49d13
FR		 1348 if (error)
1349 goto out_rx;
1da177e4
LT		 1350 zout(0xffffffff,IMR); /* enable interrupts */
1351 /* enable TX & RX */
1352 zout(zin(GMR) | uPD98401_GMR_SE | uPD98401_GMR_RE,GMR);
4aa49d13
FR		 1353done:
1354 return error;
1355
1356out_rx:
a2c1aa54 1357 kfree(zatm_dev->rx_map);
4aa49d13 1358out_tx:
a2c1aa54 1359 kfree(zatm_dev->tx_map);
4aa49d13
FR		 1360out:
1361 while (i-- > 0) {
ede58ef2
C		 1362 dma_free_coherent(&pdev->dev, 2 * MBX_SIZE(i),
1363 (void *)zatm_dev->mbx_start[i],
1364 zatm_dev->mbx_dma[i]);
4aa49d13 1365 }
1da177e4 1366 free_irq(zatm_dev->irq, dev);
4aa49d13 1367 goto done;
1da177e4
LT		 1368}
1369
1370
1371static void zatm_close(struct atm_vcc *vcc)
1372{
1373 DPRINTK(">zatm_close\n");
1374 if (!ZATM_VCC(vcc)) return;
1375 clear_bit(ATM_VF_READY,&vcc->flags);
1376 close_rx(vcc);
1377 EVENT("close_tx\n",0,0);
1378 close_tx(vcc);
1379 DPRINTK("zatm_close: done waiting\n");
1380 /* deallocate memory */
1381 kfree(ZATM_VCC(vcc));
1382 vcc->dev_data = NULL;
1383 clear_bit(ATM_VF_ADDR,&vcc->flags);
1384}
1385
1386
1387static int zatm_open(struct atm_vcc *vcc)
1388{
1da177e4
LT		 1389 struct zatm_vcc *zatm_vcc;
1390 short vpi = vcc->vpi;
1391 int vci = vcc->vci;
1392 int error;
1393
1394 DPRINTK(">zatm_open\n");
1da177e4
LT		 1395 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags))
1396 vcc->dev_data = NULL;
1397 if (vci != ATM_VPI_UNSPEC && vpi != ATM_VCI_UNSPEC)
1398 set_bit(ATM_VF_ADDR,&vcc->flags);
1399 if (vcc->qos.aal != ATM_AAL5) return -EINVAL; /* @@@ AAL0 */
1400 DPRINTK(DEV_LABEL "(itf %d): open %d.%d\n",vcc->dev->number,vcc->vpi,
1401 vcc->vci);
1402 if (!test_bit(ATM_VF_PARTIAL,&vcc->flags)) {
5ad3ea3d 1403 zatm_vcc = kmalloc(sizeof(*zatm_vcc), GFP_KERNEL);
1da177e4
LT		 1404 if (!zatm_vcc) {
1405 clear_bit(ATM_VF_ADDR,&vcc->flags);
1406 return -ENOMEM;
1407 }
1408 vcc->dev_data = zatm_vcc;
1409 ZATM_VCC(vcc)->tx_chan = 0; /* for zatm_close after open_rx */
1410 if ((error = open_rx_first(vcc))) {
1411 zatm_close(vcc);
1412 return error;
1413 }
1414 if ((error = open_tx_first(vcc))) {
1415 zatm_close(vcc);
1416 return error;
1417 }
1418 }
1419 if (vci == ATM_VPI_UNSPEC || vpi == ATM_VCI_UNSPEC) return 0;
1420 if ((error = open_rx_second(vcc))) {
1421 zatm_close(vcc);
1422 return error;
1423 }
1424 if ((error = open_tx_second(vcc))) {
1425 zatm_close(vcc);
1426 return error;
1427 }
1428 set_bit(ATM_VF_READY,&vcc->flags);
1429 return 0;
1430}
1431
1432
1433static int zatm_change_qos(struct atm_vcc *vcc,struct atm_qos *qos,int flags)
1434{
1435 printk("Not yet implemented\n");
1436 return -ENOSYS;
1437 /* @@@ */
1438}
1439
1440
1441static int zatm_ioctl(struct atm_dev *dev,unsigned int cmd,void __user *arg)
1442{
1443 struct zatm_dev *zatm_dev;
1444 unsigned long flags;
1445
1446 zatm_dev = ZATM_DEV(dev);
1447 switch (cmd) {
1448 case ZATM_GETPOOLZ:
1449 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1450 /* fall through */
1451 case ZATM_GETPOOL:
1452 {
1453 struct zatm_pool_info info;
1454 int pool;
1455
1456 if (get_user(pool,
1457 &((struct zatm_pool_req __user *) arg)->pool_num))
1458 return -EFAULT;
1459 if (pool < 0 || pool > ZATM_LAST_POOL)
1460 return -EINVAL;
2be147f7
GS		 1461 pool = array_index_nospec(pool,
1462 ZATM_LAST_POOL + 1);
1da177e4
LT		 1463 spin_lock_irqsave(&zatm_dev->lock, flags);
1464 info = zatm_dev->pool_info[pool];
1465 if (cmd == ZATM_GETPOOLZ) {
1466 zatm_dev->pool_info[pool].rqa_count = 0;
1467 zatm_dev->pool_info[pool].rqu_count = 0;
1468 }
1469 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1470 return copy_to_user(
1471 &((struct zatm_pool_req __user *) arg)->info,
1472 &info,sizeof(info)) ? -EFAULT : 0;
1473 }
1474 case ZATM_SETPOOL:
1475 {
1476 struct zatm_pool_info info;
1477 int pool;
1478
1479 if (!capable(CAP_NET_ADMIN)) return -EPERM;
1480 if (get_user(pool,
1481 &((struct zatm_pool_req __user *) arg)->pool_num))
1482 return -EFAULT;
1483 if (pool < 0 || pool > ZATM_LAST_POOL)
1484 return -EINVAL;
ced9e191
GS		 1485 pool = array_index_nospec(pool,
1486 ZATM_LAST_POOL + 1);
1da177e4
LT		 1487 if (copy_from_user(&info,
1488 &((struct zatm_pool_req __user *) arg)->info,
1489 sizeof(info))) return -EFAULT;
1490 if (!info.low_water)
1491 info.low_water = zatm_dev->
1492 pool_info[pool].low_water;
1493 if (!info.high_water)
1494 info.high_water = zatm_dev->
1495 pool_info[pool].high_water;
1496 if (!info.next_thres)
1497 info.next_thres = zatm_dev->
1498 pool_info[pool].next_thres;
1499 if (info.low_water >= info.high_water ||
1500 info.low_water < 0)
1501 return -EINVAL;
1502 spin_lock_irqsave(&zatm_dev->lock, flags);
1503 zatm_dev->pool_info[pool].low_water =
1504 info.low_water;
1505 zatm_dev->pool_info[pool].high_water =
1506 info.high_water;
1507 zatm_dev->pool_info[pool].next_thres =
1508 info.next_thres;
1509 spin_unlock_irqrestore(&zatm_dev->lock, flags);
1510 return 0;
1511 }
1512 default:
1513 if (!dev->phy->ioctl) return -ENOIOCTLCMD;
1514 return dev->phy->ioctl(dev,cmd,arg);
1515 }
1516}
1517
1518
1519static int zatm_getsockopt(struct atm_vcc *vcc,int level,int optname,
1520 void __user *optval,int optlen)
1521{
1522 return -EINVAL;
1523}
1524
1525
1526static int zatm_setsockopt(struct atm_vcc *vcc,int level,int optname,
b7058842 1527 void __user *optval,unsigned int optlen)
1da177e4
LT		 1528{
1529 return -EINVAL;
1530}
1531
1532static int zatm_send(struct atm_vcc *vcc,struct sk_buff *skb)
1533{
1534 int error;
1535
1536 EVENT(">zatm_send 0x%lx\n",(unsigned long) skb,0);
1537 if (!ZATM_VCC(vcc)->tx_chan || !test_bit(ATM_VF_READY,&vcc->flags)) {
1538 if (vcc->pop) vcc->pop(vcc,skb);
1539 else dev_kfree_skb(skb);
1540 return -EINVAL;
1541 }
1542 if (!skb) {
1543 printk(KERN_CRIT "!skb in zatm_send ?\n");
1544 if (vcc->pop) vcc->pop(vcc,skb);
1545 return -EINVAL;
1546 }
1547 ATM_SKB(skb)->vcc = vcc;
1548 error = do_tx(skb);
1549 if (error != RING_BUSY) return error;
1550 skb_queue_tail(&ZATM_VCC(vcc)->backlog,skb);
1551 return 0;
1552}
1553
1554
1555static void zatm_phy_put(struct atm_dev *dev,unsigned char value,
1556 unsigned long addr)
1557{
1558 struct zatm_dev *zatm_dev;
1559
1560 zatm_dev = ZATM_DEV(dev);
64b9d16e 1561 zwait();
1da177e4
LT		 1562 zout(value,CER);
1563 zout(uPD98401_IND_ACC | uPD98401_IA_B0 |
1564 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
1565}
1566
1567
1568static unsigned char zatm_phy_get(struct atm_dev *dev,unsigned long addr)
1569{
1570 struct zatm_dev *zatm_dev;
1571
1572 zatm_dev = ZATM_DEV(dev);
64b9d16e 1573 zwait();
1da177e4
LT		 1574 zout(uPD98401_IND_ACC | uPD98401_IA_B0 | uPD98401_IA_RW |
1575 (uPD98401_IA_TGT_PHY << uPD98401_IA_TGT_SHIFT) | addr,CMR);
64b9d16e 1576 zwait();
1da177e4
LT		 1577 return zin(CER) & 0xff;
1578}
1579
1580
1581static const struct atmdev_ops ops = {
1582 .open = zatm_open,
1583 .close = zatm_close,
1584 .ioctl = zatm_ioctl,
1585 .getsockopt = zatm_getsockopt,
1586 .setsockopt = zatm_setsockopt,
1587 .send = zatm_send,
1588 .phy_put = zatm_phy_put,
1589 .phy_get = zatm_phy_get,
1590 .change_qos = zatm_change_qos,
1591};
1592
6c44512d
GKH		 1593static int zatm_init_one(struct pci_dev *pci_dev,
1594 const struct pci_device_id *ent)
1da177e4
LT		 1595{
1596 struct atm_dev *dev;
1597 struct zatm_dev *zatm_dev;
1598 int ret = -ENOMEM;
1599
5cbded58 1600 zatm_dev = kmalloc(sizeof(*zatm_dev), GFP_KERNEL);
1da177e4
LT		 1601 if (!zatm_dev) {
1602 printk(KERN_EMERG "%s: memory shortage\n", DEV_LABEL);
1603 goto out;
1604 }
1605
d9ca676b 1606 dev = atm_dev_register(DEV_LABEL, &pci_dev->dev, &ops, -1, NULL);
1da177e4
LT		 1607 if (!dev)
1608 goto out_free;
1609
1610 ret = pci_enable_device(pci_dev);
1611 if (ret < 0)
1612 goto out_deregister;
1613
1614 ret = pci_request_regions(pci_dev, DEV_LABEL);
1615 if (ret < 0)
ede58ef2
C		 1616 goto out_disable;
1617
1618 ret = dma_set_mask_and_coherent(&pci_dev->dev, DMA_BIT_MASK(32));
1619 if (ret < 0)
799f9172 1620 goto out_release;
1da177e4
LT		 1621
1622 zatm_dev->pci_dev = pci_dev;
1623 dev->dev_data = zatm_dev;
1624 zatm_dev->copper = (int)ent->driver_data;
1625 if ((ret = zatm_init(dev)) || (ret = zatm_start(dev)))
1626 goto out_release;
1627
1628 pci_set_drvdata(pci_dev, dev);
1629 zatm_dev->more = zatm_boards;
1630 zatm_boards = dev;
1631 ret = 0;
1632out:
1633 return ret;
1634
1635out_release:
1636 pci_release_regions(pci_dev);
1637out_disable:
1638 pci_disable_device(pci_dev);
1639out_deregister:
1640 atm_dev_deregister(dev);
1641out_free:
1642 kfree(zatm_dev);
1643 goto out;
1644}
1645
1646
1647MODULE_LICENSE("GPL");
1648
aea39c7f 1649static const struct pci_device_id zatm_pci_tbl[] = {
c9634ac1
PH		 1650 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1221), ZATM_COPPER },
1651 { PCI_VDEVICE(ZEITNET, PCI_DEVICE_ID_ZEITNET_1225), 0 },
1da177e4
LT		 1652 { 0, }
1653};
1654MODULE_DEVICE_TABLE(pci, zatm_pci_tbl);
1655
1656static struct pci_driver zatm_driver = {
1657 .name = DEV_LABEL,
1658 .id_table = zatm_pci_tbl,
1659 .probe = zatm_init_one,
1660};
1661
1662static int __init zatm_init_module(void)
1663{
1664 return pci_register_driver(&zatm_driver);
1665}
1666
1667module_init(zatm_init_module);
1668/* module_exit not defined so not unloadable */
Linux 6.x block layer and io_uring tree(s)