pata_hpt37x: use ATA_DMA_* constants
[linux-2.6-block.git] / drivers / ata / sata_uli.c
CommitLineData
1da177e4
LT
1/*
2 * sata_uli.c - ULi Electronics SATA
3 *
af36d7f0
JG
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2, or (at your option)
8 * any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; see the file COPYING. If not, write to
17 * the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA.
18 *
19 *
20 * libata documentation is available via 'make {ps|pdf}docs',
21 * as Documentation/DocBook/libata.*
22 *
23 * Hardware documentation available under NDA.
1da177e4
LT
24 *
25 */
26
1da177e4
LT
27#include <linux/kernel.h>
28#include <linux/module.h>
29#include <linux/pci.h>
30#include <linux/init.h>
31#include <linux/blkdev.h>
32#include <linux/delay.h>
33#include <linux/interrupt.h>
a9524a76 34#include <linux/device.h>
1da177e4
LT
35#include <scsi/scsi_host.h>
36#include <linux/libata.h>
37
38#define DRV_NAME "sata_uli"
2a3103ce 39#define DRV_VERSION "1.3"
1da177e4
LT
40
41enum {
42 uli_5289 = 0,
43 uli_5287 = 1,
44 uli_5281 = 2,
45
50106c5a
JG
46 uli_max_ports = 4,
47
1da177e4
LT
48 /* PCI configuration registers */
49 ULI5287_BASE = 0x90, /* sata0 phy SCR registers */
50 ULI5287_OFFS = 0x10, /* offset from sata0->sata1 phy regs */
51 ULI5281_BASE = 0x60, /* sata0 phy SCR registers */
52 ULI5281_OFFS = 0x60, /* offset from sata0->sata1 phy regs */
53};
54
50106c5a
JG
55struct uli_priv {
56 unsigned int scr_cfg_addr[uli_max_ports];
57};
58
5796d1c4 59static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent);
82ef04fb
TH
60static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val);
61static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val);
1da177e4 62
3b7d697d 63static const struct pci_device_id uli_pci_tbl[] = {
54bb3a94
JG
64 { PCI_VDEVICE(AL, 0x5289), uli_5289 },
65 { PCI_VDEVICE(AL, 0x5287), uli_5287 },
66 { PCI_VDEVICE(AL, 0x5281), uli_5281 },
67
1da177e4
LT
68 { } /* terminate list */
69};
70
1da177e4
LT
71static struct pci_driver uli_pci_driver = {
72 .name = DRV_NAME,
73 .id_table = uli_pci_tbl,
74 .probe = uli_init_one,
75 .remove = ata_pci_remove_one,
76};
77
193515d5 78static struct scsi_host_template uli_sht = {
68d1d07b 79 ATA_BMDMA_SHT(DRV_NAME),
1da177e4
LT
80};
81
029cfd6b
TH
82static struct ata_port_operations uli_ops = {
83 .inherits = &ata_bmdma_port_ops,
1da177e4
LT
84 .scr_read = uli_scr_read,
85 .scr_write = uli_scr_write,
70a3143a 86 .hardreset = ATA_OP_NULL,
1da177e4
LT
87};
88
1626aeb8 89static const struct ata_port_info uli_port_info = {
b2a8bbe6
TH
90 .flags = ATA_FLAG_SATA | ATA_FLAG_NO_LEGACY |
91 ATA_FLAG_IGN_SIMPLEX,
14bdef98 92 .pio_mask = ATA_PIO4,
bf6263a8 93 .udma_mask = ATA_UDMA6,
1da177e4
LT
94 .port_ops = &uli_ops,
95};
96
97
98MODULE_AUTHOR("Peer Chen");
99MODULE_DESCRIPTION("low-level driver for ULi Electronics SATA controller");
100MODULE_LICENSE("GPL");
101MODULE_DEVICE_TABLE(pci, uli_pci_tbl);
102MODULE_VERSION(DRV_VERSION);
103
104static unsigned int get_scr_cfg_addr(struct ata_port *ap, unsigned int sc_reg)
105{
cca3974e 106 struct uli_priv *hpriv = ap->host->private_data;
50106c5a 107 return hpriv->scr_cfg_addr[ap->port_no] + (4 * sc_reg);
1da177e4
LT
108}
109
82ef04fb 110static u32 uli_scr_cfg_read(struct ata_link *link, unsigned int sc_reg)
1da177e4 111{
82ef04fb
TH
112 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
113 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, sc_reg);
1da177e4
LT
114 u32 val;
115
116 pci_read_config_dword(pdev, cfg_addr, &val);
117 return val;
118}
119
82ef04fb 120static void uli_scr_cfg_write(struct ata_link *link, unsigned int scr, u32 val)
1da177e4 121{
82ef04fb
TH
122 struct pci_dev *pdev = to_pci_dev(link->ap->host->dev);
123 unsigned int cfg_addr = get_scr_cfg_addr(link->ap, scr);
1da177e4
LT
124
125 pci_write_config_dword(pdev, cfg_addr, val);
126}
127
82ef04fb 128static int uli_scr_read(struct ata_link *link, unsigned int sc_reg, u32 *val)
1da177e4
LT
129{
130 if (sc_reg > SCR_CONTROL)
da3dbb17 131 return -EINVAL;
1da177e4 132
82ef04fb 133 *val = uli_scr_cfg_read(link, sc_reg);
da3dbb17 134 return 0;
1da177e4
LT
135}
136
82ef04fb 137static int uli_scr_write(struct ata_link *link, unsigned int sc_reg, u32 val)
1da177e4 138{
5796d1c4 139 if (sc_reg > SCR_CONTROL) //SCR_CONTROL=2, SCR_ERROR=1, SCR_STATUS=0
da3dbb17 140 return -EINVAL;
1da177e4 141
82ef04fb 142 uli_scr_cfg_write(link, sc_reg, val);
da3dbb17 143 return 0;
1da177e4
LT
144}
145
5796d1c4 146static int uli_init_one(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4 147{
a9524a76 148 static int printed_version;
9a829ccf 149 const struct ata_port_info *ppi[] = { &uli_port_info, NULL };
1da177e4 150 unsigned int board_idx = (unsigned int) ent->driver_data;
9a829ccf 151 struct ata_host *host;
50106c5a 152 struct uli_priv *hpriv;
0d5ff566 153 void __iomem * const *iomap;
9a829ccf
TH
154 struct ata_ioports *ioaddr;
155 int n_ports, rc;
1da177e4 156
a9524a76
JG
157 if (!printed_version++)
158 dev_printk(KERN_INFO, &pdev->dev, "version " DRV_VERSION "\n");
159
24dc5f33 160 rc = pcim_enable_device(pdev);
1da177e4
LT
161 if (rc)
162 return rc;
163
9a829ccf
TH
164 n_ports = 2;
165 if (board_idx == uli_5287)
166 n_ports = 4;
1626aeb8
TH
167
168 /* allocate the host */
169 host = ata_host_alloc_pinfo(&pdev->dev, ppi, n_ports);
170 if (!host)
171 return -ENOMEM;
1da177e4 172
24dc5f33
TH
173 hpriv = devm_kzalloc(&pdev->dev, sizeof(*hpriv), GFP_KERNEL);
174 if (!hpriv)
175 return -ENOMEM;
9a829ccf 176 host->private_data = hpriv;
50106c5a 177
1626aeb8 178 /* the first two ports are standard SFF */
9363c382 179 rc = ata_pci_sff_init_host(host);
1626aeb8
TH
180 if (rc)
181 return rc;
182
9363c382 183 rc = ata_pci_bmdma_init(host);
1626aeb8
TH
184 if (rc)
185 return rc;
186
9a829ccf 187 iomap = host->iomap;
0d5ff566 188
1da177e4
LT
189 switch (board_idx) {
190 case uli_5287:
1626aeb8
TH
191 /* If there are four, the last two live right after
192 * the standard SFF ports.
193 */
50106c5a
JG
194 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
195 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4 196
9a829ccf
TH
197 ioaddr = &host->ports[2]->ioaddr;
198 ioaddr->cmd_addr = iomap[0] + 8;
199 ioaddr->altstatus_addr =
200 ioaddr->ctl_addr = (void __iomem *)
0d5ff566 201 ((unsigned long)iomap[1] | ATA_PCI_CTL_OFS) + 4;
9a829ccf 202 ioaddr->bmdma_addr = iomap[4] + 16;
50106c5a 203 hpriv->scr_cfg_addr[2] = ULI5287_BASE + ULI5287_OFFS*4;
9363c382 204 ata_sff_std_ports(ioaddr);
1da177e4 205
cbcdd875
TH
206 ata_port_desc(host->ports[2],
207 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
208 (unsigned long long)pci_resource_start(pdev, 0) + 8,
209 ((unsigned long long)pci_resource_start(pdev, 1) | ATA_PCI_CTL_OFS) + 4,
210 (unsigned long long)pci_resource_start(pdev, 4) + 16);
211
9a829ccf
TH
212 ioaddr = &host->ports[3]->ioaddr;
213 ioaddr->cmd_addr = iomap[2] + 8;
214 ioaddr->altstatus_addr =
215 ioaddr->ctl_addr = (void __iomem *)
0d5ff566 216 ((unsigned long)iomap[3] | ATA_PCI_CTL_OFS) + 4;
9a829ccf 217 ioaddr->bmdma_addr = iomap[4] + 24;
50106c5a 218 hpriv->scr_cfg_addr[3] = ULI5287_BASE + ULI5287_OFFS*5;
9363c382 219 ata_sff_std_ports(ioaddr);
cbcdd875
TH
220
221 ata_port_desc(host->ports[2],
222 "cmd 0x%llx ctl 0x%llx bmdma 0x%llx",
223 (unsigned long long)pci_resource_start(pdev, 2) + 9,
224 ((unsigned long long)pci_resource_start(pdev, 3) | ATA_PCI_CTL_OFS) + 4,
225 (unsigned long long)pci_resource_start(pdev, 4) + 24);
226
1da177e4
LT
227 break;
228
229 case uli_5289:
50106c5a
JG
230 hpriv->scr_cfg_addr[0] = ULI5287_BASE;
231 hpriv->scr_cfg_addr[1] = ULI5287_BASE + ULI5287_OFFS;
1da177e4
LT
232 break;
233
234 case uli_5281:
50106c5a
JG
235 hpriv->scr_cfg_addr[0] = ULI5281_BASE;
236 hpriv->scr_cfg_addr[1] = ULI5281_BASE + ULI5281_OFFS;
1da177e4
LT
237 break;
238
239 default:
240 BUG();
241 break;
242 }
243
244 pci_set_master(pdev);
a04ce0ff 245 pci_intx(pdev, 1);
9363c382
TH
246 return ata_host_activate(host, pdev->irq, ata_sff_interrupt,
247 IRQF_SHARED, &uli_sht);
1da177e4
LT
248}
249
250static int __init uli_init(void)
251{
b7887196 252 return pci_register_driver(&uli_pci_driver);
1da177e4
LT
253}
254
255static void __exit uli_exit(void)
256{
257 pci_unregister_driver(&uli_pci_driver);
258}
259
260
261module_init(uli_init);
262module_exit(uli_exit);