[linux-block.git] / drivers / ata / pata_sc1200.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * New ATA layer SC1200 driver		Alan Cox <alan@lxorguk.ukuu.org.uk>
 *
 * TODO: Mode selection filtering
 * TODO: Needs custom DMA cleanup code
 *
 * Based very heavily on
 *
 * linux/drivers/ide/pci/sc1200.c		Version 0.91	28-Jan-2003
 *
 * Copyright (C) 2000-2002		Mark Lord <mlord@pobox.com>
 * May be copied or modified under the terms of the GNU General Public License
 *
 * Development of this chipset driver was funded
 * by the nice folks at National Semiconductor.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>

#define DRV_NAME	"pata_sc1200"
#define DRV_VERSION	"0.2.6"

#define SC1200_REV_A	0x00
#define SC1200_REV_B1	0x01
#define SC1200_REV_B3	0x02
#define SC1200_REV_C1	0x03
#define SC1200_REV_D1	0x04

/**
 *	sc1200_clock	-	PCI clock
 *
 *	Return the PCI bus clocking for the SC1200 chipset configuration
 *	in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
 */

static int sc1200_clock(void)
{
	/* Magic registers that give us the chipset data */
	u8 chip_id = inb(0x903C);
	u8 silicon_rev = inb(0x903D);
	u16 pci_clock;

	if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
		return 0;	/* 33 MHz mode */

	/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
	   0/3 is 33Mhz 1 is 48 2 is 66 */

	pci_clock = inw(0x901E);
	pci_clock >>= 8;
	pci_clock &= 0x03;
	if (pci_clock == 3)
		pci_clock = 0;
	return pci_clock;
}

/**
 *	sc1200_set_piomode		-	PIO setup
 *	@ap: ATA interface
 *	@adev: device on the interface
 *
 *	Set our PIO requirements. This is fairly simple on the SC1200
 */

static void sc1200_set_piomode(struct ata_port *ap, struct ata_device *adev)
{
	static const u32 pio_timings[4][5] = {
		/* format0, 33Mhz */
		{ 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 },
		/* format1, 33Mhz */
		{ 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 },
		/* format1, 48Mhz */
		{ 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 },
		/* format1, 66Mhz */
		{ 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 }
	};

	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	u32 format;
	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	int mode = adev->pio_mode - XFER_PIO_0;

	pci_read_config_dword(pdev, reg + 4, &format);
	format >>= 31;
	format += sc1200_clock();
	pci_write_config_dword(pdev, reg + 8 * adev->devno,
				pio_timings[format][mode]);
}

/**
 *	sc1200_set_dmamode		-	DMA timing setup
 *	@ap: ATA interface
 *	@adev: Device being configured
 *
 *	We cannot mix MWDMA and UDMA without reloading timings each switch
 *	master to slave.
 */

static void sc1200_set_dmamode(struct ata_port *ap, struct ata_device *adev)
{
	static const u32 udma_timing[3][3] = {
		{ 0x00921250, 0x00911140, 0x00911030 },
		{ 0x00932470, 0x00922260, 0x00922140 },
		{ 0x009436A1, 0x00933481, 0x00923261 }
	};

	static const u32 mwdma_timing[3][3] = {
		{ 0x00077771, 0x00012121, 0x00002020 },
		{ 0x000BBBB2, 0x00024241, 0x00013131 },
		{ 0x000FFFF3, 0x00035352, 0x00015151 }
	};

	int clock = sc1200_clock();
	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	int mode = adev->dma_mode;
	u32 format;

	if (mode >= XFER_UDMA_0)
		format = udma_timing[clock][mode - XFER_UDMA_0];
	else
		format = mwdma_timing[clock][mode - XFER_MW_DMA_0];

	if (adev->devno == 0) {
		u32 timings;

		pci_read_config_dword(pdev, reg + 4, &timings);
		timings &= 0x80000000UL;
		timings |= format;
		pci_write_config_dword(pdev, reg + 4, timings);
	} else
		pci_write_config_dword(pdev, reg + 12, format);
}

/**
 *	sc1200_qc_issue		-	command issue
 *	@qc: command pending
 *
 *	Called when the libata layer is about to issue a command. We wrap
 *	this interface so that we can load the correct ATA timings if
 *	necessary.  Specifically we have a problem that there is only
 *	one MWDMA/UDMA bit.
 */

static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;
	struct ata_device *prev = ap->private_data;

	/* See if the DMA settings could be wrong */
	if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
		/* Maybe, but do the channels match MWDMA/UDMA ? */
		if ((ata_using_udma(adev) && !ata_using_udma(prev)) ||
		    (ata_using_udma(prev) && !ata_using_udma(adev)))
		    	/* Switch the mode bits */
		    	sc1200_set_dmamode(ap, adev);
	}

	return ata_bmdma_qc_issue(qc);
}

/**
 *	sc1200_qc_defer	-	implement serialization
 *	@qc: command
 *
 *	Serialize command issue on this controller.
 */

static int sc1200_qc_defer(struct ata_queued_cmd *qc)
{
	struct ata_host *host = qc->ap->host;
	struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
	int rc;

	/* First apply the usual rules */
	rc = ata_std_qc_defer(qc);
	if (rc != 0)
		return rc;

	/* Now apply serialization rules. Only allow a command if the
	   other channel state machine is idle */
	if (alt && alt->qc_active)
		return	ATA_DEFER_PORT;
	return 0;
}

static const struct scsi_host_template sc1200_sht = {
	ATA_BASE_SHT(DRV_NAME),
	.sg_tablesize	= LIBATA_DUMB_MAX_PRD,
	.dma_boundary	= ATA_DMA_BOUNDARY,
};

static struct ata_port_operations sc1200_port_ops = {
	.inherits	= &ata_bmdma_port_ops,
	.qc_prep 	= ata_bmdma_dumb_qc_prep,
	.qc_issue	= sc1200_qc_issue,
	.qc_defer	= sc1200_qc_defer,
	.cable_detect	= ata_cable_40wire,
	.set_piomode	= sc1200_set_piomode,
	.set_dmamode	= sc1200_set_dmamode,
};

/**
 *	sc1200_init_one		-	Initialise an SC1200
 *	@dev: PCI device
 *	@id: Entry in match table
 *
 *	Just throw the needed data at the libata helper and it does all
 *	our work.
 */

static int sc1200_init_one(struct pci_dev *dev, const struct pci_device_id *id)
{
	static const struct ata_port_info info = {
		.flags = ATA_FLAG_SLAVE_POSS,
		.pio_mask = ATA_PIO4,
		.mwdma_mask = ATA_MWDMA2,
		.udma_mask = ATA_UDMA2,
		.port_ops = &sc1200_port_ops
	};
	const struct ata_port_info *ppi[] = { &info, NULL };

	return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0);
}

static const struct pci_device_id sc1200[] = {
	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },

	{ },
};

static struct pci_driver sc1200_pci_driver = {
	.name 		= DRV_NAME,
	.id_table	= sc1200,
	.probe 		= sc1200_init_one,
	.remove		= ata_pci_remove_one,
#ifdef CONFIG_PM_SLEEP
	.suspend	= ata_pci_device_suspend,
	.resume		= ata_pci_device_resume,
#endif
};

module_pci_driver(sc1200_pci_driver);

MODULE_AUTHOR("Alan Cox, Mark Lord");
MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, sc1200);
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
45051539	1	// SPDX-License-Identifier: GPL-2.0-only
669a5db4	2	/*
ab771630	3	* New ATA layer SC1200 driver Alan Cox <alan@lxorguk.ukuu.org.uk>
669a5db4 JG	4	*
669a5db4 JG	5	* TODO: Mode selection filtering
669a5db4 JG	6	* TODO: Needs custom DMA cleanup code
	7	*
	8	* Based very heavily on
	9	*
	10	* linux/drivers/ide/pci/sc1200.c Version 0.91 28-Jan-2003
	11	*
	12	* Copyright (C) 2000-2002 Mark Lord <mlord@pobox.com>
	13	* May be copied or modified under the terms of the GNU General Public License
	14	*
	15	* Development of this chipset driver was funded
	16	* by the nice folks at National Semiconductor.
669a5db4 JG	17	*/
	18
	19	#include <linux/kernel.h>
	20	#include <linux/module.h>
	21	#include <linux/pci.h>
669a5db4 JG	22	#include <linux/blkdev.h>
	23	#include <linux/delay.h>
	24	#include <scsi/scsi_host.h>
	25	#include <linux/libata.h>
	26
70f301a6	27	#define DRV_NAME "pata_sc1200"
2a3103ce	28	#define DRV_VERSION "0.2.6"
669a5db4 JG	29
	30	#define SC1200_REV_A 0x00
	31	#define SC1200_REV_B1 0x01
	32	#define SC1200_REV_B3 0x02
	33	#define SC1200_REV_C1 0x03
	34	#define SC1200_REV_D1 0x04
	35
	36	/**
	37	* sc1200_clock - PCI clock
	38	*
	39	* Return the PCI bus clocking for the SC1200 chipset configuration
	40	* in use. We return 0 for 33MHz 1 for 48MHz and 2 for 66Mhz
	41	*/
85cd7251	42
669a5db4 JG	43	static int sc1200_clock(void)
	44	{
	45	/* Magic registers that give us the chipset data */
	46	u8 chip_id = inb(0x903C);
	47	u8 silicon_rev = inb(0x903D);
	48	u16 pci_clock;
85cd7251	49
669a5db4 JG	50	if (chip_id == 0x04 && silicon_rev < SC1200_REV_B1)
	51	return 0; /* 33 MHz mode */
	52
	53	/* Clock generator configuration 0x901E its 8/9 are the PCI clocking
	54	0/3 is 33Mhz 1 is 48 2 is 66 */
	55
	56	pci_clock = inw(0x901E);
	57	pci_clock >>= 8;
	58	pci_clock &= 0x03;
	59	if (pci_clock == 3)
	60	pci_clock = 0;
	61	return pci_clock;
	62	}
	63
	64	/**
	65	* sc1200_set_piomode - PIO setup
	66	* @ap: ATA interface
	67	* @adev: device on the interface
	68	*
	69	* Set our PIO requirements. This is fairly simple on the SC1200
	70	*/
85cd7251	71
669a5db4 JG	72	static void sc1200_set_piomode(struct ata_port ap, struct ata_device adev)
	73	{
	74	static const u32 pio_timings[4][5] = {
d0dd4a01 BZ	75	/* format0, 33Mhz */
	76	{ 0x00009172, 0x00012171, 0x00020080, 0x00032010, 0x00040010 },
	77	/* format1, 33Mhz */
	78	{ 0xd1329172, 0x71212171, 0x30200080, 0x20102010, 0x00100010 },
	79	/* format1, 48Mhz */
	80	{ 0xfaa3f4f3, 0xc23232b2, 0x513101c1, 0x31213121, 0x10211021 },
	81	/* format1, 66Mhz */
	82	{ 0xfff4fff4, 0xf35353d3, 0x814102f1, 0x42314231, 0x11311131 }
669a5db4 JG	83	};
	84
	85	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	86	u32 format;
	87	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	88	int mode = adev->pio_mode - XFER_PIO_0;
85cd7251	89
669a5db4 JG	90	pci_read_config_dword(pdev, reg + 4, &format);
	91	format >>= 31;
	92	format += sc1200_clock();
85cd7251	93	pci_write_config_dword(pdev, reg + 8 * adev->devno,
669a5db4 JG	94	pio_timings[format][mode]);
	95	}
	96
	97	/**
	98	* sc1200_set_dmamode - DMA timing setup
	99	* @ap: ATA interface
	100	* @adev: Device being configured
	101	*
	102	* We cannot mix MWDMA and UDMA without reloading timings each switch
	103	* master to slave.
	104	*/
85cd7251	105
669a5db4 JG	106	static void sc1200_set_dmamode(struct ata_port ap, struct ata_device adev)
	107	{
	108	static const u32 udma_timing[3][3] = {
	109	{ 0x00921250, 0x00911140, 0x00911030 },
	110	{ 0x00932470, 0x00922260, 0x00922140 },
	111	{ 0x009436A1, 0x00933481, 0x00923261 }
	112	};
85cd7251	113
669a5db4 JG	114	static const u32 mwdma_timing[3][3] = {
	115	{ 0x00077771, 0x00012121, 0x00002020 },
	116	{ 0x000BBBB2, 0x00024241, 0x00013131 },
	117	{ 0x000FFFF3, 0x00035352, 0x00015151 }
	118	};
85cd7251	119
669a5db4 JG	120	int clock = sc1200_clock();
	121	struct pci_dev *pdev = to_pci_dev(ap->host->dev);
	122	unsigned int reg = 0x40 + 0x10 * ap->port_no;
	123	int mode = adev->dma_mode;
	124	u32 format;
	125
	126	if (mode >= XFER_UDMA_0)
	127	format = udma_timing[clock][mode - XFER_UDMA_0];
	128	else
	129	format = mwdma_timing[clock][mode - XFER_MW_DMA_0];
85cd7251	130
669a5db4 JG	131	if (adev->devno == 0) {
669a5db4 JG	132	u32 timings;
85cd7251	133
669a5db4 JG	134	pci_read_config_dword(pdev, reg + 4, &timings);
	135	timings &= 0x80000000UL;
	136	timings \|= format;
	137	pci_write_config_dword(pdev, reg + 4, timings);
	138	} else
	139	pci_write_config_dword(pdev, reg + 12, format);
	140	}
	141
	142	/**
9363c382	143	* sc1200_qc_issue - command issue
669a5db4 JG	144	* @qc: command pending
	145	*
	146	* Called when the libata layer is about to issue a command. We wrap
	147	* this interface so that we can load the correct ATA timings if
3a4fa0a2	148	* necessary. Specifically we have a problem that there is only
669a5db4 JG	149	* one MWDMA/UDMA bit.
	150	*/
	151
9363c382	152	static unsigned int sc1200_qc_issue(struct ata_queued_cmd *qc)
669a5db4 JG	153	{
	154	struct ata_port *ap = qc->ap;
	155	struct ata_device *adev = qc->dev;
	156	struct ata_device *prev = ap->private_data;
	157
	158	/* See if the DMA settings could be wrong */
b15b3eba	159	if (ata_dma_enabled(adev) && adev != prev && prev != NULL) {
669a5db4	160	/* Maybe, but do the channels match MWDMA/UDMA ? */
b15b3eba AC	161	if ((ata_using_udma(adev) && !ata_using_udma(prev)) \|\|
b15b3eba AC	162	(ata_using_udma(prev) && !ata_using_udma(adev)))
669a5db4 JG	163	/* Switch the mode bits */
	164	sc1200_set_dmamode(ap, adev);
	165	}
	166
360ff783	167	return ata_bmdma_qc_issue(qc);
669a5db4 JG	168	}
669a5db4 JG	169
c0f2ee34 AC	170	/**
	171	* sc1200_qc_defer - implement serialization
	172	* @qc: command
	173	*
	174	* Serialize command issue on this controller.
	175	*/
	176
	177	static int sc1200_qc_defer(struct ata_queued_cmd *qc)
	178	{
	179	struct ata_host *host = qc->ap->host;
	180	struct ata_port *alt = host->ports[1 ^ qc->ap->port_no];
	181	int rc;
	182
	183	/* First apply the usual rules */
	184	rc = ata_std_qc_defer(qc);
	185	if (rc != 0)
	186	return rc;
	187
	188	/* Now apply serialization rules. Only allow a command if the
	189	other channel state machine is idle */
	190	if (alt && alt->qc_active)
	191	return ATA_DEFER_PORT;
	192	return 0;
	193	}
	194
25df73d9	195	static const struct scsi_host_template sc1200_sht = {
160be1bc	196	ATA_BASE_SHT(DRV_NAME),
68d1d07b	197	.sg_tablesize = LIBATA_DUMB_MAX_PRD,
160be1bc	198	.dma_boundary = ATA_DMA_BOUNDARY,
669a5db4 JG	199	};
	200
	201	static struct ata_port_operations sc1200_port_ops = {
029cfd6b	202	.inherits = &ata_bmdma_port_ops,
f47451c4	203	.qc_prep = ata_bmdma_dumb_qc_prep,
9363c382	204	.qc_issue = sc1200_qc_issue,
c0f2ee34	205	.qc_defer = sc1200_qc_defer,
029cfd6b TH	206	.cable_detect = ata_cable_40wire,
	207	.set_piomode = sc1200_set_piomode,
	208	.set_dmamode = sc1200_set_dmamode,
85cd7251	209	};
669a5db4 JG	210
	211	/**
	212	* sc1200_init_one - Initialise an SC1200
	213	* @dev: PCI device
	214	* @id: Entry in match table
	215	*
	216	* Just throw the needed data at the libata helper and it does all
	217	* our work.
	218	*/
85cd7251	219
669a5db4 JG	220	static int sc1200_init_one(struct pci_dev dev, const struct pci_device_id id)
669a5db4 JG	221	{
1626aeb8	222	static const struct ata_port_info info = {
1d2808fd	223	.flags = ATA_FLAG_SLAVE_POSS,
14bdef98 EIB	224	.pio_mask = ATA_PIO4,
	225	.mwdma_mask = ATA_MWDMA2,
	226	.udma_mask = ATA_UDMA2,
669a5db4 JG	227	.port_ops = &sc1200_port_ops
669a5db4 JG	228	};
6d4f950e	229	const struct ata_port_info *ppi[] = { &info, NULL };
1626aeb8	230
1c5afdf7	231	return ata_pci_bmdma_init_one(dev, ppi, &sc1200_sht, NULL, 0);
669a5db4 JG	232	}
669a5db4 JG	233
2d2744fc JG	234	static const struct pci_device_id sc1200[] = {
	235	{ PCI_VDEVICE(NS, PCI_DEVICE_ID_NS_SCx200_IDE), },
	236
	237	{ },
669a5db4 JG	238	};
	239
	240	static struct pci_driver sc1200_pci_driver = {
2d2744fc	241	.name = DRV_NAME,
669a5db4 JG	242	.id_table = sc1200,
669a5db4 JG	243	.probe = sc1200_init_one,
30ced0f0	244	.remove = ata_pci_remove_one,
58eb8cd5	245	#ifdef CONFIG_PM_SLEEP
30ced0f0 A	246	.suspend = ata_pci_device_suspend,
30ced0f0 A	247	.resume = ata_pci_device_resume,
438ac6d5	248	#endif
669a5db4 JG	249	};
669a5db4 JG	250
2fc75da0	251	module_pci_driver(sc1200_pci_driver);
669a5db4	252
669a5db4 JG	253	MODULE_AUTHOR("Alan Cox, Mark Lord");
	254	MODULE_DESCRIPTION("low-level driver for the NS/AMD SC1200");
	255	MODULE_LICENSE("GPL");
	256	MODULE_DEVICE_TABLE(pci, sc1200);
	257	MODULE_VERSION(DRV_VERSION);