[linux-2.6-block.git] / drivers / ata / pata_radisys.c

/*
 *    pata_radisys.c - Intel PATA/SATA controllers
 *
 *	(C) 2006 Red Hat <alan@redhat.com>
 *
 *    Some parts based on ata_piix.c by Jeff Garzik and others.
 *
 *    A PIIX relative, this device has a single ATA channel and no
 *    slave timings, SITRE or PPE. In that sense it is a close relative
 *    of the original PIIX. It does however support UDMA 33/66 per channel
 *    although no other modes/timings. Also lacking is 32bit I/O on the ATA
 *    port.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/init.h>
#include <linux/blkdev.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <scsi/scsi_host.h>
#include <linux/libata.h>
#include <linux/ata.h>

#define DRV_NAME	"pata_radisys"
#define DRV_VERSION	"0.4.1"

/**
 *	radisys_probe_init		-	probe begin
 *	@ap: ATA port
 *
 *	Set up cable type and use generic probe init
 */

static int radisys_pre_reset(struct ata_port *ap)
{
	ap->cbl = ATA_CBL_PATA80;
	return ata_std_prereset(ap);
}


/**
 *	radisys_pata_error_handler - Probe specified port on PATA host controller
 *	@ap: Port to probe
 *	@classes:
 *
 *	LOCKING:
 *	None (inherited from caller).
 */

static void radisys_pata_error_handler(struct ata_port *ap)
{
	ata_bmdma_drive_eh(ap, radisys_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
}

/**
 *	radisys_set_piomode - Initialize host controller PATA PIO timings
 *	@ap: Port whose timings we are configuring
 *	@adev: um
 *
 *	Set PIO mode for device, in host controller PCI config space.
 *
 *	LOCKING:
 *	None (inherited from caller).
 */

static void radisys_set_piomode (struct ata_port *ap, struct ata_device *adev)
{
	unsigned int pio	= adev->pio_mode - XFER_PIO_0;
	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
	u16 idetm_data;
	int control = 0;

	/*
	 *	See Intel Document 298600-004 for the timing programing rules
	 *	for PIIX/ICH. Note that the early PIIX does not have the slave
	 *	timing port at 0x44. The Radisys is a relative of the PIIX
	 *	but not the same so be careful.
	 */

	static const	 /* ISP  RTC */
	u8 timings[][2]	= { { 0, 0 },	/* Check me */
			    { 0, 0 },
			    { 1, 1 },
			    { 2, 2 },
			    { 3, 3 }, };

	if (pio > 0)
		control |= 1;	/* TIME1 enable */
	if (ata_pio_need_iordy(adev))
		control |= 2;	/* IE IORDY */

	pci_read_config_word(dev, 0x40, &idetm_data);

	/* Enable IE and TIME as appropriate. Clear the other
	   drive timing bits */
	idetm_data &= 0xCCCC;
	idetm_data |= (control << (4 * adev->devno));
	idetm_data |= (timings[pio][0] << 12) |
			(timings[pio][1] << 8);
	pci_write_config_word(dev, 0x40, idetm_data);

	/* Track which port is configured */
	ap->private_data = adev;
}

/**
 *	radisys_set_dmamode - Initialize host controller PATA DMA timings
 *	@ap: Port whose timings we are configuring
 *	@adev: Device to program
 *	@isich: True if the device is an ICH and has IOCFG registers
 *
 *	Set MWDMA mode for device, in host controller PCI config space.
 *
 *	LOCKING:
 *	None (inherited from caller).
 */

static void radisys_set_dmamode (struct ata_port *ap, struct ata_device *adev)
{
	struct pci_dev *dev	= to_pci_dev(ap->host->dev);
	u16 idetm_data;
	u8 udma_enable;

	static const	 /* ISP  RTC */
	u8 timings[][2]	= { { 0, 0 },
			    { 0, 0 },
			    { 1, 1 },
			    { 2, 2 },
			    { 3, 3 }, };

	/*
	 * MWDMA is driven by the PIO timings. We must also enable
	 * IORDY unconditionally.
	 */

	pci_read_config_word(dev, 0x40, &idetm_data);
	pci_read_config_byte(dev, 0x48, &udma_enable);

	if (adev->dma_mode < XFER_UDMA_0) {
		unsigned int mwdma	= adev->dma_mode - XFER_MW_DMA_0;
		const unsigned int needed_pio[3] = {
			XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
		};
		int pio = needed_pio[mwdma] - XFER_PIO_0;
		int control = 3;	/* IORDY|TIME0 */

		/* If the drive MWDMA is faster than it can do PIO then
		   we must force PIO0 for PIO cycles. */

		if (adev->pio_mode < needed_pio[mwdma])
			control = 1;

		/* Mask out the relevant control and timing bits we will load. Also
		   clear the other drive TIME register as a precaution */

		idetm_data &= 0xCCCC;
		idetm_data |= control << (4 * adev->devno);
		idetm_data |= (timings[pio][0] << 12) | (timings[pio][1] << 8);

		udma_enable &= ~(1 << adev->devno);
	} else {
		u8 udma_mode;

		/* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */

		pci_read_config_byte(dev, 0x4A, &udma_mode);

		if (adev->xfer_mode == XFER_UDMA_2)
			udma_mode &= ~ (1 << adev->devno);
		else /* UDMA 4 */
			udma_mode |= (1 << adev->devno);

		pci_write_config_byte(dev, 0x4A, udma_mode);

		udma_enable |= (1 << adev->devno);
	}
	pci_write_config_word(dev, 0x40, idetm_data);
	pci_write_config_byte(dev, 0x48, udma_enable);

	/* Track which port is configured */
	ap->private_data = adev;
}

/**
 *	radisys_qc_issue_prot	-	command issue
 *	@qc: command pending
 *
 *	Called when the libata layer is about to issue a command. We wrap
 *	this interface so that we can load the correct ATA timings if
 *	neccessary. Our logic also clears TIME0/TIME1 for the other device so
 *	that, even if we get this wrong, cycles to the other device will
 *	be made PIO0.
 */

static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc)
{
	struct ata_port *ap = qc->ap;
	struct ata_device *adev = qc->dev;

	if (adev != ap->private_data) {
		/* UDMA timing is not shared */
		if (adev->dma_mode < XFER_UDMA_0) {
			if (adev->dma_mode)
				radisys_set_dmamode(ap, adev);
			else if (adev->pio_mode)
				radisys_set_piomode(ap, adev);
		}
	}
	return ata_qc_issue_prot(qc);
}


static struct scsi_host_template radisys_sht = {
	.module			= THIS_MODULE,
	.name			= DRV_NAME,
	.ioctl			= ata_scsi_ioctl,
	.queuecommand		= ata_scsi_queuecmd,
	.can_queue		= ATA_DEF_QUEUE,
	.this_id		= ATA_SHT_THIS_ID,
	.sg_tablesize		= LIBATA_MAX_PRD,
	.cmd_per_lun		= ATA_SHT_CMD_PER_LUN,
	.emulated		= ATA_SHT_EMULATED,
	.use_clustering		= ATA_SHT_USE_CLUSTERING,
	.proc_name		= DRV_NAME,
	.dma_boundary		= ATA_DMA_BOUNDARY,
	.slave_configure	= ata_scsi_slave_config,
	.slave_destroy		= ata_scsi_slave_destroy,
	.bios_param		= ata_std_bios_param,
	.resume			= ata_scsi_device_resume,
	.suspend		= ata_scsi_device_suspend,
};

static const struct ata_port_operations radisys_pata_ops = {
	.port_disable		= ata_port_disable,
	.set_piomode		= radisys_set_piomode,
	.set_dmamode		= radisys_set_dmamode,
	.mode_filter		= ata_pci_default_filter,

	.tf_load		= ata_tf_load,
	.tf_read		= ata_tf_read,
	.check_status		= ata_check_status,
	.exec_command		= ata_exec_command,
	.dev_select		= ata_std_dev_select,

	.freeze			= ata_bmdma_freeze,
	.thaw			= ata_bmdma_thaw,
	.error_handler		= radisys_pata_error_handler,
	.post_internal_cmd	= ata_bmdma_post_internal_cmd,

	.bmdma_setup		= ata_bmdma_setup,
	.bmdma_start		= ata_bmdma_start,
	.bmdma_stop		= ata_bmdma_stop,
	.bmdma_status		= ata_bmdma_status,
	.qc_prep		= ata_qc_prep,
	.qc_issue		= radisys_qc_issue_prot,
	.data_xfer		= ata_pio_data_xfer,

	.irq_handler		= ata_interrupt,
	.irq_clear		= ata_bmdma_irq_clear,

	.port_start		= ata_port_start,
};


/**
 *	radisys_init_one - Register PIIX ATA PCI device with kernel services
 *	@pdev: PCI device to register
 *	@ent: Entry in radisys_pci_tbl matching with @pdev
 *
 *	Called from kernel PCI layer.  We probe for combined mode (sigh),
 *	and then hand over control to libata, for it to do the rest.
 *
 *	LOCKING:
 *	Inherited from PCI layer (may sleep).
 *
 *	RETURNS:
 *	Zero on success, or -ERRNO value.
 */

static int radisys_init_one (struct pci_dev *pdev, const struct pci_device_id *ent)
{
	static int printed_version;
	static struct ata_port_info info = {
		.sht		= &radisys_sht,
		.flags		= ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST,
		.pio_mask	= 0x1f,	/* pio0-4 */
		.mwdma_mask	= 0x07, /* mwdma1-2 */
		.udma_mask	= 0x14, /* UDMA33/66 only */
		.port_ops	= &radisys_pata_ops,
	};
	static struct ata_port_info *port_info[2] = { &info, &info };

	if (!printed_version++)
		dev_printk(KERN_DEBUG, &pdev->dev,
			   "version " DRV_VERSION "\n");

	return ata_pci_init_one(pdev, port_info, 2);
}

static const struct pci_device_id radisys_pci_tbl[] = {
	{ PCI_VDEVICE(RADISYS, 0x8201), },

	{ }	/* terminate list */
};

static struct pci_driver radisys_pci_driver = {
	.name			= DRV_NAME,
	.id_table		= radisys_pci_tbl,
	.probe			= radisys_init_one,
	.remove			= ata_pci_remove_one,
	.suspend		= ata_pci_device_suspend,
	.resume			= ata_pci_device_resume,
};

static int __init radisys_init(void)
{
	return pci_register_driver(&radisys_pci_driver);
}

static void __exit radisys_exit(void)
{
	pci_unregister_driver(&radisys_pci_driver);
}

module_init(radisys_init);
module_exit(radisys_exit);

MODULE_AUTHOR("Alan Cox");
MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
MODULE_LICENSE("GPL");
MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
MODULE_VERSION(DRV_VERSION);
Commit	Line	Data
669a5db4 JG	1	/*
	2	* pata_radisys.c - Intel PATA/SATA controllers
	3	*
	4	* (C) 2006 Red Hat <alan@redhat.com>
	5	*
	6	* Some parts based on ata_piix.c by Jeff Garzik and others.
	7	*
	8	* A PIIX relative, this device has a single ATA channel and no
	9	* slave timings, SITRE or PPE. In that sense it is a close relative
	10	* of the original PIIX. It does however support UDMA 33/66 per channel
	11	* although no other modes/timings. Also lacking is 32bit I/O on the ATA
	12	* port.
	13	*/
	14
	15	#include <linux/kernel.h>
	16	#include <linux/module.h>
	17	#include <linux/pci.h>
	18	#include <linux/init.h>
	19	#include <linux/blkdev.h>
	20	#include <linux/delay.h>
	21	#include <linux/device.h>
	22	#include <scsi/scsi_host.h>
	23	#include <linux/libata.h>
	24	#include <linux/ata.h>
	25
	26	#define DRV_NAME "pata_radisys"
	27	#define DRV_VERSION "0.4.1"
	28
	29	/**
	30	* radisys_probe_init - probe begin
	31	* @ap: ATA port
	32	*
	33	* Set up cable type and use generic probe init
	34	*/
85cd7251	35
669a5db4 JG	36	static int radisys_pre_reset(struct ata_port *ap)
	37	{
	38	ap->cbl = ATA_CBL_PATA80;
	39	return ata_std_prereset(ap);
	40	}
	41
	42
	43	/**
	44	* radisys_pata_error_handler - Probe specified port on PATA host controller
	45	* @ap: Port to probe
	46	* @classes:
	47	*
	48	* LOCKING:
	49	* None (inherited from caller).
	50	*/
	51
	52	static void radisys_pata_error_handler(struct ata_port *ap)
	53	{
	54	ata_bmdma_drive_eh(ap, radisys_pre_reset, ata_std_softreset, NULL, ata_std_postreset);
	55	}
	56
	57	/**
	58	* radisys_set_piomode - Initialize host controller PATA PIO timings
	59	* @ap: Port whose timings we are configuring
	60	* @adev: um
	61	*
	62	* Set PIO mode for device, in host controller PCI config space.
	63	*
	64	* LOCKING:
	65	* None (inherited from caller).
	66	*/
	67
	68	static void radisys_set_piomode (struct ata_port ap, struct ata_device adev)
	69	{
	70	unsigned int pio = adev->pio_mode - XFER_PIO_0;
	71	struct pci_dev *dev = to_pci_dev(ap->host->dev);
	72	u16 idetm_data;
	73	int control = 0;
	74
	75	/*
	76	* See Intel Document 298600-004 for the timing programing rules
	77	* for PIIX/ICH. Note that the early PIIX does not have the slave
	78	* timing port at 0x44. The Radisys is a relative of the PIIX
	79	* but not the same so be careful.
	80	*/
	81
	82	static const /* ISP RTC */
	83	u8 timings[][2] = { { 0, 0 }, /* Check me */
	84	{ 0, 0 },
	85	{ 1, 1 },
	86	{ 2, 2 },
	87	{ 3, 3 }, };
	88
	89	if (pio > 0)
	90	control \|= 1; /* TIME1 enable */
	91	if (ata_pio_need_iordy(adev))
	92	control \|= 2; /* IE IORDY */
	93
	94	pci_read_config_word(dev, 0x40, &idetm_data);
	95
	96	/* Enable IE and TIME as appropriate. Clear the other
	97	drive timing bits */
	98	idetm_data &= 0xCCCC;
	99	idetm_data \|= (control << (4 * adev->devno));
100	idetm_data \|= (timings[pio][0] << 12) \|
101	(timings[pio][1] << 8);
102	pci_write_config_word(dev, 0x40, idetm_data);
103
104	/* Track which port is configured */
105	ap->private_data = adev;
106	}
107
108	/**
109	* radisys_set_dmamode - Initialize host controller PATA DMA timings
110	* @ap: Port whose timings we are configuring
111	* @adev: Device to program
112	* @isich: True if the device is an ICH and has IOCFG registers
113	*
114	* Set MWDMA mode for device, in host controller PCI config space.
115	*
116	* LOCKING:
117	* None (inherited from caller).
118	*/
119
120	static void radisys_set_dmamode (struct ata_port ap, struct ata_device adev)
121	{
122	struct pci_dev *dev = to_pci_dev(ap->host->dev);
123	u16 idetm_data;
124	u8 udma_enable;
85cd7251	125
669a5db4 JG	126	static const /* ISP RTC */
	127	u8 timings[][2] = { { 0, 0 },
	128	{ 0, 0 },
	129	{ 1, 1 },
	130	{ 2, 2 },
	131	{ 3, 3 }, };
	132
	133	/*
	134	* MWDMA is driven by the PIO timings. We must also enable
	135	* IORDY unconditionally.
	136	*/
	137
	138	pci_read_config_word(dev, 0x40, &idetm_data);
	139	pci_read_config_byte(dev, 0x48, &udma_enable);
	140
	141	if (adev->dma_mode < XFER_UDMA_0) {
	142	unsigned int mwdma = adev->dma_mode - XFER_MW_DMA_0;
	143	const unsigned int needed_pio[3] = {
	144	XFER_PIO_0, XFER_PIO_3, XFER_PIO_4
	145	};
	146	int pio = needed_pio[mwdma] - XFER_PIO_0;
	147	int control = 3; /* IORDY\|TIME0 */
	148
	149	/* If the drive MWDMA is faster than it can do PIO then
	150	we must force PIO0 for PIO cycles. */
	151
	152	if (adev->pio_mode < needed_pio[mwdma])
	153	control = 1;
	154
	155	/* Mask out the relevant control and timing bits we will load. Also
	156	clear the other drive TIME register as a precaution */
85cd7251	157
669a5db4 JG	158	idetm_data &= 0xCCCC;
	159	idetm_data \|= control << (4 * adev->devno);
	160	idetm_data \|= (timings[pio][0] << 12) \| (timings[pio][1] << 8);
	161
	162	udma_enable &= ~(1 << adev->devno);
	163	} else {
	164	u8 udma_mode;
85cd7251	165
669a5db4	166	/* UDMA66 on: UDMA 33 and 66 are switchable via register 0x4A */
85cd7251	167
669a5db4	168	pci_read_config_byte(dev, 0x4A, &udma_mode);
85cd7251	169
669a5db4 JG	170	if (adev->xfer_mode == XFER_UDMA_2)
	171	udma_mode &= ~ (1 << adev->devno);
	172	else /* UDMA 4 */
	173	udma_mode \|= (1 << adev->devno);
85cd7251	174
669a5db4	175	pci_write_config_byte(dev, 0x4A, udma_mode);
85cd7251	176
669a5db4 JG	177	udma_enable \|= (1 << adev->devno);
	178	}
	179	pci_write_config_word(dev, 0x40, idetm_data);
	180	pci_write_config_byte(dev, 0x48, udma_enable);
	181
	182	/* Track which port is configured */
	183	ap->private_data = adev;
	184	}
	185
	186	/**
	187	* radisys_qc_issue_prot - command issue
	188	* @qc: command pending
	189	*
	190	* Called when the libata layer is about to issue a command. We wrap
	191	* this interface so that we can load the correct ATA timings if
	192	* neccessary. Our logic also clears TIME0/TIME1 for the other device so
	193	* that, even if we get this wrong, cycles to the other device will
	194	* be made PIO0.
	195	*/
	196
	197	static unsigned int radisys_qc_issue_prot(struct ata_queued_cmd *qc)
	198	{
	199	struct ata_port *ap = qc->ap;
	200	struct ata_device *adev = qc->dev;
	201
	202	if (adev != ap->private_data) {
	203	/* UDMA timing is not shared */
	204	if (adev->dma_mode < XFER_UDMA_0) {
	205	if (adev->dma_mode)
	206	radisys_set_dmamode(ap, adev);
	207	else if (adev->pio_mode)
	208	radisys_set_piomode(ap, adev);
	209	}
	210	}
	211	return ata_qc_issue_prot(qc);
	212	}
	213
	214
	215	static struct scsi_host_template radisys_sht = {
	216	.module = THIS_MODULE,
	217	.name = DRV_NAME,
	218	.ioctl = ata_scsi_ioctl,
	219	.queuecommand = ata_scsi_queuecmd,
	220	.can_queue = ATA_DEF_QUEUE,
	221	.this_id = ATA_SHT_THIS_ID,
	222	.sg_tablesize = LIBATA_MAX_PRD,
669a5db4 JG	223	.cmd_per_lun = ATA_SHT_CMD_PER_LUN,
	224	.emulated = ATA_SHT_EMULATED,
	225	.use_clustering = ATA_SHT_USE_CLUSTERING,
	226	.proc_name = DRV_NAME,
	227	.dma_boundary = ATA_DMA_BOUNDARY,
	228	.slave_configure = ata_scsi_slave_config,
afdfe899	229	.slave_destroy = ata_scsi_slave_destroy,
669a5db4	230	.bios_param = ata_std_bios_param,
30ced0f0 A	231	.resume = ata_scsi_device_resume,
30ced0f0 A	232	.suspend = ata_scsi_device_suspend,
669a5db4 JG	233	};
	234
	235	static const struct ata_port_operations radisys_pata_ops = {
	236	.port_disable = ata_port_disable,
	237	.set_piomode = radisys_set_piomode,
	238	.set_dmamode = radisys_set_dmamode,
	239	.mode_filter = ata_pci_default_filter,
	240
	241	.tf_load = ata_tf_load,
	242	.tf_read = ata_tf_read,
	243	.check_status = ata_check_status,
	244	.exec_command = ata_exec_command,
	245	.dev_select = ata_std_dev_select,
	246
	247	.freeze = ata_bmdma_freeze,
	248	.thaw = ata_bmdma_thaw,
	249	.error_handler = radisys_pata_error_handler,
	250	.post_internal_cmd = ata_bmdma_post_internal_cmd,
	251
	252	.bmdma_setup = ata_bmdma_setup,
	253	.bmdma_start = ata_bmdma_start,
	254	.bmdma_stop = ata_bmdma_stop,
	255	.bmdma_status = ata_bmdma_status,
	256	.qc_prep = ata_qc_prep,
	257	.qc_issue = radisys_qc_issue_prot,
	258	.data_xfer = ata_pio_data_xfer,
	259
669a5db4 JG	260	.irq_handler = ata_interrupt,
	261	.irq_clear = ata_bmdma_irq_clear,
	262
	263	.port_start = ata_port_start,
669a5db4 JG	264	};
	265
	266
	267	/**
	268	* radisys_init_one - Register PIIX ATA PCI device with kernel services
	269	* @pdev: PCI device to register
	270	* @ent: Entry in radisys_pci_tbl matching with @pdev
	271	*
	272	* Called from kernel PCI layer. We probe for combined mode (sigh),
	273	* and then hand over control to libata, for it to do the rest.
	274	*
	275	* LOCKING:
	276	* Inherited from PCI layer (may sleep).
	277	*
	278	* RETURNS:
	279	* Zero on success, or -ERRNO value.
	280	*/
	281
	282	static int radisys_init_one (struct pci_dev pdev, const struct pci_device_id ent)
	283	{
	284	static int printed_version;
	285	static struct ata_port_info info = {
	286	.sht = &radisys_sht,
	287	.flags = ATA_FLAG_SLAVE_POSS \| ATA_FLAG_SRST,
	288	.pio_mask = 0x1f, /* pio0-4 */
	289	.mwdma_mask = 0x07, /* mwdma1-2 */
	290	.udma_mask = 0x14, /* UDMA33/66 only */
	291	.port_ops = &radisys_pata_ops,
	292	};
	293	static struct ata_port_info *port_info[2] = { &info, &info };
	294
	295	if (!printed_version++)
	296	dev_printk(KERN_DEBUG, &pdev->dev,
	297	"version " DRV_VERSION "\n");
	298
	299	return ata_pci_init_one(pdev, port_info, 2);
	300	}
	301
	302	static const struct pci_device_id radisys_pci_tbl[] = {
2d2744fc JG	303	{ PCI_VDEVICE(RADISYS, 0x8201), },
2d2744fc JG	304
669a5db4 JG	305	{ } /* terminate list */
	306	};
	307
	308	static struct pci_driver radisys_pci_driver = {
	309	.name = DRV_NAME,
	310	.id_table = radisys_pci_tbl,
	311	.probe = radisys_init_one,
	312	.remove = ata_pci_remove_one,
30ced0f0 A	313	.suspend = ata_pci_device_suspend,
30ced0f0 A	314	.resume = ata_pci_device_resume,
669a5db4 JG	315	};
	316
	317	static int __init radisys_init(void)
	318	{
	319	return pci_register_driver(&radisys_pci_driver);
	320	}
	321
	322	static void __exit radisys_exit(void)
	323	{
	324	pci_unregister_driver(&radisys_pci_driver);
	325	}
	326
669a5db4 JG	327	module_init(radisys_init);
	328	module_exit(radisys_exit);
	329
	330	MODULE_AUTHOR("Alan Cox");
	331	MODULE_DESCRIPTION("SCSI low-level driver for Radisys R82600 controllers");
	332	MODULE_LICENSE("GPL");
	333	MODULE_DEVICE_TABLE(pci, radisys_pci_tbl);
	334	MODULE_VERSION(DRV_VERSION);
	335