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a20c9e82 PM |
1 | /* |
2 | * Generic platform device PATA driver | |
3 | * | |
f7fc0ceb | 4 | * Copyright (C) 2006 - 2007 Paul Mundt |
a20c9e82 PM |
5 | * |
6 | * Based on pata_pcmcia: | |
7 | * | |
ab771630 | 8 | * Copyright 2005-2006 Red Hat Inc, all rights reserved. |
a20c9e82 PM |
9 | * |
10 | * This file is subject to the terms and conditions of the GNU General Public | |
11 | * License. See the file "COPYING" in the main directory of this archive | |
12 | * for more details. | |
13 | */ | |
14 | #include <linux/kernel.h> | |
15 | #include <linux/module.h> | |
a20c9e82 PM |
16 | #include <linux/blkdev.h> |
17 | #include <scsi/scsi_host.h> | |
18 | #include <linux/ata.h> | |
19 | #include <linux/libata.h> | |
20 | #include <linux/platform_device.h> | |
0a87e3e9 | 21 | #include <linux/ata_platform.h> |
a20c9e82 PM |
22 | |
23 | #define DRV_NAME "pata_platform" | |
f7fc0ceb | 24 | #define DRV_VERSION "1.2" |
a20c9e82 PM |
25 | |
26 | static int pio_mask = 1; | |
6ddcec95 MR |
27 | module_param(pio_mask, int, 0); |
28 | MODULE_PARM_DESC(pio_mask, "PIO modes supported, mode 0 only by default"); | |
a20c9e82 PM |
29 | |
30 | /* | |
31 | * Provide our own set_mode() as we don't want to change anything that has | |
32 | * already been configured.. | |
33 | */ | |
0260731f | 34 | static int pata_platform_set_mode(struct ata_link *link, struct ata_device **unused) |
a20c9e82 | 35 | { |
f58229f8 | 36 | struct ata_device *dev; |
a20c9e82 | 37 | |
1eca4365 TH |
38 | ata_for_each_dev(dev, link, ENABLED) { |
39 | /* We don't really care */ | |
40 | dev->pio_mode = dev->xfer_mode = XFER_PIO_0; | |
41 | dev->xfer_shift = ATA_SHIFT_PIO; | |
42 | dev->flags |= ATA_DFLAG_PIO; | |
a9a79dfe | 43 | ata_dev_info(dev, "configured for PIO\n"); |
a20c9e82 | 44 | } |
161c888b | 45 | return 0; |
a20c9e82 PM |
46 | } |
47 | ||
25df73d9 | 48 | static const struct scsi_host_template pata_platform_sht = { |
68d1d07b | 49 | ATA_PIO_SHT(DRV_NAME), |
a20c9e82 PM |
50 | }; |
51 | ||
a20c9e82 | 52 | static void pata_platform_setup_port(struct ata_ioports *ioaddr, |
cf03613e | 53 | unsigned int shift) |
a20c9e82 | 54 | { |
a20c9e82 | 55 | /* Fixup the port shift for platforms that need it */ |
a20c9e82 PM |
56 | ioaddr->data_addr = ioaddr->cmd_addr + (ATA_REG_DATA << shift); |
57 | ioaddr->error_addr = ioaddr->cmd_addr + (ATA_REG_ERR << shift); | |
58 | ioaddr->feature_addr = ioaddr->cmd_addr + (ATA_REG_FEATURE << shift); | |
59 | ioaddr->nsect_addr = ioaddr->cmd_addr + (ATA_REG_NSECT << shift); | |
60 | ioaddr->lbal_addr = ioaddr->cmd_addr + (ATA_REG_LBAL << shift); | |
61 | ioaddr->lbam_addr = ioaddr->cmd_addr + (ATA_REG_LBAM << shift); | |
62 | ioaddr->lbah_addr = ioaddr->cmd_addr + (ATA_REG_LBAH << shift); | |
63 | ioaddr->device_addr = ioaddr->cmd_addr + (ATA_REG_DEVICE << shift); | |
64 | ioaddr->status_addr = ioaddr->cmd_addr + (ATA_REG_STATUS << shift); | |
65 | ioaddr->command_addr = ioaddr->cmd_addr + (ATA_REG_CMD << shift); | |
66 | } | |
67 | ||
68 | /** | |
cf03613e AV |
69 | * __pata_platform_probe - attach a platform interface |
70 | * @dev: device | |
71 | * @io_res: Resource representing I/O base | |
72 | * @ctl_res: Resource representing CTL base | |
73 | * @irq_res: Resource representing IRQ and its flags | |
74 | * @ioport_shift: I/O port shift | |
75 | * @__pio_mask: PIO mask | |
17263905 | 76 | * @sht: scsi_host_template to use when registering |
f3d5e4f1 | 77 | * @use16bit: Flag to indicate 16-bit IO instead of 32-bit |
a20c9e82 PM |
78 | * |
79 | * Register a platform bus IDE interface. Such interfaces are PIO and we | |
80 | * assume do not support IRQ sharing. | |
81 | * | |
f7fc0ceb | 82 | * Platform devices are expected to contain at least 2 resources per port: |
a20c9e82 PM |
83 | * |
84 | * - I/O Base (IORESOURCE_IO or IORESOURCE_MEM) | |
85 | * - CTL Base (IORESOURCE_IO or IORESOURCE_MEM) | |
f7fc0ceb PM |
86 | * |
87 | * and optionally: | |
88 | * | |
a20c9e82 PM |
89 | * - IRQ (IORESOURCE_IRQ) |
90 | * | |
91 | * If the base resources are both mem types, the ioremap() is handled | |
92 | * here. For IORESOURCE_IO, it's assumed that there's no remapping | |
93 | * necessary. | |
f7fc0ceb PM |
94 | * |
95 | * If no IRQ resource is present, PIO polling mode is used instead. | |
a20c9e82 | 96 | */ |
0ec24914 GKH |
97 | int __pata_platform_probe(struct device *dev, struct resource *io_res, |
98 | struct resource *ctl_res, struct resource *irq_res, | |
17263905 | 99 | unsigned int ioport_shift, int __pio_mask, |
25df73d9 | 100 | const struct scsi_host_template *sht, bool use16bit) |
a20c9e82 | 101 | { |
5d728824 TH |
102 | struct ata_host *host; |
103 | struct ata_port *ap; | |
a20c9e82 | 104 | unsigned int mmio; |
cf03613e AV |
105 | int irq = 0; |
106 | int irq_flags = 0; | |
a20c9e82 PM |
107 | |
108 | /* | |
109 | * Check for MMIO | |
110 | */ | |
111 | mmio = (( io_res->flags == IORESOURCE_MEM) && | |
112 | (ctl_res->flags == IORESOURCE_MEM)); | |
113 | ||
f7fc0ceb PM |
114 | /* |
115 | * And the IRQ | |
116 | */ | |
cf03613e AV |
117 | if (irq_res && irq_res->start > 0) { |
118 | irq = irq_res->start; | |
baac9ce1 | 119 | irq_flags = (irq_res->flags & IRQF_TRIGGER_MASK) | IRQF_SHARED; |
cf03613e | 120 | } |
f7fc0ceb | 121 | |
a20c9e82 PM |
122 | /* |
123 | * Now that that's out of the way, wire up the port.. | |
124 | */ | |
cf03613e | 125 | host = ata_host_alloc(dev, 1); |
5d728824 TH |
126 | if (!host) |
127 | return -ENOMEM; | |
128 | ap = host->ports[0]; | |
129 | ||
f3d5e4f1 | 130 | ap->ops = devm_kzalloc(dev, sizeof(*ap->ops), GFP_KERNEL); |
9b6d90e2 ZQ |
131 | if (!ap->ops) |
132 | return -ENOMEM; | |
f3d5e4f1 AS |
133 | ap->ops->inherits = &ata_sff_port_ops; |
134 | ap->ops->cable_detect = ata_cable_unknown; | |
135 | ap->ops->set_mode = pata_platform_set_mode; | |
136 | if (use16bit) | |
137 | ap->ops->sff_data_xfer = ata_sff_data_xfer; | |
138 | else | |
139 | ap->ops->sff_data_xfer = ata_sff_data_xfer32; | |
140 | ||
cf03613e | 141 | ap->pio_mask = __pio_mask; |
5d728824 | 142 | ap->flags |= ATA_FLAG_SLAVE_POSS; |
a20c9e82 | 143 | |
f7fc0ceb PM |
144 | /* |
145 | * Use polling mode if there's no IRQ | |
146 | */ | |
147 | if (!irq) { | |
148 | ap->flags |= ATA_FLAG_PIO_POLLING; | |
149 | ata_port_desc(ap, "no IRQ, using PIO polling"); | |
150 | } | |
151 | ||
a20c9e82 PM |
152 | /* |
153 | * Handle the MMIO case | |
154 | */ | |
155 | if (mmio) { | |
cf03613e | 156 | ap->ioaddr.cmd_addr = devm_ioremap(dev, io_res->start, |
041b5eac | 157 | resource_size(io_res)); |
cf03613e | 158 | ap->ioaddr.ctl_addr = devm_ioremap(dev, ctl_res->start, |
041b5eac | 159 | resource_size(ctl_res)); |
a20c9e82 | 160 | } else { |
cf03613e | 161 | ap->ioaddr.cmd_addr = devm_ioport_map(dev, io_res->start, |
041b5eac | 162 | resource_size(io_res)); |
cf03613e | 163 | ap->ioaddr.ctl_addr = devm_ioport_map(dev, ctl_res->start, |
041b5eac | 164 | resource_size(ctl_res)); |
0d5ff566 | 165 | } |
5d728824 | 166 | if (!ap->ioaddr.cmd_addr || !ap->ioaddr.ctl_addr) { |
cf03613e | 167 | dev_err(dev, "failed to map IO/CTL base\n"); |
0d5ff566 | 168 | return -ENOMEM; |
a20c9e82 PM |
169 | } |
170 | ||
5d728824 | 171 | ap->ioaddr.altstatus_addr = ap->ioaddr.ctl_addr; |
a20c9e82 | 172 | |
cf03613e | 173 | pata_platform_setup_port(&ap->ioaddr, ioport_shift); |
a20c9e82 | 174 | |
cbcdd875 TH |
175 | ata_port_desc(ap, "%s cmd 0x%llx ctl 0x%llx", mmio ? "mmio" : "ioport", |
176 | (unsigned long long)io_res->start, | |
177 | (unsigned long long)ctl_res->start); | |
178 | ||
5d728824 | 179 | /* activate */ |
9363c382 | 180 | return ata_host_activate(host, irq, irq ? ata_sff_interrupt : NULL, |
17263905 | 181 | irq_flags, sht); |
a20c9e82 | 182 | } |
cf03613e | 183 | EXPORT_SYMBOL_GPL(__pata_platform_probe); |
a20c9e82 | 184 | |
0ec24914 | 185 | static int pata_platform_probe(struct platform_device *pdev) |
cf03613e AV |
186 | { |
187 | struct resource *io_res; | |
188 | struct resource *ctl_res; | |
189 | struct resource *irq_res; | |
61b8c345 | 190 | struct pata_platform_info *pp_info = dev_get_platdata(&pdev->dev); |
cf03613e AV |
191 | |
192 | /* | |
193 | * Simple resource validation .. | |
194 | */ | |
195 | if ((pdev->num_resources != 3) && (pdev->num_resources != 2)) { | |
196 | dev_err(&pdev->dev, "invalid number of resources\n"); | |
197 | return -EINVAL; | |
198 | } | |
199 | ||
200 | /* | |
201 | * Get the I/O base first | |
202 | */ | |
8818a534 LP |
203 | io_res = platform_get_mem_or_io(pdev, 0); |
204 | if (!io_res) | |
205 | return -EINVAL; | |
cf03613e AV |
206 | |
207 | /* | |
208 | * Then the CTL base | |
209 | */ | |
8818a534 LP |
210 | ctl_res = platform_get_mem_or_io(pdev, 1); |
211 | if (!ctl_res) | |
212 | return -EINVAL; | |
cf03613e AV |
213 | |
214 | /* | |
215 | * And the IRQ | |
216 | */ | |
217 | irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
cf03613e AV |
218 | |
219 | return __pata_platform_probe(&pdev->dev, io_res, ctl_res, irq_res, | |
220 | pp_info ? pp_info->ioport_shift : 0, | |
f3d5e4f1 | 221 | pio_mask, &pata_platform_sht, false); |
cf03613e AV |
222 | } |
223 | ||
a20c9e82 PM |
224 | static struct platform_driver pata_platform_driver = { |
225 | .probe = pata_platform_probe, | |
a7eb54d4 | 226 | .remove_new = ata_platform_remove_one, |
a20c9e82 PM |
227 | .driver = { |
228 | .name = DRV_NAME, | |
a20c9e82 PM |
229 | }, |
230 | }; | |
231 | ||
99c8ea3e | 232 | module_platform_driver(pata_platform_driver); |
a20c9e82 | 233 | |
a20c9e82 PM |
234 | MODULE_AUTHOR("Paul Mundt"); |
235 | MODULE_DESCRIPTION("low-level driver for platform device ATA"); | |
236 | MODULE_LICENSE("GPL"); | |
237 | MODULE_VERSION(DRV_VERSION); | |
458622fc | 238 | MODULE_ALIAS("platform:" DRV_NAME); |