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1a59d1b8 | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
d15d6e6c JJIL |
2 | /* |
3 | * pata_atp867x.c - ARTOP 867X 64bit 4-channel UDMA133 ATA controller driver | |
4 | * | |
5 | * (C) 2009 Google Inc. John(Jung-Ik) Lee <jilee@google.com> | |
6 | * | |
7 | * Per Atp867 data sheet rev 1.2, Acard. | |
8 | * Based in part on early ide code from | |
9 | * 2003-2004 by Eric Uhrhane, Google, Inc. | |
10 | * | |
d15d6e6c JJIL |
11 | * TODO: |
12 | * 1. RAID features [comparison, XOR, striping, mirroring, etc.] | |
13 | */ | |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
17 | #include <linux/pci.h> | |
d15d6e6c JJIL |
18 | #include <linux/blkdev.h> |
19 | #include <linux/delay.h> | |
20 | #include <linux/device.h> | |
5a0e3ad6 | 21 | #include <linux/gfp.h> |
d15d6e6c JJIL |
22 | #include <scsi/scsi_host.h> |
23 | #include <linux/libata.h> | |
24 | ||
25 | #define DRV_NAME "pata_atp867x" | |
26 | #define DRV_VERSION "0.7.5" | |
27 | ||
28 | /* | |
29 | * IO Registers | |
30 | * Note that all runtime hot priv ports are cached in ap private_data | |
31 | */ | |
32 | ||
33 | enum { | |
34 | ATP867X_IO_CHANNEL_OFFSET = 0x10, | |
35 | ||
36 | /* | |
37 | * IO Register Bitfields | |
38 | */ | |
39 | ||
40 | ATP867X_IO_PIOSPD_ACTIVE_SHIFT = 4, | |
41 | ATP867X_IO_PIOSPD_RECOVER_SHIFT = 0, | |
42 | ||
43 | ATP867X_IO_DMAMODE_MSTR_SHIFT = 0, | |
44 | ATP867X_IO_DMAMODE_MSTR_MASK = 0x07, | |
45 | ATP867X_IO_DMAMODE_SLAVE_SHIFT = 4, | |
46 | ATP867X_IO_DMAMODE_SLAVE_MASK = 0x70, | |
47 | ||
48 | ATP867X_IO_DMAMODE_UDMA_6 = 0x07, | |
49 | ATP867X_IO_DMAMODE_UDMA_5 = 0x06, | |
50 | ATP867X_IO_DMAMODE_UDMA_4 = 0x05, | |
51 | ATP867X_IO_DMAMODE_UDMA_3 = 0x04, | |
52 | ATP867X_IO_DMAMODE_UDMA_2 = 0x03, | |
53 | ATP867X_IO_DMAMODE_UDMA_1 = 0x02, | |
54 | ATP867X_IO_DMAMODE_UDMA_0 = 0x01, | |
55 | ATP867X_IO_DMAMODE_DISABLE = 0x00, | |
56 | ||
57 | ATP867X_IO_SYS_INFO_66MHZ = 0x04, | |
58 | ATP867X_IO_SYS_INFO_SLOW_UDMA5 = 0x02, | |
59 | ATP867X_IO_SYS_MASK_RESERVED = (~0xf1), | |
60 | ||
61 | ATP867X_IO_PORTSPD_VAL = 0x1143, | |
62 | ATP867X_PREREAD_VAL = 0x0200, | |
63 | ||
64 | ATP867X_NUM_PORTS = 4, | |
65 | ATP867X_BAR_IOBASE = 0, | |
66 | ATP867X_BAR_ROMBASE = 6, | |
67 | }; | |
68 | ||
69 | #define ATP867X_IOBASE(ap) ((ap)->host->iomap[0]) | |
70 | #define ATP867X_SYS_INFO(ap) (0x3F + ATP867X_IOBASE(ap)) | |
71 | ||
72 | #define ATP867X_IO_PORTBASE(ap, port) (0x00 + ATP867X_IOBASE(ap) + \ | |
73 | (port) * ATP867X_IO_CHANNEL_OFFSET) | |
74 | #define ATP867X_IO_DMABASE(ap, port) (0x40 + \ | |
75 | ATP867X_IO_PORTBASE((ap), (port))) | |
76 | ||
77 | #define ATP867X_IO_STATUS(ap, port) (0x07 + \ | |
78 | ATP867X_IO_PORTBASE((ap), (port))) | |
79 | #define ATP867X_IO_ALTSTATUS(ap, port) (0x0E + \ | |
80 | ATP867X_IO_PORTBASE((ap), (port))) | |
81 | ||
82 | /* | |
83 | * hot priv ports | |
84 | */ | |
85 | #define ATP867X_IO_MSTRPIOSPD(ap, port) (0x08 + \ | |
86 | ATP867X_IO_DMABASE((ap), (port))) | |
87 | #define ATP867X_IO_SLAVPIOSPD(ap, port) (0x09 + \ | |
88 | ATP867X_IO_DMABASE((ap), (port))) | |
89 | #define ATP867X_IO_8BPIOSPD(ap, port) (0x0A + \ | |
90 | ATP867X_IO_DMABASE((ap), (port))) | |
91 | #define ATP867X_IO_DMAMODE(ap, port) (0x0B + \ | |
92 | ATP867X_IO_DMABASE((ap), (port))) | |
93 | ||
94 | #define ATP867X_IO_PORTSPD(ap, port) (0x4A + \ | |
95 | ATP867X_IO_PORTBASE((ap), (port))) | |
96 | #define ATP867X_IO_PREREAD(ap, port) (0x4C + \ | |
97 | ATP867X_IO_PORTBASE((ap), (port))) | |
98 | ||
99 | struct atp867x_priv { | |
100 | void __iomem *dma_mode; | |
101 | void __iomem *mstr_piospd; | |
102 | void __iomem *slave_piospd; | |
103 | void __iomem *eightb_piospd; | |
104 | int pci66mhz; | |
105 | }; | |
106 | ||
d15d6e6c JJIL |
107 | static void atp867x_set_dmamode(struct ata_port *ap, struct ata_device *adev) |
108 | { | |
109 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
110 | struct atp867x_priv *dp = ap->private_data; | |
111 | u8 speed = adev->dma_mode; | |
112 | u8 b; | |
566b54c8 | 113 | u8 mode = speed - XFER_UDMA_0 + 1; |
d15d6e6c JJIL |
114 | |
115 | /* | |
116 | * Doc 6.6.9: decrease the udma mode value by 1 for safer UDMA speed | |
117 | * on 66MHz bus | |
118 | * rev-A: UDMA_1~4 (5, 6 no change) | |
119 | * rev-B: all UDMA modes | |
120 | * UDMA_0 stays not to disable UDMA | |
121 | */ | |
122 | if (dp->pci66mhz && mode > ATP867X_IO_DMAMODE_UDMA_0 && | |
123 | (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B || | |
124 | mode < ATP867X_IO_DMAMODE_UDMA_5)) | |
125 | mode--; | |
126 | ||
127 | b = ioread8(dp->dma_mode); | |
128 | if (adev->devno & 1) { | |
129 | b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK) | | |
130 | (mode << ATP867X_IO_DMAMODE_SLAVE_SHIFT); | |
131 | } else { | |
132 | b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK) | | |
133 | (mode << ATP867X_IO_DMAMODE_MSTR_SHIFT); | |
134 | } | |
135 | iowrite8(b, dp->dma_mode); | |
136 | } | |
137 | ||
64207f59 JJIL |
138 | static int atp867x_get_active_clocks_shifted(struct ata_port *ap, |
139 | unsigned int clk) | |
d15d6e6c | 140 | { |
64207f59 | 141 | struct atp867x_priv *dp = ap->private_data; |
d15d6e6c JJIL |
142 | unsigned char clocks = clk; |
143 | ||
c59bcc37 BZ |
144 | /* |
145 | * Doc 6.6.9: increase the clock value by 1 for safer PIO speed | |
146 | * on 66MHz bus | |
147 | */ | |
148 | if (dp->pci66mhz) | |
149 | clocks++; | |
150 | ||
d15d6e6c JJIL |
151 | switch (clocks) { |
152 | case 0: | |
153 | clocks = 1; | |
154 | break; | |
c59bcc37 | 155 | case 1 ... 6: |
d15d6e6c JJIL |
156 | break; |
157 | default: | |
f2f01a52 | 158 | ata_port_warn(ap, "ATP867X: active %dclk is invalid. " |
c59bcc37 | 159 | "Using 12clk.\n", clk); |
df561f66 | 160 | fallthrough; |
c59bcc37 BZ |
161 | case 9 ... 12: |
162 | clocks = 7; /* 12 clk */ | |
163 | break; | |
164 | case 7: | |
64207f59 JJIL |
165 | case 8: /* default 8 clk */ |
166 | clocks = 0; | |
167 | goto active_clock_shift_done; | |
d15d6e6c | 168 | } |
64207f59 | 169 | |
64207f59 | 170 | active_clock_shift_done: |
d15d6e6c JJIL |
171 | return clocks << ATP867X_IO_PIOSPD_ACTIVE_SHIFT; |
172 | } | |
173 | ||
f2f01a52 HR |
174 | static int atp867x_get_recover_clocks_shifted(struct ata_port *ap, |
175 | unsigned int clk) | |
d15d6e6c JJIL |
176 | { |
177 | unsigned char clocks = clk; | |
178 | ||
179 | switch (clocks) { | |
180 | case 0: | |
181 | clocks = 1; | |
182 | break; | |
183 | case 1 ... 11: | |
184 | break; | |
c59bcc37 BZ |
185 | case 13: |
186 | case 14: | |
64207f59 | 187 | --clocks; /* by the spec */ |
d15d6e6c JJIL |
188 | break; |
189 | case 15: | |
190 | break; | |
191 | default: | |
f2f01a52 | 192 | ata_port_warn(ap, "ATP867X: recover %dclk is invalid. " |
64207f59 | 193 | "Using default 12clk.\n", clk); |
df561f66 | 194 | fallthrough; |
64207f59 JJIL |
195 | case 12: /* default 12 clk */ |
196 | clocks = 0; | |
d15d6e6c JJIL |
197 | break; |
198 | } | |
64207f59 | 199 | |
d15d6e6c JJIL |
200 | return clocks << ATP867X_IO_PIOSPD_RECOVER_SHIFT; |
201 | } | |
202 | ||
203 | static void atp867x_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
204 | { | |
205 | struct ata_device *peer = ata_dev_pair(adev); | |
206 | struct atp867x_priv *dp = ap->private_data; | |
207 | u8 speed = adev->pio_mode; | |
208 | struct ata_timing t, p; | |
209 | int T, UT; | |
210 | u8 b; | |
211 | ||
212 | T = 1000000000 / 33333; | |
213 | UT = T / 4; | |
214 | ||
215 | ata_timing_compute(adev, speed, &t, T, UT); | |
216 | if (peer && peer->pio_mode) { | |
217 | ata_timing_compute(peer, peer->pio_mode, &p, T, UT); | |
218 | ata_timing_merge(&p, &t, &t, ATA_TIMING_8BIT); | |
219 | } | |
220 | ||
221 | b = ioread8(dp->dma_mode); | |
222 | if (adev->devno & 1) | |
223 | b = (b & ~ATP867X_IO_DMAMODE_SLAVE_MASK); | |
224 | else | |
225 | b = (b & ~ATP867X_IO_DMAMODE_MSTR_MASK); | |
226 | iowrite8(b, dp->dma_mode); | |
227 | ||
64207f59 | 228 | b = atp867x_get_active_clocks_shifted(ap, t.active) | |
f2f01a52 | 229 | atp867x_get_recover_clocks_shifted(ap, t.recover); |
d15d6e6c JJIL |
230 | |
231 | if (adev->devno & 1) | |
232 | iowrite8(b, dp->slave_piospd); | |
233 | else | |
234 | iowrite8(b, dp->mstr_piospd); | |
235 | ||
c59bcc37 | 236 | b = atp867x_get_active_clocks_shifted(ap, t.act8b) | |
f2f01a52 | 237 | atp867x_get_recover_clocks_shifted(ap, t.rec8b); |
c59bcc37 | 238 | |
d15d6e6c JJIL |
239 | iowrite8(b, dp->eightb_piospd); |
240 | } | |
241 | ||
64207f59 JJIL |
242 | static int atp867x_cable_override(struct pci_dev *pdev) |
243 | { | |
244 | if (pdev->subsystem_vendor == PCI_VENDOR_ID_ARTOP && | |
245 | (pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867A || | |
246 | pdev->subsystem_device == PCI_DEVICE_ID_ARTOP_ATP867B)) { | |
247 | return 1; | |
248 | } | |
249 | return 0; | |
250 | } | |
251 | ||
d15d6e6c JJIL |
252 | static int atp867x_cable_detect(struct ata_port *ap) |
253 | { | |
64207f59 JJIL |
254 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); |
255 | ||
256 | if (atp867x_cable_override(pdev)) | |
257 | return ATA_CBL_PATA40_SHORT; | |
258 | ||
259 | return ATA_CBL_PATA_UNK; | |
d15d6e6c JJIL |
260 | } |
261 | ||
25df73d9 | 262 | static const struct scsi_host_template atp867x_sht = { |
d15d6e6c JJIL |
263 | ATA_BMDMA_SHT(DRV_NAME), |
264 | }; | |
265 | ||
266 | static struct ata_port_operations atp867x_ops = { | |
267 | .inherits = &ata_bmdma_port_ops, | |
268 | .cable_detect = atp867x_cable_detect, | |
269 | .set_piomode = atp867x_set_piomode, | |
270 | .set_dmamode = atp867x_set_dmamode, | |
271 | }; | |
272 | ||
273 | ||
d15d6e6c JJIL |
274 | static void atp867x_check_res(struct pci_dev *pdev) |
275 | { | |
276 | int i; | |
277 | unsigned long start, len; | |
278 | ||
279 | /* Check the PCI resources for this channel are enabled */ | |
280 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | |
281 | start = pci_resource_start(pdev, i); | |
282 | len = pci_resource_len(pdev, i); | |
f2f01a52 | 283 | dev_dbg(&pdev->dev, "ATP867X: resource start:len=%lx:%lx\n", |
d15d6e6c JJIL |
284 | start, len); |
285 | } | |
286 | } | |
287 | ||
288 | static void atp867x_check_ports(struct ata_port *ap, int port) | |
289 | { | |
290 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
291 | struct atp867x_priv *dp = ap->private_data; | |
292 | ||
f2f01a52 HR |
293 | ata_port_dbg(ap, "ATP867X: port[%d] addresses\n" |
294 | " cmd_addr =0x%lx, 0x%lx\n" | |
295 | " ctl_addr =0x%lx, 0x%lx\n" | |
296 | " bmdma_addr =0x%lx, 0x%lx\n" | |
297 | " data_addr =0x%lx\n" | |
298 | " error_addr =0x%lx\n" | |
299 | " feature_addr =0x%lx\n" | |
300 | " nsect_addr =0x%lx\n" | |
301 | " lbal_addr =0x%lx\n" | |
302 | " lbam_addr =0x%lx\n" | |
303 | " lbah_addr =0x%lx\n" | |
304 | " device_addr =0x%lx\n" | |
305 | " status_addr =0x%lx\n" | |
306 | " command_addr =0x%lx\n" | |
307 | " dp->dma_mode =0x%lx\n" | |
308 | " dp->mstr_piospd =0x%lx\n" | |
309 | " dp->slave_piospd =0x%lx\n" | |
310 | " dp->eightb_piospd =0x%lx\n" | |
d15d6e6c JJIL |
311 | " dp->pci66mhz =0x%lx\n", |
312 | port, | |
f2f01a52 HR |
313 | (unsigned long)ioaddr->cmd_addr, |
314 | (unsigned long)ATP867X_IO_PORTBASE(ap, port), | |
315 | (unsigned long)ioaddr->ctl_addr, | |
316 | (unsigned long)ATP867X_IO_ALTSTATUS(ap, port), | |
317 | (unsigned long)ioaddr->bmdma_addr, | |
318 | (unsigned long)ATP867X_IO_DMABASE(ap, port), | |
319 | (unsigned long)ioaddr->data_addr, | |
320 | (unsigned long)ioaddr->error_addr, | |
321 | (unsigned long)ioaddr->feature_addr, | |
322 | (unsigned long)ioaddr->nsect_addr, | |
323 | (unsigned long)ioaddr->lbal_addr, | |
324 | (unsigned long)ioaddr->lbam_addr, | |
325 | (unsigned long)ioaddr->lbah_addr, | |
326 | (unsigned long)ioaddr->device_addr, | |
327 | (unsigned long)ioaddr->status_addr, | |
328 | (unsigned long)ioaddr->command_addr, | |
329 | (unsigned long)dp->dma_mode, | |
330 | (unsigned long)dp->mstr_piospd, | |
331 | (unsigned long)dp->slave_piospd, | |
332 | (unsigned long)dp->eightb_piospd, | |
d15d6e6c JJIL |
333 | (unsigned long)dp->pci66mhz); |
334 | } | |
d15d6e6c JJIL |
335 | |
336 | static int atp867x_set_priv(struct ata_port *ap) | |
337 | { | |
338 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
339 | struct atp867x_priv *dp; | |
340 | int port = ap->port_no; | |
341 | ||
342 | dp = ap->private_data = | |
343 | devm_kzalloc(&pdev->dev, sizeof(*dp), GFP_KERNEL); | |
344 | if (dp == NULL) | |
345 | return -ENOMEM; | |
346 | ||
347 | dp->dma_mode = ATP867X_IO_DMAMODE(ap, port); | |
348 | dp->mstr_piospd = ATP867X_IO_MSTRPIOSPD(ap, port); | |
349 | dp->slave_piospd = ATP867X_IO_SLAVPIOSPD(ap, port); | |
350 | dp->eightb_piospd = ATP867X_IO_8BPIOSPD(ap, port); | |
351 | ||
352 | dp->pci66mhz = | |
353 | ioread8(ATP867X_SYS_INFO(ap)) & ATP867X_IO_SYS_INFO_66MHZ; | |
354 | ||
355 | return 0; | |
356 | } | |
357 | ||
358 | static void atp867x_fixup(struct ata_host *host) | |
359 | { | |
360 | struct pci_dev *pdev = to_pci_dev(host->dev); | |
361 | struct ata_port *ap = host->ports[0]; | |
362 | int i; | |
363 | u8 v; | |
364 | ||
365 | /* | |
366 | * Broken BIOS might not set latency high enough | |
367 | */ | |
368 | pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &v); | |
369 | if (v < 0x80) { | |
370 | v = 0x80; | |
371 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, v); | |
f2f01a52 | 372 | dev_dbg(&pdev->dev, "ATP867X: set latency timer to %d\n", v); |
d15d6e6c JJIL |
373 | } |
374 | ||
375 | /* | |
376 | * init 8bit io ports speed(0aaarrrr) to 43h and | |
377 | * init udma modes of master/slave to 0/0(11h) | |
378 | */ | |
379 | for (i = 0; i < ATP867X_NUM_PORTS; i++) | |
380 | iowrite16(ATP867X_IO_PORTSPD_VAL, ATP867X_IO_PORTSPD(ap, i)); | |
381 | ||
382 | /* | |
383 | * init PreREAD counts | |
384 | */ | |
385 | for (i = 0; i < ATP867X_NUM_PORTS; i++) | |
386 | iowrite16(ATP867X_PREREAD_VAL, ATP867X_IO_PREREAD(ap, i)); | |
387 | ||
388 | v = ioread8(ATP867X_IOBASE(ap) + 0x28); | |
389 | v &= 0xcf; /* Enable INTA#: bit4=0 means enable */ | |
390 | v |= 0xc0; /* Enable PCI burst, MRM & not immediate interrupts */ | |
391 | iowrite8(v, ATP867X_IOBASE(ap) + 0x28); | |
392 | ||
393 | /* | |
394 | * Turn off the over clocked udma5 mode, only for Rev-B | |
395 | */ | |
396 | v = ioread8(ATP867X_SYS_INFO(ap)); | |
397 | v &= ATP867X_IO_SYS_MASK_RESERVED; | |
398 | if (pdev->device == PCI_DEVICE_ID_ARTOP_ATP867B) | |
399 | v |= ATP867X_IO_SYS_INFO_SLOW_UDMA5; | |
400 | iowrite8(v, ATP867X_SYS_INFO(ap)); | |
401 | } | |
402 | ||
403 | static int atp867x_ata_pci_sff_init_host(struct ata_host *host) | |
404 | { | |
405 | struct device *gdev = host->dev; | |
406 | struct pci_dev *pdev = to_pci_dev(gdev); | |
407 | unsigned int mask = 0; | |
408 | int i, rc; | |
409 | ||
410 | /* | |
411 | * do not map rombase | |
412 | */ | |
413 | rc = pcim_iomap_regions(pdev, 1 << ATP867X_BAR_IOBASE, DRV_NAME); | |
414 | if (rc == -EBUSY) | |
415 | pcim_pin_device(pdev); | |
416 | if (rc) | |
417 | return rc; | |
418 | host->iomap = pcim_iomap_table(pdev); | |
419 | ||
d15d6e6c JJIL |
420 | atp867x_check_res(pdev); |
421 | ||
c9c13ba4 | 422 | for (i = 0; i < PCI_STD_NUM_BARS; i++) |
f2f01a52 HR |
423 | dev_dbg(gdev, "ATP867X: iomap[%d]=0x%p\n", i, |
424 | host->iomap[i]); | |
d15d6e6c JJIL |
425 | |
426 | /* | |
427 | * request, iomap BARs and init port addresses accordingly | |
428 | */ | |
429 | for (i = 0; i < host->n_ports; i++) { | |
430 | struct ata_port *ap = host->ports[i]; | |
431 | struct ata_ioports *ioaddr = &ap->ioaddr; | |
432 | ||
433 | ioaddr->cmd_addr = ATP867X_IO_PORTBASE(ap, i); | |
434 | ioaddr->ctl_addr = ioaddr->altstatus_addr | |
435 | = ATP867X_IO_ALTSTATUS(ap, i); | |
436 | ioaddr->bmdma_addr = ATP867X_IO_DMABASE(ap, i); | |
437 | ||
438 | ata_sff_std_ports(ioaddr); | |
439 | rc = atp867x_set_priv(ap); | |
440 | if (rc) | |
441 | return rc; | |
442 | ||
d15d6e6c | 443 | atp867x_check_ports(ap, i); |
f2f01a52 | 444 | |
d15d6e6c JJIL |
445 | ata_port_desc(ap, "cmd 0x%lx ctl 0x%lx", |
446 | (unsigned long)ioaddr->cmd_addr, | |
447 | (unsigned long)ioaddr->ctl_addr); | |
448 | ata_port_desc(ap, "bmdma 0x%lx", | |
449 | (unsigned long)ioaddr->bmdma_addr); | |
450 | ||
451 | mask |= 1 << i; | |
452 | } | |
453 | ||
454 | if (!mask) { | |
a44fec1f | 455 | dev_err(gdev, "no available native port\n"); |
d15d6e6c JJIL |
456 | return -ENODEV; |
457 | } | |
458 | ||
459 | atp867x_fixup(host); | |
460 | ||
b5e55556 | 461 | return dma_set_mask_and_coherent(&pdev->dev, ATA_DMA_MASK); |
d15d6e6c JJIL |
462 | } |
463 | ||
464 | static int atp867x_init_one(struct pci_dev *pdev, | |
465 | const struct pci_device_id *id) | |
466 | { | |
d15d6e6c JJIL |
467 | static const struct ata_port_info info_867x = { |
468 | .flags = ATA_FLAG_SLAVE_POSS, | |
469 | .pio_mask = ATA_PIO4, | |
d15d6e6c JJIL |
470 | .udma_mask = ATA_UDMA6, |
471 | .port_ops = &atp867x_ops, | |
472 | }; | |
473 | ||
474 | struct ata_host *host; | |
475 | const struct ata_port_info *ppi[] = { &info_867x, NULL }; | |
476 | int rc; | |
477 | ||
06296a1e | 478 | ata_print_version_once(&pdev->dev, DRV_VERSION); |
d15d6e6c JJIL |
479 | |
480 | rc = pcim_enable_device(pdev); | |
481 | if (rc) | |
482 | return rc; | |
483 | ||
f2f01a52 | 484 | dev_info(&pdev->dev, "ATP867X: ATP867 ATA UDMA133 controller (rev %02X)", |
d15d6e6c JJIL |
485 | pdev->device); |
486 | ||
487 | host = ata_host_alloc_pinfo(&pdev->dev, ppi, ATP867X_NUM_PORTS); | |
488 | if (!host) { | |
a44fec1f | 489 | dev_err(&pdev->dev, "failed to allocate ATA host\n"); |
d15d6e6c JJIL |
490 | rc = -ENOMEM; |
491 | goto err_out; | |
492 | } | |
493 | ||
494 | rc = atp867x_ata_pci_sff_init_host(host); | |
495 | if (rc) { | |
a44fec1f | 496 | dev_err(&pdev->dev, "failed to init host\n"); |
d15d6e6c JJIL |
497 | goto err_out; |
498 | } | |
499 | ||
500 | pci_set_master(pdev); | |
501 | ||
c3b28894 | 502 | rc = ata_host_activate(host, pdev->irq, ata_bmdma_interrupt, |
d15d6e6c JJIL |
503 | IRQF_SHARED, &atp867x_sht); |
504 | if (rc) | |
a44fec1f | 505 | dev_err(&pdev->dev, "failed to activate host\n"); |
d15d6e6c JJIL |
506 | |
507 | err_out: | |
508 | return rc; | |
509 | } | |
510 | ||
58eb8cd5 | 511 | #ifdef CONFIG_PM_SLEEP |
7affb32a BZ |
512 | static int atp867x_reinit_one(struct pci_dev *pdev) |
513 | { | |
0a86e1c8 | 514 | struct ata_host *host = pci_get_drvdata(pdev); |
7affb32a BZ |
515 | int rc; |
516 | ||
517 | rc = ata_pci_device_do_resume(pdev); | |
518 | if (rc) | |
519 | return rc; | |
520 | ||
521 | atp867x_fixup(host); | |
522 | ||
523 | ata_host_resume(host); | |
524 | return 0; | |
525 | } | |
526 | #endif | |
527 | ||
d15d6e6c JJIL |
528 | static struct pci_device_id atp867x_pci_tbl[] = { |
529 | { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867A), 0 }, | |
530 | { PCI_VDEVICE(ARTOP, PCI_DEVICE_ID_ARTOP_ATP867B), 0 }, | |
531 | { }, | |
532 | }; | |
533 | ||
534 | static struct pci_driver atp867x_driver = { | |
535 | .name = DRV_NAME, | |
536 | .id_table = atp867x_pci_tbl, | |
537 | .probe = atp867x_init_one, | |
538 | .remove = ata_pci_remove_one, | |
58eb8cd5 | 539 | #ifdef CONFIG_PM_SLEEP |
7affb32a BZ |
540 | .suspend = ata_pci_device_suspend, |
541 | .resume = atp867x_reinit_one, | |
542 | #endif | |
d15d6e6c JJIL |
543 | }; |
544 | ||
2fc75da0 | 545 | module_pci_driver(atp867x_driver); |
d15d6e6c JJIL |
546 | |
547 | MODULE_AUTHOR("John(Jung-Ik) Lee, Google Inc."); | |
548 | MODULE_DESCRIPTION("low level driver for Artop/Acard 867x ATA controller"); | |
549 | MODULE_LICENSE("GPL"); | |
550 | MODULE_DEVICE_TABLE(pci, atp867x_pci_tbl); | |
551 | MODULE_VERSION(DRV_VERSION); |