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669a5db4 JG |
1 | /* |
2 | * pata_ali.c - ALI 15x3 PATA for new ATA layer | |
3 | * (C) 2005 Red Hat Inc | |
4 | * Alan Cox <alan@redhat.com> | |
5 | * | |
6 | * based in part upon | |
7 | * linux/drivers/ide/pci/alim15x3.c Version 0.17 2003/01/02 | |
8 | * | |
9 | * Copyright (C) 1998-2000 Michel Aubry, Maintainer | |
10 | * Copyright (C) 1998-2000 Andrzej Krzysztofowicz, Maintainer | |
11 | * Copyright (C) 1999-2000 CJ, cjtsai@ali.com.tw, Maintainer | |
12 | * | |
13 | * Copyright (C) 1998-2000 Andre Hedrick (andre@linux-ide.org) | |
14 | * May be copied or modified under the terms of the GNU General Public License | |
15 | * Copyright (C) 2002 Alan Cox <alan@redhat.com> | |
16 | * ALi (now ULi M5228) support by Clear Zhang <Clear.Zhang@ali.com.tw> | |
17 | * | |
18 | * Documentation | |
19 | * Chipset documentation available under NDA only | |
20 | * | |
21 | * TODO/CHECK | |
22 | * Cannot have ATAPI on both master & slave for rev < c2 (???) but | |
23 | * otherwise should do atapi DMA. | |
24 | */ | |
25 | ||
26 | #include <linux/kernel.h> | |
27 | #include <linux/module.h> | |
28 | #include <linux/pci.h> | |
29 | #include <linux/init.h> | |
30 | #include <linux/blkdev.h> | |
31 | #include <linux/delay.h> | |
32 | #include <scsi/scsi_host.h> | |
33 | #include <linux/libata.h> | |
34 | #include <linux/dmi.h> | |
35 | ||
36 | #define DRV_NAME "pata_ali" | |
cb48cab7 | 37 | #define DRV_VERSION "0.7.3" |
669a5db4 JG |
38 | |
39 | /* | |
40 | * Cable special cases | |
41 | */ | |
42 | ||
43 | static struct dmi_system_id cable_dmi_table[] = { | |
44 | { | |
45 | .ident = "HP Pavilion N5430", | |
46 | .matches = { | |
47 | DMI_MATCH(DMI_BOARD_VENDOR, "Hewlett-Packard"), | |
48 | DMI_MATCH(DMI_BOARD_NAME, "OmniBook N32N-736"), | |
49 | }, | |
50 | }, | |
51 | { } | |
52 | }; | |
53 | ||
54 | static int ali_cable_override(struct pci_dev *pdev) | |
55 | { | |
56 | /* Fujitsu P2000 */ | |
57 | if (pdev->subsystem_vendor == 0x10CF && pdev->subsystem_device == 0x10AF) | |
58 | return 1; | |
59 | /* Systems by DMI */ | |
60 | if (dmi_check_system(cable_dmi_table)) | |
61 | return 1; | |
62 | return 0; | |
63 | } | |
64 | ||
65 | /** | |
66 | * ali_c2_cable_detect - cable detection | |
67 | * @ap: ATA port | |
68 | * | |
69 | * Perform cable detection for C2 and later revisions | |
70 | */ | |
71 | ||
72 | static int ali_c2_cable_detect(struct ata_port *ap) | |
73 | { | |
74 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
75 | u8 ata66; | |
76 | ||
77 | /* Certain laptops use short but suitable cables and don't | |
78 | implement the detect logic */ | |
79 | ||
80 | if (ali_cable_override(pdev)) | |
fc085150 | 81 | return ATA_CBL_PATA40_SHORT; |
669a5db4 JG |
82 | |
83 | /* Host view cable detect 0x4A bit 0 primary bit 1 secondary | |
84 | Bit set for 40 pin */ | |
85 | pci_read_config_byte(pdev, 0x4A, &ata66); | |
86 | if (ata66 & (1 << ap->port_no)) | |
87 | return ATA_CBL_PATA40; | |
88 | else | |
89 | return ATA_CBL_PATA80; | |
90 | } | |
91 | ||
92 | /** | |
93 | * ali_early_error_handler - reset for eary chip | |
94 | * @ap: ATA port | |
95 | * | |
96 | * Handle the reset callback for the later chips with cable detect | |
97 | */ | |
98 | ||
99 | static int ali_c2_pre_reset(struct ata_port *ap) | |
100 | { | |
101 | ap->cbl = ali_c2_cable_detect(ap); | |
102 | return ata_std_prereset(ap); | |
103 | } | |
104 | ||
105 | static void ali_c2_error_handler(struct ata_port *ap) | |
106 | { | |
107 | ata_bmdma_drive_eh(ap, ali_c2_pre_reset, | |
108 | ata_std_softreset, NULL, | |
109 | ata_std_postreset); | |
110 | } | |
111 | ||
112 | /** | |
113 | * ali_early_cable_detect - cable detection | |
114 | * @ap: ATA port | |
115 | * | |
116 | * Perform cable detection for older chipsets. This turns out to be | |
117 | * rather easy to implement | |
118 | */ | |
119 | ||
120 | static int ali_early_cable_detect(struct ata_port *ap) | |
121 | { | |
122 | return ATA_CBL_PATA40; | |
123 | } | |
124 | ||
125 | /** | |
126 | * ali_early_probe_init - reset for early chip | |
127 | * @ap: ATA port | |
128 | * | |
129 | * Handle the reset callback for the early (pre cable detect) chips. | |
130 | */ | |
131 | ||
132 | static int ali_early_pre_reset(struct ata_port *ap) | |
133 | { | |
134 | ap->cbl = ali_early_cable_detect(ap); | |
135 | return ata_std_prereset(ap); | |
136 | } | |
137 | ||
138 | static void ali_early_error_handler(struct ata_port *ap) | |
139 | { | |
140 | return ata_bmdma_drive_eh(ap, ali_early_pre_reset, | |
141 | ata_std_softreset, NULL, | |
142 | ata_std_postreset); | |
143 | } | |
144 | ||
145 | /** | |
146 | * ali_20_filter - filter for earlier ALI DMA | |
147 | * @ap: ALi ATA port | |
148 | * @adev: attached device | |
149 | * | |
150 | * Ensure that we do not do DMA on CD devices. We may be able to | |
151 | * fix that later on. Also ensure we do not do UDMA on WDC drives | |
152 | */ | |
153 | ||
a76b62ca | 154 | static unsigned long ali_20_filter(struct ata_device *adev, unsigned long mask) |
669a5db4 | 155 | { |
8bfa79fc | 156 | char model_num[ATA_ID_PROD_LEN + 1]; |
669a5db4 JG |
157 | /* No DMA on anything but a disk for now */ |
158 | if (adev->class != ATA_DEV_ATA) | |
159 | mask &= ~(ATA_MASK_MWDMA | ATA_MASK_UDMA); | |
8bfa79fc | 160 | ata_id_c_string(adev->id, model_num, ATA_ID_PROD, sizeof(model_num)); |
669a5db4 JG |
161 | if (strstr(model_num, "WDC")) |
162 | return mask &= ~ATA_MASK_UDMA; | |
a76b62ca | 163 | return ata_pci_default_filter(adev, mask); |
669a5db4 JG |
164 | } |
165 | ||
166 | /** | |
167 | * ali_fifo_control - FIFO manager | |
168 | * @ap: ALi channel to control | |
169 | * @adev: device for FIFO control | |
170 | * @on: 0 for off 1 for on | |
171 | * | |
172 | * Enable or disable the FIFO on a given device. Because of the way the | |
173 | * ALi FIFO works it provides a boost on ATA disk but can be confused by | |
174 | * ATAPI and we must therefore manage it. | |
175 | */ | |
176 | ||
177 | static void ali_fifo_control(struct ata_port *ap, struct ata_device *adev, int on) | |
178 | { | |
179 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
180 | int pio_fifo = 0x54 + ap->port_no; | |
181 | u8 fifo; | |
182 | int shift = 4 * adev->devno; | |
183 | ||
184 | /* ATA - FIFO on set nibble to 0x05, ATAPI - FIFO off, set nibble to | |
185 | 0x00. Not all the docs agree but the behaviour we now use is the | |
186 | one stated in the BIOS Programming Guide */ | |
85cd7251 | 187 | |
669a5db4 JG |
188 | pci_read_config_byte(pdev, pio_fifo, &fifo); |
189 | fifo &= ~(0x0F << shift); | |
190 | if (on) | |
191 | fifo |= (on << shift); | |
192 | pci_write_config_byte(pdev, pio_fifo, fifo); | |
193 | } | |
194 | ||
195 | /** | |
196 | * ali_program_modes - load mode registers | |
197 | * @ap: ALi channel to load | |
198 | * @adev: Device the timing is for | |
199 | * @cmd: Command timing | |
200 | * @data: Data timing | |
201 | * @ultra: UDMA timing or zero for off | |
202 | * | |
203 | * Loads the timing registers for cmd/data and disable UDMA if | |
204 | * ultra is zero. If ultra is set then load and enable the UDMA | |
205 | * timing but do not touch the command/data timing. | |
206 | */ | |
207 | ||
208 | static void ali_program_modes(struct ata_port *ap, struct ata_device *adev, struct ata_timing *t, u8 ultra) | |
209 | { | |
210 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
211 | int cas = 0x58 + 4 * ap->port_no; /* Command timing */ | |
212 | int cbt = 0x59 + 4 * ap->port_no; /* Command timing */ | |
213 | int drwt = 0x5A + 4 * ap->port_no + adev->devno; /* R/W timing */ | |
214 | int udmat = 0x56 + ap->port_no; /* UDMA timing */ | |
215 | int shift = 4 * adev->devno; | |
216 | u8 udma; | |
217 | ||
218 | if (t != NULL) { | |
219 | t->setup = FIT(t->setup, 1, 8) & 7; | |
220 | t->act8b = FIT(t->act8b, 1, 8) & 7; | |
221 | t->rec8b = FIT(t->rec8b, 1, 16) & 15; | |
222 | t->active = FIT(t->active, 1, 8) & 7; | |
223 | t->recover = FIT(t->recover, 1, 16) & 15; | |
224 | ||
225 | pci_write_config_byte(pdev, cas, t->setup); | |
226 | pci_write_config_byte(pdev, cbt, (t->act8b << 4) | t->rec8b); | |
227 | pci_write_config_byte(pdev, drwt, (t->active << 4) | t->recover); | |
228 | } | |
229 | ||
230 | /* Set up the UDMA enable */ | |
231 | pci_read_config_byte(pdev, udmat, &udma); | |
232 | udma &= ~(0x0F << shift); | |
233 | udma |= ultra << shift; | |
234 | pci_write_config_byte(pdev, udmat, udma); | |
235 | } | |
236 | ||
237 | /** | |
238 | * ali_set_piomode - set initial PIO mode data | |
239 | * @ap: ATA interface | |
240 | * @adev: ATA device | |
241 | * | |
242 | * Program the ALi registers for PIO mode. FIXME: add timings for | |
243 | * PIO5. | |
244 | */ | |
245 | ||
246 | static void ali_set_piomode(struct ata_port *ap, struct ata_device *adev) | |
247 | { | |
248 | struct ata_device *pair = ata_dev_pair(adev); | |
249 | struct ata_timing t; | |
250 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
251 | ||
252 | ata_timing_compute(adev, adev->pio_mode, &t, T, 1); | |
253 | if (pair) { | |
254 | struct ata_timing p; | |
255 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
256 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
257 | if (pair->dma_mode) { | |
258 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
259 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
260 | } | |
261 | } | |
262 | ||
263 | /* PIO FIFO is only permitted on ATA disk */ | |
264 | if (adev->class != ATA_DEV_ATA) | |
265 | ali_fifo_control(ap, adev, 0x00); | |
266 | ali_program_modes(ap, adev, &t, 0); | |
267 | if (adev->class == ATA_DEV_ATA) | |
268 | ali_fifo_control(ap, adev, 0x05); | |
269 | ||
270 | } | |
271 | ||
272 | /** | |
273 | * ali_set_dmamode - set initial DMA mode data | |
274 | * @ap: ATA interface | |
275 | * @adev: ATA device | |
276 | * | |
277 | * FIXME: MWDMA timings | |
278 | */ | |
279 | ||
280 | static void ali_set_dmamode(struct ata_port *ap, struct ata_device *adev) | |
281 | { | |
282 | static u8 udma_timing[7] = { 0xC, 0xB, 0xA, 0x9, 0x8, 0xF, 0xD }; | |
283 | struct ata_device *pair = ata_dev_pair(adev); | |
284 | struct ata_timing t; | |
285 | unsigned long T = 1000000000 / 33333; /* PCI clock based */ | |
286 | struct pci_dev *pdev = to_pci_dev(ap->host->dev); | |
287 | ||
288 | ||
289 | if (adev->class == ATA_DEV_ATA) | |
290 | ali_fifo_control(ap, adev, 0x08); | |
291 | ||
292 | if (adev->dma_mode >= XFER_UDMA_0) { | |
293 | ali_program_modes(ap, adev, NULL, udma_timing[adev->dma_mode - XFER_UDMA_0]); | |
294 | if (adev->dma_mode >= XFER_UDMA_3) { | |
295 | u8 reg4b; | |
296 | pci_read_config_byte(pdev, 0x4B, ®4b); | |
297 | reg4b |= 1; | |
298 | pci_write_config_byte(pdev, 0x4B, reg4b); | |
299 | } | |
300 | } else { | |
301 | ata_timing_compute(adev, adev->dma_mode, &t, T, 1); | |
302 | if (pair) { | |
303 | struct ata_timing p; | |
304 | ata_timing_compute(pair, pair->pio_mode, &p, T, 1); | |
305 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
306 | if (pair->dma_mode) { | |
307 | ata_timing_compute(pair, pair->dma_mode, &p, T, 1); | |
308 | ata_timing_merge(&p, &t, &t, ATA_TIMING_SETUP|ATA_TIMING_8BIT); | |
309 | } | |
310 | } | |
311 | ali_program_modes(ap, adev, &t, 0); | |
312 | } | |
313 | } | |
314 | ||
315 | /** | |
316 | * ali_lock_sectors - Keep older devices to 255 sector mode | |
317 | * @ap: ATA port | |
318 | * @adev: Device | |
319 | * | |
320 | * Called during the bus probe for each device that is found. We use | |
321 | * this call to lock the sector count of the device to 255 or less on | |
322 | * older ALi controllers. If we didn't do this then large I/O's would | |
323 | * require LBA48 commands which the older ALi requires are issued by | |
324 | * slower PIO methods | |
325 | */ | |
326 | ||
cd0d3bbc | 327 | static void ali_lock_sectors(struct ata_device *adev) |
669a5db4 JG |
328 | { |
329 | adev->max_sectors = 255; | |
330 | } | |
331 | ||
332 | static struct scsi_host_template ali_sht = { | |
333 | .module = THIS_MODULE, | |
334 | .name = DRV_NAME, | |
335 | .ioctl = ata_scsi_ioctl, | |
336 | .queuecommand = ata_scsi_queuecmd, | |
337 | .can_queue = ATA_DEF_QUEUE, | |
338 | .this_id = ATA_SHT_THIS_ID, | |
339 | .sg_tablesize = LIBATA_MAX_PRD, | |
669a5db4 JG |
340 | .cmd_per_lun = ATA_SHT_CMD_PER_LUN, |
341 | .emulated = ATA_SHT_EMULATED, | |
342 | .use_clustering = ATA_SHT_USE_CLUSTERING, | |
343 | .proc_name = DRV_NAME, | |
344 | .dma_boundary = ATA_DMA_BOUNDARY, | |
345 | .slave_configure = ata_scsi_slave_config, | |
afdfe899 | 346 | .slave_destroy = ata_scsi_slave_destroy, |
669a5db4 | 347 | .bios_param = ata_std_bios_param, |
438ac6d5 | 348 | #ifdef CONFIG_PM |
34d8dfb1 A |
349 | .resume = ata_scsi_device_resume, |
350 | .suspend = ata_scsi_device_suspend, | |
438ac6d5 | 351 | #endif |
669a5db4 JG |
352 | }; |
353 | ||
354 | /* | |
355 | * Port operations for PIO only ALi | |
356 | */ | |
357 | ||
358 | static struct ata_port_operations ali_early_port_ops = { | |
359 | .port_disable = ata_port_disable, | |
360 | .set_piomode = ali_set_piomode, | |
361 | .tf_load = ata_tf_load, | |
362 | .tf_read = ata_tf_read, | |
363 | .check_status = ata_check_status, | |
364 | .exec_command = ata_exec_command, | |
365 | .dev_select = ata_std_dev_select, | |
366 | ||
367 | .freeze = ata_bmdma_freeze, | |
368 | .thaw = ata_bmdma_thaw, | |
369 | .error_handler = ali_early_error_handler, | |
370 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
371 | ||
372 | .qc_prep = ata_qc_prep, | |
373 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 374 | |
0d5ff566 | 375 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
376 | |
377 | .irq_handler = ata_interrupt, | |
378 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
379 | .irq_on = ata_irq_on, |
380 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
381 | |
382 | .port_start = ata_port_start, | |
669a5db4 JG |
383 | }; |
384 | ||
385 | /* | |
386 | * Port operations for DMA capable ALi without cable | |
387 | * detect | |
388 | */ | |
389 | static struct ata_port_operations ali_20_port_ops = { | |
390 | .port_disable = ata_port_disable, | |
391 | ||
392 | .set_piomode = ali_set_piomode, | |
393 | .set_dmamode = ali_set_dmamode, | |
394 | .mode_filter = ali_20_filter, | |
395 | ||
396 | .tf_load = ata_tf_load, | |
397 | .tf_read = ata_tf_read, | |
398 | .check_status = ata_check_status, | |
399 | .exec_command = ata_exec_command, | |
400 | .dev_select = ata_std_dev_select, | |
401 | .dev_config = ali_lock_sectors, | |
402 | ||
403 | .freeze = ata_bmdma_freeze, | |
404 | .thaw = ata_bmdma_thaw, | |
405 | .error_handler = ali_early_error_handler, | |
406 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
407 | ||
408 | .bmdma_setup = ata_bmdma_setup, | |
409 | .bmdma_start = ata_bmdma_start, | |
410 | .bmdma_stop = ata_bmdma_stop, | |
411 | .bmdma_status = ata_bmdma_status, | |
412 | ||
413 | .qc_prep = ata_qc_prep, | |
414 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 415 | |
0d5ff566 | 416 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
417 | |
418 | .irq_handler = ata_interrupt, | |
419 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
420 | .irq_on = ata_irq_on, |
421 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
422 | |
423 | .port_start = ata_port_start, | |
669a5db4 JG |
424 | }; |
425 | ||
426 | /* | |
427 | * Port operations for DMA capable ALi with cable detect | |
428 | */ | |
429 | static struct ata_port_operations ali_c2_port_ops = { | |
430 | .port_disable = ata_port_disable, | |
431 | .set_piomode = ali_set_piomode, | |
432 | .set_dmamode = ali_set_dmamode, | |
433 | .mode_filter = ata_pci_default_filter, | |
434 | .tf_load = ata_tf_load, | |
435 | .tf_read = ata_tf_read, | |
436 | .check_status = ata_check_status, | |
437 | .exec_command = ata_exec_command, | |
438 | .dev_select = ata_std_dev_select, | |
439 | .dev_config = ali_lock_sectors, | |
440 | ||
441 | .freeze = ata_bmdma_freeze, | |
442 | .thaw = ata_bmdma_thaw, | |
443 | .error_handler = ali_c2_error_handler, | |
444 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
445 | ||
446 | .bmdma_setup = ata_bmdma_setup, | |
447 | .bmdma_start = ata_bmdma_start, | |
448 | .bmdma_stop = ata_bmdma_stop, | |
449 | .bmdma_status = ata_bmdma_status, | |
450 | ||
451 | .qc_prep = ata_qc_prep, | |
452 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 453 | |
0d5ff566 | 454 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
455 | |
456 | .irq_handler = ata_interrupt, | |
457 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
458 | .irq_on = ata_irq_on, |
459 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
460 | |
461 | .port_start = ata_port_start, | |
669a5db4 JG |
462 | }; |
463 | ||
464 | /* | |
465 | * Port operations for DMA capable ALi with cable detect and LBA48 | |
466 | */ | |
467 | static struct ata_port_operations ali_c5_port_ops = { | |
468 | .port_disable = ata_port_disable, | |
469 | .set_piomode = ali_set_piomode, | |
470 | .set_dmamode = ali_set_dmamode, | |
471 | .mode_filter = ata_pci_default_filter, | |
472 | .tf_load = ata_tf_load, | |
473 | .tf_read = ata_tf_read, | |
474 | .check_status = ata_check_status, | |
475 | .exec_command = ata_exec_command, | |
476 | .dev_select = ata_std_dev_select, | |
477 | ||
478 | .freeze = ata_bmdma_freeze, | |
479 | .thaw = ata_bmdma_thaw, | |
480 | .error_handler = ali_c2_error_handler, | |
481 | .post_internal_cmd = ata_bmdma_post_internal_cmd, | |
482 | ||
483 | .bmdma_setup = ata_bmdma_setup, | |
484 | .bmdma_start = ata_bmdma_start, | |
485 | .bmdma_stop = ata_bmdma_stop, | |
486 | .bmdma_status = ata_bmdma_status, | |
487 | ||
488 | .qc_prep = ata_qc_prep, | |
489 | .qc_issue = ata_qc_issue_prot, | |
bda30288 | 490 | |
0d5ff566 | 491 | .data_xfer = ata_data_xfer, |
669a5db4 JG |
492 | |
493 | .irq_handler = ata_interrupt, | |
494 | .irq_clear = ata_bmdma_irq_clear, | |
246ce3b6 AI |
495 | .irq_on = ata_irq_on, |
496 | .irq_ack = ata_irq_ack, | |
669a5db4 JG |
497 | |
498 | .port_start = ata_port_start, | |
669a5db4 JG |
499 | }; |
500 | ||
34d8dfb1 A |
501 | |
502 | /** | |
503 | * ali_init_chipset - chip setup function | |
504 | * @pdev: PCI device of ATA controller | |
505 | * | |
506 | * Perform the setup on the device that must be done both at boot | |
507 | * and at resume time. | |
508 | */ | |
f20b16ff | 509 | |
34d8dfb1 A |
510 | static void ali_init_chipset(struct pci_dev *pdev) |
511 | { | |
512 | u8 rev, tmp; | |
513 | struct pci_dev *north, *isa_bridge; | |
514 | ||
515 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); | |
516 | ||
517 | /* | |
518 | * The chipset revision selects the driver operations and | |
519 | * mode data. | |
520 | */ | |
521 | ||
522 | if (rev >= 0x20 && rev < 0xC2) { | |
523 | /* 1543-E/F, 1543C-C, 1543C-D, 1543C-E */ | |
524 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
525 | /* Clear CD-ROM DMA write bit */ | |
526 | tmp &= 0x7F; | |
527 | pci_write_config_byte(pdev, 0x4B, tmp); | |
528 | } else if (rev >= 0xC2) { | |
529 | /* Enable cable detection logic */ | |
530 | pci_read_config_byte(pdev, 0x4B, &tmp); | |
531 | pci_write_config_byte(pdev, 0x4B, tmp | 0x08); | |
532 | } | |
8e42a5a2 | 533 | north = pci_get_bus_and_slot(0, PCI_DEVFN(0,0)); |
34d8dfb1 A |
534 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
535 | ||
536 | if (north && north->vendor == PCI_VENDOR_ID_AL && isa_bridge) { | |
537 | /* Configure the ALi bridge logic. For non ALi rely on BIOS. | |
538 | Set the south bridge enable bit */ | |
539 | pci_read_config_byte(isa_bridge, 0x79, &tmp); | |
540 | if (rev == 0xC2) | |
541 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x04); | |
8e42a5a2 | 542 | else if (rev > 0xC2 && rev < 0xC5) |
34d8dfb1 A |
543 | pci_write_config_byte(isa_bridge, 0x79, tmp | 0x02); |
544 | } | |
545 | if (rev >= 0x20) { | |
546 | /* | |
547 | * CD_ROM DMA on (0x53 bit 0). Enable this even if we want | |
548 | * to use PIO. 0x53 bit 1 (rev 20 only) - enable FIFO control | |
549 | * via 0x54/55. | |
550 | */ | |
551 | pci_read_config_byte(pdev, 0x53, &tmp); | |
552 | if (rev <= 0x20) | |
553 | tmp &= ~0x02; | |
554 | if (rev >= 0xc7) | |
555 | tmp |= 0x03; | |
556 | else | |
557 | tmp |= 0x01; /* CD_ROM enable for DMA */ | |
558 | pci_write_config_byte(pdev, 0x53, tmp); | |
559 | } | |
560 | pci_dev_put(isa_bridge); | |
561 | pci_dev_put(north); | |
562 | ata_pci_clear_simplex(pdev); | |
563 | } | |
669a5db4 JG |
564 | /** |
565 | * ali_init_one - discovery callback | |
566 | * @pdev: PCI device ID | |
567 | * @id: PCI table info | |
568 | * | |
569 | * An ALi IDE interface has been discovered. Figure out what revision | |
570 | * and perform configuration work before handing it to the ATA layer | |
571 | */ | |
572 | ||
573 | static int ali_init_one(struct pci_dev *pdev, const struct pci_device_id *id) | |
574 | { | |
575 | static struct ata_port_info info_early = { | |
576 | .sht = &ali_sht, | |
577 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
578 | .pio_mask = 0x1f, | |
579 | .port_ops = &ali_early_port_ops | |
580 | }; | |
581 | /* Revision 0x20 added DMA */ | |
582 | static struct ata_port_info info_20 = { | |
583 | .sht = &ali_sht, | |
584 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
585 | .pio_mask = 0x1f, | |
586 | .mwdma_mask = 0x07, | |
587 | .port_ops = &ali_20_port_ops | |
588 | }; | |
589 | /* Revision 0x20 with support logic added UDMA */ | |
590 | static struct ata_port_info info_20_udma = { | |
591 | .sht = &ali_sht, | |
592 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
593 | .pio_mask = 0x1f, | |
85cd7251 | 594 | .mwdma_mask = 0x07, |
669a5db4 JG |
595 | .udma_mask = 0x07, /* UDMA33 */ |
596 | .port_ops = &ali_20_port_ops | |
597 | }; | |
598 | /* Revision 0xC2 adds UDMA66 */ | |
599 | static struct ata_port_info info_c2 = { | |
600 | .sht = &ali_sht, | |
601 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
602 | .pio_mask = 0x1f, | |
603 | .mwdma_mask = 0x07, | |
604 | .udma_mask = 0x1f, | |
605 | .port_ops = &ali_c2_port_ops | |
606 | }; | |
607 | /* Revision 0xC3 is UDMA100 */ | |
608 | static struct ata_port_info info_c3 = { | |
609 | .sht = &ali_sht, | |
610 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
611 | .pio_mask = 0x1f, | |
612 | .mwdma_mask = 0x07, | |
613 | .udma_mask = 0x3f, | |
614 | .port_ops = &ali_c2_port_ops | |
615 | }; | |
616 | /* Revision 0xC4 is UDMA133 */ | |
617 | static struct ata_port_info info_c4 = { | |
618 | .sht = &ali_sht, | |
619 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST | ATA_FLAG_PIO_LBA48, | |
620 | .pio_mask = 0x1f, | |
621 | .mwdma_mask = 0x07, | |
622 | .udma_mask = 0x7f, | |
623 | .port_ops = &ali_c2_port_ops | |
624 | }; | |
625 | /* Revision 0xC5 is UDMA133 with LBA48 DMA */ | |
626 | static struct ata_port_info info_c5 = { | |
627 | .sht = &ali_sht, | |
628 | .flags = ATA_FLAG_SLAVE_POSS | ATA_FLAG_SRST, | |
629 | .pio_mask = 0x1f, | |
630 | .mwdma_mask = 0x07, | |
631 | .udma_mask = 0x7f, | |
632 | .port_ops = &ali_c5_port_ops | |
633 | }; | |
634 | ||
635 | static struct ata_port_info *port_info[2]; | |
636 | u8 rev, tmp; | |
34d8dfb1 | 637 | struct pci_dev *isa_bridge; |
669a5db4 JG |
638 | |
639 | pci_read_config_byte(pdev, PCI_REVISION_ID, &rev); | |
640 | ||
641 | /* | |
642 | * The chipset revision selects the driver operations and | |
643 | * mode data. | |
644 | */ | |
645 | ||
646 | if (rev < 0x20) { | |
647 | port_info[0] = port_info[1] = &info_early; | |
648 | } else if (rev < 0xC2) { | |
669a5db4 JG |
649 | port_info[0] = port_info[1] = &info_20; |
650 | } else if (rev == 0xC2) { | |
651 | port_info[0] = port_info[1] = &info_c2; | |
652 | } else if (rev == 0xC3) { | |
653 | port_info[0] = port_info[1] = &info_c3; | |
654 | } else if (rev == 0xC4) { | |
655 | port_info[0] = port_info[1] = &info_c4; | |
656 | } else | |
657 | port_info[0] = port_info[1] = &info_c5; | |
658 | ||
34d8dfb1 | 659 | ali_init_chipset(pdev); |
f20b16ff | 660 | |
669a5db4 | 661 | isa_bridge = pci_get_device(PCI_VENDOR_ID_AL, PCI_DEVICE_ID_AL_M1533, NULL); |
34d8dfb1 A |
662 | if (isa_bridge && rev >= 0x20 && rev < 0xC2) { |
663 | /* Are we paired with a UDMA capable chip */ | |
664 | pci_read_config_byte(isa_bridge, 0x5E, &tmp); | |
665 | if ((tmp & 0x1E) == 0x12) | |
666 | port_info[0] = port_info[1] = &info_20_udma; | |
667 | pci_dev_put(isa_bridge); | |
669a5db4 | 668 | } |
669a5db4 JG |
669 | return ata_pci_init_one(pdev, port_info, 2); |
670 | } | |
671 | ||
438ac6d5 | 672 | #ifdef CONFIG_PM |
34d8dfb1 A |
673 | static int ali_reinit_one(struct pci_dev *pdev) |
674 | { | |
675 | ali_init_chipset(pdev); | |
676 | return ata_pci_device_resume(pdev); | |
677 | } | |
438ac6d5 | 678 | #endif |
34d8dfb1 | 679 | |
2d2744fc JG |
680 | static const struct pci_device_id ali[] = { |
681 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5228), }, | |
682 | { PCI_VDEVICE(AL, PCI_DEVICE_ID_AL_M5229), }, | |
683 | ||
684 | { }, | |
669a5db4 JG |
685 | }; |
686 | ||
687 | static struct pci_driver ali_pci_driver = { | |
688 | .name = DRV_NAME, | |
689 | .id_table = ali, | |
690 | .probe = ali_init_one, | |
34d8dfb1 | 691 | .remove = ata_pci_remove_one, |
438ac6d5 | 692 | #ifdef CONFIG_PM |
34d8dfb1 A |
693 | .suspend = ata_pci_device_suspend, |
694 | .resume = ali_reinit_one, | |
438ac6d5 | 695 | #endif |
669a5db4 JG |
696 | }; |
697 | ||
698 | static int __init ali_init(void) | |
699 | { | |
700 | return pci_register_driver(&ali_pci_driver); | |
701 | } | |
702 | ||
703 | ||
704 | static void __exit ali_exit(void) | |
705 | { | |
706 | pci_unregister_driver(&ali_pci_driver); | |
707 | } | |
708 | ||
709 | ||
710 | MODULE_AUTHOR("Alan Cox"); | |
711 | MODULE_DESCRIPTION("low-level driver for ALi PATA"); | |
712 | MODULE_LICENSE("GPL"); | |
713 | MODULE_DEVICE_TABLE(pci, ali); | |
714 | MODULE_VERSION(DRV_VERSION); | |
715 | ||
716 | module_init(ali_init); | |
717 | module_exit(ali_exit); |